diff options
Diffstat (limited to 'meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0005-uboot-serial-sh-SCIF-internal-clock-support.patch')
-rw-r--r-- | meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0005-uboot-serial-sh-SCIF-internal-clock-support.patch | 124 |
1 files changed, 124 insertions, 0 deletions
diff --git a/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0005-uboot-serial-sh-SCIF-internal-clock-support.patch b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0005-uboot-serial-sh-SCIF-internal-clock-support.patch new file mode 100644 index 0000000..528da57 --- /dev/null +++ b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0005-uboot-serial-sh-SCIF-internal-clock-support.patch @@ -0,0 +1,124 @@ +From 95497016e961633e025666a041c63e501b0fc205 Mon Sep 17 00:00:00 2001 +From: Vladimir Barinov <vladimir.barinov@cogentembedded.com> +Date: Thu, 12 Feb 2015 16:25:57 +0300 +Subject: [U-boot][PATCH] serial: serial-sh: SCIF internal clock source support + +Support internal clock source for SCIF + +Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> + +--- + drivers/serial/serial_sh.c | 4 ++++ + drivers/serial/serial_sh.h | 7 ++++++- + include/configs/alt.h | 1 + + include/configs/gose.h | 1 + + include/configs/koelsch.h | 1 + + include/configs/lager.h | 1 + + include/configs/silk.h | 1 + + 7 files changed, 15 insertions(+), 1 deletion(-) + +Index: u-boot-sh.v1/drivers/serial/serial_sh.c +=================================================================== +--- u-boot-sh.v1.orig/drivers/serial/serial_sh.c 2015-02-12 14:12:53.616876124 +0300 ++++ u-boot-sh.v1/drivers/serial/serial_sh.c 2015-02-12 14:12:53.608876124 +0300 +@@ -63,9 +63,13 @@ + DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ + defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) ++#ifdef CONFIG_SCIF_USE_EXT_CLK + sci_out(&sh_sci, DL, DL_VALUE(gd->baudrate, CONFIG_SCIF_CLK_FREQ)); + udelay((1000000 * 2 * 16 / CONFIG_SYS_CLK_FREQ) * 1000 + 1); + #else ++ sci_out(&sh_sci, SCBRR, SCBRR_VALUE(gd->baudrate, CONFIG_SCIF_CLK_FREQ)); ++#endif ++#else + sci_out(&sh_sci, SCBRR, SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ)); + #endif + } +Index: u-boot-sh.v1/drivers/serial/serial_sh.h +=================================================================== +--- u-boot-sh.v1.orig/drivers/serial/serial_sh.h 2015-02-12 14:12:53.616876124 +0300 ++++ u-boot-sh.v1/drivers/serial/serial_sh.h 2015-02-12 14:13:18.400876703 +0300 +@@ -227,8 +227,12 @@ + #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ + defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) + # define SCIF_ORER 0x0001 ++#ifdef CONFIG_SCIF_USE_EXT_CLK + # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */ + #else ++# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */ ++#endif ++#else + # error CPU subtype not defined + #endif + +@@ -735,7 +739,8 @@ + #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1) + #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ + defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) +-#define DL_VALUE(bps, clk) (clk / bps / 16) ++#define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */ ++#define SCBRR_VALUE(bps, clk) (clk / bps / 32 - 1) /* Internal Clock */ + #else /* Generic SH */ + #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) + #endif +Index: u-boot-sh.v1/include/configs/gose.h +=================================================================== +--- u-boot-sh.v1.orig/include/configs/gose.h 2015-02-12 14:12:53.616876124 +0300 ++++ u-boot-sh.v1/include/configs/gose.h 2015-02-12 14:12:53.612876124 +0300 +@@ -102,6 +102,7 @@ + /* SCIF */ + #define CONFIG_SCIF_CONSOLE + #define CONFIG_CONS_SCIF0 ++#define CONFIG_SCIF_USE_EXT_CLK + #define SCIF0_BASE 0xe6e60000 + #undef CONFIG_SYS_CONSOLE_INFO_QUIET + #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +Index: u-boot-sh.v1/include/configs/koelsch.h +=================================================================== +--- u-boot-sh.v1.orig/include/configs/koelsch.h 2015-02-12 14:12:53.616876124 +0300 ++++ u-boot-sh.v1/include/configs/koelsch.h 2015-02-12 14:12:53.612876124 +0300 +@@ -102,6 +102,7 @@ + /* SCIF */ + #define CONFIG_SCIF_CONSOLE + #define CONFIG_CONS_SCIF0 ++#define CONFIG_SCIF_USE_EXT_CLK + #define SCIF0_BASE 0xe6e60000 + #undef CONFIG_SYS_CONSOLE_INFO_QUIET + #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +Index: u-boot-sh.v1/include/configs/lager.h +=================================================================== +--- u-boot-sh.v1.orig/include/configs/lager.h 2015-02-12 14:12:53.616876124 +0300 ++++ u-boot-sh.v1/include/configs/lager.h 2015-02-12 14:12:53.612876124 +0300 +@@ -103,6 +103,7 @@ + /* SCIF */ + #define CONFIG_SCIF_CONSOLE + #define CONFIG_CONS_SCIF0 ++#define CONFIG_SCIF_USE_EXT_CLK + #define SCIF0_BASE 0xe6e60000 + #undef CONFIG_SYS_CONSOLE_INFO_QUIET + #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +Index: u-boot-sh.v1/include/configs/silk.h +=================================================================== +--- u-boot-sh.v1.orig/include/configs/silk.h 2015-02-12 14:12:53.616876124 +0300 ++++ u-boot-sh.v1/include/configs/silk.h 2015-02-12 14:12:53.612876124 +0300 +@@ -104,6 +104,7 @@ + /* SCIF */ + #define CONFIG_SCIF_CONSOLE + #define CONFIG_CONS_SCIF2 ++#define CONFIG_SCIF_USE_EXT_CLK + #define SCIF2_BASE 0xe6e58000 + #undef CONFIG_SYS_CONSOLE_INFO_QUIET + #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +Index: u-boot-sh.v1/include/configs/alt.h +=================================================================== +--- u-boot-sh.v1.orig/include/configs/alt.h 2015-02-12 14:12:53.616876124 +0300 ++++ u-boot-sh.v1/include/configs/alt.h 2015-02-12 14:12:53.612876124 +0300 +@@ -102,6 +102,7 @@ + /* SCIF */ + #define CONFIG_SCIF_CONSOLE + #define CONFIG_CONS_SCIF2 ++#define CONFIG_SCIF_USE_EXT_CLK + #define SCIF2_BASE 0xe6e58000 + #undef CONFIG_SYS_CONSOLE_INFO_QUIET + #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE |