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-rw-r--r--meta-rcar-gen2/COPYING.MIT17
-rw-r--r--meta-rcar-gen2/README67
-rw-r--r--meta-rcar-gen2/README.proprietary170
-rw-r--r--meta-rcar-gen2/binary/.gitignore0
-rw-r--r--meta-rcar-gen2/conf/layer.conf10
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-rw-r--r--meta-rcar-gen2/conf/machine/include/r8a7791.inc12
-rw-r--r--meta-rcar-gen2/conf/machine/include/r8a7793.inc12
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-rw-r--r--meta-rcar-gen2/conf/machine/koelsch.conf28
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-rw-r--r--meta-rcar-gen2/conf/machine/silk.conf28
-rw-r--r--meta-rcar-gen2/include/gles-control.inc6
-rw-r--r--meta-rcar-gen2/include/multimedia-control.inc3
-rw-r--r--meta-rcar-gen2/include/omx-components-control.inc78
-rw-r--r--meta-rcar-gen2/include/rcar-gen2-modules-common.inc9
-rw-r--r--meta-rcar-gen2/recipes-bsp/formfactor/formfactor/alt/machconfig3
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-rw-r--r--meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0006-uboot-Silk-disable-dcache-until-fixed.patch51
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-rw-r--r--meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module/change-shell.patch8
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-rw-r--r--meta-rcar-gen2/recipes-graphics/mesa/mesa_9.2.5.bbappend13
-rw-r--r--meta-rcar-gen2/recipes-graphics/wayland/libegl.bb18
-rw-r--r--meta-rcar-gen2/recipes-graphics/wayland/libegl/0001-libegl-Remove-duplicate-header-files-of-gles-user-mo.patch4091
-rw-r--r--meta-rcar-gen2/recipes-graphics/wayland/libgbm.bb23
-rw-r--r--meta-rcar-gen2/recipes-graphics/wayland/wayland-kms_1.4.0.bb21
-rw-r--r--meta-rcar-gen2/recipes-graphics/wayland/wayland/disable-macro-checks-not-used-for-scanner.patch50
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-rw-r--r--meta-rcar-gen2/recipes-graphics/wayland/weston/disable-wayland-scanner-pkg-check.patch13
-rw-r--r--meta-rcar-gen2/recipes-graphics/wayland/weston/make-lcms-explicitly-configurable.patch43
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-rw-r--r--meta-rcar-gen2/recipes-kernel/fdpm-module/fdpm-kernel-module.bb84
-rw-r--r--meta-rcar-gen2/recipes-kernel/fdpm-module/files/.gitkeep0
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-rw-r--r--meta-rcar-gen2/recipes-kernel/gles-module/gles-kernel-module/.gitkeep0
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux-libc-headers/linux-libc-headers/scripts-Makefile.headersinst-install-headers-from-sc.patch59
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux-libc-headers/linux-libc-headers_3.10.bb13
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-dtb-append.inc61
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-dtb.inc69
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-alt-Add-vmalloc-384M-to-bootargs-of-DTS.patch26
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-gose-Add-vmalloc-384M-to-bootargs-of-DTS.patch26
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-koelsch-Add-vmalloc-384M-to-bootargs-of-DTS.patch26
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-lager-Add-vmalloc-384M-to-bootargs-of-DTS.patch26
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-kernel-Silk-board-support.patch1456
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0002-kernel-silk-fix-ethernet-phy-irq.patch25
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0003-kernel-silk-fix-sd-detect.patch25
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0004-kernel-Revert-i2c-rcar-Support-ACK-by-HW-auto-restart-after-NACK.patch66
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0006-Rcar-DU-add-RGB-connector.patch276
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0007-SILK-add-i2c0.patch45
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0008-Porter-board-support.patch1426
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0009-shmobile-add-atag-dtb-compat.patch26
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0010-Silk-Add-missing-pins-handle-to-Eth.patch43
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0011-Silk-Add-missing-DU-pins.patch49
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0012-can-add-Renesas-R-Car-CAN-driver.patch958
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0013-sh-pfc-r8a7791-add-CAN-pin-groups.patch216
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0014-sh-pfc-r8a7791-fix-CAN-pin-groups.patch52
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0015-can-rcar_can-support-all-input-clocks.patch139
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0016-can-rcar_can-document-device-tree-bindings.patch66
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0017-can-rcar_can-add-device-tree-support.patch77
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0018-porter-can-support.patch63
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0019-i2c-busses-rcar-Workaround-arbitration-loss-error.patch31
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0020-Silk-Remove-I2C1-clock-from-clk_enables.patch30
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux-renesas_3.10.bb71
-rw-r--r--meta-rcar-gen2/recipes-kernel/linux/linux.inc139
-rw-r--r--meta-rcar-gen2/recipes-kernel/mmngr-module/files/.gitkeep0
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-rw-r--r--meta-rcar-gen2/recipes-kernel/s3ctl-module/files/.gitkeep0
-rw-r--r--meta-rcar-gen2/recipes-kernel/s3ctl-module/s3ctl-kernel-module.bb64
-rw-r--r--meta-rcar-gen2/recipes-kernel/scu-module/files/.gitkeep0
-rw-r--r--meta-rcar-gen2/recipes-kernel/scu-module/scu-kernel-module.bb63
-rw-r--r--meta-rcar-gen2/recipes-kernel/ssp-module/files/.gitkeep0
-rw-r--r--meta-rcar-gen2/recipes-kernel/ssp-module/ssp-kernel-module.bb69
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-rw-r--r--meta-rcar-gen2/recipes-kernel/uvcs-module/uvcs-kernel-module.bb70
-rw-r--r--meta-rcar-gen2/recipes-kernel/vspm-module/files/.gitkeep0
-rw-r--r--meta-rcar-gen2/recipes-kernel/vspm-module/vspm-kernel-module.bb79
-rw-r--r--meta-rcar-gen2/recipes-multimedia/dtv-module/dtv-user-module.bb52
-rw-r--r--meta-rcar-gen2/recipes-multimedia/dtv-module/files/.gitkeep0
-rw-r--r--meta-rcar-gen2/recipes-multimedia/fdpm-module/fdpm-tp-user-module.bb31
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-rw-r--r--meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-omx_1.0.0.bbappend26
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diff --git a/meta-rcar-gen2/COPYING.MIT b/meta-rcar-gen2/COPYING.MIT
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index 0000000..89de354
--- /dev/null
+++ b/meta-rcar-gen2/COPYING.MIT
@@ -0,0 +1,17 @@
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
diff --git a/meta-rcar-gen2/README b/meta-rcar-gen2/README
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index 0000000..dc5d184
--- /dev/null
+++ b/meta-rcar-gen2/README
@@ -0,0 +1,67 @@
+meta-rcar-gen2
+===========
+
+This layer provides that evaluation board is mounted ARM SoCs of Renesas
+Electronics, called the R-Car Generation 2. Currently, this supports
+board and the SoCs of the following:
+ - Board: lager / SoC: R8A7790 (R-Car H2)
+ - Board: koelsch / SoC: R8A7791 (R-Car M2-W)
+ - Board: gose / SoC: R8A7793 (R-Car M2-N)
+ - Board: alt / SoC: R8A7794 (R-Car E2)
+
+Patches
+=======
+
+Please submit any patches for this layer to: nobuhiro.iwamatsu.yj@renesas.com
+Please see the MAINTAINERS file for more details.
+
+Dependencies
+============
+
+This layer depends on:
+
+ URI: git://git.yoctoproject.org/poky
+ layers: meta, meta-yocto, meta-yocto-bsp
+ branch: master
+
+ URI: git://git.yoctoproject.org/meta-renesas
+ layers: renesas
+ branch: master
+
+Build Instructions
+==================
+
+The following instructions require a Poky installation (or equivalent).
+
+Initialize a build using the 'oe-init-build-env' script in Poky. Once
+initialized configure bblayers.conf by adding the meta-renesas and
+meta-rcar-gen2 layer. e.g.:
+
+ BBLAYERS ?= " \
+ <path to layer>/poky/meta \
+ <path to layer>/poky/meta-yocto \
+ <path to layer>/poky/meta-yocto-bsp \
+ <path to layer>/meta-renesas \
+ <path to layer>/meta-renesas/meta-rcar-gen2 \
+ "
+
+To build a specific target BSP configure the associated machine in local.conf:
+
+ MACHINE ?= "<supported board name>"
+
+Build the target file system image using bitbake:
+
+ $ bitbake core-image-minimal
+
+Once complete the images for the target machine will be available in the output
+directory 'tmp/deploy/images/<supported board name>'.
+
+Images generated:
+ * uImage (Linux Kernel binary, in u-boot wrapped format)
+ * uImage+dtb (Linux Kernel binary with DTB, in u-boot wrapped format)
+ * zImage (Linux Kernel binary)
+ * zImage+dtb (Linux Kernel binary with DTB)
+ * uImage-<SoC namme>-<machine name>.dtb (DTB for target machine)
+ * core-image-minimal-<machine name>.tar.bz2 (rootfs tar+bzip2)
+ * core-image-minimal-<machine name>.jffs2 (rootfs in JFFS2 format)
+ * u-boot.bin (U-Boot binary)
diff --git a/meta-rcar-gen2/README.proprietary b/meta-rcar-gen2/README.proprietary
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--- /dev/null
+++ b/meta-rcar-gen2/README.proprietary
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+Proprietary libraries for meta-rcar-gen2
+========================================
+
+The meta-rcar-gen2 of meta-renesas is supported GLES(RGX and SGX) libraries
+for x11 and Weston, and proprietary library of multimedia. This README describes
+how to use these features and setting to local.conf.
+There are 4 main paths:
+ I/ Board configuration
+ II/ Build with or without GLES
+ III/ Build with Renesas multimedia libraries
+ IV/ Configuration for unmasking packages
+
+The default package is without GLES and including multimedia feature with H264 decoder.
+Therefore, please check section II to config for GLES,
+And check section III for configuration of optional multimedia packages.
+
+In addition, these binaries are not provided at the recipes. If you want to use,
+you will need to get from Renesas.
+
+I/ Board configuration
+==================
+* Please add this line to local.conf depending on your board
+ A. For Lager board
+ MACHINE ??= "lager"
+ B. For Koelsch board
+ MACHINE ??= "koelsch"
+ C. For Gose board
+ MACHINE ??= "gose"
+ D. For Alt board
+ MACHINE ??= "alt"
+
+II/ Build with or without GLES
+==================
+ A/ Build with GLES
+ * For wayland with rgx/sgx
+
+ 1. Please copy proprietary libraries to the directory of recipes.
+ 2. Please set local.conf the following.
+ Step 1: Adding features and preferred providers:
+
+ MACHINE_FEATURES_append = " sgx"
+ MULTI_PROVIDER_WHITELIST += "virtual/libgl virtual/egl virtual/libgles1 virtual/libgles2"
+ PREFERRED_PROVIDER_virtual/libgles1 = ""
+ PREFERRED_PROVIDER_virtual/libgles2 = "gles-user-module"
+ PREFERRED_PROVIDER_virtual/egl = "libegl"
+ PREFERRED_PROVIDER_virtual/libgl = ""
+ PREFERRED_PROVIDER_virtual/mesa = ""
+ PREFERRED_PROVIDER_libgbm = "libgbm"
+ PREFERRED_PROVIDER_libgbm-dev = "libgbm"
+
+ NOTE: The r8a7790 uses rgx, r8a7791, r8a7793 and r8a7794 uses sgx.
+ If you want to use rgx, please set to 'rgx' instead of 'sgx'.
+ For r8a7790, if you want to use OPENGLES3,
+ Please set following in local.conf (default is OPENGLES2)
+ OPENGLES3 = "1"
+ Step 2: Unmask the graphic recipes
+
+ #BBMASK .= "|gles-kernel-module|gles-user-module"
+
+ 3. Please run 'bitbake core-image-weston'
+
+ * For X11 with rgx/sgx
+ 1. Please copy proprietary libraries to the directory of recipes.
+ 2. Please set local.conf the following.
+ Step 1: Adding features and preferred providers:
+
+ MACHINE_FEATURES_append = " sgx"
+ MULTI_PROVIDER_WHITELIST += "virtual/libgl virtual/egl virtual/libgles1 virtual/libgles2"
+ PREFERRED_PROVIDER_virtual/libgles2 = "gles-user-module"
+ PREFERRED_PROVIDER_virtual/egl = "gles-user-module"
+ DISTRO_FEATURES_remove = "wayland"
+ BBMASK .= "|libegl|libgbm|wayland-kms"
+
+ NOTE: The r8a7790 uses rgx, r8a7791, r8a7793 and r8a7794 uses sgx.
+ If you want to use rgx, please set to 'rgx' instead of 'sgx'.
+ For r8a7790, if you want to use OPENGLES3,
+ Please set following in local.conf (default is OPENGLES2)
+ OPENGLES3 = "1"
+ Step 2: Unmask the graphic recipes
+
+ #BBMASK .= "|gles-kernel-module|gles-user-module"
+
+ 3. Please run 'bitbake core-image-x11'
+
+ B/ Build without GLES
+ * For X11 without rgx/sgx
+ 1. Please copy proprietary libraries to the directory of recipes.
+ 2. Please set local.conf the following.
+
+ DISTRO_FEATURES_remove = "wayland"
+ BBMASK .= "|libegl|libgbm|wayland-kms"
+
+ If you need to install multimedia packages.
+ Please check section of 'Build with Renesas multimedia libraries'.
+
+III/ Build with Renesas multimedia libraries
+============================================
+ A/ Configuration for Multimedia and DTV features
+ 1. Please copy proprietary libraries to the directory of recipes.
+ 2. Please set local.conf the following.
+
+ # For multimedia feature
+ This provides package group of plug-ins of the GStreamer, multimedia
+ libraries and kernel drivers.
+
+ MACHINE_FEATURES_append = " multimedia"
+
+ # For DTV feature
+ This provides package group of dtv libraries with packagegroup-rcar-gen2-multimedia.
+ Step 1 : Adding MACHINE_FEATURES
+
+ MACHINE_FEATURES_append = " dtv"
+
+ Step 2: Unmask dtv recipes
+
+ #BBMASK .= "|dtv-module|ssp-module|scu-module"
+
+ B/ Configuration for optional codecs and middleware
+ 1. Please copy proprietary libraries to the directory of recipes.
+ 2. Add features to DISTRO_FEATURES_append to local.conf
+ # Additional configuration in OMX module
+ " h263dec_lib" - for OMX Media Component H263 Decoder Library
+ " vc1dec_lib" - for OMX Media Component VC-1 Decoder Library
+ " mpeg4dec_lib" - for OMX Media Component MPEG-4 Decoder Library
+ " mpeg2dec_lib" - for VCP3 Driver Adapted for Linux MPEG-2 Decoder Library
+ " divxdec_lib" - for DivX Decoder Library for Linux
+ " h264avcenc_lib" - for Encoder Library for Linux
+
+ # Configuration for audio decoders
+ " aacp2dec_lib" - for ARM 5.1ch aacPlus V2 Decoder for Linux
+ " mp3dec_lib" - for ARM MP3 Decoder for Linux
+ " wmadec_lib" - for ARM WMA Decoder for Linux
+ " ddddec_lib" - for ARM 5.1ch Dolby Digital Decoder for Linux
+ " alacdec_lib" - for ARM ALAC Decoder for Linux
+ " flacdec_lib" - for ARM FLAC Decoder for Linux
+ " aacenc_lib" - for ARM AAC Encoder for Linux
+
+ # Configuration for audio middlewares
+ " armaccp2dec_mdw" - for ARM 5.1ch aacPlus V2 Decode Middleware for Linux
+ " mp3dec_mdw" - for ARM MP3 Decode Middleware for Linux
+ " wmadec_mdw" - for ARM WMA Decode Middleware for Linux
+ " ddddec_mdw" - for ARM 5.1ch Dolby Digital Decode Middleware for Linux
+ " alacdec_mdw" - for ARM ALAC Decode Middleware for Linux
+ " flacdec_mdw" - for ARM FLAC Decode Middleware for Linux
+ " aacenc_mdw" - for ARM AAC Encode Middleware for Linux
+ Ex:
+
+ DISTRO_FEATURES_append = " mp3dec_lib wmadec_lib mp3dec_mdw wmadec_mdw"
+
+ C/ Configuration for test packages
+ 1. Please copy proprietary libraries to the directory of recipes.
+ 2. Add features to DISTRO_FEATURES_append to local.conf
+
+ # Configuration for multimedia test package
+ Step 1 : Adding DISTRO_FEATURES
+
+ DISTRO_FEATURES_append = " mm-test"
+
+ Step 2: Unmask multimedia test recipes
+
+ #BBMASK .= "|${BB_MULTIMEDIA_TEST_MODULE}"
+
+ # Configuration for gles test package
+ Step 1 : Adding DISTRO_FEATURES
+
+ DISTRO_FEATURES_append = " gles-test"
+
+ Step 2: Unmask gles test recipes
+
+ #BBMASK .= "|gles-test-module"
diff --git a/meta-rcar-gen2/binary/.gitignore b/meta-rcar-gen2/binary/.gitignore
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/binary/.gitignore
diff --git a/meta-rcar-gen2/conf/layer.conf b/meta-rcar-gen2/conf/layer.conf
new file mode 100644
index 0000000..3a60113
--- /dev/null
+++ b/meta-rcar-gen2/conf/layer.conf
@@ -0,0 +1,10 @@
+# We have a conf and classes directory, add to BBPATH
+BBPATH .= ":${LAYERDIR}"
+
+# We have a recipes-* directories, add to BBFILES
+BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
+ ${LAYERDIR}/recipes-*/*/*.bbappend"
+
+BBFILE_COLLECTIONS += "rcar-gen2"
+BBFILE_PATTERN_rcar-gen2 = "^${LAYERDIR}/"
+BBFILE_PRIORITY_rcar-gen2 = "6"
diff --git a/meta-rcar-gen2/conf/machine/alt.conf b/meta-rcar-gen2/conf/machine/alt.conf
new file mode 100644
index 0000000..68ba918
--- /dev/null
+++ b/meta-rcar-gen2/conf/machine/alt.conf
@@ -0,0 +1,29 @@
+#@TYPE: Machine
+#@NAME: alt
+#@DESCRIPTION: Machine configuration for alt systems
+
+require conf/machine/include/r8a7794.inc
+require conf/machine/include/rcar-gen2-providers.inc
+
+MACHINE_EXTRA_RRECOMMENDS = " kernel-modules"
+
+IMAGE_FSTYPES += "tar.bz2"
+
+SERIAL_CONSOLE = "38400 ttySC10"
+
+KERNEL_DEVICETREE = "${S}/arch/arm/boot/dts/r8a7794-alt.dts"
+
+KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
+
+UBOOT_MACHINE = "alt_config"
+UBOOT_ENTRYPOINT = "0x40008000"
+UBOOT_LOADADDRESS = "0x40007fc0"
+
+PREFERRED_VERSION_linux-renesas = "3.10%"
+PREFERRED_VERSION_linux-libc-headers = "3.10%"
+PREFERRED_VERSION_nativesdk-linux-libc-headers = "3.10%"
+PREFERRED_VERSION_u-boot = "v2013.01%"
+PREFERRED_VERSION_libdrm = "2.4.45%"
+
+MACHINE_FEATURES = "apm usbgadget usbhost vfat alsa ethernet"
+
diff --git a/meta-rcar-gen2/conf/machine/gose.conf b/meta-rcar-gen2/conf/machine/gose.conf
new file mode 100644
index 0000000..16ca03f
--- /dev/null
+++ b/meta-rcar-gen2/conf/machine/gose.conf
@@ -0,0 +1,28 @@
+#@TYPE: Machine
+#@NAME: gose
+#@DESCRIPTION: Machine configuration for gose systems
+
+require conf/machine/include/r8a7793.inc
+require conf/machine/include/rcar-gen2-providers.inc
+
+MACHINE_EXTRA_RRECOMMENDS = " kernel-modules"
+
+IMAGE_FSTYPES += "tar.bz2"
+
+SERIAL_CONSOLE = "38400 ttySC6"
+
+KERNEL_DEVICETREE = "${S}/arch/arm/boot/dts/r8a7793-gose.dts"
+
+KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
+
+UBOOT_MACHINE = "gose_config"
+UBOOT_ENTRYPOINT = "0x40008000"
+UBOOT_LOADADDRESS = "0x40007fc0"
+
+PREFERRED_VERSION_linux-renesas = "3.10%"
+PREFERRED_VERSION_linux-libc-headers = "3.10%"
+PREFERRED_VERSION_nativesdk-linux-libc-headers = "3.10%"
+PREFERRED_VERSION_u-boot = "v2013.01%"
+PREFERRED_VERSION_libdrm = "2.4.45%"
+
+ACHINE_FEATURES = "apm usbgadget usbhost vfat alsa ethernet"
diff --git a/meta-rcar-gen2/conf/machine/include/r8a7790.inc b/meta-rcar-gen2/conf/machine/include/r8a7790.inc
new file mode 100644
index 0000000..f99d65d
--- /dev/null
+++ b/meta-rcar-gen2/conf/machine/include/r8a7790.inc
@@ -0,0 +1,12 @@
+SOC_FAMILY = "rcar-gen2:r8a7790"
+require conf/machine/include/soc-family.inc
+DEFAULTTUNE ?= "cortexa15hf-neon"
+require conf/machine/include/tune-cortexa15.inc
+
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-renesas"
+PREFERRED_PROVIDER_linux-libc-headers ?= "linux-libc-headers"
+PREFERRED_PROVIDER_nativesdk-linux-libc-headers ?= "nativesdk-linux-libc-headers"
+PREFERRED_PROVIDER_u-boot ?= "u-boot"
+
+KERNEL_IMAGETYPE ?= "uImage"
+EXTRA_IMAGEDEPENDS += "u-boot"
diff --git a/meta-rcar-gen2/conf/machine/include/r8a7791.inc b/meta-rcar-gen2/conf/machine/include/r8a7791.inc
new file mode 100644
index 0000000..d831024
--- /dev/null
+++ b/meta-rcar-gen2/conf/machine/include/r8a7791.inc
@@ -0,0 +1,12 @@
+SOC_FAMILY = "rcar-gen2:r8a7791"
+require conf/machine/include/soc-family.inc
+DEFAULTTUNE ?= "cortexa15hf-neon"
+require conf/machine/include/tune-cortexa15.inc
+
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-renesas"
+PREFERRED_PROVIDER_linux-libc-headers ?= "linux-libc-headers"
+PREFERRED_PROVIDER_nativesdk-linux-libc-headers ?= "nativesdk-linux-libc-headers"
+PREFERRED_PROVIDER_u-boot ?= "u-boot"
+
+KERNEL_IMAGETYPE ?= "uImage"
+EXTRA_IMAGEDEPENDS += "u-boot"
diff --git a/meta-rcar-gen2/conf/machine/include/r8a7793.inc b/meta-rcar-gen2/conf/machine/include/r8a7793.inc
new file mode 100644
index 0000000..04c34bb
--- /dev/null
+++ b/meta-rcar-gen2/conf/machine/include/r8a7793.inc
@@ -0,0 +1,12 @@
+SOC_FAMILY = "rcar-gen2:r8a7793"
+require conf/machine/include/soc-family.inc
+DEFAULTTUNE ?= "cortexa15hf-neon"
+require conf/machine/include/tune-cortexa15.inc
+
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-renesas"
+PREFERRED_PROVIDER_linux-libc-headers ?= "linux-libc-headers"
+PREFERRED_PROVIDER_nativesdk-linux-libc-headers ?= "nativesdk-linux-libc-headers"
+PREFERRED_PROVIDER_u-boot ?= "u-boot"
+
+KERNEL_IMAGETYPE ?= "uImage"
+EXTRA_IMAGEDEPENDS += "u-boot"
diff --git a/meta-rcar-gen2/conf/machine/include/r8a7794.inc b/meta-rcar-gen2/conf/machine/include/r8a7794.inc
new file mode 100644
index 0000000..1213953
--- /dev/null
+++ b/meta-rcar-gen2/conf/machine/include/r8a7794.inc
@@ -0,0 +1,12 @@
+SOC_FAMILY = "rcar-gen2:r8a7794"
+require conf/machine/include/soc-family.inc
+DEFAULTTUNE ?= "cortexa7hf-neon"
+require conf/machine/include/tune-cortexa7.inc
+
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-renesas"
+PREFERRED_PROVIDER_linux-libc-headers ?= "linux-libc-headers"
+PREFERRED_PROVIDER_nativesdk-linux-libc-headers ?= "nativesdk-linux-libc-headers"
+PREFERRED_PROVIDER_u-boot ?= "u-boot"
+
+KERNEL_IMAGETYPE ?= "uImage"
+EXTRA_IMAGEDEPENDS += "u-boot"
diff --git a/meta-rcar-gen2/conf/machine/include/rcar-gen2-providers.inc b/meta-rcar-gen2/conf/machine/include/rcar-gen2-providers.inc
new file mode 100644
index 0000000..9258ab4
--- /dev/null
+++ b/meta-rcar-gen2/conf/machine/include/rcar-gen2-providers.inc
@@ -0,0 +1,8 @@
+# Configure for using linaro toolchain
+PREFERRED_VERSION_gcc-cross = "linaro-4.8"
+PREFERRED_VERSION_gcc-cross-initial = "linaro-4.8"
+PREFERRED_VERSION_gcc-cross-intermediate = "linaro-4.8"
+PREFERRED_VERSION_gcc-crosssdk = "linaro-4.8"
+PREFERRED_VERSION_gcc-crosssdk-initial = "linaro-4.8"
+PREFERRED_VERSION_gcc-crosssdk-intermediate = "linaro-4.8"
+PREFERRED_VERSION_gcc-cross-canadian-${TRANSLATED_TARGET_ARCH} = "linaro-4.8"
diff --git a/meta-rcar-gen2/conf/machine/koelsch.conf b/meta-rcar-gen2/conf/machine/koelsch.conf
new file mode 100644
index 0000000..00431f2
--- /dev/null
+++ b/meta-rcar-gen2/conf/machine/koelsch.conf
@@ -0,0 +1,28 @@
+#@TYPE: Machine
+#@NAME: koelsch
+#@DESCRIPTION: Machine configuration for koelsch systems
+
+require conf/machine/include/r8a7791.inc
+require conf/machine/include/rcar-gen2-providers.inc
+
+MACHINE_EXTRA_RRECOMMENDS = " kernel-modules"
+
+IMAGE_FSTYPES += "tar.bz2"
+
+SERIAL_CONSOLE = "38400 ttySC6"
+
+KERNEL_DEVICETREE = "${S}/arch/arm/boot/dts/r8a7791-koelsch.dts"
+
+KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
+
+UBOOT_MACHINE = "koelsch_config"
+UBOOT_ENTRYPOINT = "0x40008000"
+UBOOT_LOADADDRESS = "0x40007fc0"
+
+PREFERRED_VERSION_linux-renesas = "3.10%"
+PREFERRED_VERSION_linux-libc-headers = "3.10%"
+PREFERRED_VERSION_nativesdk-linux-libc-headers = "3.10%"
+PREFERRED_VERSION_u-boot = "v2013.01%"
+PREFERRED_VERSION_libdrm = "2.4.45%"
+
+MACHINE_FEATURES = "apm usbgadget usbhost vfat alsa ethernet"
diff --git a/meta-rcar-gen2/conf/machine/lager.conf b/meta-rcar-gen2/conf/machine/lager.conf
new file mode 100644
index 0000000..fd83319
--- /dev/null
+++ b/meta-rcar-gen2/conf/machine/lager.conf
@@ -0,0 +1,28 @@
+#@TYPE: Machine
+#@NAME: lager
+#@DESCRIPTION: Machine configuration for lager systems
+
+require conf/machine/include/r8a7790.inc
+require conf/machine/include/rcar-gen2-providers.inc
+
+MACHINE_EXTRA_RRECOMMENDS = " kernel-modules"
+
+IMAGE_FSTYPES += "tar.bz2"
+
+SERIAL_CONSOLE = "38400 ttySC6"
+
+KERNEL_DEVICETREE = "${S}/arch/arm/boot/dts/r8a7790-lager.dts"
+
+KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
+
+UBOOT_MACHINE = "lager_config"
+UBOOT_ENTRYPOINT = "0x40008000"
+UBOOT_LOADADDRESS = "0x40007fc0"
+
+PREFERRED_VERSION_linux-renesas = "3.10%"
+PREFERRED_VERSION_linux-libc-headers = "3.10%"
+PREFERRED_VERSION_nativesdk-linux-libc-headers = "3.10%"
+PREFERRED_VERSION_u-boot = "v2013.01%"
+PREFERRED_VERSION_libdrm = "2.4.45%"
+
+MACHINE_FEATURES = "apm usbgadget usbhost vfat alsa ethernet"
diff --git a/meta-rcar-gen2/conf/machine/porter.conf b/meta-rcar-gen2/conf/machine/porter.conf
new file mode 100644
index 0000000..ed4ed95
--- /dev/null
+++ b/meta-rcar-gen2/conf/machine/porter.conf
@@ -0,0 +1,28 @@
+#@TYPE: Machine
+#@NAME: porter
+#@DESCRIPTION: Machine configuration for porter systems
+
+require conf/machine/include/r8a7791.inc
+require conf/machine/include/rcar-gen2-providers.inc
+
+MACHINE_EXTRA_RRECOMMENDS = " kernel-modules"
+
+IMAGE_FSTYPES += "tar.bz2"
+
+SERIAL_CONSOLE = "38400 ttySC6"
+
+KERNEL_DEVICETREE = "${S}/arch/arm/boot/dts/r8a7791-porter.dts"
+
+KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
+
+UBOOT_MACHINE = "porter_config"
+UBOOT_ENTRYPOINT = "0x40008000"
+UBOOT_LOADADDRESS = "0x40007fc0"
+
+PREFERRED_VERSION_linux-renesas = "3.10%"
+PREFERRED_VERSION_linux-libc-headers = "3.10%"
+PREFERRED_VERSION_nativesdk-linux-libc-headers = "3.10%"
+PREFERRED_VERSION_u-boot = "v2013.01%"
+PREFERRED_VERSION_libdrm = "2.4.45%"
+
+MACHINE_FEATURES = "apm usbgadget usbhost vfat alsa ethernet"
diff --git a/meta-rcar-gen2/conf/machine/silk.conf b/meta-rcar-gen2/conf/machine/silk.conf
new file mode 100644
index 0000000..1499f74
--- /dev/null
+++ b/meta-rcar-gen2/conf/machine/silk.conf
@@ -0,0 +1,28 @@
+#@TYPE: Machine
+#@NAME: silk
+#@DESCRIPTION: Machine configuration for silk systems
+
+require conf/machine/include/r8a7794.inc
+require conf/machine/include/rcar-gen2-providers.inc
+
+MACHINE_EXTRA_RRECOMMENDS = " kernel-modules"
+
+IMAGE_FSTYPES += "tar.bz2"
+
+SERIAL_CONSOLE = "38400 ttySC10"
+
+KERNEL_DEVICETREE = "${S}/arch/arm/boot/dts/r8a7794-silk.dts"
+
+KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
+
+UBOOT_MACHINE = "silk_config"
+UBOOT_ENTRYPOINT = "0x40008000"
+UBOOT_LOADADDRESS = "0x40007fc0"
+
+PREFERRED_VERSION_linux-renesas = "3.10%"
+PREFERRED_VERSION_linux-libc-headers = "3.10%"
+PREFERRED_VERSION_nativesdk-linux-libc-headers = "3.10%"
+PREFERRED_VERSION_u-boot = "v2013.01%"
+PREFERRED_VERSION_libdrm = "2.4.45%"
+
+MACHINE_FEATURES = "apm usbgadget usbhost vfat alsa ethernet"
diff --git a/meta-rcar-gen2/include/gles-control.inc b/meta-rcar-gen2/include/gles-control.inc
new file mode 100644
index 0000000..8b21985
--- /dev/null
+++ b/meta-rcar-gen2/include/gles-control.inc
@@ -0,0 +1,6 @@
+USE_GLES = "${@'1' if 'rgx' in '${MACHINE_FEATURES}' or 'sgx' in '${MACHINE_FEATURES}' else '0'}"
+USE_WAYLAND = "${@'1' if 'wayland' in '${DISTRO_FEATURES}' else '0'}"
+USE_GLES_WAYLAND = "${@'1' if '${USE_GLES}' == '1' and '${USE_WAYLAND}' == '1' else '0'}"
+USE_X11 = "${@'1' if 'x11' in '${DISTRO_FEATURES}' else '0'}"
+USE_GLES_X11 = "${@'1' if '1' in '${USE_GLES}' and '${USE_X11}' == '1' and '${USE_WAYLAND}' == '0' else '0'}"
+USE_GLES_TEST = "${@'1' if '${USE_GLES}' == '1' and 'gles-test' in '${DISTRO_FEATURES}' else '0'}"
diff --git a/meta-rcar-gen2/include/multimedia-control.inc b/meta-rcar-gen2/include/multimedia-control.inc
new file mode 100644
index 0000000..3a535ba
--- /dev/null
+++ b/meta-rcar-gen2/include/multimedia-control.inc
@@ -0,0 +1,3 @@
+USE_DTV = "${@'1' if 'dtv' in '${MACHINE_FEATURES}' else '0'}"
+USE_MULTIMEDIA = "${@'1' if 'multimedia' in '${MACHINE_FEATURES}' or '${USE_DTV}' == '1' else '0'}"
+USE_MULTIMEDIA_TEST = "${@'1' if 'mm-test' in '${DISTRO_FEATURES}' and '${USE_MULTIMEDIA}' == '1' else '0'}"
diff --git a/meta-rcar-gen2/include/omx-components-control.inc b/meta-rcar-gen2/include/omx-components-control.inc
new file mode 100644
index 0000000..7848262
--- /dev/null
+++ b/meta-rcar-gen2/include/omx-components-control.inc
@@ -0,0 +1,78 @@
+## Additional configuration in OMX module, include
+# USE_H263_DECODER for OMX Media Component H263 Decoder Library, default is DISABLE (0)
+# USE_VC1_DECODER for OMX Media Component VC-1 Decoder Library, default is DISABLE (0)
+# USE_MPEG4_DECODER for OMX Media Component MPEG-4 Decoder Library, default is DISABLE (0)
+# USE_MPEG2_DECODER for VCP3 Driver Adapted for Linux MPEG-2 Decoder Library, default is DISABLE (0)
+# USE_DIVX_DECODER for DivX Decoder Library for Linux, default is DISABLE (0)
+USE_H263_DECODER = "${@'1' if 'h263dec_lib' in '${DISTRO_FEATURES}' else '0'}"
+USE_VC1_DECODER = "${@'1' if 'vc1dec_lib' in '${DISTRO_FEATURES}' else '0'}"
+USE_MPEG2_DECODER = "${@'1' if 'mpeg2dec_lib' in '${DISTRO_FEATURES}' else '0'}"
+USE_MPEG4_DECODER = "${@'1' if 'mpeg4dec_lib' in '${DISTRO_FEATURES}' else '0'}"
+USE_DIVX_DECODER = "${@'1' if 'divxdec_lib' in '${DISTRO_FEATURES}' else '0'}"
+
+## Config to build H264AVC encoder
+USE_H264AVC_ENCODER = "${@'1' if 'h264avcenc_lib' in '${DISTRO_FEATURES}' else '0'}"
+
+## Config for audio decoders
+#USE_AACP2_DECODER for ARM 5.1ch aacPlus V2 Decoder for Linux
+#USE_MP3_DECODER for ARM MP3 Decoder for Linux
+#USE_WMA_DECODER for ARM WMA Decoder for Linux
+#USE_DDD_DECODER for ARM 5.1ch Dolby Digital Decoder for Linux
+#USE_ALAC_DECODER for ARM ALAC Decoder for Linux
+#USE_FLAC_DECODER for ARM FLAC Decoder for Linux
+USE_AACP2_DECODER = "${@'1' if 'aacp2dec_lib' in '${DISTRO_FEATURES}' else '0'}"
+USE_MP3_DECODER = "${@'1' if 'mp3dec_lib' in '${DISTRO_FEATURES}' else '0'}"
+USE_WMA_DECODER = "${@'1' if 'wmadec_lib' in '${DISTRO_FEATURES}' else '0'}"
+USE_DDD_DECODER = "${@'1' if 'ddddec_lib' in '${DISTRO_FEATURES}' else '0'}"
+USE_ALAC_DECODER = "${@'1' if 'alacdec_lib' in '${DISTRO_FEATURES}' else '0'}"
+USE_FLAC_DECODER = "${@'1' if 'flacdec_lib' in '${DISTRO_FEATURES}' else '0'}"
+
+## Config for audio encoders
+# USE_AAC_ENCODER for ARM AAC Encoder for Linux
+USE_AAC_ENCODER = "${@'1' if 'aacenc_lib' in '${DISTRO_FEATURES}' else '0'}"
+
+# Config for audio middlewares
+# USE_ARMAACP2_MDW_DECODER for ARM 5.1ch aacPlus V2 Decode Middleware for Linux
+# USE_MP3_MDW_DECODER for ARM MP3 Decode Middleware for Linux
+# USE_WMA_MDW_DECODER for ARM WMA Decode Middleware for Linux
+# USE_DDD_MDW_DECODER for ARM 5.1ch Dolby Digital Decode Middleware for Linux
+# USE_ALAC_MDW_DECODER for ARM ALAC Decode Middleware for Linux
+# USE_FLAC_MDW_DECODER for ARM FLAC Decode Middleware for Linux
+USE_ARMAACP2_MDW_DECODER = "${@'1' if 'armaccp2dec_mdw' in '${DISTRO_FEATURES}' else '0'}"
+USE_MP3_MDW_DECODER = "${@'1' if 'mp3dec_mdw' in '${DISTRO_FEATURES}' else '0'}"
+USE_WMA_MDW_DECODER = "${@'1' if 'wmadec_mdw' in '${DISTRO_FEATURES}' else '0'}"
+USE_DDD_MDW_DECODER = "${@'1' if 'ddddec_mdw' in '${DISTRO_FEATURES}' else '0'}"
+USE_ALAC_MDW_DECODER = "${@'1' if 'alacdec_mdw' in '${DISTRO_FEATURES}' else '0'}"
+USE_FLAC_MDW_DECODER = "${@'1' if 'flacdec_mdw' in '${DISTRO_FEATURES}' else '0'}"
+##
+# USE_AAC_MDW_ENCODER for ARM AAC Encode Middleware for Linux
+USE_AAC_MDW_ENCODER = "${@'1' if 'aacenc_mdw' in '${DISTRO_FEATURES}' else '0'}"
+
+#############################################################
+##### Below part is auto dependent functions,
+##### user don't touch below part
+#############################################################
+# Config for audio common omx
+AUDIO_DECODER_ARRAY = "${USE_AACP2_DECODER}"
+AUDIO_DECODER_ARRAY += "${USE_MP3_DECODER}"
+AUDIO_DECODER_ARRAY += "${USE_WMA_DECODER}"
+AUDIO_DECODER_ARRAY += "${USE_DDD_DECODER}"
+AUDIO_DECODER_ARRAY += "${USE_ALAC_DECODER}"
+AUDIO_DECODER_ARRAY += "${USE_FLAC_DECODER}"
+AUDIO_ENCODER_ARRAY = "${USE_AAC_ENCODER}"
+USE_AUDIO_COMMON = "${@'1' if '1' in '${AUDIO_ENCODER_ARRAY}' or '1' in '${AUDIO_DECODER_ARRAY}' else '0' }"
+
+# Auto config for video common encoder. It will enable when there is at least 1 encoder is enabled.
+# Please add new encoder config into list when have new encoder (e.g. as RESERVE_ENCODER_CONF)
+VIDEO_ENCODER_ARRAY = "${USE_H264AVC_ENCODER}"
+#VIDEO_ENCODER_ARRAY += "${RESERVE_ENCODER_CONF}"
+USE_VIDEO_COMMON_ENCODER = '${@base_contains("VIDEO_ENCODER_ARRAY", "1", "1", "0", d)}'
+
+# Audio codec config
+ARMAACP2_MDW_DECODER = '${@base_conditional("USE_AACP2_DECODER", "1", "1", "${USE_ARMAACP2_MDW_DECODER}", d)}'
+MP3_MDW_DECODER = '${@base_conditional("USE_MP3_DECODER", "1", "1", "${USE_MP3_MDW_DECODER}", d)}'
+WMA_MDW_DECODER = '${@base_conditional("USE_WMA_DECODER", "1", "1", "${USE_WMA_MDW_DECODER}", d)}'
+DDD_MDW_DECODER = '${@base_conditional("USE_DDD_DECODER", "1", "1", "${USE_DDD_MDW_DECODER}", d)}'
+ALAC_MDW_DECODER = '${@base_conditional("USE_ALAC_DECODER", "1", "1", "${USE_ALAC_MDW_DECODER}", d)}'
+FLAC_MDW_DECODER = '${@base_conditional("USE_FLAC_DECODER", "1", "1", "${USE_FLAC_MDW_DECODER}", d)}'
+AAC_MDW_ENCODER = '${@base_conditional("USE_AAC_ENCODER", "1", "1", "${USE_AAC_MDW_ENCODER}", d)}'
diff --git a/meta-rcar-gen2/include/rcar-gen2-modules-common.inc b/meta-rcar-gen2/include/rcar-gen2-modules-common.inc
new file mode 100644
index 0000000..4a3658a
--- /dev/null
+++ b/meta-rcar-gen2/include/rcar-gen2-modules-common.inc
@@ -0,0 +1,9 @@
+export BUILDDIR = "${STAGING_INCDIR}/.."
+export LIBSHARED = "${STAGING_LIBDIR}"
+export KERNELSRC = "${STAGING_KERNEL_DIR}"
+export CROSS_COMPILE = "${TARGET_PREFIX}"
+export KERNELDIR = "${STAGING_KERNEL_DIR}"
+export LDFLAGS = ""
+export CP = "cp"
+
+inherit module
diff --git a/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/alt/machconfig b/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/alt/machconfig
new file mode 100644
index 0000000..54a7eab
--- /dev/null
+++ b/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/alt/machconfig
@@ -0,0 +1,3 @@
+# Assume a USB mouse and keyboard are connected
+HAVE_TOUCHSCREEN=n
+HAVE_KEYBOARD=n
diff --git a/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/gose/machconfig b/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/gose/machconfig
new file mode 100644
index 0000000..54a7eab
--- /dev/null
+++ b/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/gose/machconfig
@@ -0,0 +1,3 @@
+# Assume a USB mouse and keyboard are connected
+HAVE_TOUCHSCREEN=n
+HAVE_KEYBOARD=n
diff --git a/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/koelsch/machconfig b/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/koelsch/machconfig
new file mode 100644
index 0000000..54a7eab
--- /dev/null
+++ b/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/koelsch/machconfig
@@ -0,0 +1,3 @@
+# Assume a USB mouse and keyboard are connected
+HAVE_TOUCHSCREEN=n
+HAVE_KEYBOARD=n
diff --git a/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/lager/machconfig b/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/lager/machconfig
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-bsp/formfactor/formfactor/lager/machconfig
diff --git a/meta-rcar-gen2/recipes-bsp/formfactor/formfactor_0.0.bbappend b/meta-rcar-gen2/recipes-bsp/formfactor/formfactor_0.0.bbappend
new file mode 100644
index 0000000..72d991c
--- /dev/null
+++ b/meta-rcar-gen2/recipes-bsp/formfactor/formfactor_0.0.bbappend
@@ -0,0 +1 @@
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
diff --git a/meta-rcar-gen2/recipes-bsp/u-boot/u-boot.inc b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot.inc
new file mode 100644
index 0000000..d31c3fd
--- /dev/null
+++ b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot.inc
@@ -0,0 +1,99 @@
+DESCRIPTION = "U-Boot - the Universal Boot Loader"
+HOMEPAGE = "http://www.denx.de/wiki/U-Boot/WebHome"
+SECTION = "bootloaders"
+PROVIDES = "virtual/bootloader"
+
+inherit deploy
+
+EXTRA_OEMAKE = 'CROSS_COMPILE=${TARGET_PREFIX} CC="${TARGET_PREFIX}gcc ${TOOLCHAIN_OPTIONS}"'
+
+python () {
+ if not d.getVar("UBOOT_MACHINE", True):
+ PN = d.getVar("PN", True)
+ FILE = os.path.basename(d.getVar("FILE", True))
+ bb.debug(1, "To build %s, see %s for instructions on \
+ setting up your machine config" % (PN, FILE))
+ raise bb.parse.SkipPackage("UBOOT_MACHINE is not set in the %s machine configuration." % d.getVar("MACHINE", True))
+}
+
+# Some versions of u-boot use .bin and others use .img. By default use .bin
+# but enable individual recipes to change this value.
+UBOOT_SUFFIX ?= "bin"
+UBOOT_IMAGE ?= "u-boot-${MACHINE}-${PV}-${PR}.${UBOOT_SUFFIX}"
+UBOOT_BINARY ?= "u-boot.${UBOOT_SUFFIX}"
+UBOOT_SYMLINK ?= "u-boot-${MACHINE}.${UBOOT_SUFFIX}"
+UBOOT_MAKE_TARGET ?= "all"
+
+# MiniMonitor requires u-boot.srec
+UBOOT_SREC ?= "u-boot.srec"
+UBOOT_SREC_SYMLINK ?= "u-boot-${MACHINE}.srec"
+UBOOT_SREC_IMAGE ?= "u-boot-${MACHINE}-${PV}-${PR}.srec"
+
+# Some versions of u-boot build an SPL (Second Program Loader) image that
+# should be packaged along with the u-boot binary as well as placed in the
+# deploy directory. For those versions they can set the following variables
+# to allow packaging the SPL.
+SPL_BINARY ?= ""
+SPL_IMAGE ?= "${SPL_BINARY}-${MACHINE}-${PV}-${PR}"
+SPL_SYMLINK ?= "${SPL_BINARY}-${MACHINE}"
+
+do_compile () {
+ if [ "${@base_contains('DISTRO_FEATURES', 'ld-is-gold', 'ld-is-gold', '', d)}" = "ld-is-gold" ] ; then
+ sed -i 's/$(CROSS_COMPILE)ld$/$(CROSS_COMPILE)ld.bfd/g' config.mk
+ fi
+
+ unset LDFLAGS
+ unset CFLAGS
+ unset CPPFLAGS
+ oe_runmake ${UBOOT_MACHINE}
+ oe_runmake ${UBOOT_MAKE_TARGET}
+}
+
+do_install () {
+ install -d ${D}/boot
+ install ${S}/${UBOOT_BINARY} ${D}/boot/${UBOOT_IMAGE}
+ ln -sf ${UBOOT_IMAGE} ${D}/boot/${UBOOT_BINARY}
+
+ if [ -e ${WORKDIR}/fw_env.config ] ; then
+ install -d ${D}${sysconfdir}
+ install -m 644 ${WORKDIR}/fw_env.config ${D}${sysconfdir}/fw_env.config
+ fi
+
+ if [ "x${SPL_BINARY}" != "x" ]
+ then
+ install ${S}/${SPL_BINARY} ${D}/boot/${SPL_IMAGE}
+ ln -sf ${SPL_IMAGE} ${D}/boot/${SPL_BINARY}
+ fi
+}
+
+FILES_${PN} = "/boot ${sysconfdir}"
+FILESPATH =. "${FILE_DIRNAME}/u-boot-git/${MACHINE}:"
+
+do_deploy () {
+ install -d ${DEPLOYDIR}
+ install ${S}/${UBOOT_BINARY} ${DEPLOYDIR}/${UBOOT_IMAGE}
+
+ cd ${DEPLOYDIR}
+ rm -f ${UBOOT_BINARY} ${UBOOT_SYMLINK}
+ ln -sf ${UBOOT_IMAGE} ${UBOOT_SYMLINK}
+ ln -sf ${UBOOT_IMAGE} ${UBOOT_BINARY}
+
+ if [ "x${SPL_BINARY}" != "x" ]
+ then
+ install ${S}/${SPL_BINARY} ${DEPLOYDIR}/${SPL_IMAGE}
+ rm -f ${DEPLOYDIR}/${SPL_BINARY} ${DEPLOYDIR}/${SPL_SYMLINK}
+ ln -sf ${SPL_IMAGE} ${DEPLOYDIR}/${SPL_BINARY}
+ ln -sf ${SPL_IMAGE} ${DEPLOYDIR}/${SPL_SYMLINK}
+ fi
+}
+
+do_deploy_append() {
+ install ${S}/${UBOOT_SREC} ${DEPLOYDIR}/${UBOOT_SREC_IMAGE}
+
+ cd ${DEPLOYDIR}
+ rm -f ${UBOOT_SREC} ${UBOOT_SREC_SYMLINK}
+ ln -sf ${UBOOT_SREC_IMAGE} ${UBOOT_SREC}
+ ln -sf ${UBOOT_SREC_IMAGE} ${UBOOT_SREC_SYMLINK}
+}
+
+addtask deploy before do_build after do_compile
diff --git a/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0001-uboot-Silk-board-support.patch b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0001-uboot-Silk-board-support.patch
new file mode 100644
index 0000000..e103ae4
--- /dev/null
+++ b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0001-uboot-Silk-board-support.patch
@@ -0,0 +1,1708 @@
+From ffb9865c74afe9fc5877aa4a44ea8bc8540abb2a Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Sat, 20 Dec 2014 03:23:16 +0300
+Subject: [U-boot][PATCH] arm: rmobile: Add SILK board support
+
+SILK is an entry level development board based on R-Car E2 SoC (R8A7794)
+
+This commit supports the following peripherals:
+- SCIF, I2C, Ethernet, QSPI, MMC/SDHI, USB Host
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+
+---
+ board/renesas/silk/Makefile | 48 +
+ board/renesas/silk/lowlevel_init.S | 36 +
+ board/renesas/silk/qos.c | 956 +++++++++++++++++++++++++++++++++++++
+ board/renesas/silk/silk.c | 301 +++++++++++
+ board/renesas/silk/silk.h | 28 +
+ boards.cfg | 2
+ drivers/mmc/sh_sdhi.c | 4
+ drivers/usb/host/ehci-r8a779x.c | 2
+ include/configs/silk.h | 214 ++++++++
+ 9 files changed, 1589 insertions(+), 2 deletions(-)
+ create mode 100644 board/renesas/silk/Makefile
+ create mode 100644 board/renesas/silk/lowlevel_init.S
+ create mode 100644 board/renesas/silk/qos.c
+ create mode 100644 board/renesas/silk/silk.c
+ create mode 100644 board/renesas/silk/silk.h
+ create mode 100644 include/configs/silk.h
+
+Index: u-boot-sh.3/board/renesas/silk/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-sh.3/board/renesas/silk/Makefile 2014-12-20 20:10:58.050016236 +0300
+@@ -0,0 +1,48 @@
++#
++# board/renesas/silk/Makefile
++#
++# Copyright (C) 2014 Renesas Electronics Corporation
++# Copyright (C) 2014 Cogent Embedded, Inc.
++#
++# This program is free software; you can redistribute it and/or modify
++# it under the terms of the GNU General Public License version 2
++# as published by the Free Software Foundation.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software Foundation,
++# Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++#
++
++include $(TOPDIR)/config.mk
++
++LIB = $(obj)lib$(BOARD).o
++
++COBJS := silk.o qos.o
++SOBJS := lowlevel_init.o
++
++SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
++OBJS := $(addprefix $(obj),$(COBJS))
++SOBJS := $(addprefix $(obj),$(SOBJS))
++
++$(LIB): $(obj).depend $(OBJS) $(SOBJS)
++ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
++
++clean:
++ rm -f $(SOBJS) $(OBJS)
++
++distclean: clean
++ rm -f $(LIB) core *.bak $(obj).depend
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+Index: u-boot-sh.3/board/renesas/silk/lowlevel_init.S
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-sh.3/board/renesas/silk/lowlevel_init.S 2014-12-20 20:07:03.402016607 +0300
+@@ -0,0 +1,36 @@
++/*
++ * board/renesas/silk/lowlevel_init.S
++ * This file is silk low level initialize.
++ *
++ * Copyright (C) 2014 Renesas Electronics Corporation
++ * Copyright (C) 2014 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++#include <config.h>
++#include <linux/linkage.h>
++
++ENTRY(lowlevel_init)
++ ldr r3, =(CONFIG_SYS_INIT_SP_ADDR)
++ sub sp, r3, #4
++ str lr, [sp]
++
++ bl s_init
++
++ ldr lr, [sp]
++ mov pc, lr
++ nop
++ENDPROC(lowlevel_init)
++ .ltorg
+Index: u-boot-sh.3/board/renesas/silk/qos.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-sh.3/board/renesas/silk/qos.c 2014-12-20 02:24:12.546490964 +0300
+@@ -0,0 +1,956 @@
++/*
++ * board/renesas/silk/qos.c
++ * This file is silk QoS setting.
++ *
++ * Copyright (C) 2014 Renesas Electronics Corporation
++ * Copyright (C) 2014 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++#include <common.h>
++#include <asm/processor.h>
++#include <asm/mach-types.h>
++#include <asm/io.h>
++#include <asm/arch/rmobile.h>
++
++/* QoS version 0.11 */
++
++enum {
++ DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
++ DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
++ DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
++ DBSC3_15,
++ DBSC3_NR,
++};
++
++static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
++ [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
++ [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
++ [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
++ [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
++ [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
++ [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
++ [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
++ [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
++ [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
++ [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
++ [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
++ [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
++ [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
++ [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
++ [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
++ [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
++};
++
++static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
++ [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
++ [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
++ [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
++ [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
++ [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
++ [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
++ [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
++ [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
++ [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
++ [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
++ [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
++ [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
++ [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
++ [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
++ [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
++ [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
++};
++
++void qos_init(void)
++{
++ int i;
++ struct r8a7794_s3c *s3c;
++ struct r8a7794_s3c_qos *s3c_qos;
++ struct r8a7794_dbsc3_qos *qos_addr;
++ struct r8a7794_mxi *mxi;
++ struct r8a7794_mxi_qos *mxi_qos;
++ struct r8a7794_axi_qos *axi_qos;
++
++ /* DBSC DBADJ2 */
++ writel(0x20042004, DBSC3_0_DBADJ2);
++
++ /* S3C -QoS */
++ s3c = (struct r8a7794_s3c *)S3C_BASE;
++ writel(0x1F0D0B0A, &s3c->s3crorr);
++ writel(0x1F0D0B09, &s3c->s3cworr);
++
++ /* QoS Control Registers */
++ s3c_qos = (struct r8a7794_s3c_qos *)S3C_QOS_CCI0_BASE;
++ writel(0x00890089, &s3c_qos->s3cqos0);
++ writel(0x20960010, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++ writel(0x20AA2200, &s3c_qos->s3cqos3);
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960010, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++ writel(0x20AA2200, &s3c_qos->s3cqos7);
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ s3c_qos = (struct r8a7794_s3c_qos *)S3C_QOS_CCI1_BASE;
++ writel(0x00890089, &s3c_qos->s3cqos0);
++ writel(0x20960010, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++ writel(0x20AA2200, &s3c_qos->s3cqos3);
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960010, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++ writel(0x20AA2200, &s3c_qos->s3cqos7);
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ s3c_qos = (struct r8a7794_s3c_qos *)S3C_QOS_MXI_BASE;
++ writel(0x80928092, &s3c_qos->s3cqos0);
++ writel(0x20960020, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++ writel(0x20AA20DC, &s3c_qos->s3cqos3);
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960020, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++ writel(0x20AA20DC, &s3c_qos->s3cqos7);
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ s3c_qos = (struct r8a7794_s3c_qos *)S3C_QOS_AXI_BASE;
++ writel(0x00820082, &s3c_qos->s3cqos0);
++ writel(0x20960020, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++ writel(0x20AA20FA, &s3c_qos->s3cqos3);
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960020, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++ writel(0x20AA20FA, &s3c_qos->s3cqos7);
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ /* DBSC -QoS */
++ /* DBSC0 - Read */
++ for (i = DBSC3_00; i < DBSC3_NR; i++) {
++ qos_addr = (struct r8a7794_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
++ writel(0x00000002, &qos_addr->dblgcnt);
++ writel(0x0000207D, &qos_addr->dbtmval0);
++ writel(0x00002053, &qos_addr->dbtmval1);
++ writel(0x0000202A, &qos_addr->dbtmval2);
++ writel(0x00001FBD, &qos_addr->dbtmval3);
++ writel(0x00000001, &qos_addr->dbrqctr);
++ writel(0x00002064, &qos_addr->dbthres0);
++ writel(0x0000203E, &qos_addr->dbthres1);
++ writel(0x00002019, &qos_addr->dbthres2);
++ writel(0x00000001, &qos_addr->dblgqon);
++ }
++
++ /* DBSC0 - Write */
++ for (i = DBSC3_00; i < DBSC3_NR; i++) {
++ qos_addr = (struct r8a7794_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
++ writel(0x00000002, &qos_addr->dblgcnt);
++ writel(0x0000207D, &qos_addr->dbtmval0);
++ writel(0x00002053, &qos_addr->dbtmval1);
++ writel(0x00002043, &qos_addr->dbtmval2);
++ writel(0x00002030, &qos_addr->dbtmval3);
++ writel(0x00000001, &qos_addr->dbrqctr);
++ writel(0x00002064, &qos_addr->dbthres0);
++ writel(0x0000203E, &qos_addr->dbthres1);
++ writel(0x00002031, &qos_addr->dbthres2);
++ writel(0x00000001, &qos_addr->dblgqon);
++ }
++
++ /* CCI-400 -QoS */
++ writel(0x20000800, CCI_400_MAXOT_1);
++ writel(0x20000800, CCI_400_MAXOT_2);
++ writel(0x0000000C, CCI_400_QOSCNTL_1);
++ writel(0x0000000C, CCI_400_QOSCNTL_2);
++
++ /* MXI -QoS */
++ /* Transaction Control (MXI) */
++ mxi = (struct r8a7794_mxi *)MXI_BASE;
++ writel(0x00000013, &mxi->mxrtcr);
++ writel(0x00000013, &mxi->mxwtcr);
++ writel(0x00780080, &mxi->mxsaar0);
++ writel(0x02000800, &mxi->mxsaar1);
++
++ /* QoS Control (MXI) */
++ mxi_qos = (struct r8a7794_mxi_qos *)MXI_QOS_BASE;
++ writel(0x0000000C, &mxi_qos->vspdu0);
++ writel(0x0000000E, &mxi_qos->du0);
++
++ /* AXI -QoS */
++ /* Transaction Control (MXI) */
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_SYX64TO128_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_AVB_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_IMUX0_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_IMUX1_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_IMUX2_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_LBS_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_MMUDS_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_MMUM_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_MMUS0_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_MMUS1_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_RTX_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_SDS0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_SDS1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_USB20_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_USB22_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_AX2M_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_CC50_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002029, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_CCI_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_CS_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_DDM_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_ETH_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_MPXM_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_SDM0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_SDM1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_TRKF_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_UDM0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI_UDM1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (RT-AXI) */
++ axi_qos = (struct r8a7794_axi_qos *)RT_AXI_SHX_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)RT_AXI_DBG_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)RT_AXI_RTX64TO128_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)RT_AXI_SY2RT_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (MP-AXI) */
++ axi_qos = (struct r8a7794_axi_qos *)MP_AXI_ADSP_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002037, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MP_AXI_ASDS0_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002014, &axi_qos->qosctset0);
++ writel(0x00000040, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MP_AXI_ASDS1_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002014, &axi_qos->qosctset0);
++ writel(0x00000040, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MP_AXI_MLP_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00001FF0, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00002001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MP_AXI_MMUMP_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MP_AXI_SPU_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MP_AXI_SPUC_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000206E, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (SYS-AXI256) */
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020EB, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI256_SYX_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020EB, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI256_MPX_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020EB, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)SYS_AXI256_MXI_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020EB, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (CCI-AXI) */
++ axi_qos = (struct r8a7794_axi_qos *)CCI_AXI_MMUS0_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)CCI_AXI_SYX2_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)CCI_AXI_MMUR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)CCI_AXI_MMUDS_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)CCI_AXI_MMUM_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)CCI_AXI_MXI_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)CCI_AXI_MMUS1_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)CCI_AXI_MMUMP_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (Media-AXI) */
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_MXR_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020DC, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x000020AA, &axi_qos->qosthres0);
++ writel(0x00002032, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_MXW_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020DC, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x000020AA, &axi_qos->qosthres0);
++ writel(0x00002032, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_TDMR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_TDMW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VIN0W_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00001FF0, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00002001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_FDP0R_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_FDP0W_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_IMSR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_IMSW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VSP1R_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VSP1W_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_IMRR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_IMRW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
++ writel(0x00000003, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
++ writel(0x00000003, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_DU0R_BASE;
++ writel(0x00000003, &axi_qos->qosconf);
++ writel(0x00002063, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_DU0W_BASE;
++ writel(0x00000003, &axi_qos->qosconf);
++ writel(0x00002063, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7794_axi_qos *)MEDIA_AXI_VPC0R_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++}
+Index: u-boot-sh.3/board/renesas/silk/silk.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-sh.3/board/renesas/silk/silk.c 2014-12-20 20:10:29.802016281 +0300
+@@ -0,0 +1,318 @@
++/*
++ * board/renesas/silk/silk.c
++ * This file is silk board support.
++ *
++ * Copyright (C) 2014 Renesas Electronics Corporation
++ * Copyright (C) 2014 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++#include <common.h>
++#include <malloc.h>
++#include <asm/processor.h>
++#include <asm/mach-types.h>
++#include <asm/io.h>
++#include <asm/errno.h>
++#include <asm/arch/sys_proto.h>
++#include <asm/gpio.h>
++#include <asm/arch/rmobile.h>
++#include <netdev.h>
++#include <i2c.h>
++#include "silk.h"
++
++DECLARE_GLOBAL_DATA_PTR;
++
++void s_init(void)
++{
++ struct r8a7794_rwdt *rwdt = (struct r8a7794_rwdt *)RWDT_BASE;
++ struct r8a7794_swdt *swdt = (struct r8a7794_swdt *)SWDT_BASE;
++
++ /* Watchdog init */
++ writel(0xA5A5A500, &rwdt->rwtcsra);
++ writel(0xA5A5A500, &swdt->swtcsra);
++
++#if !defined(CONFIG_EXTRAM_BOOT)
++ /* QoS */
++ qos_init();
++#endif
++
++#ifndef CONFIG_DCACHE_OFF
++ /*
++ * The caches are disabled when ACTLR.SMP is set to 0
++ * regardless of the value of the SCTLR.C (cache enable bit)
++ * on Cortex-A7 MPCore
++ */
++ asm volatile(
++ "mrc 15, 0, r0, c1, c0, 1\n" /* read ACTLR */
++ "orr r0, r0, #(1 << 6)\n" /* set SMP */
++ "mcr p15, 0, r0, c1, c0, 1\n"); /* write ACTLR */
++#endif
++}
++
++#define TMU0_MSTP125 (1 << 25)
++
++#define IIC1_MSTP323 (1 << 23)
++#define MMC0_MSTP315 (1 << 15)
++#define SDHI1_MSTP312 (1 << 12)
++
++#define SCIF2_MSTP719 (1 << 19)
++
++#define ETHER_MSTP813 (1 << 13)
++
++#define SD1CKCR 0xE6150078
++#define SD1_97500KHZ 0x7
++
++int board_early_init_f(void)
++{
++ u32 val;
++
++ /* TMU0 */
++ val = readl(MSTPSR1);
++ val &= ~TMU0_MSTP125;
++ writel(val, SMSTPCR1);
++
++ /* IIC1 */
++ val = readl(MSTPSR3);
++ val &= ~IIC1_MSTP323;
++ writel(val, SMSTPCR3);
++
++ /* SCIF2 */
++ val = readl(MSTPSR7);
++ val &= ~SCIF2_MSTP719;
++ writel(val, SMSTPCR7);
++
++ /* ETHER */
++ val = readl(MSTPSR8);
++ val &= ~ETHER_MSTP813;
++ writel(val, SMSTPCR8);
++
++ /* MMC/SD */
++ val = readl(MSTPSR3);
++ val &= ~(MMC0_MSTP315 | SDHI1_MSTP312);
++ writel(val, SMSTPCR3);
++
++ /*
++ * SD0 clock is set to 97.5MHz by default.
++ * Set SD1 to the 97.5MHz as well.
++ */
++ writel(SD1_97500KHZ, SD1CKCR);
++
++ return 0;
++}
++
++/* LSI pin pull-up control */
++#define PUPR3 0xe606010C
++#define PUPR3_ETH 0x007FF800
++#define PUPR3_ETH_MAGIC (1 << 20)
++
++#define PUPR1 0xe6060104
++#define PUPR1_DREQ0_N (1 << 20)
++
++int board_init(void)
++{
++ u32 val;
++
++ /* adress of boot parameters */
++ gd->bd->bi_boot_params = SILK_SDRAM_BASE + 0x100;
++
++ /* Init PFC controller */
++ r8a7794_pinmux_init();
++
++ /* ETHER Enable */
++ gpio_request(GPIO_FN_ETH_CRS_DV, NULL);
++ gpio_request(GPIO_FN_ETH_RX_ER, NULL);
++ gpio_request(GPIO_FN_ETH_RXD0, NULL);
++ gpio_request(GPIO_FN_ETH_RXD1, NULL);
++ gpio_request(GPIO_FN_ETH_LINK, NULL);
++ gpio_request(GPIO_FN_ETH_REFCLK, NULL);
++ gpio_request(GPIO_FN_ETH_MDIO, NULL);
++ gpio_request(GPIO_FN_ETH_TXD1, NULL);
++ gpio_request(GPIO_FN_ETH_TX_EN, NULL);
++ gpio_request(GPIO_FN_ETH_MAGIC, NULL);
++ gpio_request(GPIO_FN_ETH_TXD0, NULL);
++ gpio_request(GPIO_FN_ETH_MDC, NULL);
++ gpio_request(GPIO_FN_IRQ8, NULL);
++
++ val = readl(PUPR3);
++ val &= ~(PUPR3_ETH & ~PUPR3_ETH_MAGIC);
++ writel(val, PUPR3);
++
++#ifdef CONFIG_SH_SDHI
++ gpio_request(GPIO_FN_SD1_DATA0, NULL);
++ gpio_request(GPIO_FN_SD1_DATA1, NULL);
++ gpio_request(GPIO_FN_SD1_DATA2, NULL);
++ gpio_request(GPIO_FN_SD1_DATA3, NULL);
++ gpio_request(GPIO_FN_SD1_CLK, NULL);
++ gpio_request(GPIO_FN_SD1_CMD, NULL);
++ gpio_request(GPIO_FN_SD1_CD, NULL);
++#endif
++
++ sh_timer_init();
++
++ gpio_request(GPIO_GP_1_24, NULL); /* PHY_RST */
++
++ val = readl(PUPR1);
++ val &= ~PUPR1_DREQ0_N;
++ writel(val, PUPR1);
++
++ gpio_direction_output(GPIO_GP_1_24, 0);
++ mdelay(20);
++ gpio_set_value(GPIO_GP_1_24, 1);
++ udelay(1);
++
++ /* mmc0 */
++ gpio_request(GPIO_GP_4_31, NULL);
++ gpio_direction_output(GPIO_GP_4_31, 1);
++ /* sdhi1 */
++ gpio_request(GPIO_GP_4_26, NULL);
++ gpio_request(GPIO_GP_4_29, NULL);
++ gpio_direction_output(GPIO_GP_4_26, 1);
++ gpio_direction_output(GPIO_GP_4_29, 1);
++
++ return 0;
++}
++
++int board_eth_init(bd_t *bis)
++{
++ int ret = -ENODEV;
++ u32 val;
++ unsigned char enetaddr[6];
++
++#ifdef CONFIG_SH_ETHER
++ ret = sh_eth_initialize(bis);
++ if (!eth_getenv_enetaddr("ethaddr", enetaddr))
++ return ret;
++
++ /* Set Mac address */
++ val = enetaddr[0] << 24 | enetaddr[1] << 16 |
++ enetaddr[2] << 8 | enetaddr[3];
++ writel(val, 0xEE7003C0);
++
++ val = enetaddr[4] << 8 | enetaddr[5];
++ writel(val, 0xEE7003C8);
++#endif
++
++ return ret;
++}
++
++int dram_init(void)
++{
++ gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
++
++ return 0;
++}
++
++const struct rmobile_sysinfo sysinfo = {
++ CONFIG_RMOBILE_BOARD_STRING
++};
++
++void dram_init_banksize(void)
++{
++ gd->bd->bi_dram[0].start = SILK_SDRAM_BASE;
++ gd->bd->bi_dram[0].size = SILK_SDRAM_SIZE;
++}
++
++int board_late_init(void)
++{
++ return 0;
++}
++
++int board_mmc_init(bd_t *bis)
++{
++ int ret = 0;
++
++#ifdef CONFIG_SH_MMCIF
++ ret = mmcif_mmc_init();
++#endif
++
++#ifdef CONFIG_SH_SDHI
++ /* use SDHI1 */
++ ret = sdhi_mmc_init(SDHI1_BASE, 1);
++#endif
++
++ return ret;
++}
++
++void reset_cpu(ulong addr)
++{
++ u8 val;
++
++ i2c_init(CONFIG_SYS_I2C_SPEED, 0);
++ i2c_read(0x58, 0x13, 1, &val, 1);
++ val |= 0x02;
++ i2c_write(0x58, 0x13, 1, &val, 1);
++}
++
++#define TSTR0 4
++#define TSTR0_STR0 0x1
++
++enum {
++ MSTP00, MSTP01, MSTP02, MSTP03, MSTP04, MSTP05,
++ MSTP07, MSTP08, MSTP09, MSTP10, MSTP11,
++ MSTP_NR,
++};
++
++struct mstp_ctl {
++ u32 s_addr;
++ u32 s_dis;
++ u32 s_ena;
++ u32 r_addr;
++ u32 r_dis;
++ u32 r_ena;
++} mstptbl[MSTP_NR] = {
++ [MSTP00] = { SMSTPCR0, 0x00440801, 0x00400000,
++ RMSTPCR0, 0x00440801, 0x00000000 },
++ [MSTP01] = { SMSTPCR1, 0x936899DA, 0x00000000,
++ RMSTPCR1, 0x936899DA, 0x00000000 },
++ [MSTP02] = { SMSTPCR2, 0x100D21FC, 0x00002000,
++ RMSTPCR2, 0x100D21FC, 0x00000000 },
++ [MSTP03] = { SMSTPCR3, 0xE084D810, 0x00000000,
++ RMSTPCR3, 0xE084D810, 0x00000000 },
++ [MSTP04] = { SMSTPCR4, 0x800001C4, 0x00000180,
++ RMSTPCR4, 0x800001C4, 0x00000000 },
++ [MSTP05] = { SMSTPCR5, 0x40C00044, 0x00000000,
++ RMSTPCR5, 0x40C00044, 0x00000000 },
++ [MSTP07] = { SMSTPCR7, 0x013FE618, 0x00080000,
++ RMSTPCR7, 0x013FE618, 0x00000000 },
++ [MSTP08] = { SMSTPCR8, 0x40803C05, 0x00000000,
++ RMSTPCR8, 0x40803C05, 0x00000000 },
++ [MSTP09] = { SMSTPCR9, 0xFB879FEE, 0x00000000,
++ RMSTPCR9, 0xFB879FEE, 0x00000000 },
++ [MSTP10] = { SMSTPCR10, 0xFFFEFFE0, 0x00000000,
++ RMSTPCR10, 0xFFFEFFE0, 0x00000000 },
++ [MSTP11] = { SMSTPCR11, 0x000001C0, 0x00000000,
++ RMSTPCR11, 0x000001C0, 0x00000000 },
++};
++
++void arch_preboot_os()
++{
++ u32 val;
++ int i;
++
++ /* stop TMU0 */
++ val = readb(TMU_BASE + TSTR0);
++ val &= ~TSTR0_STR0;
++ writeb(val, TMU_BASE + TSTR0);
++
++ /* stop all module clock*/
++ for (i = MSTP00; i < MSTP_NR; i++) {
++ val = readl(mstptbl[i].s_addr);
++ writel((val | mstptbl[i].s_dis) & ~(mstptbl[i].s_ena),
++ mstptbl[i].s_addr);
++ val = readl(mstptbl[i].r_addr);
++ writel((val | mstptbl[i].r_dis) & ~(mstptbl[i].r_ena),
++ mstptbl[i].r_addr);
++ }
++}
+Index: u-boot-sh.3/board/renesas/silk/silk.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-sh.3/board/renesas/silk/silk.h 2014-12-20 02:24:12.546490964 +0300
+@@ -0,0 +1,28 @@
++/*
++ * board/renesas/silk/silk.h
++ * This file is silk board definition.
++ *
++ * Copyright (C) 2014 Renesas Electronics Corporation
++ * Copyright (C) 2014 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++extern int sh_timer_init(void);
++extern int mmcif_mmc_init(void);
++extern int sdhi_mmc_init(unsigned long addr, int ch);
++
++extern void arch_preboot_os(void);
++
++extern void qos_init(void);
+Index: u-boot-sh.3/boards.cfg
+===================================================================
+--- u-boot-sh.3.orig/boards.cfg 2014-12-20 02:24:12.550490964 +0300
++++ u-boot-sh.3/boards.cfg 2014-12-20 03:35:08.394484236 +0300
+@@ -304,6 +304,8 @@
+ gose_extram arm armv7 gose renesas rmobile gose:EXTRAM_BOOT
+ alt arm armv7 alt renesas rmobile
+ alt_extram arm armv7 alt renesas rmobile alt:EXTRAM_BOOT
++silk arm armv7 silk renesas rmobile
++silk_extram arm armv7 silk renesas rmobile silk:EXTRAM_BOOT
+ socfpga_cyclone5 arm armv7 socfpga_cyclone5 altera socfpga
+ actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2
+ actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB
+Index: u-boot-sh.3/drivers/mmc/sh_sdhi.c
+===================================================================
+--- u-boot-sh.3.orig/drivers/mmc/sh_sdhi.c 2014-12-20 02:24:12.550490964 +0300
++++ u-boot-sh.3/drivers/mmc/sh_sdhi.c 2014-12-20 02:24:12.546490964 +0300
+@@ -197,7 +197,7 @@
+ if (host->ch < 2)
+ sdhi_writew(host, SDHI_HOST_MODE, 1); /* 16bit access */
+ #elif defined(KOELSCH_SDRAM_BASE) || defined(GOSE_SDRAM_BASE) || \
+- defined(ALT_SDRAM_BASE)
++ defined(ALT_SDRAM_BASE) || defined(SILK_SDRAM_BASE)
+ if (host->ch == 0)
+ sdhi_writew(host, SDHI_HOST_MODE, 1); /* 16bit access */
+ #else
+@@ -668,7 +668,7 @@
+ else
+ host->bus_shift = 0;
+ #elif defined(KOELSCH_SDRAM_BASE) || defined(GOSE_SDRAM_BASE) || \
+- defined(ALT_SDRAM_BASE)
++ defined(ALT_SDRAM_BASE) || defined(SILK_SDRAM_BASE)
+ if (ch == 0)
+ host->bus_shift = 1;
+ else
+Index: u-boot-sh.3/drivers/usb/host/ehci-r8a779x.c
+===================================================================
+--- u-boot-sh.3.orig/drivers/usb/host/ehci-r8a779x.c 2014-12-20 02:24:12.550490964 +0300
++++ u-boot-sh.3/drivers/usb/host/ehci-r8a779x.c 2014-12-20 02:24:12.546490964 +0300
+@@ -30,6 +30,8 @@
+ #define PHYS_OFFSET GOSE_SDRAM_BASE
+ #elif defined(ALT_SDRAM_BASE)
+ #define PHYS_OFFSET ALT_SDRAM_BASE
++#elif defined(SILK_SDRAM_BASE)
++#define PHYS_OFFSET SILK_SDRAM_BASE
+ #else
+ #error
+ #endif
+Index: u-boot-sh.3/include/configs/silk.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-sh.3/include/configs/silk.h 2014-12-20 05:15:25.977962314 +0300
+@@ -0,0 +1,214 @@
++/*
++ * include/configs/silk.h
++ * This file is silk board configuration.
++ *
++ * Copyright (C) 2014 Renesas Electronics Corporation
++ * Copyright (C) 2014 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++#ifndef __SILK_H
++#define __SILK_H
++
++#undef DEBUG
++#define CONFIG_ARMV7
++#define CONFIG_R8A7794
++#define CONFIG_RMOBILE
++#define CONFIG_RMOBILE_BOARD_STRING "Silk Board\n"
++#define CONFIG_SH_GPIO_PFC
++#define CONFIG_SYS_THUMB_BUILD
++
++#include <asm/arch/rmobile.h>
++
++#define CONFIG_CMD_EDITENV
++#define CONFIG_CMD_SAVEENV
++#define CONFIG_CMD_MEMORY
++#define CONFIG_CMD_DFL
++#define CONFIG_CMD_SDRAM
++#define CONFIG_CMD_RUN
++#define CONFIG_CMD_LOADS
++#define CONFIG_CMD_NET
++#define CONFIG_CMD_MII
++#define CONFIG_CMD_PING
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_NFS
++#define CONFIG_CMD_BOOTZ
++#define CONFIG_CMD_USB
++#define CONFIG_CMD_FAT
++#define CONFIG_FAT_WRITE
++#define CONFIG_CMD_MMC
++#define CONFIG_CMD_EXT4
++#define CONFIG_CMD_EXT4_WRITE
++#define CONFIG_CMD_SF
++#define CONFIG_CMD_SPI
++#define CONFIG_CMD_CACHE
++
++#define CONFIG_CMDLINE_TAG
++#define CONFIG_SETUP_MEMORY_TAGS
++#define CONFIG_INITRD_TAG
++#define CONFIG_CMDLINE_EDITING
++
++#define CONFIG_OF_LIBFDT
++#define BOARD_LATE_INIT
++
++#define CONFIG_BAUDRATE 38400
++#define CONFIG_BOOTDELAY 3
++#define CONFIG_BOOTARGS ""
++
++#define CONFIG_VERSION_VARIABLE
++#undef CONFIG_SHOW_BOOT_PROGRESS
++
++#define CONFIG_ARCH_CPU_INIT
++#define CONFIG_DISPLAY_CPUINFO
++#define CONFIG_DISPLAY_BOARDINFO
++#define CONFIG_BOARD_EARLY_INIT_F
++#define CONFIG_USE_ARCH_MEMSET
++#define CONFIG_USE_ARCH_MEMCPY
++#define CONFIG_TMU_TIMER
++
++/* STACK */
++#if defined(CONFIG_EXTRAM_BOOT)
++#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
++#else
++#define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC
++#endif
++#define STACK_AREA_SIZE 0xC000
++#define LOW_LEVEL_MERAM_STACK \
++ (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
++
++/* MEMORY */
++#define SILK_SDRAM_BASE 0x40000000
++#define SILK_SDRAM_SIZE 0x40000000
++#define SILK_UBOOT_SDRAM_SIZE 0x20000000
++
++#define CONFIG_SYS_LONGHELP
++#define CONFIG_SYS_PROMPT "=> "
++#define CONFIG_SYS_CBSIZE 256
++#define CONFIG_SYS_PBSIZE 256
++#define CONFIG_SYS_MAXARGS 16
++#define CONFIG_SYS_BARGSIZE 512
++#define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 }
++
++/* SCIF */
++#define CONFIG_SCIF_CONSOLE
++#define CONFIG_CONS_SCIF2
++#define SCIF2_BASE 0xe6e58000
++#undef CONFIG_SYS_CONSOLE_INFO_QUIET
++#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
++#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
++
++#define CONFIG_SYS_MEMTEST_START (SILK_SDRAM_BASE)
++#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
++ 504 * 1024 * 1024)
++#undef CONFIG_SYS_SILK_MEMTEST
++#undef CONFIG_SYS_MEMTEST_SCRATCH
++#undef CONFIG_SYS_LOADS_BAUD_CHANGE
++
++#define CONFIG_SYS_SDRAM_BASE (SILK_SDRAM_BASE)
++#define CONFIG_SYS_SDRAM_SIZE (SILK_UBOOT_SDRAM_SIZE)
++#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0)
++#define CONFIG_NR_DRAM_BANKS 1
++
++#define CONFIG_SYS_MONITOR_BASE 0x00000000
++#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
++#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
++#define CONFIG_SYS_GBL_DATA_SIZE (256)
++#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
++
++#if defined(CONFIG_EXTRAM_BOOT)
++#define CONFIG_SYS_TEXT_BASE 0x70000000
++#else
++#define CONFIG_SYS_TEXT_BASE 0xE6304000
++#endif
++
++/* FLASH */
++#define CONFIG_SPI
++#define CONFIG_SH_QSPI
++#define CONFIG_SPI_FLASH
++#define CONFIG_SPI_FLASH_SPANSION
++#define CONFIG_SPI_FLASH_QUAD
++#define CONFIG_SYS_NO_FLASH
++#define CONFIG_SH_QSPI_BASE 0xE6B10000
++
++/* ENV setting */
++#define CONFIG_ENV_IS_IN_SPI_FLASH
++#define CONFIG_ENV_SECT_SIZE (256 * 1024)
++#define CONFIG_ENV_ADDR 0xC0000
++#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
++#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
++
++#define CONFIG_EXTRA_ENV_SETTINGS \
++ "bootm_low=0x40e00000\0" \
++ "bootm_size=0x100000\0" \
++
++/* SH Ether */
++#define CONFIG_NET_MULTI
++#define CONFIG_SH_ETHER
++#define CONFIG_SH_ETHER_USE_PORT 0
++#define CONFIG_SH_ETHER_PHY_ADDR 0x1
++#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
++#define CONFIG_SH_ETHER_CACHE_WRITEBACK
++#define CONFIG_SH_ETHER_CACHE_INVALIDATE
++#define CONFIG_PHYLIB
++#define CONFIG_PHY_MICREL
++#define CONFIG_BITBANGMII
++#define CONFIG_BITBANGMII_MULTI
++
++/* Board Clock */
++#define CONFIG_SYS_CLK_FREQ 20000000
++#define CONFIG_SCIF_CLK_FREQ 14745600
++#define CONFIG_SYS_TMU_CLK_DIV 4
++#define CONFIG_SYS_HZ 1000
++
++/* I2C */
++#define CONFIG_SH_I2C 1
++#define CONFIG_SYS_I2C_MODULE 1
++#define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */
++#define CONFIG_SYS_I2C_SLAVE 0x7F
++#define CONFIG_SH_I2C_DATA_HIGH 4
++#define CONFIG_SH_I2C_DATA_LOW 5
++#define CONFIG_SH_I2C_CLOCK 10000000
++#define CONFIG_SH_I2C_BASE0 0xE6510000
++
++/* FS */
++#define CONFIG_DOS_PARTITION
++#define CONFIG_SUPPORT_VFAT
++
++/* USB */
++#define CONFIG_USB_STORAGE
++#define CONFIG_USB_EHCI
++#define CONFIG_USB_EHCI_R8A779x
++#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
++
++/* MMCIF */
++#define CONFIG_MMC 1
++#define CONFIG_GENERIC_MMC 1
++
++#define CONFIG_SH_MMCIF 1
++#define CONFIG_SH_MMCIF_ADDR 0xee200000
++#define CONFIG_SH_MMCIF_CLK 48000000
++#define CONFIG_SH_MMCIF_FREQ 100000000
++
++/* SD */
++#define CONFIG_SH_SDHI 1
++#define CONFIG_SH_SDHI_FREQ 97500000
++#define CONFIG_MMC_SH_SDHI_NR_CHANNEL 2
++
++/* USB-ether */
++#define CONFIG_MII
++#define CONFIG_USB_HOST_ETHER /* Enable USB Ethernet adapters */
++#define CONFIG_USB_ETHER_ASIX /* Asix, or whatever driver(s) you want */
++
++#endif /* __SILK_H */
diff --git a/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0004-uboot-porter-board-support.patch b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0004-uboot-porter-board-support.patch
new file mode 100644
index 0000000..f83620b
--- /dev/null
+++ b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0004-uboot-porter-board-support.patch
@@ -0,0 +1,3186 @@
+From 480e53ade723e637d9557d224706bad2210fb3ca Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Wed, 4 Feb 2015 22:13:49 +0300
+Subject: [U-boot][PATCH] arm: rmobile: Add Porter board support
+
+Porter is an entry level development board based on R-Car M2 SoC (R8A7791)
+
+This commit supports the following peripherals:
+- SCIF, I2C, Ethernet, QSPI, SDHI, USB Host
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+---
+ board/renesas/porter/Makefile | 48 +
+ board/renesas/porter/lowlevel_init.S | 71 +
+ board/renesas/porter/porter.c | 308 +++++
+ board/renesas/porter/porter.h | 28 +
+ board/renesas/porter/qos.c | 2411 ++++++++++++++++++++++++++++++++++
+ boards.cfg | 2 +
+ drivers/mmc/sh_sdhi.c | 6 +-
+ drivers/usb/host/ehci-r8a779x.c | 2 +
+ include/configs/porter.h | 213 +++
+ 9 files changed, 3087 insertions(+), 2 deletions(-)
+ create mode 100644 board/renesas/porter/Makefile
+ create mode 100644 board/renesas/porter/lowlevel_init.S
+ create mode 100644 board/renesas/porter/porter.c
+ create mode 100644 board/renesas/porter/porter.h
+ create mode 100644 board/renesas/porter/qos.c
+ create mode 100644 include/configs/porter.h
+
+diff --git a/board/renesas/porter/Makefile b/board/renesas/porter/Makefile
+new file mode 100644
+index 0000000..24e63f1
+--- /dev/null
++++ b/board/renesas/porter/Makefile
+@@ -0,0 +1,48 @@
++#
++# board/renesas/porter/Makefile
++#
++# Copyright (C) 2015 Renesas Electronics Corporation
++# Copyright (C) 2015 Cogent Embedded, Inc.
++#
++# This program is free software; you can redistribute it and/or modify
++# it under the terms of the GNU General Public License version 2
++# as published by the Free Software Foundation.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software Foundation,
++# Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++#
++
++include $(TOPDIR)/config.mk
++
++LIB = $(obj)lib$(BOARD).o
++
++COBJS := porter.o qos.o
++SOBJS := lowlevel_init.o
++
++SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
++OBJS := $(addprefix $(obj),$(COBJS))
++SOBJS := $(addprefix $(obj),$(SOBJS))
++
++$(LIB): $(obj).depend $(OBJS) $(SOBJS)
++ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
++
++clean:
++ rm -f $(SOBJS) $(OBJS)
++
++distclean: clean
++ rm -f $(LIB) core *.bak $(obj).depend
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff --git a/board/renesas/porter/lowlevel_init.S b/board/renesas/porter/lowlevel_init.S
+new file mode 100644
+index 0000000..c5ceada
+--- /dev/null
++++ b/board/renesas/porter/lowlevel_init.S
+@@ -0,0 +1,71 @@
++/*
++ * board/renesas/porter/lowlevel_init.S
++ * This file is Porter low level initialize.
++ *
++ * Copyright (C) 2015 Renesas Electronics Corporation
++ * Copyright (C) 2015 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++#include <config.h>
++#include <linux/linkage.h>
++
++ENTRY(lowlevel_init)
++ mrc p15, 0, r4, c0, c0, 5 /* mpidr */
++ orr r4, r4, r4, lsr #6
++ and r4, r4, #7 /* id 0-3 = ca15.0,1,2,3 */
++
++ b do_lowlevel_init
++
++ .pool
++
++/*
++ * Only CPU ID #0 comes here
++ */
++ .align 4
++do_lowlevel_init:
++
++ /* surpress wfe if ca15 */
++ tst r4, #4
++ mrceq p15, 0, r0, c1, c0, 1 /* actlr */
++ orreq r0, r0, #(1<<7)
++ mcreq p15, 0, r0, c1, c0, 1
++
++ /* and set l2 latency */
++ mrc p15, 0, r0, c0, c0, 5 /* r0 = MPIDR */
++ and r0, r0, #0xf00
++ lsr r0, r0, #8
++ tst r0, #1 /* only need for cluster 0 */
++ bne _exit_init_l2_a15
++
++ mrc p15, 1, r0, c9, c0, 2 /* r0 = L2CTLR */
++ and r1, r0, #7
++ cmp r1, #3 /* has already been set up */
++ bicne r0, r0, #0xe7
++ orrne r0, r0, #0x83 /* L2CTLR[7:6] + L2CTLR[2:0] */
++ mcrne p15, 1, r0, c9, c0, 2
++_exit_init_l2_a15:
++ ldr r3, =(CONFIG_SYS_INIT_SP_ADDR)
++ sub sp, r3, #4
++ str lr, [sp]
++
++ /* initialize system */
++ bl s_init
++
++ ldr lr, [sp]
++ mov pc, lr
++ nop
++ENDPROC(lowlevel_init)
++ .ltorg
+diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
+new file mode 100644
+index 0000000..e6ded08
+--- /dev/null
++++ b/board/renesas/porter/porter.c
+@@ -0,0 +1,305 @@
++/*
++ * board/renesas/porter/porter.c
++ * This file is Porter board support.
++ *
++ * Copyright (C) 2015 Renesas Electronics Corporation
++ * Copyright (C) 2015 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++#include <common.h>
++#include <malloc.h>
++#include <asm/processor.h>
++#include <asm/mach-types.h>
++#include <asm/io.h>
++#include <asm/errno.h>
++#include <asm/arch/sys_proto.h>
++#include <asm/gpio.h>
++#include <asm/arch/rmobile.h>
++#include <netdev.h>
++#include <i2c.h>
++#include "porter.h"
++
++DECLARE_GLOBAL_DATA_PTR;
++
++#define PLL0CR 0xE61500D8
++
++void s_init(void)
++{
++ struct r8a7791_rwdt *rwdt = (struct r8a7791_rwdt *)RWDT_BASE;
++ struct r8a7791_swdt *swdt = (struct r8a7791_swdt *)SWDT_BASE;
++ u32 val;
++
++ /* Watchdog init */
++ writel(0xA5A5A500, &rwdt->rwtcsra);
++ writel(0xA5A5A500, &swdt->swtcsra);
++
++ /* cpu frequency setting */
++ val = readl(PLL0CR);
++ val &= ~0x7F000000;
++ val |= 0x4A000000; /* 1.5GHz */
++ writel(val, PLL0CR);
++
++#if !defined(CONFIG_EXTRAM_BOOT)
++ /* QoS */
++ qos_init();
++#endif
++}
++
++#define TMU0_MSTP125 (1 << 25)
++#define SDHI0_MSTP314 (1 << 14)
++#define SDHI2_MSTP311 (1 << 11)
++#define SCIF0_MSTP721 (1 << 21)
++#define ETHER_MSTP813 (1 << 13)
++
++#define SD2CKCR 0xE615026C
++#define SD2_97500KHZ 0x7
++
++int board_early_init_f(void)
++{
++ u32 val;
++
++ /* TMU0 */
++ val = readl(MSTPSR1);
++ val &= ~TMU0_MSTP125;
++ writel(val, SMSTPCR1);
++
++ val = readl(MSTPSR7);
++ val &= ~SCIF0_MSTP721;
++ writel(val, SMSTPCR7);
++
++ /* ETHER */
++ val = readl(MSTPSR8);
++ val &= ~ETHER_MSTP813;
++ writel(val, SMSTPCR8);
++
++ /* SD */
++ val = readl(MSTPSR3);
++ val &= ~(SDHI0_MSTP314 | SDHI2_MSTP311);
++ writel(val, SMSTPCR3);
++
++ /*
++ * SD0 clock is set to 97.5MHz by default.
++ * Set SD2 to the 97.5MHz as well.
++ */
++ writel(SD2_97500KHZ, SD2CKCR);
++
++ return 0;
++}
++
++/* LSI pin pull-up control */
++#define PUPR5 0xe6060114
++#define PUPR5_ETH 0x3FFC0000
++#define PUPR5_ETH_MAGIC (1 << 27)
++
++int board_init(void)
++{
++ u32 val;
++
++ /* adress of boot parameters */
++ gd->bd->bi_boot_params = PORTER_SDRAM_BASE + 0x100;
++
++ /* Init PFC controller */
++ r8a7791_pinmux_init();
++
++ sh_timer_init();
++
++ /* ETHER Enable */
++ gpio_request(GPIO_FN_ETH_CRS_DV, NULL);
++ gpio_request(GPIO_FN_ETH_RX_ER, NULL);
++ gpio_request(GPIO_FN_ETH_RXD0, NULL);
++ gpio_request(GPIO_FN_ETH_RXD1, NULL);
++ gpio_request(GPIO_FN_ETH_LINK, NULL);
++ gpio_request(GPIO_FN_ETH_REFCLK, NULL);
++ gpio_request(GPIO_FN_ETH_MDIO, NULL);
++ gpio_request(GPIO_FN_ETH_TXD1, NULL);
++ gpio_request(GPIO_FN_ETH_TX_EN, NULL);
++ gpio_request(GPIO_FN_ETH_TXD0, NULL);
++ gpio_request(GPIO_FN_ETH_MDC, NULL);
++ gpio_request(GPIO_FN_IRQ0, NULL);
++
++ val = readl(PUPR5);
++ val &= ~(PUPR5_ETH & ~PUPR5_ETH_MAGIC);
++ writel(val, PUPR5);
++
++ gpio_request(GPIO_GP_5_22, NULL); /* PHY_RST */
++ val = readl(PUPR5);
++ val &= ~PUPR5_ETH_MAGIC;
++ writel(val, PUPR5);
++
++ gpio_direction_output(GPIO_GP_5_22, 0);
++ mdelay(20);
++ gpio_set_value(GPIO_GP_5_22, 1);
++ udelay(1);
++
++#ifdef CONFIG_SH_SDHI
++ gpio_request(GPIO_FN_SD0_DATA0, NULL);
++ gpio_request(GPIO_FN_SD0_DATA1, NULL);
++ gpio_request(GPIO_FN_SD0_DATA2, NULL);
++ gpio_request(GPIO_FN_SD0_DATA3, NULL);
++ gpio_request(GPIO_FN_SD0_CLK, NULL);
++ gpio_request(GPIO_FN_SD0_CMD, NULL);
++ gpio_request(GPIO_FN_SD0_CD, NULL);
++ gpio_request(GPIO_FN_SD2_DATA0, NULL);
++ gpio_request(GPIO_FN_SD2_DATA1, NULL);
++ gpio_request(GPIO_FN_SD2_DATA2, NULL);
++ gpio_request(GPIO_FN_SD2_DATA3, NULL);
++ gpio_request(GPIO_FN_SD2_CLK, NULL);
++ gpio_request(GPIO_FN_SD2_CMD, NULL);
++ gpio_request(GPIO_FN_SD2_CD, NULL);
++#endif
++
++ /* sdhi0 */
++ gpio_request(GPIO_GP_2_12, NULL);
++ gpio_direction_output(GPIO_GP_2_12, 1); /* 1: 3.3V, 0: 1.8V */
++ /* sdhi2 */
++ gpio_request(GPIO_GP_2_26, NULL);
++ gpio_direction_output(GPIO_GP_2_26, 1); /* 1: 3.3V, 0: 1.8V */
++
++ return 0;
++}
++
++int board_eth_init(bd_t *bis)
++{
++ int ret = -ENODEV;
++ u32 val;
++ unsigned char enetaddr[6];
++
++#ifdef CONFIG_SH_ETHER
++ ret = sh_eth_initialize(bis);
++ if (!eth_getenv_enetaddr("ethaddr", enetaddr))
++ return ret;
++
++ /* Set Mac address */
++ val = enetaddr[0] << 24 | enetaddr[1] << 16 |
++ enetaddr[2] << 8 | enetaddr[3];
++ writel(val, 0xEE7003C0);
++
++ val = enetaddr[4] << 8 | enetaddr[5];
++ writel(val, 0xEE7003C8);
++#endif
++
++ return ret;
++}
++
++int dram_init(void)
++{
++ gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
++
++ return 0;
++}
++
++const struct rmobile_sysinfo sysinfo = {
++ CONFIG_RMOBILE_BOARD_STRING
++};
++
++void dram_init_banksize(void)
++{
++ gd->bd->bi_dram[0].start = PORTER_SDRAM_BASE;
++ gd->bd->bi_dram[0].size = PORTER_SDRAM_SIZE;
++}
++
++int board_late_init(void)
++{
++ return 0;
++}
++
++int board_mmc_init(bd_t *bis)
++{
++ int ret = 0;
++
++#ifdef CONFIG_SH_SDHI
++ /* use SDHI0,2 */
++ ret = sdhi_mmc_init(SDHI0_BASE, 0);
++ if (ret)
++ return ret;
++
++ ret = sdhi_mmc_init(SDHI2_BASE, 2);
++#endif
++
++ return ret;
++}
++
++void reset_cpu(ulong addr)
++{
++ u8 val;
++
++ i2c_init(CONFIG_SYS_I2C_SPEED, 0);
++ i2c_read(0x58, 0x13, 1, &val, 1);
++ val |= 0x02;
++ i2c_write(0x58, 0x13, 1, &val, 1);
++}
++
++enum {
++ MSTP00, MSTP01, MSTP02, MSTP03, MSTP04, MSTP05,
++ MSTP07, MSTP08, MSTP09, MSTP10, MSTP11,
++ MSTP_NR,
++};
++
++struct mstp_ctl {
++ u32 s_addr;
++ u32 s_dis;
++ u32 s_ena;
++ u32 r_addr;
++ u32 r_dis;
++ u32 r_ena;
++} mstptbl[MSTP_NR] = {
++ [MSTP00] = { SMSTPCR0, 0x00640801, 0x00400000,
++ RMSTPCR0, 0x00640801, 0x00000000 },
++ [MSTP01] = { SMSTPCR1, 0x9B6C9B5A, 0x00000000,
++ RMSTPCR1, 0x9B6C9B5A, 0x00000000 },
++ [MSTP02] = { SMSTPCR2, 0x100D21FC, 0x00002000,
++ RMSTPCR2, 0x100D21FC, 0x00000000 },
++ [MSTP03] = { SMSTPCR3, 0xF08CD810, 0x00000000,
++ RMSTPCR3, 0xF08CD810, 0x00000000 },
++ [MSTP04] = { SMSTPCR4, 0x800001C4, 0x00000180,
++ RMSTPCR4, 0x800001C4, 0x00000000 },
++ [MSTP05] = { SMSTPCR5, 0x44C00046, 0x00000000,
++ RMSTPCR5, 0x44C00046, 0x00000000 },
++ [MSTP07] = { SMSTPCR7, 0x05BFE618, 0x00200000,
++ RMSTPCR7, 0x05BFE618, 0x00000000 },
++ [MSTP08] = { SMSTPCR8, 0x40C0FE85, 0x00000000,
++ RMSTPCR8, 0x40C0FE85, 0x00000000 },
++ [MSTP09] = { SMSTPCR9, 0xFF979FFF, 0x00000000,
++ RMSTPCR9, 0xFF979FFF, 0x00000000 },
++ [MSTP10] = { SMSTPCR10, 0xFFFEFFE0, 0x00000000,
++ RMSTPCR10, 0xFFFEFFE0, 0x00000000 },
++ [MSTP11] = { SMSTPCR11, 0x000001C0, 0x00000000,
++ RMSTPCR11, 0x000001C0, 0x00000000 },
++};
++
++#define TSTR0 4
++#define TSTR0_STR0 0x1
++
++void arch_preboot_os()
++{
++ u32 val;
++ int i;
++
++ /* stop TMU0 */
++ val = readb(TMU_BASE + TSTR0);
++ val &= ~TSTR0_STR0;
++ writeb(val, TMU_BASE + TSTR0);
++
++ /* stop all module clock*/
++ for (i = MSTP00; i < MSTP_NR; i++) {
++ val = readl(mstptbl[i].s_addr);
++ writel((val | mstptbl[i].s_dis) & ~(mstptbl[i].s_ena),
++ mstptbl[i].s_addr);
++ val = readl(mstptbl[i].r_addr);
++ writel((val | mstptbl[i].r_dis) & ~(mstptbl[i].r_ena),
++ mstptbl[i].r_addr);
++ }
++}
+diff --git a/board/renesas/porter/porter.h b/board/renesas/porter/porter.h
+new file mode 100644
+index 0000000..c83e200
+--- /dev/null
++++ b/board/renesas/porter/porter.h
+@@ -0,0 +1,27 @@
++/*
++ * board/renesas/porter/porter.h
++ * This file is Porter board definition.
++ *
++ * Copyright (C) 2015 Renesas Electronics Corporation
++ * Copyright (C) 2015 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++extern int sh_timer_init(void);
++extern int sdhi_mmc_init(unsigned long addr, int ch);
++
++extern void arch_preboot_os(void);
++
++extern void qos_init(void);
+diff --git a/board/renesas/porter/qos.c b/board/renesas/porter/qos.c
+new file mode 100644
+index 0000000..b3c2951
+--- /dev/null
++++ b/board/renesas/porter/qos.c
+@@ -0,0 +1,2411 @@
++/*
++ * board/renesas/porter/qos.c
++ * This file is Porter QoS setting.
++ *
++ * Copyright (C) 2015 Renesas Electronics Corporation
++ * Copyright (C) 2015 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++#include <common.h>
++#include <asm/processor.h>
++#include <asm/mach-types.h>
++#include <asm/io.h>
++#include <asm/arch/rmobile.h>
++
++/* QoS version 0.240 for ES1 and version 0.411 for ES2 later */
++
++#define QOS_PRI_MEDIA 0
++#define QOS_PRI_NORMAL 1
++#define QOS_PRI_GFX 0
++
++enum {
++ DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
++ DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
++ DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
++ DBSC3_15,
++ DBSC3_NR,
++};
++
++static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
++ [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
++ [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
++ [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
++ [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
++ [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
++ [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
++ [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
++ [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
++ [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
++ [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
++ [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
++ [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
++ [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
++ [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
++ [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
++ [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
++};
++
++static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
++ [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
++ [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
++ [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
++ [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
++ [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
++ [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
++ [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
++ [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
++ [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
++ [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
++ [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
++ [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
++ [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
++ [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
++ [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
++ [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
++};
++
++static u32 dbsc3_1_r_qos_addr[DBSC3_NR] = {
++ [DBSC3_00] = DBSC3_1_QOS_R0_BASE,
++ [DBSC3_01] = DBSC3_1_QOS_R1_BASE,
++ [DBSC3_02] = DBSC3_1_QOS_R2_BASE,
++ [DBSC3_03] = DBSC3_1_QOS_R3_BASE,
++ [DBSC3_04] = DBSC3_1_QOS_R4_BASE,
++ [DBSC3_05] = DBSC3_1_QOS_R5_BASE,
++ [DBSC3_06] = DBSC3_1_QOS_R6_BASE,
++ [DBSC3_07] = DBSC3_1_QOS_R7_BASE,
++ [DBSC3_08] = DBSC3_1_QOS_R8_BASE,
++ [DBSC3_09] = DBSC3_1_QOS_R9_BASE,
++ [DBSC3_10] = DBSC3_1_QOS_R10_BASE,
++ [DBSC3_11] = DBSC3_1_QOS_R11_BASE,
++ [DBSC3_12] = DBSC3_1_QOS_R12_BASE,
++ [DBSC3_13] = DBSC3_1_QOS_R13_BASE,
++ [DBSC3_14] = DBSC3_1_QOS_R14_BASE,
++ [DBSC3_15] = DBSC3_1_QOS_R15_BASE,
++};
++
++static u32 dbsc3_1_w_qos_addr[DBSC3_NR] = {
++ [DBSC3_00] = DBSC3_1_QOS_W0_BASE,
++ [DBSC3_01] = DBSC3_1_QOS_W1_BASE,
++ [DBSC3_02] = DBSC3_1_QOS_W2_BASE,
++ [DBSC3_03] = DBSC3_1_QOS_W3_BASE,
++ [DBSC3_04] = DBSC3_1_QOS_W4_BASE,
++ [DBSC3_05] = DBSC3_1_QOS_W5_BASE,
++ [DBSC3_06] = DBSC3_1_QOS_W6_BASE,
++ [DBSC3_07] = DBSC3_1_QOS_W7_BASE,
++ [DBSC3_08] = DBSC3_1_QOS_W8_BASE,
++ [DBSC3_09] = DBSC3_1_QOS_W9_BASE,
++ [DBSC3_10] = DBSC3_1_QOS_W10_BASE,
++ [DBSC3_11] = DBSC3_1_QOS_W11_BASE,
++ [DBSC3_12] = DBSC3_1_QOS_W12_BASE,
++ [DBSC3_13] = DBSC3_1_QOS_W13_BASE,
++ [DBSC3_14] = DBSC3_1_QOS_W14_BASE,
++ [DBSC3_15] = DBSC3_1_QOS_W15_BASE,
++};
++
++/* QoS version 0.240 for ES1 */
++
++void qos_init_es1(void)
++{
++ int i;
++ struct r8a7791_s3c *s3c;
++ struct r8a7791_s3c_qos *s3c_qos;
++ struct r8a7791_dbsc3_qos *qos_addr;
++ struct r8a7791_mxi *mxi;
++ struct r8a7791_mxi_qos *mxi_qos;
++ struct r8a7791_axi_qos *axi_qos;
++
++ /* DBSC DBADJ2 */
++ writel(0x20042004, DBSC3_0_DBADJ2);
++ writel(0x20042004, DBSC3_1_DBADJ2);
++
++ /* S3C -QoS */
++ s3c = (struct r8a7791_s3c *)S3C_BASE;
++ writel(0x00FF1B1D, &s3c->s3cadsplcr);
++ writel(0x1F0D0C0C, &s3c->s3crorr);
++ writel(0x1F0D0C0A, &s3c->s3cworr);
++
++ /* QoS Control Registers */
++ s3c_qos = (struct r8a7791_s3c_qos *)S3C_QOS_CCI0_BASE;
++ writel(0x00890089, &s3c_qos->s3cqos0);
++ writel(0x20960010, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++ writel(0x20AA2200, &s3c_qos->s3cqos3);
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960010, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++ writel(0x20AA2200, &s3c_qos->s3cqos7);
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ s3c_qos = (struct r8a7791_s3c_qos *)S3C_QOS_CCI1_BASE;
++ writel(0x00890089, &s3c_qos->s3cqos0);
++ writel(0x20960010, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++ writel(0x20AA2200, &s3c_qos->s3cqos3);
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960010, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++ writel(0x20AA2200, &s3c_qos->s3cqos7);
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ s3c_qos = (struct r8a7791_s3c_qos *)S3C_QOS_MXI_BASE;
++ writel(0x00820082, &s3c_qos->s3cqos0);
++ writel(0x20960020, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++ writel(0x20AA20DC, &s3c_qos->s3cqos3);
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960020, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++ writel(0x20AA20DC, &s3c_qos->s3cqos7);
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ s3c_qos = (struct r8a7791_s3c_qos *)S3C_QOS_AXI_BASE;
++ writel(0x00820082, &s3c_qos->s3cqos0);
++ writel(0x20960020, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++ writel(0x20AA20FA, &s3c_qos->s3cqos3);
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960020, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++ writel(0x20AA20FA, &s3c_qos->s3cqos7);
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ /* DBSC -QoS */
++ /* DBSC0 - Read */
++ for (i = DBSC3_00; i < DBSC3_NR; i++) {
++ qos_addr = (struct r8a7791_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
++ writel(0x00000002, &qos_addr->dblgcnt);
++ writel(0x00002096, &qos_addr->dbtmval0);
++ writel(0x00002064, &qos_addr->dbtmval1);
++ writel(0x00002032, &qos_addr->dbtmval2);
++ writel(0x00001FB0, &qos_addr->dbtmval3);
++ writel(0x00000001, &qos_addr->dbrqctr);
++ writel(0x00002078, &qos_addr->dbthres0);
++ writel(0x0000204B, &qos_addr->dbthres1);
++ writel(0x00001FE7, &qos_addr->dbthres2);
++ writel(0x00000001, &qos_addr->dblgqon);
++ }
++
++ /* DBSC0 - Write */
++ for (i = DBSC3_00; i < DBSC3_NR; i++) {
++ qos_addr = (struct r8a7791_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
++ writel(0x00000002, &qos_addr->dblgcnt);
++ writel(0x000020EB, &qos_addr->dbtmval0);
++ writel(0x0000206E, &qos_addr->dbtmval1);
++ writel(0x00002050, &qos_addr->dbtmval2);
++ writel(0x0000203A, &qos_addr->dbtmval3);
++ writel(0x00000001, &qos_addr->dbrqctr);
++ writel(0x00002078, &qos_addr->dbthres0);
++ writel(0x0000205A, &qos_addr->dbthres1);
++ writel(0x0000203C, &qos_addr->dbthres2);
++ writel(0x00000001, &qos_addr->dblgqon);
++ }
++
++ /* DBSC1 - Read */
++ for (i = DBSC3_00; i < DBSC3_NR; i++) {
++ qos_addr = (struct r8a7791_dbsc3_qos *)dbsc3_1_r_qos_addr[i];
++ writel(0x00000002, &qos_addr->dblgcnt);
++ writel(0x00002096, &qos_addr->dbtmval0);
++ writel(0x00002064, &qos_addr->dbtmval1);
++ writel(0x00002032, &qos_addr->dbtmval2);
++ writel(0x00001FB0, &qos_addr->dbtmval3);
++ writel(0x00000001, &qos_addr->dbrqctr);
++ writel(0x00002078, &qos_addr->dbthres0);
++ writel(0x0000204B, &qos_addr->dbthres1);
++ writel(0x00001FE7, &qos_addr->dbthres2);
++ writel(0x00000001, &qos_addr->dblgqon);
++ }
++
++ /* DBSC1 - Write */
++ for (i = DBSC3_00; i < DBSC3_NR; i++) {
++ qos_addr = (struct r8a7791_dbsc3_qos *)dbsc3_1_w_qos_addr[i];
++ writel(0x00000002, &qos_addr->dblgcnt);
++ writel(0x000020EB, &qos_addr->dbtmval0);
++ writel(0x0000206E, &qos_addr->dbtmval1);
++ writel(0x00002050, &qos_addr->dbtmval2);
++ writel(0x0000203A, &qos_addr->dbtmval3);
++ writel(0x00000001, &qos_addr->dbrqctr);
++ writel(0x00002078, &qos_addr->dbthres0);
++ writel(0x0000205A, &qos_addr->dbthres1);
++ writel(0x0000203C, &qos_addr->dbthres2);
++ writel(0x00000001, &qos_addr->dblgqon);
++ }
++
++ /* CCI-400 -QoS */
++ writel(0x20001000, CCI_400_MAXOT_1);
++ writel(0x20001000, CCI_400_MAXOT_2);
++ writel(0x0000000C, CCI_400_QOSCNTL_1);
++ writel(0x0000000C, CCI_400_QOSCNTL_2);
++
++ /* MXI -QoS */
++ /* Transaction Control (MXI) */
++ mxi = (struct r8a7791_mxi *)MXI_BASE;
++ writel(0x00000013, &mxi->mxrtcr);
++ writel(0x00000013, &mxi->mxwtcr);
++ writel(0x00780080, &mxi->mxsaar0);
++ writel(0x02000800, &mxi->mxsaar1);
++
++ /* QoS Control (MXI) */
++ mxi_qos = (struct r8a7791_mxi_qos *)MXI_QOS_BASE;
++ writel(0x0000000C, &mxi_qos->vspdu0);
++ writel(0x0000000C, &mxi_qos->vspdu1);
++ writel(0x0000000D, &mxi_qos->du0);
++
++ /* AXI -QoS */
++ /* Transaction Control (MXI) */
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SYX64TO128_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_AVB_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_G2D_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_IMP0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002021, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_IMP1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002037, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_IMUX0_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_IMUX1_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_IMUX2_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_LBS_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MMUDS_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MMUM_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MMUR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MMUS0_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MMUS1_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MTSB0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002021, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MTSB1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002021, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_PCI_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_RTX_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SDS0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SDS1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_USB20_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_USB21_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_USB22_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_USB30_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_AX2M_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_CC50_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002029, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_CCI_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_CS_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_DDM_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_ETH_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MPXM_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SAT0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SAT1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SDM0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SDM1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_TRAB_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_UDM0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_UDM1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (RT-AXI) */
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_SHX_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_DBG_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_RDM_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002299, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_RDS_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002029, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_RTX64TO128_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_STPRO_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002029, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_SY2RT_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (MP-AXI) */
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_ADSP_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002037, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_ASDS0_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002014, &axi_qos->qosctset0);
++ writel(0x00000040, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_ASDS1_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002014, &axi_qos->qosctset0);
++ writel(0x00000040, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_MLP_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00001FF0, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00002001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_MMUMP_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_SPU_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_SPUC_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000206E, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (SYS-AXI256) */
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI256_SYX_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI256_MPX_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI256_MXI_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (CCI-AXI) */
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUS0_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_SYX2_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUDS_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUM_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MXI_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUS1_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUMP_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (Media-AXI) */
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_MXR_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020DC, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x000020AA, &axi_qos->qosthres0);
++ writel(0x00002032, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_MXW_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020DC, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x000020AA, &axi_qos->qosthres0);
++ writel(0x00002032, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_JPR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_JPW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_TDMR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_TDMW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VIN0W_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_FDP0R_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_FDP0W_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_IMSR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_IMSW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSP1R_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSP1W_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_FDP1R_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_FDP1W_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_IMRR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_IMRW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_DU0R_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002063, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_DU0W_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002063, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VPC0R_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++}
++
++/* QoS version 0.411 for ES2 later */
++
++#define S3CADSPLCR_LINEAR_ALL 0
++#define S3CADSPLCR_4K_SPLIT_LINEAR_0x7000_0x7800 1
++#define S3CADSPLCR_4K_SPLIT_LINEAR_0x6800_0x7000 0
++#define S3CADSPLCR_4K_SPLIT_ALL 0
++
++void qos_init_es2(void)
++{
++ int i;
++ struct r8a7791_s3c *s3c;
++ struct r8a7791_s3c_qos *s3c_qos;
++ struct r8a7791_dbsc3_qos *qos_addr;
++ struct r8a7791_mxi *mxi;
++ struct r8a7791_mxi_qos *mxi_qos;
++ struct r8a7791_axi_qos *axi_qos;
++
++ /* DBSC DBADJ2 */
++ writel(0x20042004, DBSC3_0_DBADJ2);
++ writel(0x20042004, DBSC3_1_DBADJ2);
++
++ /* S3C -QoS */
++ s3c = (struct r8a7791_s3c *)S3C_BASE;
++#if S3CADSPLCR_LINEAR_ALL
++ writel(0x00000000, &s3c->s3cadsplcr);
++#elif S3CADSPLCR_4K_SPLIT_LINEAR_0x7000_0x7800
++ writel(0x00BF1B0C, &s3c->s3cadsplcr);
++#elif S3CADSPLCR_4K_SPLIT_LINEAR_0x6800_0x7000
++ writel(0x00DF1B0C, &s3c->s3cadsplcr);
++#elif S3CADSPLCR_4K_SPLIT_ALL
++ writel(0x00FF1B0C, &s3c->s3cadsplcr);
++#else
++#error "S3CADSPLCR_* not defined"
++#endif
++#if QOS_PRI_MEDIA
++ writel(0x1F0B0604, &s3c->s3crorr);
++ writel(0x1F0E0705, &s3c->s3cworr);
++#elif QOS_PRI_NORMAL
++ writel(0x1F0B0908, &s3c->s3crorr);
++ writel(0x1F0E0A08, &s3c->s3cworr);
++#elif QOS_PRI_GFX
++ writel(0x1F0B0B0B, &s3c->s3crorr);
++ writel(0x1F0E0C0C, &s3c->s3cworr);
++#else
++#error "QOS_PRI_* not defined"
++#endif
++
++ /* QoS Control Registers */
++ s3c_qos = (struct r8a7791_s3c_qos *)S3C_QOS_CCI0_BASE;
++ writel(0x00890089, &s3c_qos->s3cqos0);
++ writel(0x20960010, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++#if QOS_PRI_MEDIA
++ writel(0x20AA2300, &s3c_qos->s3cqos3);
++#elif QOS_PRI_NORMAL
++ writel(0x20AA2200, &s3c_qos->s3cqos3);
++#elif QOS_PRI_GFX
++ writel(0x20AA2100, &s3c_qos->s3cqos3);
++#endif
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960010, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++#if QOS_PRI_MEDIA
++ writel(0x20AA2300, &s3c_qos->s3cqos7);
++#elif QOS_PRI_NORMAL
++ writel(0x20AA2200, &s3c_qos->s3cqos7);
++#elif QOS_PRI_GFX
++ writel(0x20AA2100, &s3c_qos->s3cqos7);
++#endif
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ s3c_qos = (struct r8a7791_s3c_qos *)S3C_QOS_CCI1_BASE;
++ writel(0x00890089, &s3c_qos->s3cqos0);
++ writel(0x20960010, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++#if QOS_PRI_MEDIA
++ writel(0x20AA2300, &s3c_qos->s3cqos3);
++#elif QOS_PRI_NORMAL
++ writel(0x20AA2200, &s3c_qos->s3cqos3);
++#elif QOS_PRI_GFX
++ writel(0x20AA2100, &s3c_qos->s3cqos3);
++#endif
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960010, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++#if QOS_PRI_MEDIA
++ writel(0x20AA2300, &s3c_qos->s3cqos7);
++#elif QOS_PRI_NORMAL
++ writel(0x20AA2200, &s3c_qos->s3cqos7);
++#elif QOS_PRI_GFX
++ writel(0x20AA2100, &s3c_qos->s3cqos7);
++#endif
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ s3c_qos = (struct r8a7791_s3c_qos *)S3C_QOS_MXI_BASE;
++ writel(0x80928092, &s3c_qos->s3cqos0);
++ writel(0x20960020, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++ writel(0x20AA20DC, &s3c_qos->s3cqos3);
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960020, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++ writel(0x20AA20DC, &s3c_qos->s3cqos7);
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ s3c_qos = (struct r8a7791_s3c_qos *)S3C_QOS_AXI_BASE;
++ writel(0x00828092, &s3c_qos->s3cqos0);
++ writel(0x20960020, &s3c_qos->s3cqos1);
++ writel(0x20302030, &s3c_qos->s3cqos2);
++ writel(0x20AA20FA, &s3c_qos->s3cqos3);
++ writel(0x00002032, &s3c_qos->s3cqos4);
++ writel(0x20960020, &s3c_qos->s3cqos5);
++ writel(0x20302030, &s3c_qos->s3cqos6);
++ writel(0x20AA20FA, &s3c_qos->s3cqos7);
++ writel(0x00002032, &s3c_qos->s3cqos8);
++
++ /* DBSC -QoS */
++ /* DBSC0 - Read */
++ for (i = DBSC3_00; i < DBSC3_NR; i++) {
++ qos_addr = (struct r8a7791_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
++ writel(0x00000002, &qos_addr->dblgcnt);
++ writel(0x00002096, &qos_addr->dbtmval0);
++ writel(0x00002064, &qos_addr->dbtmval1);
++ writel(0x00002032, &qos_addr->dbtmval2);
++ writel(0x00001FB0, &qos_addr->dbtmval3);
++ writel(0x00000001, &qos_addr->dbrqctr);
++ writel(0x00002078, &qos_addr->dbthres0);
++ writel(0x0000204B, &qos_addr->dbthres1);
++ writel(0x0000201E, &qos_addr->dbthres2);
++ writel(0x00000001, &qos_addr->dblgqon);
++ }
++
++ /* DBSC0 - Write */
++ for (i = DBSC3_00; i < DBSC3_NR; i++) {
++ qos_addr = (struct r8a7791_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
++ writel(0x00000002, &qos_addr->dblgcnt);
++ writel(0x00002096, &qos_addr->dbtmval0);
++ writel(0x00002064, &qos_addr->dbtmval1);
++ writel(0x00002050, &qos_addr->dbtmval2);
++ writel(0x0000203A, &qos_addr->dbtmval3);
++ writel(0x00000001, &qos_addr->dbrqctr);
++ writel(0x00002078, &qos_addr->dbthres0);
++ writel(0x0000204B, &qos_addr->dbthres1);
++ writel(0x0000203C, &qos_addr->dbthres2);
++ writel(0x00000001, &qos_addr->dblgqon);
++ }
++
++ /* DBSC1 - Read */
++ for (i = DBSC3_00; i < DBSC3_NR; i++) {
++ qos_addr = (struct r8a7791_dbsc3_qos *)dbsc3_1_r_qos_addr[i];
++ writel(0x00000002, &qos_addr->dblgcnt);
++ writel(0x00002096, &qos_addr->dbtmval0);
++ writel(0x00002064, &qos_addr->dbtmval1);
++ writel(0x00002032, &qos_addr->dbtmval2);
++ writel(0x00001FB0, &qos_addr->dbtmval3);
++ writel(0x00000001, &qos_addr->dbrqctr);
++ writel(0x00002078, &qos_addr->dbthres0);
++ writel(0x0000204B, &qos_addr->dbthres1);
++ writel(0x0000201E, &qos_addr->dbthres2);
++ writel(0x00000001, &qos_addr->dblgqon);
++ }
++
++ /* DBSC1 - Write */
++ for (i = DBSC3_00; i < DBSC3_NR; i++) {
++ qos_addr = (struct r8a7791_dbsc3_qos *)dbsc3_1_w_qos_addr[i];
++ writel(0x00000002, &qos_addr->dblgcnt);
++ writel(0x00002096, &qos_addr->dbtmval0);
++ writel(0x00002064, &qos_addr->dbtmval1);
++ writel(0x00002050, &qos_addr->dbtmval2);
++ writel(0x0000203A, &qos_addr->dbtmval3);
++ writel(0x00000001, &qos_addr->dbrqctr);
++ writel(0x00002078, &qos_addr->dbthres0);
++ writel(0x0000204B, &qos_addr->dbthres1);
++ writel(0x0000203C, &qos_addr->dbthres2);
++ writel(0x00000001, &qos_addr->dblgqon);
++ }
++
++ /* CCI-400 -QoS */
++ writel(0x20001000, CCI_400_MAXOT_1);
++ writel(0x20001000, CCI_400_MAXOT_2);
++ writel(0x0000000C, CCI_400_QOSCNTL_1);
++ writel(0x0000000C, CCI_400_QOSCNTL_2);
++
++ /* MXI -QoS */
++ /* Transaction Control (MXI) */
++ mxi = (struct r8a7791_mxi *)MXI_BASE;
++ writel(0x00000013, &mxi->mxrtcr);
++ writel(0x00000016, &mxi->mxwtcr);
++ writel(0x00780080, &mxi->mxsaar0);
++ writel(0x02000800, &mxi->mxsaar1);
++
++ /* QoS Control (MXI) */
++ mxi_qos = (struct r8a7791_mxi_qos *)MXI_QOS_BASE;
++ writel(0x0000000C, &mxi_qos->vspdu0);
++ writel(0x0000000C, &mxi_qos->vspdu1);
++ writel(0x0000000E, &mxi_qos->du0);
++
++ /* AXI -QoS */
++ /* Transaction Control (MXI) */
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SYX64TO128_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_AVB_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_G2D_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_IMP0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002021, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_IMP1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002037, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_IMUX0_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_IMUX1_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_IMUX2_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_LBS_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MMUDS_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MMUM_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MMUR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MMUS0_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MMUS1_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MTSB0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002021, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MTSB1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002021, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_PCI_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_RTX_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SDS0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SDS1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_USB20_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_USB21_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_USB22_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_USB30_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_AX2M_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_CC50_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002029, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_CCI_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_CS_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_DDM_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_ETH_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_MPXM_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SAT0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SAT1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SDM0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_SDM1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000214C, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_TRAB_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x000020A6, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_UDM0_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI_UDM1_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (RT-AXI) */
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_SHX_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_DBG_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_RDM_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002299, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_RDS_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002029, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_RTX64TO128_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_STPRO_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002029, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)RT_AXI_SY2RT_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (MP-AXI) */
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_ADSP_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002037, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_ASDS0_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002014, &axi_qos->qosctset0);
++ writel(0x00000040, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_ASDS1_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002014, &axi_qos->qosctset0);
++ writel(0x00000040, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_MLP_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00001FF0, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00002001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_MMUMP_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_SPU_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x00002053, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MP_AXI_SPUC_BASE;
++ writel(0x00000000, &axi_qos->qosconf);
++ writel(0x0000206E, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (SYS-AXI256) */
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020EB, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI256_SYX_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020EB, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI256_MPX_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020EB, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)SYS_AXI256_MXI_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020EB, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (CCI-AXI) */
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUS0_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_SYX2_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUDS_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUM_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MXI_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x00002245, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUS1_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)CCI_AXI_MMUMP_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002004, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000000, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ /* QoS Register (Media-AXI) */
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_MXR_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020DC, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x000020AA, &axi_qos->qosthres0);
++ writel(0x00002032, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_MXW_BASE;
++ writel(0x00000002, &axi_qos->qosconf);
++ writel(0x000020DC, &axi_qos->qosctset0);
++ writel(0x00002096, &axi_qos->qosctset1);
++ writel(0x00002030, &axi_qos->qosctset2);
++ writel(0x00002030, &axi_qos->qosctset3);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x000020AA, &axi_qos->qosthres0);
++ writel(0x00002032, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_JPR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_JPW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_TDMR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_TDMW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002190, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VIN0W_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00001FF0, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00002001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_FDP0R_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_FDP0W_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_IMSR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_IMSW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSP1R_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSP1W_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_FDP1R_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_FDP1W_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_IMRR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_IMRW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
++ writel(0x00000003, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
++ writel(0x00000003, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
++ writel(0x00000003, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
++ writel(0x00000003, &axi_qos->qosconf);
++ writel(0x000020C8, &axi_qos->qosctset0);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_DU0R_BASE;
++ writel(0x00000003, &axi_qos->qosconf);
++ writel(0x00002063, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_DU0W_BASE;
++ writel(0x00000003, &axi_qos->qosconf);
++ writel(0x00002063, &axi_qos->qosctset0);
++ writel(0x00000001, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00000001, &axi_qos->qosthres0);
++ writel(0x00000001, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++
++ axi_qos = (struct r8a7791_axi_qos *)MEDIA_AXI_VPC0R_BASE;
++ writel(0x00000001, &axi_qos->qosconf);
++ writel(0x00002073, &axi_qos->qosctset0);
++ writel(0x00000020, &axi_qos->qosreqctr);
++ writel(0x00002064, &axi_qos->qosthres0);
++ writel(0x00002004, &axi_qos->qosthres1);
++ writel(0x00000001, &axi_qos->qosthres2);
++ writel(0x00000001, &axi_qos->qosqon);
++}
++
++void qos_init(void)
++{
++ if (rmobile_get_cpu_rev_integer() >= R8A7791_CUT_ES2X)
++ qos_init_es2();
++ else
++ qos_init_es1();
++}
+diff --git a/boards.cfg b/boards.cfg
+index 8bcb01f..ef340fa 100644
+--- a/boards.cfg
++++ b/boards.cfg
+@@ -300,6 +300,8 @@ lager arm armv7 lager renesas
+ lager_extram arm armv7 lager renesas rmobile lager:EXTRAM_BOOT
+ koelsch arm armv7 koelsch renesas rmobile
+ koelsch_extram arm armv7 koelsch renesas rmobile koelsch:EXTRAM_BOOT
++porter arm armv7 porter renesas rmobile
++porter_extram arm armv7 porter renesas rmobile porter:EXTRAM_BOOT
+ gose arm armv7 gose renesas rmobile
+ gose_extram arm armv7 gose renesas rmobile gose:EXTRAM_BOOT
+ alt arm armv7 alt renesas rmobile
+diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c
+index 7e691c8..e915ba4 100644
+--- a/drivers/mmc/sh_sdhi.c
++++ b/drivers/mmc/sh_sdhi.c
+@@ -197,7 +197,8 @@ static void sdhi_sync_reset(struct sdhi_host *host)
+ if (host->ch < 2)
+ sdhi_writew(host, SDHI_HOST_MODE, 1); /* 16bit access */
+ #elif defined(KOELSCH_SDRAM_BASE) || defined(GOSE_SDRAM_BASE) || \
+- defined(ALT_SDRAM_BASE) || defined(SILK_SDRAM_BASE)
++ defined(ALT_SDRAM_BASE) || defined(SILK_SDRAM_BASE) || \
++ defined(PORTER_SDRAM_BASE)
+ if (host->ch == 0)
+ sdhi_writew(host, SDHI_HOST_MODE, 1); /* 16bit access */
+ #else
+@@ -668,7 +669,8 @@ int sdhi_mmc_init(unsigned long addr, int ch)
+ else
+ host->bus_shift = 0;
+ #elif defined(KOELSCH_SDRAM_BASE) || defined(GOSE_SDRAM_BASE) || \
+- defined(ALT_SDRAM_BASE) || defined(SILK_SDRAM_BASE)
++ defined(ALT_SDRAM_BASE) || defined(SILK_SDRAM_BASE) || \
++ defined(PORTER_SDRAM_BASE)
+ if (ch == 0)
+ host->bus_shift = 1;
+ else
+diff --git a/drivers/usb/host/ehci-r8a779x.c b/drivers/usb/host/ehci-r8a779x.c
+index e33a5d6..494fc09 100644
+--- a/drivers/usb/host/ehci-r8a779x.c
++++ b/drivers/usb/host/ehci-r8a779x.c
+@@ -26,6 +26,8 @@
+ #define PHYS_OFFSET LAGER_SDRAM_BASE
+ #elif defined(KOELSCH_SDRAM_BASE)
+ #define PHYS_OFFSET KOELSCH_SDRAM_BASE
++#elif defined(PORTER_SDRAM_BASE)
++#define PHYS_OFFSET PORTER_SDRAM_BASE
+ #elif defined(GOSE_SDRAM_BASE)
+ #define PHYS_OFFSET GOSE_SDRAM_BASE
+ #elif defined(ALT_SDRAM_BASE)
+diff --git a/include/configs/porter.h b/include/configs/porter.h
+new file mode 100644
+index 0000000..0d68248
+--- /dev/null
++++ b/include/configs/porter.h
+@@ -0,0 +1,206 @@
++/*
++ * include/configs/porter.h
++ * This file is Porter board configuration.
++ *
++ * Copyright (C) 2015 Renesas Electronics Corporation
++ * Copyright (C) 2015 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++#ifndef __PORTER_H
++#define __PORTER_H
++
++#undef DEBUG
++#define CONFIG_ARMV7
++#define CONFIG_R8A7791
++#define CONFIG_RMOBILE
++#define CONFIG_RMOBILE_BOARD_STRING "Porter Board\n"
++#define CONFIG_SH_GPIO_PFC
++#define CONFIG_SYS_THUMB_BUILD
++
++#include <asm/arch/rmobile.h>
++
++#define CONFIG_CMD_EDITENV
++#define CONFIG_CMD_SAVEENV
++#define CONFIG_CMD_MEMORY
++#define CONFIG_CMD_DFL
++#define CONFIG_CMD_SDRAM
++#define CONFIG_CMD_RUN
++#define CONFIG_CMD_LOADS
++#define CONFIG_CMD_NET
++#define CONFIG_CMD_MII
++#define CONFIG_CMD_PING
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_NFS
++#define CONFIG_CMD_BOOTZ
++#define CONFIG_CMD_USB
++#define CONFIG_CMD_FAT
++#define CONFIG_FAT_WRITE
++#define CONFIG_CMD_MMC
++#define CONFIG_CMD_EXT4
++#define CONFIG_CMD_EXT4_WRITE
++#define CONFIG_CMD_SF
++#define CONFIG_CMD_SPI
++
++#define CONFIG_CMDLINE_TAG
++#define CONFIG_SETUP_MEMORY_TAGS
++#define CONFIG_INITRD_TAG
++#define CONFIG_CMDLINE_EDITING
++
++#define CONFIG_OF_LIBFDT
++#define BOARD_LATE_INIT
++
++#define CONFIG_BAUDRATE 38400
++#define CONFIG_BOOTDELAY 3
++#define CONFIG_BOOTARGS ""
++
++#define CONFIG_VERSION_VARIABLE
++#undef CONFIG_SHOW_BOOT_PROGRESS
++
++#define CONFIG_ARCH_CPU_INIT
++#define CONFIG_DISPLAY_CPUINFO
++#define CONFIG_DISPLAY_BOARDINFO
++#define CONFIG_BOARD_EARLY_INIT_F
++#define CONFIG_USE_ARCH_MEMSET
++#define CONFIG_USE_ARCH_MEMCPY
++#define CONFIG_TMU_TIMER
++
++/* STACK */
++#if defined(CONFIG_EXTRAM_BOOT)
++#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
++#else
++#define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC
++#endif
++#define STACK_AREA_SIZE 0xC000
++#define LOW_LEVEL_MERAM_STACK \
++ (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
++
++/* MEMORY */
++#define PORTER_SDRAM_BASE 0x40000000
++#define PORTER_SDRAM_SIZE 0x40000000
++#define PORTER_UBOOT_SDRAM_SIZE 0x20000000
++
++#define CONFIG_SYS_LONGHELP
++#define CONFIG_SYS_PROMPT "=> "
++#define CONFIG_SYS_CBSIZE 256
++#define CONFIG_SYS_PBSIZE 256
++#define CONFIG_SYS_MAXARGS 16
++#define CONFIG_SYS_BARGSIZE 512
++#define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 }
++
++/* SCIF */
++#define CONFIG_SCIF_CONSOLE
++#define CONFIG_CONS_SCIF0
++#define SCIF0_BASE 0xe6e60000
++#undef CONFIG_SYS_CONSOLE_INFO_QUIET
++#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
++#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
++
++#define CONFIG_SYS_MEMTEST_START (PORTER_SDRAM_BASE)
++#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
++ 504 * 1024 * 1024)
++#undef CONFIG_SYS_ALT_MEMTEST
++#undef CONFIG_SYS_MEMTEST_SCRATCH
++#undef CONFIG_SYS_LOADS_BAUD_CHANGE
++
++#define CONFIG_SYS_SDRAM_BASE (PORTER_SDRAM_BASE)
++#define CONFIG_SYS_SDRAM_SIZE (PORTER_UBOOT_SDRAM_SIZE)
++#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0)
++#define CONFIG_NR_DRAM_BANKS 1
++
++#define CONFIG_SYS_MONITOR_BASE 0x00000000
++#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
++#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
++#define CONFIG_SYS_GBL_DATA_SIZE (256)
++#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
++
++#if defined(CONFIG_EXTRAM_BOOT)
++#define CONFIG_SYS_TEXT_BASE 0x70000000
++#else
++#define CONFIG_SYS_TEXT_BASE 0xE6304000
++#endif
++
++/* FLASH */
++#define CONFIG_SPI
++#define CONFIG_SH_QSPI
++#define CONFIG_SPI_FLASH
++#define CONFIG_SPI_FLASH_SPANSION
++#define CONFIG_SPI_FLASH_QUAD
++#define CONFIG_SYS_NO_FLASH
++#define CONFIG_SH_QSPI_BASE 0xE6B10000
++
++/* ENV setting */
++#define CONFIG_ENV_IS_IN_SPI_FLASH
++#define CONFIG_ENV_SECT_SIZE (256 * 1024)
++#define CONFIG_ENV_ADDR 0xC0000
++#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
++#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
++
++#define CONFIG_EXTRA_ENV_SETTINGS \
++ "bootm_low=0x40e00000\0" \
++ "bootm_size=0x100000\0" \
++
++/* SH Ether */
++#define CONFIG_NET_MULTI
++#define CONFIG_SH_ETHER
++#define CONFIG_SH_ETHER_USE_PORT 0
++#define CONFIG_SH_ETHER_PHY_ADDR 0x1
++#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
++#define CONFIG_SH_ETHER_CACHE_WRITEBACK
++#define CONFIG_SH_ETHER_CACHE_INVALIDATE
++#define CONFIG_PHYLIB
++#define CONFIG_PHY_MICREL
++#define CONFIG_BITBANGMII
++#define CONFIG_BITBANGMII_MULTI
++
++/* Board Clock */
++#define CONFIG_SYS_CLK_FREQ 20000000
++#define CONFIG_SCIF_CLK_FREQ 65000000
++#define CONFIG_SYS_TMU_CLK_DIV 4
++#define CONFIG_SYS_HZ 1000
++
++/* i2c */
++#define CONFIG_SH_I2C 1
++#define CONFIG_SYS_I2C_MODULE 1
++#define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */
++#define CONFIG_SYS_I2C_SLAVE 0x7F
++#define CONFIG_SH_I2C_DATA_HIGH 4
++#define CONFIG_SH_I2C_DATA_LOW 5
++#define CONFIG_SH_I2C_CLOCK 10000000
++#define CONFIG_SH_I2C_BASE0 0xE60B0000
++
++/* FS */
++#define CONFIG_DOS_PARTITION
++#define CONFIG_SUPPORT_VFAT
++
++/* USB */
++#define CONFIG_USB_STORAGE
++#define CONFIG_USB_EHCI
++#define CONFIG_USB_EHCI_R8A779x
++#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
++
++/* SD */
++#define CONFIG_MMC 1
++#define CONFIG_GENERIC_MMC 1
++#define CONFIG_SH_SDHI 1
++#define CONFIG_SH_SDHI_FREQ 97500000
++#define CONFIG_MMC_SH_SDHI_NR_CHANNEL 3
++
++/* USB-ether */
++#define CONFIG_MII
++#define CONFIG_USB_HOST_ETHER /* Enable USB Ethernet adapters */
++#define CONFIG_USB_ETHER_ASIX /* Asix, or whatever driver(s) you want */
++
++#endif /* __PORTER_H */
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0005-uboot-serial-sh-SCIF-internal-clock-support.patch b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0005-uboot-serial-sh-SCIF-internal-clock-support.patch
new file mode 100644
index 0000000..528da57
--- /dev/null
+++ b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0005-uboot-serial-sh-SCIF-internal-clock-support.patch
@@ -0,0 +1,124 @@
+From 95497016e961633e025666a041c63e501b0fc205 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 12 Feb 2015 16:25:57 +0300
+Subject: [U-boot][PATCH] serial: serial-sh: SCIF internal clock source support
+
+Support internal clock source for SCIF
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+
+---
+ drivers/serial/serial_sh.c | 4 ++++
+ drivers/serial/serial_sh.h | 7 ++++++-
+ include/configs/alt.h | 1 +
+ include/configs/gose.h | 1 +
+ include/configs/koelsch.h | 1 +
+ include/configs/lager.h | 1 +
+ include/configs/silk.h | 1 +
+ 7 files changed, 15 insertions(+), 1 deletion(-)
+
+Index: u-boot-sh.v1/drivers/serial/serial_sh.c
+===================================================================
+--- u-boot-sh.v1.orig/drivers/serial/serial_sh.c 2015-02-12 14:12:53.616876124 +0300
++++ u-boot-sh.v1/drivers/serial/serial_sh.c 2015-02-12 14:12:53.608876124 +0300
+@@ -63,9 +63,13 @@
+ DECLARE_GLOBAL_DATA_PTR;
+ #if defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+ defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
++#ifdef CONFIG_SCIF_USE_EXT_CLK
+ sci_out(&sh_sci, DL, DL_VALUE(gd->baudrate, CONFIG_SCIF_CLK_FREQ));
+ udelay((1000000 * 2 * 16 / CONFIG_SYS_CLK_FREQ) * 1000 + 1);
+ #else
++ sci_out(&sh_sci, SCBRR, SCBRR_VALUE(gd->baudrate, CONFIG_SCIF_CLK_FREQ));
++#endif
++#else
+ sci_out(&sh_sci, SCBRR, SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ));
+ #endif
+ }
+Index: u-boot-sh.v1/drivers/serial/serial_sh.h
+===================================================================
+--- u-boot-sh.v1.orig/drivers/serial/serial_sh.h 2015-02-12 14:12:53.616876124 +0300
++++ u-boot-sh.v1/drivers/serial/serial_sh.h 2015-02-12 14:13:18.400876703 +0300
+@@ -227,8 +227,12 @@
+ #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+ defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
+ # define SCIF_ORER 0x0001
++#ifdef CONFIG_SCIF_USE_EXT_CLK
+ # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */
+ #else
++# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */
++#endif
++#else
+ # error CPU subtype not defined
+ #endif
+
+@@ -735,7 +739,8 @@
+ #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
+ #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+ defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
+-#define DL_VALUE(bps, clk) (clk / bps / 16)
++#define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */
++#define SCBRR_VALUE(bps, clk) (clk / bps / 32 - 1) /* Internal Clock */
+ #else /* Generic SH */
+ #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
+ #endif
+Index: u-boot-sh.v1/include/configs/gose.h
+===================================================================
+--- u-boot-sh.v1.orig/include/configs/gose.h 2015-02-12 14:12:53.616876124 +0300
++++ u-boot-sh.v1/include/configs/gose.h 2015-02-12 14:12:53.612876124 +0300
+@@ -102,6 +102,7 @@
+ /* SCIF */
+ #define CONFIG_SCIF_CONSOLE
+ #define CONFIG_CONS_SCIF0
++#define CONFIG_SCIF_USE_EXT_CLK
+ #define SCIF0_BASE 0xe6e60000
+ #undef CONFIG_SYS_CONSOLE_INFO_QUIET
+ #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+Index: u-boot-sh.v1/include/configs/koelsch.h
+===================================================================
+--- u-boot-sh.v1.orig/include/configs/koelsch.h 2015-02-12 14:12:53.616876124 +0300
++++ u-boot-sh.v1/include/configs/koelsch.h 2015-02-12 14:12:53.612876124 +0300
+@@ -102,6 +102,7 @@
+ /* SCIF */
+ #define CONFIG_SCIF_CONSOLE
+ #define CONFIG_CONS_SCIF0
++#define CONFIG_SCIF_USE_EXT_CLK
+ #define SCIF0_BASE 0xe6e60000
+ #undef CONFIG_SYS_CONSOLE_INFO_QUIET
+ #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+Index: u-boot-sh.v1/include/configs/lager.h
+===================================================================
+--- u-boot-sh.v1.orig/include/configs/lager.h 2015-02-12 14:12:53.616876124 +0300
++++ u-boot-sh.v1/include/configs/lager.h 2015-02-12 14:12:53.612876124 +0300
+@@ -103,6 +103,7 @@
+ /* SCIF */
+ #define CONFIG_SCIF_CONSOLE
+ #define CONFIG_CONS_SCIF0
++#define CONFIG_SCIF_USE_EXT_CLK
+ #define SCIF0_BASE 0xe6e60000
+ #undef CONFIG_SYS_CONSOLE_INFO_QUIET
+ #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+Index: u-boot-sh.v1/include/configs/silk.h
+===================================================================
+--- u-boot-sh.v1.orig/include/configs/silk.h 2015-02-12 14:12:53.616876124 +0300
++++ u-boot-sh.v1/include/configs/silk.h 2015-02-12 14:12:53.612876124 +0300
+@@ -104,6 +104,7 @@
+ /* SCIF */
+ #define CONFIG_SCIF_CONSOLE
+ #define CONFIG_CONS_SCIF2
++#define CONFIG_SCIF_USE_EXT_CLK
+ #define SCIF2_BASE 0xe6e58000
+ #undef CONFIG_SYS_CONSOLE_INFO_QUIET
+ #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+Index: u-boot-sh.v1/include/configs/alt.h
+===================================================================
+--- u-boot-sh.v1.orig/include/configs/alt.h 2015-02-12 14:12:53.616876124 +0300
++++ u-boot-sh.v1/include/configs/alt.h 2015-02-12 14:12:53.612876124 +0300
+@@ -102,6 +102,7 @@
+ /* SCIF */
+ #define CONFIG_SCIF_CONSOLE
+ #define CONFIG_CONS_SCIF2
++#define CONFIG_SCIF_USE_EXT_CLK
+ #define SCIF2_BASE 0xe6e58000
+ #undef CONFIG_SYS_CONSOLE_INFO_QUIET
+ #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
diff --git a/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0006-uboot-Silk-disable-dcache-until-fixed.patch b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0006-uboot-Silk-disable-dcache-until-fixed.patch
new file mode 100644
index 0000000..5d6bf50
--- /dev/null
+++ b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot/0006-uboot-Silk-disable-dcache-until-fixed.patch
@@ -0,0 +1,51 @@
+From 1b5c615b0bb18985c9e5b8a3023506d910877d78 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Sun, 15 Feb 2015 02:00:36 +0300
+Subject: [U-boot][PATCH] Silk disable dcache until fixed
+
+Disable D-cache on Silk platform until fixed
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+---
+ board/renesas/silk/silk.c | 4 ++--
+ include/configs/silk.h | 2 ++
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c
+index addcfcb..78aede1 100644
+--- a/board/renesas/silk/silk.c
++++ b/board/renesas/silk/silk.c
+@@ -48,7 +48,7 @@ void s_init(void)
+ qos_init();
+ #endif
+
+-#ifndef CONFIG_DCACHE_OFF
++//#ifndef CONFIG_DCACHE_OFF
+ /*
+ * The caches are disabled when ACTLR.SMP is set to 0
+ * regardless of the value of the SCTLR.C (cache enable bit)
+@@ -58,7 +58,7 @@ void s_init(void)
+ "mrc 15, 0, r0, c1, c0, 1\n" /* read ACTLR */
+ "orr r0, r0, #(1 << 6)\n" /* set SMP */
+ "mcr p15, 0, r0, c1, c0, 1\n"); /* write ACTLR */
+-#endif
++//#endif
+ }
+
+ #define TMU0_MSTP125 (1 << 25)
+diff --git a/include/configs/silk.h b/include/configs/silk.h
+index 1a61272..4b66573 100644
+--- a/include/configs/silk.h
++++ b/include/configs/silk.h
+@@ -55,6 +55,8 @@
+ #define CONFIG_CMD_SPI
+ #define CONFIG_CMD_CACHE
+
++#define CONFIG_DCACHE_OFF
++
+ #define CONFIG_CMDLINE_TAG
+ #define CONFIG_SETUP_MEMORY_TAGS
+ #define CONFIG_INITRD_TAG
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-bsp/u-boot/u-boot_2013.01.01.bb b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot_2013.01.01.bb
new file mode 100644
index 0000000..8ca9e3b
--- /dev/null
+++ b/meta-rcar-gen2/recipes-bsp/u-boot/u-boot_2013.01.01.bb
@@ -0,0 +1,32 @@
+require u-boot.inc
+
+# This is needs to be validated among supported BSP's before we can
+# make it default
+DEFAULT_PREFERENCE = "-1"
+
+LICENSE = "GPLv2+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=1707d6db1d42237583f50183a5651ecb"
+
+PV = "v2013.01.01+git${SRCPV}"
+
+COMPATIBLE_MACHINE = "(alt|gose|koelsch|lager|porter|silk)"
+
+SRCREV = "b653737dfca271d2f3d96cf02c67cabef6112dab"
+SRC_URI = "git://git.denx.de/u-boot-sh.git;branch=renesas/bsp/rcar-gen2-1.9.2;protocol=git"
+
+S = "${WORKDIR}/git"
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+
+SRC_URI_append_porter = " \
+ file://0001-uboot-Silk-board-support.patch \
+ file://0004-uboot-porter-board-support.patch \
+ file://0005-uboot-serial-sh-SCIF-internal-clock-support.patch \
+ file://0006-uboot-Silk-disable-dcache-until-fixed.patch \
+"
+SRC_URI_append_silk = " \
+ file://0001-uboot-Silk-board-support.patch \
+ file://0004-uboot-porter-board-support.patch \
+ file://0005-uboot-serial-sh-SCIF-internal-clock-support.patch \
+ file://0006-uboot-Silk-disable-dcache-until-fixed.patch \
+"
diff --git a/meta-rcar-gen2/recipes-core/base-files/base-files_3.0.14.bbappend b/meta-rcar-gen2/recipes-core/base-files/base-files_3.0.14.bbappend
new file mode 100644
index 0000000..9d6092b
--- /dev/null
+++ b/meta-rcar-gen2/recipes-core/base-files/base-files_3.0.14.bbappend
@@ -0,0 +1,7 @@
+require meta-rcar-gen2/include/multimedia-control.inc
+
+do_install_append () {
+ if [ "X${USE_MULTIMEDIA}" = "X1" ] ; then
+ echo "export LD_LIBRARY_PATH=\"/usr/local/lib\"" >> ${D}${sysconfdir}/profile
+ fi
+}
diff --git a/meta-rcar-gen2/recipes-core/libmemcpy/libmemcpy/libmemcpy-1.0.tar.bz2 b/meta-rcar-gen2/recipes-core/libmemcpy/libmemcpy/libmemcpy-1.0.tar.bz2
new file mode 100644
index 0000000..85d93ac
--- /dev/null
+++ b/meta-rcar-gen2/recipes-core/libmemcpy/libmemcpy/libmemcpy-1.0.tar.bz2
Binary files differ
diff --git a/meta-rcar-gen2/recipes-core/libmemcpy/libmemcpy_1.0.bb b/meta-rcar-gen2/recipes-core/libmemcpy/libmemcpy_1.0.bb
new file mode 100644
index 0000000..22f5381
--- /dev/null
+++ b/meta-rcar-gen2/recipes-core/libmemcpy/libmemcpy_1.0.bb
@@ -0,0 +1,12 @@
+SUMMARY = "libmemcpy porting from eglibc 2.17"
+SECTION = "dev"
+LICENSE = "LGPL-2.1"
+LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/LGPL-2.1;md5=1a6d268fd218675ffea8be556788b780"
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+SRC_URI = "file://libmemcpy-1.0.tar.bz2"
+
+inherit autotools
+
+prefix="/usr/local/lib"
+exec_prefix="/usr/local"
diff --git a/meta-rcar-gen2/recipes-core/ncurses/ncurses_5.9.bbappend b/meta-rcar-gen2/recipes-core/ncurses/ncurses_5.9.bbappend
new file mode 100644
index 0000000..01cad8f
--- /dev/null
+++ b/meta-rcar-gen2/recipes-core/ncurses/ncurses_5.9.bbappend
@@ -0,0 +1,4 @@
+do_configure_prepend() {
+ # The --enable-pc-files requires PKG_CONFIG_LIBDIR existed
+ mkdir -p ${PKG_CONFIG_LIBDIR}
+}
diff --git a/meta-rcar-gen2/recipes-extended/socketcan/can-utils_git.bbappend b/meta-rcar-gen2/recipes-extended/socketcan/can-utils_git.bbappend
new file mode 100644
index 0000000..85571ba
--- /dev/null
+++ b/meta-rcar-gen2/recipes-extended/socketcan/can-utils_git.bbappend
@@ -0,0 +1,2 @@
+SRC_URI = "git://git.gitorious.org/linux-can/${BPN}.git;protocol=https;branch=master"
+
diff --git a/meta-rcar-gen2/recipes-graphics/cogl/cogl-1.0_1.16.2.bbappend b/meta-rcar-gen2/recipes-graphics/cogl/cogl-1.0_1.16.2.bbappend
new file mode 100644
index 0000000..b2f1a8c
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/cogl/cogl-1.0_1.16.2.bbappend
@@ -0,0 +1,3 @@
+require ../../include/gles-control.inc
+DEPENDS_append_rcar-gen2 = " \
+ ${@'libegl' if '${USE_GLES_WAYLAND}' == '1' else ''}"
diff --git a/meta-rcar-gen2/recipes-graphics/gles-module/gles-test-module.bb b/meta-rcar-gen2/recipes-graphics/gles-module/gles-test-module.bb
new file mode 100644
index 0000000..7a8fcb9
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/gles-module/gles-test-module.bb
@@ -0,0 +1,45 @@
+DESCRIPTION = "RGX/SGX unit test module"
+LICENSE = "CLOSED"
+DEPENDS += "gles-kernel-module gles-user-module"
+PN = "gles-test-module"
+PR = "r0"
+OPENGLES3 ?= "0"
+
+COMPATIBLE_MACHINE = "(r8a7790|r8a7791|r8a7793|r8a7794)"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+SRC_URI = '${@base_conditional( "OPENGLES3", "1", "file://gles3-sample-unittest.tar.bz2", "file://gles2-sample-unittest.tar.bz2", d )}'
+S = '${@base_conditional( "OPENGLES3", "1", "${WORKDIR}/gles3-sample-unittest", "${WORKDIR}/gles2-sample-unittest", d )}'
+
+do_patch[noexec] = "1"
+do_configure[noexec] = "1"
+do_populate_lic[noexec] = "1"
+
+do_compile() {
+ cd ${S}
+ make PKGROOT=${STAGING_DIR_HOST} LIBDRMROOT=${STAGING_DIR_HOST}${prefix}
+}
+
+do_install() {
+ # Copy binary into sysroot
+ mkdir -p ${D}/usr/local/bin/
+ if [ "X${OPENGLES3}" = "X0" ]; then
+ cp ${S}/OES2_Texture ${D}/usr/local/bin/
+ cp ${S}/FragShaderSample.fsh ${D}/usr/local/bin/
+ cp ${S}/VertShaderSample.vsh ${D}/usr/local/bin/
+ else
+ cp ${S}/OES3_Texture ${D}/usr/local/bin/
+ cp ${S}/OES3_FragShaderSample.fsh ${D}/usr/local/bin/
+ cp ${S}/OES3_VertShaderSample.vsh ${D}/usr/local/bin/
+ fi
+}
+
+PACKAGES = "\
+ ${PN} \
+ "
+FILES_${PN} = " \
+ /usr/local/bin/* \
+"
+RPROVIDES_${PN} += "gles-test-module"
+INSANE_SKIP_${PN} += "ldflags"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
diff --git a/meta-rcar-gen2/recipes-graphics/gles-module/gles-test-module/.gitkeep b/meta-rcar-gen2/recipes-graphics/gles-module/gles-test-module/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/gles-module/gles-test-module/.gitkeep
diff --git a/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module.bb b/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module.bb
new file mode 100644
index 0000000..3a12b27
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module.bb
@@ -0,0 +1,95 @@
+require ../../include/gles-control.inc
+
+DESCRIPTION = "SGX/RGX user module"
+LICENSE = "CLOSED"
+
+PN = "gles-user-module"
+PR = "r0"
+
+COMPATIBLE_MACHINE = "(r8a7790|r8a7791|r8a7793|r8a7794)"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+S_r8a7790 = "${WORKDIR}/rogue"
+GLES_r8a7790 = "rgx"
+S_r8a7791 = "${WORKDIR}/eurasia"
+GLES_r8a7791 = "sgx"
+S_r8a7793 = "${WORKDIR}/eurasia"
+GLES_r8a7793 = "sgx"
+S_r8a7794 = "${WORKDIR}/eurasia"
+GLES_r8a7794 = "sgx"
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+
+OPENGLES3 ?= "0"
+SRC_URI_r8a7790 = '${@base_conditional( "OPENGLES3", "1", \
+ "file://r8a7790_linux_rgx_binaries_gles3.tar.bz2", \
+ "file://r8a7790_linux_rgx_binaries_gles2.tar.bz2", d )}'
+SRC_URI_append_r8a7790 = " ${@base_contains("DISTRO_FEATURES", "wayland", " \
+ file://EGL_headers_for_wayland.patch \
+ file://change-shell.patch \
+ ", "", d)}"
+
+SRC_URI_r8a7791 = "file://r8a7791_linux_sgx_binaries_gles2.tar.bz2"
+SRC_URI_append_r8a7791 = " ${@base_contains("DISTRO_FEATURES", "wayland", " \
+ file://EGL_headers_for_wayland.patch \
+ ", "", d)}"
+
+SRC_URI_r8a7793 = "file://r8a7791_linux_sgx_binaries_gles2.tar.bz2"
+SRC_URI_append_r8a7793 = " ${@base_contains("DISTRO_FEATURES", "wayland", " \
+ file://EGL_headers_for_wayland.patch \
+ ", "", d)}"
+
+SRC_URI_r8a7794 = "file://r8a7794_linux_sgx_binaries_gles2.tar.bz2"
+SRC_URI_append_r8a7794 = " ${@base_contains("DISTRO_FEATURES", "wayland", " \
+ file://EGL_headers_for_wayland.patch \
+ ", "", d)}"
+
+do_populate_lic[noexec] = "1"
+do_compile[noexec] = "1"
+
+do_install() {
+ # Copy binary into sysroot
+ cp -r ${S}/etc ${D}
+ cp -r ${S}/usr ${D}
+
+ if [ "${USE_WAYLAND}" = "1" ]; then
+ # Rename libEGL.so
+ mv ${D}/usr/lib/libEGL.so ${D}/usr/lib/libEGL-pvr.so
+
+ # Set the "WindowSystem" parameter for wayland
+ if [ "${GLES}" = "rgx" ]; then
+ sed -i -e "s/WindowSystem=libpvrNULL_WSEGL.so/WindowSystem=libpvrWAYLAND_WSEGL.so/g" \
+ ${D}/${sysconfdir}/powervr.ini
+ elif [ "${GLES}" = "sgx" ]; then
+ sed -i -e "s/WindowSystem=libpvrPVR2D_FLIPWSEGL.so/WindowSystem=libpvrPVR2D_WAYLANDWSEGL.so/g" \
+ ${D}/${sysconfdir}/powervr.ini
+ fi
+ fi
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ ${sysconfdir}/* \
+ ${libdir}/* \
+ /usr/local/bin/* \
+"
+
+FILES_${PN}-dev = " \
+ ${includedir}/* \
+"
+
+inherit update-rc.d
+
+PROVIDES = "virtual/libgles2"
+PROVIDES_append = "${@base_contains("DISTRO_FEATURES", "wayland", "", " virtual/egl", d)}"
+RPROVIDES_${PN} += "${GLES}-user-module libgles2-mesa libgles2-mesa-dev libgles2 libgles2-dev"
+INSANE_SKIP_${PN} += "ldflags already-stripped"
+INSANE_SKIP_${PN}-dev += "ldflags"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+PRIVATE_LIBS_${PN} = "libEGL.so.1"
+INITSCRIPT_NAME = "rc.pvr"
+INITSCRIPT_PARAMS = "start 8 5 2 . stop 61 0 1 6 ."
diff --git a/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module/.gitkeep b/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module/.gitkeep
diff --git a/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module/EGL_headers_for_wayland.patch b/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module/EGL_headers_for_wayland.patch
new file mode 100644
index 0000000..bd906c0
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module/EGL_headers_for_wayland.patch
@@ -0,0 +1,32 @@
+--- a/usr/include/EGL/eglext.h
++++ b/usr/include/EGL/eglext.h
+@@ -638,6 +638,8 @@
+ #endif /* KHRONOS_SUPPORT_INT64 */
+ #endif /* EGL_NV_system_time */
+
++#include <EGL/eglmesaext.h>
++
+ #ifdef __cplusplus
+ }
+ #endif
+--- a/usr/include/EGL/eglplatform.h
++++ b/usr/include/EGL/eglplatform.h
+@@ -105,6 +105,18 @@
+ typedef Pixmap EGLNativePixmapType;
+ typedef Window EGLNativeWindowType;
+
++#elif defined(WL_EGL_PLATFORM)
++
++typedef struct wl_display *EGLNativeDisplayType;
++typedef struct wl_egl_pixmap *EGLNativePixmapType;
++typedef struct wl_egl_window *EGLNativeWindowType;
++
++#elif defined(__GBM__)
++
++typedef struct gbm_device *EGLNativeDisplayType;
++typedef struct gbm_bo *EGLNativePixmapType;
++typedef void *EGLNativeWindowType;
++
+ #else
+
+ /* NULLWS fallback */
diff --git a/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module/change-shell.patch b/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module/change-shell.patch
new file mode 100644
index 0000000..1dd22f4
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/gles-module/gles-user-module/change-shell.patch
@@ -0,0 +1,8 @@
+--- a/etc/init.d/rc.pvr 2014-08-01 09:56:47.528824893 +0900
++++ b/etc/init.d/rc.pvr 2014-08-01 09:56:55.744827677 +0900
+@@ -1,4 +1,4 @@
+-#!/bin/bash
++#!/bin/sh
+ ############################################################################ ###
+ #@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+ #@License Strictly Confidential.
diff --git a/meta-rcar-gen2/recipes-graphics/images/core-image-renesas-base.inc b/meta-rcar-gen2/recipes-graphics/images/core-image-renesas-base.inc
new file mode 100644
index 0000000..4f99a90
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/images/core-image-renesas-base.inc
@@ -0,0 +1,44 @@
+require ../../include/multimedia-control.inc
+require ../../include/gles-control.inc
+# common
+IMAGE_INSTALL_append_rcar-gen2 = " \
+ alsa-utils alsa-tools \
+ libdrm-tests \
+ libdrm-kms \
+ bash \
+"
+
+IMAGE_INSTALL_append_rcar-gen2 = " \
+ gstreamer1.0-plugins-base-videorate \
+ gstreamer1.0-plugins-base-videotestsrc \
+ gstreamer1.0-plugins-base-audiotestsrc \
+ gstreamer1.0-plugins-base-alsa \
+ gstreamer1.0-plugins-good-autodetect \
+ gstreamer1.0-plugins-good-isomp4 \
+ gstreamer1.0-plugins-good-video4linux2 \
+ gstreamer1.0-plugins-good-videocrop \
+ gstreamer1.0-plugins-bad-asfmux \
+ gstreamer1.0-plugins-bad-fbdevsink \
+ gstreamer1.0-plugins-bad-faad \
+ gstreamer1.0-plugins-bad-videoparsersbad \
+"
+
+IMAGE_INSTALL_append_rcar-gen2 = '${@base_conditional("USE_GLES", "1", \
+ "gles-kernel-module gles-user-module", "", d)}'
+
+# pkg groups for multimedia
+IMAGE_INSTALL_append_rcar-gen2 = ' ${@base_contains("USE_MULTIMEDIA", "1", " \
+ packagegroup-rcar-gen2-multimedia \
+ ", "", d)}'
+# pkg groups for multimedia test program
+IMAGE_INSTALL_append_rcar-gen2 = ' ${@base_contains("USE_MULTIMEDIA_TEST", "1", " \
+ packagegroup-rcar-gen2-multimedia-tp \
+ ", "", d)}'
+# pkg groups for dtv
+IMAGE_INSTALL_append_rcar-gen2 = ' ${@base_contains("USE_DTV", "1", " \
+ packagegroup-rcar-gen2-dtv \
+ ", "", d)}'
+# pkg groups for graphic test program
+IMAGE_INSTALL_append_rcar-gen2 = ' ${@base_contains("USE_GLES_TEST", "1", " \
+ gles-test-module \
+ ", "", d)}'
diff --git a/meta-rcar-gen2/recipes-graphics/images/core-image-weston-sdk.bb b/meta-rcar-gen2/recipes-graphics/images/core-image-weston-sdk.bb
new file mode 100644
index 0000000..c782fb2
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/images/core-image-weston-sdk.bb
@@ -0,0 +1,11 @@
+require recipes-graphics/images/core-image-weston.bb
+include core-image-weston.inc
+
+DESCRIPTION = "Image with weston support that includes everything within \
+core-image-weston plus meta-toolchain, development headers and libraries to \
+form a standalone SDK."
+
+IMAGE_FEATURES += "dev-pkgs tools-sdk tools-debug debug-tweaks ssh-server-openssh"
+
+IMAGE_INSTALL += "kernel-dev \
+ ltp"
diff --git a/meta-rcar-gen2/recipes-graphics/images/core-image-weston.bbappend b/meta-rcar-gen2/recipes-graphics/images/core-image-weston.bbappend
new file mode 100644
index 0000000..b1f7965
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/images/core-image-weston.bbappend
@@ -0,0 +1 @@
+include core-image-weston.inc
diff --git a/meta-rcar-gen2/recipes-graphics/images/core-image-weston.inc b/meta-rcar-gen2/recipes-graphics/images/core-image-weston.inc
new file mode 100644
index 0000000..782752c
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/images/core-image-weston.inc
@@ -0,0 +1,24 @@
+include core-image-renesas-base.inc
+
+IMAGE_INSTALL_append_rcar-gen2 = '${@base_conditional("USE_GLES", "1", \
+ " libegl libegl-dev libgbm-dev", "", d)} \
+ gstreamer1.0-plugins-bad-waylandsink'
+
+# pkg groups for oss codecs
+IMAGE_INSTALL_append_silk = ' ${@base_conditional("USE_MULTIMEDIA", "1", " \
+ packagegroup-lcb-oss-codecs \
+ ", "", d)}'
+
+IMAGE_INSTALL_append_silk = " \
+ can-utils \
+ libsocketcan \
+"
+
+IMAGE_INSTALL_append_porter = ' ${@base_conditional("USE_MULTIMEDIA", "1", " \
+ packagegroup-lcb-oss-codecs \
+ ", "", d)}'
+
+IMAGE_INSTALL_append_porter = " \
+ can-utils \
+ libsocketcan \
+"
diff --git a/meta-rcar-gen2/recipes-graphics/images/core-image-x11-sdk.bb b/meta-rcar-gen2/recipes-graphics/images/core-image-x11-sdk.bb
new file mode 100644
index 0000000..991e51d
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/images/core-image-x11-sdk.bb
@@ -0,0 +1,11 @@
+require recipes-graphics/images/core-image-x11.bb
+include core-image-x11.inc
+
+DESCRIPTION = "Image with x11 support that includes everything within \
+core-image-x11 plus meta-toolchain, development headers and libraries to \
+form a standalone SDK."
+
+IMAGE_FEATURES += "dev-pkgs tools-sdk tools-debug debug-tweaks ssh-server-openssh"
+
+IMAGE_INSTALL += "kernel-dev \
+ ltp"
diff --git a/meta-rcar-gen2/recipes-graphics/images/core-image-x11.bbappend b/meta-rcar-gen2/recipes-graphics/images/core-image-x11.bbappend
new file mode 100644
index 0000000..6c43054
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/images/core-image-x11.bbappend
@@ -0,0 +1 @@
+include core-image-x11.inc
diff --git a/meta-rcar-gen2/recipes-graphics/images/core-image-x11.inc b/meta-rcar-gen2/recipes-graphics/images/core-image-x11.inc
new file mode 100644
index 0000000..cbb1017
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/images/core-image-x11.inc
@@ -0,0 +1,24 @@
+include core-image-renesas-base.inc
+
+IMAGE_FEATURES += "x11-sato ssh-server-dropbear"
+
+IMAGE_INSTALL += "packagegroup-core-x11-sato-games"
+
+# pkg groups for oss codecs
+IMAGE_INSTALL_append_silk = ' ${@base_conditional("USE_MULTIMEDIA", "1", " \
+ packagegroup-lcb-oss-codecs \
+ ", "", d)}'
+
+IMAGE_INSTALL_append_silk = " \
+ can-utils \
+ libsocketcan \
+"
+
+IMAGE_INSTALL_append_porter = ' ${@base_conditional("USE_MULTIMEDIA", "1", " \
+ packagegroup-lcb-oss-codecs \
+ ", "", d)}'
+
+IMAGE_INSTALL_append_porter = " \
+ can-utils \
+ libsocketcan \
+"
diff --git a/meta-rcar-gen2/recipes-graphics/mesa/mesa-dummy.inc b/meta-rcar-gen2/recipes-graphics/mesa/mesa-dummy.inc
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/mesa/mesa-dummy.inc
diff --git a/meta-rcar-gen2/recipes-graphics/mesa/mesa-wayland.inc b/meta-rcar-gen2/recipes-graphics/mesa/mesa-wayland.inc
new file mode 100644
index 0000000..e58535e
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/mesa/mesa-wayland.inc
@@ -0,0 +1,22 @@
+# FIXME: can not override PACKAGECONFIG.
+PACKAGECONFIG[gles] = "--enable-gles1 --disable-gles2"
+PACKAGECONFIG[egl] = "--enable-egl --with-egl-platforms=wayland"
+
+# Disable the gbm modules of mesa
+EXTRA_OECONF_rcar-gen2 := "${@'${EXTRA_OECONF}'.replace('--enable-gbm', '--disable-gbm')}"
+# Remove the gbm and egl packages. These are provided in other recipes.
+PACKAGES_remove_rcar-gen2 = "libgbm-dev libgbm libegl-mesa-dev libegl-mesa libegl-dev libegl libgles2-mesa libgles2-mesa-dev"
+
+# Remove the x11 configure
+PACKAGECONFIG_rcar-gen2 := "${@'${PACKAGECONFIG}'.replace('x11', '')}"
+
+do_install_append_rcar-gen2() {
+ # Remove libegl-mesa modules and headers
+ rm -f ${D}/usr/lib/libEGL.la
+ rm -f ${D}/usr/lib/libEGL.so*
+ rm -f ${D}/usr/lib/pkgconfig/egl.pc
+ rm -rf ${D}/usr/include/KHR
+ rm -rf ${D}/usr/include/EGL
+}
+
+# FILES_${PN}-dbg += "${libdir}/src/debug/*"
diff --git a/meta-rcar-gen2/recipes-graphics/mesa/mesa-x11.inc b/meta-rcar-gen2/recipes-graphics/mesa/mesa-x11.inc
new file mode 100644
index 0000000..21c497c
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/mesa/mesa-x11.inc
@@ -0,0 +1,4 @@
+# FIXME: can not override PACKAGECONFIG[*]
+PACKAGECONFIG[gles] = "--enable-gles1 --disable-gles2"
+
+PACKAGECONFIG_remove_rcar-gen2 = "egl"
diff --git a/meta-rcar-gen2/recipes-graphics/mesa/mesa_9.2.5.bbappend b/meta-rcar-gen2/recipes-graphics/mesa/mesa_9.2.5.bbappend
new file mode 100644
index 0000000..c7f7f28
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/mesa/mesa_9.2.5.bbappend
@@ -0,0 +1,13 @@
+require ../../include/gles-control.inc
+
+def map_libs(d):
+ if base_conditional('USE_GLES_WAYLAND', "1", "1", "0", d) == "1":
+ return "wayland"
+
+ if base_conditional('USE_GLES_X11', "1", "1", "0", d) == "1":
+ return "x11"
+
+ return "dummy"
+
+MESATARGET := "${@map_libs(d)}"
+include mesa-${MESATARGET}.inc
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/libegl.bb b/meta-rcar-gen2/recipes-graphics/wayland/libegl.bb
new file mode 100644
index 0000000..e79d52d
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/libegl.bb
@@ -0,0 +1,18 @@
+SUMMARY = "EGL library"
+LICENSE = "Apache-2.0 & MIT"
+LIC_FILES_CHKSUM = "file://egl.c;beginline=5;endline=15;md5=3677623633a6e459b1f60b1e541c4212"
+
+COMPATIBLE_MACHINE = "(r8a7790|r8a7791|r8a7793|r8a7794)"
+
+PROVIDES = "${@base_contains("DISTRO_FEATURES", "wayland", "virtual/egl", "", d)}"
+SRCREV = "ee4bce93878d02a144ae6ebfba1eff28fe9b4442"
+SRC_URI = "git://github.com/thayama/libegl;protocol=git;branch=master \
+ file://0001-libegl-Remove-duplicate-header-files-of-gles-user-mo.patch"
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+
+S = "${WORKDIR}/git"
+
+inherit autotools pkgconfig
+
+DEPENDS = "libgbm gles-user-module"
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/libegl/0001-libegl-Remove-duplicate-header-files-of-gles-user-mo.patch b/meta-rcar-gen2/recipes-graphics/wayland/libegl/0001-libegl-Remove-duplicate-header-files-of-gles-user-mo.patch
new file mode 100644
index 0000000..c718a48
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/libegl/0001-libegl-Remove-duplicate-header-files-of-gles-user-mo.patch
@@ -0,0 +1,4091 @@
+From 20fe4af12ceca848c2b0758b2b7be354cd5da103 Mon Sep 17 00:00:00 2001
+From: Tomohiro Komagata <tomohiro.komagata.aj@renesas.com>
+Date: Tue, 21 Oct 2014 10:23:58 +0900
+Subject: [PATCH] libegl: Remove duplicate header files of gles-user-module.
+
+These header files are provided by gles-user-module too.
+And, when libegl is compiled, these header files in sysroot
+are refered by this patch.
+
+Signed-off-by: Tomohiro Komagata <tomohiro.komagata.aj@renesas.com>
+---
+ Makefile.am | 15 +-
+ include/EGL/egl.h | 329 -------
+ include/EGL/eglext.h | 580 ------------
+ include/EGL/eglplatform.h | 105 ---
+ include/GLES2/gl2.h | 620 -------------
+ include/GLES2/gl2ext.h | 2051 -------------------------------------------
+ include/GLES2/gl2platform.h | 30 -
+ include/KHR/khrplatform.h | 277 ------
+ 8 files changed, 1 insertion(+), 4006 deletions(-)
+ delete mode 100644 include/EGL/egl.h
+ delete mode 100644 include/EGL/eglext.h
+ delete mode 100644 include/EGL/eglplatform.h
+ delete mode 100644 include/GLES2/gl2.h
+ delete mode 100644 include/GLES2/gl2ext.h
+ delete mode 100644 include/GLES2/gl2platform.h
+ delete mode 100644 include/KHR/khrplatform.h
+
+diff --git a/Makefile.am b/Makefile.am
+index 4859e8d..b354344 100644
+--- a/Makefile.am
++++ b/Makefile.am
+@@ -17,20 +17,7 @@ libEGL_la_LDFLAGS = -version-info 1:0:0
+
+ egldir = $(includedir)/EGL
+ egl_HEADERS = \
+- $(top_srcdir)/include/EGL/eglmesaext.h \
+- $(top_srcdir)/include/EGL/egl.h \
+- $(top_srcdir)/include/EGL/eglplatform.h \
+- $(top_srcdir)/include/EGL/eglext.h
+-
+-khrdir = $(includedir)/KHR
+-khr_HEADERS = \
+- $(top_srcdir)/include/KHR/khrplatform.h
+-
+-gles2dir = $(includedir)/GLES2
+-gles2_HEADERS = \
+- $(top_srcdir)/include/GLES2/gl2ext.h \
+- $(top_srcdir)/include/GLES2/gl2platform.h \
+- $(top_srcdir)/include/GLES2/gl2.h
++ $(top_srcdir)/include/EGL/eglmesaext.h
+
+ pkgconfigdir = $(libdir)/pkgconfig
+ pkgconfig_DATA = egl.pc glesv2.pc
+diff --git a/include/EGL/egl.h b/include/EGL/egl.h
+deleted file mode 100644
+index 99ea342..0000000
+--- a/include/EGL/egl.h
++++ /dev/null
+@@ -1,329 +0,0 @@
+-/* -*- mode: c; tab-width: 8; -*- */
+-/* vi: set sw=4 ts=8: */
+-/* Reference version of egl.h for EGL 1.4.
+- * $Revision: 9356 $ on $Date: 2009-10-21 02:52:25 -0700 (Wed, 21 Oct 2009) $
+- */
+-
+-/*
+-** Copyright (c) 2007-2009 The Khronos Group Inc.
+-**
+-** Permission is hereby granted, free of charge, to any person obtaining a
+-** copy of this software and/or associated documentation files (the
+-** "Materials"), to deal in the Materials without restriction, including
+-** without limitation the rights to use, copy, modify, merge, publish,
+-** distribute, sublicense, and/or sell copies of the Materials, and to
+-** permit persons to whom the Materials are furnished to do so, subject to
+-** the following conditions:
+-**
+-** The above copyright notice and this permission notice shall be included
+-** in all copies or substantial portions of the Materials.
+-**
+-** THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+-** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+-** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+-** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+-** CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+-** TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+-** MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
+-*/
+-
+-#ifndef __egl_h_
+-#define __egl_h_
+-
+-/* All platform-dependent types and macro boilerplate (such as EGLAPI
+- * and EGLAPIENTRY) should go in eglplatform.h.
+- */
+-#include <EGL/eglplatform.h>
+-
+-#ifdef __cplusplus
+-extern "C" {
+-#endif
+-
+-/* EGL Types */
+-/* EGLint is defined in eglplatform.h */
+-typedef unsigned int EGLBoolean;
+-typedef unsigned int EGLenum;
+-typedef void *EGLConfig;
+-typedef void *EGLContext;
+-typedef void *EGLDisplay;
+-typedef void *EGLSurface;
+-typedef void *EGLClientBuffer;
+-
+-/* EGL Versioning */
+-#define EGL_VERSION_1_0 1
+-#define EGL_VERSION_1_1 1
+-#define EGL_VERSION_1_2 1
+-#define EGL_VERSION_1_3 1
+-#define EGL_VERSION_1_4 1
+-
+-/* EGL Enumerants. Bitmasks and other exceptional cases aside, most
+- * enums are assigned unique values starting at 0x3000.
+- */
+-
+-/* EGL aliases */
+-#define EGL_FALSE 0
+-#define EGL_TRUE 1
+-
+-/* Out-of-band handle values */
+-#define EGL_DEFAULT_DISPLAY ((EGLNativeDisplayType)0)
+-#define EGL_NO_CONTEXT ((EGLContext)0)
+-#define EGL_NO_DISPLAY ((EGLDisplay)0)
+-#define EGL_NO_SURFACE ((EGLSurface)0)
+-
+-/* Out-of-band attribute value */
+-#define EGL_DONT_CARE ((EGLint)-1)
+-
+-/* Errors / GetError return values */
+-#define EGL_SUCCESS 0x3000
+-#define EGL_NOT_INITIALIZED 0x3001
+-#define EGL_BAD_ACCESS 0x3002
+-#define EGL_BAD_ALLOC 0x3003
+-#define EGL_BAD_ATTRIBUTE 0x3004
+-#define EGL_BAD_CONFIG 0x3005
+-#define EGL_BAD_CONTEXT 0x3006
+-#define EGL_BAD_CURRENT_SURFACE 0x3007
+-#define EGL_BAD_DISPLAY 0x3008
+-#define EGL_BAD_MATCH 0x3009
+-#define EGL_BAD_NATIVE_PIXMAP 0x300A
+-#define EGL_BAD_NATIVE_WINDOW 0x300B
+-#define EGL_BAD_PARAMETER 0x300C
+-#define EGL_BAD_SURFACE 0x300D
+-#define EGL_CONTEXT_LOST 0x300E /* EGL 1.1 - IMG_power_management */
+-
+-/* Reserved 0x300F-0x301F for additional errors */
+-
+-/* Config attributes */
+-#define EGL_BUFFER_SIZE 0x3020
+-#define EGL_ALPHA_SIZE 0x3021
+-#define EGL_BLUE_SIZE 0x3022
+-#define EGL_GREEN_SIZE 0x3023
+-#define EGL_RED_SIZE 0x3024
+-#define EGL_DEPTH_SIZE 0x3025
+-#define EGL_STENCIL_SIZE 0x3026
+-#define EGL_CONFIG_CAVEAT 0x3027
+-#define EGL_CONFIG_ID 0x3028
+-#define EGL_LEVEL 0x3029
+-#define EGL_MAX_PBUFFER_HEIGHT 0x302A
+-#define EGL_MAX_PBUFFER_PIXELS 0x302B
+-#define EGL_MAX_PBUFFER_WIDTH 0x302C
+-#define EGL_NATIVE_RENDERABLE 0x302D
+-#define EGL_NATIVE_VISUAL_ID 0x302E
+-#define EGL_NATIVE_VISUAL_TYPE 0x302F
+-#define EGL_SAMPLES 0x3031
+-#define EGL_SAMPLE_BUFFERS 0x3032
+-#define EGL_SURFACE_TYPE 0x3033
+-#define EGL_TRANSPARENT_TYPE 0x3034
+-#define EGL_TRANSPARENT_BLUE_VALUE 0x3035
+-#define EGL_TRANSPARENT_GREEN_VALUE 0x3036
+-#define EGL_TRANSPARENT_RED_VALUE 0x3037
+-#define EGL_NONE 0x3038 /* Attrib list terminator */
+-#define EGL_BIND_TO_TEXTURE_RGB 0x3039
+-#define EGL_BIND_TO_TEXTURE_RGBA 0x303A
+-#define EGL_MIN_SWAP_INTERVAL 0x303B
+-#define EGL_MAX_SWAP_INTERVAL 0x303C
+-#define EGL_LUMINANCE_SIZE 0x303D
+-#define EGL_ALPHA_MASK_SIZE 0x303E
+-#define EGL_COLOR_BUFFER_TYPE 0x303F
+-#define EGL_RENDERABLE_TYPE 0x3040
+-#define EGL_MATCH_NATIVE_PIXMAP 0x3041 /* Pseudo-attribute (not queryable) */
+-#define EGL_CONFORMANT 0x3042
+-
+-/* Reserved 0x3041-0x304F for additional config attributes */
+-
+-/* Config attribute values */
+-#define EGL_SLOW_CONFIG 0x3050 /* EGL_CONFIG_CAVEAT value */
+-#define EGL_NON_CONFORMANT_CONFIG 0x3051 /* EGL_CONFIG_CAVEAT value */
+-#define EGL_TRANSPARENT_RGB 0x3052 /* EGL_TRANSPARENT_TYPE value */
+-#define EGL_RGB_BUFFER 0x308E /* EGL_COLOR_BUFFER_TYPE value */
+-#define EGL_LUMINANCE_BUFFER 0x308F /* EGL_COLOR_BUFFER_TYPE value */
+-
+-/* More config attribute values, for EGL_TEXTURE_FORMAT */
+-#define EGL_NO_TEXTURE 0x305C
+-#define EGL_TEXTURE_RGB 0x305D
+-#define EGL_TEXTURE_RGBA 0x305E
+-#define EGL_TEXTURE_2D 0x305F
+-
+-/* Config attribute mask bits */
+-#define EGL_PBUFFER_BIT 0x0001 /* EGL_SURFACE_TYPE mask bits */
+-#define EGL_PIXMAP_BIT 0x0002 /* EGL_SURFACE_TYPE mask bits */
+-#define EGL_WINDOW_BIT 0x0004 /* EGL_SURFACE_TYPE mask bits */
+-#define EGL_VG_COLORSPACE_LINEAR_BIT 0x0020 /* EGL_SURFACE_TYPE mask bits */
+-#define EGL_VG_ALPHA_FORMAT_PRE_BIT 0x0040 /* EGL_SURFACE_TYPE mask bits */
+-#define EGL_MULTISAMPLE_RESOLVE_BOX_BIT 0x0200 /* EGL_SURFACE_TYPE mask bits */
+-#define EGL_SWAP_BEHAVIOR_PRESERVED_BIT 0x0400 /* EGL_SURFACE_TYPE mask bits */
+-
+-#define EGL_OPENGL_ES_BIT 0x0001 /* EGL_RENDERABLE_TYPE mask bits */
+-#define EGL_OPENVG_BIT 0x0002 /* EGL_RENDERABLE_TYPE mask bits */
+-#define EGL_OPENGL_ES2_BIT 0x0004 /* EGL_RENDERABLE_TYPE mask bits */
+-#define EGL_OPENGL_BIT 0x0008 /* EGL_RENDERABLE_TYPE mask bits */
+-
+-/* QueryString targets */
+-#define EGL_VENDOR 0x3053
+-#define EGL_VERSION 0x3054
+-#define EGL_EXTENSIONS 0x3055
+-#define EGL_CLIENT_APIS 0x308D
+-
+-/* QuerySurface / SurfaceAttrib / CreatePbufferSurface targets */
+-#define EGL_HEIGHT 0x3056
+-#define EGL_WIDTH 0x3057
+-#define EGL_LARGEST_PBUFFER 0x3058
+-#define EGL_TEXTURE_FORMAT 0x3080
+-#define EGL_TEXTURE_TARGET 0x3081
+-#define EGL_MIPMAP_TEXTURE 0x3082
+-#define EGL_MIPMAP_LEVEL 0x3083
+-#define EGL_RENDER_BUFFER 0x3086
+-#define EGL_VG_COLORSPACE 0x3087
+-#define EGL_VG_ALPHA_FORMAT 0x3088
+-#define EGL_HORIZONTAL_RESOLUTION 0x3090
+-#define EGL_VERTICAL_RESOLUTION 0x3091
+-#define EGL_PIXEL_ASPECT_RATIO 0x3092
+-#define EGL_SWAP_BEHAVIOR 0x3093
+-#define EGL_MULTISAMPLE_RESOLVE 0x3099
+-
+-/* EGL_RENDER_BUFFER values / BindTexImage / ReleaseTexImage buffer targets */
+-#define EGL_BACK_BUFFER 0x3084
+-#define EGL_SINGLE_BUFFER 0x3085
+-
+-/* OpenVG color spaces */
+-#define EGL_VG_COLORSPACE_sRGB 0x3089 /* EGL_VG_COLORSPACE value */
+-#define EGL_VG_COLORSPACE_LINEAR 0x308A /* EGL_VG_COLORSPACE value */
+-
+-/* OpenVG alpha formats */
+-#define EGL_VG_ALPHA_FORMAT_NONPRE 0x308B /* EGL_ALPHA_FORMAT value */
+-#define EGL_VG_ALPHA_FORMAT_PRE 0x308C /* EGL_ALPHA_FORMAT value */
+-
+-/* Constant scale factor by which fractional display resolutions &
+- * aspect ratio are scaled when queried as integer values.
+- */
+-#define EGL_DISPLAY_SCALING 10000
+-
+-/* Unknown display resolution/aspect ratio */
+-#define EGL_UNKNOWN ((EGLint)-1)
+-
+-/* Back buffer swap behaviors */
+-#define EGL_BUFFER_PRESERVED 0x3094 /* EGL_SWAP_BEHAVIOR value */
+-#define EGL_BUFFER_DESTROYED 0x3095 /* EGL_SWAP_BEHAVIOR value */
+-
+-/* CreatePbufferFromClientBuffer buffer types */
+-#define EGL_OPENVG_IMAGE 0x3096
+-
+-/* QueryContext targets */
+-#define EGL_CONTEXT_CLIENT_TYPE 0x3097
+-
+-/* CreateContext attributes */
+-#define EGL_CONTEXT_CLIENT_VERSION 0x3098
+-
+-/* Multisample resolution behaviors */
+-#define EGL_MULTISAMPLE_RESOLVE_DEFAULT 0x309A /* EGL_MULTISAMPLE_RESOLVE value */
+-#define EGL_MULTISAMPLE_RESOLVE_BOX 0x309B /* EGL_MULTISAMPLE_RESOLVE value */
+-
+-/* BindAPI/QueryAPI targets */
+-#define EGL_OPENGL_ES_API 0x30A0
+-#define EGL_OPENVG_API 0x30A1
+-#define EGL_OPENGL_API 0x30A2
+-
+-/* GetCurrentSurface targets */
+-#define EGL_DRAW 0x3059
+-#define EGL_READ 0x305A
+-
+-/* WaitNative engines */
+-#define EGL_CORE_NATIVE_ENGINE 0x305B
+-
+-/* EGL 1.2 tokens renamed for consistency in EGL 1.3 */
+-#define EGL_COLORSPACE EGL_VG_COLORSPACE
+-#define EGL_ALPHA_FORMAT EGL_VG_ALPHA_FORMAT
+-#define EGL_COLORSPACE_sRGB EGL_VG_COLORSPACE_sRGB
+-#define EGL_COLORSPACE_LINEAR EGL_VG_COLORSPACE_LINEAR
+-#define EGL_ALPHA_FORMAT_NONPRE EGL_VG_ALPHA_FORMAT_NONPRE
+-#define EGL_ALPHA_FORMAT_PRE EGL_VG_ALPHA_FORMAT_PRE
+-
+-/* EGL extensions must request enum blocks from the Khronos
+- * API Registrar, who maintains the enumerant registry. Submit
+- * a bug in Khronos Bugzilla against task "Registry".
+- */
+-
+-
+-
+-/* EGL Functions */
+-
+-EGLAPI EGLint EGLAPIENTRY eglGetError(void);
+-
+-EGLAPI EGLDisplay EGLAPIENTRY eglGetDisplay(EGLNativeDisplayType display_id);
+-EGLAPI EGLBoolean EGLAPIENTRY eglInitialize(EGLDisplay dpy, EGLint *major, EGLint *minor);
+-EGLAPI EGLBoolean EGLAPIENTRY eglTerminate(EGLDisplay dpy);
+-
+-EGLAPI const char * EGLAPIENTRY eglQueryString(EGLDisplay dpy, EGLint name);
+-
+-EGLAPI EGLBoolean EGLAPIENTRY eglGetConfigs(EGLDisplay dpy, EGLConfig *configs,
+- EGLint config_size, EGLint *num_config);
+-EGLAPI EGLBoolean EGLAPIENTRY eglChooseConfig(EGLDisplay dpy, const EGLint *attrib_list,
+- EGLConfig *configs, EGLint config_size,
+- EGLint *num_config);
+-EGLAPI EGLBoolean EGLAPIENTRY eglGetConfigAttrib(EGLDisplay dpy, EGLConfig config,
+- EGLint attribute, EGLint *value);
+-
+-EGLAPI EGLSurface EGLAPIENTRY eglCreateWindowSurface(EGLDisplay dpy, EGLConfig config,
+- EGLNativeWindowType win,
+- const EGLint *attrib_list);
+-EGLAPI EGLSurface EGLAPIENTRY eglCreatePbufferSurface(EGLDisplay dpy, EGLConfig config,
+- const EGLint *attrib_list);
+-EGLAPI EGLSurface EGLAPIENTRY eglCreatePixmapSurface(EGLDisplay dpy, EGLConfig config,
+- EGLNativePixmapType pixmap,
+- const EGLint *attrib_list);
+-EGLAPI EGLBoolean EGLAPIENTRY eglDestroySurface(EGLDisplay dpy, EGLSurface surface);
+-EGLAPI EGLBoolean EGLAPIENTRY eglQuerySurface(EGLDisplay dpy, EGLSurface surface,
+- EGLint attribute, EGLint *value);
+-
+-EGLAPI EGLBoolean EGLAPIENTRY eglBindAPI(EGLenum api);
+-EGLAPI EGLenum EGLAPIENTRY eglQueryAPI(void);
+-
+-EGLAPI EGLBoolean EGLAPIENTRY eglWaitClient(void);
+-
+-EGLAPI EGLBoolean EGLAPIENTRY eglReleaseThread(void);
+-
+-EGLAPI EGLSurface EGLAPIENTRY eglCreatePbufferFromClientBuffer(
+- EGLDisplay dpy, EGLenum buftype, EGLClientBuffer buffer,
+- EGLConfig config, const EGLint *attrib_list);
+-
+-EGLAPI EGLBoolean EGLAPIENTRY eglSurfaceAttrib(EGLDisplay dpy, EGLSurface surface,
+- EGLint attribute, EGLint value);
+-EGLAPI EGLBoolean EGLAPIENTRY eglBindTexImage(EGLDisplay dpy, EGLSurface surface, EGLint buffer);
+-EGLAPI EGLBoolean EGLAPIENTRY eglReleaseTexImage(EGLDisplay dpy, EGLSurface surface, EGLint buffer);
+-
+-
+-EGLAPI EGLBoolean EGLAPIENTRY eglSwapInterval(EGLDisplay dpy, EGLint interval);
+-
+-
+-EGLAPI EGLContext EGLAPIENTRY eglCreateContext(EGLDisplay dpy, EGLConfig config,
+- EGLContext share_context,
+- const EGLint *attrib_list);
+-EGLAPI EGLBoolean EGLAPIENTRY eglDestroyContext(EGLDisplay dpy, EGLContext ctx);
+-EGLAPI EGLBoolean EGLAPIENTRY eglMakeCurrent(EGLDisplay dpy, EGLSurface draw,
+- EGLSurface read, EGLContext ctx);
+-
+-EGLAPI EGLContext EGLAPIENTRY eglGetCurrentContext(void);
+-EGLAPI EGLSurface EGLAPIENTRY eglGetCurrentSurface(EGLint readdraw);
+-EGLAPI EGLDisplay EGLAPIENTRY eglGetCurrentDisplay(void);
+-EGLAPI EGLBoolean EGLAPIENTRY eglQueryContext(EGLDisplay dpy, EGLContext ctx,
+- EGLint attribute, EGLint *value);
+-
+-EGLAPI EGLBoolean EGLAPIENTRY eglWaitGL(void);
+-EGLAPI EGLBoolean EGLAPIENTRY eglWaitNative(EGLint engine);
+-EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffers(EGLDisplay dpy, EGLSurface surface);
+-EGLAPI EGLBoolean EGLAPIENTRY eglCopyBuffers(EGLDisplay dpy, EGLSurface surface,
+- EGLNativePixmapType target);
+-
+-/* This is a generic function pointer type, whose name indicates it must
+- * be cast to the proper type *and calling convention* before use.
+- */
+-typedef void (*__eglMustCastToProperFunctionPointerType)(void);
+-
+-/* Now, define eglGetProcAddress using the generic function ptr. type */
+-EGLAPI __eglMustCastToProperFunctionPointerType EGLAPIENTRY
+- eglGetProcAddress(const char *procname);
+-
+-#ifdef __cplusplus
+-}
+-#endif
+-
+-#endif /* __egl_h_ */
+diff --git a/include/EGL/eglext.h b/include/EGL/eglext.h
+deleted file mode 100644
+index 1d68178..0000000
+--- a/include/EGL/eglext.h
++++ /dev/null
+@@ -1,580 +0,0 @@
+-#ifndef __eglext_h_
+-#define __eglext_h_
+-
+-#ifdef __cplusplus
+-extern "C" {
+-#endif
+-
+-/*
+-** Copyright (c) 2007-2013 The Khronos Group Inc.
+-**
+-** Permission is hereby granted, free of charge, to any person obtaining a
+-** copy of this software and/or associated documentation files (the
+-** "Materials"), to deal in the Materials without restriction, including
+-** without limitation the rights to use, copy, modify, merge, publish,
+-** distribute, sublicense, and/or sell copies of the Materials, and to
+-** permit persons to whom the Materials are furnished to do so, subject to
+-** the following conditions:
+-**
+-** The above copyright notice and this permission notice shall be included
+-** in all copies or substantial portions of the Materials.
+-**
+-** THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+-** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+-** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+-** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+-** CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+-** TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+-** MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
+-*/
+-
+-#include <EGL/eglplatform.h>
+-
+-/*************************************************************/
+-
+-/* Header file version number */
+-/* Current version at http://www.khronos.org/registry/egl/ */
+-/* $Revision: 21254 $ on $Date: 2013-04-25 03:11:55 -0700 (Thu, 25 Apr 2013) $ */
+-#define EGL_EGLEXT_VERSION 16
+-
+-#ifndef EGL_KHR_config_attribs
+-#define EGL_KHR_config_attribs 1
+-#define EGL_CONFORMANT_KHR 0x3042 /* EGLConfig attribute */
+-#define EGL_VG_COLORSPACE_LINEAR_BIT_KHR 0x0020 /* EGL_SURFACE_TYPE bitfield */
+-#define EGL_VG_ALPHA_FORMAT_PRE_BIT_KHR 0x0040 /* EGL_SURFACE_TYPE bitfield */
+-#endif
+-
+-#ifndef EGL_KHR_lock_surface
+-#define EGL_KHR_lock_surface 1
+-#define EGL_READ_SURFACE_BIT_KHR 0x0001 /* EGL_LOCK_USAGE_HINT_KHR bitfield */
+-#define EGL_WRITE_SURFACE_BIT_KHR 0x0002 /* EGL_LOCK_USAGE_HINT_KHR bitfield */
+-#define EGL_LOCK_SURFACE_BIT_KHR 0x0080 /* EGL_SURFACE_TYPE bitfield */
+-#define EGL_OPTIMAL_FORMAT_BIT_KHR 0x0100 /* EGL_SURFACE_TYPE bitfield */
+-#define EGL_MATCH_FORMAT_KHR 0x3043 /* EGLConfig attribute */
+-#define EGL_FORMAT_RGB_565_EXACT_KHR 0x30C0 /* EGL_MATCH_FORMAT_KHR value */
+-#define EGL_FORMAT_RGB_565_KHR 0x30C1 /* EGL_MATCH_FORMAT_KHR value */
+-#define EGL_FORMAT_RGBA_8888_EXACT_KHR 0x30C2 /* EGL_MATCH_FORMAT_KHR value */
+-#define EGL_FORMAT_RGBA_8888_KHR 0x30C3 /* EGL_MATCH_FORMAT_KHR value */
+-#define EGL_MAP_PRESERVE_PIXELS_KHR 0x30C4 /* eglLockSurfaceKHR attribute */
+-#define EGL_LOCK_USAGE_HINT_KHR 0x30C5 /* eglLockSurfaceKHR attribute */
+-#define EGL_BITMAP_POINTER_KHR 0x30C6 /* eglQuerySurface attribute */
+-#define EGL_BITMAP_PITCH_KHR 0x30C7 /* eglQuerySurface attribute */
+-#define EGL_BITMAP_ORIGIN_KHR 0x30C8 /* eglQuerySurface attribute */
+-#define EGL_BITMAP_PIXEL_RED_OFFSET_KHR 0x30C9 /* eglQuerySurface attribute */
+-#define EGL_BITMAP_PIXEL_GREEN_OFFSET_KHR 0x30CA /* eglQuerySurface attribute */
+-#define EGL_BITMAP_PIXEL_BLUE_OFFSET_KHR 0x30CB /* eglQuerySurface attribute */
+-#define EGL_BITMAP_PIXEL_ALPHA_OFFSET_KHR 0x30CC /* eglQuerySurface attribute */
+-#define EGL_BITMAP_PIXEL_LUMINANCE_OFFSET_KHR 0x30CD /* eglQuerySurface attribute */
+-#define EGL_LOWER_LEFT_KHR 0x30CE /* EGL_BITMAP_ORIGIN_KHR value */
+-#define EGL_UPPER_LEFT_KHR 0x30CF /* EGL_BITMAP_ORIGIN_KHR value */
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLBoolean EGLAPIENTRY eglLockSurfaceKHR (EGLDisplay display, EGLSurface surface, const EGLint *attrib_list);
+-EGLAPI EGLBoolean EGLAPIENTRY eglUnlockSurfaceKHR (EGLDisplay display, EGLSurface surface);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLLOCKSURFACEKHRPROC) (EGLDisplay display, EGLSurface surface, const EGLint *attrib_list);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLUNLOCKSURFACEKHRPROC) (EGLDisplay display, EGLSurface surface);
+-#endif
+-
+-#ifndef EGL_KHR_image
+-#define EGL_KHR_image 1
+-#define EGL_NATIVE_PIXMAP_KHR 0x30B0 /* eglCreateImageKHR target */
+-typedef void *EGLImageKHR;
+-#define EGL_NO_IMAGE_KHR ((EGLImageKHR)0)
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLImageKHR EGLAPIENTRY eglCreateImageKHR (EGLDisplay dpy, EGLContext ctx, EGLenum target, EGLClientBuffer buffer, const EGLint *attrib_list);
+-EGLAPI EGLBoolean EGLAPIENTRY eglDestroyImageKHR (EGLDisplay dpy, EGLImageKHR image);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLImageKHR (EGLAPIENTRYP PFNEGLCREATEIMAGEKHRPROC) (EGLDisplay dpy, EGLContext ctx, EGLenum target, EGLClientBuffer buffer, const EGLint *attrib_list);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLDESTROYIMAGEKHRPROC) (EGLDisplay dpy, EGLImageKHR image);
+-#endif
+-
+-#ifndef EGL_KHR_vg_parent_image
+-#define EGL_KHR_vg_parent_image 1
+-#define EGL_VG_PARENT_IMAGE_KHR 0x30BA /* eglCreateImageKHR target */
+-#endif
+-
+-#ifndef EGL_KHR_gl_texture_2D_image
+-#define EGL_KHR_gl_texture_2D_image 1
+-#define EGL_GL_TEXTURE_2D_KHR 0x30B1 /* eglCreateImageKHR target */
+-#define EGL_GL_TEXTURE_LEVEL_KHR 0x30BC /* eglCreateImageKHR attribute */
+-#endif
+-
+-#ifndef EGL_KHR_gl_texture_cubemap_image
+-#define EGL_KHR_gl_texture_cubemap_image 1
+-#define EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_X_KHR 0x30B3 /* eglCreateImageKHR target */
+-#define EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_X_KHR 0x30B4 /* eglCreateImageKHR target */
+-#define EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_Y_KHR 0x30B5 /* eglCreateImageKHR target */
+-#define EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_KHR 0x30B6 /* eglCreateImageKHR target */
+-#define EGL_GL_TEXTURE_CUBE_MAP_POSITIVE_Z_KHR 0x30B7 /* eglCreateImageKHR target */
+-#define EGL_GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_KHR 0x30B8 /* eglCreateImageKHR target */
+-#endif
+-
+-#ifndef EGL_KHR_gl_texture_3D_image
+-#define EGL_KHR_gl_texture_3D_image 1
+-#define EGL_GL_TEXTURE_3D_KHR 0x30B2 /* eglCreateImageKHR target */
+-#define EGL_GL_TEXTURE_ZOFFSET_KHR 0x30BD /* eglCreateImageKHR attribute */
+-#endif
+-
+-#ifndef EGL_KHR_gl_renderbuffer_image
+-#define EGL_KHR_gl_renderbuffer_image 1
+-#define EGL_GL_RENDERBUFFER_KHR 0x30B9 /* eglCreateImageKHR target */
+-#endif
+-
+-#if KHRONOS_SUPPORT_INT64 /* EGLTimeKHR requires 64-bit uint support */
+-#ifndef EGL_KHR_reusable_sync
+-#define EGL_KHR_reusable_sync 1
+-
+-typedef void* EGLSyncKHR;
+-typedef khronos_utime_nanoseconds_t EGLTimeKHR;
+-
+-#define EGL_SYNC_STATUS_KHR 0x30F1
+-#define EGL_SIGNALED_KHR 0x30F2
+-#define EGL_UNSIGNALED_KHR 0x30F3
+-#define EGL_TIMEOUT_EXPIRED_KHR 0x30F5
+-#define EGL_CONDITION_SATISFIED_KHR 0x30F6
+-#define EGL_SYNC_TYPE_KHR 0x30F7
+-#define EGL_SYNC_REUSABLE_KHR 0x30FA
+-#define EGL_SYNC_FLUSH_COMMANDS_BIT_KHR 0x0001 /* eglClientWaitSyncKHR <flags> bitfield */
+-#define EGL_FOREVER_KHR 0xFFFFFFFFFFFFFFFFull
+-#define EGL_NO_SYNC_KHR ((EGLSyncKHR)0)
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLSyncKHR EGLAPIENTRY eglCreateSyncKHR(EGLDisplay dpy, EGLenum type, const EGLint *attrib_list);
+-EGLAPI EGLBoolean EGLAPIENTRY eglDestroySyncKHR(EGLDisplay dpy, EGLSyncKHR sync);
+-EGLAPI EGLint EGLAPIENTRY eglClientWaitSyncKHR(EGLDisplay dpy, EGLSyncKHR sync, EGLint flags, EGLTimeKHR timeout);
+-EGLAPI EGLBoolean EGLAPIENTRY eglSignalSyncKHR(EGLDisplay dpy, EGLSyncKHR sync, EGLenum mode);
+-EGLAPI EGLBoolean EGLAPIENTRY eglGetSyncAttribKHR(EGLDisplay dpy, EGLSyncKHR sync, EGLint attribute, EGLint *value);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLSyncKHR (EGLAPIENTRYP PFNEGLCREATESYNCKHRPROC) (EGLDisplay dpy, EGLenum type, const EGLint *attrib_list);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLDESTROYSYNCKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync);
+-typedef EGLint (EGLAPIENTRYP PFNEGLCLIENTWAITSYNCKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync, EGLint flags, EGLTimeKHR timeout);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLSIGNALSYNCKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync, EGLenum mode);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETSYNCATTRIBKHRPROC) (EGLDisplay dpy, EGLSyncKHR sync, EGLint attribute, EGLint *value);
+-#endif
+-#endif
+-
+-#ifndef EGL_KHR_image_base
+-#define EGL_KHR_image_base 1
+-/* Most interfaces defined by EGL_KHR_image_pixmap above */
+-#define EGL_IMAGE_PRESERVED_KHR 0x30D2 /* eglCreateImageKHR attribute */
+-#endif
+-
+-#ifndef EGL_KHR_image_pixmap
+-#define EGL_KHR_image_pixmap 1
+-/* Interfaces defined by EGL_KHR_image above */
+-#endif
+-
+-#ifndef EGL_IMG_context_priority
+-#define EGL_IMG_context_priority 1
+-#define EGL_CONTEXT_PRIORITY_LEVEL_IMG 0x3100
+-#define EGL_CONTEXT_PRIORITY_HIGH_IMG 0x3101
+-#define EGL_CONTEXT_PRIORITY_MEDIUM_IMG 0x3102
+-#define EGL_CONTEXT_PRIORITY_LOW_IMG 0x3103
+-#endif
+-
+-#ifndef EGL_KHR_lock_surface2
+-#define EGL_KHR_lock_surface2 1
+-#define EGL_BITMAP_PIXEL_SIZE_KHR 0x3110
+-#endif
+-
+-#ifndef EGL_NV_coverage_sample
+-#define EGL_NV_coverage_sample 1
+-#define EGL_COVERAGE_BUFFERS_NV 0x30E0
+-#define EGL_COVERAGE_SAMPLES_NV 0x30E1
+-#endif
+-
+-#ifndef EGL_NV_depth_nonlinear
+-#define EGL_NV_depth_nonlinear 1
+-#define EGL_DEPTH_ENCODING_NV 0x30E2
+-#define EGL_DEPTH_ENCODING_NONE_NV 0
+-#define EGL_DEPTH_ENCODING_NONLINEAR_NV 0x30E3
+-#endif
+-
+-#if KHRONOS_SUPPORT_INT64 /* EGLTimeNV requires 64-bit uint support */
+-#ifndef EGL_NV_sync
+-#define EGL_NV_sync 1
+-#define EGL_SYNC_PRIOR_COMMANDS_COMPLETE_NV 0x30E6
+-#define EGL_SYNC_STATUS_NV 0x30E7
+-#define EGL_SIGNALED_NV 0x30E8
+-#define EGL_UNSIGNALED_NV 0x30E9
+-#define EGL_SYNC_FLUSH_COMMANDS_BIT_NV 0x0001
+-#define EGL_FOREVER_NV 0xFFFFFFFFFFFFFFFFull
+-#define EGL_ALREADY_SIGNALED_NV 0x30EA
+-#define EGL_TIMEOUT_EXPIRED_NV 0x30EB
+-#define EGL_CONDITION_SATISFIED_NV 0x30EC
+-#define EGL_SYNC_TYPE_NV 0x30ED
+-#define EGL_SYNC_CONDITION_NV 0x30EE
+-#define EGL_SYNC_FENCE_NV 0x30EF
+-#define EGL_NO_SYNC_NV ((EGLSyncNV)0)
+-typedef void* EGLSyncNV;
+-typedef khronos_utime_nanoseconds_t EGLTimeNV;
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLSyncNV EGLAPIENTRY eglCreateFenceSyncNV (EGLDisplay dpy, EGLenum condition, const EGLint *attrib_list);
+-EGLAPI EGLBoolean EGLAPIENTRY eglDestroySyncNV (EGLSyncNV sync);
+-EGLAPI EGLBoolean EGLAPIENTRY eglFenceNV (EGLSyncNV sync);
+-EGLAPI EGLint EGLAPIENTRY eglClientWaitSyncNV (EGLSyncNV sync, EGLint flags, EGLTimeNV timeout);
+-EGLAPI EGLBoolean EGLAPIENTRY eglSignalSyncNV (EGLSyncNV sync, EGLenum mode);
+-EGLAPI EGLBoolean EGLAPIENTRY eglGetSyncAttribNV (EGLSyncNV sync, EGLint attribute, EGLint *value);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLSyncNV (EGLAPIENTRYP PFNEGLCREATEFENCESYNCNVPROC) (EGLDisplay dpy, EGLenum condition, const EGLint *attrib_list);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLDESTROYSYNCNVPROC) (EGLSyncNV sync);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLFENCENVPROC) (EGLSyncNV sync);
+-typedef EGLint (EGLAPIENTRYP PFNEGLCLIENTWAITSYNCNVPROC) (EGLSyncNV sync, EGLint flags, EGLTimeNV timeout);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLSIGNALSYNCNVPROC) (EGLSyncNV sync, EGLenum mode);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLGETSYNCATTRIBNVPROC) (EGLSyncNV sync, EGLint attribute, EGLint *value);
+-#endif
+-#endif
+-
+-#if KHRONOS_SUPPORT_INT64 /* Dependent on EGL_KHR_reusable_sync which requires 64-bit uint support */
+-#ifndef EGL_KHR_fence_sync
+-#define EGL_KHR_fence_sync 1
+-/* Reuses most tokens and entry points from EGL_KHR_reusable_sync */
+-#define EGL_SYNC_PRIOR_COMMANDS_COMPLETE_KHR 0x30F0
+-#define EGL_SYNC_CONDITION_KHR 0x30F8
+-#define EGL_SYNC_FENCE_KHR 0x30F9
+-#endif
+-#endif
+-
+-#ifndef EGL_HI_clientpixmap
+-#define EGL_HI_clientpixmap 1
+-
+-/* Surface Attribute */
+-#define EGL_CLIENT_PIXMAP_POINTER_HI 0x8F74
+-/*
+- * Structure representing a client pixmap
+- * (pixmap's data is in client-space memory).
+- */
+-struct EGLClientPixmapHI
+-{
+- void* pData;
+- EGLint iWidth;
+- EGLint iHeight;
+- EGLint iStride;
+-};
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLSurface EGLAPIENTRY eglCreatePixmapSurfaceHI(EGLDisplay dpy, EGLConfig config, struct EGLClientPixmapHI* pixmap);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLSurface (EGLAPIENTRYP PFNEGLCREATEPIXMAPSURFACEHIPROC) (EGLDisplay dpy, EGLConfig config, struct EGLClientPixmapHI* pixmap);
+-#endif /* EGL_HI_clientpixmap */
+-
+-#ifndef EGL_HI_colorformats
+-#define EGL_HI_colorformats 1
+-/* Config Attribute */
+-#define EGL_COLOR_FORMAT_HI 0x8F70
+-/* Color Formats */
+-#define EGL_COLOR_RGB_HI 0x8F71
+-#define EGL_COLOR_RGBA_HI 0x8F72
+-#define EGL_COLOR_ARGB_HI 0x8F73
+-#endif /* EGL_HI_colorformats */
+-
+-#ifndef EGL_MESA_drm_image
+-#define EGL_MESA_drm_image 1
+-#define EGL_DRM_BUFFER_FORMAT_MESA 0x31D0 /* CreateDRMImageMESA attribute */
+-#define EGL_DRM_BUFFER_USE_MESA 0x31D1 /* CreateDRMImageMESA attribute */
+-#define EGL_DRM_BUFFER_FORMAT_ARGB32_MESA 0x31D2 /* EGL_IMAGE_FORMAT_MESA attribute value */
+-#define EGL_DRM_BUFFER_MESA 0x31D3 /* eglCreateImageKHR target */
+-#define EGL_DRM_BUFFER_STRIDE_MESA 0x31D4
+-#define EGL_DRM_BUFFER_USE_SCANOUT_MESA 0x00000001 /* EGL_DRM_BUFFER_USE_MESA bits */
+-#define EGL_DRM_BUFFER_USE_SHARE_MESA 0x00000002 /* EGL_DRM_BUFFER_USE_MESA bits */
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLImageKHR EGLAPIENTRY eglCreateDRMImageMESA (EGLDisplay dpy, const EGLint *attrib_list);
+-EGLAPI EGLBoolean EGLAPIENTRY eglExportDRMImageMESA (EGLDisplay dpy, EGLImageKHR image, EGLint *name, EGLint *handle, EGLint *stride);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLImageKHR (EGLAPIENTRYP PFNEGLCREATEDRMIMAGEMESAPROC) (EGLDisplay dpy, const EGLint *attrib_list);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLEXPORTDRMIMAGEMESAPROC) (EGLDisplay dpy, EGLImageKHR image, EGLint *name, EGLint *handle, EGLint *stride);
+-#endif
+-
+-#ifndef EGL_NV_post_sub_buffer
+-#define EGL_NV_post_sub_buffer 1
+-#define EGL_POST_SUB_BUFFER_SUPPORTED_NV 0x30BE
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLBoolean EGLAPIENTRY eglPostSubBufferNV (EGLDisplay dpy, EGLSurface surface, EGLint x, EGLint y, EGLint width, EGLint height);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLPOSTSUBBUFFERNVPROC) (EGLDisplay dpy, EGLSurface surface, EGLint x, EGLint y, EGLint width, EGLint height);
+-#endif
+-
+-#ifndef EGL_ANGLE_query_surface_pointer
+-#define EGL_ANGLE_query_surface_pointer 1
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLBoolean eglQuerySurfacePointerANGLE(EGLDisplay dpy, EGLSurface surface, EGLint attribute, void **value);
+-#endif
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYSURFACEPOINTERANGLEPROC) (EGLDisplay dpy, EGLSurface surface, EGLint attribute, void **value);
+-#endif
+-
+-#ifndef EGL_ANGLE_surface_d3d_texture_2d_share_handle
+-#define EGL_ANGLE_surface_d3d_texture_2d_share_handle 1
+-#define EGL_D3D_TEXTURE_2D_SHARE_HANDLE_ANGLE 0x3200
+-#endif
+-
+-#ifndef EGL_NV_coverage_sample_resolve
+-#define EGL_NV_coverage_sample_resolve 1
+-#define EGL_COVERAGE_SAMPLE_RESOLVE_NV 0x3131
+-#define EGL_COVERAGE_SAMPLE_RESOLVE_DEFAULT_NV 0x3132
+-#define EGL_COVERAGE_SAMPLE_RESOLVE_NONE_NV 0x3133
+-#endif
+-
+-#if KHRONOS_SUPPORT_INT64 /* EGLuint64NV requires 64-bit uint support */
+-#ifndef EGL_NV_system_time
+-#define EGL_NV_system_time 1
+-typedef khronos_utime_nanoseconds_t EGLuint64NV;
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLuint64NV EGLAPIENTRY eglGetSystemTimeFrequencyNV(void);
+-EGLAPI EGLuint64NV EGLAPIENTRY eglGetSystemTimeNV(void);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLuint64NV (EGLAPIENTRYP PFNEGLGETSYSTEMTIMEFREQUENCYNVPROC) (void);
+-typedef EGLuint64NV (EGLAPIENTRYP PFNEGLGETSYSTEMTIMENVPROC) (void);
+-#endif
+-#endif
+-
+-#if KHRONOS_SUPPORT_INT64 /* EGLuint64KHR requires 64-bit uint support */
+-#ifndef EGL_KHR_stream
+-#define EGL_KHR_stream 1
+-typedef void* EGLStreamKHR;
+-typedef khronos_uint64_t EGLuint64KHR;
+-#define EGL_NO_STREAM_KHR ((EGLStreamKHR)0)
+-#define EGL_CONSUMER_LATENCY_USEC_KHR 0x3210
+-#define EGL_PRODUCER_FRAME_KHR 0x3212
+-#define EGL_CONSUMER_FRAME_KHR 0x3213
+-#define EGL_STREAM_STATE_KHR 0x3214
+-#define EGL_STREAM_STATE_CREATED_KHR 0x3215
+-#define EGL_STREAM_STATE_CONNECTING_KHR 0x3216
+-#define EGL_STREAM_STATE_EMPTY_KHR 0x3217
+-#define EGL_STREAM_STATE_NEW_FRAME_AVAILABLE_KHR 0x3218
+-#define EGL_STREAM_STATE_OLD_FRAME_AVAILABLE_KHR 0x3219
+-#define EGL_STREAM_STATE_DISCONNECTED_KHR 0x321A
+-#define EGL_BAD_STREAM_KHR 0x321B
+-#define EGL_BAD_STATE_KHR 0x321C
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLStreamKHR EGLAPIENTRY eglCreateStreamKHR(EGLDisplay dpy, const EGLint *attrib_list);
+-EGLAPI EGLBoolean EGLAPIENTRY eglDestroyStreamKHR(EGLDisplay dpy, EGLStreamKHR stream);
+-EGLAPI EGLBoolean EGLAPIENTRY eglStreamAttribKHR(EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLint value);
+-EGLAPI EGLBoolean EGLAPIENTRY eglQueryStreamKHR(EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLint *value);
+-EGLAPI EGLBoolean EGLAPIENTRY eglQueryStreamu64KHR(EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLuint64KHR *value);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLStreamKHR (EGLAPIENTRYP PFNEGLCREATESTREAMKHRPROC)(EGLDisplay dpy, const EGLint *attrib_list);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLDESTROYSTREAMKHRPROC)(EGLDisplay dpy, EGLStreamKHR stream);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMATTRIBKHRPROC)(EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLint value);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYSTREAMKHRPROC)(EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLint *value);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYSTREAMU64KHRPROC)(EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLuint64KHR *value);
+-#endif
+-#endif
+-
+-#ifdef EGL_KHR_stream /* Requires KHR_stream extension */
+-#ifndef EGL_KHR_stream_consumer_gltexture
+-#define EGL_KHR_stream_consumer_gltexture 1
+-#define EGL_CONSUMER_ACQUIRE_TIMEOUT_USEC_KHR 0x321E
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerGLTextureExternalKHR(EGLDisplay dpy, EGLStreamKHR stream);
+-EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerAcquireKHR(EGLDisplay dpy, EGLStreamKHR stream);
+-EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerReleaseKHR(EGLDisplay dpy, EGLStreamKHR stream);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMCONSUMERGLTEXTUREEXTERNALKHRPROC)(EGLDisplay dpy, EGLStreamKHR stream);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMCONSUMERACQUIREKHRPROC)(EGLDisplay dpy, EGLStreamKHR stream);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMCONSUMERRELEASEKHRPROC)(EGLDisplay dpy, EGLStreamKHR stream);
+-#endif
+-#endif
+-
+-#ifdef EGL_KHR_stream /* Requires KHR_stream extension */
+-#ifndef EGL_KHR_stream_producer_eglsurface
+-#define EGL_KHR_stream_producer_eglsurface 1
+-#define EGL_STREAM_BIT_KHR 0x0800
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLSurface EGLAPIENTRY eglCreateStreamProducerSurfaceKHR(EGLDisplay dpy, EGLConfig config, EGLStreamKHR stream, const EGLint *attrib_list);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLSurface (EGLAPIENTRYP PFNEGLCREATESTREAMPRODUCERSURFACEKHRPROC)(EGLDisplay dpy, EGLConfig config, EGLStreamKHR stream, const EGLint *attrib_list);
+-#endif
+-#endif
+-
+-#ifdef EGL_KHR_stream /* Requires KHR_stream extension */
+-#ifndef EGL_KHR_stream_producer_aldatalocator
+-#define EGL_KHR_stream_producer_aldatalocator 1
+-#endif
+-#endif
+-
+-#ifdef EGL_KHR_stream /* Requires KHR_stream extension */
+-#ifndef EGL_KHR_stream_fifo
+-#define EGL_KHR_stream_fifo 1
+-/* reuse EGLTimeKHR */
+-#define EGL_STREAM_FIFO_LENGTH_KHR 0x31FC
+-#define EGL_STREAM_TIME_NOW_KHR 0x31FD
+-#define EGL_STREAM_TIME_CONSUMER_KHR 0x31FE
+-#define EGL_STREAM_TIME_PRODUCER_KHR 0x31FF
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLBoolean EGLAPIENTRY eglQueryStreamTimeKHR(EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLTimeKHR *value);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYSTREAMTIMEKHRPROC)(EGLDisplay dpy, EGLStreamKHR stream, EGLenum attribute, EGLTimeKHR *value);
+-#endif
+-#endif
+-
+-#ifndef EGL_EXT_create_context_robustness
+-#define EGL_EXT_create_context_robustness 1
+-#define EGL_CONTEXT_OPENGL_ROBUST_ACCESS_EXT 0x30BF
+-#define EGL_CONTEXT_OPENGL_RESET_NOTIFICATION_STRATEGY_EXT 0x3138
+-#define EGL_NO_RESET_NOTIFICATION_EXT 0x31BE
+-#define EGL_LOSE_CONTEXT_ON_RESET_EXT 0x31BF
+-#endif
+-
+-#ifndef EGL_ANGLE_d3d_share_handle_client_buffer
+-#define EGL_ANGLE_d3d_share_handle_client_buffer 1
+-/* reuse EGL_D3D_TEXTURE_2D_SHARE_HANDLE_ANGLE */
+-#endif
+-
+-#ifndef EGL_KHR_create_context
+-#define EGL_KHR_create_context 1
+-#define EGL_CONTEXT_MAJOR_VERSION_KHR EGL_CONTEXT_CLIENT_VERSION
+-#define EGL_CONTEXT_MINOR_VERSION_KHR 0x30FB
+-#define EGL_CONTEXT_FLAGS_KHR 0x30FC
+-#define EGL_CONTEXT_OPENGL_PROFILE_MASK_KHR 0x30FD
+-#define EGL_CONTEXT_OPENGL_RESET_NOTIFICATION_STRATEGY_KHR 0x31BD
+-#define EGL_NO_RESET_NOTIFICATION_KHR 0x31BE
+-#define EGL_LOSE_CONTEXT_ON_RESET_KHR 0x31BF
+-#define EGL_CONTEXT_OPENGL_DEBUG_BIT_KHR 0x00000001
+-#define EGL_CONTEXT_OPENGL_FORWARD_COMPATIBLE_BIT_KHR 0x00000002
+-#define EGL_CONTEXT_OPENGL_ROBUST_ACCESS_BIT_KHR 0x00000004
+-#define EGL_CONTEXT_OPENGL_CORE_PROFILE_BIT_KHR 0x00000001
+-#define EGL_CONTEXT_OPENGL_COMPATIBILITY_PROFILE_BIT_KHR 0x00000002
+-#define EGL_OPENGL_ES3_BIT_KHR 0x00000040
+-#endif
+-
+-#ifndef EGL_KHR_surfaceless_context
+-#define EGL_KHR_surfaceless_context 1
+-/* No tokens/entry points, just relaxes an error condition */
+-#endif
+-
+-#ifdef EGL_KHR_stream /* Requires KHR_stream extension */
+-#ifndef EGL_KHR_stream_cross_process_fd
+-#define EGL_KHR_stream_cross_process_fd 1
+-typedef int EGLNativeFileDescriptorKHR;
+-#define EGL_NO_FILE_DESCRIPTOR_KHR ((EGLNativeFileDescriptorKHR)(-1))
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLNativeFileDescriptorKHR EGLAPIENTRY eglGetStreamFileDescriptorKHR(EGLDisplay dpy, EGLStreamKHR stream);
+-EGLAPI EGLStreamKHR EGLAPIENTRY eglCreateStreamFromFileDescriptorKHR(EGLDisplay dpy, EGLNativeFileDescriptorKHR file_descriptor);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLNativeFileDescriptorKHR (EGLAPIENTRYP PFNEGLGETSTREAMFILEDESCRIPTORKHRPROC)(EGLDisplay dpy, EGLStreamKHR stream);
+-typedef EGLStreamKHR (EGLAPIENTRYP PFNEGLCREATESTREAMFROMFILEDESCRIPTORKHRPROC)(EGLDisplay dpy, EGLNativeFileDescriptorKHR file_descriptor);
+-#endif
+-#endif
+-
+-#ifndef EGL_EXT_multiview_window
+-#define EGL_EXT_multiview_window 1
+-#define EGL_MULTIVIEW_VIEW_COUNT_EXT 0x3134
+-#endif
+-
+-#ifndef EGL_KHR_wait_sync
+-#define EGL_KHR_wait_sync 1
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLint EGLAPIENTRY eglWaitSyncKHR(EGLDisplay dpy, EGLSyncKHR sync, EGLint flags);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLint (EGLAPIENTRYP PFNEGLWAITSYNCKHRPROC)(EGLDisplay dpy, EGLSyncKHR sync, EGLint flags);
+-#endif
+-
+-#ifndef EGL_NV_post_convert_rounding
+-#define EGL_NV_post_convert_rounding 1
+-/* No tokens or entry points, just relaxes behavior of SwapBuffers */
+-#endif
+-
+-#ifndef EGL_NV_native_query
+-#define EGL_NV_native_query 1
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLBoolean EGLAPIENTRY eglQueryNativeDisplayNV( EGLDisplay dpy, EGLNativeDisplayType* display_id);
+-EGLAPI EGLBoolean EGLAPIENTRY eglQueryNativeWindowNV( EGLDisplay dpy, EGLSurface surf, EGLNativeWindowType* window);
+-EGLAPI EGLBoolean EGLAPIENTRY eglQueryNativePixmapNV( EGLDisplay dpy, EGLSurface surf, EGLNativePixmapType* pixmap);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYNATIVEDISPLAYNVPROC)(EGLDisplay dpy, EGLNativeDisplayType *display_id);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYNATIVEWINDOWNVPROC)(EGLDisplay dpy, EGLSurface surf, EGLNativeWindowType *window);
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYNATIVEPIXMAPNVPROC)(EGLDisplay dpy, EGLSurface surf, EGLNativePixmapType *pixmap);
+-#endif
+-
+-#ifndef EGL_NV_3dvision_surface
+-#define EGL_NV_3dvision_surface 1
+-#define EGL_AUTO_STEREO_NV 0x3136
+-#endif
+-
+-#ifndef EGL_ANDROID_framebuffer_target
+-#define EGL_ANDROID_framebuffer_target 1
+-#define EGL_FRAMEBUFFER_TARGET_ANDROID 0x3147
+-#endif
+-
+-#ifndef EGL_ANDROID_blob_cache
+-#define EGL_ANDROID_blob_cache 1
+-typedef khronos_ssize_t EGLsizeiANDROID;
+-typedef void (*EGLSetBlobFuncANDROID) (const void *key, EGLsizeiANDROID keySize, const void *value, EGLsizeiANDROID valueSize);
+-typedef EGLsizeiANDROID (*EGLGetBlobFuncANDROID) (const void *key, EGLsizeiANDROID keySize, void *value, EGLsizeiANDROID valueSize);
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI void EGLAPIENTRY eglSetBlobCacheFuncsANDROID(EGLDisplay dpy, EGLSetBlobFuncANDROID set, EGLGetBlobFuncANDROID get);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef void (EGLAPIENTRYP PFNEGLSETBLOBCACHEFUNCSANDROIDPROC)(EGLDisplay dpy, EGLSetBlobFuncANDROID set, EGLGetBlobFuncANDROID get);
+-#endif
+-
+-#ifndef EGL_ANDROID_image_native_buffer
+-#define EGL_ANDROID_image_native_buffer 1
+-#define EGL_NATIVE_BUFFER_ANDROID 0x3140
+-#endif
+-
+-#ifndef EGL_ANDROID_native_fence_sync
+-#define EGL_ANDROID_native_fence_sync 1
+-#define EGL_SYNC_NATIVE_FENCE_ANDROID 0x3144
+-#define EGL_SYNC_NATIVE_FENCE_FD_ANDROID 0x3145
+-#define EGL_SYNC_NATIVE_FENCE_SIGNALED_ANDROID 0x3146
+-#define EGL_NO_NATIVE_FENCE_FD_ANDROID -1
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLint EGLAPIENTRY eglDupNativeFenceFDANDROID( EGLDisplay dpy, EGLSyncKHR);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLint (EGLAPIENTRYP PFNEGLDUPNATIVEFENCEFDANDROIDPROC)(EGLDisplay dpy, EGLSyncKHR);
+-#endif
+-
+-#ifndef EGL_ANDROID_recordable
+-#define EGL_ANDROID_recordable 1
+-#define EGL_RECORDABLE_ANDROID 0x3142
+-#endif
+-
+-#ifndef EGL_EXT_buffer_age
+-#define EGL_EXT_buffer_age 1
+-#define EGL_BUFFER_AGE_EXT 0x313D
+-#endif
+-
+-#ifndef EGL_EXT_image_dma_buf_import
+-#define EGL_EXT_image_dma_buf_import 1
+-#define EGL_LINUX_DMA_BUF_EXT 0x3270
+-#define EGL_LINUX_DRM_FOURCC_EXT 0x3271
+-#define EGL_DMA_BUF_PLANE0_FD_EXT 0x3272
+-#define EGL_DMA_BUF_PLANE0_OFFSET_EXT 0x3273
+-#define EGL_DMA_BUF_PLANE0_PITCH_EXT 0x3274
+-#define EGL_DMA_BUF_PLANE1_FD_EXT 0x3275
+-#define EGL_DMA_BUF_PLANE1_OFFSET_EXT 0x3276
+-#define EGL_DMA_BUF_PLANE1_PITCH_EXT 0x3277
+-#define EGL_DMA_BUF_PLANE2_FD_EXT 0x3278
+-#define EGL_DMA_BUF_PLANE2_OFFSET_EXT 0x3279
+-#define EGL_DMA_BUF_PLANE2_PITCH_EXT 0x327A
+-#define EGL_YUV_COLOR_SPACE_HINT_EXT 0x327B
+-#define EGL_SAMPLE_RANGE_HINT_EXT 0x327C
+-#define EGL_YUV_CHROMA_HORIZONTAL_SITING_HINT_EXT 0x327D
+-#define EGL_YUV_CHROMA_VERTICAL_SITING_HINT_EXT 0x327E
+-#define EGL_ITU_REC601_EXT 0x327F
+-#define EGL_ITU_REC709_EXT 0x3280
+-#define EGL_ITU_REC2020_EXT 0x3281
+-#define EGL_YUV_FULL_RANGE_EXT 0x3282
+-#define EGL_YUV_NARROW_RANGE_EXT 0x3283
+-#define EGL_YUV_CHROMA_SITING_0_EXT 0x3284
+-#define EGL_YUV_CHROMA_SITING_0_5_EXT 0x3285
+-#endif
+-
+-#ifndef EGL_ARM_pixmap_multisample_discard
+-#define EGL_ARM_pixmap_multisample_discard 1
+-#define EGL_DISCARD_SAMPLES_ARM 0x3286
+-#endif
+-
+-#ifndef EGL_EXT_swap_buffers_with_damage
+-#define EGL_EXT_swap_buffers_with_damage 1
+-#ifdef EGL_EGLEXT_PROTOTYPES
+-EGLAPI EGLBoolean EGLAPIENTRY eglSwapBuffersWithDamageEXT( EGLDisplay dpy, EGLSurface surface, EGLint *rects, EGLint n_rects);
+-#endif /* EGL_EGLEXT_PROTOTYPES */
+-typedef EGLBoolean (EGLAPIENTRYP PFNEGLSWAPBUFFERSWITHDAMAGEEXTPROC)(EGLDisplay dpy, EGLSurface surface, EGLint *rects, EGLint n_rects);
+-#endif
+-
+-#include <EGL/eglmesaext.h>
+-
+-#ifdef __cplusplus
+-}
+-#endif
+-
+-#endif /* __eglext_h_ */
+diff --git a/include/EGL/eglplatform.h b/include/EGL/eglplatform.h
+deleted file mode 100644
+index 58ee2a6..0000000
+--- a/include/EGL/eglplatform.h
++++ /dev/null
+@@ -1,105 +0,0 @@
+-#ifndef __eglplatform_h_
+-#define __eglplatform_h_
+-
+-/*
+-** Copyright (c) 2007-2009 The Khronos Group Inc.
+-**
+-** Permission is hereby granted, free of charge, to any person obtaining a
+-** copy of this software and/or associated documentation files (the
+-** "Materials"), to deal in the Materials without restriction, including
+-** without limitation the rights to use, copy, modify, merge, publish,
+-** distribute, sublicense, and/or sell copies of the Materials, and to
+-** permit persons to whom the Materials are furnished to do so, subject to
+-** the following conditions:
+-**
+-** The above copyright notice and this permission notice shall be included
+-** in all copies or substantial portions of the Materials.
+-**
+-** THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+-** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+-** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+-** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+-** CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+-** TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+-** MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
+-*/
+-
+-/* Platform-specific types and definitions for egl.h
+- * $Revision: 12306 $ on $Date: 2010-08-25 09:51:28 -0700 (Wed, 25 Aug 2010) $
+- *
+- * Adopters may modify khrplatform.h and this file to suit their platform.
+- * You are encouraged to submit all modifications to the Khronos group so that
+- * they can be included in future versions of this file. Please submit changes
+- * by sending them to the public Khronos Bugzilla (http://khronos.org/bugzilla)
+- * by filing a bug against product "EGL" component "Registry".
+- */
+-
+-#include <KHR/khrplatform.h>
+-
+-/* Macros used in EGL function prototype declarations.
+- *
+- * EGL functions should be prototyped as:
+- *
+- * EGLAPI return-type EGLAPIENTRY eglFunction(arguments);
+- * typedef return-type (EXPAPIENTRYP PFNEGLFUNCTIONPROC) (arguments);
+- *
+- * KHRONOS_APICALL and KHRONOS_APIENTRY are defined in KHR/khrplatform.h
+- */
+-
+-#ifndef EGLAPI
+-#define EGLAPI KHRONOS_APICALL
+-#endif
+-
+-#ifndef EGLAPIENTRY
+-#define EGLAPIENTRY KHRONOS_APIENTRY
+-#endif
+-#define EGLAPIENTRYP EGLAPIENTRY*
+-
+-/* The types NativeDisplayType, NativeWindowType, and NativePixmapType
+- * are aliases of window-system-dependent types, such as X Display * or
+- * Windows Device Context. They must be defined in platform-specific
+- * code below. The EGL-prefixed versions of Native*Type are the same
+- * types, renamed in EGL 1.3 so all types in the API start with "EGL".
+- *
+- * Khronos STRONGLY RECOMMENDS that you use the default definitions
+- * provided below, since these changes affect both binary and source
+- * portability of applications using EGL running on different EGL
+- * implementations.
+- */
+-
+-#if defined(WL_EGL_PLATFORM)
+-
+-typedef struct wl_display *EGLNativeDisplayType;
+-typedef struct wl_egl_pixmap *EGLNativePixmapType;
+-typedef struct wl_egl_window *EGLNativeWindowType;
+-
+-#elif defined(__GBM__)
+-
+-typedef struct gbm_device *EGLNativeDisplayType;
+-typedef struct gbm_bo *EGLNativePixmapType;
+-typedef void *EGLNativeWindowType;
+-
+-#else
+-
+-typedef void *EGLNativeDisplayType;
+-typedef khronos_uintptr_t EGLNativePixmapType;
+-typedef khronos_uintptr_t EGLNativeWindowType;
+-
+-#endif
+-
+-/* EGL 1.2 types, renamed for consistency in EGL 1.3 */
+-typedef EGLNativeDisplayType NativeDisplayType;
+-typedef EGLNativePixmapType NativePixmapType;
+-typedef EGLNativeWindowType NativeWindowType;
+-
+-
+-/* Define EGLint. This must be a signed integral type large enough to contain
+- * all legal attribute names and values passed into and out of EGL, whether
+- * their type is boolean, bitmask, enumerant (symbolic constant), integer,
+- * handle, or other. While in general a 32-bit integer will suffice, if
+- * handles are 64 bit types, then EGLint should be defined as a signed 64-bit
+- * integer type.
+- */
+-typedef khronos_int32_t EGLint;
+-
+-#endif /* __eglplatform_h */
+diff --git a/include/GLES2/gl2.h b/include/GLES2/gl2.h
+deleted file mode 100644
+index c2d8357..0000000
+--- a/include/GLES2/gl2.h
++++ /dev/null
+@@ -1,620 +0,0 @@
+-#ifndef __gl2_h_
+-#define __gl2_h_
+-
+-/* $Revision: 20555 $ on $Date:: 2013-02-12 14:32:47 -0800 #$ */
+-
+-#include <GLES2/gl2platform.h>
+-
+-#ifdef __cplusplus
+-extern "C" {
+-#endif
+-
+-/*
+- * This document is licensed under the SGI Free Software B License Version
+- * 2.0. For details, see http://oss.sgi.com/projects/FreeB/ .
+- */
+-
+-/*-------------------------------------------------------------------------
+- * Data type definitions
+- *-----------------------------------------------------------------------*/
+-
+-typedef void GLvoid;
+-typedef char GLchar;
+-typedef unsigned int GLenum;
+-typedef unsigned char GLboolean;
+-typedef unsigned int GLbitfield;
+-typedef khronos_int8_t GLbyte;
+-typedef short GLshort;
+-typedef int GLint;
+-typedef int GLsizei;
+-typedef khronos_uint8_t GLubyte;
+-typedef unsigned short GLushort;
+-typedef unsigned int GLuint;
+-typedef khronos_float_t GLfloat;
+-typedef khronos_float_t GLclampf;
+-typedef khronos_int32_t GLfixed;
+-
+-/* GL types for handling large vertex buffer objects */
+-typedef khronos_intptr_t GLintptr;
+-typedef khronos_ssize_t GLsizeiptr;
+-
+-/* OpenGL ES core versions */
+-#define GL_ES_VERSION_2_0 1
+-
+-/* ClearBufferMask */
+-#define GL_DEPTH_BUFFER_BIT 0x00000100
+-#define GL_STENCIL_BUFFER_BIT 0x00000400
+-#define GL_COLOR_BUFFER_BIT 0x00004000
+-
+-/* Boolean */
+-#define GL_FALSE 0
+-#define GL_TRUE 1
+-
+-/* BeginMode */
+-#define GL_POINTS 0x0000
+-#define GL_LINES 0x0001
+-#define GL_LINE_LOOP 0x0002
+-#define GL_LINE_STRIP 0x0003
+-#define GL_TRIANGLES 0x0004
+-#define GL_TRIANGLE_STRIP 0x0005
+-#define GL_TRIANGLE_FAN 0x0006
+-
+-/* AlphaFunction (not supported in ES20) */
+-/* GL_NEVER */
+-/* GL_LESS */
+-/* GL_EQUAL */
+-/* GL_LEQUAL */
+-/* GL_GREATER */
+-/* GL_NOTEQUAL */
+-/* GL_GEQUAL */
+-/* GL_ALWAYS */
+-
+-/* BlendingFactorDest */
+-#define GL_ZERO 0
+-#define GL_ONE 1
+-#define GL_SRC_COLOR 0x0300
+-#define GL_ONE_MINUS_SRC_COLOR 0x0301
+-#define GL_SRC_ALPHA 0x0302
+-#define GL_ONE_MINUS_SRC_ALPHA 0x0303
+-#define GL_DST_ALPHA 0x0304
+-#define GL_ONE_MINUS_DST_ALPHA 0x0305
+-
+-/* BlendingFactorSrc */
+-/* GL_ZERO */
+-/* GL_ONE */
+-#define GL_DST_COLOR 0x0306
+-#define GL_ONE_MINUS_DST_COLOR 0x0307
+-#define GL_SRC_ALPHA_SATURATE 0x0308
+-/* GL_SRC_ALPHA */
+-/* GL_ONE_MINUS_SRC_ALPHA */
+-/* GL_DST_ALPHA */
+-/* GL_ONE_MINUS_DST_ALPHA */
+-
+-/* BlendEquationSeparate */
+-#define GL_FUNC_ADD 0x8006
+-#define GL_BLEND_EQUATION 0x8009
+-#define GL_BLEND_EQUATION_RGB 0x8009 /* same as BLEND_EQUATION */
+-#define GL_BLEND_EQUATION_ALPHA 0x883D
+-
+-/* BlendSubtract */
+-#define GL_FUNC_SUBTRACT 0x800A
+-#define GL_FUNC_REVERSE_SUBTRACT 0x800B
+-
+-/* Separate Blend Functions */
+-#define GL_BLEND_DST_RGB 0x80C8
+-#define GL_BLEND_SRC_RGB 0x80C9
+-#define GL_BLEND_DST_ALPHA 0x80CA
+-#define GL_BLEND_SRC_ALPHA 0x80CB
+-#define GL_CONSTANT_COLOR 0x8001
+-#define GL_ONE_MINUS_CONSTANT_COLOR 0x8002
+-#define GL_CONSTANT_ALPHA 0x8003
+-#define GL_ONE_MINUS_CONSTANT_ALPHA 0x8004
+-#define GL_BLEND_COLOR 0x8005
+-
+-/* Buffer Objects */
+-#define GL_ARRAY_BUFFER 0x8892
+-#define GL_ELEMENT_ARRAY_BUFFER 0x8893
+-#define GL_ARRAY_BUFFER_BINDING 0x8894
+-#define GL_ELEMENT_ARRAY_BUFFER_BINDING 0x8895
+-
+-#define GL_STREAM_DRAW 0x88E0
+-#define GL_STATIC_DRAW 0x88E4
+-#define GL_DYNAMIC_DRAW 0x88E8
+-
+-#define GL_BUFFER_SIZE 0x8764
+-#define GL_BUFFER_USAGE 0x8765
+-
+-#define GL_CURRENT_VERTEX_ATTRIB 0x8626
+-
+-/* CullFaceMode */
+-#define GL_FRONT 0x0404
+-#define GL_BACK 0x0405
+-#define GL_FRONT_AND_BACK 0x0408
+-
+-/* DepthFunction */
+-/* GL_NEVER */
+-/* GL_LESS */
+-/* GL_EQUAL */
+-/* GL_LEQUAL */
+-/* GL_GREATER */
+-/* GL_NOTEQUAL */
+-/* GL_GEQUAL */
+-/* GL_ALWAYS */
+-
+-/* EnableCap */
+-#define GL_TEXTURE_2D 0x0DE1
+-#define GL_CULL_FACE 0x0B44
+-#define GL_BLEND 0x0BE2
+-#define GL_DITHER 0x0BD0
+-#define GL_STENCIL_TEST 0x0B90
+-#define GL_DEPTH_TEST 0x0B71
+-#define GL_SCISSOR_TEST 0x0C11
+-#define GL_POLYGON_OFFSET_FILL 0x8037
+-#define GL_SAMPLE_ALPHA_TO_COVERAGE 0x809E
+-#define GL_SAMPLE_COVERAGE 0x80A0
+-
+-/* ErrorCode */
+-#define GL_NO_ERROR 0
+-#define GL_INVALID_ENUM 0x0500
+-#define GL_INVALID_VALUE 0x0501
+-#define GL_INVALID_OPERATION 0x0502
+-#define GL_OUT_OF_MEMORY 0x0505
+-
+-/* FrontFaceDirection */
+-#define GL_CW 0x0900
+-#define GL_CCW 0x0901
+-
+-/* GetPName */
+-#define GL_LINE_WIDTH 0x0B21
+-#define GL_ALIASED_POINT_SIZE_RANGE 0x846D
+-#define GL_ALIASED_LINE_WIDTH_RANGE 0x846E
+-#define GL_CULL_FACE_MODE 0x0B45
+-#define GL_FRONT_FACE 0x0B46
+-#define GL_DEPTH_RANGE 0x0B70
+-#define GL_DEPTH_WRITEMASK 0x0B72
+-#define GL_DEPTH_CLEAR_VALUE 0x0B73
+-#define GL_DEPTH_FUNC 0x0B74
+-#define GL_STENCIL_CLEAR_VALUE 0x0B91
+-#define GL_STENCIL_FUNC 0x0B92
+-#define GL_STENCIL_FAIL 0x0B94
+-#define GL_STENCIL_PASS_DEPTH_FAIL 0x0B95
+-#define GL_STENCIL_PASS_DEPTH_PASS 0x0B96
+-#define GL_STENCIL_REF 0x0B97
+-#define GL_STENCIL_VALUE_MASK 0x0B93
+-#define GL_STENCIL_WRITEMASK 0x0B98
+-#define GL_STENCIL_BACK_FUNC 0x8800
+-#define GL_STENCIL_BACK_FAIL 0x8801
+-#define GL_STENCIL_BACK_PASS_DEPTH_FAIL 0x8802
+-#define GL_STENCIL_BACK_PASS_DEPTH_PASS 0x8803
+-#define GL_STENCIL_BACK_REF 0x8CA3
+-#define GL_STENCIL_BACK_VALUE_MASK 0x8CA4
+-#define GL_STENCIL_BACK_WRITEMASK 0x8CA5
+-#define GL_VIEWPORT 0x0BA2
+-#define GL_SCISSOR_BOX 0x0C10
+-/* GL_SCISSOR_TEST */
+-#define GL_COLOR_CLEAR_VALUE 0x0C22
+-#define GL_COLOR_WRITEMASK 0x0C23
+-#define GL_UNPACK_ALIGNMENT 0x0CF5
+-#define GL_PACK_ALIGNMENT 0x0D05
+-#define GL_MAX_TEXTURE_SIZE 0x0D33
+-#define GL_MAX_VIEWPORT_DIMS 0x0D3A
+-#define GL_SUBPIXEL_BITS 0x0D50
+-#define GL_RED_BITS 0x0D52
+-#define GL_GREEN_BITS 0x0D53
+-#define GL_BLUE_BITS 0x0D54
+-#define GL_ALPHA_BITS 0x0D55
+-#define GL_DEPTH_BITS 0x0D56
+-#define GL_STENCIL_BITS 0x0D57
+-#define GL_POLYGON_OFFSET_UNITS 0x2A00
+-/* GL_POLYGON_OFFSET_FILL */
+-#define GL_POLYGON_OFFSET_FACTOR 0x8038
+-#define GL_TEXTURE_BINDING_2D 0x8069
+-#define GL_SAMPLE_BUFFERS 0x80A8
+-#define GL_SAMPLES 0x80A9
+-#define GL_SAMPLE_COVERAGE_VALUE 0x80AA
+-#define GL_SAMPLE_COVERAGE_INVERT 0x80AB
+-
+-/* GetTextureParameter */
+-/* GL_TEXTURE_MAG_FILTER */
+-/* GL_TEXTURE_MIN_FILTER */
+-/* GL_TEXTURE_WRAP_S */
+-/* GL_TEXTURE_WRAP_T */
+-
+-#define GL_NUM_COMPRESSED_TEXTURE_FORMATS 0x86A2
+-#define GL_COMPRESSED_TEXTURE_FORMATS 0x86A3
+-
+-/* HintMode */
+-#define GL_DONT_CARE 0x1100
+-#define GL_FASTEST 0x1101
+-#define GL_NICEST 0x1102
+-
+-/* HintTarget */
+-#define GL_GENERATE_MIPMAP_HINT 0x8192
+-
+-/* DataType */
+-#define GL_BYTE 0x1400
+-#define GL_UNSIGNED_BYTE 0x1401
+-#define GL_SHORT 0x1402
+-#define GL_UNSIGNED_SHORT 0x1403
+-#define GL_INT 0x1404
+-#define GL_UNSIGNED_INT 0x1405
+-#define GL_FLOAT 0x1406
+-#define GL_FIXED 0x140C
+-
+-/* PixelFormat */
+-#define GL_DEPTH_COMPONENT 0x1902
+-#define GL_ALPHA 0x1906
+-#define GL_RGB 0x1907
+-#define GL_RGBA 0x1908
+-#define GL_LUMINANCE 0x1909
+-#define GL_LUMINANCE_ALPHA 0x190A
+-
+-/* PixelType */
+-/* GL_UNSIGNED_BYTE */
+-#define GL_UNSIGNED_SHORT_4_4_4_4 0x8033
+-#define GL_UNSIGNED_SHORT_5_5_5_1 0x8034
+-#define GL_UNSIGNED_SHORT_5_6_5 0x8363
+-
+-/* Shaders */
+-#define GL_FRAGMENT_SHADER 0x8B30
+-#define GL_VERTEX_SHADER 0x8B31
+-#define GL_MAX_VERTEX_ATTRIBS 0x8869
+-#define GL_MAX_VERTEX_UNIFORM_VECTORS 0x8DFB
+-#define GL_MAX_VARYING_VECTORS 0x8DFC
+-#define GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS 0x8B4D
+-#define GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS 0x8B4C
+-#define GL_MAX_TEXTURE_IMAGE_UNITS 0x8872
+-#define GL_MAX_FRAGMENT_UNIFORM_VECTORS 0x8DFD
+-#define GL_SHADER_TYPE 0x8B4F
+-#define GL_DELETE_STATUS 0x8B80
+-#define GL_LINK_STATUS 0x8B82
+-#define GL_VALIDATE_STATUS 0x8B83
+-#define GL_ATTACHED_SHADERS 0x8B85
+-#define GL_ACTIVE_UNIFORMS 0x8B86
+-#define GL_ACTIVE_UNIFORM_MAX_LENGTH 0x8B87
+-#define GL_ACTIVE_ATTRIBUTES 0x8B89
+-#define GL_ACTIVE_ATTRIBUTE_MAX_LENGTH 0x8B8A
+-#define GL_SHADING_LANGUAGE_VERSION 0x8B8C
+-#define GL_CURRENT_PROGRAM 0x8B8D
+-
+-/* StencilFunction */
+-#define GL_NEVER 0x0200
+-#define GL_LESS 0x0201
+-#define GL_EQUAL 0x0202
+-#define GL_LEQUAL 0x0203
+-#define GL_GREATER 0x0204
+-#define GL_NOTEQUAL 0x0205
+-#define GL_GEQUAL 0x0206
+-#define GL_ALWAYS 0x0207
+-
+-/* StencilOp */
+-/* GL_ZERO */
+-#define GL_KEEP 0x1E00
+-#define GL_REPLACE 0x1E01
+-#define GL_INCR 0x1E02
+-#define GL_DECR 0x1E03
+-#define GL_INVERT 0x150A
+-#define GL_INCR_WRAP 0x8507
+-#define GL_DECR_WRAP 0x8508
+-
+-/* StringName */
+-#define GL_VENDOR 0x1F00
+-#define GL_RENDERER 0x1F01
+-#define GL_VERSION 0x1F02
+-#define GL_EXTENSIONS 0x1F03
+-
+-/* TextureMagFilter */
+-#define GL_NEAREST 0x2600
+-#define GL_LINEAR 0x2601
+-
+-/* TextureMinFilter */
+-/* GL_NEAREST */
+-/* GL_LINEAR */
+-#define GL_NEAREST_MIPMAP_NEAREST 0x2700
+-#define GL_LINEAR_MIPMAP_NEAREST 0x2701
+-#define GL_NEAREST_MIPMAP_LINEAR 0x2702
+-#define GL_LINEAR_MIPMAP_LINEAR 0x2703
+-
+-/* TextureParameterName */
+-#define GL_TEXTURE_MAG_FILTER 0x2800
+-#define GL_TEXTURE_MIN_FILTER 0x2801
+-#define GL_TEXTURE_WRAP_S 0x2802
+-#define GL_TEXTURE_WRAP_T 0x2803
+-
+-/* TextureTarget */
+-/* GL_TEXTURE_2D */
+-#define GL_TEXTURE 0x1702
+-
+-#define GL_TEXTURE_CUBE_MAP 0x8513
+-#define GL_TEXTURE_BINDING_CUBE_MAP 0x8514
+-#define GL_TEXTURE_CUBE_MAP_POSITIVE_X 0x8515
+-#define GL_TEXTURE_CUBE_MAP_NEGATIVE_X 0x8516
+-#define GL_TEXTURE_CUBE_MAP_POSITIVE_Y 0x8517
+-#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Y 0x8518
+-#define GL_TEXTURE_CUBE_MAP_POSITIVE_Z 0x8519
+-#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Z 0x851A
+-#define GL_MAX_CUBE_MAP_TEXTURE_SIZE 0x851C
+-
+-/* TextureUnit */
+-#define GL_TEXTURE0 0x84C0
+-#define GL_TEXTURE1 0x84C1
+-#define GL_TEXTURE2 0x84C2
+-#define GL_TEXTURE3 0x84C3
+-#define GL_TEXTURE4 0x84C4
+-#define GL_TEXTURE5 0x84C5
+-#define GL_TEXTURE6 0x84C6
+-#define GL_TEXTURE7 0x84C7
+-#define GL_TEXTURE8 0x84C8
+-#define GL_TEXTURE9 0x84C9
+-#define GL_TEXTURE10 0x84CA
+-#define GL_TEXTURE11 0x84CB
+-#define GL_TEXTURE12 0x84CC
+-#define GL_TEXTURE13 0x84CD
+-#define GL_TEXTURE14 0x84CE
+-#define GL_TEXTURE15 0x84CF
+-#define GL_TEXTURE16 0x84D0
+-#define GL_TEXTURE17 0x84D1
+-#define GL_TEXTURE18 0x84D2
+-#define GL_TEXTURE19 0x84D3
+-#define GL_TEXTURE20 0x84D4
+-#define GL_TEXTURE21 0x84D5
+-#define GL_TEXTURE22 0x84D6
+-#define GL_TEXTURE23 0x84D7
+-#define GL_TEXTURE24 0x84D8
+-#define GL_TEXTURE25 0x84D9
+-#define GL_TEXTURE26 0x84DA
+-#define GL_TEXTURE27 0x84DB
+-#define GL_TEXTURE28 0x84DC
+-#define GL_TEXTURE29 0x84DD
+-#define GL_TEXTURE30 0x84DE
+-#define GL_TEXTURE31 0x84DF
+-#define GL_ACTIVE_TEXTURE 0x84E0
+-
+-/* TextureWrapMode */
+-#define GL_REPEAT 0x2901
+-#define GL_CLAMP_TO_EDGE 0x812F
+-#define GL_MIRRORED_REPEAT 0x8370
+-
+-/* Uniform Types */
+-#define GL_FLOAT_VEC2 0x8B50
+-#define GL_FLOAT_VEC3 0x8B51
+-#define GL_FLOAT_VEC4 0x8B52
+-#define GL_INT_VEC2 0x8B53
+-#define GL_INT_VEC3 0x8B54
+-#define GL_INT_VEC4 0x8B55
+-#define GL_BOOL 0x8B56
+-#define GL_BOOL_VEC2 0x8B57
+-#define GL_BOOL_VEC3 0x8B58
+-#define GL_BOOL_VEC4 0x8B59
+-#define GL_FLOAT_MAT2 0x8B5A
+-#define GL_FLOAT_MAT3 0x8B5B
+-#define GL_FLOAT_MAT4 0x8B5C
+-#define GL_SAMPLER_2D 0x8B5E
+-#define GL_SAMPLER_CUBE 0x8B60
+-
+-/* Vertex Arrays */
+-#define GL_VERTEX_ATTRIB_ARRAY_ENABLED 0x8622
+-#define GL_VERTEX_ATTRIB_ARRAY_SIZE 0x8623
+-#define GL_VERTEX_ATTRIB_ARRAY_STRIDE 0x8624
+-#define GL_VERTEX_ATTRIB_ARRAY_TYPE 0x8625
+-#define GL_VERTEX_ATTRIB_ARRAY_NORMALIZED 0x886A
+-#define GL_VERTEX_ATTRIB_ARRAY_POINTER 0x8645
+-#define GL_VERTEX_ATTRIB_ARRAY_BUFFER_BINDING 0x889F
+-
+-/* Read Format */
+-#define GL_IMPLEMENTATION_COLOR_READ_TYPE 0x8B9A
+-#define GL_IMPLEMENTATION_COLOR_READ_FORMAT 0x8B9B
+-
+-/* Shader Source */
+-#define GL_COMPILE_STATUS 0x8B81
+-#define GL_INFO_LOG_LENGTH 0x8B84
+-#define GL_SHADER_SOURCE_LENGTH 0x8B88
+-#define GL_SHADER_COMPILER 0x8DFA
+-
+-/* Shader Binary */
+-#define GL_SHADER_BINARY_FORMATS 0x8DF8
+-#define GL_NUM_SHADER_BINARY_FORMATS 0x8DF9
+-
+-/* Shader Precision-Specified Types */
+-#define GL_LOW_FLOAT 0x8DF0
+-#define GL_MEDIUM_FLOAT 0x8DF1
+-#define GL_HIGH_FLOAT 0x8DF2
+-#define GL_LOW_INT 0x8DF3
+-#define GL_MEDIUM_INT 0x8DF4
+-#define GL_HIGH_INT 0x8DF5
+-
+-/* Framebuffer Object. */
+-#define GL_FRAMEBUFFER 0x8D40
+-#define GL_RENDERBUFFER 0x8D41
+-
+-#define GL_RGBA4 0x8056
+-#define GL_RGB5_A1 0x8057
+-#define GL_RGB565 0x8D62
+-#define GL_DEPTH_COMPONENT16 0x81A5
+-#define GL_STENCIL_INDEX8 0x8D48
+-
+-#define GL_RENDERBUFFER_WIDTH 0x8D42
+-#define GL_RENDERBUFFER_HEIGHT 0x8D43
+-#define GL_RENDERBUFFER_INTERNAL_FORMAT 0x8D44
+-#define GL_RENDERBUFFER_RED_SIZE 0x8D50
+-#define GL_RENDERBUFFER_GREEN_SIZE 0x8D51
+-#define GL_RENDERBUFFER_BLUE_SIZE 0x8D52
+-#define GL_RENDERBUFFER_ALPHA_SIZE 0x8D53
+-#define GL_RENDERBUFFER_DEPTH_SIZE 0x8D54
+-#define GL_RENDERBUFFER_STENCIL_SIZE 0x8D55
+-
+-#define GL_FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE 0x8CD0
+-#define GL_FRAMEBUFFER_ATTACHMENT_OBJECT_NAME 0x8CD1
+-#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LEVEL 0x8CD2
+-#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_CUBE_MAP_FACE 0x8CD3
+-
+-#define GL_COLOR_ATTACHMENT0 0x8CE0
+-#define GL_DEPTH_ATTACHMENT 0x8D00
+-#define GL_STENCIL_ATTACHMENT 0x8D20
+-
+-#define GL_NONE 0
+-
+-#define GL_FRAMEBUFFER_COMPLETE 0x8CD5
+-#define GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT 0x8CD6
+-#define GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT 0x8CD7
+-#define GL_FRAMEBUFFER_INCOMPLETE_DIMENSIONS 0x8CD9
+-#define GL_FRAMEBUFFER_UNSUPPORTED 0x8CDD
+-
+-#define GL_FRAMEBUFFER_BINDING 0x8CA6
+-#define GL_RENDERBUFFER_BINDING 0x8CA7
+-#define GL_MAX_RENDERBUFFER_SIZE 0x84E8
+-
+-#define GL_INVALID_FRAMEBUFFER_OPERATION 0x0506
+-
+-/*-------------------------------------------------------------------------
+- * GL core functions.
+- *-----------------------------------------------------------------------*/
+-
+-GL_APICALL void GL_APIENTRY glActiveTexture (GLenum texture);
+-GL_APICALL void GL_APIENTRY glAttachShader (GLuint program, GLuint shader);
+-GL_APICALL void GL_APIENTRY glBindAttribLocation (GLuint program, GLuint index, const GLchar* name);
+-GL_APICALL void GL_APIENTRY glBindBuffer (GLenum target, GLuint buffer);
+-GL_APICALL void GL_APIENTRY glBindFramebuffer (GLenum target, GLuint framebuffer);
+-GL_APICALL void GL_APIENTRY glBindRenderbuffer (GLenum target, GLuint renderbuffer);
+-GL_APICALL void GL_APIENTRY glBindTexture (GLenum target, GLuint texture);
+-GL_APICALL void GL_APIENTRY glBlendColor (GLclampf red, GLclampf green, GLclampf blue, GLclampf alpha);
+-GL_APICALL void GL_APIENTRY glBlendEquation ( GLenum mode );
+-GL_APICALL void GL_APIENTRY glBlendEquationSeparate (GLenum modeRGB, GLenum modeAlpha);
+-GL_APICALL void GL_APIENTRY glBlendFunc (GLenum sfactor, GLenum dfactor);
+-GL_APICALL void GL_APIENTRY glBlendFuncSeparate (GLenum srcRGB, GLenum dstRGB, GLenum srcAlpha, GLenum dstAlpha);
+-GL_APICALL void GL_APIENTRY glBufferData (GLenum target, GLsizeiptr size, const GLvoid* data, GLenum usage);
+-GL_APICALL void GL_APIENTRY glBufferSubData (GLenum target, GLintptr offset, GLsizeiptr size, const GLvoid* data);
+-GL_APICALL GLenum GL_APIENTRY glCheckFramebufferStatus (GLenum target);
+-GL_APICALL void GL_APIENTRY glClear (GLbitfield mask);
+-GL_APICALL void GL_APIENTRY glClearColor (GLclampf red, GLclampf green, GLclampf blue, GLclampf alpha);
+-GL_APICALL void GL_APIENTRY glClearDepthf (GLclampf depth);
+-GL_APICALL void GL_APIENTRY glClearStencil (GLint s);
+-GL_APICALL void GL_APIENTRY glColorMask (GLboolean red, GLboolean green, GLboolean blue, GLboolean alpha);
+-GL_APICALL void GL_APIENTRY glCompileShader (GLuint shader);
+-GL_APICALL void GL_APIENTRY glCompressedTexImage2D (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLint border, GLsizei imageSize, const GLvoid* data);
+-GL_APICALL void GL_APIENTRY glCompressedTexSubImage2D (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid* data);
+-GL_APICALL void GL_APIENTRY glCopyTexImage2D (GLenum target, GLint level, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height, GLint border);
+-GL_APICALL void GL_APIENTRY glCopyTexSubImage2D (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height);
+-GL_APICALL GLuint GL_APIENTRY glCreateProgram (void);
+-GL_APICALL GLuint GL_APIENTRY glCreateShader (GLenum type);
+-GL_APICALL void GL_APIENTRY glCullFace (GLenum mode);
+-GL_APICALL void GL_APIENTRY glDeleteBuffers (GLsizei n, const GLuint* buffers);
+-GL_APICALL void GL_APIENTRY glDeleteFramebuffers (GLsizei n, const GLuint* framebuffers);
+-GL_APICALL void GL_APIENTRY glDeleteProgram (GLuint program);
+-GL_APICALL void GL_APIENTRY glDeleteRenderbuffers (GLsizei n, const GLuint* renderbuffers);
+-GL_APICALL void GL_APIENTRY glDeleteShader (GLuint shader);
+-GL_APICALL void GL_APIENTRY glDeleteTextures (GLsizei n, const GLuint* textures);
+-GL_APICALL void GL_APIENTRY glDepthFunc (GLenum func);
+-GL_APICALL void GL_APIENTRY glDepthMask (GLboolean flag);
+-GL_APICALL void GL_APIENTRY glDepthRangef (GLclampf zNear, GLclampf zFar);
+-GL_APICALL void GL_APIENTRY glDetachShader (GLuint program, GLuint shader);
+-GL_APICALL void GL_APIENTRY glDisable (GLenum cap);
+-GL_APICALL void GL_APIENTRY glDisableVertexAttribArray (GLuint index);
+-GL_APICALL void GL_APIENTRY glDrawArrays (GLenum mode, GLint first, GLsizei count);
+-GL_APICALL void GL_APIENTRY glDrawElements (GLenum mode, GLsizei count, GLenum type, const GLvoid* indices);
+-GL_APICALL void GL_APIENTRY glEnable (GLenum cap);
+-GL_APICALL void GL_APIENTRY glEnableVertexAttribArray (GLuint index);
+-GL_APICALL void GL_APIENTRY glFinish (void);
+-GL_APICALL void GL_APIENTRY glFlush (void);
+-GL_APICALL void GL_APIENTRY glFramebufferRenderbuffer (GLenum target, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer);
+-GL_APICALL void GL_APIENTRY glFramebufferTexture2D (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level);
+-GL_APICALL void GL_APIENTRY glFrontFace (GLenum mode);
+-GL_APICALL void GL_APIENTRY glGenBuffers (GLsizei n, GLuint* buffers);
+-GL_APICALL void GL_APIENTRY glGenerateMipmap (GLenum target);
+-GL_APICALL void GL_APIENTRY glGenFramebuffers (GLsizei n, GLuint* framebuffers);
+-GL_APICALL void GL_APIENTRY glGenRenderbuffers (GLsizei n, GLuint* renderbuffers);
+-GL_APICALL void GL_APIENTRY glGenTextures (GLsizei n, GLuint* textures);
+-GL_APICALL void GL_APIENTRY glGetActiveAttrib (GLuint program, GLuint index, GLsizei bufsize, GLsizei* length, GLint* size, GLenum* type, GLchar* name);
+-GL_APICALL void GL_APIENTRY glGetActiveUniform (GLuint program, GLuint index, GLsizei bufsize, GLsizei* length, GLint* size, GLenum* type, GLchar* name);
+-GL_APICALL void GL_APIENTRY glGetAttachedShaders (GLuint program, GLsizei maxcount, GLsizei* count, GLuint* shaders);
+-GL_APICALL GLint GL_APIENTRY glGetAttribLocation (GLuint program, const GLchar* name);
+-GL_APICALL void GL_APIENTRY glGetBooleanv (GLenum pname, GLboolean* params);
+-GL_APICALL void GL_APIENTRY glGetBufferParameteriv (GLenum target, GLenum pname, GLint* params);
+-GL_APICALL GLenum GL_APIENTRY glGetError (void);
+-GL_APICALL void GL_APIENTRY glGetFloatv (GLenum pname, GLfloat* params);
+-GL_APICALL void GL_APIENTRY glGetFramebufferAttachmentParameteriv (GLenum target, GLenum attachment, GLenum pname, GLint* params);
+-GL_APICALL void GL_APIENTRY glGetIntegerv (GLenum pname, GLint* params);
+-GL_APICALL void GL_APIENTRY glGetProgramiv (GLuint program, GLenum pname, GLint* params);
+-GL_APICALL void GL_APIENTRY glGetProgramInfoLog (GLuint program, GLsizei bufsize, GLsizei* length, GLchar* infolog);
+-GL_APICALL void GL_APIENTRY glGetRenderbufferParameteriv (GLenum target, GLenum pname, GLint* params);
+-GL_APICALL void GL_APIENTRY glGetShaderiv (GLuint shader, GLenum pname, GLint* params);
+-GL_APICALL void GL_APIENTRY glGetShaderInfoLog (GLuint shader, GLsizei bufsize, GLsizei* length, GLchar* infolog);
+-GL_APICALL void GL_APIENTRY glGetShaderPrecisionFormat (GLenum shadertype, GLenum precisiontype, GLint* range, GLint* precision);
+-GL_APICALL void GL_APIENTRY glGetShaderSource (GLuint shader, GLsizei bufsize, GLsizei* length, GLchar* source);
+-GL_APICALL const GLubyte* GL_APIENTRY glGetString (GLenum name);
+-GL_APICALL void GL_APIENTRY glGetTexParameterfv (GLenum target, GLenum pname, GLfloat* params);
+-GL_APICALL void GL_APIENTRY glGetTexParameteriv (GLenum target, GLenum pname, GLint* params);
+-GL_APICALL void GL_APIENTRY glGetUniformfv (GLuint program, GLint location, GLfloat* params);
+-GL_APICALL void GL_APIENTRY glGetUniformiv (GLuint program, GLint location, GLint* params);
+-GL_APICALL GLint GL_APIENTRY glGetUniformLocation (GLuint program, const GLchar* name);
+-GL_APICALL void GL_APIENTRY glGetVertexAttribfv (GLuint index, GLenum pname, GLfloat* params);
+-GL_APICALL void GL_APIENTRY glGetVertexAttribiv (GLuint index, GLenum pname, GLint* params);
+-GL_APICALL void GL_APIENTRY glGetVertexAttribPointerv (GLuint index, GLenum pname, GLvoid** pointer);
+-GL_APICALL void GL_APIENTRY glHint (GLenum target, GLenum mode);
+-GL_APICALL GLboolean GL_APIENTRY glIsBuffer (GLuint buffer);
+-GL_APICALL GLboolean GL_APIENTRY glIsEnabled (GLenum cap);
+-GL_APICALL GLboolean GL_APIENTRY glIsFramebuffer (GLuint framebuffer);
+-GL_APICALL GLboolean GL_APIENTRY glIsProgram (GLuint program);
+-GL_APICALL GLboolean GL_APIENTRY glIsRenderbuffer (GLuint renderbuffer);
+-GL_APICALL GLboolean GL_APIENTRY glIsShader (GLuint shader);
+-GL_APICALL GLboolean GL_APIENTRY glIsTexture (GLuint texture);
+-GL_APICALL void GL_APIENTRY glLineWidth (GLfloat width);
+-GL_APICALL void GL_APIENTRY glLinkProgram (GLuint program);
+-GL_APICALL void GL_APIENTRY glPixelStorei (GLenum pname, GLint param);
+-GL_APICALL void GL_APIENTRY glPolygonOffset (GLfloat factor, GLfloat units);
+-GL_APICALL void GL_APIENTRY glReadPixels (GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLvoid* pixels);
+-GL_APICALL void GL_APIENTRY glReleaseShaderCompiler (void);
+-GL_APICALL void GL_APIENTRY glRenderbufferStorage (GLenum target, GLenum internalformat, GLsizei width, GLsizei height);
+-GL_APICALL void GL_APIENTRY glSampleCoverage (GLclampf value, GLboolean invert);
+-GL_APICALL void GL_APIENTRY glScissor (GLint x, GLint y, GLsizei width, GLsizei height);
+-GL_APICALL void GL_APIENTRY glShaderBinary (GLsizei n, const GLuint* shaders, GLenum binaryformat, const GLvoid* binary, GLsizei length);
+-GL_APICALL void GL_APIENTRY glShaderSource (GLuint shader, GLsizei count, const GLchar* const* string, const GLint* length);
+-GL_APICALL void GL_APIENTRY glStencilFunc (GLenum func, GLint ref, GLuint mask);
+-GL_APICALL void GL_APIENTRY glStencilFuncSeparate (GLenum face, GLenum func, GLint ref, GLuint mask);
+-GL_APICALL void GL_APIENTRY glStencilMask (GLuint mask);
+-GL_APICALL void GL_APIENTRY glStencilMaskSeparate (GLenum face, GLuint mask);
+-GL_APICALL void GL_APIENTRY glStencilOp (GLenum fail, GLenum zfail, GLenum zpass);
+-GL_APICALL void GL_APIENTRY glStencilOpSeparate (GLenum face, GLenum fail, GLenum zfail, GLenum zpass);
+-GL_APICALL void GL_APIENTRY glTexImage2D (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLint border, GLenum format, GLenum type, const GLvoid* pixels);
+-GL_APICALL void GL_APIENTRY glTexParameterf (GLenum target, GLenum pname, GLfloat param);
+-GL_APICALL void GL_APIENTRY glTexParameterfv (GLenum target, GLenum pname, const GLfloat* params);
+-GL_APICALL void GL_APIENTRY glTexParameteri (GLenum target, GLenum pname, GLint param);
+-GL_APICALL void GL_APIENTRY glTexParameteriv (GLenum target, GLenum pname, const GLint* params);
+-GL_APICALL void GL_APIENTRY glTexSubImage2D (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid* pixels);
+-GL_APICALL void GL_APIENTRY glUniform1f (GLint location, GLfloat x);
+-GL_APICALL void GL_APIENTRY glUniform1fv (GLint location, GLsizei count, const GLfloat* v);
+-GL_APICALL void GL_APIENTRY glUniform1i (GLint location, GLint x);
+-GL_APICALL void GL_APIENTRY glUniform1iv (GLint location, GLsizei count, const GLint* v);
+-GL_APICALL void GL_APIENTRY glUniform2f (GLint location, GLfloat x, GLfloat y);
+-GL_APICALL void GL_APIENTRY glUniform2fv (GLint location, GLsizei count, const GLfloat* v);
+-GL_APICALL void GL_APIENTRY glUniform2i (GLint location, GLint x, GLint y);
+-GL_APICALL void GL_APIENTRY glUniform2iv (GLint location, GLsizei count, const GLint* v);
+-GL_APICALL void GL_APIENTRY glUniform3f (GLint location, GLfloat x, GLfloat y, GLfloat z);
+-GL_APICALL void GL_APIENTRY glUniform3fv (GLint location, GLsizei count, const GLfloat* v);
+-GL_APICALL void GL_APIENTRY glUniform3i (GLint location, GLint x, GLint y, GLint z);
+-GL_APICALL void GL_APIENTRY glUniform3iv (GLint location, GLsizei count, const GLint* v);
+-GL_APICALL void GL_APIENTRY glUniform4f (GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+-GL_APICALL void GL_APIENTRY glUniform4fv (GLint location, GLsizei count, const GLfloat* v);
+-GL_APICALL void GL_APIENTRY glUniform4i (GLint location, GLint x, GLint y, GLint z, GLint w);
+-GL_APICALL void GL_APIENTRY glUniform4iv (GLint location, GLsizei count, const GLint* v);
+-GL_APICALL void GL_APIENTRY glUniformMatrix2fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat* value);
+-GL_APICALL void GL_APIENTRY glUniformMatrix3fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat* value);
+-GL_APICALL void GL_APIENTRY glUniformMatrix4fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat* value);
+-GL_APICALL void GL_APIENTRY glUseProgram (GLuint program);
+-GL_APICALL void GL_APIENTRY glValidateProgram (GLuint program);
+-GL_APICALL void GL_APIENTRY glVertexAttrib1f (GLuint indx, GLfloat x);
+-GL_APICALL void GL_APIENTRY glVertexAttrib1fv (GLuint indx, const GLfloat* values);
+-GL_APICALL void GL_APIENTRY glVertexAttrib2f (GLuint indx, GLfloat x, GLfloat y);
+-GL_APICALL void GL_APIENTRY glVertexAttrib2fv (GLuint indx, const GLfloat* values);
+-GL_APICALL void GL_APIENTRY glVertexAttrib3f (GLuint indx, GLfloat x, GLfloat y, GLfloat z);
+-GL_APICALL void GL_APIENTRY glVertexAttrib3fv (GLuint indx, const GLfloat* values);
+-GL_APICALL void GL_APIENTRY glVertexAttrib4f (GLuint indx, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+-GL_APICALL void GL_APIENTRY glVertexAttrib4fv (GLuint indx, const GLfloat* values);
+-GL_APICALL void GL_APIENTRY glVertexAttribPointer (GLuint indx, GLint size, GLenum type, GLboolean normalized, GLsizei stride, const GLvoid* ptr);
+-GL_APICALL void GL_APIENTRY glViewport (GLint x, GLint y, GLsizei width, GLsizei height);
+-
+-#ifdef __cplusplus
+-}
+-#endif
+-
+-#endif /* __gl2_h_ */
+diff --git a/include/GLES2/gl2ext.h b/include/GLES2/gl2ext.h
+deleted file mode 100644
+index 4ac971a..0000000
+--- a/include/GLES2/gl2ext.h
++++ /dev/null
+@@ -1,2051 +0,0 @@
+-#ifndef __gl2ext_h_
+-#define __gl2ext_h_
+-
+-/* $Revision: 22161 $ on $Date:: 2013-06-25 08:17:27 -0700 #$ */
+-
+-#ifdef __cplusplus
+-extern "C" {
+-#endif
+-
+-/*
+- * This document is licensed under the SGI Free Software B License Version
+- * 2.0. For details, see http://oss.sgi.com/projects/FreeB/ .
+- */
+-
+-#ifndef GL_APIENTRYP
+-# define GL_APIENTRYP GL_APIENTRY*
+-#endif
+-
+-/* New types shared by several extensions */
+-
+-#ifndef __gl3_h_
+-/* These are defined with respect to <inttypes.h> in the
+- * Apple extension spec, but they are also used by non-APPLE
+- * extensions, and in the Khronos header we use the Khronos
+- * portable types in khrplatform.h, which must be defined.
+- */
+-typedef khronos_int64_t GLint64;
+-typedef khronos_uint64_t GLuint64;
+-typedef struct __GLsync *GLsync;
+-#endif
+-
+-
+-/*------------------------------------------------------------------------*
+- * OES extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_OES_compressed_ETC1_RGB8_texture */
+-#ifndef GL_OES_compressed_ETC1_RGB8_texture
+-#define GL_ETC1_RGB8_OES 0x8D64
+-#endif
+-
+-/* GL_OES_compressed_paletted_texture */
+-#ifndef GL_OES_compressed_paletted_texture
+-#define GL_PALETTE4_RGB8_OES 0x8B90
+-#define GL_PALETTE4_RGBA8_OES 0x8B91
+-#define GL_PALETTE4_R5_G6_B5_OES 0x8B92
+-#define GL_PALETTE4_RGBA4_OES 0x8B93
+-#define GL_PALETTE4_RGB5_A1_OES 0x8B94
+-#define GL_PALETTE8_RGB8_OES 0x8B95
+-#define GL_PALETTE8_RGBA8_OES 0x8B96
+-#define GL_PALETTE8_R5_G6_B5_OES 0x8B97
+-#define GL_PALETTE8_RGBA4_OES 0x8B98
+-#define GL_PALETTE8_RGB5_A1_OES 0x8B99
+-#endif
+-
+-/* GL_OES_depth24 */
+-#ifndef GL_OES_depth24
+-#define GL_DEPTH_COMPONENT24_OES 0x81A6
+-#endif
+-
+-/* GL_OES_depth32 */
+-#ifndef GL_OES_depth32
+-#define GL_DEPTH_COMPONENT32_OES 0x81A7
+-#endif
+-
+-/* GL_OES_depth_texture */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_OES_EGL_image */
+-#ifndef GL_OES_EGL_image
+-typedef void* GLeglImageOES;
+-#endif
+-
+-/* GL_OES_EGL_image_external */
+-#ifndef GL_OES_EGL_image_external
+-/* GLeglImageOES defined in GL_OES_EGL_image already. */
+-#define GL_TEXTURE_EXTERNAL_OES 0x8D65
+-#define GL_SAMPLER_EXTERNAL_OES 0x8D66
+-#define GL_TEXTURE_BINDING_EXTERNAL_OES 0x8D67
+-#define GL_REQUIRED_TEXTURE_IMAGE_UNITS_OES 0x8D68
+-#endif
+-
+-/* GL_OES_element_index_uint */
+-#ifndef GL_OES_element_index_uint
+-#define GL_UNSIGNED_INT 0x1405
+-#endif
+-
+-/* GL_OES_get_program_binary */
+-#ifndef GL_OES_get_program_binary
+-#define GL_PROGRAM_BINARY_LENGTH_OES 0x8741
+-#define GL_NUM_PROGRAM_BINARY_FORMATS_OES 0x87FE
+-#define GL_PROGRAM_BINARY_FORMATS_OES 0x87FF
+-#endif
+-
+-/* GL_OES_mapbuffer */
+-#ifndef GL_OES_mapbuffer
+-#define GL_WRITE_ONLY_OES 0x88B9
+-#define GL_BUFFER_ACCESS_OES 0x88BB
+-#define GL_BUFFER_MAPPED_OES 0x88BC
+-#define GL_BUFFER_MAP_POINTER_OES 0x88BD
+-#endif
+-
+-/* GL_OES_packed_depth_stencil */
+-#ifndef GL_OES_packed_depth_stencil
+-#define GL_DEPTH_STENCIL_OES 0x84F9
+-#define GL_UNSIGNED_INT_24_8_OES 0x84FA
+-#define GL_DEPTH24_STENCIL8_OES 0x88F0
+-#endif
+-
+-/* GL_OES_required_internalformat */
+-#ifndef GL_OES_required_internalformat
+-#define GL_ALPHA8_OES 0x803C
+-#define GL_DEPTH_COMPONENT16_OES 0x81A5
+-/* reuse GL_DEPTH_COMPONENT24_OES */
+-/* reuse GL_DEPTH24_STENCIL8_OES */
+-/* reuse GL_DEPTH_COMPONENT32_OES */
+-#define GL_LUMINANCE4_ALPHA4_OES 0x8043
+-#define GL_LUMINANCE8_ALPHA8_OES 0x8045
+-#define GL_LUMINANCE8_OES 0x8040
+-#define GL_RGBA4_OES 0x8056
+-#define GL_RGB5_A1_OES 0x8057
+-#define GL_RGB565_OES 0x8D62
+-/* reuse GL_RGB8_OES */
+-/* reuse GL_RGBA8_OES */
+-/* reuse GL_RGB10_EXT */
+-/* reuse GL_RGB10_A2_EXT */
+-#endif
+-
+-/* GL_OES_rgb8_rgba8 */
+-#ifndef GL_OES_rgb8_rgba8
+-#define GL_RGB8_OES 0x8051
+-#define GL_RGBA8_OES 0x8058
+-#endif
+-
+-/* GL_OES_standard_derivatives */
+-#ifndef GL_OES_standard_derivatives
+-#define GL_FRAGMENT_SHADER_DERIVATIVE_HINT_OES 0x8B8B
+-#endif
+-
+-/* GL_OES_stencil1 */
+-#ifndef GL_OES_stencil1
+-#define GL_STENCIL_INDEX1_OES 0x8D46
+-#endif
+-
+-/* GL_OES_stencil4 */
+-#ifndef GL_OES_stencil4
+-#define GL_STENCIL_INDEX4_OES 0x8D47
+-#endif
+-
+-#ifndef GL_OES_surfaceless_context
+-#define GL_FRAMEBUFFER_UNDEFINED_OES 0x8219
+-#endif
+-
+-/* GL_OES_texture_3D */
+-#ifndef GL_OES_texture_3D
+-#define GL_TEXTURE_WRAP_R_OES 0x8072
+-#define GL_TEXTURE_3D_OES 0x806F
+-#define GL_TEXTURE_BINDING_3D_OES 0x806A
+-#define GL_MAX_3D_TEXTURE_SIZE_OES 0x8073
+-#define GL_SAMPLER_3D_OES 0x8B5F
+-#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_3D_ZOFFSET_OES 0x8CD4
+-#endif
+-
+-/* GL_OES_texture_float */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_OES_texture_float_linear */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_OES_texture_half_float */
+-#ifndef GL_OES_texture_half_float
+-#define GL_HALF_FLOAT_OES 0x8D61
+-#endif
+-
+-/* GL_OES_texture_half_float_linear */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_OES_texture_npot */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_OES_vertex_array_object */
+-#ifndef GL_OES_vertex_array_object
+-#define GL_VERTEX_ARRAY_BINDING_OES 0x85B5
+-#endif
+-
+-/* GL_OES_vertex_half_float */
+-/* GL_HALF_FLOAT_OES defined in GL_OES_texture_half_float already. */
+-
+-/* GL_OES_vertex_type_10_10_10_2 */
+-#ifndef GL_OES_vertex_type_10_10_10_2
+-#define GL_UNSIGNED_INT_10_10_10_2_OES 0x8DF6
+-#define GL_INT_10_10_10_2_OES 0x8DF7
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * KHR extension tokens
+- *------------------------------------------------------------------------*/
+-
+-#ifndef GL_KHR_debug
+-typedef void (GL_APIENTRYP GLDEBUGPROCKHR)(GLenum source,GLenum type,GLuint id,GLenum severity,GLsizei length,const GLchar *message,const GLvoid *userParam);
+-#define GL_DEBUG_OUTPUT_SYNCHRONOUS_KHR 0x8242
+-#define GL_DEBUG_NEXT_LOGGED_MESSAGE_LENGTH_KHR 0x8243
+-#define GL_DEBUG_CALLBACK_FUNCTION_KHR 0x8244
+-#define GL_DEBUG_CALLBACK_USER_PARAM_KHR 0x8245
+-#define GL_DEBUG_SOURCE_API_KHR 0x8246
+-#define GL_DEBUG_SOURCE_WINDOW_SYSTEM_KHR 0x8247
+-#define GL_DEBUG_SOURCE_SHADER_COMPILER_KHR 0x8248
+-#define GL_DEBUG_SOURCE_THIRD_PARTY_KHR 0x8249
+-#define GL_DEBUG_SOURCE_APPLICATION_KHR 0x824A
+-#define GL_DEBUG_SOURCE_OTHER_KHR 0x824B
+-#define GL_DEBUG_TYPE_ERROR_KHR 0x824C
+-#define GL_DEBUG_TYPE_DEPRECATED_BEHAVIOR_KHR 0x824D
+-#define GL_DEBUG_TYPE_UNDEFINED_BEHAVIOR_KHR 0x824E
+-#define GL_DEBUG_TYPE_PORTABILITY_KHR 0x824F
+-#define GL_DEBUG_TYPE_PERFORMANCE_KHR 0x8250
+-#define GL_DEBUG_TYPE_OTHER_KHR 0x8251
+-#define GL_DEBUG_TYPE_MARKER_KHR 0x8268
+-#define GL_DEBUG_TYPE_PUSH_GROUP_KHR 0x8269
+-#define GL_DEBUG_TYPE_POP_GROUP_KHR 0x826A
+-#define GL_DEBUG_SEVERITY_NOTIFICATION_KHR 0x826B
+-#define GL_MAX_DEBUG_GROUP_STACK_DEPTH_KHR 0x826C
+-#define GL_DEBUG_GROUP_STACK_DEPTH_KHR 0x826D
+-#define GL_BUFFER_KHR 0x82E0
+-#define GL_SHADER_KHR 0x82E1
+-#define GL_PROGRAM_KHR 0x82E2
+-#define GL_QUERY_KHR 0x82E3
+-/* PROGRAM_PIPELINE only in GL */
+-#define GL_SAMPLER_KHR 0x82E6
+-/* DISPLAY_LIST only in GL */
+-#define GL_MAX_LABEL_LENGTH_KHR 0x82E8
+-#define GL_MAX_DEBUG_MESSAGE_LENGTH_KHR 0x9143
+-#define GL_MAX_DEBUG_LOGGED_MESSAGES_KHR 0x9144
+-#define GL_DEBUG_LOGGED_MESSAGES_KHR 0x9145
+-#define GL_DEBUG_SEVERITY_HIGH_KHR 0x9146
+-#define GL_DEBUG_SEVERITY_MEDIUM_KHR 0x9147
+-#define GL_DEBUG_SEVERITY_LOW_KHR 0x9148
+-#define GL_DEBUG_OUTPUT_KHR 0x92E0
+-#define GL_CONTEXT_FLAG_DEBUG_BIT_KHR 0x00000002
+-#define GL_STACK_OVERFLOW_KHR 0x0503
+-#define GL_STACK_UNDERFLOW_KHR 0x0504
+-#endif
+-
+-#ifndef GL_KHR_texture_compression_astc_ldr
+-#define GL_COMPRESSED_RGBA_ASTC_4x4_KHR 0x93B0
+-#define GL_COMPRESSED_RGBA_ASTC_5x4_KHR 0x93B1
+-#define GL_COMPRESSED_RGBA_ASTC_5x5_KHR 0x93B2
+-#define GL_COMPRESSED_RGBA_ASTC_6x5_KHR 0x93B3
+-#define GL_COMPRESSED_RGBA_ASTC_6x6_KHR 0x93B4
+-#define GL_COMPRESSED_RGBA_ASTC_8x5_KHR 0x93B5
+-#define GL_COMPRESSED_RGBA_ASTC_8x6_KHR 0x93B6
+-#define GL_COMPRESSED_RGBA_ASTC_8x8_KHR 0x93B7
+-#define GL_COMPRESSED_RGBA_ASTC_10x5_KHR 0x93B8
+-#define GL_COMPRESSED_RGBA_ASTC_10x6_KHR 0x93B9
+-#define GL_COMPRESSED_RGBA_ASTC_10x8_KHR 0x93BA
+-#define GL_COMPRESSED_RGBA_ASTC_10x10_KHR 0x93BB
+-#define GL_COMPRESSED_RGBA_ASTC_12x10_KHR 0x93BC
+-#define GL_COMPRESSED_RGBA_ASTC_12x12_KHR 0x93BD
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR 0x93D0
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR 0x93D1
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR 0x93D2
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR 0x93D3
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR 0x93D4
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR 0x93D5
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR 0x93D6
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR 0x93D7
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR 0x93D8
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR 0x93D9
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR 0x93DA
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR 0x93DB
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR 0x93DC
+-#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR 0x93DD
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * AMD extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_AMD_compressed_3DC_texture */
+-#ifndef GL_AMD_compressed_3DC_texture
+-#define GL_3DC_X_AMD 0x87F9
+-#define GL_3DC_XY_AMD 0x87FA
+-#endif
+-
+-/* GL_AMD_compressed_ATC_texture */
+-#ifndef GL_AMD_compressed_ATC_texture
+-#define GL_ATC_RGB_AMD 0x8C92
+-#define GL_ATC_RGBA_EXPLICIT_ALPHA_AMD 0x8C93
+-#define GL_ATC_RGBA_INTERPOLATED_ALPHA_AMD 0x87EE
+-#endif
+-
+-/* GL_AMD_performance_monitor */
+-#ifndef GL_AMD_performance_monitor
+-#define GL_COUNTER_TYPE_AMD 0x8BC0
+-#define GL_COUNTER_RANGE_AMD 0x8BC1
+-#define GL_UNSIGNED_INT64_AMD 0x8BC2
+-#define GL_PERCENTAGE_AMD 0x8BC3
+-#define GL_PERFMON_RESULT_AVAILABLE_AMD 0x8BC4
+-#define GL_PERFMON_RESULT_SIZE_AMD 0x8BC5
+-#define GL_PERFMON_RESULT_AMD 0x8BC6
+-#endif
+-
+-/* GL_AMD_program_binary_Z400 */
+-#ifndef GL_AMD_program_binary_Z400
+-#define GL_Z400_BINARY_AMD 0x8740
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * ANGLE extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_ANGLE_depth_texture */
+-#ifndef GL_ANGLE_depth_texture
+-#define GL_DEPTH_COMPONENT 0x1902
+-#define GL_DEPTH_STENCIL_OES 0x84F9
+-#define GL_UNSIGNED_SHORT 0x1403
+-#define GL_UNSIGNED_INT 0x1405
+-#define GL_UNSIGNED_INT_24_8_OES 0x84FA
+-#define GL_DEPTH_COMPONENT16 0x81A5
+-#define GL_DEPTH_COMPONENT32_OES 0x81A7
+-#define GL_DEPTH24_STENCIL8_OES 0x88F0
+-#endif
+-
+-/* GL_ANGLE_framebuffer_blit */
+-#ifndef GL_ANGLE_framebuffer_blit
+-#define GL_READ_FRAMEBUFFER_ANGLE 0x8CA8
+-#define GL_DRAW_FRAMEBUFFER_ANGLE 0x8CA9
+-#define GL_DRAW_FRAMEBUFFER_BINDING_ANGLE 0x8CA6
+-#define GL_READ_FRAMEBUFFER_BINDING_ANGLE 0x8CAA
+-#endif
+-
+-/* GL_ANGLE_framebuffer_multisample */
+-#ifndef GL_ANGLE_framebuffer_multisample
+-#define GL_RENDERBUFFER_SAMPLES_ANGLE 0x8CAB
+-#define GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_ANGLE 0x8D56
+-#define GL_MAX_SAMPLES_ANGLE 0x8D57
+-#endif
+-
+-/* GL_ANGLE_instanced_arrays */
+-#ifndef GL_ANGLE_instanced_arrays
+-#define GL_VERTEX_ATTRIB_ARRAY_DIVISOR_ANGLE 0x88FE
+-#endif
+-
+-/* GL_ANGLE_pack_reverse_row_order */
+-#ifndef GL_ANGLE_pack_reverse_row_order
+-#define GL_PACK_REVERSE_ROW_ORDER_ANGLE 0x93A4
+-#endif
+-
+-/* GL_ANGLE_program_binary */
+-#ifndef GL_ANGLE_program_binary
+-#define GL_PROGRAM_BINARY_ANGLE 0x93A6
+-#endif
+-
+-/* GL_ANGLE_texture_compression_dxt3 */
+-#ifndef GL_ANGLE_texture_compression_dxt3
+-#define GL_COMPRESSED_RGBA_S3TC_DXT3_ANGLE 0x83F2
+-#endif
+-
+-/* GL_ANGLE_texture_compression_dxt5 */
+-#ifndef GL_ANGLE_texture_compression_dxt5
+-#define GL_COMPRESSED_RGBA_S3TC_DXT5_ANGLE 0x83F3
+-#endif
+-
+-/* GL_ANGLE_texture_usage */
+-#ifndef GL_ANGLE_texture_usage
+-#define GL_TEXTURE_USAGE_ANGLE 0x93A2
+-#define GL_FRAMEBUFFER_ATTACHMENT_ANGLE 0x93A3
+-#endif
+-
+-/* GL_ANGLE_translated_shader_source */
+-#ifndef GL_ANGLE_translated_shader_source
+-#define GL_TRANSLATED_SHADER_SOURCE_LENGTH_ANGLE 0x93A0
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * APPLE extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_APPLE_copy_texture_levels */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_APPLE_framebuffer_multisample */
+-#ifndef GL_APPLE_framebuffer_multisample
+-#define GL_RENDERBUFFER_SAMPLES_APPLE 0x8CAB
+-#define GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_APPLE 0x8D56
+-#define GL_MAX_SAMPLES_APPLE 0x8D57
+-#define GL_READ_FRAMEBUFFER_APPLE 0x8CA8
+-#define GL_DRAW_FRAMEBUFFER_APPLE 0x8CA9
+-#define GL_DRAW_FRAMEBUFFER_BINDING_APPLE 0x8CA6
+-#define GL_READ_FRAMEBUFFER_BINDING_APPLE 0x8CAA
+-#endif
+-
+-/* GL_APPLE_rgb_422 */
+-#ifndef GL_APPLE_rgb_422
+-#define GL_RGB_422_APPLE 0x8A1F
+-#define GL_UNSIGNED_SHORT_8_8_APPLE 0x85BA
+-#define GL_UNSIGNED_SHORT_8_8_REV_APPLE 0x85BB
+-#endif
+-
+-/* GL_APPLE_sync */
+-#ifndef GL_APPLE_sync
+-
+-#define GL_SYNC_OBJECT_APPLE 0x8A53
+-#define GL_MAX_SERVER_WAIT_TIMEOUT_APPLE 0x9111
+-#define GL_OBJECT_TYPE_APPLE 0x9112
+-#define GL_SYNC_CONDITION_APPLE 0x9113
+-#define GL_SYNC_STATUS_APPLE 0x9114
+-#define GL_SYNC_FLAGS_APPLE 0x9115
+-#define GL_SYNC_FENCE_APPLE 0x9116
+-#define GL_SYNC_GPU_COMMANDS_COMPLETE_APPLE 0x9117
+-#define GL_UNSIGNALED_APPLE 0x9118
+-#define GL_SIGNALED_APPLE 0x9119
+-#define GL_ALREADY_SIGNALED_APPLE 0x911A
+-#define GL_TIMEOUT_EXPIRED_APPLE 0x911B
+-#define GL_CONDITION_SATISFIED_APPLE 0x911C
+-#define GL_WAIT_FAILED_APPLE 0x911D
+-#define GL_SYNC_FLUSH_COMMANDS_BIT_APPLE 0x00000001
+-#define GL_TIMEOUT_IGNORED_APPLE 0xFFFFFFFFFFFFFFFFull
+-#endif
+-
+-/* GL_APPLE_texture_format_BGRA8888 */
+-#ifndef GL_APPLE_texture_format_BGRA8888
+-#define GL_BGRA_EXT 0x80E1
+-#endif
+-
+-/* GL_APPLE_texture_max_level */
+-#ifndef GL_APPLE_texture_max_level
+-#define GL_TEXTURE_MAX_LEVEL_APPLE 0x813D
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * ARM extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_ARM_mali_program_binary */
+-#ifndef GL_ARM_mali_program_binary
+-#define GL_MALI_PROGRAM_BINARY_ARM 0x8F61
+-#endif
+-
+-/* GL_ARM_mali_shader_binary */
+-#ifndef GL_ARM_mali_shader_binary
+-#define GL_MALI_SHADER_BINARY_ARM 0x8F60
+-#endif
+-
+-/* GL_ARM_rgba8 */
+-/* No new tokens introduced by this extension. */
+-
+-/*------------------------------------------------------------------------*
+- * EXT extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_EXT_blend_minmax */
+-#ifndef GL_EXT_blend_minmax
+-#define GL_MIN_EXT 0x8007
+-#define GL_MAX_EXT 0x8008
+-#endif
+-
+-/* GL_EXT_color_buffer_half_float */
+-#ifndef GL_EXT_color_buffer_half_float
+-#define GL_RGBA16F_EXT 0x881A
+-#define GL_RGB16F_EXT 0x881B
+-#define GL_RG16F_EXT 0x822F
+-#define GL_R16F_EXT 0x822D
+-#define GL_FRAMEBUFFER_ATTACHMENT_COMPONENT_TYPE_EXT 0x8211
+-#define GL_UNSIGNED_NORMALIZED_EXT 0x8C17
+-#endif
+-
+-/* GL_EXT_debug_label */
+-#ifndef GL_EXT_debug_label
+-#define GL_PROGRAM_PIPELINE_OBJECT_EXT 0x8A4F
+-#define GL_PROGRAM_OBJECT_EXT 0x8B40
+-#define GL_SHADER_OBJECT_EXT 0x8B48
+-#define GL_BUFFER_OBJECT_EXT 0x9151
+-#define GL_QUERY_OBJECT_EXT 0x9153
+-#define GL_VERTEX_ARRAY_OBJECT_EXT 0x9154
+-#endif
+-
+-/* GL_EXT_debug_marker */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_EXT_discard_framebuffer */
+-#ifndef GL_EXT_discard_framebuffer
+-#define GL_COLOR_EXT 0x1800
+-#define GL_DEPTH_EXT 0x1801
+-#define GL_STENCIL_EXT 0x1802
+-#endif
+-
+-#ifndef GL_EXT_disjoint_timer_query
+-#define GL_QUERY_COUNTER_BITS_EXT 0x8864
+-#define GL_CURRENT_QUERY_EXT 0x8865
+-#define GL_QUERY_RESULT_EXT 0x8866
+-#define GL_QUERY_RESULT_AVAILABLE_EXT 0x8867
+-#define GL_TIME_ELAPSED_EXT 0x88BF
+-#define GL_TIMESTAMP_EXT 0x8E28
+-#define GL_GPU_DISJOINT_EXT 0x8FBB
+-#endif
+-
+-#ifndef GL_EXT_draw_buffers
+-#define GL_EXT_draw_buffers 1
+-#define GL_MAX_COLOR_ATTACHMENTS_EXT 0x8CDF
+-#define GL_MAX_DRAW_BUFFERS_EXT 0x8824
+-#define GL_DRAW_BUFFER0_EXT 0x8825
+-#define GL_DRAW_BUFFER1_EXT 0x8826
+-#define GL_DRAW_BUFFER2_EXT 0x8827
+-#define GL_DRAW_BUFFER3_EXT 0x8828
+-#define GL_DRAW_BUFFER4_EXT 0x8829
+-#define GL_DRAW_BUFFER5_EXT 0x882A
+-#define GL_DRAW_BUFFER6_EXT 0x882B
+-#define GL_DRAW_BUFFER7_EXT 0x882C
+-#define GL_DRAW_BUFFER8_EXT 0x882D
+-#define GL_DRAW_BUFFER9_EXT 0x882E
+-#define GL_DRAW_BUFFER10_EXT 0x882F
+-#define GL_DRAW_BUFFER11_EXT 0x8830
+-#define GL_DRAW_BUFFER12_EXT 0x8831
+-#define GL_DRAW_BUFFER13_EXT 0x8832
+-#define GL_DRAW_BUFFER14_EXT 0x8833
+-#define GL_DRAW_BUFFER15_EXT 0x8834
+-#define GL_COLOR_ATTACHMENT0_EXT 0x8CE0
+-#define GL_COLOR_ATTACHMENT1_EXT 0x8CE1
+-#define GL_COLOR_ATTACHMENT2_EXT 0x8CE2
+-#define GL_COLOR_ATTACHMENT3_EXT 0x8CE3
+-#define GL_COLOR_ATTACHMENT4_EXT 0x8CE4
+-#define GL_COLOR_ATTACHMENT5_EXT 0x8CE5
+-#define GL_COLOR_ATTACHMENT6_EXT 0x8CE6
+-#define GL_COLOR_ATTACHMENT7_EXT 0x8CE7
+-#define GL_COLOR_ATTACHMENT8_EXT 0x8CE8
+-#define GL_COLOR_ATTACHMENT9_EXT 0x8CE9
+-#define GL_COLOR_ATTACHMENT10_EXT 0x8CEA
+-#define GL_COLOR_ATTACHMENT11_EXT 0x8CEB
+-#define GL_COLOR_ATTACHMENT12_EXT 0x8CEC
+-#define GL_COLOR_ATTACHMENT13_EXT 0x8CED
+-#define GL_COLOR_ATTACHMENT14_EXT 0x8CEE
+-#define GL_COLOR_ATTACHMENT15_EXT 0x8CEF
+-#endif
+-
+-/* GL_EXT_map_buffer_range */
+-#ifndef GL_EXT_map_buffer_range
+-#define GL_MAP_READ_BIT_EXT 0x0001
+-#define GL_MAP_WRITE_BIT_EXT 0x0002
+-#define GL_MAP_INVALIDATE_RANGE_BIT_EXT 0x0004
+-#define GL_MAP_INVALIDATE_BUFFER_BIT_EXT 0x0008
+-#define GL_MAP_FLUSH_EXPLICIT_BIT_EXT 0x0010
+-#define GL_MAP_UNSYNCHRONIZED_BIT_EXT 0x0020
+-#endif
+-
+-/* GL_EXT_multisampled_render_to_texture */
+-#ifndef GL_EXT_multisampled_render_to_texture
+-#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_SAMPLES_EXT 0x8D6C
+-/* reuse values from GL_EXT_framebuffer_multisample (desktop extension) */
+-#define GL_RENDERBUFFER_SAMPLES_EXT 0x8CAB
+-#define GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_EXT 0x8D56
+-#define GL_MAX_SAMPLES_EXT 0x8D57
+-#endif
+-
+-/* GL_EXT_multiview_draw_buffers */
+-#ifndef GL_EXT_multiview_draw_buffers
+-#define GL_COLOR_ATTACHMENT_EXT 0x90F0
+-#define GL_MULTIVIEW_EXT 0x90F1
+-#define GL_DRAW_BUFFER_EXT 0x0C01
+-#define GL_READ_BUFFER_EXT 0x0C02
+-#define GL_MAX_MULTIVIEW_BUFFERS_EXT 0x90F2
+-#endif
+-
+-/* GL_EXT_multi_draw_arrays */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_EXT_occlusion_query_boolean */
+-#ifndef GL_EXT_occlusion_query_boolean
+-#define GL_ANY_SAMPLES_PASSED_EXT 0x8C2F
+-#define GL_ANY_SAMPLES_PASSED_CONSERVATIVE_EXT 0x8D6A
+-#define GL_CURRENT_QUERY_EXT 0x8865
+-#define GL_QUERY_RESULT_EXT 0x8866
+-#define GL_QUERY_RESULT_AVAILABLE_EXT 0x8867
+-#endif
+-
+-/* GL_EXT_read_format_bgra */
+-#ifndef GL_EXT_read_format_bgra
+-#define GL_BGRA_EXT 0x80E1
+-#define GL_UNSIGNED_SHORT_4_4_4_4_REV_EXT 0x8365
+-#define GL_UNSIGNED_SHORT_1_5_5_5_REV_EXT 0x8366
+-#endif
+-
+-/* GL_EXT_robustness */
+-#ifndef GL_EXT_robustness
+-/* reuse GL_NO_ERROR */
+-#define GL_GUILTY_CONTEXT_RESET_EXT 0x8253
+-#define GL_INNOCENT_CONTEXT_RESET_EXT 0x8254
+-#define GL_UNKNOWN_CONTEXT_RESET_EXT 0x8255
+-#define GL_CONTEXT_ROBUST_ACCESS_EXT 0x90F3
+-#define GL_RESET_NOTIFICATION_STRATEGY_EXT 0x8256
+-#define GL_LOSE_CONTEXT_ON_RESET_EXT 0x8252
+-#define GL_NO_RESET_NOTIFICATION_EXT 0x8261
+-#endif
+-
+-/* GL_EXT_separate_shader_objects */
+-#ifndef GL_EXT_separate_shader_objects
+-#define GL_VERTEX_SHADER_BIT_EXT 0x00000001
+-#define GL_FRAGMENT_SHADER_BIT_EXT 0x00000002
+-#define GL_ALL_SHADER_BITS_EXT 0xFFFFFFFF
+-#define GL_PROGRAM_SEPARABLE_EXT 0x8258
+-#define GL_ACTIVE_PROGRAM_EXT 0x8259
+-#define GL_PROGRAM_PIPELINE_BINDING_EXT 0x825A
+-#endif
+-
+-/* GL_EXT_shader_framebuffer_fetch */
+-#ifndef GL_EXT_shader_framebuffer_fetch
+-#define GL_FRAGMENT_SHADER_DISCARDS_SAMPLES_EXT 0x8A52
+-#endif
+-
+-/* GL_EXT_shader_texture_lod */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_EXT_shadow_samplers */
+-#ifndef GL_EXT_shadow_samplers
+-#define GL_TEXTURE_COMPARE_MODE_EXT 0x884C
+-#define GL_TEXTURE_COMPARE_FUNC_EXT 0x884D
+-#define GL_COMPARE_REF_TO_TEXTURE_EXT 0x884E
+-#define GL_SAMPLER_2D_SHADOW_EXT 0x8B62
+-#endif
+-
+-/* GL_EXT_sRGB */
+-#ifndef GL_EXT_sRGB
+-#define GL_SRGB_EXT 0x8C40
+-#define GL_SRGB_ALPHA_EXT 0x8C42
+-#define GL_SRGB8_ALPHA8_EXT 0x8C43
+-#define GL_FRAMEBUFFER_ATTACHMENT_COLOR_ENCODING_EXT 0x8210
+-#endif
+-
+-/* GL_EXT_texture_compression_dxt1 */
+-#ifndef GL_EXT_texture_compression_dxt1
+-#define GL_COMPRESSED_RGB_S3TC_DXT1_EXT 0x83F0
+-#define GL_COMPRESSED_RGBA_S3TC_DXT1_EXT 0x83F1
+-#endif
+-
+-/* GL_EXT_texture_filter_anisotropic */
+-#ifndef GL_EXT_texture_filter_anisotropic
+-#define GL_TEXTURE_MAX_ANISOTROPY_EXT 0x84FE
+-#define GL_MAX_TEXTURE_MAX_ANISOTROPY_EXT 0x84FF
+-#endif
+-
+-/* GL_EXT_texture_format_BGRA8888 */
+-#ifndef GL_EXT_texture_format_BGRA8888
+-#define GL_BGRA_EXT 0x80E1
+-#endif
+-
+-/* GL_EXT_texture_rg */
+-#ifndef GL_EXT_texture_rg
+-#define GL_RED_EXT 0x1903
+-#define GL_RG_EXT 0x8227
+-#define GL_R8_EXT 0x8229
+-#define GL_RG8_EXT 0x822B
+-#endif
+-
+-/* GL_EXT_texture_storage */
+-#ifndef GL_EXT_texture_storage
+-#define GL_TEXTURE_IMMUTABLE_FORMAT_EXT 0x912F
+-#define GL_ALPHA8_EXT 0x803C
+-#define GL_LUMINANCE8_EXT 0x8040
+-#define GL_LUMINANCE8_ALPHA8_EXT 0x8045
+-#define GL_RGBA32F_EXT 0x8814
+-#define GL_RGB32F_EXT 0x8815
+-#define GL_ALPHA32F_EXT 0x8816
+-#define GL_LUMINANCE32F_EXT 0x8818
+-#define GL_LUMINANCE_ALPHA32F_EXT 0x8819
+-/* reuse GL_RGBA16F_EXT */
+-/* reuse GL_RGB16F_EXT */
+-#define GL_ALPHA16F_EXT 0x881C
+-#define GL_LUMINANCE16F_EXT 0x881E
+-#define GL_LUMINANCE_ALPHA16F_EXT 0x881F
+-#define GL_RGB10_A2_EXT 0x8059
+-#define GL_RGB10_EXT 0x8052
+-#define GL_BGRA8_EXT 0x93A1
+-#define GL_R8_EXT 0x8229
+-#define GL_RG8_EXT 0x822B
+-#define GL_R32F_EXT 0x822E
+-#define GL_RG32F_EXT 0x8230
+-#define GL_R16F_EXT 0x822D
+-#define GL_RG16F_EXT 0x822F
+-#endif
+-
+-/* GL_EXT_texture_type_2_10_10_10_REV */
+-#ifndef GL_EXT_texture_type_2_10_10_10_REV
+-#define GL_UNSIGNED_INT_2_10_10_10_REV_EXT 0x8368
+-#endif
+-
+-/* GL_EXT_unpack_subimage */
+-#ifndef GL_EXT_unpack_subimage
+-#define GL_UNPACK_ROW_LENGTH_EXT 0x0CF2
+-#define GL_UNPACK_SKIP_ROWS_EXT 0x0CF3
+-#define GL_UNPACK_SKIP_PIXELS_EXT 0x0CF4
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * DMP extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_DMP_shader_binary */
+-#ifndef GL_DMP_shader_binary
+-#define GL_SHADER_BINARY_DMP 0x9250
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * FJ extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_FJ_shader_binary_GCCSO */
+-#ifndef GL_FJ_shader_binary_GCCSO
+-#define GL_GCCSO_SHADER_BINARY_FJ 0x9260
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * IMG extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_IMG_program_binary */
+-#ifndef GL_IMG_program_binary
+-#define GL_SGX_PROGRAM_BINARY_IMG 0x9130
+-#endif
+-
+-/* GL_IMG_read_format */
+-#ifndef GL_IMG_read_format
+-#define GL_BGRA_IMG 0x80E1
+-#define GL_UNSIGNED_SHORT_4_4_4_4_REV_IMG 0x8365
+-#endif
+-
+-/* GL_IMG_shader_binary */
+-#ifndef GL_IMG_shader_binary
+-#define GL_SGX_BINARY_IMG 0x8C0A
+-#endif
+-
+-/* GL_IMG_texture_compression_pvrtc */
+-#ifndef GL_IMG_texture_compression_pvrtc
+-#define GL_COMPRESSED_RGB_PVRTC_4BPPV1_IMG 0x8C00
+-#define GL_COMPRESSED_RGB_PVRTC_2BPPV1_IMG 0x8C01
+-#define GL_COMPRESSED_RGBA_PVRTC_4BPPV1_IMG 0x8C02
+-#define GL_COMPRESSED_RGBA_PVRTC_2BPPV1_IMG 0x8C03
+-#endif
+-
+-/* GL_IMG_texture_compression_pvrtc2 */
+-#ifndef GL_IMG_texture_compression_pvrtc2
+-#define GL_COMPRESSED_RGBA_PVRTC_2BPPV2_IMG 0x9137
+-#define GL_COMPRESSED_RGBA_PVRTC_4BPPV2_IMG 0x9138
+-#endif
+-
+-/* GL_IMG_multisampled_render_to_texture */
+-#ifndef GL_IMG_multisampled_render_to_texture
+-#define GL_RENDERBUFFER_SAMPLES_IMG 0x9133
+-#define GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_IMG 0x9134
+-#define GL_MAX_SAMPLES_IMG 0x9135
+-#define GL_TEXTURE_SAMPLES_IMG 0x9136
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * NV extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_NV_coverage_sample */
+-#ifndef GL_NV_coverage_sample
+-#define GL_COVERAGE_COMPONENT_NV 0x8ED0
+-#define GL_COVERAGE_COMPONENT4_NV 0x8ED1
+-#define GL_COVERAGE_ATTACHMENT_NV 0x8ED2
+-#define GL_COVERAGE_BUFFERS_NV 0x8ED3
+-#define GL_COVERAGE_SAMPLES_NV 0x8ED4
+-#define GL_COVERAGE_ALL_FRAGMENTS_NV 0x8ED5
+-#define GL_COVERAGE_EDGE_FRAGMENTS_NV 0x8ED6
+-#define GL_COVERAGE_AUTOMATIC_NV 0x8ED7
+-#define GL_COVERAGE_BUFFER_BIT_NV 0x00008000
+-#endif
+-
+-/* GL_NV_depth_nonlinear */
+-#ifndef GL_NV_depth_nonlinear
+-#define GL_DEPTH_COMPONENT16_NONLINEAR_NV 0x8E2C
+-#endif
+-
+-/* GL_NV_draw_buffers */
+-#ifndef GL_NV_draw_buffers
+-#define GL_MAX_DRAW_BUFFERS_NV 0x8824
+-#define GL_DRAW_BUFFER0_NV 0x8825
+-#define GL_DRAW_BUFFER1_NV 0x8826
+-#define GL_DRAW_BUFFER2_NV 0x8827
+-#define GL_DRAW_BUFFER3_NV 0x8828
+-#define GL_DRAW_BUFFER4_NV 0x8829
+-#define GL_DRAW_BUFFER5_NV 0x882A
+-#define GL_DRAW_BUFFER6_NV 0x882B
+-#define GL_DRAW_BUFFER7_NV 0x882C
+-#define GL_DRAW_BUFFER8_NV 0x882D
+-#define GL_DRAW_BUFFER9_NV 0x882E
+-#define GL_DRAW_BUFFER10_NV 0x882F
+-#define GL_DRAW_BUFFER11_NV 0x8830
+-#define GL_DRAW_BUFFER12_NV 0x8831
+-#define GL_DRAW_BUFFER13_NV 0x8832
+-#define GL_DRAW_BUFFER14_NV 0x8833
+-#define GL_DRAW_BUFFER15_NV 0x8834
+-#define GL_COLOR_ATTACHMENT0_NV 0x8CE0
+-#define GL_COLOR_ATTACHMENT1_NV 0x8CE1
+-#define GL_COLOR_ATTACHMENT2_NV 0x8CE2
+-#define GL_COLOR_ATTACHMENT3_NV 0x8CE3
+-#define GL_COLOR_ATTACHMENT4_NV 0x8CE4
+-#define GL_COLOR_ATTACHMENT5_NV 0x8CE5
+-#define GL_COLOR_ATTACHMENT6_NV 0x8CE6
+-#define GL_COLOR_ATTACHMENT7_NV 0x8CE7
+-#define GL_COLOR_ATTACHMENT8_NV 0x8CE8
+-#define GL_COLOR_ATTACHMENT9_NV 0x8CE9
+-#define GL_COLOR_ATTACHMENT10_NV 0x8CEA
+-#define GL_COLOR_ATTACHMENT11_NV 0x8CEB
+-#define GL_COLOR_ATTACHMENT12_NV 0x8CEC
+-#define GL_COLOR_ATTACHMENT13_NV 0x8CED
+-#define GL_COLOR_ATTACHMENT14_NV 0x8CEE
+-#define GL_COLOR_ATTACHMENT15_NV 0x8CEF
+-#endif
+-
+-/* GL_NV_draw_instanced */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_NV_fbo_color_attachments */
+-#ifndef GL_NV_fbo_color_attachments
+-#define GL_MAX_COLOR_ATTACHMENTS_NV 0x8CDF
+-/* GL_COLOR_ATTACHMENT{0-15}_NV defined in GL_NV_draw_buffers already. */
+-#endif
+-
+-/* GL_NV_fence */
+-#ifndef GL_NV_fence
+-#define GL_ALL_COMPLETED_NV 0x84F2
+-#define GL_FENCE_STATUS_NV 0x84F3
+-#define GL_FENCE_CONDITION_NV 0x84F4
+-#endif
+-
+-/* GL_NV_framebuffer_blit */
+-#ifndef GL_NV_framebuffer_blit
+-#define GL_READ_FRAMEBUFFER_NV 0x8CA8
+-#define GL_DRAW_FRAMEBUFFER_NV 0x8CA9
+-#define GL_DRAW_FRAMEBUFFER_BINDING_NV 0x8CA6
+-#define GL_READ_FRAMEBUFFER_BINDING_NV 0x8CAA
+-#endif
+-
+-/* GL_NV_framebuffer_multisample */
+-#ifndef GL_NV_framebuffer_multisample
+-#define GL_RENDERBUFFER_SAMPLES_NV 0x8CAB
+-#define GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_NV 0x8D56
+-#define GL_MAX_SAMPLES_NV 0x8D57
+-#endif
+-
+-/* GL_NV_generate_mipmap_sRGB */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_NV_instanced_arrays */
+-#ifndef GL_NV_instanced_arrays
+-#define GL_VERTEX_ATTRIB_ARRAY_DIVISOR_NV 0x88FE
+-#endif
+-
+-/* GL_NV_read_buffer */
+-#ifndef GL_NV_read_buffer
+-#define GL_READ_BUFFER_NV 0x0C02
+-#endif
+-
+-/* GL_NV_read_buffer_front */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_NV_read_depth */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_NV_read_depth_stencil */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_NV_read_stencil */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_NV_shadow_samplers_array */
+-#ifndef GL_NV_shadow_samplers_array
+-#define GL_SAMPLER_2D_ARRAY_SHADOW_NV 0x8DC4
+-#endif
+-
+-/* GL_NV_shadow_samplers_cube */
+-#ifndef GL_NV_shadow_samplers_cube
+-#define GL_SAMPLER_CUBE_SHADOW_NV 0x8DC5
+-#endif
+-
+-/* GL_NV_sRGB_formats */
+-#ifndef GL_NV_sRGB_formats
+-#define GL_SLUMINANCE_NV 0x8C46
+-#define GL_SLUMINANCE_ALPHA_NV 0x8C44
+-#define GL_SRGB8_NV 0x8C41
+-#define GL_SLUMINANCE8_NV 0x8C47
+-#define GL_SLUMINANCE8_ALPHA8_NV 0x8C45
+-#define GL_COMPRESSED_SRGB_S3TC_DXT1_NV 0x8C4C
+-#define GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_NV 0x8C4D
+-#define GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_NV 0x8C4E
+-#define GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_NV 0x8C4F
+-#define GL_ETC1_SRGB8_NV 0x88EE
+-#endif
+-
+-/* GL_NV_texture_border_clamp */
+-#ifndef GL_NV_texture_border_clamp
+-#define GL_TEXTURE_BORDER_COLOR_NV 0x1004
+-#define GL_CLAMP_TO_BORDER_NV 0x812D
+-#endif
+-
+-/* GL_NV_texture_compression_s3tc_update */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_NV_texture_npot_2D_mipmap */
+-/* No new tokens introduced by this extension. */
+-
+-/*------------------------------------------------------------------------*
+- * QCOM extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_QCOM_alpha_test */
+-#ifndef GL_QCOM_alpha_test
+-#define GL_ALPHA_TEST_QCOM 0x0BC0
+-#define GL_ALPHA_TEST_FUNC_QCOM 0x0BC1
+-#define GL_ALPHA_TEST_REF_QCOM 0x0BC2
+-#endif
+-
+-/* GL_QCOM_binning_control */
+-#ifndef GL_QCOM_binning_control
+-#define GL_BINNING_CONTROL_HINT_QCOM 0x8FB0
+-#define GL_CPU_OPTIMIZED_QCOM 0x8FB1
+-#define GL_GPU_OPTIMIZED_QCOM 0x8FB2
+-#define GL_RENDER_DIRECT_TO_FRAMEBUFFER_QCOM 0x8FB3
+-#endif
+-
+-/* GL_QCOM_driver_control */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_QCOM_extended_get */
+-#ifndef GL_QCOM_extended_get
+-#define GL_TEXTURE_WIDTH_QCOM 0x8BD2
+-#define GL_TEXTURE_HEIGHT_QCOM 0x8BD3
+-#define GL_TEXTURE_DEPTH_QCOM 0x8BD4
+-#define GL_TEXTURE_INTERNAL_FORMAT_QCOM 0x8BD5
+-#define GL_TEXTURE_FORMAT_QCOM 0x8BD6
+-#define GL_TEXTURE_TYPE_QCOM 0x8BD7
+-#define GL_TEXTURE_IMAGE_VALID_QCOM 0x8BD8
+-#define GL_TEXTURE_NUM_LEVELS_QCOM 0x8BD9
+-#define GL_TEXTURE_TARGET_QCOM 0x8BDA
+-#define GL_TEXTURE_OBJECT_VALID_QCOM 0x8BDB
+-#define GL_STATE_RESTORE 0x8BDC
+-#endif
+-
+-/* GL_QCOM_extended_get2 */
+-/* No new tokens introduced by this extension. */
+-
+-/* GL_QCOM_perfmon_global_mode */
+-#ifndef GL_QCOM_perfmon_global_mode
+-#define GL_PERFMON_GLOBAL_MODE_QCOM 0x8FA0
+-#endif
+-
+-/* GL_QCOM_writeonly_rendering */
+-#ifndef GL_QCOM_writeonly_rendering
+-#define GL_WRITEONLY_RENDERING_QCOM 0x8823
+-#endif
+-
+-/* GL_QCOM_tiled_rendering */
+-#ifndef GL_QCOM_tiled_rendering
+-#define GL_COLOR_BUFFER_BIT0_QCOM 0x00000001
+-#define GL_COLOR_BUFFER_BIT1_QCOM 0x00000002
+-#define GL_COLOR_BUFFER_BIT2_QCOM 0x00000004
+-#define GL_COLOR_BUFFER_BIT3_QCOM 0x00000008
+-#define GL_COLOR_BUFFER_BIT4_QCOM 0x00000010
+-#define GL_COLOR_BUFFER_BIT5_QCOM 0x00000020
+-#define GL_COLOR_BUFFER_BIT6_QCOM 0x00000040
+-#define GL_COLOR_BUFFER_BIT7_QCOM 0x00000080
+-#define GL_DEPTH_BUFFER_BIT0_QCOM 0x00000100
+-#define GL_DEPTH_BUFFER_BIT1_QCOM 0x00000200
+-#define GL_DEPTH_BUFFER_BIT2_QCOM 0x00000400
+-#define GL_DEPTH_BUFFER_BIT3_QCOM 0x00000800
+-#define GL_DEPTH_BUFFER_BIT4_QCOM 0x00001000
+-#define GL_DEPTH_BUFFER_BIT5_QCOM 0x00002000
+-#define GL_DEPTH_BUFFER_BIT6_QCOM 0x00004000
+-#define GL_DEPTH_BUFFER_BIT7_QCOM 0x00008000
+-#define GL_STENCIL_BUFFER_BIT0_QCOM 0x00010000
+-#define GL_STENCIL_BUFFER_BIT1_QCOM 0x00020000
+-#define GL_STENCIL_BUFFER_BIT2_QCOM 0x00040000
+-#define GL_STENCIL_BUFFER_BIT3_QCOM 0x00080000
+-#define GL_STENCIL_BUFFER_BIT4_QCOM 0x00100000
+-#define GL_STENCIL_BUFFER_BIT5_QCOM 0x00200000
+-#define GL_STENCIL_BUFFER_BIT6_QCOM 0x00400000
+-#define GL_STENCIL_BUFFER_BIT7_QCOM 0x00800000
+-#define GL_MULTISAMPLE_BUFFER_BIT0_QCOM 0x01000000
+-#define GL_MULTISAMPLE_BUFFER_BIT1_QCOM 0x02000000
+-#define GL_MULTISAMPLE_BUFFER_BIT2_QCOM 0x04000000
+-#define GL_MULTISAMPLE_BUFFER_BIT3_QCOM 0x08000000
+-#define GL_MULTISAMPLE_BUFFER_BIT4_QCOM 0x10000000
+-#define GL_MULTISAMPLE_BUFFER_BIT5_QCOM 0x20000000
+-#define GL_MULTISAMPLE_BUFFER_BIT6_QCOM 0x40000000
+-#define GL_MULTISAMPLE_BUFFER_BIT7_QCOM 0x80000000
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * VIV extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_VIV_shader_binary */
+-#ifndef GL_VIV_shader_binary
+-#define GL_SHADER_BINARY_VIV 0x8FC4
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * End of extension tokens, start of corresponding extension functions
+- *------------------------------------------------------------------------*/
+-
+-/*------------------------------------------------------------------------*
+- * OES extension functions
+- *------------------------------------------------------------------------*/
+-
+-/* GL_OES_compressed_ETC1_RGB8_texture */
+-#ifndef GL_OES_compressed_ETC1_RGB8_texture
+-#define GL_OES_compressed_ETC1_RGB8_texture 1
+-#endif
+-
+-/* GL_OES_compressed_paletted_texture */
+-#ifndef GL_OES_compressed_paletted_texture
+-#define GL_OES_compressed_paletted_texture 1
+-#endif
+-
+-/* GL_OES_depth24 */
+-#ifndef GL_OES_depth24
+-#define GL_OES_depth24 1
+-#endif
+-
+-/* GL_OES_depth32 */
+-#ifndef GL_OES_depth32
+-#define GL_OES_depth32 1
+-#endif
+-
+-/* GL_OES_depth_texture */
+-#ifndef GL_OES_depth_texture
+-#define GL_OES_depth_texture 1
+-#endif
+-
+-/* GL_OES_EGL_image */
+-#ifndef GL_OES_EGL_image
+-#define GL_OES_EGL_image 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glEGLImageTargetTexture2DOES (GLenum target, GLeglImageOES image);
+-GL_APICALL void GL_APIENTRY glEGLImageTargetRenderbufferStorageOES (GLenum target, GLeglImageOES image);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLEGLIMAGETARGETTEXTURE2DOESPROC) (GLenum target, GLeglImageOES image);
+-typedef void (GL_APIENTRYP PFNGLEGLIMAGETARGETRENDERBUFFERSTORAGEOESPROC) (GLenum target, GLeglImageOES image);
+-#endif
+-
+-/* GL_OES_EGL_image_external */
+-#ifndef GL_OES_EGL_image_external
+-#define GL_OES_EGL_image_external 1
+-/* glEGLImageTargetTexture2DOES defined in GL_OES_EGL_image already. */
+-#endif
+-
+-/* GL_OES_element_index_uint */
+-#ifndef GL_OES_element_index_uint
+-#define GL_OES_element_index_uint 1
+-#endif
+-
+-/* GL_OES_fbo_render_mipmap */
+-#ifndef GL_OES_fbo_render_mipmap
+-#define GL_OES_fbo_render_mipmap 1
+-#endif
+-
+-/* GL_OES_fragment_precision_high */
+-#ifndef GL_OES_fragment_precision_high
+-#define GL_OES_fragment_precision_high 1
+-#endif
+-
+-/* GL_OES_get_program_binary */
+-#ifndef GL_OES_get_program_binary
+-#define GL_OES_get_program_binary 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glGetProgramBinaryOES (GLuint program, GLsizei bufSize, GLsizei *length, GLenum *binaryFormat, GLvoid *binary);
+-GL_APICALL void GL_APIENTRY glProgramBinaryOES (GLuint program, GLenum binaryFormat, const GLvoid *binary, GLint length);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLGETPROGRAMBINARYOESPROC) (GLuint program, GLsizei bufSize, GLsizei *length, GLenum *binaryFormat, GLvoid *binary);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMBINARYOESPROC) (GLuint program, GLenum binaryFormat, const GLvoid *binary, GLint length);
+-#endif
+-
+-/* GL_OES_mapbuffer */
+-#ifndef GL_OES_mapbuffer
+-#define GL_OES_mapbuffer 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void* GL_APIENTRY glMapBufferOES (GLenum target, GLenum access);
+-GL_APICALL GLboolean GL_APIENTRY glUnmapBufferOES (GLenum target);
+-GL_APICALL void GL_APIENTRY glGetBufferPointervOES (GLenum target, GLenum pname, GLvoid** params);
+-#endif
+-typedef void* (GL_APIENTRYP PFNGLMAPBUFFEROESPROC) (GLenum target, GLenum access);
+-typedef GLboolean (GL_APIENTRYP PFNGLUNMAPBUFFEROESPROC) (GLenum target);
+-typedef void (GL_APIENTRYP PFNGLGETBUFFERPOINTERVOESPROC) (GLenum target, GLenum pname, GLvoid** params);
+-#endif
+-
+-/* GL_OES_packed_depth_stencil */
+-#ifndef GL_OES_packed_depth_stencil
+-#define GL_OES_packed_depth_stencil 1
+-#endif
+-
+-/* GL_OES_required_internalformat */
+-#ifndef GL_OES_required_internalformat
+-#define GL_OES_required_internalformat 1
+-#endif
+-
+-/* GL_OES_rgb8_rgba8 */
+-#ifndef GL_OES_rgb8_rgba8
+-#define GL_OES_rgb8_rgba8 1
+-#endif
+-
+-/* GL_OES_standard_derivatives */
+-#ifndef GL_OES_standard_derivatives
+-#define GL_OES_standard_derivatives 1
+-#endif
+-
+-/* GL_OES_stencil1 */
+-#ifndef GL_OES_stencil1
+-#define GL_OES_stencil1 1
+-#endif
+-
+-/* GL_OES_stencil4 */
+-#ifndef GL_OES_stencil4
+-#define GL_OES_stencil4 1
+-#endif
+-
+-#ifndef GL_OES_surfaceless_context
+-#define GL_OES_surfaceless_context 1
+-#endif
+-
+-/* GL_OES_texture_3D */
+-#ifndef GL_OES_texture_3D
+-#define GL_OES_texture_3D 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glTexImage3DOES (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const GLvoid* pixels);
+-GL_APICALL void GL_APIENTRY glTexSubImage3DOES (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid* pixels);
+-GL_APICALL void GL_APIENTRY glCopyTexSubImage3DOES (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height);
+-GL_APICALL void GL_APIENTRY glCompressedTexImage3DOES (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLsizei imageSize, const GLvoid* data);
+-GL_APICALL void GL_APIENTRY glCompressedTexSubImage3DOES (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid* data);
+-GL_APICALL void GL_APIENTRY glFramebufferTexture3DOES (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level, GLint zoffset);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLTEXIMAGE3DOESPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const GLvoid* pixels);
+-typedef void (GL_APIENTRYP PFNGLTEXSUBIMAGE3DOESPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid* pixels);
+-typedef void (GL_APIENTRYP PFNGLCOPYTEXSUBIMAGE3DOESPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height);
+-typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXIMAGE3DOESPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLsizei imageSize, const GLvoid* data);
+-typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE3DOESPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid* data);
+-typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURE3DOES) (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level, GLint zoffset);
+-#endif
+-
+-/* GL_OES_texture_float */
+-#ifndef GL_OES_texture_float
+-#define GL_OES_texture_float 1
+-#endif
+-
+-/* GL_OES_texture_float_linear */
+-#ifndef GL_OES_texture_float_linear
+-#define GL_OES_texture_float_linear 1
+-#endif
+-
+-/* GL_OES_texture_half_float */
+-#ifndef GL_OES_texture_half_float
+-#define GL_OES_texture_half_float 1
+-#endif
+-
+-/* GL_OES_texture_half_float_linear */
+-#ifndef GL_OES_texture_half_float_linear
+-#define GL_OES_texture_half_float_linear 1
+-#endif
+-
+-/* GL_OES_texture_npot */
+-#ifndef GL_OES_texture_npot
+-#define GL_OES_texture_npot 1
+-#endif
+-
+-/* GL_OES_vertex_array_object */
+-#ifndef GL_OES_vertex_array_object
+-#define GL_OES_vertex_array_object 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glBindVertexArrayOES (GLuint array);
+-GL_APICALL void GL_APIENTRY glDeleteVertexArraysOES (GLsizei n, const GLuint *arrays);
+-GL_APICALL void GL_APIENTRY glGenVertexArraysOES (GLsizei n, GLuint *arrays);
+-GL_APICALL GLboolean GL_APIENTRY glIsVertexArrayOES (GLuint array);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLBINDVERTEXARRAYOESPROC) (GLuint array);
+-typedef void (GL_APIENTRYP PFNGLDELETEVERTEXARRAYSOESPROC) (GLsizei n, const GLuint *arrays);
+-typedef void (GL_APIENTRYP PFNGLGENVERTEXARRAYSOESPROC) (GLsizei n, GLuint *arrays);
+-typedef GLboolean (GL_APIENTRYP PFNGLISVERTEXARRAYOESPROC) (GLuint array);
+-#endif
+-
+-/* GL_OES_vertex_half_float */
+-#ifndef GL_OES_vertex_half_float
+-#define GL_OES_vertex_half_float 1
+-#endif
+-
+-/* GL_OES_vertex_type_10_10_10_2 */
+-#ifndef GL_OES_vertex_type_10_10_10_2
+-#define GL_OES_vertex_type_10_10_10_2 1
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * KHR extension functions
+- *------------------------------------------------------------------------*/
+-
+-#ifndef GL_KHR_debug
+-#define GL_KHR_debug 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glDebugMessageControlKHR (GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled);
+-GL_APICALL void GL_APIENTRY glDebugMessageInsertKHR (GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf);
+-GL_APICALL void GL_APIENTRY glDebugMessageCallbackKHR (GLDEBUGPROCKHR callback, const void *userParam);
+-GL_APICALL GLuint GL_APIENTRY glGetDebugMessageLogKHR (GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog);
+-GL_APICALL void GL_APIENTRY glPushDebugGroupKHR (GLenum source, GLuint id, GLsizei length, const GLchar *message);
+-GL_APICALL void GL_APIENTRY glPopDebugGroupKHR (void);
+-GL_APICALL void GL_APIENTRY glObjectLabelKHR (GLenum identifier, GLuint name, GLsizei length, const GLchar *label);
+-GL_APICALL void GL_APIENTRY glGetObjectLabelKHR (GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label);
+-GL_APICALL void GL_APIENTRY glObjectPtrLabelKHR (const void *ptr, GLsizei length, const GLchar *label);
+-GL_APICALL void GL_APIENTRY glGetObjectPtrLabelKHR (const void *ptr, GLsizei bufSize, GLsizei *length, GLchar *label);
+-GL_APICALL void GL_APIENTRY glGetPointervKHR (GLenum pname, void **params);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLDEBUGMESSAGECONTROLKHRPROC) (GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled);
+-typedef void (GL_APIENTRYP PFNGLDEBUGMESSAGEINSERTKHRPROC) (GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf);
+-typedef void (GL_APIENTRYP PFNGLDEBUGMESSAGECALLBACKKHRPROC) (GLDEBUGPROCKHR callback, const void *userParam);
+-typedef GLuint (GL_APIENTRYP PFNGLGETDEBUGMESSAGELOGKHRPROC) (GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog);
+-typedef void (GL_APIENTRYP PFNGLPUSHDEBUGGROUPKHRPROC) (GLenum source, GLuint id, GLsizei length, const GLchar *message);
+-typedef void (GL_APIENTRYP PFNGLPOPDEBUGGROUPKHRPROC) (void);
+-typedef void (GL_APIENTRYP PFNGLOBJECTLABELKHRPROC) (GLenum identifier, GLuint name, GLsizei length, const GLchar *label);
+-typedef void (GL_APIENTRYP PFNGLGETOBJECTLABELKHRPROC) (GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label);
+-typedef void (GL_APIENTRYP PFNGLOBJECTPTRLABELKHRPROC) (const void *ptr, GLsizei length, const GLchar *label);
+-typedef void (GL_APIENTRYP PFNGLGETOBJECTPTRLABELKHRPROC) (const void *ptr, GLsizei bufSize, GLsizei *length, GLchar *label);
+-typedef void (GL_APIENTRYP PFNGLGETPOINTERVKHRPROC) (GLenum pname, void **params);
+-#endif
+-
+-#ifndef GL_KHR_texture_compression_astc_ldr
+-#define GL_KHR_texture_compression_astc_ldr 1
+-#endif
+-
+-
+-/*------------------------------------------------------------------------*
+- * AMD extension functions
+- *------------------------------------------------------------------------*/
+-
+-/* GL_AMD_compressed_3DC_texture */
+-#ifndef GL_AMD_compressed_3DC_texture
+-#define GL_AMD_compressed_3DC_texture 1
+-#endif
+-
+-/* GL_AMD_compressed_ATC_texture */
+-#ifndef GL_AMD_compressed_ATC_texture
+-#define GL_AMD_compressed_ATC_texture 1
+-#endif
+-
+-/* AMD_performance_monitor */
+-#ifndef GL_AMD_performance_monitor
+-#define GL_AMD_performance_monitor 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glGetPerfMonitorGroupsAMD (GLint *numGroups, GLsizei groupsSize, GLuint *groups);
+-GL_APICALL void GL_APIENTRY glGetPerfMonitorCountersAMD (GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei counterSize, GLuint *counters);
+-GL_APICALL void GL_APIENTRY glGetPerfMonitorGroupStringAMD (GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString);
+-GL_APICALL void GL_APIENTRY glGetPerfMonitorCounterStringAMD (GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString);
+-GL_APICALL void GL_APIENTRY glGetPerfMonitorCounterInfoAMD (GLuint group, GLuint counter, GLenum pname, GLvoid *data);
+-GL_APICALL void GL_APIENTRY glGenPerfMonitorsAMD (GLsizei n, GLuint *monitors);
+-GL_APICALL void GL_APIENTRY glDeletePerfMonitorsAMD (GLsizei n, GLuint *monitors);
+-GL_APICALL void GL_APIENTRY glSelectPerfMonitorCountersAMD (GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *countersList);
+-GL_APICALL void GL_APIENTRY glBeginPerfMonitorAMD (GLuint monitor);
+-GL_APICALL void GL_APIENTRY glEndPerfMonitorAMD (GLuint monitor);
+-GL_APICALL void GL_APIENTRY glGetPerfMonitorCounterDataAMD (GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLGETPERFMONITORGROUPSAMDPROC) (GLint *numGroups, GLsizei groupsSize, GLuint *groups);
+-typedef void (GL_APIENTRYP PFNGLGETPERFMONITORCOUNTERSAMDPROC) (GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei counterSize, GLuint *counters);
+-typedef void (GL_APIENTRYP PFNGLGETPERFMONITORGROUPSTRINGAMDPROC) (GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString);
+-typedef void (GL_APIENTRYP PFNGLGETPERFMONITORCOUNTERSTRINGAMDPROC) (GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString);
+-typedef void (GL_APIENTRYP PFNGLGETPERFMONITORCOUNTERINFOAMDPROC) (GLuint group, GLuint counter, GLenum pname, GLvoid *data);
+-typedef void (GL_APIENTRYP PFNGLGENPERFMONITORSAMDPROC) (GLsizei n, GLuint *monitors);
+-typedef void (GL_APIENTRYP PFNGLDELETEPERFMONITORSAMDPROC) (GLsizei n, GLuint *monitors);
+-typedef void (GL_APIENTRYP PFNGLSELECTPERFMONITORCOUNTERSAMDPROC) (GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *countersList);
+-typedef void (GL_APIENTRYP PFNGLBEGINPERFMONITORAMDPROC) (GLuint monitor);
+-typedef void (GL_APIENTRYP PFNGLENDPERFMONITORAMDPROC) (GLuint monitor);
+-typedef void (GL_APIENTRYP PFNGLGETPERFMONITORCOUNTERDATAAMDPROC) (GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten);
+-#endif
+-
+-/* GL_AMD_program_binary_Z400 */
+-#ifndef GL_AMD_program_binary_Z400
+-#define GL_AMD_program_binary_Z400 1
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * ANGLE extension functions
+- *------------------------------------------------------------------------*/
+-
+-/* GL_ANGLE_depth_texture */
+-#ifndef GL_ANGLE_depth_texture
+-#define GL_ANGLE_depth_texture 1
+-#endif
+-
+-/* GL_ANGLE_framebuffer_blit */
+-#ifndef GL_ANGLE_framebuffer_blit
+-#define GL_ANGLE_framebuffer_blit 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glBlitFramebufferANGLE (GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLBLITFRAMEBUFFERANGLEPROC) (GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter);
+-#endif
+-
+-/* GL_ANGLE_framebuffer_multisample */
+-#ifndef GL_ANGLE_framebuffer_multisample
+-#define GL_ANGLE_framebuffer_multisample 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glRenderbufferStorageMultisampleANGLE (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLRENDERBUFFERSTORAGEMULTISAMPLEANGLEPROC) (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height);
+-#endif
+-
+-#ifndef GL_ANGLE_instanced_arrays
+-#define GL_ANGLE_instanced_arrays 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glDrawArraysInstancedANGLE (GLenum mode, GLint first, GLsizei count, GLsizei primcount);
+-GL_APICALL void GL_APIENTRY glDrawElementsInstancedANGLE (GLenum mode, GLsizei count, GLenum type, const void *indices, GLsizei primcount);
+-GL_APICALL void GL_APIENTRY glVertexAttribDivisorANGLE (GLuint index, GLuint divisor);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLDRAWARRAYSINSTANCEDANGLEPROC) (GLenum mode, GLint first, GLsizei count, GLsizei primcount);
+-typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSINSTANCEDANGLEPROC) (GLenum mode, GLsizei count, GLenum type, const void *indices, GLsizei primcount);
+-typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBDIVISORANGLEPROC) (GLuint index, GLuint divisor);
+-#endif
+-
+-/* GL_ANGLE_pack_reverse_row_order */
+-#ifndef GL_ANGLE_pack_reverse_row_order
+-#define GL_ANGLE_pack_reverse_row_order 1
+-#endif
+-
+-/* GL_ANGLE_program_binary */
+-#ifndef GL_ANGLE_program_binary
+-#define GL_ANGLE_program_binary 1
+-#endif
+-
+-/* GL_ANGLE_texture_compression_dxt3 */
+-#ifndef GL_ANGLE_texture_compression_dxt3
+-#define GL_ANGLE_texture_compression_dxt3 1
+-#endif
+-
+-/* GL_ANGLE_texture_compression_dxt5 */
+-#ifndef GL_ANGLE_texture_compression_dxt5
+-#define GL_ANGLE_texture_compression_dxt5 1
+-#endif
+-
+-/* GL_ANGLE_texture_usage */
+-#ifndef GL_ANGLE_texture_usage
+-#define GL_ANGLE_texture_usage 1
+-#endif
+-
+-#ifndef GL_ANGLE_translated_shader_source
+-#define GL_ANGLE_translated_shader_source 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glGetTranslatedShaderSourceANGLE (GLuint shader, GLsizei bufsize, GLsizei *length, GLchar *source);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLGETTRANSLATEDSHADERSOURCEANGLEPROC) (GLuint shader, GLsizei bufsize, GLsizei *length, GLchar *source);
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * APPLE extension functions
+- *------------------------------------------------------------------------*/
+-
+-/* GL_APPLE_copy_texture_levels */
+-#ifndef GL_APPLE_copy_texture_levels
+-#define GL_APPLE_copy_texture_levels 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glCopyTextureLevelsAPPLE (GLuint destinationTexture, GLuint sourceTexture, GLint sourceBaseLevel, GLsizei sourceLevelCount);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLCOPYTEXTURELEVELSAPPLEPROC) (GLuint destinationTexture, GLuint sourceTexture, GLint sourceBaseLevel, GLsizei sourceLevelCount);
+-#endif
+-
+-/* GL_APPLE_framebuffer_multisample */
+-#ifndef GL_APPLE_framebuffer_multisample
+-#define GL_APPLE_framebuffer_multisample 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glRenderbufferStorageMultisampleAPPLE (GLenum, GLsizei, GLenum, GLsizei, GLsizei);
+-GL_APICALL void GL_APIENTRY glResolveMultisampleFramebufferAPPLE (void);
+-#endif /* GL_GLEXT_PROTOTYPES */
+-typedef void (GL_APIENTRYP PFNGLRENDERBUFFERSTORAGEMULTISAMPLEAPPLEPROC) (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height);
+-typedef void (GL_APIENTRYP PFNGLRESOLVEMULTISAMPLEFRAMEBUFFERAPPLEPROC) (void);
+-#endif
+-
+-/* GL_APPLE_rgb_422 */
+-#ifndef GL_APPLE_rgb_422
+-#define GL_APPLE_rgb_422 1
+-#endif
+-
+-/* GL_APPLE_sync */
+-#ifndef GL_APPLE_sync
+-#define GL_APPLE_sync 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL GLsync GL_APIENTRY glFenceSyncAPPLE (GLenum condition, GLbitfield flags);
+-GL_APICALL GLboolean GL_APIENTRY glIsSyncAPPLE (GLsync sync);
+-GL_APICALL void GL_APIENTRY glDeleteSyncAPPLE (GLsync sync);
+-GL_APICALL GLenum GL_APIENTRY glClientWaitSyncAPPLE (GLsync sync, GLbitfield flags, GLuint64 timeout);
+-GL_APICALL void GL_APIENTRY glWaitSyncAPPLE (GLsync sync, GLbitfield flags, GLuint64 timeout);
+-GL_APICALL void GL_APIENTRY glGetInteger64vAPPLE (GLenum pname, GLint64 *params);
+-GL_APICALL void GL_APIENTRY glGetSyncivAPPLE (GLsync sync, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values);
+-#endif
+-typedef GLsync (GL_APIENTRYP PFNGLFENCESYNCAPPLEPROC) (GLenum condition, GLbitfield flags);
+-typedef GLboolean (GL_APIENTRYP PFNGLISSYNCAPPLEPROC) (GLsync sync);
+-typedef void (GL_APIENTRYP PFNGLDELETESYNCAPPLEPROC) (GLsync sync);
+-typedef GLenum (GL_APIENTRYP PFNGLCLIENTWAITSYNCAPPLEPROC) (GLsync sync, GLbitfield flags, GLuint64 timeout);
+-typedef void (GL_APIENTRYP PFNGLWAITSYNCAPPLEPROC) (GLsync sync, GLbitfield flags, GLuint64 timeout);
+-typedef void (GL_APIENTRYP PFNGLGETINTEGER64VAPPLEPROC) (GLenum pname, GLint64 *params);
+-typedef void (GL_APIENTRYP PFNGLGETSYNCIVAPPLEPROC) (GLsync sync, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values);
+-#endif
+-
+-/* GL_APPLE_texture_format_BGRA8888 */
+-#ifndef GL_APPLE_texture_format_BGRA8888
+-#define GL_APPLE_texture_format_BGRA8888 1
+-#endif
+-
+-/* GL_APPLE_texture_max_level */
+-#ifndef GL_APPLE_texture_max_level
+-#define GL_APPLE_texture_max_level 1
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * ARM extension functions
+- *------------------------------------------------------------------------*/
+-
+-/* GL_ARM_mali_program_binary */
+-#ifndef GL_ARM_mali_program_binary
+-#define GL_ARM_mali_program_binary 1
+-#endif
+-
+-/* GL_ARM_mali_shader_binary */
+-#ifndef GL_ARM_mali_shader_binary
+-#define GL_ARM_mali_shader_binary 1
+-#endif
+-
+-/* GL_ARM_rgba8 */
+-#ifndef GL_ARM_rgba8
+-#define GL_ARM_rgba8 1
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * EXT extension functions
+- *------------------------------------------------------------------------*/
+-
+-/* GL_EXT_blend_minmax */
+-#ifndef GL_EXT_blend_minmax
+-#define GL_EXT_blend_minmax 1
+-#endif
+-
+-/* GL_EXT_color_buffer_half_float */
+-#ifndef GL_EXT_color_buffer_half_float
+-#define GL_EXT_color_buffer_half_float 1
+-#endif
+-
+-/* GL_EXT_debug_label */
+-#ifndef GL_EXT_debug_label
+-#define GL_EXT_debug_label 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glLabelObjectEXT (GLenum type, GLuint object, GLsizei length, const GLchar *label);
+-GL_APICALL void GL_APIENTRY glGetObjectLabelEXT (GLenum type, GLuint object, GLsizei bufSize, GLsizei *length, GLchar *label);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLLABELOBJECTEXTPROC) (GLenum type, GLuint object, GLsizei length, const GLchar *label);
+-typedef void (GL_APIENTRYP PFNGLGETOBJECTLABELEXTPROC) (GLenum type, GLuint object, GLsizei bufSize, GLsizei *length, GLchar *label);
+-#endif
+-
+-/* GL_EXT_debug_marker */
+-#ifndef GL_EXT_debug_marker
+-#define GL_EXT_debug_marker 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glInsertEventMarkerEXT (GLsizei length, const GLchar *marker);
+-GL_APICALL void GL_APIENTRY glPushGroupMarkerEXT (GLsizei length, const GLchar *marker);
+-GL_APICALL void GL_APIENTRY glPopGroupMarkerEXT (void);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLINSERTEVENTMARKEREXTPROC) (GLsizei length, const GLchar *marker);
+-typedef void (GL_APIENTRYP PFNGLPUSHGROUPMARKEREXTPROC) (GLsizei length, const GLchar *marker);
+-typedef void (GL_APIENTRYP PFNGLPOPGROUPMARKEREXTPROC) (void);
+-#endif
+-
+-/* GL_EXT_discard_framebuffer */
+-#ifndef GL_EXT_discard_framebuffer
+-#define GL_EXT_discard_framebuffer 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glDiscardFramebufferEXT (GLenum target, GLsizei numAttachments, const GLenum *attachments);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLDISCARDFRAMEBUFFEREXTPROC) (GLenum target, GLsizei numAttachments, const GLenum *attachments);
+-#endif
+-
+-#ifndef GL_EXT_disjoint_timer_query
+-#define GL_EXT_disjoint_timer_query 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glGenQueriesEXT (GLsizei n, GLuint *ids);
+-GL_APICALL void GL_APIENTRY glDeleteQueriesEXT (GLsizei n, const GLuint *ids);
+-GL_APICALL GLboolean GL_APIENTRY glIsQueryEXT (GLuint id);
+-GL_APICALL void GL_APIENTRY glBeginQueryEXT (GLenum target, GLuint id);
+-GL_APICALL void GL_APIENTRY glEndQueryEXT (GLenum target);
+-GL_APICALL void GL_APIENTRY glQueryCounterEXT (GLuint id, GLenum target);
+-GL_APICALL void GL_APIENTRY glGetQueryivEXT (GLenum target, GLenum pname, GLint *params);
+-GL_APICALL void GL_APIENTRY glGetQueryObjectivEXT (GLuint id, GLenum pname, GLint *params);
+-GL_APICALL void GL_APIENTRY glGetQueryObjectuivEXT (GLuint id, GLenum pname, GLuint *params);
+-GL_APICALL void GL_APIENTRY glGetQueryObjecti64vEXT (GLuint id, GLenum pname, GLint64 *params);
+-GL_APICALL void GL_APIENTRY glGetQueryObjectui64vEXT (GLuint id, GLenum pname, GLuint64 *params);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLGENQUERIESEXTPROC) (GLsizei n, GLuint *ids);
+-typedef void (GL_APIENTRYP PFNGLDELETEQUERIESEXTPROC) (GLsizei n, const GLuint *ids);
+-typedef GLboolean (GL_APIENTRYP PFNGLISQUERYEXTPROC) (GLuint id);
+-typedef void (GL_APIENTRYP PFNGLBEGINQUERYEXTPROC) (GLenum target, GLuint id);
+-typedef void (GL_APIENTRYP PFNGLENDQUERYEXTPROC) (GLenum target);
+-typedef void (GL_APIENTRYP PFNGLQUERYCOUNTEREXTPROC) (GLuint id, GLenum target);
+-typedef void (GL_APIENTRYP PFNGLGETQUERYIVEXTPROC) (GLenum target, GLenum pname, GLint *params);
+-typedef void (GL_APIENTRYP PFNGLGETQUERYOBJECTIVEXTPROC) (GLuint id, GLenum pname, GLint *params);
+-typedef void (GL_APIENTRYP PFNGLGETQUERYOBJECTUIVEXTPROC) (GLuint id, GLenum pname, GLuint *params);
+-typedef void (GL_APIENTRYP PFNGLGETQUERYOBJECTI64VEXTPROC) (GLuint id, GLenum pname, GLint64 *params);
+-typedef void (GL_APIENTRYP PFNGLGETQUERYOBJECTUI64VEXTPROC) (GLuint id, GLenum pname, GLuint64 *params);
+-#endif /* GL_EXT_disjoint_timer_query */
+-
+-#ifndef GL_EXT_draw_buffers
+-#define GL_EXT_draw_buffers 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glDrawBuffersEXT (GLsizei n, const GLenum *bufs);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLDRAWBUFFERSEXTPROC) (GLsizei n, const GLenum *bufs);
+-#endif /* GL_EXT_draw_buffers */
+-
+-/* GL_EXT_map_buffer_range */
+-#ifndef GL_EXT_map_buffer_range
+-#define GL_EXT_map_buffer_range 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void* GL_APIENTRY glMapBufferRangeEXT (GLenum target, GLintptr offset, GLsizeiptr length, GLbitfield access);
+-GL_APICALL void GL_APIENTRY glFlushMappedBufferRangeEXT (GLenum target, GLintptr offset, GLsizeiptr length);
+-#endif
+-typedef void* (GL_APIENTRYP PFNGLMAPBUFFERRANGEEXTPROC) (GLenum target, GLintptr offset, GLsizeiptr length, GLbitfield access);
+-typedef void (GL_APIENTRYP PFNGLFLUSHMAPPEDBUFFERRANGEEXTPROC) (GLenum target, GLintptr offset, GLsizeiptr length);
+-#endif
+-
+-/* GL_EXT_multisampled_render_to_texture */
+-#ifndef GL_EXT_multisampled_render_to_texture
+-#define GL_EXT_multisampled_render_to_texture 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glRenderbufferStorageMultisampleEXT (GLenum, GLsizei, GLenum, GLsizei, GLsizei);
+-GL_APICALL void GL_APIENTRY glFramebufferTexture2DMultisampleEXT (GLenum, GLenum, GLenum, GLuint, GLint, GLsizei);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLRENDERBUFFERSTORAGEMULTISAMPLEEXTPROC) (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height);
+-typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURE2DMULTISAMPLEEXTPROC) (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level, GLsizei samples);
+-#endif
+-
+-/* GL_EXT_multiview_draw_buffers */
+-#ifndef GL_EXT_multiview_draw_buffers
+-#define GL_EXT_multiview_draw_buffers 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glReadBufferIndexedEXT (GLenum src, GLint index);
+-GL_APICALL void GL_APIENTRY glDrawBuffersIndexedEXT (GLint n, const GLenum *location, const GLint *indices);
+-GL_APICALL void GL_APIENTRY glGetIntegeri_vEXT (GLenum target, GLuint index, GLint *data);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLREADBUFFERINDEXEDEXTPROC) (GLenum src, GLint index);
+-typedef void (GL_APIENTRYP PFNGLDRAWBUFFERSINDEXEDEXTPROC) (GLint n, const GLenum *location, const GLint *indices);
+-typedef void (GL_APIENTRYP PFNGLGETINTEGERI_VEXTPROC) (GLenum target, GLuint index, GLint *data);
+-#endif
+-
+-#ifndef GL_EXT_multi_draw_arrays
+-#define GL_EXT_multi_draw_arrays 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glMultiDrawArraysEXT (GLenum, const GLint *, const GLsizei *, GLsizei);
+-GL_APICALL void GL_APIENTRY glMultiDrawElementsEXT (GLenum, const GLsizei *, GLenum, const GLvoid* *, GLsizei);
+-#endif /* GL_GLEXT_PROTOTYPES */
+-typedef void (GL_APIENTRYP PFNGLMULTIDRAWARRAYSEXTPROC) (GLenum mode, const GLint *first, const GLsizei *count, GLsizei primcount);
+-typedef void (GL_APIENTRYP PFNGLMULTIDRAWELEMENTSEXTPROC) (GLenum mode, const GLsizei *count, GLenum type, const GLvoid* *indices, GLsizei primcount);
+-#endif
+-
+-/* GL_EXT_occlusion_query_boolean */
+-#ifndef GL_EXT_occlusion_query_boolean
+-#define GL_EXT_occlusion_query_boolean 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glGenQueriesEXT (GLsizei n, GLuint *ids);
+-GL_APICALL void GL_APIENTRY glDeleteQueriesEXT (GLsizei n, const GLuint *ids);
+-GL_APICALL GLboolean GL_APIENTRY glIsQueryEXT (GLuint id);
+-GL_APICALL void GL_APIENTRY glBeginQueryEXT (GLenum target, GLuint id);
+-GL_APICALL void GL_APIENTRY glEndQueryEXT (GLenum target);
+-GL_APICALL void GL_APIENTRY glGetQueryivEXT (GLenum target, GLenum pname, GLint *params);
+-GL_APICALL void GL_APIENTRY glGetQueryObjectuivEXT (GLuint id, GLenum pname, GLuint *params);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLGENQUERIESEXTPROC) (GLsizei n, GLuint *ids);
+-typedef void (GL_APIENTRYP PFNGLDELETEQUERIESEXTPROC) (GLsizei n, const GLuint *ids);
+-typedef GLboolean (GL_APIENTRYP PFNGLISQUERYEXTPROC) (GLuint id);
+-typedef void (GL_APIENTRYP PFNGLBEGINQUERYEXTPROC) (GLenum target, GLuint id);
+-typedef void (GL_APIENTRYP PFNGLENDQUERYEXTPROC) (GLenum target);
+-typedef void (GL_APIENTRYP PFNGLGETQUERYIVEXTPROC) (GLenum target, GLenum pname, GLint *params);
+-typedef void (GL_APIENTRYP PFNGLGETQUERYOBJECTUIVEXTPROC) (GLuint id, GLenum pname, GLuint *params);
+-#endif
+-
+-/* GL_EXT_read_format_bgra */
+-#ifndef GL_EXT_read_format_bgra
+-#define GL_EXT_read_format_bgra 1
+-#endif
+-
+-/* GL_EXT_robustness */
+-#ifndef GL_EXT_robustness
+-#define GL_EXT_robustness 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL GLenum GL_APIENTRY glGetGraphicsResetStatusEXT (void);
+-GL_APICALL void GL_APIENTRY glReadnPixelsEXT (GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, void *data);
+-GL_APICALL void GL_APIENTRY glGetnUniformfvEXT (GLuint program, GLint location, GLsizei bufSize, float *params);
+-GL_APICALL void GL_APIENTRY glGetnUniformivEXT (GLuint program, GLint location, GLsizei bufSize, GLint *params);
+-#endif
+-typedef GLenum (GL_APIENTRYP PFNGLGETGRAPHICSRESETSTATUSEXTPROC) (void);
+-typedef void (GL_APIENTRYP PFNGLREADNPIXELSEXTPROC) (GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, void *data);
+-typedef void (GL_APIENTRYP PFNGLGETNUNIFORMFVEXTPROC) (GLuint program, GLint location, GLsizei bufSize, float *params);
+-typedef void (GL_APIENTRYP PFNGLGETNUNIFORMIVEXTPROC) (GLuint program, GLint location, GLsizei bufSize, GLint *params);
+-#endif
+-
+-/* GL_EXT_separate_shader_objects */
+-#ifndef GL_EXT_separate_shader_objects
+-#define GL_EXT_separate_shader_objects 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glUseProgramStagesEXT (GLuint pipeline, GLbitfield stages, GLuint program);
+-GL_APICALL void GL_APIENTRY glActiveShaderProgramEXT (GLuint pipeline, GLuint program);
+-GL_APICALL GLuint GL_APIENTRY glCreateShaderProgramvEXT (GLenum type, GLsizei count, const GLchar **strings);
+-GL_APICALL void GL_APIENTRY glBindProgramPipelineEXT (GLuint pipeline);
+-GL_APICALL void GL_APIENTRY glDeleteProgramPipelinesEXT (GLsizei n, const GLuint *pipelines);
+-GL_APICALL void GL_APIENTRY glGenProgramPipelinesEXT (GLsizei n, GLuint *pipelines);
+-GL_APICALL GLboolean GL_APIENTRY glIsProgramPipelineEXT (GLuint pipeline);
+-GL_APICALL void GL_APIENTRY glProgramParameteriEXT (GLuint program, GLenum pname, GLint value);
+-GL_APICALL void GL_APIENTRY glGetProgramPipelineivEXT (GLuint pipeline, GLenum pname, GLint *params);
+-GL_APICALL void GL_APIENTRY glProgramUniform1iEXT (GLuint program, GLint location, GLint x);
+-GL_APICALL void GL_APIENTRY glProgramUniform2iEXT (GLuint program, GLint location, GLint x, GLint y);
+-GL_APICALL void GL_APIENTRY glProgramUniform3iEXT (GLuint program, GLint location, GLint x, GLint y, GLint z);
+-GL_APICALL void GL_APIENTRY glProgramUniform4iEXT (GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w);
+-GL_APICALL void GL_APIENTRY glProgramUniform1fEXT (GLuint program, GLint location, GLfloat x);
+-GL_APICALL void GL_APIENTRY glProgramUniform2fEXT (GLuint program, GLint location, GLfloat x, GLfloat y);
+-GL_APICALL void GL_APIENTRY glProgramUniform3fEXT (GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z);
+-GL_APICALL void GL_APIENTRY glProgramUniform4fEXT (GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+-GL_APICALL void GL_APIENTRY glProgramUniform1ivEXT (GLuint program, GLint location, GLsizei count, const GLint *value);
+-GL_APICALL void GL_APIENTRY glProgramUniform2ivEXT (GLuint program, GLint location, GLsizei count, const GLint *value);
+-GL_APICALL void GL_APIENTRY glProgramUniform3ivEXT (GLuint program, GLint location, GLsizei count, const GLint *value);
+-GL_APICALL void GL_APIENTRY glProgramUniform4ivEXT (GLuint program, GLint location, GLsizei count, const GLint *value);
+-GL_APICALL void GL_APIENTRY glProgramUniform1fvEXT (GLuint program, GLint location, GLsizei count, const GLfloat *value);
+-GL_APICALL void GL_APIENTRY glProgramUniform2fvEXT (GLuint program, GLint location, GLsizei count, const GLfloat *value);
+-GL_APICALL void GL_APIENTRY glProgramUniform3fvEXT (GLuint program, GLint location, GLsizei count, const GLfloat *value);
+-GL_APICALL void GL_APIENTRY glProgramUniform4fvEXT (GLuint program, GLint location, GLsizei count, const GLfloat *value);
+-GL_APICALL void GL_APIENTRY glProgramUniformMatrix2fvEXT (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+-GL_APICALL void GL_APIENTRY glProgramUniformMatrix3fvEXT (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+-GL_APICALL void GL_APIENTRY glProgramUniformMatrix4fvEXT (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+-GL_APICALL void GL_APIENTRY glValidateProgramPipelineEXT (GLuint pipeline);
+-GL_APICALL void GL_APIENTRY glGetProgramPipelineInfoLogEXT (GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLUSEPROGRAMSTAGESEXTPROC) (GLuint pipeline, GLbitfield stages, GLuint program);
+-typedef void (GL_APIENTRYP PFNGLACTIVESHADERPROGRAMEXTPROC) (GLuint pipeline, GLuint program);
+-typedef GLuint (GL_APIENTRYP PFNGLCREATESHADERPROGRAMVEXTPROC) (GLenum type, GLsizei count, const GLchar **strings);
+-typedef void (GL_APIENTRYP PFNGLBINDPROGRAMPIPELINEEXTPROC) (GLuint pipeline);
+-typedef void (GL_APIENTRYP PFNGLDELETEPROGRAMPIPELINESEXTPROC) (GLsizei n, const GLuint *pipelines);
+-typedef void (GL_APIENTRYP PFNGLGENPROGRAMPIPELINESEXTPROC) (GLsizei n, GLuint *pipelines);
+-typedef GLboolean (GL_APIENTRYP PFNGLISPROGRAMPIPELINEEXTPROC) (GLuint pipeline);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMPARAMETERIEXTPROC) (GLuint program, GLenum pname, GLint value);
+-typedef void (GL_APIENTRYP PFNGLGETPROGRAMPIPELINEIVEXTPROC) (GLuint pipeline, GLenum pname, GLint *params);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1IEXTPROC) (GLuint program, GLint location, GLint x);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2IEXTPROC) (GLuint program, GLint location, GLint x, GLint y);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3IEXTPROC) (GLuint program, GLint location, GLint x, GLint y, GLint z);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4IEXTPROC) (GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1FEXTPROC) (GLuint program, GLint location, GLfloat x);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2FEXTPROC) (GLuint program, GLint location, GLfloat x, GLfloat y);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3FEXTPROC) (GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4FEXTPROC) (GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1IVEXTPROC) (GLuint program, GLint location, GLsizei count, const GLint *value);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2IVEXTPROC) (GLuint program, GLint location, GLsizei count, const GLint *value);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3IVEXTPROC) (GLuint program, GLint location, GLsizei count, const GLint *value);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4IVEXTPROC) (GLuint program, GLint location, GLsizei count, const GLint *value);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1FVEXTPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2FVEXTPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3FVEXTPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4FVEXTPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX2FVEXTPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX3FVEXTPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+-typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX4FVEXTPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value);
+-typedef void (GL_APIENTRYP PFNGLVALIDATEPROGRAMPIPELINEEXTPROC) (GLuint pipeline);
+-typedef void (GL_APIENTRYP PFNGLGETPROGRAMPIPELINEINFOLOGEXTPROC) (GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog);
+-#endif
+-
+-/* GL_EXT_shader_framebuffer_fetch */
+-#ifndef GL_EXT_shader_framebuffer_fetch
+-#define GL_EXT_shader_framebuffer_fetch 1
+-#endif
+-
+-/* GL_EXT_shader_texture_lod */
+-#ifndef GL_EXT_shader_texture_lod
+-#define GL_EXT_shader_texture_lod 1
+-#endif
+-
+-/* GL_EXT_shadow_samplers */
+-#ifndef GL_EXT_shadow_samplers
+-#define GL_EXT_shadow_samplers 1
+-#endif
+-
+-/* GL_EXT_sRGB */
+-#ifndef GL_EXT_sRGB
+-#define GL_EXT_sRGB 1
+-#endif
+-
+-/* GL_EXT_texture_compression_dxt1 */
+-#ifndef GL_EXT_texture_compression_dxt1
+-#define GL_EXT_texture_compression_dxt1 1
+-#endif
+-
+-/* GL_EXT_texture_filter_anisotropic */
+-#ifndef GL_EXT_texture_filter_anisotropic
+-#define GL_EXT_texture_filter_anisotropic 1
+-#endif
+-
+-/* GL_EXT_texture_format_BGRA8888 */
+-#ifndef GL_EXT_texture_format_BGRA8888
+-#define GL_EXT_texture_format_BGRA8888 1
+-#endif
+-
+-/* GL_EXT_texture_rg */
+-#ifndef GL_EXT_texture_rg
+-#define GL_EXT_texture_rg 1
+-#endif
+-
+-/* GL_EXT_texture_storage */
+-#ifndef GL_EXT_texture_storage
+-#define GL_EXT_texture_storage 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glTexStorage1DEXT (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width);
+-GL_APICALL void GL_APIENTRY glTexStorage2DEXT (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height);
+-GL_APICALL void GL_APIENTRY glTexStorage3DEXT (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth);
+-GL_APICALL void GL_APIENTRY glTextureStorage1DEXT (GLuint texture, GLenum target, GLsizei levels, GLenum internalformat, GLsizei width);
+-GL_APICALL void GL_APIENTRY glTextureStorage2DEXT (GLuint texture, GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height);
+-GL_APICALL void GL_APIENTRY glTextureStorage3DEXT (GLuint texture, GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLTEXSTORAGE1DEXTPROC) (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width);
+-typedef void (GL_APIENTRYP PFNGLTEXSTORAGE2DEXTPROC) (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height);
+-typedef void (GL_APIENTRYP PFNGLTEXSTORAGE3DEXTPROC) (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth);
+-typedef void (GL_APIENTRYP PFNGLTEXTURESTORAGE1DEXTPROC) (GLuint texture, GLenum target, GLsizei levels, GLenum internalformat, GLsizei width);
+-typedef void (GL_APIENTRYP PFNGLTEXTURESTORAGE2DEXTPROC) (GLuint texture, GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height);
+-typedef void (GL_APIENTRYP PFNGLTEXTURESTORAGE3DEXTPROC) (GLuint texture, GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth);
+-#endif
+-
+-/* GL_EXT_texture_type_2_10_10_10_REV */
+-#ifndef GL_EXT_texture_type_2_10_10_10_REV
+-#define GL_EXT_texture_type_2_10_10_10_REV 1
+-#endif
+-
+-/* GL_EXT_unpack_subimage */
+-#ifndef GL_EXT_unpack_subimage
+-#define GL_EXT_unpack_subimage 1
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * DMP extension functions
+- *------------------------------------------------------------------------*/
+-
+-/* GL_DMP_shader_binary */
+-#ifndef GL_DMP_shader_binary
+-#define GL_DMP_shader_binary 1
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * FJ extension functions
+- *------------------------------------------------------------------------*/
+-
+-/* GL_FJ_shader_binary_GCCSO */
+-#ifndef GL_FJ_shader_binary_GCCSO
+-#define GL_FJ_shader_binary_GCCSO 1
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * IMG extension functions
+- *------------------------------------------------------------------------*/
+-
+-/* GL_IMG_program_binary */
+-#ifndef GL_IMG_program_binary
+-#define GL_IMG_program_binary 1
+-#endif
+-
+-/* GL_IMG_read_format */
+-#ifndef GL_IMG_read_format
+-#define GL_IMG_read_format 1
+-#endif
+-
+-/* GL_IMG_shader_binary */
+-#ifndef GL_IMG_shader_binary
+-#define GL_IMG_shader_binary 1
+-#endif
+-
+-/* GL_IMG_texture_compression_pvrtc */
+-#ifndef GL_IMG_texture_compression_pvrtc
+-#define GL_IMG_texture_compression_pvrtc 1
+-#endif
+-
+-/* GL_IMG_texture_compression_pvrtc2 */
+-#ifndef GL_IMG_texture_compression_pvrtc2
+-#define GL_IMG_texture_compression_pvrtc2 1
+-#endif
+-
+-/* GL_IMG_multisampled_render_to_texture */
+-#ifndef GL_IMG_multisampled_render_to_texture
+-#define GL_IMG_multisampled_render_to_texture 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glRenderbufferStorageMultisampleIMG (GLenum, GLsizei, GLenum, GLsizei, GLsizei);
+-GL_APICALL void GL_APIENTRY glFramebufferTexture2DMultisampleIMG (GLenum, GLenum, GLenum, GLuint, GLint, GLsizei);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLRENDERBUFFERSTORAGEMULTISAMPLEIMGPROC) (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height);
+-typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURE2DMULTISAMPLEIMGPROC) (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level, GLsizei samples);
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * NV extension functions
+- *------------------------------------------------------------------------*/
+-
+-/* GL_NV_coverage_sample */
+-#ifndef GL_NV_coverage_sample
+-#define GL_NV_coverage_sample 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glCoverageMaskNV (GLboolean mask);
+-GL_APICALL void GL_APIENTRY glCoverageOperationNV (GLenum operation);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLCOVERAGEMASKNVPROC) (GLboolean mask);
+-typedef void (GL_APIENTRYP PFNGLCOVERAGEOPERATIONNVPROC) (GLenum operation);
+-#endif
+-
+-/* GL_NV_depth_nonlinear */
+-#ifndef GL_NV_depth_nonlinear
+-#define GL_NV_depth_nonlinear 1
+-#endif
+-
+-/* GL_NV_draw_buffers */
+-#ifndef GL_NV_draw_buffers
+-#define GL_NV_draw_buffers 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glDrawBuffersNV (GLsizei n, const GLenum *bufs);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLDRAWBUFFERSNVPROC) (GLsizei n, const GLenum *bufs);
+-#endif
+-
+-/* GL_NV_draw_instanced */
+-#ifndef GL_NV_draw_instanced
+-#define GL_NV_draw_instanced 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glDrawArraysInstancedNV (GLenum mode, GLint first, GLsizei count, GLsizei primcount);
+-GL_APICALL void GL_APIENTRY glDrawElementsInstancedNV (GLenum mode, GLsizei count, GLenum type, const GLvoid *indices, GLsizei primcount);
+-#endif
+-typedef void (GL_APIENTRYP PFNDRAWARRAYSINSTANCEDNVPROC) (GLenum mode, GLint first, GLsizei count, GLsizei primcount);
+-typedef void (GL_APIENTRYP PFNDRAWELEMENTSINSTANCEDNVPROC) (GLenum mode, GLsizei count, GLenum type, const GLvoid *indices, GLsizei primcount);
+-#endif
+-
+-/* GL_NV_fbo_color_attachments */
+-#ifndef GL_NV_fbo_color_attachments
+-#define GL_NV_fbo_color_attachments 1
+-#endif
+-
+-/* GL_NV_fence */
+-#ifndef GL_NV_fence
+-#define GL_NV_fence 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glDeleteFencesNV (GLsizei, const GLuint *);
+-GL_APICALL void GL_APIENTRY glGenFencesNV (GLsizei, GLuint *);
+-GL_APICALL GLboolean GL_APIENTRY glIsFenceNV (GLuint);
+-GL_APICALL GLboolean GL_APIENTRY glTestFenceNV (GLuint);
+-GL_APICALL void GL_APIENTRY glGetFenceivNV (GLuint, GLenum, GLint *);
+-GL_APICALL void GL_APIENTRY glFinishFenceNV (GLuint);
+-GL_APICALL void GL_APIENTRY glSetFenceNV (GLuint, GLenum);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLDELETEFENCESNVPROC) (GLsizei n, const GLuint *fences);
+-typedef void (GL_APIENTRYP PFNGLGENFENCESNVPROC) (GLsizei n, GLuint *fences);
+-typedef GLboolean (GL_APIENTRYP PFNGLISFENCENVPROC) (GLuint fence);
+-typedef GLboolean (GL_APIENTRYP PFNGLTESTFENCENVPROC) (GLuint fence);
+-typedef void (GL_APIENTRYP PFNGLGETFENCEIVNVPROC) (GLuint fence, GLenum pname, GLint *params);
+-typedef void (GL_APIENTRYP PFNGLFINISHFENCENVPROC) (GLuint fence);
+-typedef void (GL_APIENTRYP PFNGLSETFENCENVPROC) (GLuint fence, GLenum condition);
+-#endif
+-
+-/* GL_NV_framebuffer_blit */
+-#ifndef GL_NV_framebuffer_blit
+-#define GL_NV_framebuffer_blit 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glBlitFramebufferNV (int srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter);
+-#endif
+-typedef void (GL_APIENTRYP PFNBLITFRAMEBUFFERNVPROC) (GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter);
+-#endif
+-
+-/* GL_NV_framebuffer_multisample */
+-#ifndef GL_NV_framebuffer_multisample
+-#define GL_NV_framebuffer_multisample 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glRenderbufferStorageMultisampleNV ( GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height);
+-#endif
+-typedef void (GL_APIENTRYP PFNRENDERBUFFERSTORAGEMULTISAMPLENVPROC) ( GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height);
+-#endif
+-
+-/* GL_NV_generate_mipmap_sRGB */
+-#ifndef GL_NV_generate_mipmap_sRGB
+-#define GL_NV_generate_mipmap_sRGB 1
+-#endif
+-
+-/* GL_NV_instanced_arrays */
+-#ifndef GL_NV_instanced_arrays
+-#define GL_NV_instanced_arrays 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glVertexAttribDivisorNV (GLuint index, GLuint divisor);
+-#endif
+-typedef void (GL_APIENTRYP PFNVERTEXATTRIBDIVISORNVPROC) (GLuint index, GLuint divisor);
+-#endif
+-
+-/* GL_NV_read_buffer */
+-#ifndef GL_NV_read_buffer
+-#define GL_NV_read_buffer 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glReadBufferNV (GLenum mode);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLREADBUFFERNVPROC) (GLenum mode);
+-#endif
+-
+-/* GL_NV_read_buffer_front */
+-#ifndef GL_NV_read_buffer_front
+-#define GL_NV_read_buffer_front 1
+-#endif
+-
+-/* GL_NV_read_depth */
+-#ifndef GL_NV_read_depth
+-#define GL_NV_read_depth 1
+-#endif
+-
+-/* GL_NV_read_depth_stencil */
+-#ifndef GL_NV_read_depth_stencil
+-#define GL_NV_read_depth_stencil 1
+-#endif
+-
+-/* GL_NV_read_stencil */
+-#ifndef GL_NV_read_stencil
+-#define GL_NV_read_stencil 1
+-#endif
+-
+-/* GL_NV_shadow_samplers_array */
+-#ifndef GL_NV_shadow_samplers_array
+-#define GL_NV_shadow_samplers_array 1
+-#endif
+-
+-/* GL_NV_shadow_samplers_cube */
+-#ifndef GL_NV_shadow_samplers_cube
+-#define GL_NV_shadow_samplers_cube 1
+-#endif
+-
+-/* GL_NV_sRGB_formats */
+-#ifndef GL_NV_sRGB_formats
+-#define GL_NV_sRGB_formats 1
+-#endif
+-
+-/* GL_NV_texture_border_clamp */
+-#ifndef GL_NV_texture_border_clamp
+-#define GL_NV_texture_border_clamp 1
+-#endif
+-
+-/* GL_NV_texture_compression_s3tc_update */
+-#ifndef GL_NV_texture_compression_s3tc_update
+-#define GL_NV_texture_compression_s3tc_update 1
+-#endif
+-
+-/* GL_NV_texture_npot_2D_mipmap */
+-#ifndef GL_NV_texture_npot_2D_mipmap
+-#define GL_NV_texture_npot_2D_mipmap 1
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * QCOM extension functions
+- *------------------------------------------------------------------------*/
+-
+-/* GL_QCOM_alpha_test */
+-#ifndef GL_QCOM_alpha_test
+-#define GL_QCOM_alpha_test 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glAlphaFuncQCOM (GLenum func, GLclampf ref);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLALPHAFUNCQCOMPROC) (GLenum func, GLclampf ref);
+-#endif
+-
+-/* GL_QCOM_binning_control */
+-#ifndef GL_QCOM_binning_control
+-#define GL_QCOM_binning_control 1
+-#endif
+-
+-/* GL_QCOM_driver_control */
+-#ifndef GL_QCOM_driver_control
+-#define GL_QCOM_driver_control 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glGetDriverControlsQCOM (GLint *num, GLsizei size, GLuint *driverControls);
+-GL_APICALL void GL_APIENTRY glGetDriverControlStringQCOM (GLuint driverControl, GLsizei bufSize, GLsizei *length, GLchar *driverControlString);
+-GL_APICALL void GL_APIENTRY glEnableDriverControlQCOM (GLuint driverControl);
+-GL_APICALL void GL_APIENTRY glDisableDriverControlQCOM (GLuint driverControl);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLGETDRIVERCONTROLSQCOMPROC) (GLint *num, GLsizei size, GLuint *driverControls);
+-typedef void (GL_APIENTRYP PFNGLGETDRIVERCONTROLSTRINGQCOMPROC) (GLuint driverControl, GLsizei bufSize, GLsizei *length, GLchar *driverControlString);
+-typedef void (GL_APIENTRYP PFNGLENABLEDRIVERCONTROLQCOMPROC) (GLuint driverControl);
+-typedef void (GL_APIENTRYP PFNGLDISABLEDRIVERCONTROLQCOMPROC) (GLuint driverControl);
+-#endif
+-
+-/* GL_QCOM_extended_get */
+-#ifndef GL_QCOM_extended_get
+-#define GL_QCOM_extended_get 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glExtGetTexturesQCOM (GLuint *textures, GLint maxTextures, GLint *numTextures);
+-GL_APICALL void GL_APIENTRY glExtGetBuffersQCOM (GLuint *buffers, GLint maxBuffers, GLint *numBuffers);
+-GL_APICALL void GL_APIENTRY glExtGetRenderbuffersQCOM (GLuint *renderbuffers, GLint maxRenderbuffers, GLint *numRenderbuffers);
+-GL_APICALL void GL_APIENTRY glExtGetFramebuffersQCOM (GLuint *framebuffers, GLint maxFramebuffers, GLint *numFramebuffers);
+-GL_APICALL void GL_APIENTRY glExtGetTexLevelParameterivQCOM (GLuint texture, GLenum face, GLint level, GLenum pname, GLint *params);
+-GL_APICALL void GL_APIENTRY glExtTexObjectStateOverrideiQCOM (GLenum target, GLenum pname, GLint param);
+-GL_APICALL void GL_APIENTRY glExtGetTexSubImageQCOM (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLvoid *texels);
+-GL_APICALL void GL_APIENTRY glExtGetBufferPointervQCOM (GLenum target, GLvoid **params);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLEXTGETTEXTURESQCOMPROC) (GLuint *textures, GLint maxTextures, GLint *numTextures);
+-typedef void (GL_APIENTRYP PFNGLEXTGETBUFFERSQCOMPROC) (GLuint *buffers, GLint maxBuffers, GLint *numBuffers);
+-typedef void (GL_APIENTRYP PFNGLEXTGETRENDERBUFFERSQCOMPROC) (GLuint *renderbuffers, GLint maxRenderbuffers, GLint *numRenderbuffers);
+-typedef void (GL_APIENTRYP PFNGLEXTGETFRAMEBUFFERSQCOMPROC) (GLuint *framebuffers, GLint maxFramebuffers, GLint *numFramebuffers);
+-typedef void (GL_APIENTRYP PFNGLEXTGETTEXLEVELPARAMETERIVQCOMPROC) (GLuint texture, GLenum face, GLint level, GLenum pname, GLint *params);
+-typedef void (GL_APIENTRYP PFNGLEXTTEXOBJECTSTATEOVERRIDEIQCOMPROC) (GLenum target, GLenum pname, GLint param);
+-typedef void (GL_APIENTRYP PFNGLEXTGETTEXSUBIMAGEQCOMPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLvoid *texels);
+-typedef void (GL_APIENTRYP PFNGLEXTGETBUFFERPOINTERVQCOMPROC) (GLenum target, GLvoid **params);
+-#endif
+-
+-/* GL_QCOM_extended_get2 */
+-#ifndef GL_QCOM_extended_get2
+-#define GL_QCOM_extended_get2 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glExtGetShadersQCOM (GLuint *shaders, GLint maxShaders, GLint *numShaders);
+-GL_APICALL void GL_APIENTRY glExtGetProgramsQCOM (GLuint *programs, GLint maxPrograms, GLint *numPrograms);
+-GL_APICALL GLboolean GL_APIENTRY glExtIsProgramBinaryQCOM (GLuint program);
+-GL_APICALL void GL_APIENTRY glExtGetProgramBinarySourceQCOM (GLuint program, GLenum shadertype, GLchar *source, GLint *length);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLEXTGETSHADERSQCOMPROC) (GLuint *shaders, GLint maxShaders, GLint *numShaders);
+-typedef void (GL_APIENTRYP PFNGLEXTGETPROGRAMSQCOMPROC) (GLuint *programs, GLint maxPrograms, GLint *numPrograms);
+-typedef GLboolean (GL_APIENTRYP PFNGLEXTISPROGRAMBINARYQCOMPROC) (GLuint program);
+-typedef void (GL_APIENTRYP PFNGLEXTGETPROGRAMBINARYSOURCEQCOMPROC) (GLuint program, GLenum shadertype, GLchar *source, GLint *length);
+-#endif
+-
+-/* GL_QCOM_perfmon_global_mode */
+-#ifndef GL_QCOM_perfmon_global_mode
+-#define GL_QCOM_perfmon_global_mode 1
+-#endif
+-
+-/* GL_QCOM_writeonly_rendering */
+-#ifndef GL_QCOM_writeonly_rendering
+-#define GL_QCOM_writeonly_rendering 1
+-#endif
+-
+-/* GL_QCOM_tiled_rendering */
+-#ifndef GL_QCOM_tiled_rendering
+-#define GL_QCOM_tiled_rendering 1
+-#ifdef GL_GLEXT_PROTOTYPES
+-GL_APICALL void GL_APIENTRY glStartTilingQCOM (GLuint x, GLuint y, GLuint width, GLuint height, GLbitfield preserveMask);
+-GL_APICALL void GL_APIENTRY glEndTilingQCOM (GLbitfield preserveMask);
+-#endif
+-typedef void (GL_APIENTRYP PFNGLSTARTTILINGQCOMPROC) (GLuint x, GLuint y, GLuint width, GLuint height, GLbitfield preserveMask);
+-typedef void (GL_APIENTRYP PFNGLENDTILINGQCOMPROC) (GLbitfield preserveMask);
+-#endif
+-
+-/*------------------------------------------------------------------------*
+- * VIV extension tokens
+- *------------------------------------------------------------------------*/
+-
+-/* GL_VIV_shader_binary */
+-#ifndef GL_VIV_shader_binary
+-#define GL_VIV_shader_binary 1
+-#endif
+-
+-#ifdef __cplusplus
+-}
+-#endif
+-
+-#endif /* __gl2ext_h_ */
+diff --git a/include/GLES2/gl2platform.h b/include/GLES2/gl2platform.h
+deleted file mode 100644
+index c9fa3c4..0000000
+--- a/include/GLES2/gl2platform.h
++++ /dev/null
+@@ -1,30 +0,0 @@
+-#ifndef __gl2platform_h_
+-#define __gl2platform_h_
+-
+-/* $Revision: 10602 $ on $Date:: 2010-03-04 22:35:34 -0800 #$ */
+-
+-/*
+- * This document is licensed under the SGI Free Software B License Version
+- * 2.0. For details, see http://oss.sgi.com/projects/FreeB/ .
+- */
+-
+-/* Platform-specific types and definitions for OpenGL ES 2.X gl2.h
+- *
+- * Adopters may modify khrplatform.h and this file to suit their platform.
+- * You are encouraged to submit all modifications to the Khronos group so that
+- * they can be included in future versions of this file. Please submit changes
+- * by sending them to the public Khronos Bugzilla (http://khronos.org/bugzilla)
+- * by filing a bug against product "OpenGL-ES" component "Registry".
+- */
+-
+-#include <KHR/khrplatform.h>
+-
+-#ifndef GL_APICALL
+-#define GL_APICALL KHRONOS_APICALL
+-#endif
+-
+-#ifndef GL_APIENTRY
+-#define GL_APIENTRY KHRONOS_APIENTRY
+-#endif
+-
+-#endif /* __gl2platform_h_ */
+diff --git a/include/KHR/khrplatform.h b/include/KHR/khrplatform.h
+deleted file mode 100644
+index 4479539..0000000
+--- a/include/KHR/khrplatform.h
++++ /dev/null
+@@ -1,277 +0,0 @@
+-#ifndef __khrplatform_h_
+-#define __khrplatform_h_
+-
+-/*
+-** Copyright (c) 2008-2009 The Khronos Group Inc.
+-**
+-** Permission is hereby granted, free of charge, to any person obtaining a
+-** copy of this software and/or associated documentation files (the
+-** "Materials"), to deal in the Materials without restriction, including
+-** without limitation the rights to use, copy, modify, merge, publish,
+-** distribute, sublicense, and/or sell copies of the Materials, and to
+-** permit persons to whom the Materials are furnished to do so, subject to
+-** the following conditions:
+-**
+-** The above copyright notice and this permission notice shall be included
+-** in all copies or substantial portions of the Materials.
+-**
+-** THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+-** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+-** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+-** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+-** CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+-** TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+-** MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
+-*/
+-
+-/* Khronos platform-specific types and definitions.
+- *
+- * $Revision: 9356 $ on $Date: 2009-10-21 02:52:25 -0700 (Wed, 21 Oct 2009) $
+- *
+- * Adopters may modify this file to suit their platform. Adopters are
+- * encouraged to submit platform specific modifications to the Khronos
+- * group so that they can be included in future versions of this file.
+- * Please submit changes by sending them to the public Khronos Bugzilla
+- * (http://khronos.org/bugzilla) by filing a bug against product
+- * "Khronos (general)" component "Registry".
+- *
+- * A predefined template which fills in some of the bug fields can be
+- * reached using http://tinyurl.com/khrplatform-h-bugreport, but you
+- * must create a Bugzilla login first.
+- *
+- *
+- * See the Implementer's Guidelines for information about where this file
+- * should be located on your system and for more details of its use:
+- * http://www.khronos.org/registry/implementers_guide.pdf
+- *
+- * This file should be included as
+- * #include <KHR/khrplatform.h>
+- * by Khronos client API header files that use its types and defines.
+- *
+- * The types in khrplatform.h should only be used to define API-specific types.
+- *
+- * Types defined in khrplatform.h:
+- * khronos_int8_t signed 8 bit
+- * khronos_uint8_t unsigned 8 bit
+- * khronos_int16_t signed 16 bit
+- * khronos_uint16_t unsigned 16 bit
+- * khronos_int32_t signed 32 bit
+- * khronos_uint32_t unsigned 32 bit
+- * khronos_int64_t signed 64 bit
+- * khronos_uint64_t unsigned 64 bit
+- * khronos_intptr_t signed same number of bits as a pointer
+- * khronos_uintptr_t unsigned same number of bits as a pointer
+- * khronos_ssize_t signed size
+- * khronos_usize_t unsigned size
+- * khronos_float_t signed 32 bit floating point
+- * khronos_time_ns_t unsigned 64 bit time in nanoseconds
+- * khronos_utime_nanoseconds_t unsigned time interval or absolute time in
+- * nanoseconds
+- * khronos_stime_nanoseconds_t signed time interval in nanoseconds
+- * khronos_boolean_enum_t enumerated boolean type. This should
+- * only be used as a base type when a client API's boolean type is
+- * an enum. Client APIs which use an integer or other type for
+- * booleans cannot use this as the base type for their boolean.
+- *
+- * Tokens defined in khrplatform.h:
+- *
+- * KHRONOS_FALSE, KHRONOS_TRUE Enumerated boolean false/true values.
+- *
+- * KHRONOS_SUPPORT_INT64 is 1 if 64 bit integers are supported; otherwise 0.
+- * KHRONOS_SUPPORT_FLOAT is 1 if floats are supported; otherwise 0.
+- *
+- * Calling convention macros defined in this file:
+- * KHRONOS_APICALL
+- * KHRONOS_APIENTRY
+- * KHRONOS_APIATTRIBUTES
+- *
+- * These may be used in function prototypes as:
+- *
+- * KHRONOS_APICALL void KHRONOS_APIENTRY funcname(
+- * int arg1,
+- * int arg2) KHRONOS_APIATTRIBUTES;
+- */
+-
+-/*-------------------------------------------------------------------------
+- * Definition of KHRONOS_APICALL
+- *-------------------------------------------------------------------------
+- * This precedes the return type of the function in the function prototype.
+- */
+-#if defined(_WIN32) && !defined(__SCITECH_SNAP__)
+-# if defined(KHRONOS_DLL_EXPORTS)
+-# define KHRONOS_APICALL __declspec(dllexport)
+-# else
+-# define KHRONOS_APICALL __declspec(dllimport)
+-# endif
+-#elif defined (__SYMBIAN32__)
+-# define KHRONOS_APICALL IMPORT_C
+-#elif (defined(__GNUC__) && (__GNUC__ * 100 + __GNUC_MINOR__) >= 303) \
+- || (defined(__SUNPRO_C) && (__SUNPRO_C >= 0x590))
+-/* KHRONOS_APIATTRIBUTES is not used by the client API headers yet */
+-# define KHRONOS_APICALL __attribute__((visibility("default")))
+-#else
+-# define KHRONOS_APICALL
+-#endif
+-
+-/*-------------------------------------------------------------------------
+- * Definition of KHRONOS_APIENTRY
+- *-------------------------------------------------------------------------
+- * This follows the return type of the function and precedes the function
+- * name in the function prototype.
+- */
+-#if defined(_WIN32) && !defined(_WIN32_WCE) && !defined(__SCITECH_SNAP__)
+- /* Win32 but not WinCE */
+-# define KHRONOS_APIENTRY __stdcall
+-#else
+-# define KHRONOS_APIENTRY
+-#endif
+-
+-/*-------------------------------------------------------------------------
+- * Definition of KHRONOS_APIATTRIBUTES
+- *-------------------------------------------------------------------------
+- * This follows the closing parenthesis of the function prototype arguments.
+- */
+-#if defined (__ARMCC_2__)
+-#define KHRONOS_APIATTRIBUTES __softfp
+-#else
+-#define KHRONOS_APIATTRIBUTES
+-#endif
+-
+-/*-------------------------------------------------------------------------
+- * basic type definitions
+- *-----------------------------------------------------------------------*/
+-#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || defined(__GNUC__) || defined(__SCO__) || defined(__USLC__)
+-
+-
+-/*
+- * Using <stdint.h>
+- */
+-#include <stdint.h>
+-typedef int32_t khronos_int32_t;
+-typedef uint32_t khronos_uint32_t;
+-typedef int64_t khronos_int64_t;
+-typedef uint64_t khronos_uint64_t;
+-#define KHRONOS_SUPPORT_INT64 1
+-#define KHRONOS_SUPPORT_FLOAT 1
+-
+-#elif defined(__VMS ) || defined(__sgi)
+-
+-/*
+- * Using <inttypes.h>
+- */
+-#include <inttypes.h>
+-typedef int32_t khronos_int32_t;
+-typedef uint32_t khronos_uint32_t;
+-typedef int64_t khronos_int64_t;
+-typedef uint64_t khronos_uint64_t;
+-#define KHRONOS_SUPPORT_INT64 1
+-#define KHRONOS_SUPPORT_FLOAT 1
+-
+-#elif defined(_WIN32) && !defined(__SCITECH_SNAP__)
+-
+-/*
+- * Win32
+- */
+-typedef __int32 khronos_int32_t;
+-typedef unsigned __int32 khronos_uint32_t;
+-typedef __int64 khronos_int64_t;
+-typedef unsigned __int64 khronos_uint64_t;
+-#define KHRONOS_SUPPORT_INT64 1
+-#define KHRONOS_SUPPORT_FLOAT 1
+-
+-#elif defined(__sun__) || defined(__digital__)
+-
+-/*
+- * Sun or Digital
+- */
+-typedef int khronos_int32_t;
+-typedef unsigned int khronos_uint32_t;
+-#if defined(__arch64__) || defined(_LP64)
+-typedef long int khronos_int64_t;
+-typedef unsigned long int khronos_uint64_t;
+-#else
+-typedef long long int khronos_int64_t;
+-typedef unsigned long long int khronos_uint64_t;
+-#endif /* __arch64__ */
+-#define KHRONOS_SUPPORT_INT64 1
+-#define KHRONOS_SUPPORT_FLOAT 1
+-
+-#elif 0
+-
+-/*
+- * Hypothetical platform with no float or int64 support
+- */
+-typedef int khronos_int32_t;
+-typedef unsigned int khronos_uint32_t;
+-#define KHRONOS_SUPPORT_INT64 0
+-#define KHRONOS_SUPPORT_FLOAT 0
+-
+-#else
+-
+-/*
+- * Generic fallback
+- */
+-#include <stdint.h>
+-typedef int32_t khronos_int32_t;
+-typedef uint32_t khronos_uint32_t;
+-typedef int64_t khronos_int64_t;
+-typedef uint64_t khronos_uint64_t;
+-#define KHRONOS_SUPPORT_INT64 1
+-#define KHRONOS_SUPPORT_FLOAT 1
+-
+-#endif
+-
+-
+-/*
+- * Types that are (so far) the same on all platforms
+- */
+-typedef signed char khronos_int8_t;
+-typedef unsigned char khronos_uint8_t;
+-typedef signed short int khronos_int16_t;
+-typedef unsigned short int khronos_uint16_t;
+-typedef signed long int khronos_intptr_t;
+-typedef unsigned long int khronos_uintptr_t;
+-typedef signed long int khronos_ssize_t;
+-typedef unsigned long int khronos_usize_t;
+-
+-#if KHRONOS_SUPPORT_FLOAT
+-/*
+- * Float type
+- */
+-typedef float khronos_float_t;
+-#endif
+-
+-#if KHRONOS_SUPPORT_INT64
+-/* Time types
+- *
+- * These types can be used to represent a time interval in nanoseconds or
+- * an absolute Unadjusted System Time. Unadjusted System Time is the number
+- * of nanoseconds since some arbitrary system event (e.g. since the last
+- * time the system booted). The Unadjusted System Time is an unsigned
+- * 64 bit value that wraps back to 0 every 584 years. Time intervals
+- * may be either signed or unsigned.
+- */
+-typedef khronos_uint64_t khronos_utime_nanoseconds_t;
+-typedef khronos_int64_t khronos_stime_nanoseconds_t;
+-#endif
+-
+-/*
+- * Dummy value used to pad enum types to 32 bits.
+- */
+-#ifndef KHRONOS_MAX_ENUM
+-#define KHRONOS_MAX_ENUM 0x7FFFFFFF
+-#endif
+-
+-/*
+- * Enumerated boolean type
+- *
+- * Values other than zero should be considered to be true. Therefore
+- * comparisons should not be made against KHRONOS_TRUE.
+- */
+-typedef enum {
+- KHRONOS_FALSE = 0,
+- KHRONOS_TRUE = 1,
+- KHRONOS_BOOLEAN_ENUM_FORCE_SIZE = KHRONOS_MAX_ENUM
+-} khronos_boolean_enum_t;
+-
+-#endif /* __khrplatform_h_ */
+--
+1.7.9.5
+
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/libgbm.bb b/meta-rcar-gen2/recipes-graphics/wayland/libgbm.bb
new file mode 100644
index 0000000..e7dc398
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/libgbm.bb
@@ -0,0 +1,23 @@
+SUMMARY = "gbm library"
+LICENSE = "MIT"
+SECTION = "libs"
+
+LIC_FILES_CHKSUM = "file://gbm.c;beginline=4;endline=22;md5=5cdaac262c876e98e47771f11c7036b5"
+
+SRCREV = "39cad6b7f24ea65e6f7d2c2777e3fe3dda8c24c9"
+SRC_URI = "git://github.com/thayama/libgbm;protocol=git;branch=master"
+
+S = "${WORKDIR}/git"
+
+COMPATIBLE_MACHINE = "(r8a7790|r8a7791|r8a7793|r8a7794)"
+DEPENDS = "wayland-kms"
+
+inherit autotools pkgconfig
+
+# FILES_${PN} += "${libdir}/gbm/libgbm_kms.so.*"
+FILES_${PN} = "${libdir}/libgbm.so.* ${libdir}/gbm/libgbm_kms.so.*"
+FILES_${PN}-dev += "${libdir}/gbm/*.so ${libdir}/gbm/*.la"
+FILES_${PN}-dev += "${libdir}/gbm/*.so ${libdir}/gbm/*.la"
+FILES_${PN}-dbg += "${libdir}/gbm/.debug/*"
+FILES_${PN}-staticdev += "${libdir}/gbm/*.a"
+
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/wayland-kms_1.4.0.bb b/meta-rcar-gen2/recipes-graphics/wayland/wayland-kms_1.4.0.bb
new file mode 100644
index 0000000..52bc922
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/wayland-kms_1.4.0.bb
@@ -0,0 +1,21 @@
+SUMMARY = "KMS library for Wayland"
+LICENSE = "MIT"
+
+LIC_FILES_CHKSUM = "file://wayland-kms.c;beginline=6;endline=24;md5=5cdaac262c876e98e47771f11c7036b5"
+
+PV_append = "+git${SRCREV}"
+
+SRCREV = "d0c6d621f610d432abeffe3f4a624760bca61d0d"
+SRC_URI = "git://github.com/thayama/wayland-kms;protocol=git;branch=master"
+
+COMPATIBLE_MACHINE = "(r8a7790|r8a7791|r8a7793|r8a7794)"
+S = "${WORKDIR}/git"
+DEPENDS = "libdrm wayland gles-user-module"
+
+inherit autotools pkgconfig
+
+FILES_${PN} = "${libdir}/libwayland-kms.so.*"
+FILES_${PN}-dev = "${libdir}/libwayland-kms.la \
+ ${libdir}/libwayland-kms.so ${libdir}/pkgconfig/* \
+ ${includedir}/*"
+FILES_${PN}-staticdev += "${libdir}/libwayland-kms.a"
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/wayland/disable-macro-checks-not-used-for-scanner.patch b/meta-rcar-gen2/recipes-graphics/wayland/wayland/disable-macro-checks-not-used-for-scanner.patch
new file mode 100644
index 0000000..cd8bc55
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/wayland/disable-macro-checks-not-used-for-scanner.patch
@@ -0,0 +1,50 @@
+disable macro checks not used for scanner
+
+We only build wayland-native for the scanner, so disable the bits we don't
+actually need. This avoid build issue on older distro such as Centos 5.x:
+| error: 'O_CLOEXEC' undeclared (first use in this function)
+| error: sys/timerfd.h: No such file or directory
+| error: 'CLOCK_MONOTONIC' undeclared (first use in this function)
+| error: 'TFD_CLOEXEC' undeclared (first use in this function)
+| error: 'SFD_CLOEXEC' undeclared (first use in this function)
+
+Upstream-Status: Pending
+
+Signed-off-by: Ting Liu <b28495@freescale.com>
+---
+ configure.ac | 20 ++++++++++----------
+ 1 file changed, 10 insertions(+), 10 deletions(-)
+
+diff --git a/configure.ac b/configure.ac
+--- a/configure.ac
++++ b/configure.ac
+@@ -41,16 +41,16 @@ AC_SUBST(GCC_CFLAGS)
+
+ AC_CHECK_FUNCS([accept4 mkostemp posix_fallocate])
+
+-AC_CHECK_DECL(SFD_CLOEXEC,[],
+- [AC_MSG_ERROR("SFD_CLOEXEC is needed to compile wayland")],
+- [[#include <sys/signalfd.h>]])
+-AC_CHECK_DECL(TFD_CLOEXEC,[],
+- [AC_MSG_ERROR("TFD_CLOEXEC is needed to compile wayland")],
+- [[#include <sys/timerfd.h>]])
+-AC_CHECK_DECL(CLOCK_MONOTONIC,[],
+- [AC_MSG_ERROR("CLOCK_MONOTONIC is needed to compile wayland")],
+- [[#include <time.h>]])
+-AC_CHECK_HEADERS([execinfo.h])
++##AC_CHECK_DECL(SFD_CLOEXEC,[],
++# [AC_MSG_ERROR("SFD_CLOEXEC is needed to compile wayland")],
++# [[#include <sys/signalfd.h>]])
++#AC_CHECK_DECL(TFD_CLOEXEC,[],
++# [AC_MSG_ERROR("TFD_CLOEXEC is needed to compile wayland")],
++# [[#include <sys/timerfd.h>]])
++#AC_CHECK_DECL(CLOCK_MONOTONIC,[],
++# [AC_MSG_ERROR("CLOCK_MONOTONIC is needed to compile wayland")],
++# [[#include <time.h>]])
++#AC_CHECK_HEADERS([execinfo.h])
+
+ AC_ARG_ENABLE([scanner],
+ [AC_HELP_STRING([--disable-scanner],
+--
+1.8.3.2
+
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/wayland_1.5.0.bb b/meta-rcar-gen2/recipes-graphics/wayland/wayland_1.5.0.bb
new file mode 100644
index 0000000..b1ae59e
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/wayland_1.5.0.bb
@@ -0,0 +1,41 @@
+SUMMARY = "Wayland, a protocol between a compositor and clients"
+DESCRIPTION = "Wayland is a protocol for a compositor to talk to its clients \
+as well as a C library implementation of that protocol. The compositor can be \
+a standalone display server running on Linux kernel modesetting and evdev \
+input devices, an X application, or a wayland client itself. The clients can \
+be traditional applications, X servers (rootless or fullscreen) or other \
+display servers."
+HOMEPAGE = "http://wayland.freedesktop.org"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://COPYING;md5=1d4476a7d98dd5691c53d4d43a510c72 \
+ file://src/wayland-server.c;endline=21;md5=079ae21dbf98ada52ec23744851b0a5c"
+
+SRC_URI = "http://wayland.freedesktop.org/releases/${BPN}-${PV}.tar.xz"
+SRC_URI[md5sum] = "1d882776b27329b91d2d500b6d66dd1d"
+SRC_URI[sha256sum] = "0069e1e9af888b3e05384380ad8cc6c976ea3e81d08ba19b7675ce1d693a41b5"
+SRC_URI_append_class-native = " \
+ file://disable-macro-checks-not-used-for-scanner.patch \
+ "
+EXTRA_OECONF_class-native = "--disable-documentation --enable-scanner"
+
+inherit autotools pkgconfig
+
+# We need wayland-native for the wayland-scanner utility
+BBCLASSEXTEND = "native"
+
+DEPENDS_class-native = "expat-native libffi-native"
+DEPENDS = "expat libffi wayland-native"
+
+EXTRA_OECONF = "--disable-documentation --disable-scanner"
+
+# Wayland installs a M4 macro for other projects to use, which uses the target
+# pkg-config to find files. Replace pkg-config with pkg-config-native.
+do_install_append_class-native() {
+ sed -e 's,PKG_CHECK_MODULES(.*),,g' \
+ -e 's,$PKG_CONFIG,pkg-config-native,g' \
+ -i ${D}/${datadir}/aclocal/wayland-scanner.m4
+}
+
+sysroot_stage_all_append_class-target () {
+ cp ${STAGING_DATADIR_NATIVE}/aclocal/wayland-scanner.m4 ${SYSROOT_DESTDIR}/${datadir}/aclocal/
+}
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/weston/disable-wayland-scanner-pkg-check.patch b/meta-rcar-gen2/recipes-graphics/wayland/weston/disable-wayland-scanner-pkg-check.patch
new file mode 100644
index 0000000..062da5c
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/weston/disable-wayland-scanner-pkg-check.patch
@@ -0,0 +1,13 @@
+Index: weston-1.5.0/configure.ac
+===================================================================
+--- weston-1.5.0.orig/configure.ac
++++ weston-1.5.0/configure.ac
+@@ -503,7 +503,7 @@ if test x$wayland_scanner = x; then
+ AC_MSG_ERROR([wayland-scanner is needed to compile weston])
+ fi
+
+-PKG_CHECK_MODULES(WAYLAND_SCANNER, wayland-scanner)
++#PKG_CHECK_MODULES(WAYLAND_SCANNER, wayland-scanner)
+
+ AC_CONFIG_FILES([Makefile src/version.h src/weston.pc])
+
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/weston/make-lcms-explicitly-configurable.patch b/meta-rcar-gen2/recipes-graphics/wayland/weston/make-lcms-explicitly-configurable.patch
new file mode 100644
index 0000000..35e6d6f
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/weston/make-lcms-explicitly-configurable.patch
@@ -0,0 +1,43 @@
+weston-1.5.0/configure.ac: make lcms explicitly configurable
+
+The lcms package is outside of openembedded-core, so make it
+explicitly configurable. Make it deterministic, so that if lcms
+dependencies are missing, autoconf throws a fatal error. Follow
+upstream style to make it more likely to be merged.
+
+Upstream-Status: Pending
+
+Index: weston-1.5.0/configure.ac
+===================================================================
+--- weston-1.5.0.orig/configure.ac
++++ weston-1.5.0/configure.ac
+@@ -491,12 +491,24 @@ AC_ARG_ENABLE(demo-clients-install,
+ enable_demo_clients_install=no)
+ AM_CONDITIONAL(INSTALL_DEMO_CLIENTS, [test "x$enable_demo_clients_install" = "xyes"])
+
+-PKG_CHECK_MODULES(LCMS, lcms2,
+- [have_lcms=yes], [have_lcms=no])
+-if test "x$have_lcms" = xyes; then
+- AC_DEFINE(HAVE_LCMS, 1, [Have lcms support])
++AC_ARG_ENABLE(lcms,
++ AS_HELP_STRING([--disable-lcms],
++ [Disable lcms support]),,
++ enable_lcms=auto)
++AM_CONDITIONAL(HAVE_LCMS, [test "x$enable_lcms" = xyes])
++if test "x$enable_lcms" != "xno"; then
++ PKG_CHECK_MODULES(LCMS,
++ lcms2,
++ [have_lcms=yes],
++ [have_lcms=no])
++ if test "x$have_lcms" = "xno" -a "x$enable_lcms" = "xyes"; then
++ AC_MSG_ERROR([lcms support explicitly requested, but lcms couldn't be found])
++ fi
++ if test "x$have_lcms" = "xyes"; then
++ enable_lcms=yes
++ AC_DEFINE(HAVE_LCMS, 1, [Have lcms support])
++ fi
+ fi
+-AM_CONDITIONAL(HAVE_LCMS, [test "x$have_lcms" = xyes])
+
+ AC_PATH_PROG([wayland_scanner], [wayland-scanner])
+ if test x$wayland_scanner = x; then
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/weston/make-libwebp-explicitly-configurable.patch b/meta-rcar-gen2/recipes-graphics/wayland/weston/make-libwebp-explicitly-configurable.patch
new file mode 100644
index 0000000..ad07d4f
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/weston/make-libwebp-explicitly-configurable.patch
@@ -0,0 +1,37 @@
+
+The libwebp package is outside of openembedded-core, so make it
+explicitly configurable. Make it deterministic, so that if libwebp
+dependencies are missing, autoconf throws a fatal error.
+
+Upstream-Status: Pending
+
+Index: weston-1.5.0/configure.ac
+===================================================================
+--- weston-1.5.0.orig/configure.ac
++++ weston-1.5.0/configure.ac
+@@ -268,9 +268,22 @@ fi
+
+ PKG_CHECK_MODULES(PIXMAN, [pixman-1])
+ PKG_CHECK_MODULES(PNG, [libpng])
+-PKG_CHECK_MODULES(WEBP, [libwebp], [have_webp=yes], [have_webp=no])
+-AS_IF([test "x$have_webp" = "xyes"],
+- [AC_DEFINE([HAVE_WEBP], [1], [Have webp])])
++AC_ARG_ENABLE(webp,
++ AS_HELP_STRING([--disable-webp],
++ [Disable libwebp support]),,
++ enable_webp=auto)
++AM_CONDITIONAL(HAVE_WEBP, [test "x$enable_webp" = xyes])
++AS_IF([test "x$enable_webp" != "xno"],
++ PKG_CHECK_MODULES(WEBP,
++ [libwebp],
++ [have_webp=yes],
++ [have_webp=no])
++ AS_IF([test "x$have_webp" = "xno" -a "x$enable_webp" = "xyes"],
++ AC_MSG_ERROR([libwebp support explicitly request, but lipwebp could not be found]))
++ AS_IF([test "x$have_webp" = "xyes"],
++ [enable_webp=yes]
++ [AC_DEFINE([HAVE_WEBP], [1], [Have webp])])
++)
+
+ AC_ARG_ENABLE(vaapi-recorder, [ --enable-vaapi-recorder],,
+ enable_vaapi_recorder=auto)
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/weston/weston.desktop b/meta-rcar-gen2/recipes-graphics/wayland/weston/weston.desktop
new file mode 100644
index 0000000..1086ae8
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/weston/weston.desktop
@@ -0,0 +1,9 @@
+[Desktop Entry]
+Encoding=UTF-8
+Type=Application
+Name=Weston
+Comment=Wayland Compostitor
+Exec=weston
+Icon=weston
+Terminal=false
+Categories=Utility;
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/weston/weston.png b/meta-rcar-gen2/recipes-graphics/wayland/weston/weston.png
new file mode 100644
index 0000000..ea8b7e0
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/weston/weston.png
Binary files differ
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/weston_1.5.0.bb b/meta-rcar-gen2/recipes-graphics/wayland/weston_1.5.0.bb
new file mode 100644
index 0000000..4a8584f
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/weston_1.5.0.bb
@@ -0,0 +1,87 @@
+SUMMARY = "Weston, a Wayland compositor"
+DESCRIPTION = "Weston is the reference implementation of a Wayland compositor"
+HOMEPAGE = "http://wayland.freedesktop.org"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://COPYING;md5=275efac2559a224527bd4fd593d38466 \
+ file://src/compositor.c;endline=23;md5=aa98a8db03480fe7d500d0b1f4b8850c"
+
+SRC_URI = "http://wayland.freedesktop.org/releases/${BPN}-${PV}.tar.xz \
+ file://weston.png \
+ file://weston.desktop \
+ file://disable-wayland-scanner-pkg-check.patch \
+ file://make-lcms-explicitly-configurable.patch \
+ file://make-libwebp-explicitly-configurable.patch \
+"
+SRC_URI[md5sum] = "8eb40d230efc2411f083c20656534780"
+SRC_URI[sha256sum] = "06388ba04ac79aa72d685cc1a8e646ddb2b8cfe11fcc742294f9addac48b7684"
+
+inherit autotools pkgconfig useradd
+
+DEPENDS = "libxkbcommon gdk-pixbuf pixman cairo glib-2.0 jpeg"
+DEPENDS += "wayland virtual/egl pango"
+
+EXTRA_OECONF = "--enable-setuid-install \
+ --disable-xwayland \
+ --enable-simple-clients \
+ --enable-clients \
+ --enable-demo-clients-install \
+ --disable-libunwind \
+ --disable-rpi-compositor \
+ --disable-rdp-compositor \
+ "
+
+
+PACKAGECONFIG ??= "${@bb.utils.contains('DISTRO_FEATURES', 'wayland', 'kms fbdev wayland egl', '', d)} \
+ ${@bb.utils.contains('DISTRO_FEATURES', 'x11', 'x11', '', d)} \
+ ${@bb.utils.contains('DISTRO_FEATURES', 'pam', 'launch', '', d)} \
+ "
+#
+# Compositor choices
+#
+# Weston on KMS
+PACKAGECONFIG[kms] = "--enable-drm-compositor,--disable-drm-compositor,drm udev virtual/mesa mtdev"
+# Weston on Wayland (nested Weston)
+PACKAGECONFIG[wayland] = "--enable-wayland-compositor,--disable-wayland-compositor,virtual/mesa"
+# Weston on X11
+PACKAGECONFIG[x11] = "--enable-x11-compositor,--disable-x11-compositor,virtual/libx11 libxcb libxcb libxcursor cairo"
+# Headless Weston
+PACKAGECONFIG[headless] = "--enable-headless-compositor,--disable-headless-compositor"
+# Weston on framebuffer
+PACKAGECONFIG[fbdev] = "--enable-fbdev-compositor,--disable-fbdev-compositor,udev mtdev"
+# weston-launch
+PACKAGECONFIG[launch] = "--enable-weston-launch,--disable-weston-launch,libpam drm"
+# VA-API desktop recorder
+PACKAGECONFIG[vaapi] = "--enable-vaapi-recorder,--disable-vaapi-recorder,libva"
+# Weston with EGL support
+PACKAGECONFIG[egl] = "--enable-egl --enable-simple-egl-clients,--disable-egl --disable-simple-egl-clients,virtual/egl"
+# Weston with cairo glesv2 support
+PACKAGECONFIG[cairo-glesv2] = "--with-cairo-glesv2,--with-cairo=image,cairo"
+# Weston with lcms support
+PACKAGECONFIG[lcms] = "--enable-lcms,--disable-lcms,lcms"
+# Weston with webp support
+PACKAGECONFIG[webp] = "--enable-webp,--disable-webp,libwebp"
+
+do_install_append() {
+ # Weston doesn't need the .la files to load modules, so wipe them
+ rm -f ${D}/${libdir}/weston/*.la
+
+ # If X11, ship a desktop file to launch it
+ if [ "${@bb.utils.contains('DISTRO_FEATURES', 'x11', 'x11', '', d)}" = "x11" ]; then
+ install -d ${D}${datadir}/applications
+ install ${WORKDIR}/weston.desktop ${D}${datadir}/applications
+
+ install -d ${D}${datadir}/icons/hicolor/48x48/apps
+ install ${WORKDIR}/weston.png ${D}${datadir}/icons/hicolor/48x48/apps
+ fi
+}
+
+PACKAGES += "${PN}-examples"
+
+FILES_${PN} = "${bindir}/weston ${bindir}/weston-terminal ${bindir}/weston-info ${bindir}/weston-launch ${bindir}/wcap-decode ${libexecdir} ${datadir}"
+FILES_${PN}-examples = "${bindir}/*"
+
+RDEPENDS_${PN} += "xkeyboard-config"
+RRECOMMENDS_${PN} = "liberation-fonts"
+
+USERADD_PACKAGES = "${PN}"
+GROUPADD_PARAM_${PN} = "--system weston-launch"
diff --git a/meta-rcar-gen2/recipes-graphics/wayland/weston_1.5.0.bbappend b/meta-rcar-gen2/recipes-graphics/wayland/weston_1.5.0.bbappend
new file mode 100644
index 0000000..0f2f5a6
--- /dev/null
+++ b/meta-rcar-gen2/recipes-graphics/wayland/weston_1.5.0.bbappend
@@ -0,0 +1,25 @@
+require ../../include/gles-control.inc
+
+PACKAGECONFIG_rcar-gen2 := "${@'${PACKAGECONFIG}'.replace('x11', '')}"
+
+PACKAGECONFIG_append_rcar-gen2 = " \
+ ${@base_conditional('USE_GLES', '1', '', 'fbdev', d)}"
+DEPENDS_append_rcar-gen2 = " \
+ ${@base_conditional('USE_GLES', '1', 'gles-user-module', '', d)}"
+EXTRA_OECONF_append_rcar-gen2 = " \
+ ${@base_conditional('USE_GLES', '1', '--enable-v4l2', \
+ '--disable-xwayland-test WESTON_NATIVE_BACKEND=fbdev-backend.so', d)}"
+
+SRCREV_rcar-gen2 = "${@'decdc587ceb147d22eb989a3334e627208030f69' \
+ if '1' in '${USE_GLES}' else '00781bcf518f6bab0d08e6962630b0994e8bf632'}"
+SRC_URI_rcar-gen2 = "git://github.com/renesas-devel/weston.git;protocol=git;branch=RCAR-GEN2/1.5.0/gl-fallback \
+ file://weston.desktop \
+ file://weston.png \
+ file://disable-wayland-scanner-pkg-check.patch \
+ file://make-lcms-explicitly-configurable.patch \
+ file://make-libwebp-explicitly-configurable.patch \
+"
+S = "${WORKDIR}/git"
+
+RDEPENDS_${PN}_append_rcar-gen2 = " \
+ ${@base_conditional('USE_GLES', '1', 'media-ctl', '', d)}"
diff --git a/meta-rcar-gen2/recipes-kernel/fdpm-module/fdpm-kernel-module.bb b/meta-rcar-gen2/recipes-kernel/fdpm-module/fdpm-kernel-module.bb
new file mode 100644
index 0000000..328c833
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/fdpm-module/fdpm-kernel-module.bb
@@ -0,0 +1,84 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "GPLv2&MIT"
+LIC_FILES_CHKSUM = "file://drv/GPL-COPYING;md5=ffa10f40b98be2c2bc9608f56827ed23 \
+ file://drv/MIT-COPYING;md5=5526ef6e21dc96a1dd89fac4bde9f995"
+
+DEPENDS = "linux-renesas mmngr-kernel-module"
+PN = "fdpm-kernel-module"
+PR = "r0"
+SRC_URI = "file://fdpm-kernel.tar.bz2"
+S = "${WORKDIR}/fdpm"
+
+FDPM_CFG_r8a7790 = "H2CONFIG"
+FDPM_CFG_r8a7791 = "M2CONFIG"
+FDPM_CFG_r8a7793 = "M2CONFIG"
+FDPM_CFG_r8a7794 = "E2CONFIG"
+
+KERNEL_HEADER_PATH = "${KERNELSRC}/include/linux"
+FDPM_INATALL_HEADERS="fdpm_drv.h fdpm_public.h fdpm_api.h"
+
+do_compile() {
+ # Build kernel module
+ export FDPM_CONFIG=${FDPM_CFG}
+ export FDPM_MMNGRDIR=${KERNELSRC}/include
+ cd ${S}/drv
+ make all ARCH=arm
+}
+
+do_install() {
+ # Create destination folder
+ mkdir -p ${D}/lib/modules/${KERNEL_VERSION}/extra ${D}/usr/src/kernel/include
+
+ # Copy driver and header files
+ cp -f ${S}/drv/fdpm.ko ${D}/lib/modules/${KERNEL_VERSION}/extra
+ cp ${S}/drv/Module.symvers ${KERNELSRC}/include/fdpm.symvers
+
+ for f in ${FDPM_INATALL_HEADERS} ; do
+ cp -f ${KERNEL_HEADER_PATH}/${f} ${KERNELSRC}/include
+ done
+
+ # Copy header files to destination
+ for f in ${FDPM_INATALL_HEADERS} ; do
+ cp -f ${KERNEL_HEADER_PATH}/${f} ${D}/usr/src/kernel/include
+ done
+ cp -f ${S}/drv/Module.symvers ${D}/usr/src/kernel/include/fdpm.symvers
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ if [ -d ${KERNELSRC} ] ; then
+ cd ${KERNELSRC}/include/linux/
+ rm -f fdpm_drv.h ${FDPM_INATALL_HEADERS}
+
+ cd ${KERNELSRC}/include/
+ rm -f fdpm.symvers ${FDPM_INATALL_HEADERS}
+ fi
+}
+
+PACKAGES = " \
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /lib/modules/${KERNEL_VERSION}/extra/fdpm.ko \
+"
+
+FILES_${PN}-dev = " \
+ /usr/src/kernel/include/*.h \
+ /usr/src/kernel/include/fdpm.symvers \
+"
+
+RPROVIDES_${PN} += "fdpm-kernel-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+
+do_configure[noexec] = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-kernel/fdpm-module/files/.gitkeep b/meta-rcar-gen2/recipes-kernel/fdpm-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/fdpm-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-kernel/gles-module/gles-kernel-module.bb b/meta-rcar-gen2/recipes-kernel/gles-module/gles-kernel-module.bb
new file mode 100644
index 0000000..a24d97f
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/gles-module/gles-kernel-module.bb
@@ -0,0 +1,102 @@
+DESCRIPTION = "RGX/SGX kernel module"
+LICENSE = "GPLv2&MIT"
+LIC_FILES_CHKSUM = "file://GPL-COPYING;md5=60422928ba677faaa13d6ab5f5baaa1e \
+ file://MIT-COPYING;md5=8c2810fa6bfdc5ae5c15a0c1ade34054"
+DEPENDS = "linux-renesas"
+PN = "gles-kernel-module"
+PR = "r0"
+
+COMPATIBLE_MACHINE = "(r8a7790|r8a7791|r8a7793|r8a7794)"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+SRC_URI_r8a7790 = 'file://RGX_KM_H2.tar.bz2'
+S_r8a7790 = "${WORKDIR}/rogue_km"
+KERNEL_SRC_PATH_r8a7790 = "build/linux/r8a7790_linux"
+TARGET_PATH_r8a7790 = "rogue_km/binary_r8a7790_linux_release/target/kbuild/"
+
+SRC_URI_r8a7791 = 'file://SGX_KM_M2.tar.bz2'
+S_r8a7791 = "${WORKDIR}/eurasia_km"
+KERNEL_SRC_PATH_r8a7791 = "eurasiacon/build/linux2/r8a7791_linux/"
+TARGET_PATH_r8a7791 = "eurasia_km/eurasiacon/binary2_r8a7791_linux_release/target/kbuild"
+
+SRC_URI_r8a7793 = 'file://SGX_KM_M2.tar.bz2'
+S_r8a7793 = "${WORKDIR}/eurasia_km"
+KERNEL_SRC_PATH_r8a7793 = "eurasiacon/build/linux2/r8a7793_linux/"
+TARGET_PATH_r8a7793 = "eurasia_km/eurasiacon/binary2_r8a7793_linux_release/target/kbuild"
+
+SRC_URI_r8a7794 = 'file://SGX_KM_E2.tar.bz2'
+S_r8a7794 = "${WORKDIR}/eurasia_km"
+KERNEL_SRC_PATH_r8a7794 = "eurasiacon/build/linux2/r8a7794_linux/"
+TARGET_PATH_r8a7794 = "eurasia_km/eurasiacon/binary2_r8a7794_linux_release/target/kbuild"
+
+GLES = "${@base_contains('MACHINE_FEATURES', 'rgx', 'rgx', \
+ base_contains('MACHINE_FEATURES', 'sgx', 'sgx', '', d), d)}"
+
+RPROVIDES_${PN} += "${GLES}-kernel-module"
+
+inherit module
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+
+do_patch[noexec] = "1"
+do_configure[noexec] = "1"
+do_populate_lic[noexec] = "1"
+
+export BUILDDIR = "${STAGING_INCDIR}/.."
+export LIBSHARED = "${STAGING_LIBDIR}"
+export KERNELSRC = "${STAGING_KERNEL_DIR}"
+export CROSS_COMPILE = "${TARGET_PREFIX}"
+export KERNELDIR = "${STAGING_KERNEL_DIR}"
+export LDFLAGS=""
+export CP = "cp"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_compile() {
+ cd ${S}/${KERNEL_SRC_PATH}
+ unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS
+ make kbuild ARCH=arm DISCIMAGE=${D}
+}
+
+do_install() {
+ export DISCIMAGE=${D}
+ mkdir -p ${D}/lib/modules/${KERNEL_VERSION}
+
+ cd ${S}/${KERNEL_SRC_PATH}
+
+ unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS
+ make kbuild_install ARCH=arm DISCIMAGE=${D}
+ mkdir -p ${D}/usr/src/kernel/include
+ cp -f ${WORKDIR}/${TARGET_PATH}/Module.symvers \
+ ${KERNELSRC}/include/${GLES}.symvers
+ cp -f ${WORKDIR}/${TARGET_PATH}/Module.symvers \
+ ${D}/usr/src/kernel/include/${GLES}.symvers
+}
+
+do_clean_source() {
+ rm -Rf ${KERNELSRC}/include/${GLES}.symvers
+}
+
+ALLOW_EMPTY_kernel-module-bc-example = "1"
+ALLOW_EMPTY_kernel-module-dc-linuxfb = "1"
+ALLOW_EMPTY_kernel-module-pvrsrvkm = "1"
+
+FILES_${PN}-dev = " \
+ /usr/src/kernel/include/${GLES}.symvers \
+"
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /lib/modules/${KERNEL_VERSION}/* \
+ /lib/modules/${KERNEL_VERSION}/extra/* \
+"
diff --git a/meta-rcar-gen2/recipes-kernel/gles-module/gles-kernel-module/.gitkeep b/meta-rcar-gen2/recipes-kernel/gles-module/gles-kernel-module/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/gles-module/gles-kernel-module/.gitkeep
diff --git a/meta-rcar-gen2/recipes-kernel/linux-libc-headers/linux-libc-headers/scripts-Makefile.headersinst-install-headers-from-sc.patch b/meta-rcar-gen2/recipes-kernel/linux-libc-headers/linux-libc-headers/scripts-Makefile.headersinst-install-headers-from-sc.patch
new file mode 100644
index 0000000..7eb7def
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux-libc-headers/linux-libc-headers/scripts-Makefile.headersinst-install-headers-from-sc.patch
@@ -0,0 +1,59 @@
+From b200d4bcffc86bb08fd3898bc7cde00f0686f62d Mon Sep 17 00:00:00 2001
+From: Robert Yang <liezhi.yang@windriver.com>
+Date: Fri, 13 Sep 2013 22:01:02 -0400
+Subject: [PATCH] scripts/Makefile.headersinst: install headers from scratch file
+
+If headers_install is executed from a deep/long directory structure, the
+shell's maximum argument length can be execeeded, which breaks the operation
+with:
+
+| make[2]: execvp: /bin/sh: Argument list too long
+| make[2]: ***
+
+By dumping the input files to a scratch file and using xargs to read the
+input list from the scratch file, we can avoid blowing out the maximum
+argument size and install headers in a long path name environment.
+
+Robert:
+Use "$(foreach ,,$(shell echo))" rather than "echo" to make it work when
+len(TMPDIR) <= 410.
+
+Upstream-Status: Inappropriate [oe-specific]
+
+Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
+Signed-off-by: Robert Yang <liezhi.yang@windriver.com>
+---
+RP: Refreshed for 3.10 as the problem still exists there on the autobuilders
+ scripts/Makefile.headersinst | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/scripts/Makefile.headersinst b/scripts/Makefile.headersinst
+--- a/scripts/Makefile.headersinst
++++ b/scripts/Makefile.headersinst
+@@ -72,7 +72,7 @@ printdir = $(patsubst $(INSTALL_HDR_PATH)/%/,%,$(dir $@))
+ quiet_cmd_install = INSTALL $(printdir) ($(words $(all-files))\
+ file$(if $(word 2, $(all-files)),s))
+ cmd_install = \
+- $(CONFIG_SHELL) $< $(installdir) $(input-files); \
++ xargs $(CONFIG_SHELL) $< $(installdir) < $(INSTALL_HDR_PATH)/.input-files; \
+ for F in $(wrapper-files); do \
+ echo "\#include <asm-generic/$$F>" > $(installdir)/$$F; \
+ done; \
+@@ -98,10 +98,17 @@ __headersinst: $(subdirs) $(install-file)
+ @:
+
+ targets += $(install-file)
++# Use the $(foreach ,,$(shell echo)) to avoid the "Argument list too
++# long" error, and use the "$(shell echo)" rather than "echo" to keep
++# the order.
+ $(install-file): scripts/headers_install.sh $(input-files) FORCE
+ $(if $(unwanted),$(call cmd,remove),)
+ $(if $(wildcard $(dir $@)),,$(shell mkdir -p $(dir $@)))
++ $(shell echo -n > $(INSTALL_HDR_PATH)/.input-files)
++ $(foreach f,$(input-files),$(shell echo -n "$(f) " >> \
++ $(INSTALL_HDR_PATH)/.input-files))
+ $(call if_changed,install)
++ @rm $(INSTALL_HDR_PATH)/.input-files
+
+ else
+ __headerscheck: $(subdirs) $(check-file)
diff --git a/meta-rcar-gen2/recipes-kernel/linux-libc-headers/linux-libc-headers_3.10.bb b/meta-rcar-gen2/recipes-kernel/linux-libc-headers/linux-libc-headers_3.10.bb
new file mode 100644
index 0000000..69a9396
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux-libc-headers/linux-libc-headers_3.10.bb
@@ -0,0 +1,13 @@
+require recipes-kernel/linux-libc-headers/linux-libc-headers.inc
+
+KORG_ARCHIVE_COMPRESSION = "xz"
+COMPATIBLE_MACHINE = "(alt|gose|koelsch|lager|porter|silk)"
+PV_append = "+git${SRCREV}"
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+
+RENESAS_BACKPORTS_URL="git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-backport.git"
+SRCREV = "b8ca8c397343f4233f9f68fc3a5bf8e1c9b88251"
+SRC_URI = "${RENESAS_BACKPORTS_URL};protocol=git;branch=bsp/v3.10.31-ltsi/rcar-gen2-1.9.2 \
+ file://scripts-Makefile.headersinst-install-headers-from-sc.patch"
+S = "${WORKDIR}/git"
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-dtb-append.inc b/meta-rcar-gen2/recipes-kernel/linux/linux-dtb-append.inc
new file mode 100644
index 0000000..725f377
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-dtb-append.inc
@@ -0,0 +1,61 @@
+do_install_append() {
+ if [ ! -n "${KERNEL_DEVICETREE}" ]; then
+ echo "Device tree does not support"
+ exit
+ fi
+
+ for DTS_FILE in ${KERNEL_DEVICETREE}; do
+ if [ ! -f ${DTS_FILE} ]; then
+ echo "Warning: ${DTS_FILE} is not available!"
+ continue
+ fi
+ DTS_BASE_NAME=`basename ${DTS_FILE} | awk -F "." '{print $1}'`
+ if [ ! -f arch/${ARCH}/boot/dts/${DTS_BASE_NAME}.dtb ]; then
+ echo "Warning: ${DTS_BASE_NAME}.dtb is not available!"
+ continue
+ fi
+ # create zImage (for bootz)
+ cat arch/${ARCH}/boot/zImage arch/${ARCH}/boot/dts/${DTS_BASE_NAME}.dtb > arch/${ARCH}/boot/zImage+dtb
+ # create uImage
+ $(cut -f 3- -d ' ' < arch/${ARCH}/boot/.uImage.cmd | sed -e 's/zImage/zImage+dtb/g' -e 's/uImage/uImage+dtb/g')
+ done
+}
+
+do_deploy_append() {
+ # zImage
+ if [ -f ${B}/arch/${ARCH}/boot/zImage -a "${KERNEL_IMAGETYPE}" != "zImage" ]; then
+ ZIMAGE_AND_DTB_NAME=`echo ${KERNEL_IMAGE_BASE_NAME} | sed "s/uImage/zImage/g"`
+
+ install -d ${DEPLOYDIR}
+ install -m 0644 ${B}/arch/${ARCH}/boot/zImage ${DEPLOYDIR}/${ZIMAGE_AND_DTB_NAME}
+ cd ${DEPLOYDIR}
+ ln -sf ${ZIMAGE_AND_DTB_NAME} zImage
+ cd -
+ fi
+
+ # zImage + DTB
+ if [ -f ${B}/arch/${ARCH}/boot/zImage+dtb ]; then
+ ZIMAGE_AND_DTB_NAME=`echo ${KERNEL_IMAGE_BASE_NAME} | sed "s/uImage/zImage+dtb/g"`
+
+ install -d ${DEPLOYDIR}
+ install -m 0644 ${B}/arch/${ARCH}/boot/zImage+dtb ${DEPLOYDIR}/${ZIMAGE_AND_DTB_NAME}
+ cd ${DEPLOYDIR}
+ ln -sf ${ZIMAGE_AND_DTB_NAME} zImage+dtb
+ cd -
+ else
+ echo "Warning: arch/${ARCH}/boot/zImage+dtb is not available!"
+ fi
+
+ # uImage (zImage + DTB)
+ if [ -f ${B}/arch/${ARCH}/boot/uImage+dtb ]; then
+ UIMAGE_AND_DTB_NAME=`echo ${KERNEL_IMAGE_BASE_NAME} | sed "s/uImage/uImage+dtb/g"`
+
+ install -d ${DEPLOYDIR}
+ install -m 0644 ${B}/arch/${ARCH}/boot/uImage+dtb ${DEPLOYDIR}/${UIMAGE_AND_DTB_NAME}
+ cd ${DEPLOYDIR}
+ ln -sf ${UIMAGE_AND_DTB_NAME} uImage+dtb
+ cd -
+ else
+ echo "Warning: arch/${ARCH}/boot/uImage+dtb is not available!"
+ fi
+}
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-dtb.inc b/meta-rcar-gen2/recipes-kernel/linux/linux-dtb.inc
new file mode 100644
index 0000000..6b8f1a5
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-dtb.inc
@@ -0,0 +1,69 @@
+# Support for device tree generation
+FILES_kernel-devicetree = "/${KERNEL_IMAGEDEST}/devicetree*"
+
+python __anonymous () {
+ d.appendVar("PACKAGES", " kernel-devicetree")
+}
+
+do_install_append() {
+ if test -n "${KERNEL_DEVICETREE}"; then
+ for DTB in ${KERNEL_DEVICETREE}; do
+ if echo ${DTB} | grep -q '/dts/'; then
+ bbwarn "${DTB} contains the full path to the the dts file, but only the dtb name should be used."
+ DTB=`basename ${DTB} | sed 's,\.dts$,.dtb,g'`
+ fi
+ DTB_BASE_NAME=`basename ${DTB} .dtb`
+ DTB_NAME=`echo ${KERNEL_IMAGE_BASE_NAME} | sed "s/${MACHINE}/${DTB_BASE_NAME}/g"`
+ DTB_SYMLINK_NAME=`echo ${KERNEL_IMAGE_SYMLINK_NAME} | sed "s/${MACHINE}/${DTB_BASE_NAME}/g"`
+ DTB_PATH="${B}/arch/${ARCH}/boot/dts/${DTB}"
+ oe_runmake ${DTB}
+ if [ ! -e "${DTB_PATH}" ]; then
+ DTB_PATH="${B}/arch/${ARCH}/boot/${DTB}"
+ fi
+ install -m 0644 ${DTB_PATH} ${D}/${KERNEL_IMAGEDEST}/devicetree-${DTB_SYMLINK_NAME}.dtb
+ done
+ fi
+}
+
+do_deploy_append() {
+ if test -n "${KERNEL_DEVICETREE}"; then
+ for DTB in ${KERNEL_DEVICETREE}; do
+ if echo ${DTB} | grep -q '/dts/'; then
+ bbwarn "${DTB} contains the full path to the the dts file, but only the dtb name should be used."
+ DTB=`basename ${DTB} | sed 's,\.dts$,.dtb,g'`
+ fi
+ DTB_BASE_NAME=`basename ${DTB} .dtb`
+ DTB_NAME=`echo ${KERNEL_IMAGE_BASE_NAME} | sed "s/${MACHINE}/${DTB_BASE_NAME}/g"`
+ DTB_SYMLINK_NAME=`echo ${KERNEL_IMAGE_SYMLINK_NAME} | sed "s/${MACHINE}/${DTB_BASE_NAME}/g"`
+ DTB_PATH="${B}/arch/${ARCH}/boot/dts/${DTB}"
+ if [ ! -e "${DTB_PATH}" ]; then
+ DTB_PATH="${B}/arch/${ARCH}/boot/${DTB}"
+ fi
+ install -d ${DEPLOYDIR}
+ install -m 0644 ${DTB_PATH} ${DEPLOYDIR}/${DTB_NAME}.dtb
+ cd ${DEPLOYDIR}
+ ln -sf ${DTB_NAME}.dtb ${DTB_SYMLINK_NAME}.dtb
+ cd -
+ done
+ fi
+}
+
+pkg_postinst_kernel-devicetree () {
+ cd /${KERNEL_IMAGEDEST}
+ for DTB_FILE in ${KERNEL_DEVICETREE}
+ do
+ DTB_BASE_NAME=`basename ${DTB_FILE} | awk -F "." '{print $1}'`
+ DTB_SYMLINK_NAME=`echo ${KERNEL_IMAGE_SYMLINK_NAME} | sed "s/${MACHINE}/${DTB_BASE_NAME}/g"`
+ update-alternatives --install /${KERNEL_IMAGEDEST}/${DTB_BASE_NAME}.dtb ${DTB_BASE_NAME}.dtb devicetree-${DTB_SYMLINK_NAME}.dtb ${KERNEL_PRIORITY} || true
+ done
+}
+
+pkg_postrm_kernel-devicetree () {
+ cd /${KERNEL_IMAGEDEST}
+ for DTB_FILE in ${KERNEL_DEVICETREE}
+ do
+ DTB_BASE_NAME=`basename ${DTB_FILE} | awk -F "." '{print $1}'`
+ DTB_SYMLINK_NAME=`echo ${KERNEL_IMAGE_SYMLINK_NAME} | sed "s/${MACHINE}/${DTB_BASE_NAME}/g"`
+ update-alternatives --remove ${DTB_BASE_NAME}.dtb devicetree-${DTB_SYMLINK_NAME}.dtb ${KERNEL_PRIORITY} || true
+ done
+}
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-alt-Add-vmalloc-384M-to-bootargs-of-DTS.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-alt-Add-vmalloc-384M-to-bootargs-of-DTS.patch
new file mode 100644
index 0000000..b7d23b2
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-alt-Add-vmalloc-384M-to-bootargs-of-DTS.patch
@@ -0,0 +1,26 @@
+From 7baf674a7c54d3241d796adf3249b304aa2aeaaf Mon Sep 17 00:00:00 2001
+From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+Date: Mon, 14 Jul 2014 11:44:41 +0900
+Subject: [PATCH] arm: shmobile: alt: Add 'vmalloc=384M' to bootargs of DTS
+
+Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+---
+ arch/arm/boot/dts/r8a7794-alt.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
+index 3e1afef..c85edda8 100644
+--- a/arch/arm/boot/dts/r8a7794-alt.dts
++++ b/arch/arm/boot/dts/r8a7794-alt.dts
+@@ -31,7 +31,7 @@
+ compatible = "renesas,alt", "renesas,r8a7794";
+
+ chosen {
+- bootargs = "console=ttySC10,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
++ bootargs = "console=ttySC10,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp vmalloc=384M";
+ };
+
+ memory@40000000 {
+--
+1.7.9.5
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-gose-Add-vmalloc-384M-to-bootargs-of-DTS.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-gose-Add-vmalloc-384M-to-bootargs-of-DTS.patch
new file mode 100644
index 0000000..5c282c8
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-gose-Add-vmalloc-384M-to-bootargs-of-DTS.patch
@@ -0,0 +1,26 @@
+From f1b6ab8592afda486b6c4c513f39dfbe2a4e8334 Mon Sep 17 00:00:00 2001
+From: Dien Pham <dien.pham.ry@rvc.renesas.com>
+Date: Fri, 15 Aug 2014 14:59:45 +0700
+Subject: [PATCH] arm gose Add vmalloc 384M to bootargs of DTS
+
+Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
+---
+ arch/arm/boot/dts/r8a7793-gose.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
+index 9c0108b..fbe3566 100644
+--- a/arch/arm/boot/dts/r8a7793-gose.dts
++++ b/arch/arm/boot/dts/r8a7793-gose.dts
+@@ -36,7 +36,7 @@
+ };
+
+ chosen {
+- bootargs = "console=ttySC6,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
++ bootargs = "console=ttySC6,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp vmalloc=384M";
+ };
+
+ memory@40000000 {
+--
+1.8.0.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-koelsch-Add-vmalloc-384M-to-bootargs-of-DTS.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-koelsch-Add-vmalloc-384M-to-bootargs-of-DTS.patch
new file mode 100644
index 0000000..d32019f
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-koelsch-Add-vmalloc-384M-to-bootargs-of-DTS.patch
@@ -0,0 +1,26 @@
+From 6f5df111b2cf5d4cb01922da7076a7ab238f5650 Mon Sep 17 00:00:00 2001
+From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+Date: Mon, 14 Jul 2014 11:43:03 +0900
+Subject: [PATCH 1/3] arm: shmobile: koelsch: Add 'vmalloc=384M' to bootargs of DTS
+
+Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index 5dc4f7d..d3619fc 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -39,7 +39,7 @@
+ };
+
+ chosen {
+- bootargs = "console=ttySC6,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
++ bootargs = "console=ttySC6,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp vmalloc=384M";
+ };
+
+ memory@40000000 {
+--
+1.7.9.5
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-lager-Add-vmalloc-384M-to-bootargs-of-DTS.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-lager-Add-vmalloc-384M-to-bootargs-of-DTS.patch
new file mode 100644
index 0000000..8d19c6d
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-arm-lager-Add-vmalloc-384M-to-bootargs-of-DTS.patch
@@ -0,0 +1,26 @@
+From 7a6b38f46db215055017a3288bd0d0bc6cfd5e8d Mon Sep 17 00:00:00 2001
+From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+Date: Mon, 14 Jul 2014 11:43:33 +0900
+Subject: [PATCH] arm: shmobile: lager: Add 'vmalloc=384M' to bootargs of DTS
+
+Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index 58b30a2..e0ac607 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -38,7 +38,7 @@
+ };
+
+ chosen {
+- bootargs = "console=ttySC6,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
++ bootargs = "console=ttySC6,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp vmalloc=384M";
+ };
+
+ memory@40000000 {
+--
+1.7.9.5
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-kernel-Silk-board-support.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-kernel-Silk-board-support.patch
new file mode 100644
index 0000000..12fb76c
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0001-kernel-Silk-board-support.patch
@@ -0,0 +1,1456 @@
+From f04a201ce9bfc04ca4b8b017116ca1cf9a313c9a Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Sat, 6 Dec 2014 03:29:15 +0300
+Subject: [linux-kernel][PATCH] arm: rmobile: Add SILK board support
+
+SILK is an entry level development board based on R-Car E2 SoC (R8A7794)
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/r8a7794-silk.dts | 360 ++++++++++
+ arch/arm/configs/shmobile_defconfig | 1 +
+ arch/arm/mach-shmobile/Kconfig | 6 +
+ arch/arm/mach-shmobile/Makefile | 1 +
+ arch/arm/mach-shmobile/Makefile.boot | 1 +
+ arch/arm/mach-shmobile/board-silk-reference.c | 995 ++++++++++++++++++++++++++
+ 7 files changed, 1365 insertions(+)
+ create mode 100644 arch/arm/boot/dts/r8a7794-silk.dts
+ create mode 100644 arch/arm/mach-shmobile/board-silk-reference.c
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 2a7b49b..f2b99db 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -178,6 +178,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
+ r8a7791-koelsch.dtb \
+ r8a7790-lager.dtb \
+ r8a7794-alt.dtb \
++ r8a7794-silk.dtb \
+ r8a7793-gose.dtb \
+ r8a7779-marzen.dtb
+ dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
+diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
+new file mode 100644
+index 0000000..cb69f6b
+--- /dev/null
++++ b/arch/arm/boot/dts/r8a7794-silk.dts
+@@ -0,0 +1,360 @@
++/*
++ * Device Tree Source for the Silk board
++ *
++ * Copyright (C) 2014 Renesas Electronics Corporation
++ * Copyright (C) 2014 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/*
++ * SSI-AK4643
++ *
++ * SW1: 1: AK4643
++ * 3: ADV7511
++ *
++ * this command is required when playback.
++ *
++ * # amixer set "LINEOUT Mixer DACL" on
++ * # amixer set "Digital" 200
++ * # amixer set "DVC Out" 50
++ */
++
++/dts-v1/;
++#include "r8a7794.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++
++/ {
++ model = "Silk";
++ compatible = "renesas,silk", "renesas,r8a7794";
++
++ aliases {
++ serial10 = &scif2;
++ };
++
++ chosen {
++ bootargs = "console=ttySC10,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp vmalloc=384M";
++ };
++
++ memory@40000000 {
++ device_type = "memory";
++ reg = <0 0x40000000 0 0x40000000>;
++ };
++
++ lbsc {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ };
++
++ gpio-keys {
++ compatible = "gpio-keys";
++
++ key-1 {
++ gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_1>;
++ label = "SW12";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-2 {
++ gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_2>;
++ label = "SW12";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-3 {
++ gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_3>;
++ label = "SW12";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-4 {
++ gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_4>;
++ label = "SW12";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-a {
++ gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_A>;
++ label = "SW3";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-b {
++ gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_B>;
++ label = "SW4";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-c {
++ gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_C>;
++ label = "SW6";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ };
++
++ vcc_sdhi0: regulator@0 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI0 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ vccq_sdhi0: regulator@1 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI0 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
++
++ vcc_sdhi1: regulator@2 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI1 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ vccq_sdhi1: regulator@3 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI1 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
++
++ fixedregulator3v3: fixedregulator@0 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-3.3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ hdmi_transmitter: adv7511 {
++ compatible = "adi,adv7511";
++ gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
++
++ adi,input-style = <0x02>;
++ adi,input-id = <0x00>;
++ adi,input-color-depth = <0x03>;
++ adi,sync-pulse = <0x03>;
++ adi,bit-justification = <0x01>;
++ adi,up-conversion = <0x00>;
++ adi,timing-generation-sequence = <0x00>;
++ adi,vsync-polarity = <0x02>;
++ adi,hsync-polarity = <0x02>;
++ adi,clock-delay = <0x03>;
++ };
++};
++
++&extal_clk {
++ clock-frequency = <20000000>;
++};
++
++&i2c1 {
++ pinctrl-0 = <&i2c1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++ clock-frequency = <400000>;
++
++ snd_codec: ak4643 {
++ #sound-dai-cells = <0>;
++ compatible = "asahi-kasei,ak4643";
++ reg = <0x12>;
++ };
++};
++
++&i2c8 {
++ status = "okay";
++ clock-frequency = <100000>;
++};
++
++&pfc {
++ pinctrl-0 = <&du_pins &usb0_pins &usb1_pins &sound_pins &sound_clk_pins
++ &vin0_pins>;
++ pinctrl-names = "default";
++
++ du_pins: du {
++ renesas,groups = "du0_rgb888", "du0_sync", "du0_clk_out",
++ "du1_rgb666", "du1_sync", "du1_clk_out";
++ renesas,function = "du";
++ };
++
++ i2c1_pins: i2c1 {
++ renesas,groups = "i2c1";
++ renesas,function = "i2c1";
++ };
++
++ scif2_pins: serial2 {
++ renesas,groups = "scif2_data";
++ renesas,function = "scif2";
++ };
++
++ ether_pins: ether {
++ renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
++ renesas,function = "eth";
++ };
++
++ qspi_pins: spi0 {
++ renesas,groups = "qspi_ctrl", "qspi_data4";
++ renesas,function = "qspi";
++ };
++
++ sdhi0_pins: sd0 {
++ renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
++ renesas,function = "sdhi0";
++ };
++
++ sdhi1_pins: sd1 {
++ renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
++ renesas,function = "sdhi1";
++ };
++
++ mmc0_pins: mmc0 {
++ renesas,groups = "mmc_data8", "mmc_ctrl";
++ renesas,function = "mmc";
++ };
++
++ usb0_pins: usb0 {
++ renesas,groups = "usb0";
++ renesas,function = "usb0";
++ };
++
++ usb1_pins: usb1 {
++ renesas,groups = "usb1";
++ renesas,function = "usb1";
++ };
++
++ vin0_pins: vin0 {
++ renesas,groups = "vin0_data8", "vin0_sync", "vin0_field",
++ "vin0_clkenb", "vin0_clk";
++ renesas,function = "vin0";
++ };
++
++ sound_pins: sound {
++ renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
++ renesas,function = "ssi";
++ };
++ sound_clk_pins: sound_clk {
++ renesas,groups = "audio_clk_c";
++ renesas,function = "audio_clk";
++ };
++};
++
++&ether {
++ phy-handle = <&phy1>;
++ renesas,ether-link-active-low;
++ status = "ok";
++
++ phy1: ethernet-phy@1 {
++ reg = <1>;
++ interrupt-parent = <&irqc0>;
++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++ micrel,led-mode = <1>;
++ };
++};
++
++&scif2 {
++ pinctrl-0 = <&scif2_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&qspi {
++ pinctrl-0 = <&qspi_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++
++ flash: flash@0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "spansion,s25fl512s";
++ reg = <0>;
++ spi-max-frequency = <30000000>;
++ spi-tx-bus-width = <4>;
++ spi-rx-bus-width = <4>;
++ m25p,fast-read;
++ spi-cpol;
++ spi-cpha;
++
++ partition@0 {
++ label = "loader";
++ reg = <0x00000000 0x00040000>;
++ read-only;
++ };
++ partition@40000 {
++ label = "user";
++ reg = <0x00040000 0x00400000>;
++ read-only;
++ };
++ partition@440000 {
++ label = "flash";
++ reg = <0x00440000 0x03bc0000>;
++ };
++ };
++};
++
++&sdhi0 {
++ pinctrl-0 = <&sdhi0_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&vcc_sdhi0>;
++ vqmmc-supply = <&vccq_sdhi0>;
++ cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
++ wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
++ status = "okay";
++};
++
++&sdhi1 {
++ pinctrl-0 = <&sdhi1_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&vcc_sdhi1>;
++ vqmmc-supply = <&vccq_sdhi1>;
++ cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
++ wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
++ status = "okay";
++};
++
++&mmcif0 {
++ pinctrl-0 = <&mmc0_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&fixedregulator3v3>;
++ bus-width = <8>;
++ non-removable;
++ status = "okay";
++};
+diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
+index efdc321..11237db 100644
+--- a/arch/arm/configs/shmobile_defconfig
++++ b/arch/arm/configs/shmobile_defconfig
+@@ -24,6 +24,7 @@ CONFIG_MACH_KOELSCH=y
+ CONFIG_MACH_LAGER=y
+ CONFIG_MACH_GOSE=y
+ CONFIG_MACH_ALT=y
++CONFIG_MACH_SILK=y
+ CONFIG_MACH_MARZEN=y
+ CONFIG_SHMOBILE_TIMER_HZ=100
+ CONFIG_ARM_LPAE=y
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index bb1b599..e2e00a9 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -82,6 +82,12 @@ config MACH_ALT
+ select MICREL_PHY if SH_ETH
+ select SND_SOC_AK4642 if SND_SIMPLE_CARD
+
++config MACH_SILK
++ bool "Silk board"
++ depends on ARCH_R8A7794
++ select MICREL_PHY if SH_ETH
++ select SND_SOC_AK4642 if SND_SIMPLE_CARD
++
+ config MACH_MARZEN
+ bool "MARZEN board"
+ depends on ARCH_R8A7779
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index 8d997e2..139f31c 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -76,6 +76,7 @@ obj-$(CONFIG_MACH_KOELSCH) += board-koelsch-reference.o
+ obj-$(CONFIG_MACH_LAGER) += board-lager-reference.o
+ obj-$(CONFIG_MACH_GOSE) += board-gose-reference.o
+ obj-$(CONFIG_MACH_ALT) += board-alt-reference.o
++obj-$(CONFIG_MACH_SILK) += board-silk-reference.o
+ obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o
+ else
+ obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
+diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
+index 58c2623..25105b2 100644
+--- a/arch/arm/mach-shmobile/Makefile.boot
++++ b/arch/arm/mach-shmobile/Makefile.boot
+@@ -15,6 +15,7 @@ loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000
+ loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000
+ loadaddr-$(CONFIG_MACH_GOSE) += 0x40008000
+ loadaddr-$(CONFIG_MACH_ALT) += 0x40008000
++loadaddr-$(CONFIG_MACH_SILK) += 0x40008000
+
+ __ZRELADDR := $(sort $(loadaddr-y))
+ zreladdr-y += $(__ZRELADDR)
+diff --git a/arch/arm/mach-shmobile/board-silk-reference.c b/arch/arm/mach-shmobile/board-silk-reference.c
+new file mode 100644
+index 0000000..090a4df
+--- /dev/null
++++ b/arch/arm/mach-shmobile/board-silk-reference.c
+@@ -0,0 +1,995 @@
++/*
++ * Silk board support - Reference DT implementation
++ *
++ * Copyright (C) 2014 Renesas Electronics Corporation
++ * Copyright (C) 2014 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
++ */
++
++#include <linux/dma-mapping.h>
++#include <linux/gpio.h>
++#include <linux/i2c.h>
++#include <linux/kernel.h>
++#include <linux/mfd/tmio.h>
++#include <linux/mmc/host.h>
++#include <linux/mmc/sh_mmcif.h>
++#include <linux/mmc/sh_mobile_sdhi.h>
++#include <linux/of_gpio.h>
++#include <linux/of_platform.h>
++#include <linux/platform_data/camera-rcar.h>
++#include <linux/platform_data/rcar-du.h>
++#include <linux/platform_data/usb-rcar-gen2-phy.h>
++#if IS_ENABLED(CONFIG_VIDEO_RENESAS_VSP1)
++#include <linux/platform_data/vsp1.h>
++#endif
++#include <linux/serial_sci.h>
++#include <linux/sh_dma.h>
++#include <linux/spi/flash.h>
++#include <linux/spi/sh_msiof.h>
++#include <linux/spi/spi.h>
++#include <linux/usb/phy.h>
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++#include <linux/usb/renesas_usbhs.h>
++#endif
++#include <media/soc_camera.h>
++#include <asm/mach/arch.h>
++#include <sound/rcar_snd.h>
++#include <sound/simple_card.h>
++
++#include "clock.h"
++#include "common.h"
++#include "dma-register.h"
++#include "irqs.h"
++#include "r8a7794.h"
++#include "rcar-gen2.h"
++
++/* DU */
++static struct rcar_du_encoder_data silk_du_encoders[] = {
++ {
++ .type = RCAR_DU_ENCODER_HDMI,
++ .output = RCAR_DU_OUTPUT_DPAD0,
++ },
++ {
++ .type = RCAR_DU_ENCODER_NONE,
++ .output = RCAR_DU_OUTPUT_LVDS0,
++ .connector.lvds.panel = {
++ .width_mm = 210,
++ .height_mm = 158,
++ .mode = {
++ .clock = 65000,
++ .hdisplay = 1024,
++ .hsync_start = 1048,
++ .hsync_end = 1184,
++ .htotal = 1344,
++ .vdisplay = 768,
++ .vsync_start = 771,
++ .vsync_end = 777,
++ .vtotal = 806,
++ .flags = 0,
++ },
++ },
++ },
++ {
++ .type = RCAR_DU_ENCODER_VGA,
++ .output = RCAR_DU_OUTPUT_DPAD1,
++ },
++};
++
++static struct rcar_du_crtc_data silk_du_crtcs[] = {
++ {
++ .exclk = 148500000,
++ .init_conn_type = DRM_MODE_CONNECTOR_HDMIA,
++ },
++ {
++ .exclk = 74250000,
++ .init_conn_type = DRM_MODE_CONNECTOR_VGA,
++ },
++};
++
++static int silk_lvds_backlight_on(void)
++{
++ return 0;
++}
++
++static int silk_lvds_backlight_off(void)
++{
++ return 0;
++}
++
++static struct rcar_du_platform_data silk_du_pdata = {
++ .encoders = silk_du_encoders,
++ .num_encoders = ARRAY_SIZE(silk_du_encoders),
++ .crtcs = silk_du_crtcs,
++ .num_crtcs = ARRAY_SIZE(silk_du_crtcs),
++#ifdef CONFIG_DRM_FBDEV_CRTC
++ .fbdev_crtc = 0,
++#endif
++ .backlight_on = silk_lvds_backlight_on,
++ .backlight_off = silk_lvds_backlight_off,
++ .i2c_ch = 1,
++};
++
++static const struct resource du_resources[] __initconst = {
++ DEFINE_RES_MEM(0xfeb00000, 0x40000),
++ DEFINE_RES_IRQ(gic_spi(256)),
++ DEFINE_RES_IRQ(gic_spi(268)),
++};
++
++static void __init silk_add_du_device(void)
++{
++ struct platform_device_info info = {
++ .name = "rcar-du-r8a7794",
++ .id = -1,
++ .res = du_resources,
++ .num_res = ARRAY_SIZE(du_resources),
++ .data = &silk_du_pdata,
++ .size_data = sizeof(silk_du_pdata),
++ .dma_mask = DMA_BIT_MASK(32),
++ };
++
++ platform_device_register_full(&info);
++}
++
++/* Sound */
++static struct rsnd_ssi_platform_info rsnd_ssi[] = {
++ RSND_SSI(AUDIOPP_DMAC_SLAVE_CMD0_TO_SSI0, gic_spi(370), 0),
++ RSND_SSI(AUDIOPP_DMAC_SLAVE_SSI1_TO_SCU2, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
++};
++
++static struct rsnd_src_platform_info rsnd_src[3] = {
++ RSND_SRC_UNUSED,
++ RSND_SRC(0, AUDIO_DMAC_SLAVE_SCU1_TX, gic_spi(353)),
++ RSND_SRC(0, AUDIO_DMAC_SLAVE_CMD1_TO_MEM, gic_spi(354)),
++};
++
++static struct rsnd_dvc_platform_info rsnd_dvc[2] = {
++};
++
++static struct rsnd_dai_platform_info rsnd_dai = {
++ .playback = { .ssi = &rsnd_ssi[0], .src = &rsnd_src[1], .dvc = &rsnd_dvc[0], },
++ .capture = { .ssi = &rsnd_ssi[1], .src = &rsnd_src[2], .dvc = &rsnd_dvc[1], },
++};
++
++static struct rcar_snd_info rsnd_info = {
++ .flags = RSND_GEN2,
++ .ssi_info = rsnd_ssi,
++ .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
++ .src_info = rsnd_src,
++ .src_info_nr = ARRAY_SIZE(rsnd_src),
++ .dvc_info = rsnd_dvc,
++ .dvc_info_nr = ARRAY_SIZE(rsnd_dvc),
++ .dai_info = &rsnd_dai,
++ .dai_info_nr = 1,
++};
++
++static struct asoc_simple_card_info rsnd_card_info = {
++ .name = "SSI01-AK4643",
++ .codec = "ak4642-codec.1-0012",
++ .platform = "rcar_sound",
++ .daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS,
++ .cpu_dai = {
++ .name = "rcar_sound",
++ },
++ .codec_dai = {
++ .name = "ak4642-hifi",
++ .sysclk = 12288000,
++ },
++};
++
++static void __init silk_add_rsnd_device(void)
++{
++ struct resource rsnd_resources[] = {
++ [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
++ [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
++ [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
++ [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
++ };
++
++ struct platform_device_info cardinfo = {
++ .parent = &platform_bus,
++ .name = "asoc-simple-card",
++ .id = -1,
++ .data = &rsnd_card_info,
++ .size_data = sizeof(struct asoc_simple_card_info),
++ .dma_mask = DMA_BIT_MASK(32),
++ };
++
++ platform_device_register_resndata(
++ &platform_bus, "rcar_sound", -1,
++ rsnd_resources, ARRAY_SIZE(rsnd_resources),
++ &rsnd_info, sizeof(rsnd_info));
++
++ platform_device_register_full(&cardinfo);
++}
++
++
++/*
++ * This is a really crude hack to provide clkdev support to platform
++ * devices until they get moved to DT.
++ */
++static const struct clk_name clk_names[] __initconst = {
++ { "cmt0", NULL, "sh_cmt.0" },
++ { "scifa0", NULL, "sh-sci.0" },
++ { "scifa1", NULL, "sh-sci.1" },
++ { "scifb0", NULL, "sh-sci.2" },
++ { "scifb1", NULL, "sh-sci.3" },
++ { "scifb2", NULL, "sh-sci.4" },
++ { "scifa2", NULL, "sh-sci.5" },
++ { "scif0", NULL, "sh-sci.6" },
++ { "scif1", NULL, "sh-sci.7" },
++ { "hscif0", NULL, "sh-sci.8" },
++ { "hscif1", NULL, "sh-sci.9" },
++ { "scif2", NULL, "sh-sci.10" },
++ { "scif3", NULL, "sh-sci.11" },
++ { "scif4", NULL, "sh-sci.12" },
++ { "scif5", NULL, "sh-sci.13" },
++ { "scifa3", NULL, "sh-sci.14" },
++ { "scifa4", NULL, "sh-sci.15" },
++ { "scifa5", NULL, "sh-sci.16" },
++ { "hscif2", NULL, "sh-sci.17" },
++ { "du0", "du.0", "rcar-du-r8a7794" },
++ { "du1", "du.1", "rcar-du-r8a7794" },
++ { "hsusb", NULL, "usb_phy_rcar_gen2" },
++ { "ssi0", "ssi.0", "rcar_sound" },
++ { "ssi1", "ssi.1", "rcar_sound" },
++ { "src1", "src.1", "rcar_sound" },
++ { "src2", "src.2", "rcar_sound" },
++ { "dvc0", "dvc.0", "rcar_sound" },
++ { "dvc1", "dvc.1", "rcar_sound" },
++ { "vin0", NULL, "r8a7794-vin.0" },
++ { "vsps", NULL, NULL },
++#if IS_ENABLED(CONFIG_VIDEO_RENESAS_VSP1)
++ { "vsp1-du0", NULL, "vsp1.2" },
++#else
++ { "vsp1-du0", NULL, NULL },
++#endif
++ { "vpc0", NULL, "vpc1" },
++ { "2ddmac", NULL, "tddmac" },
++ { "fdp0", NULL, "fdp0" },
++ { "pvrsrvkm", NULL, "pvrsrvkm" },
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++ { "hsusb", NULL, "renesas_usbhs" },
++#else
++ { "ehci", NULL, "pci-rcar-gen2.0" },
++#endif
++};
++
++/*
++ * This is a really crude hack to work around core platform clock issues
++ */
++static const struct clk_name clk_enables[] __initconst = {
++ { "ether", NULL, "ee700000.ethernet" },
++ { "i2c1", NULL, "e6518000.i2c" },
++ { "mmcif0", NULL, "ee200000.mmc" },
++ { "sdhi0", NULL, "ee100000.sd" },
++ { "sdhi1", NULL, "ee140000.sd" },
++ { "ehci", NULL, "pci-rcar-gen2.1" },
++ { "vcp0", NULL, "vcp1" },
++ { "dmal", NULL, "sh-dma-engine.0" },
++ { "sys-dmac1", NULL, "sh-dma-engine.2" },
++ { "sys-dmac0", NULL, "sh-dma-engine.3" },
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++ { "usbdmac0", NULL, "sh-dma-engine.4" },
++#endif
++ { "ipmmu_gp", NULL, "ipmmu_gp" },
++};
++
++#define DMAE_CHANNEL(a, b) \
++{ \
++ .offset = (a) - 0x20, \
++ .dmars = (a) - 0x20 + 0x40, \
++ .chclr_bit = (b), \
++ .chclr_offset = 0x80 - 0x20, \
++}
++
++/* Sys-DMAC */
++#define SYS_DMAC_SLAVE(_id, _bit, _addr, toffset, roffset, t, r) \
++{ \
++ .slave_id = SYS_DMAC_SLAVE_## _id ##_TX, \
++ .addr = _addr + toffset, \
++ .chcr = CHCR_TX(XMIT_SZ_## _bit ##BIT), \
++ .mid_rid = t, \
++}, { \
++ .slave_id = SYS_DMAC_SLAVE_## _id ##_RX, \
++ .addr = _addr + roffset, \
++ .chcr = CHCR_RX(XMIT_SZ_## _bit ##BIT), \
++ .mid_rid = r, \
++}
++
++#define SYS_DMAC_SLAVE_TX(_id, _bit, _addr, toffset, roffset, t, r) \
++{ \
++ .slave_id = SYS_DMAC_SLAVE_## _id ##_TX, \
++ .addr = _addr + toffset, \
++ .chcr = CHCR_TX(XMIT_SZ_## _bit ##BIT), \
++ .mid_rid = t, \
++}
++
++static const struct sh_dmae_slave_config r8a7794_sys_dmac_slaves[] = {
++ SYS_DMAC_SLAVE(MMCIF0, 32, 0xee200000, 0x34, 0x34, 0xd1, 0xd2),
++ SYS_DMAC_SLAVE(SDHI0, 256, 0xee100000, 0x60, 0x2060, 0xcd, 0xce),
++ SYS_DMAC_SLAVE(SDHI1, 256, 0xee140000, 0x30, 0x2030, 0xc1, 0xc2),
++ SYS_DMAC_SLAVE(SCIF0, 8, 0xe6e60000, 0xc, 0x14, 0x29, 0x2a),
++ SYS_DMAC_SLAVE(SCIF1, 8, 0xe6e68000, 0xc, 0x14, 0x2d, 0x2e),
++ SYS_DMAC_SLAVE(SCIF2, 8, 0xe6e58000, 0xc, 0x14, 0x2b, 0x2c),
++ SYS_DMAC_SLAVE(SCIF3, 8, 0xe6ea8000, 0xc, 0x14, 0x2f, 0x30),
++ SYS_DMAC_SLAVE(SCIF4, 8, 0xe6ee0000, 0xc, 0x14, 0xfb, 0xfc),
++ SYS_DMAC_SLAVE(SCIF5, 8, 0xe6ee8000, 0xc, 0x14, 0xfd, 0xfe),
++ SYS_DMAC_SLAVE(SCIFA0, 8, 0xe6c40000, 0x20, 0x24, 0x21, 0x22),
++ SYS_DMAC_SLAVE(SCIFA1, 8, 0xe6c50000, 0x20, 0x24, 0x25, 0x26),
++ SYS_DMAC_SLAVE(SCIFA2, 8, 0xe6c60000, 0x20, 0x24, 0x27, 0x28),
++ SYS_DMAC_SLAVE(SCIFA3, 8, 0xe6c70000, 0x20, 0x24, 0x1b, 0x1c),
++ SYS_DMAC_SLAVE(SCIFA4, 8, 0xe6c78000, 0x20, 0x24, 0x1f, 0x20),
++ SYS_DMAC_SLAVE(SCIFA5, 8, 0xe6c80000, 0x20, 0x24, 0x23, 0x24),
++ SYS_DMAC_SLAVE(SCIFB0, 8, 0xe6c20000, 0x40, 0x60, 0x3d, 0x3e),
++ SYS_DMAC_SLAVE(SCIFB1, 8, 0xe6c30000, 0x40, 0x60, 0x19, 0x1a),
++ SYS_DMAC_SLAVE(SCIFB2, 8, 0xe6ce0000, 0x40, 0x60, 0x1d, 0x1e),
++ SYS_DMAC_SLAVE(HSCIF0, 8, 0xe62c0000, 0xc, 0x14, 0x39, 0x3a),
++ SYS_DMAC_SLAVE(HSCIF1, 8, 0xe62c8000, 0xc, 0x14, 0x4d, 0x4e),
++ SYS_DMAC_SLAVE(HSCIF2, 8, 0xe62d0000, 0xc, 0x14, 0x3b, 0x3c),
++ SYS_DMAC_SLAVE(MSIOF0, 32, 0xe7e20000, 0x50, 0x60, 0x51, 0x52),
++ SYS_DMAC_SLAVE(MSIOF1, 32, 0xe7e10000, 0x50, 0x60, 0x55, 0x56),
++ SYS_DMAC_SLAVE(MSIOF2, 32, 0xe7e00000, 0x50, 0x60, 0x41, 0x42),
++};
++
++static const struct sh_dmae_channel r8a7794_sys_dmac_channels[] = {
++ DMAE_CHANNEL(0x8000, 0),
++ DMAE_CHANNEL(0x8080, 1),
++ DMAE_CHANNEL(0x8100, 2),
++ DMAE_CHANNEL(0x8180, 3),
++ DMAE_CHANNEL(0x8200, 4),
++ DMAE_CHANNEL(0x8280, 5),
++ DMAE_CHANNEL(0x8300, 6),
++ DMAE_CHANNEL(0x8380, 7),
++ DMAE_CHANNEL(0x8400, 8),
++ DMAE_CHANNEL(0x8480, 9),
++ DMAE_CHANNEL(0x8500, 10),
++ DMAE_CHANNEL(0x8580, 11),
++ DMAE_CHANNEL(0x8600, 12),
++ DMAE_CHANNEL(0x8680, 13),
++ DMAE_CHANNEL(0x8700, 14),
++};
++
++static struct sh_dmae_pdata r8a7794_sys_dmac_platform_data = {
++ .slave = r8a7794_sys_dmac_slaves,
++ .slave_num = ARRAY_SIZE(r8a7794_sys_dmac_slaves),
++ .channel = r8a7794_sys_dmac_channels,
++ .channel_num = ARRAY_SIZE(r8a7794_sys_dmac_channels),
++ .ts_low_shift = TS_LOW_SHIFT,
++ .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
++ .ts_high_shift = TS_HI_SHIFT,
++ .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
++ .ts_shift = dma_ts_shift,
++ .ts_shift_num = ARRAY_SIZE(dma_ts_shift),
++ .dmaor_init = DMAOR_DME,
++ .chclr_present = 1,
++ .chclr_bitwise = 1,
++ .fourty_bits_addr = 1,
++};
++
++static struct resource r8a7794_sys_dmac_resources[] = {
++ /* Channel registers and DMAOR for low */
++ DEFINE_RES_MEM(0xe6700020, 0x8763 - 0x20),
++ DEFINE_RES_IRQ(gic_spi(197)),
++ DEFINE_RES_NAMED(gic_spi(200), 15, NULL, IORESOURCE_IRQ),
++
++ /* Channel registers and DMAOR for high */
++ DEFINE_RES_MEM(0xe6720020, 0x8763 - 0x20),
++ DEFINE_RES_IRQ(gic_spi(220)),
++ DEFINE_RES_NAMED(gic_spi(216), 4, NULL, IORESOURCE_IRQ),
++ DEFINE_RES_NAMED(gic_spi(308), 11, NULL, IORESOURCE_IRQ),
++};
++
++#define r8a7794_register_sys_dmac(id) \
++ platform_device_register_resndata( \
++ &platform_bus, "sh-dma-engine", 2 + id, \
++ &r8a7794_sys_dmac_resources[id * 3], id * 1 + 3, \
++ &r8a7794_sys_dmac_platform_data, \
++ sizeof(r8a7794_sys_dmac_platform_data))
++
++static void __init silk_add_dmac_prototype(void)
++{
++ r8a7794_register_sys_dmac(0);
++ r8a7794_register_sys_dmac(1);
++}
++
++static struct sh_mmcif_plat_data mmcif0_pdata = {
++ .caps = MMC_CAP_4_BIT_DATA |
++ MMC_CAP_8_BIT_DATA |
++ MMC_CAP_NONREMOVABLE,
++ .ccs_unsupported = true,
++ .clk_ctrl2_present = true,
++ .slave_id_tx = SYS_DMAC_SLAVE_MMCIF0_TX,
++ .slave_id_rx = SYS_DMAC_SLAVE_MMCIF0_RX,
++};
++
++static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
++ .dma_slave_tx = SYS_DMAC_SLAVE_SDHI0_TX,
++ .dma_slave_rx = SYS_DMAC_SLAVE_SDHI0_RX,
++ .dma_rx_offset = 0x2000,
++
++ .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
++ MMC_CAP_POWER_OFF_CARD,
++ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
++};
++
++static struct sh_mobile_sdhi_info sdhi1_info __initdata = {
++ .dma_slave_tx = SYS_DMAC_SLAVE_SDHI1_TX,
++ .dma_slave_rx = SYS_DMAC_SLAVE_SDHI1_RX,
++ .dma_rx_offset = 0x2000,
++
++ .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
++ MMC_CAP_POWER_OFF_CARD,
++ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
++};
++
++/* SCIF */
++#define SCIF_PD(scif_type, index, scif_index) \
++static struct plat_sci_port scif##index##_platform_data = { \
++ .type = PORT_##scif_type, \
++ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
++ .scscr = SCSCR_RE | SCSCR_TE, \
++ .dma_slave_tx = SYS_DMAC_SLAVE_##scif_type##scif_index##_TX, \
++ .dma_slave_rx = SYS_DMAC_SLAVE_##scif_type##scif_index##_RX, \
++}
++
++#define PDATA_SCIF(index, baseaddr, irq, i) SCIF_PD(SCIF, index, i)
++#define PDATA_SCIFA(index, baseaddr, irq, i) SCIF_PD(SCIFA, index, i)
++#define PDATA_SCIFB(index, baseaddr, irq, i) SCIF_PD(SCIFB, index, i)
++#define PDATA_HSCIF(index, baseaddr, irq, i) SCIF_PD(HSCIF, index, i)
++
++PDATA_SCIFA(0, 0xe6c40000, gic_spi(144), 0); /* SCIFA0 */
++PDATA_SCIFA(1, 0xe6c50000, gic_spi(145), 1); /* SCIFA1 */
++PDATA_SCIFB(2, 0xe6c20000, gic_spi(148), 0); /* SCIFB0 */
++PDATA_SCIFB(3, 0xe6c30000, gic_spi(149), 1); /* SCIFB1 */
++PDATA_SCIFB(4, 0xe6ce0000, gic_spi(150), 2); /* SCIFB2 */
++PDATA_SCIFA(5, 0xe6c60000, gic_spi(151), 2); /* SCIFA2 */
++PDATA_SCIF(6, 0xe6e60000, gic_spi(152), 0); /* SCIF0 */
++PDATA_SCIF(7, 0xe6e68000, gic_spi(153), 1); /* SCIF1 */
++PDATA_HSCIF(8, 0xe62c0000, gic_spi(154), 0); /* HSCIF0 */
++PDATA_HSCIF(9, 0xe62c8000, gic_spi(155), 1); /* HSCIF1 */
++PDATA_SCIF(10, 0xe6e58000, gic_spi(22), 2); /* SCIF2 */
++PDATA_SCIF(11, 0xe6ea8000, gic_spi(23), 3); /* SCIF3 */
++PDATA_SCIF(12, 0xe6ee0000, gic_spi(24), 4); /* SCIF4 */
++PDATA_SCIF(13, 0xe6ee8000, gic_spi(25), 5); /* SCIF5 */
++PDATA_SCIFA(14, 0xe6c70000, gic_spi(29), 3); /* SCIFA3 */
++PDATA_SCIFA(15, 0xe6c78000, gic_spi(30), 4); /* SCIFA4 */
++PDATA_SCIFA(16, 0xe6c80000, gic_spi(31), 5); /* SCIFA5 */
++PDATA_HSCIF(17, 0xe6cd0000, gic_spi(21), 2); /* HSCIF2 */
++
++#define SCIF_AD(scif_type, index, baseaddr) \
++ OF_DEV_AUXDATA("renesas," scif_type "-r8a7794", baseaddr, \
++ "sh-sci." # index, &scif##index##_platform_data)
++
++#define AUXDATA_SCIF(index, baseaddr, irq) SCIF_AD("scif", index, baseaddr)
++#define AUXDATA_SCIFA(index, baseaddr, irq) SCIF_AD("scifa", index, baseaddr)
++#define AUXDATA_SCIFB(index, baseaddr, irq) SCIF_AD("scifb", index, baseaddr)
++#define AUXDATA_HSCIF(index, baseaddr, irq) SCIF_AD("hscif", index, baseaddr)
++
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++/* USB-DMAC */
++static const struct sh_dmae_channel usb_dmac_channels[] = {
++ {
++ .offset = 0,
++ }, {
++ .offset = 0x20,
++ },
++};
++
++static const struct sh_dmae_slave_config usb_dmac_slaves[] = {
++ {
++ .slave_id = USB_DMAC_SLAVE_USBHS_TX,
++ .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_32BYTE),
++ }, {
++ .slave_id = USB_DMAC_SLAVE_USBHS_RX,
++ .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_32BYTE),
++ },
++};
++
++static struct sh_dmae_pdata usb_dmac_platform_data = {
++ .slave = usb_dmac_slaves,
++ .slave_num = ARRAY_SIZE(usb_dmac_slaves),
++ .channel = usb_dmac_channels,
++ .channel_num = ARRAY_SIZE(usb_dmac_channels),
++ .ts_low_shift = USBTS_LOW_SHIFT,
++ .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
++ .ts_high_shift = USBTS_HI_SHIFT,
++ .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
++ .ts_shift = dma_usbts_shift,
++ .ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
++ .dmaor_init = DMAOR_DME,
++ .chcr_offset = 0x14,
++ .chcr_ie_bit = 1 << 5,
++ .dmaor_is_32bit = 1,
++ .needs_tend_set = 1,
++ .no_dmars = 1,
++ .slave_only = 1,
++};
++
++static struct resource usb_dmac_resources[] = {
++ DEFINE_RES_MEM(0xe65a0020, 0x44), /* Channel registers and DMAOR */
++ DEFINE_RES_MEM(0xe65a0000, 0x14), /* VCR/SWR/DMICR */
++ DEFINE_RES_IRQ(gic_spi(109)),
++};
++
++static void __init silk_add_usb_dmac_prototype(void)
++{
++ platform_device_register_resndata(&platform_bus, "sh-dma-engine",
++ 4,
++ usb_dmac_resources,
++ ARRAY_SIZE(usb_dmac_resources),
++ &usb_dmac_platform_data,
++ sizeof(usb_dmac_platform_data));
++}
++
++/* USBHS */
++static const struct resource usbhs_resources[] __initconst = {
++ DEFINE_RES_MEM(0xe6590000, 0x100),
++ DEFINE_RES_IRQ(gic_spi(107)),
++};
++
++struct usbhs_private {
++ struct renesas_usbhs_platform_info info;
++ struct usb_phy *phy;
++ int pwen_gpio;
++};
++
++#define usbhs_get_priv(pdev) \
++ container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
++
++static int usbhs_power_ctrl(struct platform_device *pdev,
++ void __iomem *base, int enable)
++{
++ struct usbhs_private *priv = usbhs_get_priv(pdev);
++
++ if (!priv->phy)
++ return -ENODEV;
++
++ if (enable) {
++ int retval = usb_phy_init(priv->phy);
++
++ if (!retval)
++ retval = usb_phy_set_suspend(priv->phy, 0);
++ return retval;
++ }
++
++ usb_phy_set_suspend(priv->phy, 1);
++ usb_phy_shutdown(priv->phy);
++ return 0;
++}
++
++static int usbhs_hardware_init(struct platform_device *pdev)
++{
++ struct usbhs_private *priv = usbhs_get_priv(pdev);
++ struct usb_phy *phy;
++ int ret;
++ struct device_node *np;
++
++ np = of_find_node_by_path("/gpio@e6055000");
++ if (np) {
++ priv->pwen_gpio = of_get_gpio(np, 24);
++ of_node_put(np);
++ } else {
++ pr_warn("Error: Unable to get PWEN GPIO line\n");
++ ret = -ENOTSUPP;
++ goto error2;
++ }
++
++ phy = usb_get_phy_dev(&pdev->dev, 0);
++ if (IS_ERR(phy)) {
++ ret = PTR_ERR(phy);
++ goto error;
++ }
++
++ priv->phy = phy;
++ return 0;
++ error:
++ gpio_free(priv->pwen_gpio);
++ error2:
++ return ret;
++}
++
++static int usbhs_hardware_exit(struct platform_device *pdev)
++{
++ struct usbhs_private *priv = usbhs_get_priv(pdev);
++
++ if (!priv->phy)
++ return 0;
++
++ usb_put_phy(priv->phy);
++ priv->phy = NULL;
++ gpio_free(priv->pwen_gpio);
++ return 0;
++}
++
++static int usbhs_get_id(struct platform_device *pdev)
++{
++ return USBHS_GADGET;
++}
++
++static int usbhs_get_vbus(struct platform_device *pdev)
++{
++ return 0;
++}
++
++static u32 lager_usbhs_pipe_type[] = {
++ USB_ENDPOINT_XFER_CONTROL,
++ USB_ENDPOINT_XFER_ISOC,
++ USB_ENDPOINT_XFER_ISOC,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_INT,
++ USB_ENDPOINT_XFER_INT,
++ USB_ENDPOINT_XFER_INT,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++};
++
++static struct usbhs_private usbhs_priv __initdata = {
++ .info = {
++ .platform_callback = {
++ .power_ctrl = usbhs_power_ctrl,
++ .hardware_init = usbhs_hardware_init,
++ .hardware_exit = usbhs_hardware_exit,
++ .get_id = usbhs_get_id,
++ .get_vbus = usbhs_get_vbus,
++ },
++ .driver_param = {
++ .buswait_bwait = 4,
++ .pipe_type = lager_usbhs_pipe_type,
++ .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
++ .d0_rx_id = USB_DMAC_SLAVE_USBHS_RX,
++ .d1_tx_id = USB_DMAC_SLAVE_USBHS_TX,
++ .usb_dmac_xfer_size = 32,
++ },
++ }
++};
++
++static void __init silk_register_usbhs(void)
++{
++ usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
++ platform_device_register_resndata(&platform_bus,
++ "renesas_usbhs", -1,
++ usbhs_resources,
++ ARRAY_SIZE(usbhs_resources),
++ &usbhs_priv.info,
++ sizeof(usbhs_priv.info));
++}
++
++#else
++/* Internal PCI0 */
++static const struct resource pci0_resources[] __initconst = {
++ DEFINE_RES_MEM(0xee090000, 0x10000), /* CFG */
++ DEFINE_RES_MEM(0xee080000, 0x10000), /* MEM */
++ DEFINE_RES_IRQ(gic_spi(108)),
++};
++
++static const struct platform_device_info pci0_info __initconst = {
++ .parent = &platform_bus,
++ .name = "pci-rcar-gen2",
++ .id = 0,
++ .res = pci0_resources,
++ .num_res = ARRAY_SIZE(pci0_resources),
++ .dma_mask = DMA_BIT_MASK(32),
++};
++
++static void __init silk_add_usb0_device(void)
++{
++ usb_bind_phy("pci-rcar-gen2.0", 0, "usb_phy_rcar_gen2");
++ platform_device_register_full(&pci0_info);
++}
++#endif
++/* USBHS PHY */
++static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++ .chan0_pci = 0, /* Channel 0 is USBHS */
++#else
++ .chan0_pci = 1, /* Channel 0 is PCI USB */
++#endif
++ .chan2_pci = 1, /* Channel 2 is PCI USB */
++ .gpio_vbus = 857,
++ .wakeup = true,
++};
++
++static const struct resource usbhs_phy_resources[] __initconst = {
++ DEFINE_RES_MEM(0xe6590100, 0x100),
++};
++
++/* Internal PCI1 */
++static const struct resource pci1_resources[] __initconst = {
++ DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
++ DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
++ DEFINE_RES_IRQ(gic_spi(113)),
++};
++
++static const struct platform_device_info pci1_info __initconst = {
++ .parent = &platform_bus,
++ .name = "pci-rcar-gen2",
++ .id = 1,
++ .res = pci1_resources,
++ .num_res = ARRAY_SIZE(pci1_resources),
++ .dma_mask = DMA_BIT_MASK(32),
++};
++
++static void __init silk_add_usb1_device(void)
++{
++ usb_bind_phy("pci-rcar-gen2.1", 0, "usb_phy_rcar_gen2");
++ platform_device_register_full(&pci1_info);
++}
++
++/* POWER IC */
++static struct i2c_board_info poweric_i2c[] = {
++ { I2C_BOARD_INFO("da9063", 0x58), },
++};
++
++static void silk_restart(char mode, const char *cmd)
++{
++ struct i2c_adapter *adap;
++ struct i2c_client *client;
++ u8 val;
++ int busnum = 8;
++
++ adap = i2c_get_adapter(busnum);
++ if (!adap) {
++ pr_err("failed to get adapter i2c%d\n", busnum);
++ return;
++ }
++
++ client = i2c_new_device(adap, &poweric_i2c[0]);
++ if (!client)
++ pr_err("failed to register %s to i2c%d\n",
++ poweric_i2c[0].type, busnum);
++
++ i2c_put_adapter(adap);
++
++ val = i2c_smbus_read_byte_data(client, 0x13);
++
++ if (val < 0)
++ pr_err("couldn't access da9063\n");
++
++ val |= 0x02;
++
++ i2c_smbus_write_byte_data(client, 0x13, val);
++}
++
++/* VIN */
++static const struct resource vin_resources[] __initconst = {
++ /* VIN0 */
++ DEFINE_RES_MEM(0xe6ef0000, 0x1000),
++ DEFINE_RES_IRQ(gic_spi(188)),
++};
++
++static void __init silk_add_vin_device(unsigned idx,
++ struct rcar_vin_platform_data *pdata)
++{
++ struct platform_device_info vin_info = {
++ .parent = &platform_bus,
++ .name = "r8a7794-vin",
++ .id = idx,
++ .res = &vin_resources[idx * 2],
++ .num_res = 2,
++ .dma_mask = DMA_BIT_MASK(32),
++ .data = pdata,
++ .size_data = sizeof(*pdata),
++ };
++
++ BUG_ON(idx > 1);
++
++ platform_device_register_full(&vin_info);
++}
++
++#define SILK_CAMERA(idx, name, addr, pdata, flag) \
++static struct i2c_board_info i2c_cam##idx##_device = { \
++ I2C_BOARD_INFO(name, addr), \
++}; \
++ \
++static struct rcar_vin_platform_data vin##idx##_pdata = { \
++ .flags = flag, \
++}; \
++ \
++static struct soc_camera_link cam##idx##_link = { \
++ .bus_id = idx, \
++ .board_info = &i2c_cam##idx##_device, \
++ .i2c_adapter_id = 1, \
++ .module_name = name, \
++ .priv = pdata, \
++}
++
++SILK_CAMERA(0, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
++
++static void __init silk_add_camera0_device(void)
++{
++ platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0,
++ &cam0_link, sizeof(cam0_link));
++ silk_add_vin_device(0, &vin0_pdata);
++}
++
++/* VSP1 */
++#if IS_ENABLED(CONFIG_VIDEO_RENESAS_VSP1)
++static const struct vsp1_platform_data silk_vsps_pdata __initconst = {
++ .features = 0,
++ .rpf_count = 5,
++ .uds_count = 3,
++ .wpf_count = 4,
++};
++
++static const struct vsp1_platform_data silk_vspd0_pdata __initconst = {
++ .features = VSP1_HAS_LIF,
++ .rpf_count = 4,
++ .uds_count = 1,
++ .wpf_count = 4,
++};
++
++static const struct vsp1_platform_data * const silk_vsp1_pdata[] __initconst
++ = {
++ &silk_vsps_pdata,
++ &silk_vspd0_pdata,
++};
++
++static const struct resource vsp1_1_resources[] __initconst = {
++ DEFINE_RES_MEM(0xfe928000, 0x8000),
++ DEFINE_RES_IRQ(gic_spi(267)),
++};
++
++static const struct resource vsp1_2_resources[] __initconst = {
++ DEFINE_RES_MEM(0xfe930000, 0x8000),
++ DEFINE_RES_IRQ(gic_spi(246)),
++};
++
++static const struct resource * const vsp1_resources[] __initconst = {
++ vsp1_1_resources,
++ vsp1_2_resources,
++};
++
++static void __init silk_add_vsp1_devices(void)
++{
++ struct platform_device_info info = {
++ .name = "vsp1",
++ .size_data = sizeof(*silk_vsp1_pdata[0]),
++ .num_res = 2,
++ .dma_mask = DMA_BIT_MASK(32),
++ };
++ unsigned int i;
++
++ for (i = 1; i < ARRAY_SIZE(vsp1_resources); ++i) {
++ info.id = i + 1;
++ info.data = silk_vsp1_pdata[i];
++ info.res = vsp1_resources[i];
++
++ platform_device_register_full(&info);
++ }
++}
++#endif
++
++/* MSIOF */
++static struct sh_msiof_spi_info msiof0_info = {
++ .rx_fifo_override = 256,
++ .num_chipselect = 1,
++ .dma_tx_id = SYS_DMAC_SLAVE_MSIOF0_TX,
++ .dma_rx_id = SYS_DMAC_SLAVE_MSIOF0_RX,
++};
++
++static struct sh_msiof_spi_info msiof1_info = {
++ .rx_fifo_override = 256,
++ .num_chipselect = 1,
++ .dma_tx_id = SYS_DMAC_SLAVE_MSIOF1_TX,
++ .dma_rx_id = SYS_DMAC_SLAVE_MSIOF1_RX,
++};
++
++/* MSIOF spidev */
++static const struct spi_board_info spi_bus[] __initconst = {
++ {
++ .modalias = "spidev",
++ .max_speed_hz = 6000000,
++ .mode = SPI_MODE_3,
++ .bus_num = 1,
++ .chip_select = 0,
++ },
++ {
++ .modalias = "spidev",
++ .max_speed_hz = 6000000,
++ .mode = SPI_MODE_3,
++ .bus_num = 2,
++ .chip_select = 0,
++ },
++};
++
++#define silk_add_msiof_device spi_register_board_info
++
++static struct of_dev_auxdata silk_auxdata_lookup[] __initdata = {
++ OF_DEV_AUXDATA("renesas,mmcif-r8a7794", 0xee200000, "sh_mmcif",
++ &mmcif0_pdata),
++ OF_DEV_AUXDATA("renesas,sdhi-r8a7794", 0xee100000, "sdhi0",
++ &sdhi0_info),
++ OF_DEV_AUXDATA("renesas,sdhi-r8a7794", 0xee140000, "sdhi1",
++ &sdhi1_info),
++ AUXDATA_SCIFA(0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
++ AUXDATA_SCIFA(1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
++ AUXDATA_SCIFB(2, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
++ AUXDATA_SCIFB(3, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
++ AUXDATA_SCIFB(4, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
++ AUXDATA_SCIFA(5, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
++ AUXDATA_SCIF(6, 0xe6e60000, gic_spi(152)), /* SCIF0 */
++ AUXDATA_SCIF(7, 0xe6e68000, gic_spi(153)), /* SCIF1 */
++ AUXDATA_HSCIF(8, 0xe62c0000, gic_spi(154)), /* HSCIF0 */
++ AUXDATA_HSCIF(9, 0xe62c8000, gic_spi(155)), /* HSCIF1 */
++ AUXDATA_SCIF(10, 0xe6e58000, gic_spi(22)), /* SCIF2 */
++ AUXDATA_SCIF(11, 0xe6ea8000, gic_spi(23)), /* SCIF3 */
++ AUXDATA_SCIF(12, 0xe6ee0000, gic_spi(24)), /* SCIF4 */
++ AUXDATA_SCIF(13, 0xe6ee8000, gic_spi(25)), /* SCIF5 */
++ AUXDATA_SCIFA(14, 0xe6c70000, gic_spi(29)), /* SCIFA3 */
++ AUXDATA_SCIFA(15, 0xe6c78000, gic_spi(30)), /* SCIFA4 */
++ AUXDATA_SCIFA(16, 0xe6c80000, gic_spi(31)), /* SCIFA5 */
++ AUXDATA_HSCIF(17, 0xe6cd0000, gic_spi(21)), /* HSCIF2 */
++ OF_DEV_AUXDATA("renesas,msiof-r8a7794", 0xe6e20000,
++ "spi_r8a7794_msiof.0", &msiof0_info),
++ OF_DEV_AUXDATA("renesas,msiof-r8a7794", 0xe6e10000,
++ "spi_r8a7794_msiof.1", &msiof1_info),
++ {},
++};
++
++static void __init silk_add_standard_devices(void)
++{
++ shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
++ shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
++ r8a7794_add_dt_devices();
++ silk_add_dmac_prototype();
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++ silk_add_usb_dmac_prototype();
++#endif
++ of_platform_populate(NULL, of_default_bus_match_table,
++ silk_auxdata_lookup, NULL);
++ silk_add_du_device();
++
++ platform_device_register_resndata(&platform_bus, "usb_phy_rcar_gen2",
++ -1, usbhs_phy_resources,
++ ARRAY_SIZE(usbhs_phy_resources),
++ &usbhs_phy_pdata,
++ sizeof(usbhs_phy_pdata));
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++ silk_register_usbhs();
++#else
++ silk_add_usb0_device();
++#endif
++ silk_add_usb1_device();
++ silk_add_rsnd_device();
++ silk_add_camera0_device();
++#if IS_ENABLED(CONFIG_VIDEO_RENESAS_VSP1)
++ silk_add_vsp1_devices();
++#endif
++ silk_add_msiof_device(spi_bus, ARRAY_SIZE(spi_bus));
++}
++
++static const char * const silk_boards_compat_dt[] __initconst = {
++ "renesas,silk",
++ "renesas,silk-reference",
++ NULL,
++};
++
++DT_MACHINE_START(SILK_DT, "silk")
++ .smp = smp_ops(r8a7794_smp_ops),
++ .init_early = r8a7794_init_early,
++ .init_time = r8a7794_timer_init,
++ .init_machine = silk_add_standard_devices,
++ .init_late = shmobile_init_late,
++ .reserve = rcar_gen2_reserve,
++ .restart = silk_restart,
++ .dt_compat = silk_boards_compat_dt,
++MACHINE_END
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0002-kernel-silk-fix-ethernet-phy-irq.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0002-kernel-silk-fix-ethernet-phy-irq.patch
new file mode 100644
index 0000000..5e72b82
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0002-kernel-silk-fix-ethernet-phy-irq.patch
@@ -0,0 +1,25 @@
+From f186213b9d9d3942dc403060542796e07d254d52 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Mon, 2 Feb 2015 13:34:25 +0300
+Subject: [PATCH] Silk: Ethernet phy interrupt is connected to IRQ8
+
+---
+ arch/arm/boot/dts/r8a7794-silk.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
+index cb69f6b..aa20df8 100644
+--- a/arch/arm/boot/dts/r8a7794-silk.dts
++++ b/arch/arm/boot/dts/r8a7794-silk.dts
+@@ -280,7 +280,7 @@
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ interrupt-parent = <&irqc0>;
+- interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+ micrel,led-mode = <1>;
+ };
+ };
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0003-kernel-silk-fix-sd-detect.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0003-kernel-silk-fix-sd-detect.patch
new file mode 100644
index 0000000..0bb4f75
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0003-kernel-silk-fix-sd-detect.patch
@@ -0,0 +1,25 @@
+From 1a56b82aad68465e69827f1cbe18f53ab886f7df Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Mon, 2 Feb 2015 13:35:06 +0300
+Subject: [PATCH] Silk: Fix SDHI1 write protect pin detection
+
+---
+ arch/arm/boot/dts/r8a7794-silk.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
+index aa20df8..9438dfa 100644
+--- a/arch/arm/boot/dts/r8a7794-silk.dts
++++ b/arch/arm/boot/dts/r8a7794-silk.dts
+@@ -345,7 +345,7 @@
+ vmmc-supply = <&vcc_sdhi1>;
+ vqmmc-supply = <&vccq_sdhi1>;
+ cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+- wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
++ wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
+ status = "okay";
+ };
+
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0004-kernel-Revert-i2c-rcar-Support-ACK-by-HW-auto-restart-after-NACK.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0004-kernel-Revert-i2c-rcar-Support-ACK-by-HW-auto-restart-after-NACK.patch
new file mode 100644
index 0000000..5f23129
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0004-kernel-Revert-i2c-rcar-Support-ACK-by-HW-auto-restart-after-NACK.patch
@@ -0,0 +1,66 @@
+From 4f249ca259008006d972ea76fd2b37a2558ea2f1 Mon Sep 17 00:00:00 2001
+From: Petr Nechaev <petr.nechaev@cogentembedded.com>
+Date: Mon, 2 Feb 2015 13:37:55 +0300
+Subject: [PATCH] Revert "i2c: rcar: Support ACK by HW auto restart after
+ NACK"
+
+This reverts commit 4df6b2af6c0f795d810eb1e2e9411ad1cbbe4245.
+---
+ drivers/i2c/busses/i2c-rcar.c | 20 ++++++++------------
+ 1 file changed, 8 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index 18034cd..0e863f3 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -522,6 +522,7 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
+
+ /* go to stop phase */
+ rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_STOP);
++ rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_STOP);
+ rcar_i2c_flags_set(priv, ID_NACK);
+ rcar_i2c_status_bit_clear(priv, MNR);
+ goto out;
+@@ -532,14 +533,8 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
+ */
+ if (msr & MST) {
+ dev_dbg(dev, "Stop\n");
+- if (rcar_i2c_flags_has(priv, ID_NACK)) {
+- /* don't set ID_DONE for expecting ACK
+- after auto-restart by HW */
+- rcar_i2c_status_bit_clear(priv, MST);
+- } else {
+- rcar_i2c_flags_set(priv, ID_DONE);
+- rcar_i2c_status_clear(priv);
+- }
++ rcar_i2c_flags_set(priv, ID_DONE);
++ rcar_i2c_status_clear(priv);
+ goto out;
+ }
+
+@@ -616,10 +611,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
+ rcar_i2c_flags_has(priv, ID_DONE),
+ 5 * HZ);
+ if (!timeout) {
+- if (rcar_i2c_flags_has(priv, ID_NACK)) {
+- ret = -ENXIO;
+- break;
+- }
+ ret = -ETIMEDOUT;
+ break;
+ }
+@@ -627,6 +618,11 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
+ /*
+ * error handling
+ */
++ if (rcar_i2c_flags_has(priv, ID_NACK)) {
++ ret = -ENXIO;
++ break;
++ }
++
+ if (rcar_i2c_flags_has(priv, ID_ARBLOST)) {
+ ret = -EAGAIN;
+ break;
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0006-Rcar-DU-add-RGB-connector.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0006-Rcar-DU-add-RGB-connector.patch
new file mode 100644
index 0000000..d1c8da8
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0006-Rcar-DU-add-RGB-connector.patch
@@ -0,0 +1,276 @@
+From 488e93a1d8371c6ce8cfd24d7299973c476a1aef Mon Sep 17 00:00:00 2001
+From: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
+Date: Sun, 28 Dec 2014 19:58:58 +0300
+Subject: [PATCH] Rcar-DU: add RGB connector
+
+
+Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
+---
+ drivers/gpu/drm/rcar-du/Makefile | 1 +
+ drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 9 ++
+ drivers/gpu/drm/rcar-du/rcar_du_rgbcon.c | 142 +++++++++++++++++++++++++++++
+ drivers/gpu/drm/rcar-du/rcar_du_rgbcon.h | 24 +++++
+ include/linux/platform_data/rcar-du.h | 7 ++
+ 5 files changed, 183 insertions(+)
+ create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_rgbcon.c
+ create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_rgbcon.h
+
+diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
+index a6909f0..744da0f 100644
+--- a/drivers/gpu/drm/rcar-du/Makefile
++++ b/drivers/gpu/drm/rcar-du/Makefile
+@@ -5,6 +5,7 @@ rcar-du-drm-y := rcar_du_crtc.o \
+ rcar_du_hdmicon.o \
+ rcar_du_kms.o \
+ rcar_du_lvdscon.o \
++ rcar_du_rgbcon.o \
+ rcar_du_plane.o \
+ rcar_du_vgacon.o
+
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
+index 0edec97..de0ccc1 100644
+--- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
+@@ -24,6 +24,7 @@
+ #include "rcar_du_encoder.h"
+ #include "rcar_du_kms.h"
+ #include "rcar_du_lvdscon.h"
++#include "rcar_du_rgbcon.h"
+ #include "rcar_du_lvdsenc.h"
+ #include "rcar_du_vgacon.h"
+ #include "rcar_du_hdmicon.h"
+@@ -235,6 +236,9 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
+ case RCAR_DU_ENCODER_LVDS:
+ encoder_type = DRM_MODE_ENCODER_LVDS;
+ break;
++ case RCAR_DU_ENCODER_RGB:
++ encoder_type = DRM_MODE_ENCODER_NONE;
++ break;
+ case RCAR_DU_ENCODER_HDMI:
+ encoder_type = DRM_MODE_ENCODER_TMDS;
+ break;
+@@ -277,6 +281,11 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
+ case DRM_MODE_ENCODER_DAC:
+ return rcar_du_vga_connector_init(rcdu, renc);
+
++ case DRM_MODE_ENCODER_NONE:
++ if (type == RCAR_DU_ENCODER_RGB)
++ return rcar_du_rgb_connector_init(rcdu, renc,
++ &data->connector.rgb.panel);
++ /* fallthrough */
+ default:
+ return -EINVAL;
+ }
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_rgbcon.c b/drivers/gpu/drm/rcar-du/rcar_du_rgbcon.c
+new file mode 100644
+index 0000000..9ee845d
+--- /dev/null
++++ b/drivers/gpu/drm/rcar-du/rcar_du_rgbcon.c
+@@ -0,0 +1,142 @@
++/*
++ * rcar_du_rgbcon.c -- R-Car Display Unit RGB Connector
++ * base on rcar_du_lvdscon.c
++ *
++ * Copyright (C) 2013-2014 Renesas Electronics Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#include <drm/drmP.h>
++#include <drm/drm_crtc.h>
++#include <drm/drm_crtc_helper.h>
++#include <drm/drm_encoder_slave.h>
++
++#include "rcar_du_drv.h"
++#include "rcar_du_encoder.h"
++#include "rcar_du_kms.h"
++#include "rcar_du_rgbcon.h"
++
++struct rcar_du_rgb_connector {
++ struct rcar_du_connector connector;
++
++ const struct rcar_du_panel_data *panel;
++};
++
++#define to_rcar_rgb_connector(c) \
++ container_of(c, struct rcar_du_rgb_connector, connector.connector)
++
++static int rcar_du_rgb_connector_get_modes(struct drm_connector *connector)
++{
++ struct rcar_du_rgb_connector *rgbcon =
++ to_rcar_rgb_connector(connector);
++ struct drm_display_mode *mode;
++
++ mode = drm_mode_create(connector->dev);
++ if (mode == NULL)
++ return 0;
++
++ mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
++ mode->clock = rgbcon->panel->mode.clock;
++ mode->hdisplay = rgbcon->panel->mode.hdisplay;
++ mode->hsync_start = rgbcon->panel->mode.hsync_start;
++ mode->hsync_end = rgbcon->panel->mode.hsync_end;
++ mode->htotal = rgbcon->panel->mode.htotal;
++ mode->vdisplay = rgbcon->panel->mode.vdisplay;
++ mode->vsync_start = rgbcon->panel->mode.vsync_start;
++ mode->vsync_end = rgbcon->panel->mode.vsync_end;
++ mode->vtotal = rgbcon->panel->mode.vtotal;
++ mode->flags = rgbcon->panel->mode.flags;
++
++ drm_mode_set_name(mode);
++ drm_mode_probed_add(connector, mode);
++
++ return 1;
++}
++
++static int rcar_du_rgb_connector_mode_valid(struct drm_connector *connector,
++ struct drm_display_mode *mode)
++{
++ return MODE_OK;
++}
++
++static const struct drm_connector_helper_funcs connector_helper_funcs = {
++ .get_modes = rcar_du_rgb_connector_get_modes,
++ .mode_valid = rcar_du_rgb_connector_mode_valid,
++ .best_encoder = rcar_du_connector_best_encoder,
++};
++
++static void rcar_du_rgb_connector_destroy(struct drm_connector *connector)
++{
++ drm_sysfs_connector_remove(connector);
++ drm_connector_cleanup(connector);
++}
++
++static enum drm_connector_status
++rcar_du_rgb_connector_detect(struct drm_connector *connector, bool force)
++{
++ return connector_status_connected;
++}
++
++static const struct drm_connector_funcs connector_funcs = {
++ .dpms = drm_helper_connector_dpms,
++ .detect = rcar_du_rgb_connector_detect,
++ .fill_modes = drm_helper_probe_single_connector_modes,
++ .destroy = rcar_du_rgb_connector_destroy,
++};
++
++int rcar_du_rgb_connector_init(struct rcar_du_device *rcdu,
++ struct rcar_du_encoder *renc,
++ const struct rcar_du_panel_data *panel)
++{
++ struct rcar_du_rgb_connector *rgbcon;
++ struct drm_connector *connector;
++ int ret;
++
++ if (rcdu->pdata->backlight_on) {
++ ret = rcdu->pdata->backlight_on();
++ if (ret < 0)
++ return ret;
++ }
++
++ rgbcon = devm_kzalloc(rcdu->dev, sizeof(*rgbcon), GFP_KERNEL);
++ if (rgbcon == NULL)
++ return -ENOMEM;
++
++ rgbcon->panel = panel;
++
++ connector = &rgbcon->connector.connector;
++ connector->display_info.width_mm = panel->width_mm;
++ connector->display_info.height_mm = panel->height_mm;
++
++ ret = drm_connector_init(rcdu->ddev, connector, &connector_funcs,
++ DRM_MODE_CONNECTOR_Component);
++ if (ret < 0)
++ return ret;
++
++ drm_connector_helper_add(connector, &connector_helper_funcs);
++ ret = drm_sysfs_connector_add(connector);
++ if (ret < 0)
++ return ret;
++
++#if 0
++ drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
++ drm_object_property_set_value(&connector->base,
++ rcdu->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
++#else
++ drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
++ drm_object_property_set_value(&connector->base,
++ rcdu->ddev->mode_config.dpms_property, DRM_MODE_DPMS_ON);
++#endif
++ ret = drm_mode_connector_attach_encoder(connector, renc->encoder);
++ if (ret < 0)
++ return ret;
++
++ connector->encoder = renc->encoder;
++ rgbcon->connector.encoder = renc;
++
++ return 0;
++}
+diff --git a/drivers/gpu/drm/rcar-du/rcar_du_rgbcon.h b/drivers/gpu/drm/rcar-du/rcar_du_rgbcon.h
+new file mode 100644
+index 0000000..d4d51be
+--- /dev/null
++++ b/drivers/gpu/drm/rcar-du/rcar_du_rgbcon.h
+@@ -0,0 +1,24 @@
++/*
++ * rcar_du_rgbcon.h -- R-Car Display Unit RGB Connector
++ * based on rcar_du_lvdscon.h
++ *
++ * Copyright (C) 2013-2014 Renesas Electronics Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef __RCAR_DU_RGBCON_H__
++#define __RCAR_DU_RGBCON_H__
++
++struct rcar_du_device;
++struct rcar_du_encoder;
++struct rcar_du_panel_data;
++
++int rcar_du_rgb_connector_init(struct rcar_du_device *rcdu,
++ struct rcar_du_encoder *renc,
++ const struct rcar_du_panel_data *panel);
++
++#endif /* __RCAR_DU_RGBCON_H__ */
+diff --git a/include/linux/platform_data/rcar-du.h b/include/linux/platform_data/rcar-du.h
+index 62464de..93c29af 100644
+--- a/include/linux/platform_data/rcar-du.h
++++ b/include/linux/platform_data/rcar-du.h
+@@ -31,6 +31,7 @@ enum rcar_du_encoder_type {
+ RCAR_DU_ENCODER_NONE,
+ RCAR_DU_ENCODER_VGA,
+ RCAR_DU_ENCODER_LVDS,
++ RCAR_DU_ENCODER_RGB,
+ RCAR_DU_ENCODER_HDMI,
+ };
+
+@@ -44,6 +45,11 @@ struct rcar_du_connector_lvds_data {
+ struct rcar_du_panel_data panel;
+ };
+
++struct rcar_du_connector_rgb_data {
++ struct rcar_du_panel_data panel;
++};
++
++
+ struct rcar_du_connector_vga_data {
+ /* TODO: Add DDC information for EDID retrieval */
+ };
+@@ -68,6 +74,7 @@ struct rcar_du_encoder_data {
+
+ union {
+ struct rcar_du_connector_lvds_data lvds;
++ struct rcar_du_connector_rgb_data rgb;
+ struct rcar_du_connector_vga_data vga;
+ struct rcar_du_connector_hdmi_data hdmi;
+ } connector;
+--
+1.7.10.4
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0007-SILK-add-i2c0.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0007-SILK-add-i2c0.patch
new file mode 100644
index 0000000..1f02501
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0007-SILK-add-i2c0.patch
@@ -0,0 +1,45 @@
+From 207ad91c8ebbfbd2b862323200071a8c2a816fef Mon Sep 17 00:00:00 2001
+From: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
+Date: Sun, 28 Dec 2014 20:01:53 +0300
+Subject: [PATCH] SILK: add i2c0
+
+
+Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
+---
+ arch/arm/boot/dts/r8a7794-silk.dts | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
+index aa20df8..bd1359d 100644
+--- a/arch/arm/boot/dts/r8a7794-silk.dts
++++ b/arch/arm/boot/dts/r8a7794-silk.dts
+@@ -181,6 +181,14 @@
+ clock-frequency = <20000000>;
+ };
+
++&i2c0 {
++ pinctrl-0 = <&i2c0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++ clock-frequency = <400000>;
++};
++
+ &i2c1 {
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+@@ -211,6 +219,11 @@
+ renesas,function = "du";
+ };
+
++ i2c0_pins: i2c0 {
++ renesas,groups = "i2c0_d";
++ renesas,function = "i2c0";
++ };
++
+ i2c1_pins: i2c1 {
+ renesas,groups = "i2c1";
+ renesas,function = "i2c1";
+--
+1.7.10.4
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0008-Porter-board-support.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0008-Porter-board-support.patch
new file mode 100644
index 0000000..13fc68b
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0008-Porter-board-support.patch
@@ -0,0 +1,1426 @@
+From c8c4c6ed85b5f34b8f8178b8ce53c246a67cfa00 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Mon, 2 Feb 2015 14:12:24 +0300
+Subject: [PATCH] Add Porter board support
+
+Porter is an entry level development board based on R-Car M2 SoC
+(R8A7791)
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/r8a7791-porter.dts | 385 ++++++++++
+ arch/arm/configs/shmobile_defconfig | 1 +
+ arch/arm/mach-shmobile/Kconfig | 6 +
+ arch/arm/mach-shmobile/Makefile | 1 +
+ arch/arm/mach-shmobile/board-porter-reference.c | 953 ++++++++++++++++++++++++
+ 6 files changed, 1347 insertions(+)
+ create mode 100644 arch/arm/boot/dts/r8a7791-porter.dts
+ create mode 100644 arch/arm/mach-shmobile/board-porter-reference.c
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index f2b99db..a1de751 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -176,6 +176,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
+ r7s72100-genmai.dtb \
+ r8a7791-henninger.dtb \
+ r8a7791-koelsch.dtb \
++ r8a7791-porter.dtb \
+ r8a7790-lager.dtb \
+ r8a7794-alt.dtb \
+ r8a7794-silk.dtb \
+diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
+new file mode 100644
+index 0000000..6a0ccde
+--- /dev/null
++++ b/arch/arm/boot/dts/r8a7791-porter.dts
+@@ -0,0 +1,385 @@
++/*
++ * Device Tree Source for the Porter board
++ *
++ * Copyright (C) 2015 Renesas Electronics Corporation
++ * Copyright (C) 2015 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/*
++ * SSI-AK4643
++ *
++ * these commands are required when playback.
++ *
++ * # amixer set "LINEOUT Mixer DACL" on
++ * # amixer set "Digital" 200
++ * # amixer set "DVC Out" 50
++ */
++
++/dts-v1/;
++#include "r8a7791.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++ model = "Porter";
++ compatible = "renesas,porter", "renesas,r8a7791";
++
++ aliases {
++ serial6 = &scif0;
++ };
++
++ chosen {
++ bootargs = "console=ttySC6,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp vmalloc=384M";
++ };
++
++ memory@40000000 {
++ device_type = "memory";
++ reg = <0 0x40000000 0 0x40000000>;
++ };
++
++ memory@200000000 {
++ device_type = "memory";
++ reg = <2 0x00000000 0 0x40000000>;
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ led2 {
++ gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
++ };
++ led3 {
++ gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
++ };
++ led4 {
++ gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
++ };
++ };
++
++ vcc_sdhi0: regulator@0 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI0 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vccq_sdhi0: regulator@1 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI0 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
++
++ vcc_sdhi2: regulator@2 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI2 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vccq_sdhi2: regulator@3 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI2 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
++
++ hdmi_transmitter: adv7511 {
++ compatible = "adi,adv7511";
++ gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
++
++ adi,input-style = <0x02>;
++ adi,input-id = <0x00>;
++ adi,input-color-depth = <0x03>;
++ adi,sync-pulse = <0x03>;
++ adi,bit-justification = <0x01>;
++ adi,up-conversion = <0x00>;
++ adi,timing-generation-sequence = <0x00>;
++ adi,vsync-polarity = <0x02>;
++ adi,hsync-polarity = <0x02>;
++ adi,clock-delay = <0x03>;
++ };
++
++ usbhs_udc {
++ gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>;
++ };
++};
++
++&extal_clk {
++ clock-frequency = <20000000>;
++};
++
++&pfc {
++ pinctrl-0 = <&du_pins &usb0_pins &usb1_pins &sound_pins &sound_clk_pins &vin0_pins>;
++ pinctrl-names = "default";
++
++ du_pins: du {
++ renesas,groups = "du_rgb666", "du_sync", "du_clk_out_0";
++ renesas,function = "du";
++ };
++
++ scif0_pins: serial6 {
++ renesas,groups = "scif0_data_d";
++ renesas,function = "scif0";
++ };
++
++ i2c1_pins: i2c1 {
++ renesas,groups = "i2c1_e";
++ renesas,function = "i2c1";
++ };
++
++ i2c2_pins: i2c2 {
++ renesas,groups = "i2c2";
++ renesas,function = "i2c2";
++ };
++
++ i2c4_pins: i2c4 {
++ renesas,groups = "i2c4_c";
++ renesas,function = "i2c4";
++ };
++
++ ether_pins: ether {
++ renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
++ renesas,function = "eth";
++ };
++
++ phy1_pins: phy1 {
++ renesas,groups = "intc_irq0";
++ renesas,function = "intc";
++ };
++
++ sdhi0_pins: sd0 {
++ renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
++ renesas,function = "sdhi0";
++ };
++
++ sdhi2_pins: sd2 {
++ renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
++ renesas,function = "sdhi2";
++ };
++
++ qspi_pins: spi0 {
++ renesas,groups = "qspi_ctrl", "qspi_data4";
++ renesas,function = "qspi";
++ };
++
++ msiof0_pins: spi1 {
++ renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
++ "msiof0_tx";
++ renesas,function = "msiof0";
++ };
++
++ sound_pins: sound {
++ renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
++ renesas,function = "ssi";
++ };
++
++ sound_clk_pins: sound_clk {
++ renesas,groups = "audio_clk_a";
++ renesas,function = "audio_clk";
++ };
++
++ usb0_pins: usb0 {
++ renesas,groups = "usb0";
++ renesas,function = "usb0";
++ };
++
++ usb1_pins: usb1 {
++ renesas,groups = "usb1";
++ renesas,function = "usb1";
++ };
++
++ vin0_pins: vin0 {
++ renesas,groups = "vin0_data8", "vin0_clk";
++ renesas,function = "vin0";
++ };
++};
++
++&ether {
++ pinctrl-0 = <&ether_pins &phy1_pins>;
++ pinctrl-names = "default";
++
++ phy-handle = <&phy1>;
++ renesas,ether-link-active-low;
++ status = "ok";
++
++ phy1: ethernet-phy@1 {
++ reg = <1>;
++ interrupt-parent = <&irqc0>;
++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++ micrel,led-mode = <1>;
++ };
++};
++
++&sata0 {
++ status = "okay";
++};
++
++&scif0 {
++ pinctrl-0 = <&scif0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&sdhi0 {
++ pinctrl-0 = <&sdhi0_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&vcc_sdhi0>;
++ vqmmc-supply = <&vccq_sdhi0>;
++ cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
++ wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
++ status = "okay";
++};
++
++&sdhi2 {
++ pinctrl-0 = <&sdhi2_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&vcc_sdhi2>;
++ vqmmc-supply = <&vccq_sdhi2>;
++ cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
++ toshiba,mmc-wrprotect-disable;
++ status = "okay";
++};
++
++&qspi {
++ pinctrl-0 = <&qspi_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++
++ flash: flash@0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "spansion,s25fl512s";
++ reg = <0>;
++ spi-max-frequency = <30000000>;
++ spi-tx-bus-width = <4>;
++ spi-rx-bus-width = <4>;
++ m25p,fast-read;
++ spi-cpol;
++ spi-cpha;
++
++ partition@0 {
++ label = "loader";
++ reg = <0x00000000 0x00040000>;
++ read-only;
++ };
++ partition@40000 {
++ label = "user";
++ reg = <0x00040000 0x00400000>;
++ read-only;
++ };
++ partition@440000 {
++ label = "flash";
++ reg = <0x00440000 0x03bc0000>;
++ };
++ };
++};
++
++&msiof0 {
++ pinctrl-0 = <&msiof0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&i2c1 {
++ pinctrl-0 = <&i2c1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++ clock-frequency = <400000>;
++};
++
++&i2c2 {
++ pinctrl-0 = <&i2c2_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++ clock-frequency = <400000>;
++
++ eeprom@50 {
++ compatible = "renesas,24c02";
++ reg = <0x50>;
++ pagesize = <16>;
++ };
++
++ snd_codec: ak4643 {
++ #sound-dai-cells = <0>;
++ compatible = "asahi-kasei,ak4643";
++ reg = <0x12>;
++ };
++};
++
++&i2c4 {
++ pinctrl-0 = <&i2c4_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++ clock-frequency = <400000>;
++};
++
++&i2c5 {
++ status = "okay";
++ clock-frequency = <400000>;
++};
++
++&i2c6 {
++ status = "okay";
++ clock-frequency = <100000>;
++
++ vdd_dvfs: regulator@68 {
++ compatible = "diasemi,da9210";
++ reg = <0x68>;
++
++ regulator-min-microvolt = <1000000>;
++ regulator-max-microvolt = <1000000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++};
++
++&pci0 {
++ status = "okay";
++ pinctrl-0 = <&usb0_pins>;
++ pinctrl-names = "default";
++};
++
++&pci1 {
++ status = "okay";
++ pinctrl-0 = <&usb1_pins>;
++ pinctrl-names = "default";
++};
++
++&pcie_bus_clk {
++ status = "okay";
++};
++
++&pciec {
++ status = "okay";
++};
++
++&cpu0 {
++ cpu0-supply = <&vdd_dvfs>;
++};
+diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
+index 11237db..bb4e0e6 100644
+--- a/arch/arm/configs/shmobile_defconfig
++++ b/arch/arm/configs/shmobile_defconfig
+@@ -26,6 +26,7 @@ CONFIG_MACH_GOSE=y
+ CONFIG_MACH_ALT=y
+ CONFIG_MACH_SILK=y
+ CONFIG_MACH_MARZEN=y
++CONFIG_MACH_PORTER=y
+ CONFIG_SHMOBILE_TIMER_HZ=100
+ CONFIG_ARM_LPAE=y
+ # CONFIG_SWP_EMULATE is not set
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index e2e00a9..7c15245 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -93,6 +93,12 @@ config MACH_MARZEN
+ depends on ARCH_R8A7779
+ select REGULATOR_FIXED_VOLTAGE if REGULATOR
+
++config MACH_PORTER
++ bool "Porter board"
++ depends on ARCH_R8A7791
++ select MICREL_PHY if SH_ETH
++ select SND_SOC_AK4642 if SND_SIMPLE_CARD
++
+ comment "Renesas ARM SoCs System Configuration"
+ endif
+
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index 139f31c..43b4025 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -78,6 +78,7 @@ obj-$(CONFIG_MACH_GOSE) += board-gose-reference.o
+ obj-$(CONFIG_MACH_ALT) += board-alt-reference.o
+ obj-$(CONFIG_MACH_SILK) += board-silk-reference.o
+ obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o
++obj-$(CONFIG_MACH_PORTER) += board-porter-reference.o
+ else
+ obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
+ obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o
+diff --git a/arch/arm/mach-shmobile/board-porter-reference.c b/arch/arm/mach-shmobile/board-porter-reference.c
+new file mode 100644
+index 0000000..d481ecd
+--- /dev/null
++++ b/arch/arm/mach-shmobile/board-porter-reference.c
+@@ -0,0 +1,953 @@
++/*
++ * Porter board support - Reference DT implementation
++ *
++ * Copyright (C) 2013-2015 Renesas Electronics Corporation
++ * Copyright (C) 2013 Renesas Solutions Corp.
++ * Copyright (C) 2013 Magnus Damm
++ * Copyright (C) 2015 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
++ */
++
++#include <linux/dma-mapping.h>
++#include <linux/kernel.h>
++#include <linux/mfd/tmio.h>
++#include <linux/mmc/host.h>
++#include <linux/mmc/sh_mobile_sdhi.h>
++#include <linux/of_gpio.h>
++#include <linux/of_platform.h>
++#include <linux/platform_data/camera-rcar.h>
++#include <linux/platform_data/rcar-du.h>
++#include <linux/platform_data/usb-rcar-gen2-phy.h>
++#if IS_ENABLED(CONFIG_VIDEO_RENESAS_VSP1)
++#include <linux/platform_data/vsp1.h>
++#endif
++#include <linux/serial_sci.h>
++#include <linux/sh_dma.h>
++#include <linux/spi/flash.h>
++#include <linux/spi/sh_msiof.h>
++#include <linux/spi/spi.h>
++#include <linux/usb/phy.h>
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++#include <linux/usb/renesas_usbhs.h>
++#endif
++#include <media/soc_camera.h>
++#include <asm/mach/arch.h>
++#include <sound/rcar_snd.h>
++#include <sound/simple_card.h>
++
++#include "clock.h"
++#include "common.h"
++#include "dma-register.h"
++#include "irqs.h"
++#include "r8a7791.h"
++#include "rcar-gen2.h"
++
++/* DU */
++static struct rcar_du_encoder_data porter_du_encoders[] = {
++ {
++ .type = RCAR_DU_ENCODER_HDMI,
++ .output = RCAR_DU_OUTPUT_DPAD0,
++ },
++ {
++ .type = RCAR_DU_ENCODER_NONE,
++ .output = RCAR_DU_OUTPUT_LVDS0,
++ .connector.lvds.panel = {
++ .width_mm = 229,
++ .height_mm = 149,
++ .mode = {
++ .clock = 69000,
++ .hdisplay = 1280,
++ .hsync_start = 1280 + 48,
++ .hsync_end = 1280 + 48 + 32,
++ .htotal = 1280 + 48 + 32 + 80,
++ .vdisplay = 800,
++ .vsync_start = 800 + 2,
++ .vsync_end = 800 + 2 + 6,
++ .vtotal = 800 + 2 + 6 + 15,
++ .flags = 0,
++ },
++ },
++ },
++};
++
++static struct rcar_du_crtc_data porter_du_crtcs[] = {
++ {
++ .exclk = 0, /* NoP */
++ .init_conn_type = DRM_MODE_CONNECTOR_LVDS,
++ },
++ {
++ .exclk = 0, /* NoP */
++ .init_conn_type = DRM_MODE_CONNECTOR_HDMIA,
++ },
++};
++
++static struct rcar_du_platform_data porter_du_pdata = {
++ .encoders = porter_du_encoders,
++ .num_encoders = ARRAY_SIZE(porter_du_encoders),
++ .crtcs = porter_du_crtcs,
++ .num_crtcs = ARRAY_SIZE(porter_du_crtcs),
++#ifdef CONFIG_DRM_FBDEV_CRTC
++ .fbdev_crtc = 1,
++#endif
++ .i2c_ch = 2,
++};
++
++static const struct resource du_resources[] __initconst = {
++ DEFINE_RES_MEM(0xfeb00000, 0x40000),
++ DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
++ DEFINE_RES_IRQ(gic_spi(256)),
++ DEFINE_RES_IRQ(gic_spi(268)),
++};
++
++static void __init porter_add_du_device(void)
++{
++ struct platform_device_info info = {
++ .name = "rcar-du-r8a7791",
++ .id = -1,
++ .res = du_resources,
++ .num_res = ARRAY_SIZE(du_resources),
++ .data = &porter_du_pdata,
++ .size_data = sizeof(porter_du_pdata),
++ .dma_mask = DMA_BIT_MASK(32),
++ };
++
++ platform_device_register_full(&info);
++}
++
++/* Sound */
++static struct rsnd_ssi_platform_info rsnd_ssi[] = {
++ RSND_SSI(AUDIOPP_DMAC_SLAVE_CMD0_TO_SSI0, gic_spi(370), 0),
++ RSND_SSI(AUDIOPP_DMAC_SLAVE_SSI1_TO_SCU1, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
++};
++
++static struct rsnd_src_platform_info rsnd_src[2] = {
++ RSND_SRC(0, AUDIO_DMAC_SLAVE_SCU0_TX, gic_spi(352)),
++ RSND_SRC(0, AUDIO_DMAC_SLAVE_CMD1_TO_MEM, gic_spi(353)),
++};
++
++static struct rsnd_dvc_platform_info rsnd_dvc[2] = {
++};
++
++static struct rsnd_dai_platform_info rsnd_dai = {
++ .playback = { .ssi = &rsnd_ssi[0], .src = &rsnd_src[0], .dvc = &rsnd_dvc[0], },
++ .capture = { .ssi = &rsnd_ssi[1], .src = &rsnd_src[1], .dvc = &rsnd_dvc[1], },
++};
++
++static struct rcar_snd_info rsnd_info = {
++ .flags = RSND_GEN2,
++ .ssi_info = rsnd_ssi,
++ .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
++ .src_info = rsnd_src,
++ .src_info_nr = ARRAY_SIZE(rsnd_src),
++ .dvc_info = rsnd_dvc,
++ .dvc_info_nr = ARRAY_SIZE(rsnd_dvc),
++ .dai_info = &rsnd_dai,
++ .dai_info_nr = 1,
++};
++
++static struct asoc_simple_card_info rsnd_card_info = {
++ .name = "SSI01-AK4643",
++ .codec = "ak4642-codec.2-0012",
++ .platform = "rcar_sound",
++ .daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS,
++ .cpu_dai = {
++ .name = "rcar_sound",
++ },
++ .codec_dai = {
++ .name = "ak4642-hifi",
++ .sysclk = 11289600,
++ },
++};
++
++static void __init porter_add_rsnd_device(void)
++{
++ struct resource rsnd_resources[] = {
++ [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
++ [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
++ [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
++ [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
++ };
++
++ struct platform_device_info cardinfo = {
++ .parent = &platform_bus,
++ .name = "asoc-simple-card",
++ .id = -1,
++ .data = &rsnd_card_info,
++ .size_data = sizeof(struct asoc_simple_card_info),
++ .dma_mask = DMA_BIT_MASK(32),
++ };
++
++ platform_device_register_resndata(
++ &platform_bus, "rcar_sound", -1,
++ rsnd_resources, ARRAY_SIZE(rsnd_resources),
++ &rsnd_info, sizeof(rsnd_info));
++
++ platform_device_register_full(&cardinfo);
++}
++
++
++/*
++ * This is a really crude hack to provide clkdev support to platform
++ * devices until they get moved to DT.
++ */
++static const struct clk_name clk_names[] __initconst = {
++ { "cmt0", NULL, "sh_cmt.0" },
++ { "cmt0", "fck", "sh-cmt-48-gen2.0" },
++ { "du0", "du.0", "rcar-du-r8a7791" },
++ { "du1", "du.1", "rcar-du-r8a7791" },
++ { "lvds0", "lvds.0", "rcar-du-r8a7791" },
++ { "hsusb", NULL, "usb_phy_rcar_gen2" },
++ { "ssi0", "ssi.0", "rcar_sound" },
++ { "ssi1", "ssi.1", "rcar_sound" },
++ { "src0", "src.0", "rcar_sound" },
++ { "src1", "src.1", "rcar_sound" },
++ { "dvc0", "dvc.0", "rcar_sound" },
++ { "dvc1", "dvc.1", "rcar_sound" },
++ { "vin0", NULL, "r8a7791-vin.0" },
++ { "vsps", NULL, NULL },
++#if IS_ENABLED(CONFIG_VIDEO_RENESAS_VSP1)
++ { "vsp1-du0", NULL, "vsp1.2" },
++ { "vsp1-du1", NULL, "vsp1.3" },
++#else
++ { "vsp1-du0", NULL, NULL },
++ { "vsp1-du1", NULL, NULL },
++#endif
++ { "vcp0", NULL, NULL },
++ { "vpc0", NULL, NULL },
++ { "tddmac", NULL, NULL },
++ { "fdp1", NULL, NULL },
++ { "fdp0", NULL, NULL },
++ { "pvrsrvkm", NULL, "pvrsrvkm" },
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++ { "hsusb", NULL, "renesas_usbhs" },
++#else
++ { "ehci", NULL, "pci-rcar-gen2.0" },
++#endif
++};
++
++/*
++ * This is a really crude hack to work around core platform clock issues
++ */
++static const struct clk_name clk_enables[] __initconst = {
++ { "ehci", NULL, "pci-rcar-gen2.1" },
++ { "dmal", NULL, "sh-dma-engine.0" },
++ { "dmah", NULL, "sh-dma-engine.1" },
++ { "sys-dmac1", NULL, "sh-dma-engine.2" },
++ { "sys-dmac0", NULL, "sh-dma-engine.3" },
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++ { "usbdmac0", NULL, "sh-dma-engine.4" },
++#endif
++ { "ssp_dev", NULL, "ssp_dev" },
++ { "ipmmu_gp", NULL, "ipmmu_gp" },
++};
++
++#define DMAE_CHANNEL(a, b) \
++{ \
++ .offset = (a) - 0x20, \
++ .dmars = (a) - 0x20 + 0x40, \
++ .chclr_bit = (b), \
++ .chclr_offset = 0x80 - 0x20, \
++}
++
++/* Sys-DMAC */
++#define SYS_DMAC_SLAVE(_id, _bit, _addr, toffset, roffset, t, r) \
++{ \
++ .slave_id = SYS_DMAC_SLAVE_## _id ##_TX, \
++ .addr = _addr + toffset, \
++ .chcr = CHCR_TX(XMIT_SZ_## _bit ##BIT), \
++ .mid_rid = t, \
++}, { \
++ .slave_id = SYS_DMAC_SLAVE_## _id ##_RX, \
++ .addr = _addr + roffset, \
++ .chcr = CHCR_RX(XMIT_SZ_## _bit ##BIT), \
++ .mid_rid = r, \
++}
++
++#define SYS_DMAC_SLAVE_TX(_id, _bit, _addr, toffset, roffset, t, r) \
++{ \
++ .slave_id = SYS_DMAC_SLAVE_## _id ##_TX, \
++ .addr = _addr + toffset, \
++ .chcr = CHCR_TX(XMIT_SZ_## _bit ##BIT), \
++ .mid_rid = t, \
++}
++
++static const struct sh_dmae_slave_config r8a7791_sys_dmac_slaves[] = {
++ SYS_DMAC_SLAVE(SDHI0, 256, 0xee100000, 0x60, 0x2060, 0xcd, 0xce),
++ SYS_DMAC_SLAVE(SDHI1, 256, 0xee140000, 0x30, 0x2030, 0xc1, 0xc2),
++ SYS_DMAC_SLAVE(SDHI2, 256, 0xee160000, 0x30, 0x2030, 0xd3, 0xd4),
++ SYS_DMAC_SLAVE(SCIF0, 8, 0xe6e60000, 0xc, 0x14, 0x29, 0x2a),
++ SYS_DMAC_SLAVE(SCIF1, 8, 0xe6e68000, 0xc, 0x14, 0x2d, 0x2e),
++ SYS_DMAC_SLAVE(SCIF2, 8, 0xe6e58000, 0xc, 0x14, 0x2b, 0x2c),
++ SYS_DMAC_SLAVE(SCIF3, 8, 0xe6ea8000, 0xc, 0x14, 0x2f, 0x30),
++ SYS_DMAC_SLAVE(SCIF4, 8, 0xe6ee0000, 0xc, 0x14, 0xfb, 0xfc),
++ SYS_DMAC_SLAVE(SCIF5, 8, 0xe6ee8000, 0xc, 0x14, 0xfd, 0xfe),
++ SYS_DMAC_SLAVE(SCIFA0, 8, 0xe6c40000, 0x20, 0x24, 0x21, 0x22),
++ SYS_DMAC_SLAVE(SCIFA1, 8, 0xe6c50000, 0x20, 0x24, 0x25, 0x26),
++ SYS_DMAC_SLAVE(SCIFA2, 8, 0xe6c60000, 0x20, 0x24, 0x27, 0x28),
++ SYS_DMAC_SLAVE(SCIFA3, 8, 0xe6c70000, 0x20, 0x24, 0x1b, 0x1c),
++ SYS_DMAC_SLAVE(SCIFA4, 8, 0xe6c78000, 0x20, 0x24, 0x1f, 0x20),
++ SYS_DMAC_SLAVE(SCIFA5, 8, 0xe6c80000, 0x20, 0x24, 0x23, 0x24),
++ SYS_DMAC_SLAVE(SCIFB0, 8, 0xe6c20000, 0x40, 0x60, 0x3d, 0x3e),
++ SYS_DMAC_SLAVE(SCIFB1, 8, 0xe6c30000, 0x40, 0x60, 0x19, 0x1a),
++ SYS_DMAC_SLAVE(SCIFB2, 8, 0xe6ce0000, 0x40, 0x60, 0x1d, 0x1e),
++ SYS_DMAC_SLAVE(HSCIF0, 8, 0xe62c0000, 0xc, 0x14, 0x39, 0x3a),
++ SYS_DMAC_SLAVE(HSCIF1, 8, 0xe62c8000, 0xc, 0x14, 0x4d, 0x4e),
++ SYS_DMAC_SLAVE(HSCIF2, 8, 0xe62d0000, 0xc, 0x14, 0x3b, 0x3c),
++ SYS_DMAC_SLAVE(MSIOF0, 32, 0xe7e20000, 0x50, 0x60, 0x51, 0x52),
++ SYS_DMAC_SLAVE(MSIOF1, 32, 0xe7e10000, 0x50, 0x60, 0x55, 0x56),
++ SYS_DMAC_SLAVE(MSIOF2, 32, 0xe7e00000, 0x50, 0x60, 0x41, 0x42),
++};
++
++static const struct sh_dmae_channel r8a7791_sys_dmac_channels[] = {
++ DMAE_CHANNEL(0x8000, 0),
++ DMAE_CHANNEL(0x8080, 1),
++ DMAE_CHANNEL(0x8100, 2),
++ DMAE_CHANNEL(0x8180, 3),
++ DMAE_CHANNEL(0x8200, 4),
++ DMAE_CHANNEL(0x8280, 5),
++ DMAE_CHANNEL(0x8300, 6),
++ DMAE_CHANNEL(0x8380, 7),
++ DMAE_CHANNEL(0x8400, 8),
++ DMAE_CHANNEL(0x8480, 9),
++ DMAE_CHANNEL(0x8500, 10),
++ DMAE_CHANNEL(0x8580, 11),
++ DMAE_CHANNEL(0x8600, 12),
++ DMAE_CHANNEL(0x8680, 13),
++ DMAE_CHANNEL(0x8700, 14),
++};
++
++static struct sh_dmae_pdata r8a7791_sys_dmac_platform_data = {
++ .slave = r8a7791_sys_dmac_slaves,
++ .slave_num = ARRAY_SIZE(r8a7791_sys_dmac_slaves),
++ .channel = r8a7791_sys_dmac_channels,
++ .channel_num = ARRAY_SIZE(r8a7791_sys_dmac_channels),
++ .ts_low_shift = TS_LOW_SHIFT,
++ .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
++ .ts_high_shift = TS_HI_SHIFT,
++ .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
++ .ts_shift = dma_ts_shift,
++ .ts_shift_num = ARRAY_SIZE(dma_ts_shift),
++ .dmaor_init = DMAOR_DME,
++ .chclr_present = 1,
++ .chclr_bitwise = 1,
++ .fourty_bits_addr = 1,
++};
++
++static struct resource r8a7791_sys_dmac_resources[] = {
++ /* Channel registers and DMAOR for low */
++ DEFINE_RES_MEM(0xe6700020, 0x8763 - 0x20),
++ DEFINE_RES_IRQ(gic_spi(197)),
++ DEFINE_RES_NAMED(gic_spi(200), 15, NULL, IORESOURCE_IRQ),
++
++ /* Channel registers and DMAOR for high */
++ DEFINE_RES_MEM(0xe6720020, 0x8763 - 0x20),
++ DEFINE_RES_IRQ(gic_spi(220)),
++ DEFINE_RES_NAMED(gic_spi(216), 4, NULL, IORESOURCE_IRQ),
++ DEFINE_RES_NAMED(gic_spi(308), 11, NULL, IORESOURCE_IRQ),
++};
++
++#define r8a7791_register_sys_dmac(id) \
++ platform_device_register_resndata( \
++ &platform_bus, "sh-dma-engine", 2 + id, \
++ &r8a7791_sys_dmac_resources[id * 3], id * 1 + 3, \
++ &r8a7791_sys_dmac_platform_data, \
++ sizeof(r8a7791_sys_dmac_platform_data))
++
++static void __init porter_add_dmac_prototype(void)
++{
++ r8a7791_register_sys_dmac(0);
++ r8a7791_register_sys_dmac(1);
++}
++
++static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
++ .dma_slave_tx = SYS_DMAC_SLAVE_SDHI0_TX,
++ .dma_slave_rx = SYS_DMAC_SLAVE_SDHI0_RX,
++ .dma_rx_offset = 0x2000,
++
++ .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
++ MMC_CAP_POWER_OFF_CARD,
++ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
++};
++
++static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
++ .dma_slave_tx = SYS_DMAC_SLAVE_SDHI2_TX,
++ .dma_slave_rx = SYS_DMAC_SLAVE_SDHI2_RX,
++ .dma_rx_offset = 0x2000,
++
++ .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
++ MMC_CAP_POWER_OFF_CARD,
++ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
++ TMIO_MMC_WRPROTECT_DISABLE,
++};
++
++/* SCIF */
++#define SCIF_PD(scif_type, index, scif_index) \
++static struct plat_sci_port scif##index##_platform_data = { \
++ .type = PORT_##scif_type, \
++ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
++ .scscr = SCSCR_RE | SCSCR_TE, \
++ .dma_slave_tx = SYS_DMAC_SLAVE_##scif_type##scif_index##_TX, \
++ .dma_slave_rx = SYS_DMAC_SLAVE_##scif_type##scif_index##_RX, \
++}
++
++#define PDATA_SCIF(index, baseaddr, irq, i) SCIF_PD(SCIF, index, i)
++#define PDATA_SCIFA(index, baseaddr, irq, i) SCIF_PD(SCIFA, index, i)
++#define PDATA_SCIFB(index, baseaddr, irq, i) SCIF_PD(SCIFB, index, i)
++#define PDATA_HSCIF(index, baseaddr, irq, i) SCIF_PD(HSCIF, index, i)
++
++PDATA_SCIFA(0, 0xe6c40000, gic_spi(144), 0); /* SCIFA0 */
++PDATA_SCIFA(1, 0xe6c50000, gic_spi(145), 1); /* SCIFA1 */
++PDATA_SCIFB(2, 0xe6c20000, gic_spi(148), 0); /* SCIFB0 */
++PDATA_SCIFB(3, 0xe6c30000, gic_spi(149), 1); /* SCIFB1 */
++PDATA_SCIFB(4, 0xe6ce0000, gic_spi(150), 2); /* SCIFB2 */
++PDATA_SCIFA(5, 0xe6c60000, gic_spi(151), 2); /* SCIFA2 */
++PDATA_SCIF(6, 0xe6e60000, gic_spi(152), 0); /* SCIF0 */
++PDATA_SCIF(7, 0xe6e68000, gic_spi(153), 1); /* SCIF1 */
++PDATA_HSCIF(8, 0xe62c0000, gic_spi(154), 0); /* HSCIF0 */
++PDATA_HSCIF(9, 0xe62c8000, gic_spi(155), 1); /* HSCIF1 */
++PDATA_SCIF(10, 0xe6e58000, gic_spi(22), 2); /* SCIF2 */
++PDATA_SCIF(11, 0xe6ea8000, gic_spi(23), 3); /* SCIF3 */
++PDATA_SCIF(12, 0xe6ee0000, gic_spi(24), 4); /* SCIF4 */
++PDATA_SCIF(13, 0xe6ee8000, gic_spi(25), 5); /* SCIF5 */
++PDATA_SCIFA(14, 0xe6c70000, gic_spi(29), 3); /* SCIFA3 */
++PDATA_SCIFA(15, 0xe6c78000, gic_spi(30), 4); /* SCIFA4 */
++PDATA_SCIFA(16, 0xe6c80000, gic_spi(31), 5); /* SCIFA5 */
++PDATA_HSCIF(17, 0xe6cd0000, gic_spi(21), 2); /* HSCIF2 */
++
++#define SCIF_AD(scif_type, index, baseaddr) \
++ OF_DEV_AUXDATA("renesas," scif_type "-r8a7791", baseaddr, \
++ "sh-sci." # index, &scif##index##_platform_data)
++
++#define AUXDATA_SCIF(index, baseaddr, irq) SCIF_AD("scif", index, baseaddr)
++#define AUXDATA_SCIFA(index, baseaddr, irq) SCIF_AD("scifa", index, baseaddr)
++#define AUXDATA_SCIFB(index, baseaddr, irq) SCIF_AD("scifb", index, baseaddr)
++#define AUXDATA_HSCIF(index, baseaddr, irq) SCIF_AD("hscif", index, baseaddr)
++
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++/* USB-DMAC */
++static const struct sh_dmae_channel usb_dmac_channels[] = {
++ {
++ .offset = 0,
++ }, {
++ .offset = 0x20,
++ },
++};
++
++static const struct sh_dmae_slave_config usb_dmac_slaves[] = {
++ {
++ .slave_id = USB_DMAC_SLAVE_USBHS_TX,
++ .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_32BYTE),
++ }, {
++ .slave_id = USB_DMAC_SLAVE_USBHS_RX,
++ .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_32BYTE),
++ },
++};
++
++static struct sh_dmae_pdata usb_dmac_platform_data = {
++ .slave = usb_dmac_slaves,
++ .slave_num = ARRAY_SIZE(usb_dmac_slaves),
++ .channel = usb_dmac_channels,
++ .channel_num = ARRAY_SIZE(usb_dmac_channels),
++ .ts_low_shift = USBTS_LOW_SHIFT,
++ .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
++ .ts_high_shift = USBTS_HI_SHIFT,
++ .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
++ .ts_shift = dma_usbts_shift,
++ .ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
++ .dmaor_init = DMAOR_DME,
++ .chcr_offset = 0x14,
++ .chcr_ie_bit = 1 << 5,
++ .dmaor_is_32bit = 1,
++ .needs_tend_set = 1,
++ .no_dmars = 1,
++ .slave_only = 1,
++};
++
++static struct resource usb_dmac_resources[] = {
++ DEFINE_RES_MEM(0xe65a0020, 0x44), /* Channel registers and DMAOR */
++ DEFINE_RES_MEM(0xe65a0000, 0x14), /* VCR/SWR/DMICR */
++ DEFINE_RES_IRQ(gic_spi(109)),
++};
++
++static void __init porter_add_usb_dmac_prototype(void)
++{
++ platform_device_register_resndata(&platform_bus, "sh-dma-engine",
++ 4,
++ usb_dmac_resources,
++ ARRAY_SIZE(usb_dmac_resources),
++ &usb_dmac_platform_data,
++ sizeof(usb_dmac_platform_data));
++}
++
++
++/* USBHS */
++static const struct resource usbhs_resources[] __initconst = {
++ DEFINE_RES_MEM(0xe6590000, 0x100),
++ DEFINE_RES_IRQ(gic_spi(107)),
++};
++
++struct usbhs_private {
++ struct renesas_usbhs_platform_info info;
++ struct usb_phy *phy;
++ int id_gpio;
++};
++
++#define usbhs_get_priv(pdev) \
++ container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
++
++static int usbhs_power_ctrl(struct platform_device *pdev,
++ void __iomem *base, int enable)
++{
++ struct usbhs_private *priv = usbhs_get_priv(pdev);
++
++ if (!priv->phy)
++ return -ENODEV;
++
++ if (enable) {
++ int retval = usb_phy_init(priv->phy);
++
++ if (!retval)
++ retval = usb_phy_set_suspend(priv->phy, 0);
++ return retval;
++ }
++
++ usb_phy_set_suspend(priv->phy, 1);
++ usb_phy_shutdown(priv->phy);
++ return 0;
++}
++
++static int usbhs_hardware_init(struct platform_device *pdev)
++{
++ struct usbhs_private *priv = usbhs_get_priv(pdev);
++ struct usb_phy *phy;
++ int ret;
++ struct device_node *np;
++
++ np = of_find_node_by_path("/gpio@e6055000");
++ if (np) {
++ priv->id_gpio = of_get_gpio(np, 31);
++ of_node_put(np);
++ } else {
++ pr_warn("Error: Unable to get MAX3355 ID input\n");
++ ret = -ENOTSUPP;
++ goto error2;
++ }
++
++ /* Check MAX3355E ID pin */
++ gpio_request_one(priv->id_gpio, GPIOF_IN, NULL);
++ if (!gpio_get_value(priv->id_gpio)) {
++ pr_warn("Error: USB0 cable selects host mode\n");
++ ret = -ENOTSUPP;
++ goto error;
++ }
++
++ phy = usb_get_phy_dev(&pdev->dev, 0);
++ if (IS_ERR(phy))
++ return PTR_ERR(phy);
++
++ priv->phy = phy;
++ return 0;
++
++error:
++ gpio_free(priv->id_gpio);
++error2:
++ return ret;
++}
++
++static int usbhs_hardware_exit(struct platform_device *pdev)
++{
++ struct usbhs_private *priv = usbhs_get_priv(pdev);
++
++ if (!priv->phy)
++ return 0;
++
++ usb_put_phy(priv->phy);
++ priv->phy = NULL;
++
++ gpio_free(priv->id_gpio);
++ return 0;
++}
++
++static int usbhs_get_id(struct platform_device *pdev)
++{
++ return USBHS_GADGET;
++}
++
++static int usbhs_get_vbus(struct platform_device *pdev)
++{
++ return 0;
++}
++
++static u32 porter_usbhs_pipe_type[] = {
++ USB_ENDPOINT_XFER_CONTROL,
++ USB_ENDPOINT_XFER_ISOC,
++ USB_ENDPOINT_XFER_ISOC,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_INT,
++ USB_ENDPOINT_XFER_INT,
++ USB_ENDPOINT_XFER_INT,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++ USB_ENDPOINT_XFER_BULK,
++};
++
++static struct usbhs_private usbhs_priv __initdata = {
++ .info = {
++ .platform_callback = {
++ .power_ctrl = usbhs_power_ctrl,
++ .hardware_init = usbhs_hardware_init,
++ .hardware_exit = usbhs_hardware_exit,
++ .get_id = usbhs_get_id,
++ .get_vbus = usbhs_get_vbus,
++ },
++ .driver_param = {
++ .buswait_bwait = 4,
++ .pipe_type = porter_usbhs_pipe_type,
++ .pipe_size = ARRAY_SIZE(porter_usbhs_pipe_type),
++ .d0_rx_id = USB_DMAC_SLAVE_USBHS_RX,
++ .d1_tx_id = USB_DMAC_SLAVE_USBHS_TX,
++ .usb_dmac_xfer_size = 32,
++ },
++ }
++};
++
++static void __init porter_add_usb0_gadget(void)
++{
++ usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
++ platform_device_register_resndata(&platform_bus,
++ "renesas_usbhs", -1,
++ usbhs_resources,
++ ARRAY_SIZE(usbhs_resources),
++ &usbhs_priv.info,
++ sizeof(usbhs_priv.info));
++}
++#else
++/* Internal PCI0 */
++static const struct resource pci0_resources[] __initconst = {
++ DEFINE_RES_MEM(0xee090000, 0x10000), /* CFG */
++ DEFINE_RES_MEM(0xee080000, 0x10000), /* MEM */
++ DEFINE_RES_IRQ(gic_spi(108)),
++};
++
++static void __init porter_add_usb0_host(void)
++{
++ usb_bind_phy("pci-rcar-gen2.0", 0, "usb_phy_rcar_gen2");
++ platform_device_register_simple("pci-rcar-gen2",
++ 0, pci0_resources,
++ ARRAY_SIZE(pci0_resources));
++}
++#endif
++
++/* Internal PCI1 */
++static const struct resource pci1_resources[] __initconst = {
++ DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
++ DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
++ DEFINE_RES_IRQ(gic_spi(113)),
++};
++
++static void __init porter_add_usb1_host(void)
++{
++ usb_bind_phy("pci-rcar-gen2.1", 0, "usb_phy_rcar_gen2");
++ platform_device_register_simple("pci-rcar-gen2",
++ 1, pci1_resources,
++ ARRAY_SIZE(pci1_resources));
++}
++
++/* USBHS PHY */
++static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++ .chan0_pci = 0, /* Channel 0 is USBHS */
++#else
++ .chan0_pci = 1, /* Channel 0 is PCI USB */
++#endif
++ .chan2_pci = 1, /* Channel 2 is PCI USB host */
++ .gpio_vbus = 798,
++ .wakeup = true,
++};
++
++/* VIN */
++static const struct resource vin_resources[] __initconst = {
++ /* VIN0 */
++ DEFINE_RES_MEM(0xe6ef0000, 0x1000),
++ DEFINE_RES_IRQ(gic_spi(188)),
++ /* VIN1 */
++ DEFINE_RES_MEM(0xe6ef1000, 0x1000),
++ DEFINE_RES_IRQ(gic_spi(189)),
++};
++
++static void __init porter_add_vin_device(unsigned idx,
++ struct rcar_vin_platform_data *pdata)
++{
++ struct platform_device_info vin_info = {
++ .parent = &platform_bus,
++ .name = "r8a7791-vin",
++ .id = idx,
++ .res = &vin_resources[idx * 2],
++ .num_res = 2,
++ .dma_mask = DMA_BIT_MASK(32),
++ .data = pdata,
++ .size_data = sizeof(*pdata),
++ };
++
++ BUG_ON(idx > 1);
++
++ platform_device_register_full(&vin_info);
++}
++
++#define PORTER_CAMERA(idx, name, addr, pdata, flag) \
++static struct i2c_board_info i2c_cam##idx##_device = { \
++ I2C_BOARD_INFO(name, addr), \
++}; \
++ \
++static struct rcar_vin_platform_data vin##idx##_pdata = { \
++ .flags = flag, \
++}; \
++ \
++static struct soc_camera_link cam##idx##_link = { \
++ .bus_id = idx, \
++ .board_info = &i2c_cam##idx##_device, \
++ .i2c_adapter_id = 2, \
++ .module_name = name, \
++ .priv = pdata, \
++}
++
++PORTER_CAMERA(0, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
++
++static void __init porter_add_camera0_device(void)
++{
++ platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0,
++ &cam0_link, sizeof(cam0_link));
++ porter_add_vin_device(0, &vin0_pdata);
++}
++
++/* VSP1 */
++#if IS_ENABLED(CONFIG_VIDEO_RENESAS_VSP1)
++static const struct vsp1_platform_data porter_vsps_pdata __initconst = {
++ .features = 0,
++ .rpf_count = 5,
++ .uds_count = 3,
++ .wpf_count = 4,
++};
++
++static const struct vsp1_platform_data porter_vspd0_pdata __initconst = {
++ .features = VSP1_HAS_LIF,
++ .rpf_count = 4,
++ .uds_count = 1,
++ .wpf_count = 4,
++};
++
++static const struct vsp1_platform_data porter_vspd1_pdata __initconst = {
++ .features = VSP1_HAS_LIF,
++ .rpf_count = 4,
++ .uds_count = 1,
++ .wpf_count = 4,
++};
++
++static const struct vsp1_platform_data * const porter_vsp1_pdata[] __initconst
++ = {
++ &porter_vsps_pdata,
++ &porter_vspd0_pdata,
++ &porter_vspd1_pdata,
++};
++
++static const struct resource vsp1_1_resources[] __initconst = {
++ DEFINE_RES_MEM(0xfe928000, 0x8000),
++ DEFINE_RES_IRQ(gic_spi(267)),
++};
++
++static const struct resource vsp1_2_resources[] __initconst = {
++ DEFINE_RES_MEM(0xfe930000, 0x8000),
++ DEFINE_RES_IRQ(gic_spi(246)),
++};
++
++static const struct resource vsp1_3_resources[] __initconst = {
++ DEFINE_RES_MEM(0xfe938000, 0x8000),
++ DEFINE_RES_IRQ(gic_spi(247)),
++};
++
++static const struct resource * const vsp1_resources[] __initconst = {
++ vsp1_1_resources,
++ vsp1_2_resources,
++ vsp1_3_resources,
++};
++
++static void __init porter_add_vsp1_devices(void)
++{
++ struct platform_device_info info = {
++ .name = "vsp1",
++ .size_data = sizeof(*porter_vsp1_pdata[0]),
++ .num_res = 2,
++ .dma_mask = DMA_BIT_MASK(32),
++ };
++ unsigned int i;
++
++ for (i = 1; i < ARRAY_SIZE(vsp1_resources); ++i) {
++ info.id = i + 1;
++ info.data = porter_vsp1_pdata[i];
++ info.res = vsp1_resources[i];
++
++ platform_device_register_full(&info);
++ }
++}
++#endif
++
++static const struct resource usbhs_phy_resources[] __initconst = {
++ DEFINE_RES_MEM(0xe6590100, 0x100),
++};
++
++/* Add all available USB devices */
++static void __init porter_add_usb_devices(void)
++{
++ platform_device_register_resndata(&platform_bus, "usb_phy_rcar_gen2",
++ -1, usbhs_phy_resources,
++ ARRAY_SIZE(usbhs_phy_resources),
++ &usbhs_phy_pdata,
++ sizeof(usbhs_phy_pdata));
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++ porter_add_usb0_gadget();
++#else
++ porter_add_usb0_host();
++#endif
++ porter_add_usb1_host();
++}
++
++/* MSIOF */
++static struct sh_msiof_spi_info msiof0_info = {
++ .rx_fifo_override = 256,
++ .num_chipselect = 1,
++ .dma_tx_id = SYS_DMAC_SLAVE_MSIOF0_TX,
++ .dma_rx_id = SYS_DMAC_SLAVE_MSIOF0_RX,
++};
++
++/* MSIOF spidev */
++static const struct spi_board_info spi_bus[] __initconst = {
++ {
++ .modalias = "spidev",
++ .max_speed_hz = 6000000,
++ .mode = SPI_MODE_3,
++ .bus_num = 1,
++ .chip_select = 0,
++ },
++};
++
++#define porter_add_msiof_device spi_register_board_info
++
++/* POWER IC */
++static struct i2c_board_info poweric_i2c[] = {
++ { I2C_BOARD_INFO("da9063", 0x58), },
++};
++
++static void porter_restart(char mode, const char *cmd)
++{
++ struct i2c_adapter *adap;
++ struct i2c_client *client;
++ u8 val;
++ int busnum = 6;
++
++ adap = i2c_get_adapter(busnum);
++ if (!adap) {
++ pr_err("failed to get adapter i2c%d\n", busnum);
++ return;
++ }
++
++ client = i2c_new_device(adap, &poweric_i2c[0]);
++ if (!client)
++ pr_err("failed to register %s to i2c%d\n",
++ poweric_i2c[0].type, busnum);
++
++ i2c_put_adapter(adap);
++
++ val = i2c_smbus_read_byte_data(client, 0x13);
++
++ if (val < 0)
++ pr_err("couldn't access da9063\n");
++
++ val |= 0x02;
++
++ i2c_smbus_write_byte_data(client, 0x13, val);
++}
++
++static struct of_dev_auxdata porter_auxdata_lookup[] __initdata = {
++ OF_DEV_AUXDATA("renesas,sdhi-r8a7791", 0xee100000, "sdhi0",
++ &sdhi0_info),
++ OF_DEV_AUXDATA("renesas,sdhi-r8a7791", 0xee160000, "sdhi2",
++ &sdhi2_info),
++ AUXDATA_SCIFA(0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
++ AUXDATA_SCIFA(1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
++ AUXDATA_SCIFB(2, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
++ AUXDATA_SCIFB(3, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
++ AUXDATA_SCIFB(4, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
++ AUXDATA_SCIFA(5, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
++ AUXDATA_SCIF(6, 0xe6e60000, gic_spi(152)), /* SCIF0 */
++ AUXDATA_SCIF(7, 0xe6e68000, gic_spi(153)), /* SCIF1 */
++ AUXDATA_HSCIF(8, 0xe62c0000, gic_spi(154)), /* HSCIF0 */
++ AUXDATA_HSCIF(9, 0xe62c8000, gic_spi(155)), /* HSCIF1 */
++ AUXDATA_SCIF(10, 0xe6e58000, gic_spi(22)), /* SCIF2 */
++ AUXDATA_SCIF(11, 0xe6ea8000, gic_spi(23)), /* SCIF3 */
++ AUXDATA_SCIF(12, 0xe6ee0000, gic_spi(24)), /* SCIF4 */
++ AUXDATA_SCIF(13, 0xe6ee8000, gic_spi(25)), /* SCIF5 */
++ AUXDATA_SCIFA(14, 0xe6c70000, gic_spi(29)), /* SCIFA3 */
++ AUXDATA_SCIFA(15, 0xe6c78000, gic_spi(30)), /* SCIFA4 */
++ AUXDATA_SCIFA(16, 0xe6c80000, gic_spi(31)), /* SCIFA5 */
++ AUXDATA_HSCIF(17, 0xe6cd0000, gic_spi(21)), /* HSCIF2 */
++ OF_DEV_AUXDATA("renesas,msiof-r8a7791", 0xe6e20000,
++ "spi_r8a7791_msiof.0", &msiof0_info),
++ {},
++};
++
++static void __init porter_add_standard_devices(void)
++{
++ shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
++ shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
++ r8a7791_add_dt_devices();
++ porter_add_dmac_prototype();
++#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
++ porter_add_usb_dmac_prototype();
++#endif
++ of_platform_populate(NULL, of_default_bus_match_table,
++ porter_auxdata_lookup, NULL);
++
++ porter_add_du_device();
++ porter_add_usb_devices();
++ porter_add_rsnd_device();
++ porter_add_camera0_device();
++#if IS_ENABLED(CONFIG_VIDEO_RENESAS_VSP1)
++ porter_add_vsp1_devices();
++#endif
++ porter_add_msiof_device(spi_bus, ARRAY_SIZE(spi_bus));
++}
++
++static const char * const porter_boards_compat_dt[] __initconst = {
++ "renesas,porter",
++ "renesas,porter-reference",
++ NULL,
++};
++
++DT_MACHINE_START(PORTER_DT, "porter")
++ .smp = smp_ops(r8a7791_smp_ops),
++ .init_early = shmobile_init_delay,
++ .init_time = rcar_gen2_timer_init,
++ .init_machine = porter_add_standard_devices,
++ .init_late = shmobile_init_late,
++ .reserve = rcar_gen2_reserve,
++ .restart = porter_restart,
++ .dt_compat = porter_boards_compat_dt,
++MACHINE_END
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0009-shmobile-add-atag-dtb-compat.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0009-shmobile-add-atag-dtb-compat.patch
new file mode 100644
index 0000000..8b6935f
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0009-shmobile-add-atag-dtb-compat.patch
@@ -0,0 +1,26 @@
+From 80644cc053765ec9ea7c509acad7cfd819ea25f5 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Wed, 11 Feb 2015 15:19:56 +0300
+Subject: [PATCH] Add ATAG DTB compatibility
+
+This is useful when DTB is static
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+
+---
+ arch/arm/configs/shmobile_defconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+Index: renesas-backport.v0/arch/arm/configs/shmobile_defconfig
+===================================================================
+--- renesas-backport.v0.orig/arch/arm/configs/shmobile_defconfig 2015-01-28 12:21:43.823500578 +0300
++++ renesas-backport.v0/arch/arm/configs/shmobile_defconfig 2015-02-11 14:33:34.864892464 +0300
+@@ -52,6 +52,8 @@
+ CONFIG_ZBOOT_ROM_TEXT=0x0
+ CONFIG_ZBOOT_ROM_BSS=0x0
+ CONFIG_ARM_APPENDED_DTB=y
++CONFIG_ARM_ATAG_DTB_COMPAT=y
++CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
+ CONFIG_KEXEC=y
+ CONFIG_CPU_FREQ=y
+ CONFIG_CPU_FREQ_STAT_DETAILS=y
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0010-Silk-Add-missing-pins-handle-to-Eth.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0010-Silk-Add-missing-pins-handle-to-Eth.patch
new file mode 100644
index 0000000..22742ea
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0010-Silk-Add-missing-pins-handle-to-Eth.patch
@@ -0,0 +1,43 @@
+From 4369d6e8d6c7068f6d570701afd87fb0e3b50495 Mon Sep 17 00:00:00 2001
+From: Valentine Barshak <valentine.barshak@cogentembedded.com>
+Date: Fri, 13 Feb 2015 23:12:41 +0300
+Subject: [PATCH] ARM: dts: r8a7794-silk: Add missing pins handle to
+ Ethernet node
+
+This adds missing pins handle to the Ethernet node.
+
+Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+---
+ arch/arm/boot/dts/r8a7794-silk.dts | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
+index dc04673..9775aba 100644
+--- a/arch/arm/boot/dts/r8a7794-silk.dts
++++ b/arch/arm/boot/dts/r8a7794-silk.dts
+@@ -239,6 +239,11 @@
+ renesas,function = "eth";
+ };
+
++ phy1_pins: phy1 {
++ renesas,groups = "intc_irq8";
++ renesas,function = "intc";
++ };
++
+ qspi_pins: spi0 {
+ renesas,groups = "qspi_ctrl", "qspi_data4";
+ renesas,function = "qspi";
+@@ -286,6 +291,9 @@
+ };
+
+ &ether {
++ pinctrl-0 = <&ether_pins &phy1_pins>;
++ pinctrl-names = "default";
++
+ phy-handle = <&phy1>;
+ renesas,ether-link-active-low;
+ status = "ok";
+--
+1.9.3
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0011-Silk-Add-missing-DU-pins.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0011-Silk-Add-missing-DU-pins.patch
new file mode 100644
index 0000000..791b1a8
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0011-Silk-Add-missing-DU-pins.patch
@@ -0,0 +1,49 @@
+From 78aac9e8fbd6b5463554990e055302074a7fc485 Mon Sep 17 00:00:00 2001
+From: Valentine Barshak <valentine.barshak@cogentembedded.com>
+Date: Fri, 13 Feb 2015 06:01:51 +0300
+Subject: [PATCH] ARM: dts: r8a7794-silk: Add missing DU pins
+
+This adds missing DU pins to R8A7794 SILK device tree.
+
+Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
+---
+ arch/arm/boot/dts/r8a7794-silk.dts | 16 +++++++++++++---
+ 1 file changed, 13 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
+index f6994c9..dc04673 100644
+--- a/arch/arm/boot/dts/r8a7794-silk.dts
++++ b/arch/arm/boot/dts/r8a7794-silk.dts
+@@ -209,16 +209,26 @@
+ };
+
+ &pfc {
+- pinctrl-0 = <&du_pins &usb0_pins &usb1_pins &sound_pins &sound_clk_pins
++ pinctrl-0 = <&du_pins &du0_pins &du1_pins &usb0_pins &usb1_pins &sound_pins &sound_clk_pins
+ &vin0_pins>;
+ pinctrl-names = "default";
+
+ du_pins: du {
+- renesas,groups = "du0_rgb888", "du0_sync", "du0_clk_out",
+- "du1_rgb666", "du1_sync", "du1_clk_out";
++ renesas,groups = "du0_rgb888", "du0_sync", "du0_clk_out", "du0_cde_disp",
++ "du1_rgb666", "du1_sync", "du1_clk_out", "du1_cde_disp";
+ renesas,function = "du";
+ };
+
++ du0_pins: du0 {
++ renesas,groups = "du0_clk_in";
++ renesas,function = "du0";
++ };
++
++ du1_pins: du1 {
++ renesas,groups = "du1_clk_in";
++ renesas,function = "du1";
++ };
++
+ i2c0_pins: i2c0 {
+ renesas,groups = "i2c0_d";
+ renesas,function = "i2c0";
+--
+1.9.3
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0012-can-add-Renesas-R-Car-CAN-driver.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0012-can-add-Renesas-R-Car-CAN-driver.patch
new file mode 100644
index 0000000..55450c0
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0012-can-add-Renesas-R-Car-CAN-driver.patch
@@ -0,0 +1,958 @@
+From fd1159318e55e901cf269de90163b19fd62938cb Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 17 May 2014 00:03:54 +0400
+Subject: [PATCH] can: add Renesas R-Car CAN driver
+
+Add support for the CAN controller found in Renesas R-Car SoCs.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
+---
+ drivers/net/can/Kconfig | 10 +
+ drivers/net/can/Makefile | 1 +
+ drivers/net/can/rcar_can.c | 876 ++++++++++++++++++++++++++++++++++
+ include/linux/can/platform/rcar_can.h | 17 +
+ 4 files changed, 904 insertions(+)
+ create mode 100644 drivers/net/can/rcar_can.c
+ create mode 100644 include/linux/can/platform/rcar_can.h
+
+diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
+index ac67afa..714b187 100644
+--- a/drivers/net/can/Kconfig
++++ b/drivers/net/can/Kconfig
+@@ -119,6 +119,16 @@ config CAN_GRCAN
+ endian syntheses of the cores would need some modifications on
+ the hardware level to work.
+
++config CAN_RCAR
++ tristate "Renesas R-Car CAN controller"
++ depends on ARM
++ ---help---
++ Say Y here if you want to use CAN controller found on Renesas R-Car
++ SoCs.
++
++ To compile this driver as a module, choose M here: the module will
++ be called rcar_can.
++
+ source "drivers/net/can/mscan/Kconfig"
+
+ source "drivers/net/can/sja1000/Kconfig"
+diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile
+index c420588..90f538c 100644
+--- a/drivers/net/can/Makefile
++++ b/drivers/net/can/Makefile
+@@ -25,5 +25,6 @@ obj-$(CONFIG_CAN_JANZ_ICAN3) += janz-ican3.o
+ obj-$(CONFIG_CAN_FLEXCAN) += flexcan.o
+ obj-$(CONFIG_PCH_CAN) += pch_can.o
+ obj-$(CONFIG_CAN_GRCAN) += grcan.o
++obj-$(CONFIG_CAN_RCAR) += rcar_can.o
+
+ ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
+diff --git a/drivers/net/can/rcar_can.c b/drivers/net/can/rcar_can.c
+new file mode 100644
+index 0000000..5268d21
+--- /dev/null
++++ b/drivers/net/can/rcar_can.c
+@@ -0,0 +1,876 @@
++/* Renesas R-Car CAN device driver
++ *
++ * Copyright (C) 2013 Cogent Embedded, Inc. <source@cogentembedded.com>
++ * Copyright (C) 2013 Renesas Solutions Corp.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 of the License, or (at your
++ * option) any later version.
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/errno.h>
++#include <linux/netdevice.h>
++#include <linux/platform_device.h>
++#include <linux/can/led.h>
++#include <linux/can/dev.h>
++#include <linux/clk.h>
++#include <linux/can/platform/rcar_can.h>
++
++#define RCAR_CAN_DRV_NAME "rcar_can"
++
++/* Mailbox configuration:
++ * mailbox 60 - 63 - Rx FIFO mailboxes
++ * mailbox 56 - 59 - Tx FIFO mailboxes
++ * non-FIFO mailboxes are not used
++ */
++#define RCAR_CAN_N_MBX 64 /* Number of mailboxes in non-FIFO mode */
++#define RCAR_CAN_RX_FIFO_MBX 60 /* Mailbox - window to Rx FIFO */
++#define RCAR_CAN_TX_FIFO_MBX 56 /* Mailbox - window to Tx FIFO */
++#define RCAR_CAN_FIFO_DEPTH 4
++
++/* Mailbox registers structure */
++struct rcar_can_mbox_regs {
++ u32 id; /* IDE and RTR bits, SID and EID */
++ u8 stub; /* Not used */
++ u8 dlc; /* Data Length Code - bits [0..3] */
++ u8 data[8]; /* Data Bytes */
++ u8 tsh; /* Time Stamp Higher Byte */
++ u8 tsl; /* Time Stamp Lower Byte */
++};
++
++struct rcar_can_regs {
++ struct rcar_can_mbox_regs mb[RCAR_CAN_N_MBX]; /* Mailbox registers */
++ u32 mkr_2_9[8]; /* Mask Registers 2-9 */
++ u32 fidcr[2]; /* FIFO Received ID Compare Register */
++ u32 mkivlr1; /* Mask Invalid Register 1 */
++ u32 mier1; /* Mailbox Interrupt Enable Register 1 */
++ u32 mkr_0_1[2]; /* Mask Registers 0-1 */
++ u32 mkivlr0; /* Mask Invalid Register 0*/
++ u32 mier0; /* Mailbox Interrupt Enable Register 0 */
++ u8 pad_440[0x3c0];
++ u8 mctl[64]; /* Message Control Registers */
++ u16 ctlr; /* Control Register */
++ u16 str; /* Status register */
++ u8 bcr[3]; /* Bit Configuration Register */
++ u8 clkr; /* Clock Select Register */
++ u8 rfcr; /* Receive FIFO Control Register */
++ u8 rfpcr; /* Receive FIFO Pointer Control Register */
++ u8 tfcr; /* Transmit FIFO Control Register */
++ u8 tfpcr; /* Transmit FIFO Pointer Control Register */
++ u8 eier; /* Error Interrupt Enable Register */
++ u8 eifr; /* Error Interrupt Factor Judge Register */
++ u8 recr; /* Receive Error Count Register */
++ u8 tecr; /* Transmit Error Count Register */
++ u8 ecsr; /* Error Code Store Register */
++ u8 cssr; /* Channel Search Support Register */
++ u8 mssr; /* Mailbox Search Status Register */
++ u8 msmr; /* Mailbox Search Mode Register */
++ u16 tsr; /* Time Stamp Register */
++ u8 afsr; /* Acceptance Filter Support Register */
++ u8 pad_857;
++ u8 tcr; /* Test Control Register */
++ u8 pad_859[7];
++ u8 ier; /* Interrupt Enable Register */
++ u8 isr; /* Interrupt Status Register */
++ u8 pad_862;
++ u8 mbsmr; /* Mailbox Search Mask Register */
++};
++
++struct rcar_can_priv {
++ struct can_priv can; /* Must be the first member! */
++ struct net_device *ndev;
++ struct napi_struct napi;
++ struct rcar_can_regs __iomem *regs;
++ struct clk *clk;
++ u8 tx_dlc[RCAR_CAN_FIFO_DEPTH];
++ u32 tx_head;
++ u32 tx_tail;
++ u8 clock_select;
++ u8 ier;
++};
++
++static const struct can_bittiming_const rcar_can_bittiming_const = {
++ .name = RCAR_CAN_DRV_NAME,
++ .tseg1_min = 4,
++ .tseg1_max = 16,
++ .tseg2_min = 2,
++ .tseg2_max = 8,
++ .sjw_max = 4,
++ .brp_min = 1,
++ .brp_max = 1024,
++ .brp_inc = 1,
++};
++
++/* Control Register bits */
++#define RCAR_CAN_CTLR_BOM (3 << 11) /* Bus-Off Recovery Mode Bits */
++#define RCAR_CAN_CTLR_BOM_ENT (1 << 11) /* Entry to halt mode */
++ /* at bus-off entry */
++#define RCAR_CAN_CTLR_SLPM (1 << 10)
++#define RCAR_CAN_CTLR_CANM (3 << 8) /* Operating Mode Select Bit */
++#define RCAR_CAN_CTLR_CANM_HALT (1 << 9)
++#define RCAR_CAN_CTLR_CANM_RESET (1 << 8)
++#define RCAR_CAN_CTLR_CANM_FORCE_RESET (3 << 8)
++#define RCAR_CAN_CTLR_MLM (1 << 3) /* Message Lost Mode Select */
++#define RCAR_CAN_CTLR_IDFM (3 << 1) /* ID Format Mode Select Bits */
++#define RCAR_CAN_CTLR_IDFM_MIXED (1 << 2) /* Mixed ID mode */
++#define RCAR_CAN_CTLR_MBM (1 << 0) /* Mailbox Mode select */
++
++/* Status Register bits */
++#define RCAR_CAN_STR_RSTST (1 << 8) /* Reset Status Bit */
++
++/* FIFO Received ID Compare Registers 0 and 1 bits */
++#define RCAR_CAN_FIDCR_IDE (1 << 31) /* ID Extension Bit */
++#define RCAR_CAN_FIDCR_RTR (1 << 30) /* Remote Transmission Request Bit */
++
++/* Receive FIFO Control Register bits */
++#define RCAR_CAN_RFCR_RFEST (1 << 7) /* Receive FIFO Empty Status Flag */
++#define RCAR_CAN_RFCR_RFE (1 << 0) /* Receive FIFO Enable */
++
++/* Transmit FIFO Control Register bits */
++#define RCAR_CAN_TFCR_TFUST (7 << 1) /* Transmit FIFO Unsent Message */
++ /* Number Status Bits */
++#define RCAR_CAN_TFCR_TFUST_SHIFT 1 /* Offset of Transmit FIFO Unsent */
++ /* Message Number Status Bits */
++#define RCAR_CAN_TFCR_TFE (1 << 0) /* Transmit FIFO Enable */
++
++#define RCAR_CAN_N_RX_MKREGS1 2 /* Number of mask registers */
++ /* for Rx mailboxes 0-31 */
++#define RCAR_CAN_N_RX_MKREGS2 8
++
++/* Bit Configuration Register settings */
++#define RCAR_CAN_BCR_TSEG1(x) (((x) & 0x0f) << 20)
++#define RCAR_CAN_BCR_BPR(x) (((x) & 0x3ff) << 8)
++#define RCAR_CAN_BCR_SJW(x) (((x) & 0x3) << 4)
++#define RCAR_CAN_BCR_TSEG2(x) ((x) & 0x07)
++
++/* Mailbox and Mask Registers bits */
++#define RCAR_CAN_IDE (1 << 31)
++#define RCAR_CAN_RTR (1 << 30)
++#define RCAR_CAN_SID_SHIFT 18
++
++/* Mailbox Interrupt Enable Register 1 bits */
++#define RCAR_CAN_MIER1_RXFIE (1 << 28) /* Receive FIFO Interrupt Enable */
++#define RCAR_CAN_MIER1_TXFIE (1 << 24) /* Transmit FIFO Interrupt Enable */
++
++/* Interrupt Enable Register bits */
++#define RCAR_CAN_IER_ERSIE (1 << 5) /* Error (ERS) Interrupt Enable Bit */
++#define RCAR_CAN_IER_RXFIE (1 << 4) /* Reception FIFO Interrupt */
++ /* Enable Bit */
++#define RCAR_CAN_IER_TXFIE (1 << 3) /* Transmission FIFO Interrupt */
++ /* Enable Bit */
++/* Interrupt Status Register bits */
++#define RCAR_CAN_ISR_ERSF (1 << 5) /* Error (ERS) Interrupt Status Bit */
++#define RCAR_CAN_ISR_RXFF (1 << 4) /* Reception FIFO Interrupt */
++ /* Status Bit */
++#define RCAR_CAN_ISR_TXFF (1 << 3) /* Transmission FIFO Interrupt */
++ /* Status Bit */
++
++/* Error Interrupt Enable Register bits */
++#define RCAR_CAN_EIER_BLIE (1 << 7) /* Bus Lock Interrupt Enable */
++#define RCAR_CAN_EIER_OLIE (1 << 6) /* Overload Frame Transmit */
++ /* Interrupt Enable */
++#define RCAR_CAN_EIER_ORIE (1 << 5) /* Receive Overrun Interrupt Enable */
++#define RCAR_CAN_EIER_BORIE (1 << 4) /* Bus-Off Recovery Interrupt Enable */
++#define RCAR_CAN_EIER_BOEIE (1 << 3) /* Bus-Off Entry Interrupt Enable */
++#define RCAR_CAN_EIER_EPIE (1 << 2) /* Error Passive Interrupt Enable */
++#define RCAR_CAN_EIER_EWIE (1 << 1) /* Error Warning Interrupt Enable */
++#define RCAR_CAN_EIER_BEIE (1 << 0) /* Bus Error Interrupt Enable */
++
++/* Error Interrupt Factor Judge Register bits */
++#define RCAR_CAN_EIFR_BLIF (1 << 7) /* Bus Lock Detect Flag */
++#define RCAR_CAN_EIFR_OLIF (1 << 6) /* Overload Frame Transmission */
++ /* Detect Flag */
++#define RCAR_CAN_EIFR_ORIF (1 << 5) /* Receive Overrun Detect Flag */
++#define RCAR_CAN_EIFR_BORIF (1 << 4) /* Bus-Off Recovery Detect Flag */
++#define RCAR_CAN_EIFR_BOEIF (1 << 3) /* Bus-Off Entry Detect Flag */
++#define RCAR_CAN_EIFR_EPIF (1 << 2) /* Error Passive Detect Flag */
++#define RCAR_CAN_EIFR_EWIF (1 << 1) /* Error Warning Detect Flag */
++#define RCAR_CAN_EIFR_BEIF (1 << 0) /* Bus Error Detect Flag */
++
++/* Error Code Store Register bits */
++#define RCAR_CAN_ECSR_EDPM (1 << 7) /* Error Display Mode Select Bit */
++#define RCAR_CAN_ECSR_ADEF (1 << 6) /* ACK Delimiter Error Flag */
++#define RCAR_CAN_ECSR_BE0F (1 << 5) /* Bit Error (dominant) Flag */
++#define RCAR_CAN_ECSR_BE1F (1 << 4) /* Bit Error (recessive) Flag */
++#define RCAR_CAN_ECSR_CEF (1 << 3) /* CRC Error Flag */
++#define RCAR_CAN_ECSR_AEF (1 << 2) /* ACK Error Flag */
++#define RCAR_CAN_ECSR_FEF (1 << 1) /* Form Error Flag */
++#define RCAR_CAN_ECSR_SEF (1 << 0) /* Stuff Error Flag */
++
++#define RCAR_CAN_NAPI_WEIGHT 4
++#define MAX_STR_READS 0x100
++
++static void tx_failure_cleanup(struct net_device *ndev)
++{
++ int i;
++
++ for (i = 0; i < RCAR_CAN_FIFO_DEPTH; i++)
++ can_free_echo_skb(ndev, i);
++}
++
++static void rcar_can_error(struct net_device *ndev)
++{
++ struct rcar_can_priv *priv = netdev_priv(ndev);
++ struct net_device_stats *stats = &ndev->stats;
++ struct can_frame *cf;
++ struct sk_buff *skb;
++ u8 eifr, txerr = 0, rxerr = 0;
++
++ /* Propagate the error condition to the CAN stack */
++ skb = alloc_can_err_skb(ndev, &cf);
++
++ eifr = readb(&priv->regs->eifr);
++ if (eifr & (RCAR_CAN_EIFR_EWIF | RCAR_CAN_EIFR_EPIF)) {
++ txerr = readb(&priv->regs->tecr);
++ rxerr = readb(&priv->regs->recr);
++ if (skb) {
++ cf->can_id |= CAN_ERR_CRTL;
++ cf->data[6] = txerr;
++ cf->data[7] = rxerr;
++ }
++ }
++ if (eifr & RCAR_CAN_EIFR_BEIF) {
++ int rx_errors = 0, tx_errors = 0;
++ u8 ecsr;
++
++ netdev_dbg(priv->ndev, "Bus error interrupt:\n");
++ if (skb) {
++ cf->can_id |= CAN_ERR_BUSERROR | CAN_ERR_PROT;
++ cf->data[2] = CAN_ERR_PROT_UNSPEC;
++ }
++ ecsr = readb(&priv->regs->ecsr);
++ if (ecsr & RCAR_CAN_ECSR_ADEF) {
++ netdev_dbg(priv->ndev, "ACK Delimiter Error\n");
++ tx_errors++;
++ writeb(~RCAR_CAN_ECSR_ADEF, &priv->regs->ecsr);
++ if (skb)
++ cf->data[3] |= CAN_ERR_PROT_LOC_ACK_DEL;
++ }
++ if (ecsr & RCAR_CAN_ECSR_BE0F) {
++ netdev_dbg(priv->ndev, "Bit Error (dominant)\n");
++ tx_errors++;
++ writeb(~RCAR_CAN_ECSR_BE0F, &priv->regs->ecsr);
++ if (skb)
++ cf->data[2] |= CAN_ERR_PROT_BIT0;
++ }
++ if (ecsr & RCAR_CAN_ECSR_BE1F) {
++ netdev_dbg(priv->ndev, "Bit Error (recessive)\n");
++ tx_errors++;
++ writeb(~RCAR_CAN_ECSR_BE1F, &priv->regs->ecsr);
++ if (skb)
++ cf->data[2] |= CAN_ERR_PROT_BIT1;
++ }
++ if (ecsr & RCAR_CAN_ECSR_CEF) {
++ netdev_dbg(priv->ndev, "CRC Error\n");
++ rx_errors++;
++ writeb(~RCAR_CAN_ECSR_CEF, &priv->regs->ecsr);
++ if (skb)
++ cf->data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;
++ }
++ if (ecsr & RCAR_CAN_ECSR_AEF) {
++ netdev_dbg(priv->ndev, "ACK Error\n");
++ tx_errors++;
++ writeb(~RCAR_CAN_ECSR_AEF, &priv->regs->ecsr);
++ if (skb) {
++ cf->can_id |= CAN_ERR_ACK;
++ cf->data[3] |= CAN_ERR_PROT_LOC_ACK;
++ }
++ }
++ if (ecsr & RCAR_CAN_ECSR_FEF) {
++ netdev_dbg(priv->ndev, "Form Error\n");
++ rx_errors++;
++ writeb(~RCAR_CAN_ECSR_FEF, &priv->regs->ecsr);
++ if (skb)
++ cf->data[2] |= CAN_ERR_PROT_FORM;
++ }
++ if (ecsr & RCAR_CAN_ECSR_SEF) {
++ netdev_dbg(priv->ndev, "Stuff Error\n");
++ rx_errors++;
++ writeb(~RCAR_CAN_ECSR_SEF, &priv->regs->ecsr);
++ if (skb)
++ cf->data[2] |= CAN_ERR_PROT_STUFF;
++ }
++
++ priv->can.can_stats.bus_error++;
++ ndev->stats.rx_errors += rx_errors;
++ ndev->stats.tx_errors += tx_errors;
++ writeb(~RCAR_CAN_EIFR_BEIF, &priv->regs->eifr);
++ }
++ if (eifr & RCAR_CAN_EIFR_EWIF) {
++ netdev_dbg(priv->ndev, "Error warning interrupt\n");
++ priv->can.state = CAN_STATE_ERROR_WARNING;
++ priv->can.can_stats.error_warning++;
++ /* Clear interrupt condition */
++ writeb(~RCAR_CAN_EIFR_EWIF, &priv->regs->eifr);
++ if (skb)
++ cf->data[1] = txerr > rxerr ? CAN_ERR_CRTL_TX_WARNING :
++ CAN_ERR_CRTL_RX_WARNING;
++ }
++ if (eifr & RCAR_CAN_EIFR_EPIF) {
++ netdev_dbg(priv->ndev, "Error passive interrupt\n");
++ priv->can.state = CAN_STATE_ERROR_PASSIVE;
++ priv->can.can_stats.error_passive++;
++ /* Clear interrupt condition */
++ writeb(~RCAR_CAN_EIFR_EPIF, &priv->regs->eifr);
++ if (skb)
++ cf->data[1] = txerr > rxerr ? CAN_ERR_CRTL_TX_PASSIVE :
++ CAN_ERR_CRTL_RX_PASSIVE;
++ }
++ if (eifr & RCAR_CAN_EIFR_BOEIF) {
++ netdev_dbg(priv->ndev, "Bus-off entry interrupt\n");
++ tx_failure_cleanup(ndev);
++ priv->ier = RCAR_CAN_IER_ERSIE;
++ writeb(priv->ier, &priv->regs->ier);
++ priv->can.state = CAN_STATE_BUS_OFF;
++ /* Clear interrupt condition */
++ writeb(~RCAR_CAN_EIFR_BOEIF, &priv->regs->eifr);
++ can_bus_off(ndev);
++ if (skb)
++ cf->can_id |= CAN_ERR_BUSOFF;
++ }
++ if (eifr & RCAR_CAN_EIFR_ORIF) {
++ netdev_dbg(priv->ndev, "Receive overrun error interrupt\n");
++ ndev->stats.rx_over_errors++;
++ ndev->stats.rx_errors++;
++ writeb(~RCAR_CAN_EIFR_ORIF, &priv->regs->eifr);
++ if (skb) {
++ cf->can_id |= CAN_ERR_CRTL;
++ cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
++ }
++ }
++ if (eifr & RCAR_CAN_EIFR_OLIF) {
++ netdev_dbg(priv->ndev,
++ "Overload Frame Transmission error interrupt\n");
++ ndev->stats.rx_over_errors++;
++ ndev->stats.rx_errors++;
++ writeb(~RCAR_CAN_EIFR_OLIF, &priv->regs->eifr);
++ if (skb) {
++ cf->can_id |= CAN_ERR_PROT;
++ cf->data[2] |= CAN_ERR_PROT_OVERLOAD;
++ }
++ }
++
++ if (skb) {
++ stats->rx_packets++;
++ stats->rx_bytes += cf->can_dlc;
++ netif_rx(skb);
++ }
++}
++
++static void rcar_can_tx_done(struct net_device *ndev)
++{
++ struct rcar_can_priv *priv = netdev_priv(ndev);
++ struct net_device_stats *stats = &ndev->stats;
++ u8 isr;
++
++ while (1) {
++ u8 unsent = readb(&priv->regs->tfcr);
++
++ unsent = (unsent & RCAR_CAN_TFCR_TFUST) >>
++ RCAR_CAN_TFCR_TFUST_SHIFT;
++ if (priv->tx_head - priv->tx_tail <= unsent)
++ break;
++ stats->tx_packets++;
++ stats->tx_bytes += priv->tx_dlc[priv->tx_tail %
++ RCAR_CAN_FIFO_DEPTH];
++ priv->tx_dlc[priv->tx_tail % RCAR_CAN_FIFO_DEPTH] = 0;
++ can_get_echo_skb(ndev, priv->tx_tail % RCAR_CAN_FIFO_DEPTH);
++ priv->tx_tail++;
++ netif_wake_queue(ndev);
++ }
++ /* Clear interrupt */
++ isr = readb(&priv->regs->isr);
++ writeb(isr & ~RCAR_CAN_ISR_TXFF, &priv->regs->isr);
++ can_led_event(ndev, CAN_LED_EVENT_TX);
++}
++
++static irqreturn_t rcar_can_interrupt(int irq, void *dev_id)
++{
++ struct net_device *ndev = dev_id;
++ struct rcar_can_priv *priv = netdev_priv(ndev);
++ u8 isr;
++
++ isr = readb(&priv->regs->isr);
++ if (!(isr & priv->ier))
++ return IRQ_NONE;
++
++ if (isr & RCAR_CAN_ISR_ERSF)
++ rcar_can_error(ndev);
++
++ if (isr & RCAR_CAN_ISR_TXFF)
++ rcar_can_tx_done(ndev);
++
++ if (isr & RCAR_CAN_ISR_RXFF) {
++ if (napi_schedule_prep(&priv->napi)) {
++ /* Disable Rx FIFO interrupts */
++ priv->ier &= ~RCAR_CAN_IER_RXFIE;
++ writeb(priv->ier, &priv->regs->ier);
++ __napi_schedule(&priv->napi);
++ }
++ }
++
++ return IRQ_HANDLED;
++}
++
++static void rcar_can_set_bittiming(struct net_device *dev)
++{
++ struct rcar_can_priv *priv = netdev_priv(dev);
++ struct can_bittiming *bt = &priv->can.bittiming;
++ u32 bcr;
++
++ bcr = RCAR_CAN_BCR_TSEG1(bt->phase_seg1 + bt->prop_seg - 1) |
++ RCAR_CAN_BCR_BPR(bt->brp - 1) | RCAR_CAN_BCR_SJW(bt->sjw - 1) |
++ RCAR_CAN_BCR_TSEG2(bt->phase_seg2 - 1);
++ /* Don't overwrite CLKR with 32-bit BCR access; CLKR has 8-bit access.
++ * All the registers are big-endian but they get byte-swapped on 32-bit
++ * read/write (but not on 8-bit, contrary to the manuals)...
++ */
++ writel((bcr << 8) | priv->clock_select, &priv->regs->bcr);
++}
++
++static void rcar_can_start(struct net_device *ndev)
++{
++ struct rcar_can_priv *priv = netdev_priv(ndev);
++ u16 ctlr;
++ int i;
++
++ /* Set controller to known mode:
++ * - FIFO mailbox mode
++ * - accept all messages
++ * - overrun mode
++ * CAN is in sleep mode after MCU hardware or software reset.
++ */
++ ctlr = readw(&priv->regs->ctlr);
++ ctlr &= ~RCAR_CAN_CTLR_SLPM;
++ writew(ctlr, &priv->regs->ctlr);
++ /* Go to reset mode */
++ ctlr |= RCAR_CAN_CTLR_CANM_FORCE_RESET;
++ writew(ctlr, &priv->regs->ctlr);
++ for (i = 0; i < MAX_STR_READS; i++) {
++ if (readw(&priv->regs->str) & RCAR_CAN_STR_RSTST)
++ break;
++ }
++ rcar_can_set_bittiming(ndev);
++ ctlr |= RCAR_CAN_CTLR_IDFM_MIXED; /* Select mixed ID mode */
++ ctlr |= RCAR_CAN_CTLR_BOM_ENT; /* Entry to halt mode automatically */
++ /* at bus-off */
++ ctlr |= RCAR_CAN_CTLR_MBM; /* Select FIFO mailbox mode */
++ ctlr |= RCAR_CAN_CTLR_MLM; /* Overrun mode */
++ writew(ctlr, &priv->regs->ctlr);
++
++ /* Accept all SID and EID */
++ writel(0, &priv->regs->mkr_2_9[6]);
++ writel(0, &priv->regs->mkr_2_9[7]);
++ /* In FIFO mailbox mode, write "0" to bits 24 to 31 */
++ writel(0, &priv->regs->mkivlr1);
++ /* Accept all frames */
++ writel(0, &priv->regs->fidcr[0]);
++ writel(RCAR_CAN_FIDCR_IDE | RCAR_CAN_FIDCR_RTR, &priv->regs->fidcr[1]);
++ /* Enable and configure FIFO mailbox interrupts */
++ writel(RCAR_CAN_MIER1_RXFIE | RCAR_CAN_MIER1_TXFIE, &priv->regs->mier1);
++
++ priv->ier = RCAR_CAN_IER_ERSIE | RCAR_CAN_IER_RXFIE |
++ RCAR_CAN_IER_TXFIE;
++ writeb(priv->ier, &priv->regs->ier);
++
++ /* Accumulate error codes */
++ writeb(RCAR_CAN_ECSR_EDPM, &priv->regs->ecsr);
++ /* Enable error interrupts */
++ writeb(RCAR_CAN_EIER_EWIE | RCAR_CAN_EIER_EPIE | RCAR_CAN_EIER_BOEIE |
++ (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING ?
++ RCAR_CAN_EIER_BEIE : 0) | RCAR_CAN_EIER_ORIE |
++ RCAR_CAN_EIER_OLIE, &priv->regs->eier);
++ priv->can.state = CAN_STATE_ERROR_ACTIVE;
++
++ /* Go to operation mode */
++ writew(ctlr & ~RCAR_CAN_CTLR_CANM, &priv->regs->ctlr);
++ for (i = 0; i < MAX_STR_READS; i++) {
++ if (!(readw(&priv->regs->str) & RCAR_CAN_STR_RSTST))
++ break;
++ }
++ /* Enable Rx and Tx FIFO */
++ writeb(RCAR_CAN_RFCR_RFE, &priv->regs->rfcr);
++ writeb(RCAR_CAN_TFCR_TFE, &priv->regs->tfcr);
++}
++
++static int rcar_can_open(struct net_device *ndev)
++{
++ struct rcar_can_priv *priv = netdev_priv(ndev);
++ int err;
++
++ err = clk_prepare_enable(priv->clk);
++ if (err) {
++ netdev_err(ndev, "clk_prepare_enable() failed, error %d\n",
++ err);
++ goto out;
++ }
++ err = open_candev(ndev);
++ if (err) {
++ netdev_err(ndev, "open_candev() failed, error %d\n", err);
++ goto out_clock;
++ }
++ napi_enable(&priv->napi);
++ err = request_irq(ndev->irq, rcar_can_interrupt, 0, ndev->name, ndev);
++ if (err) {
++ netdev_err(ndev, "error requesting interrupt %x\n", ndev->irq);
++ goto out_close;
++ }
++ can_led_event(ndev, CAN_LED_EVENT_OPEN);
++ rcar_can_start(ndev);
++ netif_start_queue(ndev);
++ return 0;
++out_close:
++ napi_disable(&priv->napi);
++ close_candev(ndev);
++out_clock:
++ clk_disable_unprepare(priv->clk);
++out:
++ return err;
++}
++
++static void rcar_can_stop(struct net_device *ndev)
++{
++ struct rcar_can_priv *priv = netdev_priv(ndev);
++ u16 ctlr;
++ int i;
++
++ /* Go to (force) reset mode */
++ ctlr = readw(&priv->regs->ctlr);
++ ctlr |= RCAR_CAN_CTLR_CANM_FORCE_RESET;
++ writew(ctlr, &priv->regs->ctlr);
++ for (i = 0; i < MAX_STR_READS; i++) {
++ if (readw(&priv->regs->str) & RCAR_CAN_STR_RSTST)
++ break;
++ }
++ writel(0, &priv->regs->mier0);
++ writel(0, &priv->regs->mier1);
++ writeb(0, &priv->regs->ier);
++ writeb(0, &priv->regs->eier);
++ /* Go to sleep mode */
++ ctlr |= RCAR_CAN_CTLR_SLPM;
++ writew(ctlr, &priv->regs->ctlr);
++ priv->can.state = CAN_STATE_STOPPED;
++}
++
++static int rcar_can_close(struct net_device *ndev)
++{
++ struct rcar_can_priv *priv = netdev_priv(ndev);
++
++ netif_stop_queue(ndev);
++ rcar_can_stop(ndev);
++ free_irq(ndev->irq, ndev);
++ napi_disable(&priv->napi);
++ clk_disable_unprepare(priv->clk);
++ close_candev(ndev);
++ can_led_event(ndev, CAN_LED_EVENT_STOP);
++ return 0;
++}
++
++static netdev_tx_t rcar_can_start_xmit(struct sk_buff *skb,
++ struct net_device *ndev)
++{
++ struct rcar_can_priv *priv = netdev_priv(ndev);
++ struct can_frame *cf = (struct can_frame *)skb->data;
++ u32 data, i;
++
++ if (can_dropped_invalid_skb(ndev, skb))
++ return NETDEV_TX_OK;
++
++ if (cf->can_id & CAN_EFF_FLAG) /* Extended frame format */
++ data = (cf->can_id & CAN_EFF_MASK) | RCAR_CAN_IDE;
++ else /* Standard frame format */
++ data = (cf->can_id & CAN_SFF_MASK) << RCAR_CAN_SID_SHIFT;
++
++ if (cf->can_id & CAN_RTR_FLAG) { /* Remote transmission request */
++ data |= RCAR_CAN_RTR;
++ } else {
++ for (i = 0; i < cf->can_dlc; i++)
++ writeb(cf->data[i],
++ &priv->regs->mb[RCAR_CAN_TX_FIFO_MBX].data[i]);
++ }
++
++ writel(data, &priv->regs->mb[RCAR_CAN_TX_FIFO_MBX].id);
++
++ writeb(cf->can_dlc, &priv->regs->mb[RCAR_CAN_TX_FIFO_MBX].dlc);
++
++ priv->tx_dlc[priv->tx_head % RCAR_CAN_FIFO_DEPTH] = cf->can_dlc;
++ can_put_echo_skb(skb, ndev, priv->tx_head % RCAR_CAN_FIFO_DEPTH);
++ priv->tx_head++;
++ /* Start Tx: write 0xff to the TFPCR register to increment
++ * the CPU-side pointer for the transmit FIFO to the next
++ * mailbox location
++ */
++ writeb(0xff, &priv->regs->tfpcr);
++ /* Stop the queue if we've filled all FIFO entries */
++ if (priv->tx_head - priv->tx_tail >= RCAR_CAN_FIFO_DEPTH)
++ netif_stop_queue(ndev);
++
++ return NETDEV_TX_OK;
++}
++
++static const struct net_device_ops rcar_can_netdev_ops = {
++ .ndo_open = rcar_can_open,
++ .ndo_stop = rcar_can_close,
++ .ndo_start_xmit = rcar_can_start_xmit,
++};
++
++static void rcar_can_rx_pkt(struct rcar_can_priv *priv)
++{
++ struct net_device_stats *stats = &priv->ndev->stats;
++ struct can_frame *cf;
++ struct sk_buff *skb;
++ u32 data;
++ u8 dlc;
++
++ skb = alloc_can_skb(priv->ndev, &cf);
++ if (!skb) {
++ stats->rx_dropped++;
++ return;
++ }
++
++ data = readl(&priv->regs->mb[RCAR_CAN_RX_FIFO_MBX].id);
++ if (data & RCAR_CAN_IDE)
++ cf->can_id = (data & CAN_EFF_MASK) | CAN_EFF_FLAG;
++ else
++ cf->can_id = (data >> RCAR_CAN_SID_SHIFT) & CAN_SFF_MASK;
++
++ dlc = readb(&priv->regs->mb[RCAR_CAN_RX_FIFO_MBX].dlc);
++ cf->can_dlc = get_can_dlc(dlc);
++ if (data & RCAR_CAN_RTR) {
++ cf->can_id |= CAN_RTR_FLAG;
++ } else {
++ for (dlc = 0; dlc < cf->can_dlc; dlc++)
++ cf->data[dlc] =
++ readb(&priv->regs->mb[RCAR_CAN_RX_FIFO_MBX].data[dlc]);
++ }
++
++ can_led_event(priv->ndev, CAN_LED_EVENT_RX);
++
++ stats->rx_bytes += cf->can_dlc;
++ stats->rx_packets++;
++ netif_receive_skb(skb);
++}
++
++static int rcar_can_rx_poll(struct napi_struct *napi, int quota)
++{
++ struct rcar_can_priv *priv = container_of(napi,
++ struct rcar_can_priv, napi);
++ int num_pkts;
++
++ for (num_pkts = 0; num_pkts < quota; num_pkts++) {
++ u8 rfcr, isr;
++
++ isr = readb(&priv->regs->isr);
++ /* Clear interrupt bit */
++ if (isr & RCAR_CAN_ISR_RXFF)
++ writeb(isr & ~RCAR_CAN_ISR_RXFF, &priv->regs->isr);
++ rfcr = readb(&priv->regs->rfcr);
++ if (rfcr & RCAR_CAN_RFCR_RFEST)
++ break;
++ rcar_can_rx_pkt(priv);
++ /* Write 0xff to the RFPCR register to increment
++ * the CPU-side pointer for the receive FIFO
++ * to the next mailbox location
++ */
++ writeb(0xff, &priv->regs->rfpcr);
++ }
++ /* All packets processed */
++ if (num_pkts < quota) {
++ napi_complete(napi);
++ priv->ier |= RCAR_CAN_IER_RXFIE;
++ writeb(priv->ier, &priv->regs->ier);
++ }
++ return num_pkts;
++}
++
++static int rcar_can_do_set_mode(struct net_device *ndev, enum can_mode mode)
++{
++ switch (mode) {
++ case CAN_MODE_START:
++ rcar_can_start(ndev);
++ netif_wake_queue(ndev);
++ return 0;
++ default:
++ return -EOPNOTSUPP;
++ }
++}
++
++static int rcar_can_get_berr_counter(const struct net_device *dev,
++ struct can_berr_counter *bec)
++{
++ struct rcar_can_priv *priv = netdev_priv(dev);
++ int err;
++
++ err = clk_prepare_enable(priv->clk);
++ if (err)
++ return err;
++ bec->txerr = readb(&priv->regs->tecr);
++ bec->rxerr = readb(&priv->regs->recr);
++ clk_disable_unprepare(priv->clk);
++ return 0;
++}
++
++static int rcar_can_probe(struct platform_device *pdev)
++{
++ struct rcar_can_platform_data *pdata;
++ struct rcar_can_priv *priv;
++ struct net_device *ndev;
++ struct resource *mem;
++ void __iomem *addr;
++ int err = -ENODEV;
++ int irq;
++
++ pdata = dev_get_platdata(&pdev->dev);
++ if (!pdata) {
++ dev_err(&pdev->dev, "No platform data provided!\n");
++ goto fail;
++ }
++
++ irq = platform_get_irq(pdev, 0);
++ if (!irq) {
++ dev_err(&pdev->dev, "No IRQ resource\n");
++ goto fail;
++ }
++
++ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ addr = devm_ioremap_resource(&pdev->dev, mem);
++ if (IS_ERR(addr)) {
++ err = PTR_ERR(addr);
++ goto fail;
++ }
++
++ ndev = alloc_candev(sizeof(struct rcar_can_priv), RCAR_CAN_FIFO_DEPTH);
++ if (!ndev) {
++ dev_err(&pdev->dev, "alloc_candev() failed\n");
++ err = -ENOMEM;
++ goto fail;
++ }
++
++ priv = netdev_priv(ndev);
++
++ priv->clk = devm_clk_get(&pdev->dev, NULL);
++ if (IS_ERR(priv->clk)) {
++ err = PTR_ERR(priv->clk);
++ dev_err(&pdev->dev, "cannot get clock: %d\n", err);
++ goto fail_clk;
++ }
++
++ ndev->netdev_ops = &rcar_can_netdev_ops;
++ ndev->irq = irq;
++ ndev->flags |= IFF_ECHO;
++ priv->ndev = ndev;
++ priv->regs = addr;
++ priv->clock_select = pdata->clock_select;
++ priv->can.clock.freq = clk_get_rate(priv->clk);
++ priv->can.bittiming_const = &rcar_can_bittiming_const;
++ priv->can.do_set_mode = rcar_can_do_set_mode;
++ priv->can.do_get_berr_counter = rcar_can_get_berr_counter;
++ priv->can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING;
++ platform_set_drvdata(pdev, ndev);
++ SET_NETDEV_DEV(ndev, &pdev->dev);
++
++ netif_napi_add(ndev, &priv->napi, rcar_can_rx_poll,
++ RCAR_CAN_NAPI_WEIGHT);
++ err = register_candev(ndev);
++ if (err) {
++ dev_err(&pdev->dev, "register_candev() failed, error %d\n",
++ err);
++ goto fail_candev;
++ }
++
++ devm_can_led_init(ndev);
++
++ dev_info(&pdev->dev, "device registered (reg_base=%p, irq=%u)\n",
++ priv->regs, ndev->irq);
++
++ return 0;
++fail_candev:
++ netif_napi_del(&priv->napi);
++fail_clk:
++ free_candev(ndev);
++fail:
++ return err;
++}
++
++static int rcar_can_remove(struct platform_device *pdev)
++{
++ struct net_device *ndev = platform_get_drvdata(pdev);
++ struct rcar_can_priv *priv = netdev_priv(ndev);
++
++ unregister_candev(ndev);
++ netif_napi_del(&priv->napi);
++ free_candev(ndev);
++ return 0;
++}
++
++static int __maybe_unused rcar_can_suspend(struct device *dev)
++{
++ struct net_device *ndev = dev_get_drvdata(dev);
++ struct rcar_can_priv *priv = netdev_priv(ndev);
++ u16 ctlr;
++
++ if (netif_running(ndev)) {
++ netif_stop_queue(ndev);
++ netif_device_detach(ndev);
++ }
++ ctlr = readw(&priv->regs->ctlr);
++ ctlr |= RCAR_CAN_CTLR_CANM_HALT;
++ writew(ctlr, &priv->regs->ctlr);
++ ctlr |= RCAR_CAN_CTLR_SLPM;
++ writew(ctlr, &priv->regs->ctlr);
++ priv->can.state = CAN_STATE_SLEEPING;
++
++ clk_disable(priv->clk);
++ return 0;
++}
++
++static int __maybe_unused rcar_can_resume(struct device *dev)
++{
++ struct net_device *ndev = dev_get_drvdata(dev);
++ struct rcar_can_priv *priv = netdev_priv(ndev);
++ u16 ctlr;
++ int err;
++
++ err = clk_enable(priv->clk);
++ if (err) {
++ netdev_err(ndev, "clk_enable() failed, error %d\n", err);
++ return err;
++ }
++
++ ctlr = readw(&priv->regs->ctlr);
++ ctlr &= ~RCAR_CAN_CTLR_SLPM;
++ writew(ctlr, &priv->regs->ctlr);
++ ctlr &= ~RCAR_CAN_CTLR_CANM;
++ writew(ctlr, &priv->regs->ctlr);
++ priv->can.state = CAN_STATE_ERROR_ACTIVE;
++
++ if (netif_running(ndev)) {
++ netif_device_attach(ndev);
++ netif_start_queue(ndev);
++ }
++ return 0;
++}
++
++static SIMPLE_DEV_PM_OPS(rcar_can_pm_ops, rcar_can_suspend, rcar_can_resume);
++
++static struct platform_driver rcar_can_driver = {
++ .driver = {
++ .name = RCAR_CAN_DRV_NAME,
++ .owner = THIS_MODULE,
++ .pm = &rcar_can_pm_ops,
++ },
++ .probe = rcar_can_probe,
++ .remove = rcar_can_remove,
++};
++
++module_platform_driver(rcar_can_driver);
++
++MODULE_AUTHOR("Cogent Embedded, Inc.");
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("CAN driver for Renesas R-Car SoC");
++MODULE_ALIAS("platform:" RCAR_CAN_DRV_NAME);
+diff --git a/include/linux/can/platform/rcar_can.h b/include/linux/can/platform/rcar_can.h
+new file mode 100644
+index 0000000..0f4a2f3
+--- /dev/null
++++ b/include/linux/can/platform/rcar_can.h
+@@ -0,0 +1,17 @@
++#ifndef _CAN_PLATFORM_RCAR_CAN_H_
++#define _CAN_PLATFORM_RCAR_CAN_H_
++
++#include <linux/types.h>
++
++/* Clock Select Register settings */
++enum CLKR {
++ CLKR_CLKP1 = 0, /* Peripheral clock (clkp1) */
++ CLKR_CLKP2 = 1, /* Peripheral clock (clkp2) */
++ CLKR_CLKEXT = 3 /* Externally input clock */
++};
++
++struct rcar_can_platform_data {
++ enum CLKR clock_select; /* Clock source select */
++};
++
++#endif /* !_CAN_PLATFORM_RCAR_CAN_H_ */
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0013-sh-pfc-r8a7791-add-CAN-pin-groups.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0013-sh-pfc-r8a7791-add-CAN-pin-groups.patch
new file mode 100644
index 0000000..23e74c7
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0013-sh-pfc-r8a7791-add-CAN-pin-groups.patch
@@ -0,0 +1,216 @@
+From 0e9386752758b74fd42fda7cbdd6ccb5cb31033c Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Wed, 2 Jul 2014 00:58:16 +0400
+Subject: [PATCH] sh-pfc: r8a7791: add CAN pin groups
+
+Add CAN0/1 data/clock pin groups to R8A7791 PFC driver.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 167 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 167 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+index 394b234..576d41b 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+@@ -1726,6 +1726,133 @@ static const unsigned int audio_clkout_mux[] = {
+ AUDIO_CLKOUT_MARK,
+ };
+
++/* - CAN -------------------------------------------------------------------- */
++
++static const unsigned int can0_data_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 29),
++};
++
++static const unsigned int can0_data_mux[] = {
++ CAN0_TX_MARK, CAN0_RX_MARK,
++};
++
++static const unsigned int can0_data_b_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(7, 4), RCAR_GP_PIN(7, 3),
++};
++
++static const unsigned int can0_data_b_mux[] = {
++ CAN0_TX_B_MARK, CAN0_RX_B_MARK,
++};
++
++static const unsigned int can0_data_c_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(5, 17), RCAR_GP_PIN(5, 18),
++};
++
++static const unsigned int can0_data_c_mux[] = {
++ CAN0_TX_C_MARK, CAN0_RX_C_MARK,
++};
++
++static const unsigned int can0_data_d_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(2, 26), RCAR_GP_PIN(2, 27),
++};
++
++static const unsigned int can0_data_d_mux[] = {
++ CAN0_TX_D_MARK, CAN0_RX_D_MARK,
++};
++
++static const unsigned int can0_data_e_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 28),
++};
++
++static const unsigned int can0_data_e_mux[] = {
++ CAN0_TX_E_MARK, CAN0_RX_E_MARK,
++};
++
++static const unsigned int can0_data_f_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6),
++};
++
++static const unsigned int can0_data_f_mux[] = {
++ CAN0_TX_F_MARK, CAN0_RX_F_MARK,
++};
++
++static const unsigned int can1_data_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(3, 21), RCAR_GP_PIN(3, 20),
++};
++
++static const unsigned int can1_data_mux[] = {
++ CAN1_TX_MARK, CAN1_RX_MARK,
++};
++
++static const unsigned int can1_data_b_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(7, 8), RCAR_GP_PIN(7, 9),
++};
++
++static const unsigned int can1_data_b_mux[] = {
++ CAN1_TX_B_MARK, CAN1_RX_B_MARK,
++};
++
++static const unsigned int can1_data_c_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(5, 20), RCAR_GP_PIN(5, 19),
++};
++
++static const unsigned int can1_data_c_mux[] = {
++ CAN1_TX_C_MARK, CAN1_RX_C_MARK,
++};
++
++static const unsigned int can1_data_d_pins[] = {
++ /* TX, RX */
++ RCAR_GP_PIN(4, 29), RCAR_GP_PIN(4, 31),
++};
++
++static const unsigned int can1_data_d_mux[] = {
++ CAN1_TX_D_MARK, CAN1_RX_D_MARK,
++};
++
++static const unsigned int can_clk_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(7, 2),
++};
++
++static const unsigned int can_clk_mux[] = {
++ CAN_CLK_MARK,
++};
++
++static const unsigned int can_clk_b_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(5, 21),
++};
++
++static const unsigned int can_clk_b_mux[] = {
++ CAN_CLK_B_MARK,
++};
++
++static const unsigned int can_clk_c_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(4, 30),
++};
++
++static const unsigned int can_clk_c_mux[] = {
++ CAN_CLK_C_MARK,
++};
++
++static const unsigned int can_clk_d_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(7, 19),
++};
++
++static const unsigned int can_clk_d_mux[] = {
++ CAN_CLK_D_MARK,
++};
+
+ /* - DU --------------------------------------------------------------------- */
+ static const unsigned int du_rgb666_pins[] = {
+@@ -4055,6 +4182,20 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(audio_clk_b_b),
+ SH_PFC_PIN_GROUP(audio_clk_c),
+ SH_PFC_PIN_GROUP(audio_clkout),
++ SH_PFC_PIN_GROUP(can0_data),
++ SH_PFC_PIN_GROUP(can0_data_b),
++ SH_PFC_PIN_GROUP(can0_data_c),
++ SH_PFC_PIN_GROUP(can0_data_d),
++ SH_PFC_PIN_GROUP(can0_data_e),
++ SH_PFC_PIN_GROUP(can0_data_f),
++ SH_PFC_PIN_GROUP(can1_data),
++ SH_PFC_PIN_GROUP(can1_data_b),
++ SH_PFC_PIN_GROUP(can1_data_c),
++ SH_PFC_PIN_GROUP(can1_data_d),
++ SH_PFC_PIN_GROUP(can_clk),
++ SH_PFC_PIN_GROUP(can_clk_b),
++ SH_PFC_PIN_GROUP(can_clk_c),
++ SH_PFC_PIN_GROUP(can_clk_d),
+ SH_PFC_PIN_GROUP(du_rgb666),
+ SH_PFC_PIN_GROUP(du_rgb888),
+ SH_PFC_PIN_GROUP(du_clk_out_0),
+@@ -4367,6 +4508,30 @@ static const char * const audio_clk_groups[] = {
+ "audio_clkout",
+ };
+
++static const char * const can0_groups[] = {
++ "can0_data_a",
++ "can0_data_b",
++ "can0_data_c",
++ "can0_data_d",
++ "can0_data_e",
++ "can0_data_f",
++ "can_clk_a",
++ "can_clk_b",
++ "can_clk_c",
++ "can_clk_d",
++};
++
++static const char * const can1_groups[] = {
++ "can1_data_a",
++ "can1_data_b",
++ "can1_data_c",
++ "can1_data_d",
++ "can_clk_a",
++ "can_clk_b",
++ "can_clk_c",
++ "can_clk_d",
++};
++
+ static const char * const du_groups[] = {
+ "du_rgb666",
+ "du_rgb888",
+@@ -4790,6 +4955,8 @@ static const char * const vin2_groups[] = {
+
+ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(audio_clk),
++ SH_PFC_FUNCTION(can0),
++ SH_PFC_FUNCTION(can1),
+ SH_PFC_FUNCTION(du),
+ SH_PFC_FUNCTION(du0),
+ SH_PFC_FUNCTION(du1),
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0014-sh-pfc-r8a7791-fix-CAN-pin-groups.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0014-sh-pfc-r8a7791-fix-CAN-pin-groups.patch
new file mode 100644
index 0000000..65b0fcd
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0014-sh-pfc-r8a7791-fix-CAN-pin-groups.patch
@@ -0,0 +1,52 @@
+From 302fb1781783ded370f515e8e649b8285ee29cdc Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 29 Jul 2014 02:12:55 +0400
+Subject: [PATCH] sh-pfc: r8a7791: fix CAN pin groups
+
+I had made last-minute changes before submitting the patch "sh-pfc: r8a7791:
+add CAN pin groups"; now I'm seeing that they weren't complete: I had missed
+update to the pin group names in pin[01]_groups[]. Drop the "_a" suffixes there.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+index 576d41b..c6e5deb 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+@@ -4509,24 +4509,24 @@ static const char * const audio_clk_groups[] = {
+ };
+
+ static const char * const can0_groups[] = {
+- "can0_data_a",
++ "can0_data",
+ "can0_data_b",
+ "can0_data_c",
+ "can0_data_d",
+ "can0_data_e",
+ "can0_data_f",
+- "can_clk_a",
++ "can_clk",
+ "can_clk_b",
+ "can_clk_c",
+ "can_clk_d",
+ };
+
+ static const char * const can1_groups[] = {
+- "can1_data_a",
++ "can1_data",
+ "can1_data_b",
+ "can1_data_c",
+ "can1_data_d",
+- "can_clk_a",
++ "can_clk",
+ "can_clk_b",
+ "can_clk_c",
+ "can_clk_d",
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0015-can-rcar_can-support-all-input-clocks.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0015-can-rcar_can-support-all-input-clocks.patch
new file mode 100644
index 0000000..65f33af
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0015-can-rcar_can-support-all-input-clocks.patch
@@ -0,0 +1,139 @@
+From 862e2b6af9413b43ef044979b934cab07bfd33e5 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 1 Aug 2014 01:23:32 +0400
+Subject: [PATCH] can: rcar_can: support all input clocks
+
+When writing the driver, I didn't give enough attention to the possible sources
+of the CAN clock: although the value of the CLKR register was specified by the
+platform data, the driver only handled one case, that is CAN clock being
+sourced from the clkp1 clock, the same that clocks the whole CAN module. In
+order to fix that overlook, we'll have to handle the CAN clock separately from
+the peripheral clock (however, clkp1 will be specified for a CAN device only
+once)...
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
+---
+ drivers/net/can/rcar_can.c | 42 ++++++++++++++++++++++++++++++++++++------
+ 1 file changed, 36 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/net/can/rcar_can.c b/drivers/net/can/rcar_can.c
+index 5268d21..c02fcf3 100644
+--- a/drivers/net/can/rcar_can.c
++++ b/drivers/net/can/rcar_can.c
+@@ -87,6 +87,7 @@ struct rcar_can_priv {
+ struct napi_struct napi;
+ struct rcar_can_regs __iomem *regs;
+ struct clk *clk;
++ struct clk *can_clk;
+ u8 tx_dlc[RCAR_CAN_FIFO_DEPTH];
+ u32 tx_head;
+ u32 tx_tail;
+@@ -505,14 +506,20 @@ static int rcar_can_open(struct net_device *ndev)
+
+ err = clk_prepare_enable(priv->clk);
+ if (err) {
+- netdev_err(ndev, "clk_prepare_enable() failed, error %d\n",
++ netdev_err(ndev, "failed to enable periperal clock, error %d\n",
+ err);
+ goto out;
+ }
++ err = clk_prepare_enable(priv->can_clk);
++ if (err) {
++ netdev_err(ndev, "failed to enable CAN clock, error %d\n",
++ err);
++ goto out_clock;
++ }
+ err = open_candev(ndev);
+ if (err) {
+ netdev_err(ndev, "open_candev() failed, error %d\n", err);
+- goto out_clock;
++ goto out_can_clock;
+ }
+ napi_enable(&priv->napi);
+ err = request_irq(ndev->irq, rcar_can_interrupt, 0, ndev->name, ndev);
+@@ -527,6 +534,8 @@ static int rcar_can_open(struct net_device *ndev)
+ out_close:
+ napi_disable(&priv->napi);
+ close_candev(ndev);
++out_can_clock:
++ clk_disable_unprepare(priv->can_clk);
+ out_clock:
+ clk_disable_unprepare(priv->clk);
+ out:
+@@ -565,6 +574,7 @@ static int rcar_can_close(struct net_device *ndev)
+ rcar_can_stop(ndev);
+ free_irq(ndev->irq, ndev);
+ napi_disable(&priv->napi);
++ clk_disable_unprepare(priv->can_clk);
+ clk_disable_unprepare(priv->clk);
+ close_candev(ndev);
+ can_led_event(ndev, CAN_LED_EVENT_STOP);
+@@ -715,6 +725,12 @@ static int rcar_can_get_berr_counter(const struct net_device *dev,
+ return 0;
+ }
+
++static const char * const clock_names[] = {
++ [CLKR_CLKP1] = "clkp1",
++ [CLKR_CLKP2] = "clkp2",
++ [CLKR_CLKEXT] = "can_clk",
++};
++
+ static int rcar_can_probe(struct platform_device *pdev)
+ {
+ struct rcar_can_platform_data *pdata;
+@@ -722,6 +738,7 @@ static int rcar_can_probe(struct platform_device *pdev)
+ struct net_device *ndev;
+ struct resource *mem;
+ void __iomem *addr;
++ u32 clock_select;
+ int err = -ENODEV;
+ int irq;
+
+@@ -730,6 +747,7 @@ static int rcar_can_probe(struct platform_device *pdev)
+ dev_err(&pdev->dev, "No platform data provided!\n");
+ goto fail;
+ }
++ clock_select = pdata->clock_select;
+
+ irq = platform_get_irq(pdev, 0);
+ if (!irq) {
+@@ -753,10 +771,22 @@ static int rcar_can_probe(struct platform_device *pdev)
+
+ priv = netdev_priv(ndev);
+
+- priv->clk = devm_clk_get(&pdev->dev, NULL);
++ priv->clk = devm_clk_get(&pdev->dev, "clkp1");
+ if (IS_ERR(priv->clk)) {
+ err = PTR_ERR(priv->clk);
+- dev_err(&pdev->dev, "cannot get clock: %d\n", err);
++ dev_err(&pdev->dev, "cannot get peripheral clock: %d\n", err);
++ goto fail_clk;
++ }
++
++ if (clock_select >= ARRAY_SIZE(clock_names)) {
++ err = -EINVAL;
++ dev_err(&pdev->dev, "invalid CAN clock selected\n");
++ goto fail_clk;
++ }
++ priv->can_clk = devm_clk_get(&pdev->dev, clock_names[clock_select]);
++ if (IS_ERR(priv->can_clk)) {
++ err = PTR_ERR(priv->can_clk);
++ dev_err(&pdev->dev, "cannot get CAN clock: %d\n", err);
+ goto fail_clk;
+ }
+
+@@ -765,8 +795,8 @@ static int rcar_can_probe(struct platform_device *pdev)
+ ndev->flags |= IFF_ECHO;
+ priv->ndev = ndev;
+ priv->regs = addr;
+- priv->clock_select = pdata->clock_select;
+- priv->can.clock.freq = clk_get_rate(priv->clk);
++ priv->clock_select = clock_select;
++ priv->can.clock.freq = clk_get_rate(priv->can_clk);
+ priv->can.bittiming_const = &rcar_can_bittiming_const;
+ priv->can.do_set_mode = rcar_can_do_set_mode;
+ priv->can.do_get_berr_counter = rcar_can_get_berr_counter;
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0016-can-rcar_can-document-device-tree-bindings.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0016-can-rcar_can-document-device-tree-bindings.patch
new file mode 100644
index 0000000..df8137f
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0016-can-rcar_can-document-device-tree-bindings.patch
@@ -0,0 +1,66 @@
+From 632e25ca722e5361a1b40d89e77808f8f1c6799f Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 1 Aug 2014 01:24:25 +0400
+Subject: [PATCH] can: rcar_can: document device tree bindings
+
+Document the R-Car CAN device tree bindings.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
+---
+ .../devicetree/bindings/net/can/rcar_can.txt | 43 ++++++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/net/can/rcar_can.txt
+
+diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt
+new file mode 100644
+index 0000000..002d844
+--- /dev/null
++++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt
+@@ -0,0 +1,43 @@
++Renesas R-Car CAN controller Device Tree Bindings
++-------------------------------------------------
++
++Required properties:
++- compatible: "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
++ "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
++ "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
++ "renesas,can-r8a7791" if CAN controller is a part of R8A7791 SoC.
++- reg: physical base address and size of the R-Car CAN register map.
++- interrupts: interrupt specifier for the sole interrupt.
++- clocks: phandles and clock specifiers for 3 CAN clock inputs.
++- clock-names: 3 clock input name strings: "clkp1", "clkp2", "can_clk".
++- pinctrl-0: pin control group to be used for this controller.
++- pinctrl-names: must be "default".
++
++Optional properties:
++- renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are:
++ <0x0> (default) : Peripheral clock (clkp1)
++ <0x1> : Peripheral clock (clkp2)
++ <0x3> : Externally input clock
++
++Example
++-------
++
++SoC common .dtsi file:
++
++ can0: can@e6e80000 {
++ compatible = "renesas,can-r8a7791";
++ reg = <0 0xe6e80000 0 0x1000>;
++ interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp9_clks R8A7791_CLK_RCAN0>,
++ <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
++ clock-names = "clkp1", "clkp2", "can_clk";
++ status = "disabled";
++ };
++
++Board specific .dts file:
++
++&can0 {
++ pinctrl-0 = <&can0_pins>;
++ pinctrl-names = "default";
++ status = "okay";
++};
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0017-can-rcar_can-add-device-tree-support.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0017-can-rcar_can-add-device-tree-support.patch
new file mode 100644
index 0000000..716bdbc
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0017-can-rcar_can-add-device-tree-support.patch
@@ -0,0 +1,77 @@
+From a268de6c68e4933234e9ac62f2ab7ff8264ce0b4 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 1 Aug 2014 01:25:53 +0400
+Subject: [PATCH] can: rcar_can: add device tree support
+
+Add support of the device tree probing for the Renesas R-Car CAN controllers.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
+---
+ drivers/net/can/rcar_can.c | 28 ++++++++++++++++++++++------
+ 1 file changed, 22 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/net/can/rcar_can.c b/drivers/net/can/rcar_can.c
+index c02fcf3..1abe133 100644
+--- a/drivers/net/can/rcar_can.c
++++ b/drivers/net/can/rcar_can.c
+@@ -20,6 +20,7 @@
+ #include <linux/can/dev.h>
+ #include <linux/clk.h>
+ #include <linux/can/platform/rcar_can.h>
++#include <linux/of.h>
+
+ #define RCAR_CAN_DRV_NAME "rcar_can"
+
+@@ -738,16 +739,21 @@ static int rcar_can_probe(struct platform_device *pdev)
+ struct net_device *ndev;
+ struct resource *mem;
+ void __iomem *addr;
+- u32 clock_select;
++ u32 clock_select = CLKR_CLKP1;
+ int err = -ENODEV;
+ int irq;
+
+- pdata = dev_get_platdata(&pdev->dev);
+- if (!pdata) {
+- dev_err(&pdev->dev, "No platform data provided!\n");
+- goto fail;
++ if (pdev->dev.of_node) {
++ of_property_read_u32(pdev->dev.of_node,
++ "renesas,can-clock-select", &clock_select);
++ } else {
++ pdata = dev_get_platdata(&pdev->dev);
++ if (!pdata) {
++ dev_err(&pdev->dev, "No platform data provided!\n");
++ goto fail;
++ }
++ clock_select = pdata->clock_select;
+ }
+- clock_select = pdata->clock_select;
+
+ irq = platform_get_irq(pdev, 0);
+ if (!irq) {
+@@ -888,10 +894,20 @@ static int __maybe_unused rcar_can_resume(struct device *dev)
+
+ static SIMPLE_DEV_PM_OPS(rcar_can_pm_ops, rcar_can_suspend, rcar_can_resume);
+
++static const struct of_device_id rcar_can_of_table[] __maybe_unused = {
++ { .compatible = "renesas,can-r8a7778" },
++ { .compatible = "renesas,can-r8a7779" },
++ { .compatible = "renesas,can-r8a7790" },
++ { .compatible = "renesas,can-r8a7791" },
++ { }
++};
++MODULE_DEVICE_TABLE(of, rcar_can_of_table);
++
+ static struct platform_driver rcar_can_driver = {
+ .driver = {
+ .name = RCAR_CAN_DRV_NAME,
+ .owner = THIS_MODULE,
++ .of_match_table = of_match_ptr(rcar_can_of_table),
+ .pm = &rcar_can_pm_ops,
+ },
+ .probe = rcar_can_probe,
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0018-porter-can-support.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0018-porter-can-support.patch
new file mode 100644
index 0000000..e56bda3
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0018-porter-can-support.patch
@@ -0,0 +1,63 @@
+From b73784d861cfff9651936b3d101b1a91ca3550a8 Mon Sep 17 00:00:00 2001
+From: Andrey Dolnikov <andrey.dolnikov@cogentembedded.com>
+Date: Wed, 25 Feb 2015 15:17:46 +0300
+Subject: [PATCH] Porter: Add CAN support.
+
+---
+ arch/arm/boot/dts/r8a7791-porter.dts | 12 ++++++++++++
+ arch/arm/boot/dts/r8a7791.dtsi | 9 +++++++++
+ 2 files changed, 21 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
+index 6a0ccde..4fb5cd5 100644
+--- a/arch/arm/boot/dts/r8a7791-porter.dts
++++ b/arch/arm/boot/dts/r8a7791-porter.dts
+@@ -211,6 +211,11 @@
+ renesas,groups = "vin0_data8", "vin0_clk";
+ renesas,function = "vin0";
+ };
++
++ can0_pins: can0 {
++ renesas,groups = "can0_data_b";
++ renesas,function = "can0";
++ };
+ };
+
+ &ether {
+@@ -229,6 +234,13 @@
+ };
+ };
+
++&can0 {
++ pinctrl-0 = <&can0_pins>;
++ pinctrl-names = "default";
++ renesas,can-clock-select = <0x0>;
++ status = "okay";
++};
++
+ &sata0 {
+ status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 799d41c..1cad41e 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -533,6 +533,15 @@
+ status = "disabled";
+ };
+
++ can0: can@e6e80000 {
++ compatible = "renesas,can-r8a7791";
++ reg = <0 0xe6e80000 0 0x1000>;
++ interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp9_clks R8A7791_CLK_RCAN0>;
++ clock-names = "clkp1", "clkp2", "can_clk";
++ status = "disabled";
++ };
++
+ sata0: sata@ee300000 {
+ compatible = "renesas,sata-r8a7791";
+ reg = <0 0xee300000 0 0x2000>;
+--
+1.9.1
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0019-i2c-busses-rcar-Workaround-arbitration-loss-error.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0019-i2c-busses-rcar-Workaround-arbitration-loss-error.patch
new file mode 100644
index 0000000..209d1b4
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0019-i2c-busses-rcar-Workaround-arbitration-loss-error.patch
@@ -0,0 +1,31 @@
+From 23fa8d125ca1be9c03ac7d2f42530a57d6ca28f2 Mon Sep 17 00:00:00 2001
+From: Valentine Barshak <valentine.barshak@cogentembedded.com>
+Date: Tue, 3 Mar 2015 18:30:16 +0300
+Subject: [PATCH] i2c: busses: rcar: Workaround arbitration loss error
+
+Sometimes I2C master enable/disable at every transmission
+causes arbitration loss errors making the bus unusable.
+Workaround the issue by enabling I2C master
+in the rcar_i2c_init() function.
+
+Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
+---
+ drivers/i2c/busses/i2c-rcar.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index 0e863f3..4334006 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -161,7 +161,7 @@ static void rcar_i2c_init(struct rcar_i2c_priv *priv)
+
+ /* reset master mode */
+ rcar_i2c_write(priv, ICMIER, 0);
+- rcar_i2c_write(priv, ICMCR, 0);
++ rcar_i2c_write(priv, ICMCR, MDBS | MIE);
+ rcar_i2c_write(priv, ICMSR, 0);
+ rcar_i2c_write(priv, ICMAR, 0);
+ }
+--
+1.9.3
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0020-Silk-Remove-I2C1-clock-from-clk_enables.patch b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0020-Silk-Remove-I2C1-clock-from-clk_enables.patch
new file mode 100644
index 0000000..78a3a5b
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas/0020-Silk-Remove-I2C1-clock-from-clk_enables.patch
@@ -0,0 +1,30 @@
+From 6c0691906b3bcce0a9629ca00faa6be88a013aaa Mon Sep 17 00:00:00 2001
+From: Valentine Barshak <valentine.barshak@cogentembedded.com>
+Date: Tue, 3 Mar 2015 18:25:15 +0300
+Subject: [PATCH] ARM: shmobile: silk: Remove I2C1 clock from clk_enables
+ array
+
+Remove I2C1 clock from clk_enables array since it is not needed.
+I2C clocks are handled by the OF driver while shmobile_clk_workaround
+is only needed for platform devices.
+
+Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
+---
+ arch/arm/mach-shmobile/board-silk-reference.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-silk-reference.c b/arch/arm/mach-shmobile/board-silk-reference.c
+index 090a4df..d4c64fa 100644
+--- a/arch/arm/mach-shmobile/board-silk-reference.c
++++ b/arch/arm/mach-shmobile/board-silk-reference.c
+@@ -271,7 +271,6 @@ static const struct clk_name clk_names[] __initconst = {
+ */
+ static const struct clk_name clk_enables[] __initconst = {
+ { "ether", NULL, "ee700000.ethernet" },
+- { "i2c1", NULL, "e6518000.i2c" },
+ { "mmcif0", NULL, "ee200000.mmc" },
+ { "sdhi0", NULL, "ee100000.sd" },
+ { "sdhi1", NULL, "ee140000.sd" },
+--
+1.9.3
+
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux-renesas_3.10.bb b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas_3.10.bb
new file mode 100644
index 0000000..c303492
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux-renesas_3.10.bb
@@ -0,0 +1,71 @@
+require linux.inc
+require linux-dtb.inc
+require linux-dtb-append.inc
+
+DESCRIPTION = "Linux kernel for the R-Car Generation 2 based board"
+COMPATIBLE_MACHINE = "(alt|gose|koelsch|lager|porter|silk)"
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+
+PV_append = "+git${SRCREV}"
+
+RENESAS_BACKPORTS_URL="git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-backport.git"
+SRCREV = "b8ca8c397343f4233f9f68fc3a5bf8e1c9b88251"
+SRC_URI = "${RENESAS_BACKPORTS_URL};protocol=git;branch=bsp/v3.10.31-ltsi/rcar-gen2-1.9.2 \
+ file://0001-arm-lager-Add-vmalloc-384M-to-bootargs-of-DTS.patch \
+ file://0001-arm-koelsch-Add-vmalloc-384M-to-bootargs-of-DTS.patch \
+ file://0001-arm-alt-Add-vmalloc-384M-to-bootargs-of-DTS.patch \
+ file://0001-arm-gose-Add-vmalloc-384M-to-bootargs-of-DTS.patch \
+"
+
+SRC_URI_append_porter = " \
+ file://0001-kernel-Silk-board-support.patch \
+ file://0002-kernel-silk-fix-ethernet-phy-irq.patch \
+ file://0003-kernel-silk-fix-sd-detect.patch \
+ file://0004-kernel-Revert-i2c-rcar-Support-ACK-by-HW-auto-restart-after-NACK.patch \
+ file://0006-Rcar-DU-add-RGB-connector.patch \
+ file://0007-SILK-add-i2c0.patch \
+ file://0008-Porter-board-support.patch \
+ file://0009-shmobile-add-atag-dtb-compat.patch \
+ file://0010-Silk-Add-missing-pins-handle-to-Eth.patch \
+ file://0011-Silk-Add-missing-DU-pins.patch \
+ file://0012-can-add-Renesas-R-Car-CAN-driver.patch \
+ file://0013-sh-pfc-r8a7791-add-CAN-pin-groups.patch \
+ file://0014-sh-pfc-r8a7791-fix-CAN-pin-groups.patch \
+ file://0015-can-rcar_can-support-all-input-clocks.patch \
+ file://0016-can-rcar_can-document-device-tree-bindings.patch \
+ file://0017-can-rcar_can-add-device-tree-support.patch \
+ file://0018-porter-can-support.patch \
+ file://0019-i2c-busses-rcar-Workaround-arbitration-loss-error.patch \
+ file://0020-Silk-Remove-I2C1-clock-from-clk_enables.patch \
+"
+
+SRC_URI_append_silk = " \
+ file://0001-kernel-Silk-board-support.patch \
+ file://0002-kernel-silk-fix-ethernet-phy-irq.patch \
+ file://0003-kernel-silk-fix-sd-detect.patch \
+ file://0004-kernel-Revert-i2c-rcar-Support-ACK-by-HW-auto-restart-after-NACK.patch \
+ file://0006-Rcar-DU-add-RGB-connector.patch \
+ file://0007-SILK-add-i2c0.patch \
+ file://0008-Porter-board-support.patch \
+ file://0009-shmobile-add-atag-dtb-compat.patch \
+ file://0010-Silk-Add-missing-pins-handle-to-Eth.patch \
+ file://0011-Silk-Add-missing-DU-pins.patch \
+ file://0012-can-add-Renesas-R-Car-CAN-driver.patch \
+ file://0013-sh-pfc-r8a7791-add-CAN-pin-groups.patch \
+ file://0014-sh-pfc-r8a7791-fix-CAN-pin-groups.patch \
+ file://0015-can-rcar_can-support-all-input-clocks.patch \
+ file://0016-can-rcar_can-document-device-tree-bindings.patch \
+ file://0017-can-rcar_can-add-device-tree-support.patch \
+ file://0018-porter-can-support.patch \
+ file://0019-i2c-busses-rcar-Workaround-arbitration-loss-error.patch \
+ file://0020-Silk-Remove-I2C1-clock-from-clk_enables.patch \
+"
+
+S = "${WORKDIR}/git"
+
+KERNEL_DEFCONFIG = "shmobile_defconfig"
+
+do_configure_prepend() {
+ install -m 0644 ${S}/arch/${ARCH}/configs/${KERNEL_DEFCONFIG} ${WORKDIR}/defconfig || die "No default configuration for ${MACHINE} / ${KERNEL_DEFCONFIG} available."
+}
diff --git a/meta-rcar-gen2/recipes-kernel/linux/linux.inc b/meta-rcar-gen2/recipes-kernel/linux/linux.inc
new file mode 100644
index 0000000..a265ee8
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/linux/linux.inc
@@ -0,0 +1,139 @@
+DESCRIPTION = "Linux Kernel"
+SECTION = "kernel"
+LICENSE = "GPLv2"
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=d7810fab7487fb0aad327b76f1be7cd7"
+
+inherit kernel siteinfo
+
+# Enable OABI compat for people stuck with obsolete userspace
+ARM_KEEP_OABI ?= "1"
+
+# Quirk for udev greater or equal 141
+UDEV_GE_141 ?= "1"
+
+# Set the verbosity of kernel messages during runtime
+# You can define CMDLINE_DEBUG in your local.conf or distro.conf to override this behaviour
+CMDLINE_DEBUG ?= '${@base_conditional("DISTRO_TYPE", "release", "quiet", "debug", d)}'
+CMDLINE_append = " ${CMDLINE_DEBUG}"
+
+# Set a variable in .configure
+# $1 - Configure variable to be set
+# $2 - value [n/y/value]
+kernel_configure_variable() {
+ # Remove the config
+ CONF_SED_SCRIPT="$CONF_SED_SCRIPT /CONFIG_$1[ =]/d;"
+ if test "$2" = "n"
+ then
+ echo "# CONFIG_$1 is not set" >> ${S}/.config
+ else
+ echo "CONFIG_$1=$2" >> ${S}/.config
+ fi
+}
+
+do_configure_prepend() {
+ # Clean .config
+ echo "" > ${S}/.config
+ CONF_SED_SCRIPT=""
+
+ # oabi / eabi support
+ if [ "${TARGET_OS}" = "linux-gnueabi" -o "${TARGET_OS}" = "linux-uclibceabi" ]; then
+ kernel_configure_variable AEABI y
+ if [ "${ARM_KEEP_OABI}" = "1" ] ; then
+ kernel_configure_variable OABI_COMPAT y
+ else
+ kernel_configure_variable OABI_COMPAT n
+ fi
+ else
+ kernel_configure_variable AEABI n
+ kernel_configure_variable OABI_COMPAT n
+ fi
+
+ # Set cmdline
+ kernel_configure_variable CMDLINE "\"${CMDLINE}\""
+
+ # Localversion
+ kernel_configure_variable LOCALVERSION "\"\""
+ kernel_configure_variable LOCALVERSION_AUTO n
+
+ # Udev quirks
+ # Newer versions of udev mandate that sysfs doesn't have deprecated entries
+ if [ "${UDEV_GE_141}" = "1" ] ; then
+ kernel_configure_variable SYSFS_DEPRECATED n
+ kernel_configure_variable SYSFS_DEPRECATED_V2 n
+ kernel_configure_variable HOTPLUG y
+ kernel_configure_variable UEVENT_HELPER_PATH "\"\""
+ kernel_configure_variable UNIX y
+ kernel_configure_variable SYSFS y
+ kernel_configure_variable PROC_FS y
+ kernel_configure_variable TMPFS y
+ kernel_configure_variable INOTIFY_USER y
+ kernel_configure_variable SIGNALFD y
+ kernel_configure_variable TMPFS_POSIX_ACL y
+ kernel_configure_variable BLK_DEV_BSG y
+ kernel_configure_variable DEVTMPFS y
+ kernel_configure_variable DEVTMPFS_MOUNT y
+ fi
+
+ # Newer inits like systemd need cgroup support
+ if [ "${KERNEL_ENABLE_CGROUPS}" = "1" ] ; then
+ kernel_configure_variable CGROUP_SCHED y
+ kernel_configure_variable CGROUPS y
+ kernel_configure_variable CGROUP_NS y
+ kernel_configure_variable CGROUP_FREEZER y
+ kernel_configure_variable CGROUP_DEVICE y
+ kernel_configure_variable CPUSETS y
+ kernel_configure_variable PROC_PID_CPUSET y
+ kernel_configure_variable CGROUP_CPUACCT y
+ kernel_configure_variable RESOURCE_COUNTERS y
+ fi
+
+ # root-over-nfs-over-usb-eth support. Limited, but should cover some cases
+ # Enable this by setting a proper CMDLINE_NFSROOT_USB.
+ if [ ! -z "${CMDLINE_NFSROOT_USB}" ]; then
+ oenote "Configuring the kernel for root-over-nfs-over-usb-eth with CMDLINE ${CMDLINE_NFSROOT_USB}"
+ kernel_configure_variable INET y
+ kernel_configure_variable IP_PNP y
+ kernel_configure_variable USB_GADGET y
+ kernel_configure_variable USB_GADGET_SELECTED y
+ kernel_configure_variable USB_ETH y
+ kernel_configure_variable NFS_FS y
+ kernel_configure_variable ROOT_NFS y
+ kernel_configure_variable ROOT_NFS y
+ kernel_configure_variable CMDLINE "\"${CMDLINE_NFSROOT_USB}\""
+ fi
+
+ # Activate CONFIG_LEGACY_PTYS
+ kernel_configure_variable LEGACY_PTYS y
+
+ # Keep this the last line
+ # Remove all modified configs and add the rest to .config
+ sed -e "${CONF_SED_SCRIPT}" < '${WORKDIR}/defconfig' >> '${S}/.config'
+
+ yes '' | oe_runmake oldconfig
+}
+
+do_configure_append_porter() {
+ # Enable CAN
+ kernel_configure_variable CAN y
+ kernel_configure_variable CAN_RCAR y
+
+ yes '' | oe_runmake oldconfig
+}
+
+# Automatically depend on lzop-native if CONFIG_KERNEL_LZO is enabled
+python () {
+ try:
+ defconfig = bb.fetch2.localpath('file://defconfig', d)
+ except bb.fetch2.FetchError:
+ return
+
+ try:
+ configfile = open(defconfig)
+ except IOError:
+ return
+
+ if 'CONFIG_KERNEL_LZO=y\n' in configfile.readlines():
+ depends = d.getVar('DEPENDS', False)
+ d.setVar('DEPENDS', depends + ' lzop-native')
+}
diff --git a/meta-rcar-gen2/recipes-kernel/mmngr-module/files/.gitkeep b/meta-rcar-gen2/recipes-kernel/mmngr-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/mmngr-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-kernel/mmngr-module/mmngr-kernel-module.bb b/meta-rcar-gen2/recipes-kernel/mmngr-module/mmngr-kernel-module.bb
new file mode 100644
index 0000000..32c6abd
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/mmngr-module/mmngr-kernel-module.bb
@@ -0,0 +1,83 @@
+require ../../include/rcar-gen2-modules-common.inc
+require ../../include/multimedia-control.inc
+
+LICENSE = "GPLv2&MIT"
+LIC_FILES_CHKSUM = "file://drv/GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
+ file://drv/MIT-COPYING;md5=fea016ce2bdf2ec10080f69e9381d378 \
+ file://include/GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
+ file://include/MIT-COPYING;md5=fea016ce2bdf2ec10080f69e9381d378 "
+DEPENDS = "linux-renesas"
+PN = "mmngr-kernel-module"
+SRC_URI = "file://mmngr.tar.bz2"
+S = "${WORKDIR}/mmngr"
+
+MMNGR_CFG_r8a7790 = "MMNGR_LAGER"
+MMNGR_CFG_r8a7791 = "MMNGR_KOELSCH"
+MMNGR_CFG_r8a7793 = "MMNGR_GOSE"
+MMNGR_CFG_r8a7794 = "MMNGR_ALT"
+
+do_compile() {
+ export MMNGR_CONFIG=${MMNGR_CFG}
+ if [ "X${USE_DTV}" = "X1" ]; then
+ export MMNGR_SSP_CONFIG="MMNGR_SSP_ENABLE"
+ else
+ export MMNGR_SSP_CONFIG="MMNGR_SSP_DISABLE"
+ fi
+ cd ${S}/drv
+ make all ARCH=arm
+}
+
+do_install () {
+ # Create destination folders
+ mkdir -p ${D}/lib/modules/${KERNEL_VERSION}/extra/ ${D}/usr/src/kernel/include
+
+ # Copy shared library for reference from other modules
+ cp -f ${S}/drv/Module.symvers ${KERNELSRC}/include/mmngr.symvers
+ cp -f ${S}/drv/Module.symvers ${KERNELSRC}/include
+ cp -f ${S}/drv/Module.symvers ${D}/usr/src/kernel/include
+ cp -f ${S}/drv/Module.symvers ${D}/usr/src/kernel/include/mmngr.symvers
+
+ # Copy kernel module
+ cp -f ${S}/drv/mmngr.ko ${D}/lib/modules/${KERNEL_VERSION}/extra/
+
+ # Copy shared header files
+ cp -f ${KERNELSRC}/include/mmngr_public.h ${D}/usr/src/kernel/include
+ cp -f ${KERNELSRC}/include/mmngr_private.h ${D}/usr/src/kernel/include
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ rm -f ${KERNELSRC}/include/mmngr_private.h
+ rm -f ${KERNELSRC}/include/mmngr_public.h
+ rm -f ${KERNELSRC}/include/mmngr.symvers
+ rm -f ${KERNELSRC}/include/Module.symvers
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /lib/modules/${KERNEL_VERSION}/extra/mmngr.ko \
+"
+
+FILES_${PN}-dev = " \
+ /usr/src/kernel/include \
+ /usr/src/kernel/include/Module.symvers \
+ /usr/src/kernel/include/mmngr.symvers \
+ /usr/src/kernel/include/*.h \
+"
+
+RPROVIDES_${PN} += "mmngr-kernel-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+
+do_configure[noexec] = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-kernel/mmngr-module/mmngrbuf-kernel-module.bb b/meta-rcar-gen2/recipes-kernel/mmngr-module/mmngrbuf-kernel-module.bb
new file mode 100644
index 0000000..ac91e0c
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/mmngr-module/mmngrbuf-kernel-module.bb
@@ -0,0 +1,63 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "GPLv2&MIT"
+DEPENDS = "linux-renesas"
+PN = "mmngrbuf-kernel-module"
+PR = "r0"
+SRC_URI = "file://mmngrbuf.tar.bz2"
+LIC_FILES_CHKSUM = "file://drv/GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
+ file://drv/MIT-COPYING;md5=fea016ce2bdf2ec10080f69e9381d378 \
+ file://include/GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
+ file://include/MIT-COPYING;md5=fea016ce2bdf2ec10080f69e9381d378 "
+
+S = "${WORKDIR}/mmngrbuf"
+
+do_compile() {
+ cd ${S}/drv
+ make all ARCH=arm
+}
+
+do_install () {
+ # Create destination folders
+ mkdir -p ${D}/lib/modules/${KERNEL_VERSION}/extra/ ${D}/usr/src/kernel/include
+
+ # Copy shared library for reference from other modules
+ cp -f ${S}/drv/Module.symvers ${KERNELSRC}/include/mmngrbuf.symvers
+ cp -f ${S}/drv/Module.symvers ${D}/usr/src/kernel/include/mmngrbuf.symvers
+
+ # Copy kernel module
+ cp -f ${S}/drv/mmngrbuf.ko ${D}/lib/modules/${KERNEL_VERSION}/extra/
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ rm -f ${KERNELSRC}/include/mmngr_buf_private.h
+ rm -f ${KERNELSRC}/include/mmngrbuf.symvers
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /lib/modules/${KERNEL_VERSION}/extra/mmngrbuf.ko \
+"
+
+FILES_${PN}-dev = " \
+ /usr/src/kernel/include/mmngrbuf.symvers \
+ /usr/src/kernel/include/*.h \
+"
+
+RPROVIDES_${PN} += "mmngrbuf-kernel-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+
+do_configure[noexec] = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-kernel/s3ctl-module/files/.gitkeep b/meta-rcar-gen2/recipes-kernel/s3ctl-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/s3ctl-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-kernel/s3ctl-module/s3ctl-kernel-module.bb b/meta-rcar-gen2/recipes-kernel/s3ctl-module/s3ctl-kernel-module.bb
new file mode 100644
index 0000000..211dd78
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/s3ctl-module/s3ctl-kernel-module.bb
@@ -0,0 +1,64 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "GPLv2&MIT"
+LIC_FILES_CHKSUM = "file://drv/GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
+ file://drv/MIT-COPYING;md5=fea016ce2bdf2ec10080f69e9381d378"
+DEPENDS = "linux-renesas"
+PN = "s3ctl-kernel-module"
+PR = "r0"
+SRC_URI = "file://s3ctl-kernel.tar.bz2"
+
+S = "${WORKDIR}/s3ctl"
+
+do_compile() {
+ # Build kernel module
+ cd ${S}/drv
+ make all ARCH=arm
+}
+
+do_install() {
+ # Create shared folder
+ mkdir -p ${D}/lib/modules/${KERNEL_VERSION}/extra/ ${D}/usr/src/kernel/include
+
+ # Copy kernel module
+ cp -f ${S}/drv/s3ctl.ko ${D}/lib/modules/${KERNEL_VERSION}/extra/
+
+ # Copy shared header files
+ cp -f ${S}/drv/Module.symvers ${KERNELSRC}/include/s3ctl.symvers
+ cp -f ${KERNELSRC}/include/s3ctl_private.h ${D}/usr/src/kernel/include
+ cp -f ${S}/drv/Module.symvers ${D}/usr/src/kernel/include/s3ctl.symvers
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ rm -rf ${KERNELSRC}/include/s3ctl_private.h
+ rm -rf ${KERNELSRC}/include/s3ctl.symvers
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /lib/modules/${KERNEL_VERSION}/extra/s3ctl.ko \
+"
+
+FILES_${PN}-dev = " \
+ /usr/src/kernel/include \
+ /usr/src/kernel/include/*.h \
+ /usr/src/kernel/include/s3ctl.symvers \
+"
+
+RPROVIDES_${PN} += "s3ctl-kernel-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+
+do_configure[noexec] = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-kernel/scu-module/files/.gitkeep b/meta-rcar-gen2/recipes-kernel/scu-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/scu-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-kernel/scu-module/scu-kernel-module.bb b/meta-rcar-gen2/recipes-kernel/scu-module/scu-kernel-module.bb
new file mode 100644
index 0000000..ec392a8
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/scu-module/scu-kernel-module.bb
@@ -0,0 +1,63 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "GPLv2&MIT"
+LIC_FILES_CHKSUM = "file://src/include/GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
+ file://src/include/MIT-COPYING;md5=fea016ce2bdf2ec10080f69e9381d378 \
+"
+DEPENDS = "linux-renesas"
+PN = "scu-kernel-module"
+PR = "r0"
+SRC_URI = "file://scu-kernel.tar.bz2"
+S = "${WORKDIR}"
+do_compile() {
+ cd ${S}/src/drv
+ make clean ARCH=arm
+ make all ARCH=arm
+}
+
+do_install() {
+ # Create destination folder
+ mkdir -p ${D}/lib/modules/${KERNEL_VERSION}/extra/ ${D}/usr/src/kernel/include/
+ mkdir -p ${KERNELSRC}/include
+
+ # Copy kernel module
+ cp ${S}/src/drv/scu_src_drv.ko ${D}/lib/modules/${KERNEL_VERSION}/extra
+
+ # Copy shared header files
+ cp -f ${S}/src/include/scu_src_drv.h ${KERNELSRC}/include
+ cp -f ${S}/src/drv/Module.symvers ${KERNELSRC}/include/scu-drv.symvers
+ # Export for SDK
+ cp -f ${S}/src/include/scu_src_drv.h ${D}/usr/src/kernel/include
+ cp -f ${S}/src/drv/Module.symvers ${D}/usr/src/kernel/include/scu-drv.symvers
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ rm -f ${KERNELSRC}/include/scu_src_drv.h ${KERNELSRC}/include/scu-drv.symvers
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /lib/modules/${KERNEL_VERSION}/extra/scu_src_drv.ko \
+"
+
+FILES_${PN}-dev = " \
+ /usr/src/kernel/include \
+ /usr/src/kernel/include/*.symvers \
+ /usr/src/kernel/include/*.h \
+"
+
+RPROVIDES_${PN} += "scu-kernel-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-kernel/ssp-module/files/.gitkeep b/meta-rcar-gen2/recipes-kernel/ssp-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/ssp-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-kernel/ssp-module/ssp-kernel-module.bb b/meta-rcar-gen2/recipes-kernel/ssp-module/ssp-kernel-module.bb
new file mode 100644
index 0000000..8159215
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/ssp-module/ssp-kernel-module.bb
@@ -0,0 +1,69 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "GPLv2&MIT"
+LIC_FILES_CHKSUM = "file://ssp/drv/GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
+ file://ssp/drv/MIT-COPYING;md5=fea016ce2bdf2ec10080f69e9381d378 \
+"
+DEPENDS = "linux-renesas"
+PN = "ssp-kernel-module"
+PR = "r0"
+SRC_URI = "file://ssp-kernel.tar.bz2"
+
+S = "${WORKDIR}"
+
+do_compile() {
+ cd ${S}/ssp/drv
+ make clean ARCH=arm
+ make all ARCH=arm
+}
+
+do_install() {
+ # Create destination folder
+ mkdir -p ${D}/lib/modules/${KERNEL_VERSION}/extra/ ${D}/usr/src/kernel/include/
+ mkdir -p ${KERNELSRC}/include
+
+ # Copy kernel module
+ cp ${S}/ssp/drv/ssp_dev.ko ${D}/lib/modules/${KERNEL_VERSION}/extra
+
+ # Copy shared header files
+ cp -f ${S}/ssp/include/ssp_dev_private.h ${KERNELSRC}/include
+ cp -f ${S}/ssp/include/ssp_dev_public.h ${KERNELSRC}/include
+ cp -f ${S}/ssp/drv/Module.symvers ${KERNELSRC}/include/ssp-drv.symvers
+
+ # Export for SDK
+ cp -f ${S}/ssp/include/ssp_dev_private.h ${D}/usr/src/kernel/include
+ cp -f ${S}/ssp/include/ssp_dev_public.h ${D}/usr/src/kernel/include
+ cp -f ${S}/ssp/drv/Module.symvers ${D}/usr/src/kernel/include/ssp-drv.symvers
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ rm -f ${KERNELSRC}/include/ssp_dev_private.h ${KERNELSRC}/include/ssp_dev_public.h
+ rm -f ${KERNELSRC}/include/ssp-drv.symvers
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /lib/modules/${KERNEL_VERSION}/extra/ssp_dev.ko \
+"
+
+FILES_${PN}-dev = " \
+ /usr/src/kernel/include \
+ /usr/src/kernel/include/*.symvers \
+ /usr/src/kernel/include/*.h \
+"
+
+RPROVIDES_${PN} += "ssp-kernel-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-kernel/uvcs-module/files/.gitkeep b/meta-rcar-gen2/recipes-kernel/uvcs-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/uvcs-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-kernel/uvcs-module/uvcs-kernel-module.bb b/meta-rcar-gen2/recipes-kernel/uvcs-module/uvcs-kernel-module.bb
new file mode 100644
index 0000000..17b0637
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/uvcs-module/uvcs-kernel-module.bb
@@ -0,0 +1,70 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "GPLv2&MIT"
+LIC_FILES_CHKSUM = "file://uvcs/include/GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
+ file://uvcs/include/MIT-COPYING;md5=fea016ce2bdf2ec10080f69e9381d378 \
+"
+DEPENDS = "linux-renesas"
+PN = "uvcs-kernel-module"
+PR = "r0"
+SRC_URI = "file://uvcs-kernel.tar.bz2"
+S = "${WORKDIR}"
+
+export UVCS_DRV_SRC_DIR = "${S}/uvcs/source/uvcs_lkm"
+export UVCS_CMN_SRC_DIR = "${S}/uvcs/source/uvcs_cmn"
+export UVCS_CMN_INC_DIR = "${S}/uvcs/include"
+export DRV_CORE_SRC_DIR = "${S}/uvcs/source/driver_core"
+
+do_compile() {
+ cd ${S}/uvcs/source/makefile/linaro_4_7_3/
+ make clean ARCH=arm
+ make all ARCH=arm
+}
+
+do_install() {
+ # Create destination folder
+ mkdir -p ${D}/lib/modules/${KERNEL_VERSION}/extra/ ${D}/usr/src/kernel/include
+
+ # Copy kernel module
+ cp -f ${S}/uvcs/source/makefile/linaro_4_7_3/uvcs_cmn.ko ${D}/lib/modules/${KERNEL_VERSION}/extra/uvcs_cmn.ko
+
+ # Copy shared header files
+ cp -f ${S}/uvcs/include/uvcs_cmn.h ${D}/usr/src/kernel/include
+ cp -f ${S}/uvcs/include/uvcs_types.h ${D}/usr/src/kernel/include
+ cp -f ${S}/uvcs/source/makefile/linaro_4_7_3/Module.symvers ${D}/usr/src/kernel/include/uvcs.symvers
+
+ cp -f ${S}/uvcs/include/uvcs_cmn.h ${KERNELSRC}/include/
+ cp -f ${S}/uvcs/include/uvcs_types.h ${KERNELSRC}/include/
+ cp -f ${S}/uvcs/source/makefile/linaro_4_7_3/Module.symvers ${KERNELSRC}/include/uvcs.symvers
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ rm -f ${KERNELSRC}/include/uvcs_cmn.h ${KERNELSRC}/include/uvcs_types.h
+ rm -f ${KERNELSRC}/include/uvcs.symvers
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /lib/modules/${KERNEL_VERSION}/extra/uvcs_cmn.ko \
+"
+FILES_${PN}-dev = " \
+ /usr/src/kernel/include \
+ /usr/src/kernel/include/*.h \
+ /usr/src/kernel/include/uvcs.symvers \
+"
+
+RPROVIDES_${PN} += "uvcs-kernel-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-kernel/vspm-module/files/.gitkeep b/meta-rcar-gen2/recipes-kernel/vspm-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/vspm-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-kernel/vspm-module/vspm-kernel-module.bb b/meta-rcar-gen2/recipes-kernel/vspm-module/vspm-kernel-module.bb
new file mode 100644
index 0000000..1e88e6f
--- /dev/null
+++ b/meta-rcar-gen2/recipes-kernel/vspm-module/vspm-kernel-module.bb
@@ -0,0 +1,79 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "GPLv2&MIT"
+LIC_FILES_CHKSUM = "file://vspm/drv/GPL-COPYING;md5=12f884d2ae1ff87c09e5b7ccc2c4ca7e \
+ file://vspm/drv/MIT-COPYING;md5=fea016ce2bdf2ec10080f69e9381d378 \
+"
+DEPENDS = "linux-renesas"
+PN = "vspm-kernel-module"
+PR = "r0"
+SRC_URI = "file://vspm-kernel.tar.bz2"
+S = "${WORKDIR}"
+
+VSPM_CFG_r8a7790 = "H2CONFIG"
+VSPM_CFG_r8a7791 = "M2CONFIG"
+VSPM_CFG_r8a7793 = "M2CONFIG"
+VSPM_CFG_r8a7794 = "E2CONFIG"
+
+do_compile() {
+ export VSPM_CONFIG=${VSPM_CFG}
+ cd ${S}/vspm/drv
+ make all ARCH=arm
+}
+
+do_install() {
+ # Create destination folder
+ mkdir -p ${D}/lib/modules/${KERNEL_VERSION}/extra/ ${D}/usr/src/kernel/include
+
+ # Copy kernel module
+ cp -f ${S}/vspm/drv/vspm.ko ${D}/lib/modules/${KERNEL_VERSION}/extra/
+
+ # Copy shared header files
+ cp -f ${KERNELSRC}/include/vspm_public.h ${D}/usr/src/kernel/include
+ cp -f ${KERNELSRC}/include/vsp_drv.h ${D}/usr/src/kernel/include
+ cp -f ${KERNELSRC}/include/tddmac_drv.h ${D}/usr/src/kernel/include
+ cp -f ${KERNELSRC}/include/vspm_if.h ${D}/usr/src/kernel/include
+ cp -f ${S}/vspm/drv/Module.symvers ${D}/usr/src/kernel/include/vspm.symvers
+ cp -f ${S}/vspm/drv/Module.symvers ${KERNELSRC}/include/vspm.symvers
+
+ # Copy for vspm-user-module
+ cp -f ${KERNELSRC}/include/vspm_if.h ${BUILDDIR}/include
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ rm -f ${KERNELSRC}/include/vspm_public.h
+ rm -f ${KERNELSRC}/include/vsp_drv.h
+ rm -f ${KERNELSRC}/include/tddmac_drv.h
+ rm -f ${KERNELSRC}/include/vspm_if.h
+ rm -f ${BUILDDIR}/include/vspm_if.h
+ rm -f ${KERNELSRC}/include/vspm.symvers
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /lib/modules/${KERNEL_VERSION}/extra/vspm.ko \
+"
+
+FILES_${PN}-dev = " \
+ /usr/src/kernel/include \
+ /usr/src/kernel/include/*.h \
+ /usr/src/kernel/include/vspm.symvers \
+"
+
+RPROVIDES_${PN} += "vspm-kernel-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+
+do_configure[noexec] = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-multimedia/dtv-module/dtv-user-module.bb b/meta-rcar-gen2/recipes-multimedia/dtv-module/dtv-user-module.bb
new file mode 100644
index 0000000..7b8e5ca
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/dtv-module/dtv-user-module.bb
@@ -0,0 +1,52 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "CLOSED"
+PN = "dtv"
+PR = "r0"
+SRC_URI = "file://dtv.tar.bz2"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+S = "${WORKDIR}"
+
+do_configure[noexec] = "1"
+do_compile[noexec] = "1"
+do_populate_lic[noexec] = "1"
+
+do_install() {
+ # Create share folders
+ mkdir -p ${D}/usr/local/include/ ${D}/usr/local/lib ${D}/usr/local/src/dtv/reference
+
+ # Copy share files to destination
+ cp -f ${WORKDIR}/dtv/include/*.h ${D}/usr/local/include/
+ cp -f ${WORKDIR}/dtv/lib/libdtv.a ${D}/usr/local/lib
+ cp -f ${WORKDIR}/dtv/userfunc/* ${D}/usr/local/src/dtv/reference
+}
+
+SYSROOT_PREPROCESS_FUNCS += "do_populate_reference_src"
+
+do_populate_reference_src () {
+ sysroot_stage_dir ${D}/usr/local ${SYSROOT_DESTDIR}/usr/local
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+ ${PN}-staticdev \
+"
+
+FILES_${PN} = ""
+ALLOW_EMPTY_${PN} = "1"
+
+FILES_${PN}-dev = " \
+ /usr/local/include/*.h \
+ /usr/local/src/dtv/reference/*.c \
+ /usr/local/src/dtv/reference/*.h \
+"
+
+FILES_${PN}-staticdev = " \
+ /usr/local/lib/*.a \
+"
+
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+
+do_configure[noexec] = "1"
diff --git a/meta-rcar-gen2/recipes-multimedia/dtv-module/files/.gitkeep b/meta-rcar-gen2/recipes-multimedia/dtv-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/dtv-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-multimedia/fdpm-module/fdpm-tp-user-module.bb b/meta-rcar-gen2/recipes-multimedia/fdpm-module/fdpm-tp-user-module.bb
new file mode 100644
index 0000000..2f01ed3
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/fdpm-module/fdpm-tp-user-module.bb
@@ -0,0 +1,31 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+S = "${WORKDIR}"
+
+LICENSE = "CLOSED"
+DEPENDS = "fdpm-user-module mmngr-user-module"
+SRC_URI = "file://fdpm-tp-user.tar.bz2"
+
+do_compile() {
+ cd ${S}/fdpm/
+ make all ARCH=arm
+}
+
+do_install() {
+ # Create destination folder
+ mkdir -p ${D}/usr/local/bin/
+
+ # Copy user test program
+ cp ${S}/fdpm/fdpm_tp ${D}/usr/local/bin/
+}
+
+PACKAGES = "\
+ ${PN} \
+"
+
+FILES_${PN} = " \
+ /usr/local/bin/fdpm_tp \
+"
+
+RPROVIDES_${PN} += "fdpm-tp-user-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
diff --git a/meta-rcar-gen2/recipes-multimedia/fdpm-module/fdpm-user-module.bb b/meta-rcar-gen2/recipes-multimedia/fdpm-module/fdpm-user-module.bb
new file mode 100644
index 0000000..7146a2a
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/fdpm-module/fdpm-user-module.bb
@@ -0,0 +1,68 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "CLOSED"
+DEPENDS = "fdpm-kernel-module mmngr-user-module"
+PN = "fdpm-user-module"
+SRC_URI = "file://fdpm.tar.bz2"
+
+S = "${WORKDIR}/fdpm"
+
+do_compile() {
+ # Build shared library
+ cd ${S}/if
+ rm -rf libfdpm.so*
+ make all ARCH=arm
+ # Copy shared library for reference from other modules
+ cp -P ${S}/if/libfdpm.so* ${LIBSHARED}
+ cp -rf ${S}/include/*h ${STAGING_INCDIR}
+}
+
+do_install() {
+ # Create destination folder
+ mkdir -p ${D}/usr/local/lib/ ${D}/usr/local/include/
+
+ # Copy shared library
+ cp -P ${S}/if/libfdpm.so* ${D}/usr/local/lib
+ cp -rf ${S}/include/*h ${D}/usr/local/include/
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ rm -f ${LIBSHARED}/libfdpm.so*
+ rm -f ${STAGING_INCDIR}/fdpm_api.h
+ rm -f ${STAGING_INCDIR}/fdpm_drv.h
+ rm -f ${STAGING_INCDIR}/fdpm_if_fd.h
+ rm -f ${STAGING_INCDIR}/fdpm_if.h
+ rm -f ${STAGING_INCDIR}/fdpm_if_par.h
+ rm -f ${STAGING_INCDIR}/fdpm_if_priv.h
+ rm -f ${STAGING_INCDIR}/fdpm_public.h
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /usr/local/lib/libfdpm.so.* \
+"
+
+FILES_${PN}-dev = " \
+ /usr/local/lib/libfdpm.so \
+ /usr/local/include/*.h \
+"
+
+RPROVIDES_${PN} += "fdpm-user-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+INSANE_SKIP_${PN} += "libdir"
+INSANE_SKIP_${PN}-dev += "libdir"
+
+do_configure[noexec] = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-multimedia/fdpm-module/files/.gitkeep b/meta-rcar-gen2/recipes-multimedia/fdpm-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/fdpm-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-omx_1.0.0.bbappend b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-omx_1.0.0.bbappend
new file mode 100644
index 0000000..8a7128e
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-omx_1.0.0.bbappend
@@ -0,0 +1,26 @@
+require ../../include/gles-control.inc
+
+SRC_URI_rcar-gen2 = "git://github.com/renesas-devel/gst-omx.git;protocol=git;branch=RCAR-GEN2/1.0.0"
+SRCREV_rcar-gen2 = "05563465faad99243ee2dd30547e3075eb8cf5e3"
+
+LIC_FILES_CHKSUM_remove_rcar-gen2 = " file://omx/gstomx.h;beginline=1;endline=21;md5=5c8e1fca32704488e76d2ba9ddfa935f"
+LIC_FILES_CHKSUM_append_rcar-gen2 = " file://omx/gstomx.h;beginline=1;endline=22;md5=17e5f2943dace9e5cde4a8587a31e8f9"
+S = "${WORKDIR}/git"
+
+do_configure() {
+ ./autogen.sh --noconfigure
+ oe_runconf
+}
+
+DEPENDS_append_rcar-gen2 = " omx-user-module mmngrbuf-user-module"
+EXTRA_OECONF_append_rcar-gen2 = " --with-omx-target=rcar --enable-experimental \
+ '${@'--disable-dmabuf' if '${USE_GLES}' == '0' and '${USE_WAYLAND}' == '1' else ''}'"
+
+# Overwrite do_install[postfuncs] += " set_omx_core_name "
+# because it will force the plugin to use bellagio instead of our config
+revert_omx_core_name() {
+ sed -i -e "s;^core-name=.*;core-name=/usr/local/lib/libomxr_core.so;" "${D}/etc/xdg/gstomx.conf"
+}
+REVERT_OMX_CORE_NAME = ""
+REVERT_OMX_CORE_NAME_rcar-gen2 = "revert_omx_core_name"
+do_install[postfuncs] += "${REVERT_OMX_CORE_NAME}"
diff --git a/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-bad_1.2.3.bbappend b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-bad_1.2.3.bbappend
new file mode 100644
index 0000000..ac9e52e
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-bad_1.2.3.bbappend
@@ -0,0 +1,26 @@
+require ../../include/gles-control.inc
+require ../../include/multimedia-control.inc
+
+SRC_URI_rcar-gen2 = "git://github.com/renesas-devel/gst-plugins-bad.git;protocol=git;branch=RCAR-GEN2/1.2.3"
+SRCREV_rcar-gen2 = "${@'eda7155f94981ace11b866fc02daca6ad4869221' \
+ if '1' in '${USE_GLES_WAYLAND}' else 'c1f5e09ce341f3438fb601a852ee70e72d375646'}"
+LIC_FILES_CHKSUM_remove_rcar-gen2 = "\
+ file://common/coverage/coverage-report.pl;beginline=2;endline=17;md5=a4e1830fce078028c8f0974161272607"
+
+S = "${WORKDIR}/git"
+
+do_configure() {
+ ./autogen.sh --noconfigure
+ oe_runconf
+}
+
+# for wayland
+PACKAGECONFIG_remove_rcar-gen2 = "${@'orc' if '1' in '${USE_GLES_WAYLAND}' else ''}"
+PACKAGECONFIG_append_rcar-gen2 = " faad ${@base_contains('USE_GLES_WAYLAND', '1', 'wayland', '', d)}"
+
+# for lcb
+DEPENDS_append_silk = " ${@base_conditional('USE_MULTIMEDIA', '1', 'faac', '', d)}"
+PACKAGECONFIG_silk = " ${@base_conditional('USE_MULTIMEDIA', '1', 'faac', '', d)}"
+
+DEPENDS_append_porter = " ${@base_conditional('USE_MULTIMEDIA', '1', 'faac', '', d)}"
+PACKAGECONFIG_porter = " ${@base_conditional('USE_MULTIMEDIA', '1', 'faac', '', d)}"
diff --git a/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-alt.conf b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-alt.conf
new file mode 100644
index 0000000..b324cbe
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-alt.conf
@@ -0,0 +1,2 @@
+input-device-name=/dev/video1
+output-device-name=/dev/video5
diff --git a/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-gose.conf b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-gose.conf
new file mode 100644
index 0000000..c534883
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-gose.conf
@@ -0,0 +1,2 @@
+input-device-name=/dev/video2
+output-device-name=/dev/video6
diff --git a/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-koelsch.conf b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-koelsch.conf
new file mode 100644
index 0000000..c534883
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-koelsch.conf
@@ -0,0 +1,2 @@
+input-device-name=/dev/video2
+output-device-name=/dev/video6
diff --git a/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-lager.conf b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-lager.conf
new file mode 100644
index 0000000..c534883
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-lager.conf
@@ -0,0 +1,2 @@
+input-device-name=/dev/video2
+output-device-name=/dev/video6
diff --git a/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-porter.conf b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-porter.conf
new file mode 100644
index 0000000..b324cbe
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-porter.conf
@@ -0,0 +1,2 @@
+input-device-name=/dev/video1
+output-device-name=/dev/video5
diff --git a/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-silk.conf b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-silk.conf
new file mode 100644
index 0000000..b324cbe
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base/gstvspfilter-silk.conf
@@ -0,0 +1,2 @@
+input-device-name=/dev/video1
+output-device-name=/dev/video5
diff --git a/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base_1.2.3.bbappend b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base_1.2.3.bbappend
new file mode 100644
index 0000000..eee4b59
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base_1.2.3.bbappend
@@ -0,0 +1,49 @@
+require ../../include/gles-control.inc
+
+SRC_URI_rcar-gen2 = "git://github.com/renesas-devel/gst-plugins-base.git;protocol=git;branch=RCAR-GEN2/1.2.3"
+SRCREV_rcar-gen2 = "f5176e8e2e9b39ee96181c37cf61e2a90e56069b"
+LIC_FILES_CHKSUM_remove_rcar-gen2 = "\
+ file://common/coverage/coverage-report.pl;beginline=2;endline=17;md5=a4e1830fce078028c8f0974161272607"
+
+S = "${WORKDIR}/git"
+
+do_configure() {
+ ./autogen.sh --noconfigure
+ oe_runconf
+}
+
+# For Common
+FILESEXTRAPATHS_prepend_rcar-gen2 := '${THISDIR}/${PN}:'
+VSPFILTER_CONFIGS = " \
+ file://gstvspfilter-alt.conf \
+ file://gstvspfilter-gose.conf \
+ file://gstvspfilter-koelsch.conf \
+ file://gstvspfilter-lager.conf \
+ file://gstvspfilter-porter.conf \
+ file://gstvspfilter-silk.conf \
+"
+
+# For wayland
+PACKAGECONFIG_remove_rcar-gen2 = "${@base_contains("DISTRO_FEATURES", "wayland", "orc", "", d)}"
+
+SRC_URI_append_rcar-gen2 = \
+ "${@'${VSPFILTER_CONFIGS}' \
+ if '${USE_WAYLAND}' == '1' else ''}"
+
+EXTRA_OECONF_append_rcar-gen2 = " \
+ ${@'--enable-vspfilter' \
+ if '${USE_WAYLAND}' == '1' else ''}"
+
+do_install_append_rcar-gen2() {
+ if [ '${USE_WAYLAND}' = '1' ] ; then
+ mkdir ${D}/etc/
+ install -m644 ${WORKDIR}/gstvspfilter-${MACHINE}.conf ${D}/etc/gstvspfilter.conf
+ fi
+}
+
+FILES_${PN}_append_rcar-gen2 = " \
+ ${@'${datadir}/gst-plugins-base/1.0/* ${sysconfdir}/*.conf' \
+ if '${USE_WAYLAND}' == '1' else ''}"
+
+# For x11
+# None
diff --git a/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-good_1.2.3.bbappend b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-good_1.2.3.bbappend
new file mode 100644
index 0000000..573f71a
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-good_1.2.3.bbappend
@@ -0,0 +1,12 @@
+SRC_URI_rcar-gen2 = "git://github.com/renesas-devel/gst-plugins-good.git;protocol=git;branch=RCAR-GEN2/1.2.3"
+SRCREV_rcar-gen2 = "e752441fef9f70c97bb0976476fdaa6c7df27b6b"
+
+LIC_FILES_CHKSUM_remove_rcar-gen2 = "\
+ file://common/coverage/coverage-report.pl;beginline=2;endline=17;md5=a4e1830fce078028c8f0974161272607"
+
+S = "${WORKDIR}/git"
+
+do_configure() {
+ ./autogen.sh --noconfigure
+ oe_runconf
+}
diff --git a/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-ugly_1.2.3.bbappend b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-ugly_1.2.3.bbappend
new file mode 100644
index 0000000..6d43b52
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/gstreamer/gstreamer1.0-plugins-ugly_1.2.3.bbappend
@@ -0,0 +1,12 @@
+SRC_URI_rcar-gen2 = "git://github.com/renesas-devel/gst-plugins-ugly.git;protocol=git;branch=RCAR-GEN2/1.2.3"
+SRCREV_rcar-gen2 = "af884db954b53bf083ebc39e3a90b639f81513e1"
+S = "${WORKDIR}/git"
+
+PACKAGECONFIG ??= " \
+ a52dec lame mad mpeg2dec \
+ "
+
+do_configure() {
+ ./autogen.sh --noconfigure
+ oe_runconf
+}
diff --git a/meta-rcar-gen2/recipes-multimedia/libomxil/libomxil_0.9.3.bbappend b/meta-rcar-gen2/recipes-multimedia/libomxil/libomxil_0.9.3.bbappend
new file mode 100644
index 0000000..3be14f6
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/libomxil/libomxil_0.9.3.bbappend
@@ -0,0 +1,3 @@
+do_populate_sysroot () {
+ rm -f ${D}/usr/include/*.h
+}
diff --git a/meta-rcar-gen2/recipes-multimedia/mmngr-module/files/.gitkeep b/meta-rcar-gen2/recipes-multimedia/mmngr-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/mmngr-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngr-tp-user-module.bb b/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngr-tp-user-module.bb
new file mode 100644
index 0000000..515f784
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngr-tp-user-module.bb
@@ -0,0 +1,29 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "CLOSED"
+DEPENDS = "mmngr-kernel-module mmngr-user-module"
+SRC_URI = "file://mmngr-tp-user.tar.bz2"
+
+S = "${WORKDIR}/mmngr"
+
+do_compile() {
+ # Build test kernel module
+ cd ${S}
+ make all ARCH=arm
+}
+
+do_install() {
+ # Copy kernel test program
+ mkdir -p ${D}/usr/local/bin/
+ cp ${S}/mmtp ${D}/usr/local/bin/
+}
+
+PACKAGES = "\
+ ${PN} \
+"
+FILES_${PN} = " \
+ /usr/local/bin/mmtp \
+"
+
+RPROVIDES_${PN} += "mmngr-tp-user-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
diff --git a/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngr-user-module.bb b/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngr-user-module.bb
new file mode 100644
index 0000000..3205915
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngr-user-module.bb
@@ -0,0 +1,65 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "CLOSED"
+DEPENDS = "mmngr-kernel-module"
+PN = "mmngr-user-module"
+S = "${WORKDIR}/mmngr"
+SRC_URI = "file://mmngr.tar.bz2"
+
+do_compile() {
+ # Build shared library
+ cd ${S}/if
+ rm -rf ${S}/if/libmmngr.so*
+ make all ARCH=arm
+ # Copy shared library into shared folder
+ cp -P ${S}/if/libmmngr.so* ${LIBSHARED}
+}
+
+do_install() {
+ mkdir -p ${D}/usr/local/lib/ ${D}/usr/local/include
+
+ # Copy shared library
+ cp -P ${S}/if/libmmngr.so* ${D}/usr/local/lib/
+ cd ${D}/usr/local/lib/
+ # Copy shared header files
+ cp -f ${BUILDDIR}/include/mmngr_user_public.h ${D}/usr/local/include
+ cp -f ${BUILDDIR}/include/mmngr_user_private.h ${D}/usr/local/include
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ rm -f ${LIBSHARED}/libmmngr.so*
+ rm -Rf ${BUILDDIR}/include/mmngr_user_public.h
+ rm -Rf ${BUILDDIR}/include/mmngr_user_private.h
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /usr/local/lib/libmmngr.so.* \
+"
+
+FILES_${PN}-dev = " \
+ /usr/local/include \
+ /usr/local/include/*.h \
+ /usr/local/lib \
+ /usr/local/lib/libmmngr.so \
+"
+
+RPROVIDES_${PN} += "mmngr-user-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+INSANE_SKIP_${PN} += "libdir"
+INSANE_SKIP_${PN}-dev += "libdir"
+
+do_configure[noexec] = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngrbuf-tp-user-module.bb b/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngrbuf-tp-user-module.bb
new file mode 100644
index 0000000..c07945d
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngrbuf-tp-user-module.bb
@@ -0,0 +1,29 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "CLOSED"
+DEPENDS = "mmngrbuf-kernel-module mmngrbuf-user-module"
+SRC_URI = "file://mmngrbuf-tp-user.tar.bz2"
+
+S = "${WORKDIR}/mmngrbuf"
+
+do_compile() {
+ # Build test kernel module
+ cd ${S}
+ make all ARCH=arm
+}
+
+do_install() {
+ # Copy kernel test program
+ mkdir -p ${D}/usr/local/bin/
+ cp ${S}/mmbuftp ${D}/usr/local/bin/
+}
+
+PACKAGES = "\
+ ${PN} \
+"
+FILES_${PN} = " \
+ /usr/local/bin/mmbuftp \
+"
+
+RPROVIDES_${PN} += "mmngrbuf-tp-user-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
diff --git a/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngrbuf-user-module.bb b/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngrbuf-user-module.bb
new file mode 100644
index 0000000..d2f90e0
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/mmngr-module/mmngrbuf-user-module.bb
@@ -0,0 +1,67 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "CLOSED"
+DEPENDS = "mmngrbuf-kernel-module"
+PN = "mmngrbuf-user-module"
+PR = "r0"
+S = "${WORKDIR}/mmngrbuf"
+SRC_URI = "file://mmngrbuf.tar.bz2"
+
+
+do_compile() {
+ # Build shared library
+ cd ${S}/if
+ rm -rf ${S}/if/libmmngrbuf.so*
+ make all ARCH=arm
+ # Copy shared library into shared folder
+ cp -P ${S}/if/libmmngrbuf.so* ${LIBSHARED}
+}
+
+do_install() {
+ mkdir -p ${D}/usr/local/lib/ ${D}/usr/local/include
+
+ # Copy shared library
+ cp -P ${S}/if/libmmngrbuf.so* ${D}/usr/local/lib/
+ cd ${D}/usr/local/lib/
+ # Copy shared header files
+ cp -f ${BUILDDIR}/include/mmngr_buf_user_public.h ${D}/usr/local/include
+ cp -f ${BUILDDIR}/include/mmngr_buf_user_private.h ${D}/usr/local/include
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ rm -f ${LIBSHARED}/libmmngrbuf.so*
+ rm -Rf ${BUILDDIR}/include/mmngr_buf_user_public.h
+ rm -Rf ${BUILDDIR}/include/mmngr_buf_user_private.h
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /usr/local/lib/libmmngrbuf.so.* \
+"
+
+FILES_${PN}-dev = " \
+ /usr/local/include \
+ /usr/local/include/*.h \
+ /usr/local/lib \
+ /usr/local/lib/libmmngrbuf.so \
+"
+
+RPROVIDES_${PN} += "mmngrbuf-user-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+INSANE_SKIP_${PN} += "libdir"
+INSANE_SKIP_${PN}-dev += "libdir"
+
+do_configure[noexec] = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-multimedia/omx-module/files/.gitkeep b/meta-rcar-gen2/recipes-multimedia/omx-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/omx-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-multimedia/omx-module/omx-user-module.bb b/meta-rcar-gen2/recipes-multimedia/omx-module/omx-user-module.bb
new file mode 100644
index 0000000..f4f0c8b
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/omx-module/omx-user-module.bb
@@ -0,0 +1,426 @@
+require ../../include/rcar-gen2-modules-common.inc
+require ../../include/omx-components-control.inc
+
+LICENSE = "CLOSED"
+DEPENDS = "mmngr-kernel-module mmngr-user-module \
+ vspm-kernel-module vspm-user-module \
+ s3ctl-kernel-module s3ctl-user-module \
+ fdpm-kernel-module fdpm-user-module \
+ uvcs-kernel-module"
+
+PR = "r0"
+PV = "1.0"
+PN = "omx-user-module"
+
+SRC_URI = "file://RTM0AC0000XCMCTL20SL32C.tar.bz2;name=file1 \
+ file://RTM0AC0000XVCMND20SL32C.tar.bz2;name=file2 \
+ file://RTM0AC0000XV264D20SL32C.tar.bz2;name=file3 \
+ "
+SRC_URI += '${@base_conditional( "USE_H263_DECODER", "1", " file://RTM0AC0000XV263D20SL32C.tar.bz2;name=file4", "", d )}'
+SRC_URI += '${@base_conditional( "USE_MPEG2_DECODER", "1", " file://RTM0AC0000XVM2VD20SL32C.tar.bz2;name=file5", "", d )}'
+SRC_URI += '${@base_conditional( "USE_MPEG4_DECODER", "1", " file://RTM0AC0000XVM4VD20SL32C.tar.bz2;name=file6", "", d )}'
+SRC_URI += '${@base_conditional( "USE_DIVX_DECODER", "1", " file://RTM0AC0000XVDVXD20SL32C.tar.bz2;name=file7", "", d )}'
+SRC_URI += '${@base_conditional( "USE_VC1_DECODER", "1", " file://RTM0AC0000XVVC1D20SL32C.tar.bz2;name=file8", "", d )}'
+SRC_URI += '${@base_conditional( "USE_H264AVC_ENCODER", "1", " file://RTM0AC0000XV264E20SL32C.tar.bz2;name=file9", "", d )}'
+SRC_URI += '${@base_conditional( "USE_VIDEO_COMMON_ENCODER", "1", " file://RTM0AC0000XVCMNE20SL32C.tar.bz2;name=file10", "", d )}'
+SRC_URI += '${@base_conditional( "USE_AUDIO_COMMON", "1", " file://RTM0AC0000XACMND20SL32C.tar.bz2;name=file11", "", d )}'
+SRC_URI += '${@base_conditional( "USE_AACP2_DECODER", "1", " file://RTM0AC0000XAAAPD20SL32C.tar.bz2;name=file12", "", d )}'
+SRC_URI += '${@base_conditional( "USE_MP3_DECODER", "1", " file://RTM0AC0000XAMP3D20SL32C.tar.bz2;name=file13", "", d )}'
+SRC_URI += '${@base_conditional( "USE_WMA_DECODER", "1", " file://RTM0AC0000XAWMAD20SL32C.tar.bz2;name=file14", "", d )}'
+SRC_URI += '${@base_conditional( "USE_DDD_DECODER", "1", " file://RTM0AC0000XADD5D20SL32C.tar.bz2;name=file15", "", d )}'
+SRC_URI += '${@base_conditional( "USE_ALAC_DECODER", "1", " file://RTM0AC0000XAALAD20SL32C.tar.bz2;name=file16", "", d )}'
+SRC_URI += '${@base_conditional( "USE_FLAC_DECODER", "1", " file://RTM0AC0000XAFLAD20SL32C.tar.bz2;name=file17", "", d )}'
+SRC_URI += '${@base_conditional( "USE_AAC_ENCODER", "1", " file://RTM0AC0000XAAACE20SL32C.tar.bz2;name=file18", "", d )}'
+SRC_URI += '${@base_conditional( "ARMAACP2_MDW_DECODER", "1", " file://RTM0AC0000ADAAPMZ1SL32C.tar.bz2;name=file19", "", d )}'
+SRC_URI += '${@base_conditional( "MP3_MDW_DECODER", "1", " file://RTM0AC0000ADMP3MZ1SL32C.tar.bz2;name=file20", "", d )}'
+SRC_URI += '${@base_conditional( "WMA_MDW_DECODER", "1", " file://RTM0AC0000ADWMAMZ1SL32C.tar.bz2;name=file21", "", d )}'
+SRC_URI += '${@base_conditional( "DDD_MDW_DECODER", "1", " file://RTM0AC0000ADDD5MZ1SL32C.tar.bz2;name=file22", "", d )}'
+SRC_URI += '${@base_conditional( "ALAC_MDW_DECODER", "1", " file://RCG2ADALAMZ1SL32.tar.bz2;name=file23", "", d )}'
+SRC_URI += '${@base_conditional( "FLAC_MDW_DECODER", "1", " file://RCG2ADFLAMZ1SL32.tar.bz2;name=file24", "", d )}'
+SRC_URI += '${@base_conditional( "AAC_MDW_ENCODER", "1", " file://RTM0AC0000AEAACMZ1SL32C.tar.bz2;name=file25", "", d )}'
+
+LISTSRC = "RTM0AC0000XCMCTL20SL32C \
+ RTM0AC0000XVCMND20SL32C \
+ RTM0AC0000XV264D20SL32C"
+
+LISTSRC += '${@base_conditional( "USE_H263_DECODER", "1", "RTM0AC0000XV263D20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_MPEG2_DECODER", "1", "RTM0AC0000XVM2VD20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_MPEG4_DECODER", "1", "RTM0AC0000XVM4VD20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_DIVX_DECODER", "1", "RTM0AC0000XVDVXD20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_VC1_DECODER", "1", "RTM0AC0000XVVC1D20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_H264AVC_ENCODER", "1", "RTM0AC0000XV264E20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_VIDEO_COMMON_ENCODER", "1", "RTM0AC0000XVCMNE20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_AUDIO_COMMON", "1", "RTM0AC0000XACMND20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_AACP2_DECODER", "1", "RTM0AC0000XAAAPD20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_MP3_DECODER", "1", "RTM0AC0000XAMP3D20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_WMA_DECODER", "1", "RTM0AC0000XAWMAD20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_DDD_DECODER", "1", "RTM0AC0000XADD5D20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_ALAC_DECODER", "1", "RTM0AC0000XAALAD20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_FLAC_DECODER", "1", "RTM0AC0000XAFLAD20SL32C", "", d )}'
+LISTSRC += '${@base_conditional( "USE_AAC_ENCODER", "1", "RTM0AC0000XAAACE20SL32C", "", d )}'
+
+MIDWARESRC = '${@base_conditional( "ARMAACP2_MDW_DECODER", "1", "RTM0AC0000ADAAPMZ1SL32C", "", d )}'
+MIDWARESRC += '${@base_conditional( "MP3_MDW_DECODER", "1", "RTM0AC0000ADMP3MZ1SL32C", "", d )}'
+MIDWARESRC += '${@base_conditional( "WMA_MDW_DECODER", "1", "RTM0AC0000ADWMAMZ1SL32C", "", d )}'
+MIDWARESRC += '${@base_conditional( "DDD_MDW_DECODER", "1", "RTM0AC0000ADDD5MZ1SL32C", "", d )}'
+MIDWARESRC += '${@base_conditional( "ALAC_MDW_DECODER", "1", "RCG2ADALAMZ1SL32", "", d )}'
+MIDWARESRC += '${@base_conditional( "FLAC_MDW_DECODER", "1", "RCG2ADFLAMZ1SL32", "", d )}'
+MIDWARESRC += '${@base_conditional( "AAC_MDW_ENCODER", "1", "RTM0AC0000AEAACMZ1SL32C", "", d )}'
+
+S = "${WORKDIR}/omx"
+
+do_unpack_append () {
+ bb.build.exec_func('do_collect_src', d)
+}
+
+do_collect_src() {
+ cd ${WORKDIR}
+ mkdir -p ${S}
+ for dir in ${LISTSRC}; do
+ cp -rf ${dir}/Software/* ${S}
+ rm -rf ${dir}
+ done
+ cp -rf ${S}/OMXR/include ${S}/UDF_Linux
+ cp -rf ${S}/OMXR/lib/linux/linaro_4_7_3/* ${S}/OMXR/lib/
+ rm -rf ${S}/OMXR/lib/linux/
+
+ # Colect audio midleware
+ mkdir -p ${S}/audio_mdw
+ for dir in ${MIDWARESRC}; do
+ cp -rf ${dir}/* ${S}/audio_mdw
+ rm -rf ${dir}
+ done
+}
+
+
+do_configure() {
+ cd ${S}/UDF_Linux
+ ./autogen.sh
+ ./configure --prefix=${D}/usr/local/ --host=arm-linux \
+ CFLAGS="-I${BUILDDIR}/include -I${KERNELDIR}/include" \
+ LDFLAGS="-L${LIBSHARED}" \
+ OMXR_DEFAULT_CONFIG_FILE_NAME=/usr/local/config/omxr_config_base.txt
+}
+
+do_compile() {
+ cd ${S}/UDF_Linux
+ make
+}
+
+do_install() {
+ # Create share files
+ mkdir -p ${D}/usr/local/lib ${D}/usr/local/config
+ cd ${S}/UDF_Linux
+ make install
+ cp -rf ${S}/OMXR/config/*.txt ${D}/usr/local/config/
+ cp -rf ${S}/UDF_Linux/include ${D}/usr/local/include
+ cp -rf ${S}/UDF_Linux/include/*.h ${STAGING_INCDIR}
+
+ cd ${S}/OMXR/lib/
+
+ # OMX ctrl part
+ ln -sf libomxr_core.so.2.0.0 libomxr_core.so.2
+ ln -sf libomxr_core.so.2.0.0 libomxr_core.so
+
+ ln -sf libomxr_mc_cmn.so.2.0.0 libomxr_mc_cmn.so.2
+ ln -sf libomxr_mc_cmn.so.2.0.0 libomxr_mc_cmn.so
+
+ # Video (decode) common
+ ln -sf libomxr_mc_vcmn.so.2.0.0 libomxr_mc_vcmn.so.2
+ ln -sf libomxr_mc_vcmn.so.2.0.0 libomxr_mc_vcmn.so
+
+ ln -sf libomxr_mc_vdcmn.so.2.0.0 libomxr_mc_vdcmn.so.2
+ ln -sf libomxr_mc_vdcmn.so.2.0.0 libomxr_mc_vdcmn.so
+
+ ln -sf libuvcs_dec.so.1.0.0 libuvcs_dec.so.1
+ ln -sf libuvcs_dec.so.1.0.0 libuvcs_dec.so
+
+ ln -sf libvcp3_mcvd.so.1.0.0 libvcp3_mcvd.so.1
+ ln -sf libvcp3_mcvd.so.1.0.0 libvcp3_mcvd.so
+
+ # H264 Decoder
+ ln -sf libomxr_mc_h264d.so.2.0.0 libomxr_mc_h264d.so.2
+ ln -sf libomxr_mc_h264d.so.2.0.0 libomxr_mc_h264d.so
+
+ ln -sf libvcp3_avcd.so.1.0.0 libvcp3_avcd.so.1
+ ln -sf libvcp3_avcd.so.1.0.0 libvcp3_avcd.so
+
+ # H263 Decoder
+ if [ "X${USE_H263_DECODER}" = "X1" ] ; then
+ ln -sf libomxr_mc_h263d.so.2.0.0 libomxr_mc_h263d.so.2
+ ln -sf libomxr_mc_h263d.so.2.0.0 libomxr_mc_h263d.so
+
+ ln -sf libvcp3_hv3d.so.1.0.0 libvcp3_hv3d.so.1
+ ln -sf libvcp3_hv3d.so.1.0.0 libvcp3_hv3d.so
+ fi
+
+ # M2VD decoder
+ if [ "X${USE_MPEG2_DECODER}" = "X1" ] ; then
+ ln -sf libvcp3_m2vd.so.1.0.0 libvcp3_m2vd.so.1
+ ln -sf libvcp3_m2vd.so.1 libvcp3_m2vd.so
+
+ ln -sf libomxr_mc_m2vd.so.2.0.0 libomxr_mc_m2vd.so.2
+ ln -sf libomxr_mc_m2vd.so.2 libomxr_mc_m2vd.so
+ fi
+
+ # M4VD decoder
+ if [ "X${USE_MPEG4_DECODER}" = "X1" ] ; then
+ ln -sf libvcp3_m4vd.so.1.0.0 libvcp3_m4vd.so.1
+ ln -sf libvcp3_m4vd.so.1 libvcp3_m4vd.so
+
+ ln -sf libomxr_mc_m4vd.so.2.0.0 libomxr_mc_m4vd.so.2
+ ln -sf libomxr_mc_m4vd.so.2 libomxr_mc_m4vd.so
+ fi
+
+ # DIVX decoder
+ if [ "X${USE_DIVX_DECODER}" = "X1" ] ; then
+ ln -sf libvcp3_dvxd.so.1.0.0 libvcp3_dvxd.so.1
+ ln -sf libvcp3_dvxd.so.1 libvcp3_dvxd.so
+
+ ln -sf libomxr_mc_divxd.so.2.0.0 libomxr_mc_divxd.so.2
+ ln -sf libomxr_mc_divxd.so.2 libomxr_mc_divxd.so
+ fi
+
+ # VC1D decoder
+ if [ "X${USE_VC1_DECODER}" = "X1" ] ; then
+ ln -sf libvcp3_vc1d.so.1.0.0 libvcp3_vc1d.so.1
+ ln -sf libvcp3_vc1d.so.1 libvcp3_vc1d.so
+
+ ln -sf libomxr_mc_vc1d.so.2.0.0 libomxr_mc_vc1d.so.2
+ ln -sf libomxr_mc_vc1d.so.2 libomxr_mc_vc1d.so
+ fi
+
+ #Encoder
+ # H264E
+ if [ "X${USE_H264AVC_ENCODER}" = "X1" ] ; then
+ ln -sf libomxr_mc_h264e.so.2.0.0 libomxr_mc_h264e.so.2
+ ln -sf libomxr_mc_h264e.so.2 libomxr_mc_h264e.so
+
+ ln -sf libvcp3_avce.so.1.0.0 libvcp3_avce.so.1
+ ln -sf libvcp3_avce.so.1.0.0 libvcp3_avce.so
+ fi
+
+ ### Encoder common
+ if [ "X${USE_VIDEO_COMMON_ENCODER}" = "X1" ] ; then
+ ln -sf libomxr_mc_vecmn.so.2.0.0 libomxr_mc_vecmn.so.2
+ ln -sf libomxr_mc_vecmn.so.2.0.0 libomxr_mc_vecmn.so
+
+ ln -sf libuvcs_enc.so.1.0.0 libuvcs_enc.so.1
+ ln -sf libuvcs_enc.so.1.0.0 libuvcs_enc.so
+
+ ln -sf libvcp3_mcve.so.1.0.0 libvcp3_mcve.so.1
+ ln -sf libvcp3_mcve.so.1.0.0 libvcp3_mcve.so
+ fi
+
+ # audio common OMX
+ if [ "X${USE_AUDIO_COMMON}" = "X1" ] ; then
+ ln -sf libomxr_mc_acmn.so.2.0.0 libomxr_mc_acmn.so.2
+ ln -sf libomxr_mc_acmn.so.2.0.0 libomxr_mc_acmn.so
+ fi
+
+ # aacd OMX
+ if [ "X${USE_AACP2_DECODER}" = "X1" ] ; then
+ ln -sf libomxr_mc_aacd.so.2.0.0 libomxr_mc_aacd.so.2
+ ln -sf libomxr_mc_aacd.so.2.0.0 libomxr_mc_aacd.so
+ fi
+
+ # mp3 OMX
+ if [ "X${USE_MP3_DECODER}" = "X1" ] ; then
+ ln -sf libomxr_mc_mp3d.so.2.0.0 libomxr_mc_mp3d.so.2
+ ln -sf libomxr_mc_mp3d.so.2.0.0 libomxr_mc_mp3d.so
+ fi
+
+ # wma OMX
+ if [ "X${USE_WMA_DECODER}" = "X1" ] ; then
+ ln -sf libomxr_mc_wmad.so.2.0.0 libomxr_mc_wmad.so.2
+ ln -sf libomxr_mc_wmad.so.2.0.0 libomxr_mc_wmad.so
+ fi
+
+ # ddd OMX
+ if [ "X${USE_DDD_DECODER}" = "X1" ] ; then
+ ln -sf libomxr_mc_ddd.so.2.0.0 libomxr_mc_ddd.so.2
+ ln -sf libomxr_mc_ddd.so.2.0.0 libomxr_mc_ddd.so
+ fi
+
+ # alac OMX
+ if [ "X${USE_ALAC_DECODER}" = "X1" ] ; then
+ ln -sf libomxr_mc_alacd.so.2.0.0 libomxr_mc_alacd.so.2
+ ln -sf libomxr_mc_alacd.so.2.0.0 libomxr_mc_alacd.so
+ fi
+
+ # flac OMX
+ if [ "X${USE_FLAC_DECODER}" = "X1" ] ; then
+ ln -sf libomxr_mc_flacd.so.2.0.0 libomxr_mc_flacd.so.2
+ ln -sf libomxr_mc_flacd.so.2.0.0 libomxr_mc_flacd.so
+ fi
+
+ # aac enc omx
+ if [ "X${USE_AAC_ENCODER}" = "X1" ] ; then
+ ln -sf libomxr_mc_aace.so.2.0.0 libomxr_mc_aace.so.2
+ ln -sf libomxr_mc_aace.so.2.0.0 libomxr_mc_aace.so
+ fi
+
+ # Copy all the symbolic link and lib to destination
+ cp -Prf ${S}/OMXR/lib/* ${D}/usr/local/lib
+
+ # Copy the audio midleware
+ # audio aacp2 midleware
+ if [ "X${ARMAACP2_MDW_DECODER}" = "X1" ] ; then
+ cd ${S}/audio_mdw
+ ln -sf libRSACPDLA_L.so.1.1 libRSACPDAL_L.so.1.1
+ ln -sf libRSACPDLA_L.so.1.1 libRSACPDLA_L.so.1
+ ln -sf libRSACPDLA_L.so.1.1 libRSACPDLA_L.so
+ ln -sf libRSACPDAL_L.so.1.1 libRSACPDAL_L.so.1
+ ln -sf libRSACPDAL_L.so.1.1 libRSACPDAL_L.so
+ cp -P ${S}/audio_mdw/*.so* ${D}/usr/local/lib/
+ cp -P ${S}/audio_mdw/RSACPD_ADL.h ${D}/usr/local/include
+ cp -P ${S}/audio_mdw/RSACPD_ADL.h ${STAGING_INCDIR}
+ fi
+
+ if [ "X${MP3_MDW_DECODER}" = "X1" ] ; then
+ cd ${S}/audio_mdw
+ ln -sf libMP3DLA_L.so.1.4 libMP3DLA_L.so.1
+ ln -sf libMP3DLA_L.so.1.4 libMP3DLA_L.so
+ cp -P ${S}/audio_mdw/*.so* ${D}/usr/local/lib/
+ cp -P ${S}/audio_mdw/mp3d_Lib.h ${D}/usr/local/include
+ cp -P ${S}/audio_mdw/mp3d_Lib.h ${STAGING_INCDIR}
+ fi
+
+ if [ "X${WMA_MDW_DECODER}" = "X1" ] ; then
+ cd ${S}/audio_mdw
+ ln -sf libWMASTDLA_L.so.1.3 libWMASTDLA_L.so.1
+ ln -sf libWMASTDLA_L.so.1.3 libWMASTDLA_L.so
+ cp -P ${S}/audio_mdw/*.so* ${D}/usr/local/lib/
+ cp -P ${S}/audio_mdw/wmastd_Lib.h ${D}/usr/local/include
+ cp -P ${S}/audio_mdw/wmastd_Lib.h ${STAGING_INCDIR}
+ fi
+
+ if [ "X${DDD_MDW_DECODER}" = "X1" ] ; then
+ cd ${S}/audio_mdw
+ ln -sf libRSDACDLA_L.so.1.0 libRSDACDLA_L.so.1
+ ln -sf libRSDACDLA_L.so.1.0 libRSDACDLA_L.so
+ cp -P ${S}/audio_mdw/*.so* ${D}/usr/local/lib/
+ cp -P ${S}/audio_mdw/RSDACD_ADL.h ${D}/usr/local/include
+ cp -P ${S}/audio_mdw/RSDACD_ADL.h ${STAGING_INCDIR}
+ fi
+
+ if [ "X${ALAC_MDW_DECODER}" = "X1" ] ; then
+ cd ${S}/audio_mdw
+ ln -sf libALACDLA_L.so.1.0 libALACDLA_L.so.1
+ ln -sf libALACDLA_L.so.1.0 libALACDLA_L.so
+ cp -P ${S}/audio_mdw/*.so* ${D}/usr/local/lib/
+ cp -P ${S}/audio_mdw/alacd_Lib.h ${D}/usr/local/include
+ cp -P ${S}/audio_mdw/alacd_Lib.h ${STAGING_INCDIR}
+ fi
+
+ if [ "X${FLAC_MDW_DECODER}" = "X1" ] ; then
+ cd ${S}/audio_mdw
+ ln -sf libFLACDLA_L.so.1.1 libFLACDLA_L.so.1
+ ln -sf libFLACDLA_L.so.1.1 libFLACDLA_L.so
+ cp -P ${S}/audio_mdw/*.so* ${D}/usr/local/lib/
+ cp -P ${S}/audio_mdw/flacd_Lib.h ${D}/usr/local/include
+ cp -P ${S}/audio_mdw/flacd_Lib.h ${STAGING_INCDIR}
+ fi
+
+ if [ "X${AAC_MDW_ENCODER}" = "X1" ] ; then
+ cd ${S}/audio_mdw
+ ln -sf libRSAACELA_L.so.2.1 libRSAACELA_L.so.2
+ ln -sf libRSAACELA_L.so.2.1 libRSAACELA_L.so
+ cp -P ${S}/audio_mdw/*.so* ${D}/usr/local/lib/
+ cp -P ${S}/audio_mdw/RSAACE_AAC.h ${D}/usr/local/include
+ cp -P ${S}/audio_mdw/RSAACE_AAC.h ${STAGING_INCDIR}
+ fi
+}
+
+do_install_append() {
+ if [ "X${MACHINE}" = "Xsilk" -o "X${MACHINE}" = "Xporter" ] ; then
+ cd ${S}/OMXR/lib/
+
+ ln -sf libomxr_core.so.0.0.0 libomxr_core.so.2.0.0
+ ln -sf libomxr_core.so.0.0.0 libomxr_core.so.0
+ ln -sf libomxr_mc_cmn.so.0.0.0 libomxr_mc_cmn.so.2.0.0
+ ln -sf libomxr_mc_h264d.so.0.0.0 libomxr_mc_h264d.so.2.0.0
+ ln -sf libomxr_mc_h264d.so.0.0.0 libomxr_mc_h264d.so.0
+ ln -sf libomxr_mc_h264e.so.0.0.0 libomxr_mc_h264e.so.2.0.0
+ ln -sf libomxr_mc_h264e.so.0.0.0 libomxr_mc_h264e.so.0
+ ln -sf libomxr_mc_vecmn.so.0.0.0 libomxr_mc_vecmn.so.2.0.0
+ ln -sf libomxr_mc_vcmn.so.0.0.0 libomxr_mc_vcmn.so.2.0.0
+ ln -sf libomxr_mc_vdcmn.so.0.0.0 libomxr_mc_vdcmn.so.2.0.0
+ ln -sf libuvcs_dec.so.0.0.0 libuvcs_dec.so.1.0.0
+ ln -sf libuvcs_enc.so.0.0.0 libuvcs_enc.so.1.0.0
+ ln -sf libvcp3_avcd.so.0.0.0 libvcp3_avcd.so.1.0.0
+ ln -sf libvcp3_avce.so.0.0.0 libvcp3_avce.so.1.0.0
+ ln -sf libvcp3_mcvd.so.0.0.0 libvcp3_mcvd.so.1.0.0
+ ln -sf libvcp3_mcve.so.0.0.0 libvcp3_mcve.so.1.0.0
+
+ # Copy all the symbolic link and lib to destination
+ cp -Prf ${S}/OMXR/lib/* ${D}/usr/local/lib
+ fi
+}
+
+SYSROOT_PREPROCESS_FUNCS += "do_populate_share_lib"
+
+do_populate_share_lib () {
+ sysroot_stage_dir ${D}/usr/local/lib ${SYSROOT_DESTDIR}/usr/lib
+}
+
+# Append function to clean extract source
+CLEANFUNCS += 'do_clean_sharedfiles'
+
+do_clean_sharedfiles() {
+ rm -f ${LIBSHARED}/libomxr_*.so*
+ rm -f ${LIBSHARED}/libuvcs*.so*
+ rm -f ${LIBSHARED}/libvcp3_*.so*
+ rm -f ${STAGING_INCDIR}/OMX_*.h
+ rm -f ${STAGING_INCDIR}/OMXR_*.h
+
+ rm -f ${LIBSHARED}/libRSACPDLA_L.so*
+ rm -f ${LIBSHARED}/libRSACPDAL_L.so*
+ rm -f ${STAGING_INCDIR}/RSACPD_ADL.h
+
+ rm -f ${LIBSHARED}/libMP3DLA_L.so*
+ rm -f ${STAGING_INCDIR}/mp3d_Lib.h
+
+ rm -f ${LIBSHARED}/libWMASTDLA_L.so*
+ rm -f ${STAGING_INCDIR}/wmastd_Lib.h
+
+ rm -f ${LIBSHARED}/libRSDACDLA_L.so*
+ rm -f ${STAGING_INCDIR}/RSDACD_ADL.h
+
+ rm -f ${LIBSHARED}/libALACDLA_L.so*
+ rm -f ${STAGING_INCDIR}/alacd_Lib.h
+
+ rm -f ${LIBSHARED}/libFLACDLA_L.so*
+ rm -f ${STAGING_INCDIR}/flacd_Lib.h
+
+ rm -f ${LIBSHARED}/libRSAACELA_L.so*
+ rm -f ${STAGING_INCDIR}/RSAACE_AAC.h
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+ ${PN}-staticdev \
+"
+
+FILES_${PN} = " \
+ /usr/local/lib/*.so \
+ /usr/local/lib/*.so.* \
+ /usr/local/config/* \
+"
+
+FILES_${PN}-dev = " \
+ /usr/local/include/* \
+"
+
+FILES_${PN}-staticdev = " \
+ /usr/local/lib/*.a \
+ /usr/local/lib/*.la \
+"
+
+INSANE_SKIP_${PN} += "rpaths"
+INSANE_SKIP_${PN} += "dev-so"
+INSANE_SKIP_${PN} += "libdir"
+INSANE_SKIP_${PN}-dev += "libdir"
+RPROVIDES_${PN} += "omx-user-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
diff --git a/meta-rcar-gen2/recipes-multimedia/packagegroups/packagegroup-rcar-gen2-multimedia.bb b/meta-rcar-gen2/recipes-multimedia/packagegroups/packagegroup-rcar-gen2-multimedia.bb
new file mode 100644
index 0000000..688c6b7
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/packagegroups/packagegroup-rcar-gen2-multimedia.bb
@@ -0,0 +1,69 @@
+require ../../include/gles-control.inc
+require ../../include/multimedia-control.inc
+
+DESCRIPTION = "Package Group for multimedia of R-Car Gen2"
+LICENSE = "CLOSED"
+
+inherit packagegroup
+
+PACKAGES = "\
+ packagegroup-rcar-gen2-multimedia \
+ packagegroup-rcar-gen2-multimedia-tp \
+ packagegroup-rcar-gen2-dtv \
+"
+
+MULTIMEDIA_PACKAGES ="\
+ mmngr-kernel-module mmngr-user-module \
+ mmngrbuf-kernel-module mmngrbuf-user-module \
+ mmngrbuf-user-module-dev \
+ fdpm-kernel-module fdpm-user-module \
+ vspm-kernel-module vspm-user-module \
+ s3ctl-kernel-module s3ctl-user-module \
+ uvcs-kernel-module omx-user-module \
+ libmemcpy \
+"
+
+RDEPENDS_packagegroup-rcar-gen2-multimedia = "\
+ ${@ "${MULTIMEDIA_PACKAGES}" if "${USE_MULTIMEDIA}" == "1" else "" } \
+ media-ctl \
+ gstreamer1.0-meta-base \
+ gstreamer1.0-meta-audio \
+ gstreamer1.0-meta-video \
+ gstreamer1.0-plugins-base-audioconvert \
+ gstreamer1.0-plugins-base-audioresample \
+ gstreamer1.0-plugins-base-playback \
+ gstreamer1.0-plugins-base-videoconvert \
+ gstreamer1.0-plugins-base-typefindfunctions \
+ gstreamer1.0-plugins-base-videoscale \
+ gstreamer1.0-plugins-good-avi \
+ gstreamer1.0-plugins-good-audioparsers \
+ gstreamer1.0-plugins-good-id3demux \
+ gstreamer1.0-plugins-bad-faad \
+ gstreamer1.0-plugins-bad-mpegtsdemux \
+ gstreamer1.0-plugins-bad-debugutilsbad \
+ ${@base_contains("LICENSE_FLAGS_WHITELIST", "commercial", "gstreamer1.0-omx gstreamer1.0-plugins-ugly-asf", "", d )} \
+ ${@base_conditional("USE_GLES_WAYLAND", "1", "gstreamer1.0-plugins-base-vspfilter", "", d )} \
+"
+
+MULTIMEDIA_TEST_PACKAGES = "\
+ ${MULTIMEDIA_PACKAGES} \
+ mmngr-tp-user-module \
+ mmngrbuf-tp-user-module \
+ fdpm-tp-user-module \
+ vspm-tp-user-module \
+ s3ctl-tp-user-module \
+"
+
+RDEPENDS_packagegroup-rcar-gen2-multimedia-tp = "\
+ ${@ '${MULTIMEDIA_TEST_PACKAGES}' if '${USE_MULTIMEDIA}' == '1' and '${USE_MULTIMEDIA_TEST}' == '1' else '' } \
+"
+
+DTV_PACKAGES = "\
+ ${MULTIMEDIA_PACKAGES} \
+ scu-kernel-module ssp-kernel-module \
+ dtv \
+"
+
+RDEPENDS_packagegroup-rcar-gen2-dtv = "\
+ ${@ '${DTV_PACKAGES}' if '${USE_DTV}' == '1' else '' } \
+"
diff --git a/meta-rcar-gen2/recipes-multimedia/packagegroups/packagegroup-rcar-gen2-multimedia.bbappend b/meta-rcar-gen2/recipes-multimedia/packagegroups/packagegroup-rcar-gen2-multimedia.bbappend
new file mode 100644
index 0000000..b74228d
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/packagegroups/packagegroup-rcar-gen2-multimedia.bbappend
@@ -0,0 +1,17 @@
+PACKAGES_append_silk = " packagegroup-lcb-oss-codecs"
+PACKAGES_append_porter = " packagegroup-lcb-oss-codecs"
+
+RDEPENDS_packagegroup-lcb-oss-codecs = "\
+ libmad \
+ lame \
+ faac \
+ faad2 \
+ libvorbis \
+ libogg \
+ gstreamer1.0-plugins-ugly-mad \
+ gstreamer1.0-plugins-ugly-lame \
+ gstreamer1.0-plugins-bad-faac \
+ gstreamer1.0-plugins-bad-faad \
+ gstreamer1.0-plugins-base-ogg \
+ gstreamer1.0-plugins-base-vorbis \
+"
diff --git a/meta-rcar-gen2/recipes-multimedia/s3ctl-module/files/.gitkeep b/meta-rcar-gen2/recipes-multimedia/s3ctl-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/s3ctl-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-multimedia/s3ctl-module/s3ctl-tp-user-module.bb b/meta-rcar-gen2/recipes-multimedia/s3ctl-module/s3ctl-tp-user-module.bb
new file mode 100644
index 0000000..3fcc5ad
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/s3ctl-module/s3ctl-tp-user-module.bb
@@ -0,0 +1,32 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "CLOSED"
+DEPENDS = "s3ctl-kernel-module s3ctl-user-module"
+SRC_URI = "file://s3ctl-tp-user.tar.bz2"
+S = "${WORKDIR}/s3ctl"
+
+do_compile() {
+ # Build user test program
+ cd ${S}
+ make all ARCH=arm
+}
+
+do_install() {
+ # Create shared folder
+ mkdir -p ${D}/usr/local/bin/
+ # Copy user test program
+ cp ${S}/s3tp ${D}/usr/local/bin/
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+ ${PN}-dbg \
+"
+
+FILES_${PN} = " \
+ /usr/local/bin/s3tp \
+"
+
+RPROVIDES_${PN} += "s3ctl-tp-user-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
diff --git a/meta-rcar-gen2/recipes-multimedia/s3ctl-module/s3ctl-user-module.bb b/meta-rcar-gen2/recipes-multimedia/s3ctl-module/s3ctl-user-module.bb
new file mode 100644
index 0000000..ed02e0a
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/s3ctl-module/s3ctl-user-module.bb
@@ -0,0 +1,64 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "CLOSED"
+DEPENDS = "s3ctl-kernel-module"
+PN = "s3ctl-user-module"
+PR = "r0"
+SRC_URI = "file://s3ctl.tar.bz2"
+
+S = "${WORKDIR}/s3ctl"
+
+do_compile() {
+ # Build shared library
+ cd ${S}/if
+ rm -rf libs3ctl.so*
+ make all ARCH=arm
+ # Copy shared library for reference from other modules
+ cp -P ${S}/if/libs3ctl.so* ${LIBSHARED}
+}
+
+do_install() {
+ # Create shared folder
+ mkdir -p ${D}/usr/local/lib/ ${D}/usr/local/include/
+ # Copy share library
+ cp -P ${S}/if/libs3ctl.so* ${D}/usr/local/lib/
+ # Copy shared header files
+ cp -f ${BUILDDIR}/include/s3ctl_user_public.h ${D}/usr/local/include/
+ cp -f ${BUILDDIR}/include/s3ctl_user_private.h ${D}/usr/local/include/
+}
+
+# Append function to clean extract source
+do_cleansstate_prepend() {
+ bb.build.exec_func('do_clean_source', d)
+}
+
+do_clean_source() {
+ rm -f ${LIBSHARED}/libs3ctl.so*
+ rm -f ${BUILDDIR}/include/s3ctl_user_public.h
+ rm -f ${BUILDDIR}/include/s3ctl_user_private.h
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /usr/local/lib/libs3ctl.so.* \
+"
+
+FILES_${PN}-dev = " \
+ /usr/local/lib/libs3ctl.so \
+ /usr/local/include/*.h \
+"
+
+RPROVIDES_${PN} += "s3ctl-user-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+INSANE_SKIP_${PN} += "libdir"
+INSANE_SKIP_${PN}-dev += "libdir"
+
+do_configure[noexec] = "1"
+
+python do_package_ipk_prepend () {
+ d.setVar('ALLOW_EMPTY', '1')
+}
diff --git a/meta-rcar-gen2/recipes-multimedia/v4l2apps/media-ctl_git.bbappend b/meta-rcar-gen2/recipes-multimedia/v4l2apps/media-ctl_git.bbappend
new file mode 100644
index 0000000..aeb591c
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/v4l2apps/media-ctl_git.bbappend
@@ -0,0 +1,2 @@
+SRCREV = "114c1b274edc40e07e9b99a435d26438f5b99943"
+PV = "0.0.1+git${SRCPV}"
diff --git a/meta-rcar-gen2/recipes-multimedia/vspm-module/files/.gitkeep b/meta-rcar-gen2/recipes-multimedia/vspm-module/files/.gitkeep
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/vspm-module/files/.gitkeep
diff --git a/meta-rcar-gen2/recipes-multimedia/vspm-module/vspm-tp-user-module.bb b/meta-rcar-gen2/recipes-multimedia/vspm-module/vspm-tp-user-module.bb
new file mode 100644
index 0000000..b7b97a0
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/vspm-module/vspm-tp-user-module.bb
@@ -0,0 +1,29 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "CLOSED"
+DEPENDS = "vspm-user-module mmngr-user-module"
+SRC_URI = "file://vspm-tp-user.tar.bz2"
+S = "${WORKDIR}"
+
+do_compile() {
+ cd ${S}/vspm/
+ make all ARCH=arm
+}
+
+do_install() {
+ # Create destination folder
+ mkdir -p ${D}/usr/local/bin/
+
+ # Copy user test program
+ cp ${S}/vspm/vspm_tp ${D}/usr/local/bin/
+}
+
+PACKAGES = "\
+ ${PN} \
+"
+FILES_${PN} = " \
+ /usr/local/bin/vspm_tp \
+"
+
+RPROVIDES_${PN} += "vspm-tp-user-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
diff --git a/meta-rcar-gen2/recipes-multimedia/vspm-module/vspm-user-module.bb b/meta-rcar-gen2/recipes-multimedia/vspm-module/vspm-user-module.bb
new file mode 100644
index 0000000..3327861
--- /dev/null
+++ b/meta-rcar-gen2/recipes-multimedia/vspm-module/vspm-user-module.bb
@@ -0,0 +1,58 @@
+require ../../include/rcar-gen2-modules-common.inc
+
+LICENSE = "CLOSED"
+DEPENDS = "vspm-kernel-module"
+PN = "vspm-user-module"
+PR = "r0"
+SRC_URI = "file://vspm-user.tar.bz2"
+
+S = "${WORKDIR}"
+
+do_compile() {
+ # Build shared library
+ cd ${S}/vspm/if
+ rm -rf ${S}/vspm/if/libvspm.so*
+ make all ARCH=arm
+ # Copy shared library for reference from other modules
+ cp -P ${S}/vspm/if/libvspm.so* ${LIBSHARED}
+}
+
+do_install() {
+ # Create destination folder
+ mkdir -p ${D}/usr/local/lib/ ${D}/usr/local/include
+ # Copy shared library
+ cp -P ${S}/vspm/if/libvspm.so* ${D}/usr/local/lib/
+ # Copy shared header files
+ cp -f ${BUILDDIR}/include/vspm_public.h ${D}/usr/local/include
+ cp -f ${BUILDDIR}/include/vsp_drv.h ${D}/usr/local/include
+ cp -f ${BUILDDIR}/include/tddmac_drv.h ${D}/usr/local/include
+}
+
+do_clean_source() {
+ rm -f ${LIBSHARED}/libvspm.so*
+ rm -f ${BUILDDIR}/include/vspm_public.h
+ rm -f ${BUILDDIR}/include/vsp_drv.h
+ rm -f ${BUILDDIR}/include/tddmac_drv.h
+}
+
+PACKAGES = "\
+ ${PN} \
+ ${PN}-dev \
+"
+
+FILES_${PN} = " \
+ /usr/local/lib/libvspm.so.* \
+"
+
+FILES_${PN}-dev = " \
+ /usr/local/lib \
+ /usr/local/lib/libvspm.so \
+ /usr/local/lib/* \
+ /usr/local/include \
+ /usr/local/include/*.h \
+"
+
+RPROVIDES_${PN} += "vspm-user-module"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+INSANE_SKIP_${PN} += "libdir"
+INSANE_SKIP_${PN}-dev += "libdir"