diff options
| author |   ToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp> | 2020-03-30 09:24:26 +0900 |
|---|---|---|
| committer | ToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp> | 2020-03-30 09:24:26 +0900 |
| commit | 5b80bfd7bffd4c20d80b7c70a7130529e9a755dd (patch) | |
| tree | b4bb18dcd1487dbf1ea8127e5671b7bb2eded033 /bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0001-ARM-socfpga-stratix10-Enable-PSCI-system-reset.patch | |
| parent | 706ad73eb02caf8532deaf5d38995bd258725cb8 (diff) | |
agl-basesystem
Diffstat (limited to 'bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0001-ARM-socfpga-stratix10-Enable-PSCI-system-reset.patch')
| -rw-r--r-- | bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0001-ARM-socfpga-stratix10-Enable-PSCI-system-reset.patch | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0001-ARM-socfpga-stratix10-Enable-PSCI-system-reset.patch b/bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0001-ARM-socfpga-stratix10-Enable-PSCI-system-reset.patch new file mode 100644 index 00000000..a4b78573 --- /dev/null +++ b/bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0001-ARM-socfpga-stratix10-Enable-PSCI-system-reset.patch @@ -0,0 +1,59 @@ +From 97f599b2a7b34d17067b4ccf6c468cdcc6805349 Mon Sep 17 00:00:00 2001 +From: "Ang, Chee Hong" <chee.hong.ang@intel.com> +Date: Mon, 29 Apr 2019 23:35:30 -0700 +Subject: [PATCH 01/12] ARM: socfpga: stratix10: Enable PSCI system reset + +Enable psci_system_reset support for Stratix10. This PSCI function +will eventually trigger the mailbox HPS_REBOOT to SDM. + +Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com> +--- + arch/arm/mach-socfpga/Makefile | 3 +++ + arch/arm/mach-socfpga/psci.c | 21 +++++++++++++++++++++ + 2 files changed, 24 insertions(+) + create mode 100644 arch/arm/mach-socfpga/psci.c + +diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile +index e66720447f..f77b229a38 100644 +--- a/arch/arm/mach-socfpga/Makefile ++++ b/arch/arm/mach-socfpga/Makefile +@@ -38,6 +38,9 @@ obj-y += system_manager_s10.o + obj-y += timer_s10.o + obj-y += wrap_pinmux_config_s10.o + obj-y += wrap_pll_config_s10.o ++ifndef CONFIG_SPL_BUILD ++obj-$(CONFIG_ARMV8_PSCI) += psci.o ++endif + endif + + ifdef CONFIG_SPL_BUILD +diff --git a/arch/arm/mach-socfpga/psci.c b/arch/arm/mach-socfpga/psci.c +new file mode 100644 +index 0000000000..9ef393110d +--- /dev/null ++++ b/arch/arm/mach-socfpga/psci.c +@@ -0,0 +1,21 @@ ++/* ++ * Copyright (C) 2017 Intel Corporation <www.intel.com> ++ * ++ * SPDX-License-Identifier: GPL-2.0 ++ */ ++ ++#include <common.h> ++#include <asm/io.h> ++#include <asm/psci.h> ++#include <errno.h> ++#include <asm/arch/mailbox_s10.h> ++#include <asm/secure.h> ++ ++void __noreturn __secure psci_system_reset(void) ++{ ++ mbox_send_cmd_psci(MBOX_ID_UBOOT, MBOX_REBOOT_HPS, ++ MBOX_CMD_DIRECT, 0, NULL, 0, 0, NULL); ++ ++ while (1) ++ ; ++} +-- +2.21.0 + |