diff options
author | ToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp> | 2020-03-30 09:24:26 +0900 |
---|---|---|
committer | ToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp> | 2020-03-30 09:24:26 +0900 |
commit | 5b80bfd7bffd4c20d80b7c70a7130529e9a755dd (patch) | |
tree | b4bb18dcd1487dbf1ea8127e5671b7bb2eded033 /bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0010-Makefile-Add-target-to-generate-hex-output-for-combi.patch | |
parent | 706ad73eb02caf8532deaf5d38995bd258725cb8 (diff) |
agl-basesystem
Diffstat (limited to 'bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0010-Makefile-Add-target-to-generate-hex-output-for-combi.patch')
-rw-r--r-- | bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0010-Makefile-Add-target-to-generate-hex-output-for-combi.patch | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0010-Makefile-Add-target-to-generate-hex-output-for-combi.patch b/bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0010-Makefile-Add-target-to-generate-hex-output-for-combi.patch new file mode 100644 index 00000000..113d7672 --- /dev/null +++ b/bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0010-Makefile-Add-target-to-generate-hex-output-for-combi.patch @@ -0,0 +1,79 @@ +From 939875d39e56d6d2c965c2b63d5d2f20dff532e0 Mon Sep 17 00:00:00 2001 +From: Dalon Westergreen <dalon.westergreen@intel.com> +Date: Wed, 20 Mar 2019 11:21:20 -0700 +Subject: [PATCH 10/12] Makefile: Add target to generate hex output for + combined spl and dtb + +Some architectures, Stratix10, require a hex formatted spl that combines +the spl image and dtb. This adds a target to create said hex file with +and offset of SPL_TEXT_BASE. + +Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> +--- + Makefile | 12 +++++++----- + scripts/Makefile.spl | 8 ++++++++ + 2 files changed, 15 insertions(+), 5 deletions(-) + +diff --git a/Makefile b/Makefile +index 059978bfe6..62d85ff279 100644 +--- a/Makefile ++++ b/Makefile +@@ -1121,11 +1121,6 @@ OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \ + $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \ + $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R .resetvec) + +-OBJCOPYFLAGS_u-boot-spl.hex = $(OBJCOPYFLAGS_u-boot.hex) +- +-spl/u-boot-spl.hex: spl/u-boot-spl FORCE +- $(call if_changed,objcopy) +- + binary_size_check: u-boot-nodtb.bin FORCE + @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \ + map_size=$(shell cat u-boot.map | \ +@@ -1704,6 +1699,13 @@ u-boot.lds: $(LDSCRIPT) prepare FORCE + + spl/u-boot-spl.bin: spl/u-boot-spl + @: ++ ++spl/u-boot-spl-dtb.bin: spl/u-boot-spl ++ @: ++ ++spl/u-boot-spl-dtb.hex: spl/u-boot-spl ++ @: ++ + spl/u-boot-spl: tools prepare \ + $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \ + $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb) +diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl +index 7af6b120b6..3c90e2cd72 100644 +--- a/scripts/Makefile.spl ++++ b/scripts/Makefile.spl +@@ -216,6 +216,8 @@ ifneq ($(CONFIG_TARGET_SOCFPGA_GEN5)$(CONFIG_TARGET_SOCFPGA_ARRIA10),) + ALL-y += $(obj)/$(SPL_BIN).sfp + endif + ++ALL-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += $(obj)/u-boot-spl-dtb.hex ++ + ifdef CONFIG_ARCH_SUNXI + ALL-y += $(obj)/sunxi-spl.bin + +@@ -363,6 +365,11 @@ endif + $(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE + $(call if_changed,mkimage) + ++OBJCOPYFLAGS_u-boot-spl-dtb.hex := -I binary -O ihex --change-address=$(CONFIG_SPL_TEXT_BASE) ++ ++$(obj)/u-boot-spl-dtb.hex: $(obj)/u-boot-spl-dtb.bin FORCE ++ $(call if_changed,objcopy) ++ + quiet_cmd_mksunxiboot = MKSUNXI $@ + cmd_mksunxiboot = $(objtree)/tools/mksunxiboot \ + --default-dt $(CONFIG_DEFAULT_DEVICE_TREE) $< $@ +@@ -463,3 +470,4 @@ ifdef CONFIG_ARCH_K3 + tispl.bin: $(obj)/u-boot-spl-nodtb.bin $(SHRUNK_ARCH_DTB) $(SPL_ITS) FORCE + $(call if_changed,mkfitimage) + endif ++ +-- +2.21.0 + |