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authorToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp>2020-03-30 09:24:26 +0900
committerToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp>2020-03-30 09:24:26 +0900
commit5b80bfd7bffd4c20d80b7c70a7130529e9a755dd (patch)
treeb4bb18dcd1487dbf1ea8127e5671b7bb2eded033 /bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch
parent706ad73eb02caf8532deaf5d38995bd258725cb8 (diff)
agl-basesystem
Diffstat (limited to 'bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch')
-rw-r--r--bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch1422
1 files changed, 1422 insertions, 0 deletions
diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch
new file mode 100644
index 00000000..f9986338
--- /dev/null
+++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch
@@ -0,0 +1,1422 @@
+From 0597ee45b5a7b0491977b7b91745c24a0406783f Mon Sep 17 00:00:00 2001
+From: Valentin Raevsky <valentin@compulab.co.il>
+Date: Tue, 12 Aug 2014 17:46:23 +0300
+Subject: [PATCH 22/59] ARM: i.MX6: dts: refactoring of the cm-fx6 device tree
+ files.
+
+Refactoring device tree files:
+1) Utilite:
++ imx6q.dtsi
++ imx6q-sb-fx6x.dtsi
++ imx6q-sb-fx6m.dtsi
++ imx6q-cm-fx6.dtsi
+= imx6q-sbc-fx6m.dts
+
+2) CM-FX6-EVAL:
++ imx6q.dtsi
++ imx6q-sb-fx6x.dtsi
++ imx6q-sb-fx6.dtsi
++ imx6q-cm-fx6.dtsi
+= imx6q-sbc-fx6.dts
+
+3) CM-FX6 Module:
++ imx6q.dtsi
++ imx6q-cm-fx6.dtsi
+= imx6q-cm-fx6.dts
+
+Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
+---
+ arch/arm/boot/dts/imx6q-cm-fx6.dts | 582 +---------------------------------
+ arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 531 +++++++++++++++++++++++++++++++
+ arch/arm/boot/dts/imx6q-sb-fx6.dtsi | 14 +
+ arch/arm/boot/dts/imx6q-sb-fx6m.dtsi | 32 ++
+ arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 75 +++++
+ arch/arm/boot/dts/imx6q-sbc-fx6.dts | 8 +-
+ arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 38 +--
+ 7 files changed, 677 insertions(+), 603 deletions(-)
+ create mode 100644 arch/arm/boot/dts/imx6q-cm-fx6.dtsi
+ create mode 100644 arch/arm/boot/dts/imx6q-sb-fx6.dtsi
+ create mode 100644 arch/arm/boot/dts/imx6q-sb-fx6m.dtsi
+ create mode 100644 arch/arm/boot/dts/imx6q-sb-fx6x.dtsi
+
+diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
+index fa32c57..a0e423b 100644
+--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
+@@ -1,576 +1,20 @@
+ /*
+-* Copyright 2013 CompuLab Ltd.
+-*
+-* Author: Valentin Raevsky <valentin@compulab.co.il>
+-*
+-* The code contained herein is licensed under the GNU General Public
+-* License. You may obtain a copy of the GNU General Public License
+-* Version 2 or later at the following locations:
+-*
+-* http://www.opensource.org/licenses/gpl-license.html
+-* http://www.gnu.org/copyleft/gpl.html
+-*/
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin@compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
+
+ /dts-v1/;
+-#include "imx6q.dtsi"
++#include "imx6q-cm-fx6.dtsi"
+
+ / {
+ model = "CompuLab CM-FX6";
+ compatible = "compulab,cm-fx6", "fsl,imx6q";
+-
+- memory {
+- reg = <0x10000000 0x80000000>;
+- };
+-
+- leds {
+- compatible = "gpio-leds";
+- heartbeat-led {
+- label = "Heartbeat";
+- gpios = <&gpio2 31 0>;
+- linux,default-trigger = "heartbeat";
+- };
+- };
+-
+- regulators {
+- compatible = "simple-bus";
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+- /* regulator for mmc */
+- reg_3p3v: 3p3v {
+- compatible = "regulator-fixed";
+- regulator-name = "3P3V";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-always-on;
+- };
+-
+- /* regulator for usb otg */
+- reg_usb_otg_vbus: usb_otg_vbus {
+- compatible = "regulator-fixed";
+- regulator-name = "usb_otg_vbus";
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- gpio = <&gpio3 22 0>;
+- enable-active-high;
+- };
+-
+- /* regulator for usb hub1 */
+- reg_usb_h1_vbus: usb_h1_vbus {
+- compatible = "regulator-fixed";
+- regulator-name = "usb_h1_vbus";
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- gpio = <&gpio7 8 0>;
+- enable-active-high;
+- };
+-
+- /* regulator1 for wifi/bt */
+- awnh387_npoweron: regulator-awnh387-npoweron {
+- compatible = "regulator-fixed";
+- regulator-name = "regulator-awnh387-npoweron";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- gpio = <&gpio7 12 0>;
+- enable-active-high;
+- };
+-
+- /* regulator2 for wifi/bt */
+- awnh387_wifi_nreset: regulator-awnh387-wifi-nreset {
+- compatible = "regulator-fixed";
+- regulator-name = "regulator-awnh387-wifi-nreset";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- gpio = <&gpio6 16 0>;
+- startup-delay-us = <10000>;
+- };
+-
+- reg_sata_phy_slp: sata_phy_slp {
+- compatible = "regulator-fixed";
+- regulator-name = "cm_fx6_sata_phy_slp";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- gpio = <&gpio3 23 0>;
+- startup-delay-us = <100>;
+- enable-active-high;
+- };
+-
+- reg_sata_nrstdly: sata_nrstdly {
+- compatible = "regulator-fixed";
+- regulator-name = "cm_fx6_sata_nrstdly";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- gpio = <&gpio6 6 0>;
+- startup-delay-us = <100>;
+- enable-active-high;
+- vin-supply = <&reg_sata_phy_slp>;
+- };
+-
+- reg_sata_pwren: sata_pwren {
+- compatible = "regulator-fixed";
+- regulator-name = "cm_fx6_sata_pwren";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- gpio = <&gpio1 28 0>;
+- startup-delay-us = <100>;
+- enable-active-high;
+- vin-supply = <&reg_sata_nrstdly>;
+- };
+-
+- reg_sata_nstandby1: sata_nstandby1 {
+- compatible = "regulator-fixed";
+- regulator-name = "cm_fx6_sata_nstandby1";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- gpio = <&gpio3 20 0>;
+- startup-delay-us = <100>;
+- enable-active-high;
+- vin-supply = <&reg_sata_pwren>;
+- };
+-
+- reg_sata_nstandby2: sata_nstandby2 {
+- compatible = "regulator-fixed";
+- regulator-name = "cm_fx6_sata_nstandby2";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- gpio = <&gpio5 2 0>;
+- startup-delay-us = <100>;
+- enable-active-high;
+- vin-supply = <&reg_sata_nstandby1>;
+- };
+-
+- reg_sata_ldo_en: sata_ldo_en {
+- compatible = "regulator-fixed";
+- regulator-name = "cm_fx6_sata_ldo_en";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- gpio = <&gpio2 16 0>;
+- startup-delay-us = <100>;
+- enable-active-high;
+- regulator-boot-on;
+- vin-supply = <&reg_sata_nstandby2>;
+- };
+- };
+-
+- aliases {
+- mxcfb0 = &mxcfb1;
+- mxcfb1 = &mxcfb2;
+- };
+-
+- sound {
+- compatible = "fsl,imx6q-cm-fx6-wm8731",
+- "fsl,imx-audio-wm8731";
+- model = "wm8731-audio";
+- ssi-controller = <&ssi2>;
+- src-port = <2>;
+- ext-port = <4>;
+- audio-codec = <&codec>;
+- audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN";
+- };
+-
+- sound-hdmi {
+- compatible = "fsl,imx6q-audio-hdmi",
+- "fsl,imx-audio-hdmi";
+- model = "imx-audio-hdmi";
+- hdmi-controller = <&hdmi_audio>;
+- };
+-
+- sound-spdif {
+- compatible = "fsl,imx-audio-spdif",
+- "fsl,imx-sabreauto-spdif";
+- model = "imx-spdif";
+- spdif-controller = <&spdif>;
+- spdif-out;
+- spdif-in;
+- };
+-
+- mxcfb1: fb@0 {
+- compatible = "fsl,mxc_sdc_fb";
+- disp_dev = "hdmi";
+- interface_pix_fmt = "RGB24";
+- mode_str ="1920x1080M@60";
+- default_bpp = <32>;
+- int_clk = <0>;
+- late_init = <0>;
+- status = "disabled";
+- };
+-
+- mxcfb2: fb@1 {
+- compatible = "fsl,mxc_sdc_fb";
+- disp_dev = "lcd";
+- interface_pix_fmt = "RGB24";
+- mode_str ="1920x1080M@60";
+- default_bpp = <32>;
+- int_clk = <0>;
+- late_init = <0>;
+- status = "disabled";
+- };
+-
+- lcd@0 {
+- compatible = "fsl,lcd";
+- ipu_id = <0>;
+- disp_id = <0>;
+- default_ifmt = "RGB24";
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_ipu1_1>;
+- status = "okay";
+- };
+-
+- v4l2_out {
+- compatible = "fsl,mxc_v4l2_output";
+- status = "okay";
+- };
+-};
+-
+-&iomuxc {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_hog>;
+-
+- hog {
+- pinctrl_hog: hoggrp {
+- fsl,pins = <
+- /* SATA PWR */
+- MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000
+- MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000
+- MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
+- MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000
+- /* SATA CTRL */
+- MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000
+- MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
+- MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000
+- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
+- /* POWER_BUTTON */
+- MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
+- >;
+- };
+- };
+-
+- imx6q-cm-fx6 {
+- /* pins for eth0 */
+- pinctrl_enet: enetgrp {
+- fsl,pins = <
+- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+- >;
+- };
+-
+- /* pins for spi */
+- pinctrl_ecspi1: ecspi1grp {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
+- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
+- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
+- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
+- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
+- >;
+- };
+-
+- /* pins for nand */
+- pinctrl_gpmi_nand: gpminandgrp {
+- fsl,pins = <
+- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
+- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
+- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
+- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
+- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
+- MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
+- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
+- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
+- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
+- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
+- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
+- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
+- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
+- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
+- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
+- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
+- MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
+- >;
+- };
+-
+- /* pins for i2c1 */
+- pinctrl_i2c1: i2c1grp {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+- MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+- >;
+- };
+-
+- /* pins for i2c2 */
+- pinctrl_i2c2: i2c2grp {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+- >;
+- };
+-
+- /* pins for i2c3 */
+- pinctrl_i2c3: i2c3grp {
+- fsl,pins = <
+- MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+- MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+- >;
+- };
+-
+- /* pins for console */
+- pinctrl_uart4: uart4grp {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+- >;
+- };
+-
+- /* pins for usb hub1 */
+- pinctrl_usbh1: usbh1grp {
+- fsl,pins = <
+- MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
+- >;
+- };
+-
+- /* pins for usb otg */
+- pinctrl_usbotg: usbotggrp {
+- fsl,pins = <
+- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
+- >;
+- };
+-
+- /* pins for wifi/bt */
+- pinctrl_usdhc1: usdhc1grp {
+- fsl,pins = <
+- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+- >;
+- };
+-
+- /* pins for mmc */
+- pinctrl_usdhc3: usdhc3grp {
+- fsl,pins = <
+- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
+- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
+- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+- >;
+- };
+-
+- /* pins for spdif */
+- pinctrl_spdif: spdifgrp {
+- fsl,pins = <
+- MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
+- MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
+- >;
+- };
+-
+- /* pins for audmux */
+- pinctrl_audmux: audmuxgrp {
+- fsl,pins = <
+- MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059
+- MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059
+- MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059
+- MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059
+- MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
+- /* master mode pin */
+- MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059
+- >;
+- };
+- };
+-};
+-
+-/* spi */
+-&ecspi1 {
+- fsl,spi-num-chipselects = <2>;
+- cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_ecspi1>;
+- status = "okay";
+-
+- flash: m25p80@0 {
+- #address-cells = <1>;
+- #size-cells = <1>;
+- compatible = "st,m25px16", "st,m25p";
+- spi-max-frequency = <20000000>;
+- reg = <0>;
+-
+- partition@0 {
+- label = "uboot";
+- reg = <0x0 0xc0000>;
+- };
+-
+- partition@c0000 {
+- label = "uboot environment";
+- reg = <0xc0000 0x40000>;
+- };
+-
+- partition@100000 {
+- label = "reserved";
+- reg = <0x100000 0x100000>;
+- };
+- };
+-};
+-
+-/* eth0 */
+-&fec {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_enet>;
+- phy-mode = "rgmii";
+- status = "okay";
+-};
+-
+-/* nand */
+-&gpmi {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_gpmi_nand>;
+- status = "okay";
+-};
+-
+-/* i2c1 */
+-&i2c1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_i2c1>;
+- status = "okay";
+-
+- eeprom@50 {
+- compatible = "at24,24c02";
+- reg = <0x50>;
+- pagesize = <16>;
+- };
+-};
+-
+-/* i2c2 */
+-&i2c2 { /* to be removed */
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_i2c2>;
+- /* status = "okay"; */
+-};
+-
+-/* i2c3 */
+-&i2c3 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_i2c3>;
+- status = "okay";
+-
+- eeprom@50 {
+- compatible = "at24,24c02";
+- reg = <0x50>;
+- pagesize = <16>;
+- };
+-
+- codec: wm8731@1a {
+- compatible = "wlf,wm8731";
+- reg = <0x1a>;
+- clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>;
+- clock-names = "pll4", "imx-ssi.1", "cko", "cko2";
+- AVDD-supply = <&pu_dummy>;
+- HPVDD-supply = <&pu_dummy>;
+- DCVDD-supply = <&pu_dummy>;
+- DBVDD-supply = <&pu_dummy>;
+- };
+-};
+-
+-/* sata */
+-&sata {
+- status = "okay";
+-};
+-
+-/* console */
+-&uart4 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart4>;
+- status = "okay";
+-};
+-
+-/* usb otg */
+-&usbotg {
+- vbus-supply = <&reg_usb_otg_vbus>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usbotg>;
+- dr_mode = "otg";
+- status = "okay";
+-};
+-
+-/* usb hub1 */
+-&usbh1 {
+- vbus-supply = <&reg_usb_h1_vbus>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usbh1>;
+- status = "okay";
+-};
+-
+-/* wifi/bt */
+-&usdhc1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usdhc1>;
+- non-removable;
+- vmmc-supply = <&awnh387_npoweron>;
+- vmmc_aux-supply = <&awnh387_wifi_nreset>;
+- status = "okay";
+-};
+-
+-/* mmc */
+-&usdhc3 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usdhc3>;
+- vmmc-supply = <&reg_3p3v>;
+- status = "okay";
+-};
+-
+-&ssi2 {
+- fsl,mode = "i2s-master";
+- status = "okay";
+-};
+-
+-&mxcfb1 {
+- status = "okay";
+-};
+-
+-&mxcfb2 {
+- status = "okay";
+-};
+-
+-&hdmi_core {
+- ipu_id = <1>;
+- disp_id = <0>;
+- status = "okay";
+-};
+-
+-&hdmi_video {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_hdmi_hdcp_1>;
+- fsl,hdcp;
+- status = "okay";
+-};
+-
+-&hdmi_audio {
+- status = "okay";
+-};
+-
+-&spdif {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_spdif>;
+- status = "okay";
+-};
+-
+-&audmux {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_audmux>;
+- status = "okay";
+-};
++};
+\ No newline at end of file
+diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi
+new file mode 100644
+index 0000000..0aa4461
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi
+@@ -0,0 +1,531 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin@compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include "imx6q.dtsi"
++
++/ {
++ memory {
++ reg = <0x10000000 0x80000000>;
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ heartbeat-led {
++ label = "Heartbeat";
++ gpios = <&gpio2 31 0>;
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
++ regulators {
++ compatible = "simple-bus";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ /* regulator for usb otg */
++ reg_usb_otg_vbus: usb_otg_vbus {
++ compatible = "regulator-fixed";
++ regulator-name = "usb_otg_vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ gpio = <&gpio3 22 0>;
++ enable-active-high;
++ };
++
++ /* regulator for usb hub1 */
++ reg_usb_h1_vbus: usb_h1_vbus {
++ compatible = "regulator-fixed";
++ regulator-name = "usb_h1_vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ gpio = <&gpio7 8 0>;
++ enable-active-high;
++ };
++
++ /* regulator1 for wifi/bt */
++ awnh387_npoweron: regulator-awnh387-npoweron {
++ compatible = "regulator-fixed";
++ regulator-name = "regulator-awnh387-npoweron";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio7 12 0>;
++ enable-active-high;
++ };
++
++ /* regulator2 for wifi/bt */
++ awnh387_wifi_nreset: regulator-awnh387-wifi-nreset {
++ compatible = "regulator-fixed";
++ regulator-name = "regulator-awnh387-wifi-nreset";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio6 16 0>;
++ startup-delay-us = <10000>;
++ };
++
++ reg_sata_phy_slp: sata_phy_slp {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_phy_slp";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio3 23 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ };
++
++ reg_sata_nrstdly: sata_nrstdly {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_nrstdly";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio6 6 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ vin-supply = <&reg_sata_phy_slp>;
++ };
++
++ reg_sata_pwren: sata_pwren {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_pwren";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio1 28 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ vin-supply = <&reg_sata_nrstdly>;
++ };
++
++ reg_sata_nstandby1: sata_nstandby1 {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_nstandby1";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio3 20 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ vin-supply = <&reg_sata_pwren>;
++ };
++
++ reg_sata_nstandby2: sata_nstandby2 {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_nstandby2";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio5 2 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ vin-supply = <&reg_sata_nstandby1>;
++ };
++
++ reg_sata_ldo_en: sata_ldo_en {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_ldo_en";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio2 16 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ regulator-boot-on;
++ vin-supply = <&reg_sata_nstandby2>;
++ };
++ };
++
++ aliases {
++ mxcfb0 = &mxcfb1;
++ mxcfb1 = &mxcfb2;
++ };
++
++ sound {
++ compatible = "fsl,imx6q-cm-fx6-wm8731",
++ "fsl,imx-audio-wm8731";
++ model = "wm8731-audio";
++ ssi-controller = <&ssi2>;
++ src-port = <2>;
++ ext-port = <4>;
++ audio-codec = <&codec>;
++ audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN";
++ };
++
++ sound-hdmi {
++ compatible = "fsl,imx6q-audio-hdmi",
++ "fsl,imx-audio-hdmi";
++ model = "imx-audio-hdmi";
++ hdmi-controller = <&hdmi_audio>;
++ };
++
++ sound-spdif {
++ compatible = "fsl,imx-audio-spdif",
++ "fsl,imx-sabreauto-spdif";
++ model = "imx-spdif";
++ spdif-controller = <&spdif>;
++ spdif-out;
++ spdif-in;
++ };
++
++ mxcfb1: fb@0 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "hdmi";
++ interface_pix_fmt = "RGB24";
++ mode_str ="1920x1080M@60";
++ default_bpp = <32>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "disabled";
++ };
++
++ mxcfb2: fb@1 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "lcd";
++ interface_pix_fmt = "RGB24";
++ mode_str ="1920x1080M@60";
++ default_bpp = <32>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "disabled";
++ };
++
++ lcd@0 {
++ compatible = "fsl,lcd";
++ ipu_id = <0>;
++ disp_id = <0>;
++ default_ifmt = "RGB24";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ipu1_1>;
++ status = "okay";
++ };
++
++ v4l2_out {
++ compatible = "fsl,mxc_v4l2_output";
++ status = "okay";
++ };
++};
++
++&iomuxc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hog>;
++
++ hog {
++ pinctrl_hog: hoggrp {
++ fsl,pins = <
++ /* SATA PWR */
++ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000
++ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000
++ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
++ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000
++ /* SATA CTRL */
++ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000
++ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
++ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000
++ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
++ /* POWER_BUTTON */
++ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
++ >;
++ };
++ };
++
++ imx6q-cm-fx6 {
++ /* pins for eth0 */
++ pinctrl_enet: enetgrp {
++ fsl,pins = <
++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
++ >;
++ };
++
++ /* pins for spi */
++ pinctrl_ecspi1: ecspi1grp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
++ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
++ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
++ >;
++ };
++
++ /* pins for nand */
++ pinctrl_gpmi_nand: gpminandgrp {
++ fsl,pins = <
++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
++ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
++ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
++ >;
++ };
++
++ /* pins for i2c2 */
++ pinctrl_i2c2: i2c2grp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
++ >;
++ };
++
++ /* pins for i2c3 */
++ pinctrl_i2c3: i2c3grp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
++ >;
++ };
++
++ /* pins for console */
++ pinctrl_uart4: uart4grp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
++ >;
++ };
++
++ /* pins for usb hub1 */
++ pinctrl_usbh1: usbh1grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
++ >;
++ };
++
++ /* pins for usb otg */
++ pinctrl_usbotg: usbotggrp {
++ fsl,pins = <
++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
++ >;
++ };
++
++ /* pins for wifi/bt */
++ pinctrl_usdhc1: usdhc1grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
++ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
++ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
++ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
++ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
++ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
++ >;
++ };
++
++ /* pins for pcie */
++ pinctrl_pcie: pciegrp {
++ fsl,pins = <
++ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000
++ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
++ >;
++ };
++
++ /* pins for spdif */
++ pinctrl_spdif: spdifgrp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
++ MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
++ >;
++ };
++
++ /* pins for audmux */
++ pinctrl_audmux: audmuxgrp {
++ fsl,pins = <
++ MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059
++ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059
++ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059
++ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059
++ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
++ /* master mode pin */
++ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059
++ >;
++ };
++ };
++};
++
++/* spi */
++&ecspi1 {
++ fsl,spi-num-chipselects = <2>;
++ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ecspi1>;
++ status = "okay";
++
++ flash: m25p80@0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "st,m25px16", "st,m25p";
++ spi-max-frequency = <20000000>;
++ reg = <0>;
++
++ partition@0 {
++ label = "uboot";
++ reg = <0x0 0xc0000>;
++ };
++
++ partition@c0000 {
++ label = "uboot environment";
++ reg = <0xc0000 0x40000>;
++ };
++
++ partition@100000 {
++ label = "reserved";
++ reg = <0x100000 0x100000>;
++ };
++ };
++};
++
++/* eth0 */
++&fec {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_enet>;
++ phy-mode = "rgmii";
++ status = "okay";
++};
++
++/* nand */
++&gpmi {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_gpmi_nand>;
++ status = "okay";
++};
++
++/* i2c3 */
++&i2c3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c3>;
++ status = "okay";
++
++ eeprom@50 {
++ compatible = "at24,24c02";
++ reg = <0x50>;
++ pagesize = <16>;
++ };
++
++ codec: wm8731@1a {
++ compatible = "wlf,wm8731";
++ reg = <0x1a>;
++ clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>;
++ clock-names = "pll4", "imx-ssi.1", "cko", "cko2";
++ AVDD-supply = <&pu_dummy>;
++ HPVDD-supply = <&pu_dummy>;
++ DCVDD-supply = <&pu_dummy>;
++ DBVDD-supply = <&pu_dummy>;
++ };
++};
++
++&pcie {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pcie>;
++ reset-gpio = <&gpio1 26 0>;
++ power-on-gpio = <&gpio2 24 0>;
++ status = "okay";
++};
++
++/* sata */
++&sata {
++ status = "okay";
++};
++
++/* console */
++&uart4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart4>;
++ status = "okay";
++};
++
++/* usb otg */
++&usbotg {
++ vbus-supply = <&reg_usb_otg_vbus>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usbotg>;
++ dr_mode = "otg";
++ status = "okay";
++};
++
++/* usb hub1 */
++&usbh1 {
++ vbus-supply = <&reg_usb_h1_vbus>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usbh1>;
++ status = "okay";
++};
++
++/* wifi/bt */
++&usdhc1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc1>;
++ non-removable;
++ vmmc-supply = <&awnh387_npoweron>;
++ vmmc_aux-supply = <&awnh387_wifi_nreset>;
++ status = "okay";
++};
++
++&ssi2 {
++ fsl,mode = "i2s-master";
++ status = "okay";
++};
++
++&mxcfb1 {
++ status = "okay";
++};
++
++&mxcfb2 {
++ status = "okay";
++};
++
++&hdmi_core {
++ ipu_id = <1>;
++ disp_id = <0>;
++ status = "okay";
++};
++
++&hdmi_video {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hdmi_hdcp_1>;
++ fsl,hdcp;
++ status = "okay";
++};
++
++&hdmi_audio {
++ status = "okay";
++};
++
++&spdif {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_spdif>;
++ status = "okay";
++};
++
++&audmux {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_audmux>;
++ status = "okay";
++};
+\ No newline at end of file
+diff --git a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi
+new file mode 100644
+index 0000000..acfc572
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi
+@@ -0,0 +1,14 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin@compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include "imx6q-sb-fx6x.dtsi"
+\ No newline at end of file
+diff --git a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi
+new file mode 100644
+index 0000000..5a488f8
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi
+@@ -0,0 +1,32 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin@compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include "imx6q-sb-fx6x.dtsi"
++
++/ {
++ eth@pcie {
++ compatible = "intel,i211";
++ local-mac-address = [FF FF FF FF FF FF];
++ status = "okay";
++ };
++
++ gpio-keys {
++ compatible = "gpio-keys";
++ power {
++ label = "Power Button";
++ gpios = <&gpio1 29 1>;
++ linux,code = <116>; /* KEY_POWER */
++ gpio-key,wakeup;
++ };
++ };
++};
+\ No newline at end of file
+diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi
+new file mode 100644
+index 0000000..9f67b3e
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi
+@@ -0,0 +1,75 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin@compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include "imx6q.dtsi"
++
++/ {
++ regulators {
++ compatible = "simple-bus";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ /* regulator for mmc */
++ reg_3p3v: 3p3v {
++ compatible = "regulator-fixed";
++ regulator-name = "3P3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++ };
++
++};
++
++&iomuxc {
++ imx6q-sb-fx6x {
++ /* pins for i2c1 */
++ pinctrl_i2c1: i2c1grp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
++ >;
++ };
++
++ /* pins for mmc */
++ pinctrl_usdhc3: usdhc3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
++ >;
++ };
++ };
++};
++
++/* i2c1 */
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c1>;
++ eeprom@50 {
++ compatible = "at24,24c02";
++ reg = <0x50>;
++ pagesize = <16>;
++ };
++};
++
++/* mmc */
++&usdhc3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc3>;
++ vmmc-supply = <&reg_3p3v>;
++ status = "disabled";
++};
+\ No newline at end of file
+diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts
+index 5d3c7da..33e4f33 100644
+--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts
++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts
+@@ -11,13 +11,15 @@
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+-#include "imx6q-cm-fx6.dts"
++/dts-v1/;
++#include "imx6q-sb-fx6x.dtsi"
++#include "imx6q-cm-fx6.dtsi"
+
+ / {
+ model = "CompuLab CM-FX6 on SBC-FX6";
+ compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q";
+ };
+
+-&pcie {
++&usdhc3 {
+ status = "okay";
+-};
++};
+\ No newline at end of file
+diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts
+index 0e76f02..2282250 100644
+--- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts
++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts
+@@ -11,31 +11,18 @@
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+-#include "imx6q-cm-fx6.dts"
++/dts-v1/;
++#include "imx6q-sb-fx6m.dtsi"
++#include "imx6q-cm-fx6.dtsi"
+
+ / {
+ model = "CompuLab CM-FX6 on SBC-FX6m";
+ compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q";
+
+- eth@pcie {
+- compatible = "intel,i211";
+- local-mac-address = [FF FF FF FF FF FF];
+- status = "okay";
+- };
+-
+- gpio-keys {
+- compatible = "gpio-keys";
+- power {
+- label = "Power Button";
+- gpios = <&gpio1 29 1>;
+- linux,code = <116>; /* KEY_POWER */
+- gpio-key,wakeup;
+- };
+- };
+ };
+
+ &iomuxc {
+- imx6q-sb-fx6m {
++ imx6q-sbc-fx6m {
+ /* pins for uart2 */
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+@@ -45,17 +32,10 @@
+ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
+ >;
+ };
+-
+- /* pins for pcie */
+- pinctrl_pcie: pciegrp {
+- fsl,pins = <
+- MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000
+- MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
+- >;
+- };
+ };
+ };
+
++
+ &i2c1 {
+ rtc@56 {
+ compatible = "emmicro,em3027";
+@@ -63,11 +43,7 @@
+ };
+ };
+
+-&pcie {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_pcie>;
+- reset-gpio = <&gpio1 26 0>;
+- power-on-gpio = <&gpio2 24 0>;
++&usdhc3 {
+ status = "okay";
+ };
+
+@@ -80,4 +56,4 @@
+ dma-names = "rx", "tx";
+ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
+ status = "okay";
+-};
++};
+\ No newline at end of file
+--
+1.7.9.5
+