diff options
| author |   ToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp> | 2020-03-30 09:24:26 +0900 |
|---|---|---|
| committer | ToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp> | 2020-03-30 09:24:26 +0900 |
| commit | 5b80bfd7bffd4c20d80b7c70a7130529e9a755dd (patch) | |
| tree | b4bb18dcd1487dbf1ea8127e5671b7bb2eded033 /bsp/meta-freescale-3rdparty/recipes-kernel | |
| parent | 706ad73eb02caf8532deaf5d38995bd258725cb8 (diff) | |
agl-basesystem
Diffstat (limited to 'bsp/meta-freescale-3rdparty/recipes-kernel')
99 files changed, 17728 insertions, 0 deletions
diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-module-mcc-toradex/kernel-module-mcc-toradex_1.06+toradex2.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-module-mcc-toradex/kernel-module-mcc-toradex_1.06+toradex2.bb new file mode 100644 index 00000000..60221681 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-module-mcc-toradex/kernel-module-mcc-toradex_1.06+toradex2.bb @@ -0,0 +1,20 @@ +# Copyright (C) 2015 Toradex AG +# Copyright (C) 2013 Timesys Corporation +SUMMARY = "Multicore communication kernel module for linux-toradex kernel" +LICENSE = "GPL-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=c8959abcbbe4d6676c58eab9354019e6" + +PROVIDES = "virtual/kernel-module-mcc" +RPROVIDES_${PN} = "virtual/kernel-module-mcc" +RPROVIDES_${PN}-dev = "virtual/kernel-module-mcc-dev" + +inherit module + +SRC_URI = "git://github.com/toradex/mcc-kmod.git;protocol=git;branch=${SRCBRANCH}" + +SRCBRANCH = "master" +SRCREV = "083388fa5cce79c239988d61543322d91996aa8d" + +S = "${WORKDIR}/git" + +COMPATIBLE_MACHINE = "(vf60)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-mcc_2.1.01.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-mcc_2.1.01.bb new file mode 100644 index 00000000..ccdd9314 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/kernel-modules/kernel-module-mcc_2.1.01.bb @@ -0,0 +1,20 @@ +# Copyright (C) 2013 Timesys Corporation +SUMMARY = "Multicore communication kernel module" +LICENSE = "GPL-2.0 | BSD" +LIC_FILES_CHKSUM = "file://LICENSE;md5=c8959abcbbe4d6676c58eab9354019e6 \ + file://BSD_LICENSE;md5=10695b8f86532e5e44640acf4d92a2ef" + +PROVIDES = "virtual/kernel-module-mcc" +RPROVIDES_${PN} = "virtual/kernel-module-mcc" +RPROVIDES_${PN}-dev = "virtual/kernel-module-mcc-dev" + +inherit module + +SRC_URI = "http://repository.timesys.com/buildsources/m/mcc-kmod/mcc-kmod-${PV}/mcc-kmod-${PV}.tar.bz2" + +SRC_URI[md5sum] = "849dfdc34e08c7c82a5e8b452a95f1b3" +SRC_URI[sha256sum] = "ece0c9ccbfb5d2771b115f750361184bb80b2ae5fe82d97d38be2bfee3eeb87e" + +S = "${WORKDIR}/mcc-kmod-${PV}" + +COMPATIBLE_MACHINE = "(vf60)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux-firmware/linux-firmware_git.bbappend b/bsp/meta-freescale-3rdparty/recipes-kernel/linux-firmware/linux-firmware_git.bbappend new file mode 100644 index 00000000..50deb2e0 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux-firmware/linux-firmware_git.bbappend @@ -0,0 +1,15 @@ +# Support additional firmware for WiLink8 modules +# TIInit_11.8.32.bts is required for bluetooth support but this particular +# version is not available in the linux-firmware repository. +# +SRC_URI_append_imx6qdl-variscite-som = "\ + https://git.ti.com/ti-bt/service-packs/blobs/raw/5f73abe7c03631bb2596af27e41a94abcc70b009/initscripts/TIInit_11.8.32.bts;name=TIInit_11.8.32 \ +" +SRC_URI[TIInit_11.8.32.md5sum] = "a76788680905c30979038f9e6aa407f3" +SRC_URI[TIInit_11.8.32.sha256sum] = "26ab0608e39fab95a6a55070c2f8364c92aad34442e8349abda71cee4da3277a" + +do_install_append_imx6qdl-variscite-som() { + cp ${WORKDIR}/TIInit_11.8.32.bts ${D}/lib/firmware/ti-connectivity/ +} + +PACKAGE_ARCH_imx6qdl-variscite-som = "${MACHINE_ARCH}" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/0001-Add-support-for-the-Advantech-DMS-BA16-Board.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/0001-Add-support-for-the-Advantech-DMS-BA16-Board.patch new file mode 100644 index 00000000..fe995d8d --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/0001-Add-support-for-the-Advantech-DMS-BA16-Board.patch @@ -0,0 +1,835 @@ +From 65b84fc181347ae04b1e38dbaa1672751050a5f5 Mon Sep 17 00:00:00 2001 +From: Ken Lin <yungching0725@gmail.com> +Date: Thu, 7 Jun 2018 07:20:32 +0800 +Subject: [PATCH] Add support for the Advantech DMS-BA16 Board + +Signed-off-by: Ken Lin <yungching0725@gmail.com> +--- + arch/arm/boot/dts/imx6q-dms-ba16.dts | 815 +++++++++++++++++++++++++++++++++++ + 1 file changed, 815 insertions(+) + create mode 100755 arch/arm/boot/dts/imx6q-dms-ba16.dts + +diff --git a/arch/arm/boot/dts/imx6q-dms-ba16.dts b/arch/arm/boot/dts/imx6q-dms-ba16.dts +new file mode 100755 +index 000000000000..fb5c9ae6579f +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-dms-ba16.dts +@@ -0,0 +1,815 @@ ++/* ++ * Copyright 2018 Advantech Corporation ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++/dts-v1/; ++ ++#include <dt-bindings/gpio/gpio.h> ++#include "imx6q.dtsi" ++ ++/ { ++ model = "Advantech DMS-BA16"; ++ compatible = "fsl,imx6q-dms-ba16", "fsl,imx6q"; ++ ++ aliases { ++ mxcfb0 = &mxcfb1; ++ mxcfb1 = &mxcfb2; ++ mmc0 = &usdhc2; ++ mmc1 = &usdhc3; ++ mmc2 = &usdhc4; ++ }; ++ ++ memory { ++ reg = <0x10000000 0x40000000>; ++ }; ++ ++ clocks { ++ clk24m: clk24m { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <24000000>; ++ }; ++ }; ++ ++ regulators { ++ compatible = "simple-bus"; ++ ++ reg_usb_otg_vbus: usb_otg_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_otg_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ reg_usb_h1_vbus: usb_h1_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_h1_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ reg_1p8v: 1p8v { ++ compatible = "regulator-fixed"; ++ regulator-name = "1P8V"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ }; ++ ++ reg_3p3v: 3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ ++ reg_lvds: regulator-lvds { ++ compatible = "regulator-fixed"; ++ regulator-name = "lvds_ppen"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ }; ++ ++ sound { ++ compatible = "fsl,imx6q-ba16-sgtl5000", ++ "fsl,imx-audio-sgtl5000"; ++ model = "imx6q-ba16-sgtl5000"; ++ ssi-controller = <&ssi1>; ++ audio-codec = <&codec>; ++ audio-routing = ++ "MIC_IN", "Mic Jack", ++ "Mic Jack", "Mic Bias", ++ "Headphone Jack", "HP_OUT"; ++ mux-int-port = <1>; ++ mux-ext-port = <4>; ++ }; ++ ++ sound-hdmi { ++ compatible = "fsl,imx6q-audio-hdmi", ++ "fsl,imx-audio-hdmi"; model = "imx-audio-hdmi"; ++ hdmi-controller = <&hdmi_audio>; ++ }; ++ ++ mxcfb1: fb@0 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "ldb"; ++ interface_pix_fmt = "RGB24"; ++ default_bpp = <32>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "okay"; ++ }; ++ ++ mxcfb2: fb@1 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "hdmi"; ++ interface_pix_fmt = "RGB24"; ++ mode_str ="1920x1080M@60"; ++ default_bpp = <24>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "okay"; ++ }; ++ ++ backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&pwm1 0 5000000>; ++ brightness-levels = < 0 1 2 3 4 5 6 7 8 9 ++ 10 11 12 13 14 15 16 17 18 19 ++ 20 21 22 23 24 25 26 27 28 29 ++ 30 31 32 33 34 35 36 37 38 39 ++ 40 41 42 43 44 45 46 47 48 49 ++ 50 51 52 53 54 55 56 57 58 59 ++ 60 61 62 63 64 65 66 67 68 69 ++ 70 71 72 73 74 75 76 77 78 79 ++ 80 81 82 83 84 85 86 87 88 89 ++ 90 91 92 93 94 95 96 97 98 99 ++ 100 101 102 103 104 105 106 107 108 109 ++ 110 111 112 113 114 115 116 117 118 119 ++ 120 121 122 123 124 125 126 127 128 129 ++ 130 131 132 133 134 135 136 137 138 139 ++ 140 141 142 143 144 145 146 147 148 149 ++ 150 151 152 153 154 155 156 157 158 159 ++ 160 161 162 163 164 165 166 167 168 169 ++ 170 171 172 173 174 175 176 177 178 179 ++ 180 181 182 183 184 185 186 187 188 189 ++ 190 191 192 193 194 195 196 197 198 199 ++ 200 201 202 203 204 205 206 207 208 209 ++ 210 211 212 213 214 215 216 217 218 219 ++ 220 221 222 223 224 225 226 227 228 229 ++ 230 231 232 233 234 235 236 237 238 239 ++ 240 241 242 243 244 245 246 247 248 249 ++ 250 251 252 253 254 255>; ++ default-brightness-level = <255>; ++ power-supply = <®_lvds>; ++ enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ v4l2_out { ++ compatible = "fsl,mxc_v4l2_output"; ++ status = "okay"; ++ }; ++}; ++ ++&audmux { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_audmux>; ++ status = "okay"; ++}; ++ ++&clks { ++ fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>; ++ fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>; ++}; ++ ++&ecspi1 { ++ fsl,spi-num-chipselects = <1>; ++ cs-gpios = <&gpio2 30 0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi1>; ++ status = "okay"; ++ ++ flash: n25q032@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "st,n25q032"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ partition@0 { ++ label = "U-Boot"; ++ reg = <0x0 0xC0000>; ++ }; ++ partition@C0000 { ++ label = "env"; ++ reg = <0xC0000 0x10000>; ++ }; ++ partition@D0000 { ++ label = "spare"; ++ reg = <0xD0000 0x130000>; ++ }; ++ }; ++}; ++ ++&ecspi5 { ++ fsl,spi-num-chipselects = <1>; ++ cs-gpios = <&gpio1 17 0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi5>; ++ status = "okay"; ++ ++ m25_eeprom: m25p80@0 { ++ compatible = "atmel,at25"; ++ spi-max-frequency = <20000000>; ++ size = <0x8000>; ++ pagesize = <64>; ++ reg = <0>; ++ address-width = <16>; ++ }; ++}; ++ ++&fec { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_enet>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ arm-supply = <®_arm>; ++ soc-supply = <®_soc>; ++ pu-supply = <®_pu>; ++}; ++ ++&dcic1 { ++ dcic_id = <0>; ++ dcic_mux = "dcic-hdmi"; ++ status = "okay"; ++}; ++ ++&dcic2 { ++ dcic_id = <1>; ++ dcic_mux = "dcic-lvds1"; ++ status = "okay"; ++}; ++ ++ ++&gpc { ++ fsl,cpu_pupscr_sw2iso = <0xf>; ++ fsl,cpu_pupscr_sw = <0xf>; ++ fsl,cpu_pdnscr_iso2sw = <0x1>; ++ fsl,cpu_pdnscr_iso = <0x1>; ++ fsl,ldo-bypass = <0>; ++ fsl,wdog-reset = <1>; /* watchdog select of reset source */ ++ pu-supply = <®_pu>; ++}; ++ ++&hdmi_audio { ++ status = "okay"; ++}; ++ ++ ++&hdmi_cec { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hdmi_cec>; ++ status = "disabled"; ++}; ++ ++ ++&hdmi_core { ++ ipu_id = <1>; ++ disp_id = <0>; ++ status = "okay"; ++}; ++ ++&hdmi_video { ++ fsl,phy_reg_vlev = <0x01ad>; ++ fsl,phy_reg_cksymtx = <0x800d>; ++ status = "okay"; ++}; ++ ++&i2c1 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ status = "okay"; ++ ++ codec: sgtl5000@0a { ++ compatible = "fsl,sgtl5000"; ++ reg = <0x0a>; ++ clocks = <&clks 201>; ++ VDDA-supply = <®_1p8v>; ++ VDDIO-supply = <®_3p3v>; ++ }; ++}; ++ ++&i2c2 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c2>; ++ status = "okay"; ++ ++ ++ hdmi_edid: edid@50 { ++ compatible = "fsl,imx6-hdmi-i2c"; ++ reg = <0x50>; ++ }; ++ ++}; ++ ++&i2c3 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "okay"; ++ ++ pmic@58 { ++ compatible = "dialog,da9063"; ++ reg = <0x58>; ++ interrupt-parent = <&gpio7>; ++ interrupts = <13 IRQ_TYPE_LEVEL_LOW>; /* active-low GPIO7_13 */ ++ ++ onkey { ++ compatible = "dlg,da9063-onkey"; ++ }; ++ ++ regulators { ++ bcore1 { ++ regulator-min-microvolt = <1420000>; ++ regulator-max-microvolt = <1420000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ bcore2 { ++ regulator-min-microvolt = <1420000>; ++ regulator-max-microvolt = <1420000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ bpro { ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ bmem { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ bio: bio { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ bperi: bperi { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ ldo1 { ++ regulator-min-microvolt = <600000>; ++ regulator-max-microvolt = <1860000>; ++ }; ++ ++ ldo2 { ++ regulator-min-microvolt = <600000>; ++ regulator-max-microvolt = <1860000>; ++ }; ++ ++ ldo3 { ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <3440000>; ++ }; ++ ++ ldo4 { ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <3440000>; ++ }; ++ ++ ldo5 { ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <3600000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ ldo6 { ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <3600000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ ldo7 { ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <3600000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ ldo8 { ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <3600000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ ldo9 { ++ regulator-min-microvolt = <950000>; ++ regulator-max-microvolt = <3600000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ ldo10 { ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <3600000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ ldo11 { ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <3600000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ }; ++ }; ++ ++ rtc@32 { ++ compatible = "epson,rx8010"; ++ reg = <0x32>; ++ interrupt-parent = <&gpio4>; ++ interrupts = <10>; ++ rx8010-irq_1 = <&gpio4 10 0>; ++ }; ++}; ++ ++&iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog>; ++ ++ hog { ++ pinctrl_hog: hoggrp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 /* uSDHC2 CD */ ++ MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000 /* uSDHC4 CD */ ++ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000 /* uSDHC4 SDIO PWR */ ++ MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 /* uSDHC4 SDIO WP */ ++ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 /* uSDHC4 SDIO LED */ ++ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x80000000 /* SPI1 CS */ ++ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* FEC Reset */ ++ MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 /* GPIO0 */ ++ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 /* GPIO1 */ ++ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* GPIO2 */ ++ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 /* GPIO3 */ ++ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x80000000 /* GPIO4 */ ++ MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x80000000 /* GPIO5 */ ++ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 /* GPIO6 */ ++ MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000 /* GPIO7 */ ++ MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 /* CAM_PWDN */ ++ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAM_RST */ ++ MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x80000000 /* HUB_RESET */ ++ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC Interrupt */ ++ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* AR8033 Interrupt */ ++ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* BLEN_OUT */ ++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* LVDS_PPEN_OUT */ ++ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* RTC_INT */ ++ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 /*SUS_S3_OUT*/ ++ ++ >; ++ }; ++ }; ++ ++ usdhc3 { ++ pinctrl_usdhc3_reset: usdhc3grp-reset { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9 ++ >; ++ }; ++ }; ++ ++ audmux { ++ pinctrl_audmux: audmuxgrp { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 ++ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0 ++ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 ++ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 ++ >; ++ }; ++ }; ++ ++ ecspi1 { ++ pinctrl_ecspi1: ecspi1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 ++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 ++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 ++ >; ++ }; ++ }; ++ ++ ecspi5 { ++ pinctrl_ecspi5: ecspi5grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0 ++ MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0 ++ MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0 ++ MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0 ++ >; ++ }; ++ }; ++ ++ hdmi_cec { ++ pinctrl_hdmi_cec: hdmicecgrp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 ++ >; ++ }; ++ }; ++ ++ usbotg { ++ pinctrl_usbotg: usbotggrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 ++ >; ++ }; ++ }; ++ ++ usdhc2 { ++ pinctrl_usdhc2: usdhc2grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 ++ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 ++ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 ++ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 ++ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 ++ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 ++ >; ++ }; ++ }; ++ ++ usdhc3 { ++ pinctrl_usdhc3: usdhc3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 ++ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 ++ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 ++ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 ++ >; ++ }; ++ }; ++ ++ usdhc4 { ++ pinctrl_usdhc4: usdhc4grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 ++ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 ++ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 ++ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 ++ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 ++ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 ++ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 ++ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 ++ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 ++ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 ++ >; ++ }; ++ }; ++ ++ i2c1 { ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 ++ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 ++ >; ++ }; ++ }; ++ ++ i2c2 { ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ }; ++ ++ i2c3 { ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ }; ++ ++ pwm1 { ++ pinctrl_pwm1: pwm1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 ++ >; ++ }; ++ }; ++ ++ pwm2 { ++ pinctrl_pwm2: pwm2grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 ++ >; ++ }; ++ }; ++ ++ enet { ++ pinctrl_enet: enetgrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 ++ >; ++ }; ++ }; ++ ++ uart3 { ++ pinctrl_uart3: uart3grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 ++ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 ++ MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 ++ >; ++ }; ++ }; ++ ++ uart4 { ++ pinctrl_uart4: uart4grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 ++ >; ++ }; ++ }; ++ wdog { ++ pinctrl_wdog: wdoggrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0 /* Watchdog out */ ++ >; ++ }; ++ }; ++}; ++ ++&ldb { ++ split-mode; ++ status = "okay"; ++ ++ lvds-channel@0 { ++ fsl,data-mapping = "spwg"; ++ fsl,data-width = <24>; ++ crtc = "ipu1-di0"; ++ status = "okay"; ++ ++ display-timings { ++ native-mode = <&timing0>; ++ timing0: SHARP-LQ156M1LG21 { ++ clock-frequency = <65000000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hback-porch = <100>; ++ hfront-porch = <40>; ++ vback-porch = <30>; ++ vfront-porch = <3>; ++ hsync-len = <10>; ++ vsync-len = <2>; ++ }; ++ }; ++ }; ++ ++ lvds-channel@1 { ++ status = "disabled"; ++ }; ++}; ++ ++&pcie { ++ reset-gpio = <&gpio7 12 0>; ++ fsl,tx-deemph-gen1 = <0>; ++ fsl,tx-deemph-gen2-3p5db = <0>; ++ fsl,tx-deemph-gen2-6db = <20>; ++ fsl,tx-swing-full = <103>; ++ fsl,tx-swing-low = <103>; ++ status = "okay"; ++}; ++ ++ ++&pwm1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm1>; ++ status = "okay"; ++}; ++ ++&pwm2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm2>; ++ status = "okay"; ++}; ++ ++&ssi1 { ++ status = "okay"; ++}; ++ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart3>; ++ fsl,uart-has-rtscts; ++ status = "okay"; ++}; ++ ++&uart4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart4>; ++ status = "okay"; ++}; ++ ++&usbh1 { ++ vbus-supply = <®_usb_h1_vbus>; ++ reset-gpios = <&gpio7 11 0>; ++ status = "okay"; ++}; ++ ++&usbotg { ++ vbus-supply = <®_usb_otg_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg>; ++ disable-over-current; ++ status = "okay"; ++}; ++ ++&usdhc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc2>; ++ cd-gpios = <&gpio1 4 1>; ++ no-1-8-v; ++ keep-power-in-suspend; ++ enable-sdio-wakeup; ++ status = "okay"; ++}; ++ ++&usdhc3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>; ++ bus-width = <8>; ++ vmmc-supply = <&bperi>; ++ no-1-8-v; ++ non-removable; ++ keep-power-in-suspend; ++ status = "okay"; ++}; ++ ++&usdhc4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc4>; ++ bus-width = <8>; ++ cd-gpios = <&gpio6 11 1>; ++ no-1-8-v; ++ keep-power-in-suspend; ++ enable-sdio-wakeup; ++ status = "okay"; ++}; ++ ++&vpu { ++ pu-supply = <®_pu>; ++}; ++ ++&sata { ++ fsl,no-spread-spectrum; ++ fsl,transmit-atten-16ths = <12>; ++ fsl,transmit-boost-mdB = <3330>; ++ fsl,transmit-level-mV = <1133>; ++ fsl,receive-dpll-mode = <1>; ++ status = "okay"; ++}; ++&wdog1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_wdog>; ++ fsl,wdog_b; ++}; +-- +2.11.0 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/0002-mfd-da9063-Add-wakeup-source-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/0002-mfd-da9063-Add-wakeup-source-support.patch new file mode 100644 index 00000000..d9112735 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/0002-mfd-da9063-Add-wakeup-source-support.patch @@ -0,0 +1,28 @@ +From e330be67b1dd357fdc9676c72315eb0b8a9fd911 Mon Sep 17 00:00:00 2001 +From: Ken Lin <ken.lin@advantech.com.tw> +Date: Tue, 26 Jul 2016 11:36:19 +0800 +Subject: [PATCH 3/4] mfd: da9063: Add wakeup source support + +Configure da9063 IRQ as a iMx6 wakeup source +--- + drivers/mfd/da9063-core.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c +index 6c2870d4e754..72c303be2568 100644 +--- a/drivers/mfd/da9063-core.c ++++ b/drivers/mfd/da9063-core.c +@@ -232,6 +232,10 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq) + if (ret) + dev_err(da9063->dev, "Cannot add MFD cells\n"); + ++ ++ enable_irq_wake(da9063->chip_irq); ++ ++ + return ret; + } + +-- +2.11.0 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/0003-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/0003-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch new file mode 100644 index 00000000..411aa73d --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/0003-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch @@ -0,0 +1,223 @@ +From f4d37d3abc522e72bebc2310d478cb5ebed24a4a Mon Sep 17 00:00:00 2001 +From: Ken Lin <yungching0725@gmail.com> +Date: Thu, 1 Mar 2018 08:16:47 +0800 +Subject: [PATCH 4/4] da9063: Add a PMIC qurk to support system suspend/resume + and shutdown + +Add a platfrom specific qurik to adjust PMIC power rails during suspend/resume and shutdown +--- + arch/arm/mach-imx/Makefile | 2 +- + arch/arm/mach-imx/mach-dms-ba16.c | 188 ++++++++++++++++++++++++++++++++++++++ + 2 files changed, 189 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/mach-imx/mach-dms-ba16.c + +diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile +index 5d43296bdbe4..6bae5db72870 100644 +--- a/arch/arm/mach-imx/Makefile ++++ b/arch/arm/mach-imx/Makefile +@@ -93,7 +93,7 @@ AFLAGS_ddr3_freq_imx6.o :=-Wa,-march=armv7-a + AFLAGS_smp_wfe_imx6.o :=-Wa,-march=armv7-a + AFLAGS_lpddr2_freq_imx6q.o :=-Wa,-march=armv7-a + obj-$(CONFIG_SOC_IMX6Q) += mach-imx6q.o ddr3_freq_imx6.o smp_wfe_imx6.o \ +- lpddr2_freq_imx6q.o ++ lpddr2_freq_imx6q.o mach-dms-ba16.o + AFLAGS_lpddr2_freq_imx6.o :=-Wa,-march=armv7-a + obj-$(CONFIG_SOC_IMX6SL) += mach-imx6sl.o lpddr2_freq_imx6.o + AFLAGS_lpddr2_freq_imx6sll.o :=-Wa,-march=armv7-a +diff --git a/arch/arm/mach-imx/mach-dms-ba16.c b/arch/arm/mach-imx/mach-dms-ba16.c +new file mode 100644 +index 000000000000..ac6e6a0ca7a0 +--- /dev/null ++++ b/arch/arm/mach-imx/mach-dms-ba16.c +@@ -0,0 +1,188 @@ ++/* ++ * Platform suspend/resume/poweroff quirk example ++ * ++ * Copyright (C) 2015 Dialog Semiconductor Ltd ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include <linux/device.h> ++#include <linux/i2c.h> ++#include <linux/init.h> ++#include <linux/io.h> ++#include <linux/notifier.h> ++#include <linux/of.h> ++#include <linux/mfd/da9063/registers.h> ++#include <linux/pm.h> ++#include <linux/suspend.h> ++#include <linux/reboot.h> ++#include <linux/delay.h> ++#include <linux/regulator/machine.h> ++#include <linux/gpio.h> ++#include "hardware.h" ++ ++#define SUS_S3_OUT IMX_GPIO_NR(4, 11) ++static struct i2c_client *da9063_client; ++ ++static int dms_ba16_suspend_pm_cb(struct notifier_block *nb, ++ unsigned long action, void *ptr) ++{ ++ switch (action) { ++ case PM_SUSPEND_PREPARE: ++ case PM_HIBERNATION_PREPARE: ++ /* ++ * E.G. ADJUST PMIC SEQUENCER FOR SUSPEND ++ * E.G. MANIPULATE CONTROL LINE USAGE ++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>); ++ */ ++ ++ gpio_direction_output(SUS_S3_OUT, 0); /*Set SUS_S3 low during suspend*/ ++ ++ break; ++ case PM_POST_SUSPEND: ++ case PM_POST_HIBERNATION: ++ /* ++ * RESTORE PMIC SEQUENCER / CONTROL LINES ++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>); ++ */ ++ i2c_smbus_write_byte_data(da9063_client,0xA4,0x70); // VBCORE1_A(1.42V) ++ i2c_smbus_write_byte_data(da9063_client,0xA3,0x70); // VBCORE2_A(1.42V) ++ i2c_smbus_write_byte_data(da9063_client,0xA5,0x61); // VBPRO_A(1.5V) ++ i2c_smbus_write_byte_data(da9063_client,0xA6,0x32); // VBMEM_A(1.8V) ++ i2c_smbus_write_byte_data(da9063_client,0xA7,0x32); // VBIO_A(1.8V) ++ i2c_smbus_write_byte_data(da9063_client,0xA8,0x7d); // VBPERI_A(3.3V) ++ ++ ++ gpio_direction_output(SUS_S3_OUT, 1); /*Set SUS_S3 high during resume*/ ++ ++ break; ++ default: ++ return NOTIFY_DONE; ++ } ++ return NOTIFY_OK; ++} ++ ++static void dms_ba16_poweroff_quirk(void) ++{ ++ /* ++ * Do nothing - this must be assigned as pm_power_off callback, or ++ * otherwise /kernel/reboot.c : SYSCALL_DEFINE4(reboot, ... reduces ++ * LINUX_REBOOT_CMD_POWER_OFF to LINUX_REBOOT_CMD_HALT ++ * and so the pm_power_off_prepare callback would never be used! ++ * ++ * This callback is now apparently too late in the power off process ++ * for dms_ba16 I2C work, as it caused a stack dump with the message: ++ * WARNING: CPU: 0 PID: 50 at kernel/workqueue.c:1958 ++ * process_one_work+0x3bc/0x424() ++ */ ++} ++static void da9063_poweroff_prepare_quirk(void) ++{ ++ /* E.G. SET PMIC MODE AND POWER OFF */ ++ u8 val = 0; ++ ++ ++ printk(KERN_ALERT "Poweroff DA9063\n"); ++ ++ ++ i2c_smbus_write_byte_data(da9063_client, DA9063_REG_CONTROL_F,DA9063_SHUTDOWN); ++ ++ ++ while (1); ++ ++ return; ++} ++ ++static int dms_ba16_reboot_notify(struct notifier_block *nb, ++ unsigned long action, void *data) ++{ ++ switch (action) { ++ case SYS_POWER_OFF: ++ break; ++ case SYS_HALT: ++ case SYS_RESTART: ++ /* ++ * E.G. RESTORE PMIC SEQUENCER ++ * E.G. MODIFY GPIO TO RESET SLAVE DEVICE ++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>); ++ */ ++ break; ++ default: ++ break; ++ } ++ return 0; ++} ++ ++static struct notifier_block dms_ba16_reboot_nb = { ++ .notifier_call = dms_ba16_reboot_notify ++}; ++ ++static int platform_i2c_bus_notify(struct notifier_block *nb, ++ unsigned long action, void *data) ++{ ++ struct device *dev = data; ++ struct i2c_client *client; ++ ++ if ((action != BUS_NOTIFY_ADD_DEVICE) || ++ (dev->type == &i2c_adapter_type)) ++ return 0; ++ ++ client = to_i2c_client(dev); ++ ++ if ((client->addr == 0x58 && !strcmp(client->name, "da9063"))) { ++ da9063_client = client; ++ ++ /* ++ * E.G. SET IRQ MASKS ++ * i2c_smbus_write_byte_data(dms_ba16_client, <REGISTER>, <VALUE>); ++ */ ++ ++ /* ++ * Register PM notifier for suspend/resume switchovers ++ * of control ++ */ ++ ++ i2c_smbus_write_byte_data(da9063_client,0x0B,0xF7); /*IRQ_MASK_B*/ ++ i2c_smbus_write_byte_data(da9063_client,0x25,0x9); /*BPERI_CONT keep BPERI_B voltage when supsend*/ ++ i2c_smbus_write_byte_data(da9063_client,0x24,0x1); /*BIO_CONT let BIO_B off when supsend*/ ++ ++ ++ gpio_direction_output(SUS_S3_OUT, 1); /*Set SUS_S3 high when power on*/ ++ ++ pm_notifier(dms_ba16_suspend_pm_cb, 0); ++ ++ /* Register reboot notifier */ ++ register_reboot_notifier(&dms_ba16_reboot_nb); ++ ++ /* Establish poweroff callback */ ++ printk(KERN_INFO "Installing DA9063 poweroff control\n"); ++ pm_power_off_prepare = da9063_poweroff_prepare_quirk; ++ pm_power_off = dms_ba16_poweroff_quirk; ++ ++ /* Get rid of this notification */ ++ bus_unregister_notifier(&i2c_bus_type, nb); ++ } ++ ++ return 0; ++} ++ ++static struct notifier_block platform_i2c_bus_nb = { ++ .notifier_call = platform_i2c_bus_notify ++}; ++ ++static int __init platform_quirk(void) ++{ ++ da9063_client = NULL; ++ bus_register_notifier(&i2c_bus_type, &platform_i2c_bus_nb); ++ return 0; ++} ++ ++arch_initcall(platform_quirk); ++ +-- +2.11.0 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/defconfig new file mode 100644 index 00000000..61a0ac08 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech-4.9/defconfig @@ -0,0 +1,460 @@ +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_KALLSYMS_ALL=y +CONFIG_PERF_EVENTS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_MXC=y +CONFIG_SOC_IMX50=y +CONFIG_SOC_IMX53=y +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6SL=y +CONFIG_SOC_IMX6SX=y +CONFIG_SOC_IMX6ULL=y +CONFIG_SOC_IMX7D=y +CONFIG_SOC_IMX6SLL=y +CONFIG_SOC_IMX7ULP=y +CONFIG_SOC_VF610=y +# CONFIG_SWP_EMULATE is not set +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_CMA=y +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_ARM_IMX6Q_CPUFREQ=y +CONFIG_ARM_IMX7D_CPUFREQ=y +CONFIG_ARM_IMX7ULP_CPUFREQ=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_BINFMT_MISC=m +CONFIG_PM_DEBUG=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +CONFIG_VLAN_8021Q=y +CONFIG_LLC2=y +CONFIG_CAN=y +CONFIG_CAN_FLEXCAN=y +CONFIG_CAN_M_CAN=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIBTUSB=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIBCM203X=y +CONFIG_BT_ATH3K=y +CONFIG_CFG80211=y +CONFIG_MAC80211=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=0 +CONFIG_IMX_WEIM=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_SST25L=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_NAND_MXC=y +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_SPI_FSL_QUADSPI=y +CONFIG_MTD_UBI=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_SENSORS_FXOS8700=y +CONFIG_SENSORS_FXAS2100X=y +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_ATA=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_IMX=y +CONFIG_PATA_IMX=y +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_CS89x0=y +CONFIG_CS89x0_PLATFORM=y +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_SMC91X=y +CONFIG_SMC911X=y +CONFIG_SMSC911X=y +# CONFIG_NET_VENDOR_STMICRO is not set +CONFIG_MICREL_PHY=y +CONFIG_USB_KAWETH=y +CONFIG_USB_PEGASUS=y +CONFIG_USB_RTL8150=y +CONFIG_USB_RTL8152=y +CONFIG_USB_USBNET=y +CONFIG_USB_NET_CDC_EEM=m +CONFIG_BCMDHD=y +CONFIG_BCMDHD_SDIO=y +CONFIG_BCMDHD_FW_PATH="/lib/firmware/bcm/ZP_BCM4339/fw_bcmdhd.bin" +CONFIG_BCMDHD_NVRAM_PATH="/lib/firmware/bcm/ZP_BCM4339/bcmdhd.ZP.OOB.cal" +# CONFIG_RTL_CARDS is not set +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=m +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_RPMSG=y +CONFIG_KEYBOARD_PF1550_ONKEY=y +CONFIG_KEYBOARD_IMX=y +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=y +CONFIG_TOUCHSCREEN_EGALAX=y +CONFIG_TOUCHSCREEN_ELAN_TS=y +CONFIG_TOUCHSCREEN_MAX11801=y +CONFIG_TOUCHSCREEN_IMX6UL_TSC=y +CONFIG_TOUCHSCREEN_MC13783=y +CONFIG_TOUCHSCREEN_TSC2007=y +CONFIG_TOUCHSCREEN_STMPE=y +CONFIG_TOUCHSCREEN_FTS=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MMA8450=y +CONFIG_INPUT_DA9063_ONKEY=y +CONFIG_INPUT_MPL3115=y +CONFIG_SENSOR_FXLS8471=y +CONFIG_INPUT_ISL29023=y +CONFIG_SERIO_SERPORT=m +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_FSL_OTP=y +CONFIG_HW_RANDOM_IMX_RNG=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_IMX=y +CONFIG_I2C_IMX_LPI2C=y +CONFIG_SPI=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_IMX=y +CONFIG_SPI_FSL_LPSPI=y +CONFIG_SPI_SPIDEV=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_IMX_RPMSG=y +CONFIG_GPIO_MAX732X=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_74X164=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_POWER_SUPPLY=y +CONFIG_CHARGER_PF1550=y +CONFIG_SABRESD_MAX8903=y +CONFIG_SENSORS_MAX17135=y +CONFIG_SENSORS_MAG3110=y +CONFIG_THERMAL=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_CPU_THERMAL=y +CONFIG_IMX_THERMAL=y +CONFIG_DEVICE_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_IMX7ULP_WDT=y +CONFIG_MFD_DA9052_I2C=y +CONFIG_MFD_DA9063=y +CONFIG_MFD_MC13XXX_SPI=y +CONFIG_MFD_MC13XXX_I2C=y +CONFIG_MFD_PF1550=y +CONFIG_MFD_MAX17135=y +CONFIG_MFD_SI476X_CORE=y +CONFIG_MFD_STMPE=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_DA9052=y +CONFIG_REGULATOR_DA9063=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_MAX17135=y +CONFIG_REGULATOR_MC13783=y +CONFIG_REGULATOR_MC13892=y +CONFIG_REGULATOR_PFUZE100=y +CONFIG_REGULATOR_PF1550=y +CONFIG_REGULATOR_PF1550_RPMSG=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_RC_SUPPORT=y +CONFIG_RC_DEVICES=y +CONFIG_IR_GPIO_CIR=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_CAPTURE=m +CONFIG_MXC_CAMERA_OV5640=m +CONFIG_MXC_CAMERA_OV5642=m +CONFIG_MXC_CAMERA_OV5640_MIPI=m +CONFIG_MXC_TVIN_ADV7180=m +CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +CONFIG_VIDEO_MXC_PXP_V4L2=y +CONFIG_VIDEO_MXC_CSI_CAMERA=m +CONFIG_MXC_VADC=m +CONFIG_MXC_MIPI_CSI=m +CONFIG_MXC_CAMERA_OV5647_MIPI=m +CONFIG_SOC_CAMERA=y +CONFIG_V4L_MEM2MEM_DRIVERS=y +CONFIG_VIDEO_CODA=y +CONFIG_RADIO_SI476X=y +CONFIG_SOC_CAMERA_OV2640=y +CONFIG_DRM=y +CONFIG_DRM_VIVANTE=y +CONFIG_FB_MXS=y +CONFIG_FB_MXC_SYNC_PANEL=y +CONFIG_FB_MXC_OVERLAY=y +CONFIG_FB_MXC_MIPI_DSI=y +CONFIG_FB_MXC_MIPI_DSI_SAMSUNG=y +CONFIG_FB_MXC_MIPI_DSI_NORTHWEST=y +CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y +CONFIG_FB_MXC_TRULY_PANEL_TFT3P5079E=y +CONFIG_FB_MXC_TRULY_PANEL_TFT3P5581E=y +CONFIG_FB_MXC_LDB=y +CONFIG_FB_MXC_HDMI=y +CONFIG_FB_MXS_SII902X=y +CONFIG_FB_MXC_DCIC=m +CONFIG_FB_MXC_ADV7535=y +CONFIG_HANNSTAR_CABC=y +CONFIG_FB_MXC_EINK_PANEL=y +CONFIG_FB_MXC_EINK_V2_PANEL=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_L4F00242T03=y +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_SOC=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_EUKREA_TLV320=y +CONFIG_SND_SOC_IMX_WM8960=y +CONFIG_SND_SOC_IMX_SII902X=y +CONFIG_SND_SOC_IMX_WM8958=y +CONFIG_SND_SOC_IMX_CS42888=y +CONFIG_SND_SOC_IMX_WM8962=y +CONFIG_SND_SOC_IMX_RPMSG=y +CONFIG_SND_SOC_IMX_SGTL5000=y +CONFIG_SND_SOC_IMX_MQS=y +CONFIG_SND_SOC_IMX_SPDIF=y +CONFIG_SND_SOC_IMX_MC13783=y +CONFIG_SND_SOC_IMX_SI476X=y +CONFIG_SND_SOC_IMX_HDMI=y +CONFIG_USB=y +CONFIG_USB_OTG_WHITELIST=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MXC=y +CONFIG_USB_HCD_TEST_MODE=y +CONFIG_USB_ACM=m +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_TEST=m +CONFIG_USB_EHSET_TEST_FIXTURE=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V3_PRE=y +CONFIG_MXC_GPU_VIV=y +CONFIG_MXC_SIM=y +CONFIG_MXC_MIPI_CSI2=y +CONFIG_MXC_HDMI_CEC=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_RX8010=y +CONFIG_RTC_DRV_MC13XXX=y +CONFIG_RTC_DRV_MXC=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_FSL_EDMA=y +CONFIG_IMX_SDMA=y +CONFIG_MXS_DMA=y +CONFIG_MXC_PXP_V2=y +CONFIG_MXC_PXP_V3=y +CONFIG_DMATEST=m +CONFIG_STAGING=y +CONFIG_STAGING_MEDIA=y +CONFIG_ION=y +CONFIG_ION_MXC=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_EXTCON_USB_GPIO=y +CONFIG_IIO=y +CONFIG_IMX7D_ADC=y +CONFIG_VF610_ADC=y +CONFIG_PWM=y +CONFIG_PWM_IMX=y +CONFIG_PWM_TPM=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_UTF8=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +CONFIG_SECURITYFS=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_RMD128=y +CONFIG_CRYPTO_RMD160=y +CONFIG_CRYPTO_RMD256=y +CONFIG_CRYPTO_RMD320=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_TGR192=y +CONFIG_CRYPTO_WP512=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_CAMELLIA=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y +CONFIG_CRYPTO_DEV_MXS_DCP=y +CONFIG_CRC_CCITT=m +CONFIG_CRC_T10DIF=y +CONFIG_CRC7=m +CONFIG_LIBCRC32C=m +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech_4.9.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech_4.9.bb new file mode 100644 index 00000000..352e5b6d --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-advantech_4.9.bb @@ -0,0 +1,18 @@ +# Copyright (C) 2018 Advantech Corporation +# Released under the MIT license (see COPYING.MIT for the terms) + +include recipes-kernel/linux/linux-imx.inc +DEPENDS += "lzop-native bc-native" + +SRCBRANCH = "4.9-1.0.x-imx" +SRCREV = "0e674a64b86e2bb00ab43f56104d3ea85dda0066" +LOCALVERSION = "-${SRCBRANCH}-dms-ba16" + +SRC_URI = "git://github.com/Freescale/linux-fslc.git;branch=${SRCBRANCH} \ + file://0001-Add-support-for-the-Advantech-DMS-BA16-Board.patch \ + file://0002-mfd-da9063-Add-wakeup-source-support.patch \ + file://0003-da9063-Add-a-PMIC-qurk-to-support-system-suspend-res.patch \ + file://defconfig \ + " + +COMPATIBLE_MACHINE = "(imx6q-dms-ba16)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary-4.9.x/arm/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary-4.9.x/arm/defconfig new file mode 100644 index 00000000..8df3b3de --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary-4.9.x/arm/defconfig @@ -0,0 +1,507 @@ +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +# CONFIG_MEMCG_SWAP_ENABLED is not set +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_NAMESPACES=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_PERF_EVENTS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_CC_STACKPROTECTOR_STRONG=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_ARCH_MXC=y +CONFIG_SOC_IMX51=y +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6SL=y +CONFIG_SOC_IMX6SX=y +CONFIG_SOC_IMX7D=y +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCI_IMX6=y +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y +CONFIG_ARM_PSCI=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_CMA=y +CONFIG_SECCOMP=y +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_ARM_IMX6Q_CPUFREQ=y +CONFIG_ARM_IMX7D_CPUFREQ=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_BINFMT_MISC=y +CONFIG_PM_DEBUG=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=m +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_SYN_COOKIES=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +CONFIG_NETFILTER=y +CONFIG_NF_CONNTRACK=m +# CONFIG_NF_CONNTRACK_PROCFS is not set +CONFIG_NF_TABLES=m +CONFIG_NF_TABLES_INET=m +CONFIG_NFT_EXTHDR=m +CONFIG_NFT_META=m +CONFIG_NFT_CT=m +CONFIG_NFT_COUNTER=m +CONFIG_NFT_LOG=m +CONFIG_NFT_LIMIT=m +CONFIG_NFT_MASQ=m +CONFIG_NFT_REDIR=m +CONFIG_NFT_NAT=m +CONFIG_NFT_REJECT=m +CONFIG_NFT_COMPAT=m +CONFIG_NFT_HASH=m +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +CONFIG_IP_VS=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_NFT_CHAIN_NAT_IPV4=m +CONFIG_NFT_MASQ_IPV4=m +CONFIG_NFT_REDIR_IPV4=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_BRIDGE=m +CONFIG_VLAN_8021Q=y +CONFIG_LLC2=y +CONFIG_CAN=y +CONFIG_CAN_FLEXCAN=y +CONFIG_CAN_M_CAN=y +CONFIG_CAN_MCP251X=m +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_LL=y +CONFIG_CFG80211=m +CONFIG_NL80211_TESTMODE=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=m +CONFIG_RFKILL=y +CONFIG_RFKILL_GPIO=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=0 +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_SST25L=y +CONFIG_MTD_SPI_NOR=y +CONFIG_SPI_FSL_QUADSPI=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_FTP628=m +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_ATA=y +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_IMX=y +CONFIG_PATA_IMX=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_NETDEVICES=y +CONFIG_TUN=m +CONFIG_VETH=m +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_R8169=m +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_AT803X_PHY=y +CONFIG_MICREL_PHY=y +CONFIG_PPP=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_USB_USBNET=m +# CONFIG_USB_NET_AX88179_178A is not set +CONFIG_USB_NET_CDC_EEM=m +CONFIG_USB_NET_CDC_MBIM=m +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_NET_QMI_WWAN=m +CONFIG_USB_HSO=m +CONFIG_ATH9K=m +# CONFIG_ATH9K_RFKILL is not set +CONFIG_BRCMFMAC=m +CONFIG_IWLWIFI=m +CONFIG_IWLDVM=m +CONFIG_IWLMVM=m +CONFIG_RTL8192CE=m +CONFIG_WL12XX=m +CONFIG_WLCORE_SDIO=m +# CONFIG_WILINK_PLATFORM_DATA is not set +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=m +CONFIG_KEYBOARD_IMX=m +CONFIG_KEYBOARD_CWC_HOOKSWITCH=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_AR1020_I2C=m +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +CONFIG_TOUCHSCREEN_CR_MULTI=m +CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP5=m +CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP5_DEVICETREE_SUPPORT=y +CONFIG_TOUCHSCREEN_CYPRESS_CYTTSP5_I2C=m +CONFIG_TOUCHSCREEN_EGALAX=m +CONFIG_TOUCHSCREEN_EXC3000=m +CONFIG_TOUCHSCREEN_FT5X06=m +CONFIG_TOUCHSCREEN_GOODIX=m +CONFIG_TOUCHSCREEN_ILI210X=m +CONFIG_TOUCHSCREEN_PIC16F616=m +CONFIG_TOUCHSCREEN_MC13783=m +CONFIG_TOUCHSCREEN_TSC2004=m +CONFIG_TOUCHSCREEN_SILEAD=m +CONFIG_TOUCHSCREEN_AR1010_UART=m +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_GPS_MAX7W=m +CONFIG_SERIAL_SC16IS7XX=m +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_SERIAL_XR20M117X=m +CONFIG_FSL_OTP=y +CONFIG_HW_RANDOM_IMX_RNG=y +CONFIG_MAGSTRIPE=m +CONFIG_SAS=m +CONFIG_DUMMY_I2C_DEVICE=m +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX_GPIO=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_MUX_PINCTRL=m +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_IMX=y +CONFIG_I2C_IMX_HS=m +CONFIG_SPI=y +CONFIG_SPI_IMX=y +CONFIG_SPI_SPIDEV=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_IMX_RPMSG=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_POWER_SUPPLY=y +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_ADS1000=m +CONFIG_SENSORS_MAG3110=y +# CONFIG_MXC_MMA8451 is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_CPU_THERMAL=y +CONFIG_IMX_THERMAL=y +CONFIG_DEVICE_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_MFD_MC13XXX_SPI=m +CONFIG_MFD_MAX77823=y +CONFIG_MFD_ARIZONA_SPI=m +CONFIG_MFD_WM5102=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_ARIZONA=m +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_MC13892=m +CONFIG_REGULATOR_PFUZE100=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_MEDIA_PCI_SUPPORT=y +CONFIG_VIDEO_TW686X=m +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_CAPTURE=m +CONFIG_VIDEO_MXC_CSI_CAMERA=m +CONFIG_MXC_VADC=m +CONFIG_MXC_MIPI_CSI=m +CONFIG_MXC_CAMERA_OV5640=m +CONFIG_MXC_CAMERA_OV5640_V2=m +CONFIG_MXC_CAMERA_OV5642=m +CONFIG_MXC_CAMERA_OV5642_V2=m +CONFIG_MXC_CAMERA_OV5640_MIPI=m +CONFIG_MXC_CAMERA_OV5640_MIPI_V2=m +CONFIG_MXC_VIDEO_GS2971=m +CONFIG_MXC_HDMI_CSI2_TC358743=m +CONFIG_TC358743_AUDIO=y +CONFIG_MXC_TVIN_ADV7180=m +CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +CONFIG_VIDEO_MXC_PXP_V4L2=y +CONFIG_SOC_CAMERA=y +CONFIG_DRM=y +CONFIG_DRM_VIVANTE=y +CONFIG_FB_MXS=y +CONFIG_FB_MXC_SYNC_PANEL=y +CONFIG_FB_MXC_MIPI_DSI=y +CONFIG_FB_MXC_MIPI_RM68200=y +CONFIG_FB_MXC_TVOUT_ADV739X=y +CONFIG_FB_MXC_LDB=y +CONFIG_FB_MXC_HDMI=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_L4F00242T03=y +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_BACKLIGHT_LP8860=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_DVI_TFP410=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_DYNAMIC_MINORS=y +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set +# CONFIG_SND_USB is not set +CONFIG_SND_SOC=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_IMX_WM8960=m +CONFIG_SND_SOC_IMX_SGTL5000=y +CONFIG_SND_SOC_IMX_WM5102=m +CONFIG_SND_SOC_IMX_HDMI=m +CONFIG_HID_MULTITOUCH=m +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=m +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_ACM=y +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_CP210X=y +CONFIG_USB_SERIAL_FTDI_SIO=y +CONFIG_USB_SERIAL_KEYSPAN=y +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_QUALCOMM=y +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_CC_TUSB320=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_GADGET=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_FUNCTIONFS=m +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_G_MULTI=m +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +# CONFIG_MXC_GPU_VIV is not set +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V3_PRE=y +CONFIG_MXC_MIPI_CSI2=y +CONFIG_MXC_HDMI_CEC=y +CONFIG_MXC_SIM=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_LM3643=m +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=m +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_ISL1208=y +CONFIG_RTC_DRV_M41T80=y +CONFIG_RTC_DRV_M41T80_WDT=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_IMX_SDMA=y +CONFIG_MXS_DMA=y +CONFIG_MXC_PXP_V2=y +CONFIG_MXC_PXP_V3=y +# CONFIG_MX3_IPU is not set +CONFIG_STAGING=y +CONFIG_DRM_ANX78XX=m +CONFIG_FB_TFT=m +CONFIG_FB_TFT_ST7789V=m +CONFIG_COMMON_CLK_PWM=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_IIO=y +CONFIG_ISL28022_ADC=m +CONFIG_TI_ADC081C=m +CONFIG_TI_ADS7924=m +CONFIG_TI_LMP900XX=m +CONFIG_ISL76534=m +CONFIG_APDS9300=m +CONFIG_PWM=y +CONFIG_PWM_IMX=y +CONFIG_BATTERY_SAMSUNG=y +CONFIG_FUELGAUGE_MAX77823=m +CONFIG_FUELGAUGE_MAX77823_COULOMB_COUNTING=y +CONFIG_CHARGER_MAX77823=m +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_OVERLAY_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_CONFIGFS_FS=y +CONFIG_ECRYPT_FS=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_EMBEDDED=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=y +CONFIG_NLS_UTF8=y +CONFIG_DEBUG_INFO=y +CONFIG_FRAME_WARN=2048 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +CONFIG_STRICT_DEVMEM=y +# CONFIG_ARM_UNWIND is not set +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_SECURITY=y +CONFIG_LSM_MMAP_MIN_ADDR=0 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SMACK=y +CONFIG_SECURITY_APPARMOR=y +CONFIG_SECURITY_YAMA=y +CONFIG_DEFAULT_SECURITY_APPARMOR=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_RMD128=y +CONFIG_CRYPTO_RMD160=y +CONFIG_CRYPTO_RMD256=y +CONFIG_CRYPTO_RMD320=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_TGR192=y +CONFIG_CRYPTO_WP512=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_CAMELLIA=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary-4.9.x/arm64/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary-4.9.x/arm64/defconfig new file mode 100644 index 00000000..4e74c69c --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary-4.9.x/arm64/defconfig @@ -0,0 +1,583 @@ +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_USER_NS=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_COMPAT_BRK is not set +CONFIG_PROFILING=y +CONFIG_JUMP_LABEL=y +CONFIG_CC_STACKPROTECTOR_STRONG=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_IOSCHED_DEADLINE is not set +CONFIG_ARCH_FSL_IMX8QM=y +CONFIG_ARCH_FSL_IMX8QXP=y +CONFIG_ARCH_FSL_IMX8MQ=y +CONFIG_PCI=y +CONFIG_PCI_IOV=y +CONFIG_PCI_IMX6=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_PCI_HISI=y +CONFIG_ARM64_VA_BITS_48=y +CONFIG_SCHED_MC=y +CONFIG_PREEMPT=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_CMA=y +CONFIG_SECCOMP=y +CONFIG_KEXEC=y +CONFIG_XEN=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_COMPAT=y +CONFIG_PM_DEBUG=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_ARM_CPUIDLE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPUFREQ_DT=y +CONFIG_ARM_BIG_LITTLE_CPUFREQ=y +CONFIG_ARM_IMX8_CPUFREQ=y +CONFIG_ARM_IMX8MQ_CPUFREQ=y +CONFIG_ARM_SCPI_CPUFREQ=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=m +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_SYN_COOKIES=y +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +CONFIG_IPV6_SIT=m +CONFIG_NETFILTER=y +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +CONFIG_IP_VS=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_MANGLE=m +CONFIG_NF_CONNTRACK_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +CONFIG_LLC2=y +CONFIG_NET_SWITCHDEV=y +CONFIG_BPF_JIT=y +CONFIG_CAN=y +CONFIG_CAN_FLEXCAN=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_LEDS=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIUART_BCM=y +CONFIG_BT_HCIUART_QCA=y +CONFIG_BT_HCIVHCI=y +CONFIG_CFG80211=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_MAC80211_LEDS=y +CONFIG_RFKILL=y +CONFIG_RFKILL_GPIO=y +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=320 +CONFIG_VEXPRESS_CONFIG=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_RAM=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_SLRAM=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_SPI_FSL_FLEXSPI=y +CONFIG_MTD_UBI=y +CONFIG_OF_OVERLAY=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_NBD=m +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_XEN_BLKDEV_BACKEND=m +CONFIG_VIRTIO_BLK=y +CONFIG_BLK_DEV_NVME=m +CONFIG_SENSORS_FXOS8700=y +CONFIG_SENSORS_FXAS2100X=y +CONFIG_SRAM=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_HISI_SAS=y +CONFIG_ATA=y +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_IMX=y +CONFIG_AHCI_CEVA=y +CONFIG_AHCI_XGENE=y +CONFIG_AHCI_QORIQ=y +CONFIG_SATA_SIL24=y +CONFIG_PATA_PLATFORM=y +CONFIG_PATA_OF_PLATFORM=y +CONFIG_NETDEVICES=y +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +CONFIG_TUN=y +CONFIG_VETH=m +CONFIG_VIRTIO_NET=y +CONFIG_AMD_XGBE=y +CONFIG_MACB=y +CONFIG_HNS_DSAF=y +CONFIG_HNS_ENET=y +CONFIG_E1000E=y +CONFIG_IGB=y +CONFIG_IGBVF=y +CONFIG_SKY2=y +CONFIG_SMC91X=y +CONFIG_SMSC911X=y +CONFIG_STMMAC_ETH=m +CONFIG_MDIO_BITBANG=y +CONFIG_AT803X_PHY=y +CONFIG_MICREL_PHY=y +CONFIG_REALTEK_PHY=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +CONFIG_ATH10K=y +CONFIG_ATH10K_PCI=y +CONFIG_ATH10K_AHB=y +CONFIG_ATH10K_DEBUGFS=y +CONFIG_BCMDHD_1363=y +CONFIG_BCMDHD_PCIE=y +CONFIG_RTL_CARDS=m +# CONFIG_WLAN_VENDOR_TI is not set +CONFIG_INPUT_POLLDEV=y +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_IMX_SC_PWRKEY=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_FT5X06=m +CONFIG_TOUCHSCREEN_GOODIX=m +CONFIG_TOUCHSCREEN_SITRONIX_I2C_TOUCH=m +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_MPL3115=y +CONFIG_INPUT_ISL29023=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_AMBAKMI=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_FSL_OTP=y +CONFIG_VIRTIO_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_DESIGNWARE_PLATFORM=y +CONFIG_I2C_IMX=y +CONFIG_I2C_IMX_LPI2C=y +CONFIG_I2C_CROS_EC_TUNNEL=y +CONFIG_I2C_SLAVE=y +CONFIG_SPI=y +CONFIG_SPI_IMX=y +CONFIG_SPI_FSL_LPSPI=y +CONFIG_SPI_PL022=y +CONFIG_SPI_SPIDEV=m +CONFIG_SPMI=y +CONFIG_PINCTRL_SINGLE=y +CONFIG_PINCTRL_MAX77620=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_DWAPB=y +CONFIG_GPIO_PL061=y +CONFIG_GPIO_XGENE=y +CONFIG_GPIO_MAX732X=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GPIO_MAX77620=y +CONFIG_POWER_RESET_SNVS=y +CONFIG_POWER_RESET_VEXPRESS=y +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_BATTERY_BQ27XXX=y +CONFIG_SENSORS_ARM_SCPI=y +CONFIG_SENSORS_LM90=m +CONFIG_SENSORS_INA2XX=m +# CONFIG_MXC_MMA8451 is not set +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +CONFIG_THERMAL_EMULATION=y +CONFIG_IMX8M_THERMAL=y +CONFIG_IMX_SC_THERMAL=y +CONFIG_DEVICE_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_IMX8_WDT=y +CONFIG_MFD_CROS_EC=y +CONFIG_MFD_CROS_EC_I2C=y +CONFIG_MFD_MAX77620=y +CONFIG_MFD_SEC_CORE=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_MAX77620=y +CONFIG_REGULATOR_PFUZE100=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_QCOM_SPMI=y +CONFIG_REGULATOR_S2MPS11=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_MXC_CAPTURE=y +CONFIG_VIDEO_MX8_CAPTURE=y +CONFIG_GMSL_MAX9286=y +CONFIG_VIDEO_MXC_CSI_CAMERA=y +CONFIG_MXC_MIPI_CSI=y +CONFIG_MXC_CAMERA_OV5640_MIPI_V2=m +CONFIG_V4L_MEM2MEM_DRIVERS=y +CONFIG_IMX_DPU_CORE=y +CONFIG_IMX_DCSS_CORE=y +CONFIG_DRM=y +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_I2C_CH7006=m +CONFIG_DRM_I2C_SIL164=m +CONFIG_DRM_VIVANTE=m +CONFIG_DRM_PANEL_SIMPLE=y +CONFIG_DRM_PANEL_RAYDIUM_RM67191=y +CONFIG_DRM_I2C_ADV7511=y +CONFIG_DRM_ITE_IT6263=y +CONFIG_DRM_IMX_PARALLEL_DISPLAY=y +CONFIG_DRM_IMX_TVE=y +CONFIG_DRM_IMX_LDB=y +CONFIG_DRM_IMX_HDMI=y +CONFIG_DRM_IMX_NWL_DSI=y +CONFIG_DRM_IMX_HDP=y +CONFIG_IMX_HDP_CEC=y +CONFIG_DRM_MXSFB=y +CONFIG_FB_IMX64=y +CONFIG_FB_IMX64_DEBUG=y +CONFIG_FB_ARMCLCD=y +CONFIG_FB_MXC_DISP_FRAMEWORK=y +CONFIG_BACKLIGHT_GENERIC=m +CONFIG_BACKLIGHT_PWM=y +CONFIG_BACKLIGHT_LP855X=m +CONFIG_SN65DSI83=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_SOC=y +CONFIG_SND_SOC_FSL_ACM=y +CONFIG_SND_SOC_FSL_HIFI4=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_IMX_AK4458=y +CONFIG_SND_SOC_IMX_AK5558=y +CONFIG_SND_SOC_IMX_AK4497=y +CONFIG_SND_SOC_IMX_WM8960=y +CONFIG_SND_SOC_IMX_WM8524=y +CONFIG_SND_SOC_IMX_CS42888=y +CONFIG_SND_SOC_IMX_WM8962=y +CONFIG_SND_SOC_IMX_MQS=y +CONFIG_SND_SOC_IMX_SPDIF=y +CONFIG_SND_SOC_IMX_AMIX=y +CONFIG_SND_SOC_IMX_CDNHDMI=y +CONFIG_SND_SOC_AK4613=y +CONFIG_SND_SIMPLE_CARD=y +CONFIG_HID_MULTITOUCH=y +CONFIG_USB=y +CONFIG_USB_OTG=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_ACM=m +CONFIG_USB_STORAGE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC2=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_ISP1760=y +CONFIG_USB_ISP1760_HOST_ROLE=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_CDNS3_HOST=y +CONFIG_USB_TEST=m +CONFIG_USB_EHSET_TEST_FIXTURE=y +CONFIG_USB_HSIC_USB3503=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_GPIO_VBUS=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_ULPI=y +CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_FSL_UTP=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_UAC1=y +CONFIG_USB_CONFIGFS_F_UAC2=y +CONFIG_USB_CONFIGFS_F_MIDI=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_USB_ZERO=m +CONFIG_USB_AUDIO=m +CONFIG_GADGET_UAC1=y +CONFIG_USB_ETH=m +CONFIG_USB_ETH_EEM=y +CONFIG_USB_G_NCM=m +CONFIG_USB_FUNCTIONFS=m +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ACPI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MMC_SPI=y +# CONFIG_MXC_GPU_VIV is not set +CONFIG_MXC_SIM=y +CONFIG_MXC_EMVSIM=y +CONFIG_MXC_MLB150=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=y +CONFIG_LEDS_SYSCON=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_MAX77686=y +CONFIG_RTC_DRV_M41T80=y +CONFIG_RTC_DRV_M41T80_WDT=y +CONFIG_RTC_DRV_S5M=y +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_EFI=y +CONFIG_RTC_DRV_PL031=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_RTC_DRV_IMX_SC=y +CONFIG_DMADEVICES=y +CONFIG_FSL_EDMA_V3=y +CONFIG_IMX_SDMA=y +CONFIG_MXS_DMA=y +CONFIG_PL330_DMA=y +CONFIG_QCOM_HIDMA_MGMT=y +CONFIG_QCOM_HIDMA=y +CONFIG_SYNC_FILE=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_BALLOON=y +CONFIG_VIRTIO_MMIO=y +CONFIG_XEN_GNTDEV=y +CONFIG_XEN_GRANT_DEV_ALLOC=y +CONFIG_STAGING=y +CONFIG_STAGING_MEDIA=y +CONFIG_MEDIA_CEC=y +CONFIG_ION=y +CONFIG_ION_MXC=y +CONFIG_TYPEC_TCPM=y +CONFIG_TYPEC_TCPCI=y +CONFIG_COMMON_CLK_VERSATILE=y +CONFIG_CLK_SP810=y +CONFIG_COMMON_CLK_SCPI=y +CONFIG_CLK_QORIQ=y +# CONFIG_COMMON_CLK_XGENE is not set +CONFIG_COMMON_CLK_PWM=y +CONFIG_ARM_TIMER_SP804=y +CONFIG_CLKSRC_IMX_SYS_CNT=y +CONFIG_MAILBOX=y +CONFIG_ARM_MHU=y +CONFIG_BCM_PDC_MBOX=y +CONFIG_ARM_SMMU=y +CONFIG_ARCH_MXC_ARM64=y +CONFIG_EXTCON_PTN5150=y +CONFIG_IIO=y +CONFIG_PWM=y +CONFIG_PWM_IMX=y +CONFIG_PHY_SAMSUNG_USB2=y +CONFIG_PHY_XGENE=y +CONFIG_IMX8_DDR_PERF=y +CONFIG_NVMEM=y +CONFIG_NVMEM_IMX_OCOTP=y +CONFIG_NVMEM_IMX_SCU_OCOTP=y +CONFIG_TEE=y +CONFIG_OPTEE=y +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ACPI=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_CUSE=m +CONFIG_OVERLAY_FS=m +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_HUGETLBFS=y +CONFIG_EFIVAR_FS=y +CONFIG_ECRYPT_FS=y +CONFIG_ECRYPT_FS_MESSAGING=y +CONFIG_JFFS2_FS=y +CONFIG_UBIFS_FS=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_XZ=y +CONFIG_NFS_FS=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_ROOT_NFS=y +CONFIG_9P_FS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_KVM=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_LOCKUP_DETECTOR=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_FTRACE is not set +CONFIG_MEMTEST=y +CONFIG_STRICT_DEVMEM=y +CONFIG_SECURITY=y +CONFIG_LSM_MMAP_MIN_ADDR=0 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SMACK=y +CONFIG_SECURITY_APPARMOR=y +CONFIG_DEFAULT_SECURITY_APPARMOR=y +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_AUTHENC=y +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_CHACHA20POLY1305=y +CONFIG_CRYPTO_ECHAINIV=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_RMD128=y +CONFIG_CRYPTO_RMD160=y +CONFIG_CRYPTO_RMD256=y +CONFIG_CRYPTO_RMD320=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_SHA3=y +CONFIG_CRYPTO_TGR192=y +CONFIG_CRYPTO_WP512=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_CAMELLIA=y +CONFIG_CRYPTO_CAST5=y +CONFIG_CRYPTO_CAST6=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_SERPENT=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_CRC32_ARM64=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary_4.9.x.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary_4.9.x.bb new file mode 100644 index 00000000..c659eb10 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-boundary_4.9.x.bb @@ -0,0 +1,20 @@ +# Adapted from linux-imx.inc, copyright (C) 2013, 2014 O.S. Systems Software LTDA +# Released under the MIT license (see COPYING.MIT for the terms) + +require recipes-kernel/linux/linux-imx.inc + +SUMMARY = "Linux kernel for Boundary Devices boards" + +FILESEXTRAPATHS_prepend_mx6 := "${THISDIR}/${PN}-${PV}/arm:" +FILESEXTRAPATHS_prepend_mx7 := "${THISDIR}/${PN}-${PV}/arm:" +FILESEXTRAPATHS_prepend_mx8 := "${THISDIR}/${PN}-${PV}/arm64:" + +SRC_URI = "git://github.com/boundarydevices/linux-imx6.git;branch=${SRCBRANCH} \ + file://defconfig \ +" + +LOCALVERSION = "-2.0.0-ga+yocto" +SRCBRANCH = "boundary-imx_4.9.x_2.0.0_ga" +SRCREV = "a141bcc882fbba6c2d80d467fa54ac07b37b6f04" +DEPENDS += "lzop-native bc-native" +COMPATIBLE_MACHINE = "(nitrogen6x|nitrogen6x-lite|nitrogen6sx|nitrogen7|nitrogen8m)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0001-ARM-i.MX6-dts-Add-initial-support-for-cm-fx6.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0001-ARM-i.MX6-dts-Add-initial-support-for-cm-fx6.patch new file mode 100644 index 00000000..1156b835 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0001-ARM-i.MX6-dts-Add-initial-support-for-cm-fx6.patch @@ -0,0 +1,399 @@ +From af4b4f2854d6223ba2f1235400f8e8dac660a6a2 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 15 May 2014 17:18:11 +0300 +Subject: [PATCH 01/59] ARM: i.MX6: dts: Add initial support for cm-fx6 + +Add initial support for cm-fx6 module. + +This patch configures: +1) serial console +2) hearbeat led +3) FreeScale NIC +4) pcie +5) Intel I210 NIC +6) wif/bt +7) sata + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 368 ++++++++++++++++++++++++++++++++++++ + 1 file changed, 368 insertions(+) + create mode 100644 arch/arm/boot/dts/imx6q-cm-fx6.dts + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +new file mode 100644 +index 0000000..1f06d95 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -0,0 +1,368 @@ ++/* ++* Copyright 2013 CompuLab Ltd. ++* ++* Author: Valentin Raevsky <valentin@compulab.co.il> ++* ++* The code contained herein is licensed under the GNU General Public ++* License. You may obtain a copy of the GNU General Public License ++* Version 2 or later at the following locations: ++* ++* http://www.opensource.org/licenses/gpl-license.html ++* http://www.gnu.org/copyleft/gpl.html ++*/ ++ ++/dts-v1/; ++#include "imx6q.dtsi" ++ ++/ { ++ model = "CompuLab CM-FX6"; ++ compatible = "compulab,cm-fx6", "fsl,imx6q"; ++ ++ memory { ++ reg = <0x10000000 0x80000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ heartbeat-led { ++ label = "Heartbeat"; ++ gpios = <&gpio2 31 0>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* regulator for mmc */ ++ reg_3p3v: 3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ ++ /* regulator for usb otg */ ++ reg_usb_otg_vbus: usb_otg_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_otg_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio3 22 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator for usb hub1 */ ++ reg_usb_h1_vbus: usb_h1_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_h1_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio7 8 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator1 for wifi/bt */ ++ awnh387_npoweron: regulator-awnh387-npoweron { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-awnh387-npoweron"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio7 12 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator2 for wifi/bt */ ++ awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-awnh387-wifi-nreset"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio6 16 0>; ++ startup-delay-us = <10000>; ++ }; ++ }; ++}; ++ ++&iomuxc { ++ imx6q-cm-fx6 { ++ /* pins for eth0 */ ++ pinctrl_enet: enetgrp { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ++ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 ++ >; ++ }; ++ ++ /* pins for spi */ ++ pinctrl_ecspi1: ecspi1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 ++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 ++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 ++ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 ++ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 ++ >; ++ }; ++ ++ /* pins for nand */ ++ pinctrl_gpmi_nand: gpminandgrp { ++ fsl,pins = < ++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 ++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 ++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 ++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 ++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 ++ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 ++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 ++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 ++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 ++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 ++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 ++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 ++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 ++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 ++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 ++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 ++ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 ++ >; ++ }; ++ ++ /* pins for i2c1 */ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for i2c2 */ ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for i2c3 */ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for console */ ++ pinctrl_uart4: uart4grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ /* pins for usb hub1 */ ++ pinctrl_usbh1: usbh1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 ++ >; ++ }; ++ ++ /* pins for usb otg */ ++ pinctrl_usbotg: usbotggrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 ++ >; ++ }; ++ ++ /* pins for wifi/bt */ ++ pinctrl_usdhc1: usdhc1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 ++ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 ++ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 ++ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 ++ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 ++ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 ++ >; ++ }; ++ ++ /* pins for mmc */ ++ pinctrl_usdhc3: usdhc3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ >; ++ }; ++ }; ++}; ++ ++/* spi */ ++&ecspi1 { ++ fsl,spi-num-chipselects = <2>; ++ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi1>; ++ status = "okay"; ++ ++ flash: m25p80@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "st,m25px16", "st,m25p"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ ++ partition@0 { ++ label = "uboot"; ++ reg = <0x0 0xc0000>; ++ }; ++ ++ partition@c0000 { ++ label = "uboot environment"; ++ reg = <0xc0000 0x40000>; ++ }; ++ ++ partition@100000 { ++ label = "reserved"; ++ reg = <0x100000 0x100000>; ++ }; ++ }; ++}; ++ ++/* eth0 */ ++&fec { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_enet>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++/* nand */ ++&gpmi { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpmi_nand>; ++ status = "okay"; ++}; ++ ++/* i2c1 */ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ status = "okay"; ++ ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ rtc@56 { ++ compatible = "emmicro,em3027"; ++ reg = <0x56>; ++ }; ++}; ++ ++/* i2c2 */ ++&i2c2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c2>; ++ status = "okay"; ++}; ++ ++/* i2c3 */ ++&i2c3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "okay"; ++ ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++}; ++ ++/* eth1 */ ++&pcie { ++ reset-gpio = <&gpio1 26 0>; ++ status = "okay"; ++}; ++ ++/* sata */ ++&sata { ++ status = "okay"; ++}; ++ ++/* rear serial console */ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart2_2>; ++ fsl,dte-mode; ++ fsl,uart-has-rtscts; ++ dma-names = "rx", "tx"; ++ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; ++ status = "okay"; ++}; ++ ++/* console */ ++&uart4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart4>; ++ status = "okay"; ++}; ++ ++/* usb otg */ ++&usbotg { ++ vbus-supply = <®_usb_otg_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg>; ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++/* usb hub1 */ ++&usbh1 { ++ vbus-supply = <®_usb_h1_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbh1>; ++ status = "okay"; ++}; ++ ++/* wifi/bt */ ++&usdhc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc1>; ++ non-removable; ++ vmmc-supply = <&awnh387_npoweron>; ++ vmmc_aux-supply = <&awnh387_wifi_nreset>; ++ status = "okay"; ++}; ++ ++/* mmc */ ++&usdhc3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc3>; ++ vmmc-supply = <®_3p3v>; ++ status = "okay"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0002-ARM-i.MX6-cm-fx6-Add-defconfig.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0002-ARM-i.MX6-cm-fx6-Add-defconfig.patch new file mode 100644 index 00000000..44281463 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0002-ARM-i.MX6-cm-fx6-Add-defconfig.patch @@ -0,0 +1,456 @@ +From 591aecd36eb5e5eaf189bfce36db616425c00959 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 15 May 2014 17:25:07 +0300 +Subject: [PATCH 02/59] ARM: i.MX6: cm-fx6: Add defconfig + +Add default configuration file for the cm-fx6 module. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/configs/cm_fx6_defconfig | 434 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 434 insertions(+) + create mode 100644 arch/arm/configs/cm_fx6_defconfig + +diff --git a/arch/arm/configs/cm_fx6_defconfig b/arch/arm/configs/cm_fx6_defconfig +new file mode 100644 +index 0000000..92c3da1 +--- /dev/null ++++ b/arch/arm/configs/cm_fx6_defconfig +@@ -0,0 +1,434 @@ ++CONFIG_KERNEL_LZO=y ++CONFIG_SYSVIPC=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_LOG_BUF_SHIFT=18 ++CONFIG_CGROUPS=y ++CONFIG_RELAY=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_EXPERT=y ++CONFIG_PERF_EVENTS=y ++# CONFIG_SLUB_DEBUG is not set ++# CONFIG_COMPAT_BRK is not set ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODVERSIONS=y ++CONFIG_MODULE_SRCVERSION_ALL=y ++# CONFIG_BLK_DEV_BSG is not set ++CONFIG_GPIO_PCA953X=y ++CONFIG_ARCH_MXC=y ++CONFIG_MXC_DEBUG_BOARD=y ++CONFIG_MACH_IMX51_DT=y ++CONFIG_MACH_EUKREA_CPUIMX51SD=y ++CONFIG_SOC_IMX53=y ++CONFIG_SOC_IMX6Q=y ++CONFIG_SOC_IMX6SL=y ++CONFIG_SOC_VF610=y ++# CONFIG_SWP_EMULATE is not set ++CONFIG_PCI=y ++CONFIG_PCI_IMX6=y ++CONFIG_SMP=y ++CONFIG_VMSPLIT_2G=y ++CONFIG_PREEMPT=y ++CONFIG_AEABI=y ++# CONFIG_OABI_COMPAT is not set ++CONFIG_HIGHMEM=y ++CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y ++CONFIG_CPU_FREQ_GOV_POWERSAVE=y ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y ++CONFIG_ARM_IMX6_CPUFREQ=y ++CONFIG_CPU_IDLE=y ++CONFIG_VFP=y ++CONFIG_NEON=y ++CONFIG_BINFMT_MISC=m ++CONFIG_PM_RUNTIME=y ++CONFIG_PM_DEBUG=y ++CONFIG_PM_TEST_SUSPEND=y ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_INET=y ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++CONFIG_IPV6=y ++CONFIG_NETFILTER=y ++CONFIG_NETFILTER_DEBUG=y ++CONFIG_NF_CONNTRACK=m ++CONFIG_NF_CONNTRACK_FTP=m ++CONFIG_NF_CONNTRACK_TFTP=m ++CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m ++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m ++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m ++CONFIG_NETFILTER_XT_TARGET_DSCP=m ++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m ++CONFIG_NETFILTER_XT_TARGET_LED=m ++CONFIG_NETFILTER_XT_TARGET_MARK=m ++CONFIG_NETFILTER_XT_TARGET_NFLOG=m ++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m ++CONFIG_NETFILTER_XT_TARGET_NOTRACK=m ++CONFIG_NETFILTER_XT_TARGET_TEE=m ++CONFIG_NETFILTER_XT_TARGET_TRACE=m ++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m ++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m ++CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m ++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m ++CONFIG_NETFILTER_XT_MATCH_COMMENT=m ++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m ++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m ++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m ++CONFIG_NETFILTER_XT_MATCH_CPU=m ++CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m ++CONFIG_NETFILTER_XT_MATCH_DSCP=m ++CONFIG_NETFILTER_XT_MATCH_ESP=m ++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_HELPER=m ++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m ++CONFIG_NETFILTER_XT_MATCH_LENGTH=m ++CONFIG_NETFILTER_XT_MATCH_LIMIT=m ++CONFIG_NETFILTER_XT_MATCH_MAC=m ++CONFIG_NETFILTER_XT_MATCH_MARK=m ++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m ++CONFIG_NETFILTER_XT_MATCH_OSF=m ++CONFIG_NETFILTER_XT_MATCH_OWNER=m ++CONFIG_NETFILTER_XT_MATCH_POLICY=m ++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m ++CONFIG_NETFILTER_XT_MATCH_QUOTA=m ++CONFIG_NETFILTER_XT_MATCH_RATEEST=m ++CONFIG_NETFILTER_XT_MATCH_REALM=m ++CONFIG_NETFILTER_XT_MATCH_RECENT=m ++CONFIG_NETFILTER_XT_MATCH_STATE=m ++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m ++CONFIG_NETFILTER_XT_MATCH_STRING=m ++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m ++CONFIG_NETFILTER_XT_MATCH_TIME=m ++CONFIG_NETFILTER_XT_MATCH_U32=m ++CONFIG_NF_CONNTRACK_IPV4=m ++CONFIG_IP_NF_IPTABLES=y ++CONFIG_IP_NF_MATCH_AH=m ++CONFIG_IP_NF_MATCH_ECN=m ++CONFIG_IP_NF_MATCH_RPFILTER=m ++CONFIG_IP_NF_MATCH_TTL=m ++CONFIG_IP_NF_FILTER=y ++CONFIG_IP_NF_TARGET_REJECT=y ++CONFIG_IP_NF_TARGET_ULOG=m ++CONFIG_NF_NAT_IPV4=m ++CONFIG_IP_NF_TARGET_MASQUERADE=m ++CONFIG_IP_NF_TARGET_NETMAP=m ++CONFIG_IP_NF_TARGET_REDIRECT=m ++CONFIG_IP_NF_MANGLE=m ++CONFIG_IP_NF_TARGET_ECN=m ++CONFIG_IP_NF_TARGET_TTL=m ++CONFIG_IP_NF_RAW=m ++CONFIG_IP_NF_ARPTABLES=m ++CONFIG_IP_NF_ARPFILTER=m ++CONFIG_IP_NF_ARP_MANGLE=m ++CONFIG_VLAN_8021Q=m ++CONFIG_VLAN_8021Q_GVRP=y ++CONFIG_CAN=y ++CONFIG_CAN_FLEXCAN=y ++CONFIG_CFG80211=y ++CONFIG_CFG80211_WEXT=y ++CONFIG_MAC80211=y ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++# CONFIG_STANDALONE is not set ++CONFIG_CMA=y ++CONFIG_CMA_SIZE_MBYTES=320 ++CONFIG_IMX_WEIM=y ++CONFIG_CONNECTOR=y ++CONFIG_MTD=y ++CONFIG_MTD_CMDLINE_PARTS=y ++CONFIG_MTD_BLOCK=y ++CONFIG_MTD_CFI=y ++CONFIG_MTD_JEDECPROBE=y ++CONFIG_MTD_CFI_INTELEXT=y ++CONFIG_MTD_CFI_AMDSTD=y ++CONFIG_MTD_CFI_STAA=y ++CONFIG_MTD_PHYSMAP_OF=y ++CONFIG_MTD_DATAFLASH=y ++CONFIG_MTD_M25P80=y ++CONFIG_MTD_SST25L=y ++CONFIG_MTD_NAND=y ++CONFIG_MTD_NAND_GPMI_NAND=y ++CONFIG_MTD_NAND_MXC=y ++CONFIG_MTD_UBI=y ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_SIZE=65536 ++CONFIG_EEPROM_AT24=y ++CONFIG_EEPROM_AT25=y ++# CONFIG_SCSI_PROC_FS is not set ++CONFIG_BLK_DEV_SD=y ++CONFIG_SCSI_MULTI_LUN=y ++CONFIG_SCSI_CONSTANTS=y ++CONFIG_SCSI_LOGGING=y ++CONFIG_SCSI_SCAN_ASYNC=y ++# CONFIG_SCSI_LOWLEVEL is not set ++CONFIG_ATA=y ++CONFIG_SATA_AHCI_PLATFORM=y ++CONFIG_AHCI_IMX=y ++CONFIG_PATA_IMX=y ++CONFIG_NETDEVICES=y ++CONFIG_TUN=m ++# CONFIG_NET_VENDOR_BROADCOM is not set ++CONFIG_CS89x0=y ++CONFIG_CS89x0_PLATFORM=y ++# CONFIG_NET_VENDOR_FARADAY is not set ++CONFIG_IGB=m ++# CONFIG_NET_VENDOR_MARVELL is not set ++# CONFIG_NET_VENDOR_MICREL is not set ++# CONFIG_NET_VENDOR_MICROCHIP is not set ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++CONFIG_SMC91X=y ++CONFIG_SMC911X=y ++CONFIG_SMSC911X=y ++# CONFIG_NET_VENDOR_STMICRO is not set ++CONFIG_ATH_CARDS=y ++CONFIG_ATH6KL=m ++CONFIG_ATH6KL_SDIO=m ++CONFIG_MWIFIEX=m ++CONFIG_MWIFIEX_SDIO=m ++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set ++CONFIG_INPUT_EVDEV=y ++CONFIG_INPUT_EVBUG=m ++CONFIG_KEYBOARD_GPIO=y ++CONFIG_KEYBOARD_IMX=y ++CONFIG_MOUSE_PS2=m ++CONFIG_MOUSE_PS2_ELANTECH=y ++CONFIG_INPUT_TOUCHSCREEN=y ++CONFIG_TOUCHSCREEN_EGALAX=y ++CONFIG_TOUCHSCREEN_ELAN=y ++CONFIG_TOUCHSCREEN_MAX11801=y ++CONFIG_TOUCHSCREEN_MC13783=y ++CONFIG_INPUT_MISC=y ++CONFIG_INPUT_MMA8450=y ++CONFIG_INPUT_ISL29023=y ++CONFIG_SERIO_SERPORT=m ++CONFIG_VT_HW_CONSOLE_BINDING=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_DEVKMEM is not set ++CONFIG_SERIAL_IMX=y ++CONFIG_SERIAL_IMX_CONSOLE=y ++CONFIG_SERIAL_FSL_LPUART=y ++CONFIG_SERIAL_FSL_LPUART_CONSOLE=y ++CONFIG_FSL_OTP=y ++CONFIG_MXS_VIIM=y ++# CONFIG_I2C_COMPAT is not set ++CONFIG_I2C_CHARDEV=y ++# CONFIG_I2C_HELPER_AUTO is not set ++CONFIG_I2C_ALGOPCF=m ++CONFIG_I2C_ALGOPCA=m ++CONFIG_I2C_IMX=y ++CONFIG_SPI=y ++CONFIG_SPI_IMX=y ++CONFIG_GPIO_SYSFS=y ++CONFIG_POWER_SUPPLY=y ++CONFIG_SABRESD_MAX8903=y ++CONFIG_IMX6_USB_CHARGER=y ++CONFIG_SENSORS_MAX17135=y ++CONFIG_SENSORS_MAG3110=y ++CONFIG_THERMAL=y ++CONFIG_CPU_THERMAL=y ++CONFIG_IMX_THERMAL=y ++CONFIG_DEVICE_THERMAL=y ++CONFIG_WATCHDOG=y ++CONFIG_IMX2_WDT=y ++CONFIG_MFD_DA9052_I2C=y ++CONFIG_MFD_MC13XXX_SPI=y ++CONFIG_MFD_MC13XXX_I2C=y ++CONFIG_MFD_MAX17135=y ++CONFIG_MFD_SI476X_CORE=y ++CONFIG_REGULATOR=y ++CONFIG_REGULATOR_FIXED_VOLTAGE=y ++CONFIG_REGULATOR_DA9052=y ++CONFIG_REGULATOR_ANATOP=y ++CONFIG_REGULATOR_MC13783=y ++CONFIG_REGULATOR_MC13892=y ++CONFIG_REGULATOR_MAX17135=y ++CONFIG_REGULATOR_PFUZE100=y ++CONFIG_MEDIA_SUPPORT=y ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++CONFIG_MEDIA_RADIO_SUPPORT=y ++CONFIG_VIDEO_V4L2_INT_DEVICE=y ++CONFIG_MEDIA_USB_SUPPORT=y ++CONFIG_USB_VIDEO_CLASS=m ++CONFIG_V4L_PLATFORM_DRIVERS=y ++CONFIG_VIDEO_MXC_OUTPUT=y ++CONFIG_VIDEO_MXC_CAPTURE=m ++CONFIG_VIDEO_MXC_CSI_CAMERA=m ++CONFIG_MXC_CAMERA_OV5640=m ++CONFIG_MXC_CAMERA_OV5642=m ++CONFIG_MXC_CAMERA_OV5640_MIPI=m ++CONFIG_MXC_TVIN_ADV7180=m ++CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m ++CONFIG_VIDEO_MXC_IPU_OUTPUT=y ++CONFIG_VIDEO_MXC_PXP_V4L2=y ++CONFIG_SOC_CAMERA=y ++CONFIG_VIDEO_MX3=y ++CONFIG_RADIO_SI476X=y ++CONFIG_SOC_CAMERA_OV2640=y ++CONFIG_DRM=y ++CONFIG_DRM_VIVANTE=y ++CONFIG_FB=y ++CONFIG_FB_MXS=y ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=y ++CONFIG_LCD_L4F00242T03=y ++CONFIG_LCD_PLATFORM=y ++CONFIG_BACKLIGHT_CLASS_DEVICE=y ++CONFIG_BACKLIGHT_PWM=y ++CONFIG_FB_MXC_SYNC_PANEL=y ++CONFIG_FB_MXC_LDB=y ++CONFIG_FB_MXC_MIPI_DSI=y ++CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y ++CONFIG_FB_MXC_HDMI=y ++CONFIG_FB_MXC_EINK_PANEL=y ++CONFIG_FB_MXS_SII902X=y ++CONFIG_HANNSTAR_CABC=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y ++CONFIG_FONTS=y ++CONFIG_FONT_8x8=y ++CONFIG_FONT_8x16=y ++CONFIG_LOGO=y ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_USB_AUDIO=m ++CONFIG_SND_SOC=y ++CONFIG_SND_IMX_SOC=y ++CONFIG_SND_SOC_EUKREA_TLV320=y ++CONFIG_SND_SOC_IMX_CS42888=y ++CONFIG_SND_SOC_IMX_WM8962=y ++CONFIG_SND_SOC_IMX_SGTL5000=y ++CONFIG_SND_SOC_IMX_SPDIF=y ++CONFIG_SND_SOC_IMX_MC13783=y ++CONFIG_SND_SOC_IMX_HDMI=y ++CONFIG_SND_SOC_IMX_SI476X=y ++CONFIG_USB=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_CHIPIDEA=y ++CONFIG_USB_CHIPIDEA_UDC=y ++CONFIG_USB_CHIPIDEA_HOST=y ++CONFIG_USB_PHY=y ++CONFIG_NOP_USB_XCEIV=y ++CONFIG_USB_MXS_PHY=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_ZERO=m ++CONFIG_USB_ETH=m ++CONFIG_USB_MASS_STORAGE=m ++CONFIG_USB_G_SERIAL=m ++CONFIG_MMC=y ++CONFIG_MMC_UNSAFE_RESUME=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_ESDHC_IMX=y ++CONFIG_MXC_IPU=y ++CONFIG_MXC_GPU_VIV=y ++CONFIG_MXC_ASRC=y ++CONFIG_MXC_MIPI_CSI2=y ++CONFIG_MXC_MLB150=m ++CONFIG_NEW_LEDS=y ++CONFIG_LEDS_CLASS=y ++CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_TRIGGERS=y ++CONFIG_LEDS_TRIGGER_GPIO=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_INTF_DEV_UIE_EMUL=y ++CONFIG_RTC_DRV_MC13XXX=y ++CONFIG_RTC_DRV_MXC=y ++CONFIG_RTC_DRV_SNVS=y ++CONFIG_DMADEVICES=y ++CONFIG_MXC_PXP_V2=y ++CONFIG_IMX_SDMA=y ++CONFIG_MXS_DMA=y ++CONFIG_STAGING=y ++CONFIG_COMMON_CLK_DEBUG=y ++# CONFIG_IOMMU_SUPPORT is not set ++CONFIG_PWM=y ++CONFIG_PWM_IMX=y ++CONFIG_EXT2_FS=y ++CONFIG_EXT2_FS_XATTR=y ++CONFIG_EXT2_FS_POSIX_ACL=y ++CONFIG_EXT2_FS_SECURITY=y ++CONFIG_EXT3_FS=y ++CONFIG_EXT3_FS_POSIX_ACL=y ++CONFIG_EXT3_FS_SECURITY=y ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_QUOTA=y ++CONFIG_QUOTA_NETLINK_INTERFACE=y ++# CONFIG_PRINT_QUOTA_WARNING is not set ++CONFIG_AUTOFS4_FS=y ++CONFIG_FUSE_FS=y ++CONFIG_ISO9660_FS=m ++CONFIG_JOLIET=y ++CONFIG_ZISOFS=y ++CONFIG_UDF_FS=m ++CONFIG_MSDOS_FS=m ++CONFIG_VFAT_FS=y ++CONFIG_TMPFS=y ++CONFIG_JFFS2_FS=y ++CONFIG_UBIFS_FS=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++CONFIG_ROOT_NFS=y ++CONFIG_NLS_DEFAULT="cp437" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=y ++CONFIG_NLS_ISO8859_15=m ++CONFIG_NLS_UTF8=y ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_SCHED_DEBUG is not set ++# CONFIG_DEBUG_BUGVERBOSE is not set ++# CONFIG_FTRACE is not set ++CONFIG_SECURITYFS=y ++CONFIG_CRYPTO_USER=y ++CONFIG_CRYPTO_TEST=m ++CONFIG_CRYPTO_CCM=y ++CONFIG_CRYPTO_GCM=y ++CONFIG_CRYPTO_CBC=y ++CONFIG_CRYPTO_CTS=y ++CONFIG_CRYPTO_ECB=y ++CONFIG_CRYPTO_LRW=y ++CONFIG_CRYPTO_XTS=y ++CONFIG_CRYPTO_MD4=y ++CONFIG_CRYPTO_MD5=y ++CONFIG_CRYPTO_MICHAEL_MIC=y ++CONFIG_CRYPTO_RMD128=y ++CONFIG_CRYPTO_RMD160=y ++CONFIG_CRYPTO_RMD256=y ++CONFIG_CRYPTO_RMD320=y ++CONFIG_CRYPTO_SHA1=y ++CONFIG_CRYPTO_SHA256=y ++CONFIG_CRYPTO_SHA512=y ++CONFIG_CRYPTO_TGR192=y ++CONFIG_CRYPTO_WP512=y ++CONFIG_CRYPTO_BLOWFISH=y ++CONFIG_CRYPTO_CAMELLIA=y ++CONFIG_CRYPTO_DES=y ++CONFIG_CRYPTO_TWOFISH=y ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++CONFIG_CRYPTO_DEV_FSL_CAAM=y ++CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y ++CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y ++CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y ++CONFIG_CRC_CCITT=m ++CONFIG_CRC_T10DIF=y ++CONFIG_CRC7=m ++CONFIG_LIBCRC32C=m +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0003-igb-Enable-random-mac-address.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0003-igb-Enable-random-mac-address.patch new file mode 100644 index 00000000..7fb766b5 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0003-igb-Enable-random-mac-address.patch @@ -0,0 +1,32 @@ +From 0a691facfb253b42cdaeaedd77477d13c6fa99f8 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 15 May 2014 17:26:30 +0300 +Subject: [PATCH 03/59] igb: Enable random mac address + +Enable random mac address in order to let the driver up +if eeprom values are incorrect. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + drivers/net/ethernet/intel/igb/igb_main.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c +index 206e79d..2472835 100644 +--- a/drivers/net/ethernet/intel/igb/igb_main.c ++++ b/drivers/net/ethernet/intel/igb/igb_main.c +@@ -2387,6 +2387,11 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + if (hw->mac.ops.read_mac_addr(hw)) + dev_err(&pdev->dev, "NVM Read Error\n"); + ++ if (!is_valid_ether_addr(hw->mac.addr)) { ++ dev_info(&pdev->dev, "Random MAC Address\n"); ++ random_ether_addr(hw->mac.addr); ++ } ++ + memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len); + + if (!is_valid_ether_addr(netdev->dev_addr)) { +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0004-ARM-i.MX6-cm-fx6-update-defconfig.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0004-ARM-i.MX6-cm-fx6-update-defconfig.patch new file mode 100644 index 00000000..d9c90b0b --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0004-ARM-i.MX6-cm-fx6-update-defconfig.patch @@ -0,0 +1,27 @@ +From f02b927b88856dde0ec988705e6445159bb272ae Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Sun, 22 Jun 2014 18:03:27 +0300 +Subject: [PATCH 04/59] ARM: i.MX6: cm-fx6: update defconfig + +Enable EM3027 RTC + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/configs/cm_fx6_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/configs/cm_fx6_defconfig b/arch/arm/configs/cm_fx6_defconfig +index 92c3da1..eb6d9cb 100644 +--- a/arch/arm/configs/cm_fx6_defconfig ++++ b/arch/arm/configs/cm_fx6_defconfig +@@ -347,6 +347,7 @@ CONFIG_LEDS_TRIGGERS=y + CONFIG_LEDS_TRIGGER_GPIO=y + CONFIG_RTC_CLASS=y + CONFIG_RTC_INTF_DEV_UIE_EMUL=y ++CONFIG_RTC_DRV_EM3027=y + CONFIG_RTC_DRV_MC13XXX=y + CONFIG_RTC_DRV_MXC=y + CONFIG_RTC_DRV_SNVS=y +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0005-ARM-i.MX6-dts-add-HDMI-and-DVI-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0005-ARM-i.MX6-dts-add-HDMI-and-DVI-support.patch new file mode 100644 index 00000000..8d133e40 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0005-ARM-i.MX6-dts-add-HDMI-and-DVI-support.patch @@ -0,0 +1,101 @@ +From 80e3270f42e72dc01f8c2235fbdaf5fa94dd6fce Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Mon, 23 Jun 2014 13:53:35 +0300 +Subject: [PATCH 05/59] ARM: i.MX6: dts: add HDMI and DVI support + +Add HDMI and DVI support on IPU1 and IPU2, define two frame buffers. +Enable starting X with fbdev. +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 65 +++++++++++++++++++++++++++++++++++- + 1 file changed, 64 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 1f06d95..018c3b1 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -86,6 +86,44 @@ + startup-delay-us = <10000>; + }; + }; ++ ++ aliases { ++ mxcfb0 = &mxcfb1; ++ mxcfb1 = &mxcfb2; ++ }; ++ ++ mxcfb1: fb@0 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "hdmi"; ++ interface_pix_fmt = "RGB24"; ++ mode_str ="1920x1080M@60"; ++ default_bpp = <24>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ ++ mxcfb2: fb@1 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "lcd"; ++ interface_pix_fmt = "RGB24"; ++ mode_str ="1920x1080M@60"; ++ default_bpp = <24>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ ++ lcd@0 { ++ compatible = "fsl,lcd"; ++ ipu_id = <0>; ++ disp_id = <0>; ++ default_ifmt = "RGB24"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ipu1_1>; ++ status = "okay"; ++ }; ++ + }; + + &iomuxc { +@@ -287,7 +325,7 @@ + &i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; +- status = "okay"; ++ /* status = "okay"; */ + }; + + /* i2c3 */ +@@ -366,3 +404,28 @@ + vmmc-supply = <®_3p3v>; + status = "okay"; + }; ++ ++&mxcfb1 { ++ status = "okay"; ++}; ++ ++&mxcfb2 { ++ status = "okay"; ++}; ++ ++&hdmi_core { ++ ipu_id = <1>; ++ disp_id = <0>; ++ status = "okay"; ++}; ++ ++&hdmi_video { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; ++ fsl,hdcp; ++ status = "okay"; ++}; ++ ++&hdmi_audio { ++/* status = "okay"; */ ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0006-ARM-i.MX6-dts-add-HDMI-Audio-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0006-ARM-i.MX6-dts-add-HDMI-Audio-support.patch new file mode 100644 index 00000000..a31a9771 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0006-ARM-i.MX6-dts-add-HDMI-Audio-support.patch @@ -0,0 +1,40 @@ +From 608c9ed0c20fe1258b8982e3ce452482aa1c002e Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Mon, 23 Jun 2014 15:29:21 +0300 +Subject: [PATCH 06/59] ARM: i.MX6: dts: add HDMI-Audio support + +Add HDMI-Audio support. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 018c3b1..76b4b0c 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -92,6 +92,13 @@ + mxcfb1 = &mxcfb2; + }; + ++ sound-hdmi { ++ compatible = "fsl,imx6q-audio-hdmi", ++ "fsl,imx-audio-hdmi"; ++ model = "imx-audio-hdmi"; ++ hdmi-controller = <&hdmi_audio>; ++ }; ++ + mxcfb1: fb@0 { + compatible = "fsl,mxc_sdc_fb"; + disp_dev = "hdmi"; +@@ -427,5 +434,5 @@ + }; + + &hdmi_audio { +-/* status = "okay"; */ ++ status = "okay"; + }; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0007-ARM-i.MX6-dts-add-SPDIF-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0007-ARM-i.MX6-dts-add-SPDIF-support.patch new file mode 100644 index 00000000..24e53615 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0007-ARM-i.MX6-dts-add-SPDIF-support.patch @@ -0,0 +1,69 @@ +From b0e655dbaddb94c4b7c73c00140b43fb0b1ecd36 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Mon, 23 Jun 2014 16:30:18 +0300 +Subject: [PATCH 07/59] ARM: i.MX6: dts: add SPDIF support + +Add SPDIF support. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 25 ++++++++++++++++++++++++- + 1 file changed, 24 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 76b4b0c..3f73b83 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -99,6 +99,15 @@ + hdmi-controller = <&hdmi_audio>; + }; + ++ sound-spdif { ++ compatible = "fsl,imx-audio-spdif", ++ "fsl,imx-sabreauto-spdif"; ++ model = "imx-spdif"; ++ spdif-controller = <&spdif>; ++ spdif-out; ++ spdif-in; ++ }; ++ + mxcfb1: fb@0 { + compatible = "fsl,mxc_sdc_fb"; + disp_dev = "hdmi"; +@@ -153,7 +162,6 @@ + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 +- MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + >; + }; + +@@ -260,6 +268,15 @@ + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + >; + }; ++ ++ /* pins for spdif */ ++ pinctrl_spdif: spdifgrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 ++ MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 ++ >; ++ }; ++ + }; + }; + +@@ -436,3 +453,9 @@ + &hdmi_audio { + status = "okay"; + }; ++ ++&spdif { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_spdif>; ++ status = "okay"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0008-ARM-i.MX6-dts-add-Power-Button.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0008-ARM-i.MX6-dts-add-Power-Button.patch new file mode 100644 index 00000000..d463399d --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0008-ARM-i.MX6-dts-add-Power-Button.patch @@ -0,0 +1,36 @@ +From a15ad25075d0d78f4462521260902c0f03d6a343 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Tue, 24 Jun 2014 15:35:52 +0300 +Subject: [PATCH 08/59] ARM: i.MX6: dts: add "Power Button" + +Add "Power Button" by means of GPIO + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 3f73b83..0abb116 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -87,6 +87,16 @@ + }; + }; + ++ gpio-keys { ++ compatible = "gpio-keys"; ++ power { ++ label = "Power Button"; ++ gpios = <&gpio1 29 1>; ++ linux,code = <116>; /* KEY_POWER */ ++ gpio-key,wakeup; ++ }; ++ }; ++ + aliases { + mxcfb0 = &mxcfb1; + mxcfb1 = &mxcfb2; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0009-ARM-i.MX6-dts-Enable-uart2-as-a-serial-console.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0009-ARM-i.MX6-dts-Enable-uart2-as-a-serial-console.patch new file mode 100644 index 00000000..cf06c29e --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0009-ARM-i.MX6-dts-Enable-uart2-as-a-serial-console.patch @@ -0,0 +1,50 @@ +From 0d82c1831d3fe3cf53e6b8d0435ff6bd621e07d2 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Sun, 20 Jul 2014 10:42:20 +0300 +Subject: [PATCH 09/59] ARM: i.MX6: dts: Enable uart2 as a serial console + +Enable ttymxc1 for use as a serial console: +1) Add the correct uart2 pinmux configuration. +2) Disable uart2 dte mode. + It allows running 'getty' and 'login' on the ttymxc1. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 0abb116..16cefe0 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -287,6 +287,16 @@ + >; + }; + ++ /* pins for uart2 */ ++ pinctrl_uart2: uart2grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 ++ >; ++ }; ++ + }; + }; + +@@ -389,8 +399,8 @@ + /* rear serial console */ + &uart2 { + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart2_2>; +- fsl,dte-mode; ++ pinctrl-0 = <&pinctrl_uart2>; ++ /* fsl,dte-mode; */ + fsl,uart-has-rtscts; + dma-names = "rx", "tx"; + dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0010-ARM-i.MX6-dts-add-pcie-power-reset-gpio-definition.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0010-ARM-i.MX6-dts-add-pcie-power-reset-gpio-definition.patch new file mode 100644 index 00000000..e055a3c7 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0010-ARM-i.MX6-dts-add-pcie-power-reset-gpio-definition.patch @@ -0,0 +1,44 @@ +From 11f421d3b4a9f4b1d256fa6bc6b6b9c313cf1b93 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Sun, 20 Jul 2014 10:51:44 +0300 +Subject: [PATCH 10/59] ARM: i.MX6: dts: add pcie power/reset gpio definition + +Add pcie power/reset gpio definition. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 16cefe0..592db30 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -297,6 +297,13 @@ + >; + }; + ++ /* pins for pcie */ ++ pinctrl_pcie: pciegrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 ++ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 ++ >; ++ }; + }; + }; + +@@ -387,7 +394,10 @@ + + /* eth1 */ + &pcie { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie>; + reset-gpio = <&gpio1 26 0>; ++ power-on-gpio = <&gpio2 24 0>; + status = "okay"; + }; + +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0011-ARM-i.MX6-dts-add-onboard-SSD-pin-configuration.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0011-ARM-i.MX6-dts-add-onboard-SSD-pin-configuration.patch new file mode 100644 index 00000000..37b49495 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0011-ARM-i.MX6-dts-add-onboard-SSD-pin-configuration.patch @@ -0,0 +1,46 @@ +From 811721a51deec0f751d98ba438d763c4b9d1f736 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Sun, 20 Jul 2014 10:53:32 +0300 +Subject: [PATCH 11/59] ARM: i.MX6: dts: add onboard SSD pin configuration + +Add onboard SSD pin configuration. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 592db30..0dfffa9 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -153,6 +153,26 @@ + }; + + &iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog>; ++ ++ hog { ++ pinctrl_hog: hoggrp { ++ fsl,pins = < ++ /* SATA PWR */ ++ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 ++ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 ++ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 ++ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 ++ /* SATA CTRL */ ++ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 ++ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 ++ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 ++ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 ++ >; ++ }; ++ }; ++ + imx6q-cm-fx6 { + /* pins for eth0 */ + pinctrl_enet: enetgrp { +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0012-ARM-i.MX6-dts-add-onboard-SSD-power-up-sequence.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0012-ARM-i.MX6-dts-add-onboard-SSD-power-up-sequence.patch new file mode 100644 index 00000000..e2e8fd28 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0012-ARM-i.MX6-dts-add-onboard-SSD-power-up-sequence.patch @@ -0,0 +1,92 @@ +From bf5a6721257ec96c1626f295851014b373a3a20a Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Sun, 20 Jul 2014 10:54:43 +0300 +Subject: [PATCH 12/59] ARM: i.MX6: dts: add onboard SSD power up sequence + +Add onboard SSD power up sequence. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 66 ++++++++++++++++++++++++++++++++++++ + 1 file changed, 66 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 0dfffa9..286b03e 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -85,6 +85,72 @@ + gpio = <&gpio6 16 0>; + startup-delay-us = <10000>; + }; ++ ++ reg_sata_phy_slp: sata_phy_slp { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_phy_slp"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 23 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ }; ++ ++ reg_sata_nrstdly: sata_nrstdly { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nrstdly"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio6 6 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_phy_slp>; ++ }; ++ ++ reg_sata_pwren: sata_pwren { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_pwren"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio1 28 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_nrstdly>; ++ }; ++ ++ reg_sata_nstandby1: sata_nstandby1 { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nstandby1"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 20 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_pwren>; ++ }; ++ ++ reg_sata_nstandby2: sata_nstandby2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nstandby2"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio5 2 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_nstandby1>; ++ }; ++ ++ reg_sata_ldo_en: sata_ldo_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_ldo_en"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio2 16 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ regulator-boot-on; ++ vin-supply = <®_sata_nstandby2>; ++ }; + }; + + gpio-keys { +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0013-ARM-i.MX6-dts-add-audio-mux-pinmux-configuration.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0013-ARM-i.MX6-dts-add-audio-mux-pinmux-configuration.patch new file mode 100644 index 00000000..e09502f9 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0013-ARM-i.MX6-dts-add-audio-mux-pinmux-configuration.patch @@ -0,0 +1,47 @@ +From 6a962cb469afddc96a37dce883af88a29a53a30c Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Sun, 20 Jul 2014 10:57:39 +0300 +Subject: [PATCH 13/59] ARM: i.MX6: dts: add audio mux pinmux configuration + +Add audio mux pinmux configuration and enable audio mux. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 286b03e..776e0d8 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -373,6 +373,17 @@ + >; + }; + ++ /* pins for audmux */ ++ pinctrl_audmux: audmuxgrp { ++ fsl,pins = < ++ MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 ++ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 ++ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 ++ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 ++ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 ++ >; ++ }; ++ + /* pins for uart2 */ + pinctrl_uart2: uart2grp { + fsl,pins = < +@@ -575,3 +586,9 @@ + pinctrl-0 = <&pinctrl_spdif>; + status = "okay"; + }; ++ ++&audmux { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_audmux>; ++ status = "okay"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0014-ARM-i.MX6-dts-add-analog-audio-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0014-ARM-i.MX6-dts-add-analog-audio-support.patch new file mode 100644 index 00000000..511298fd --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0014-ARM-i.MX6-dts-add-analog-audio-support.patch @@ -0,0 +1,67 @@ +From 0afe8320732c2609015af4c0b474cede18f81f24 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Sun, 20 Jul 2014 11:02:28 +0300 +Subject: [PATCH 14/59] ARM: i.MX6: dts: add analog audio support + +1) Add i2c analog audion device node definition. +2) Add wm8731 codec node definition. +3) Enable ssi2 in master mode. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 776e0d8..9f5da43 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -168,6 +168,15 @@ + mxcfb1 = &mxcfb2; + }; + ++ sound { ++ compatible = "fsl,imx6q-cm-fx6-wm8731", ++ "fsl,imx-audio-wm8731"; ++ model = "wm8731-audio"; ++ ssi-controller = <&ssi2>; ++ audio-codec = <&codec>; ++ audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; ++ }; ++ + sound-hdmi { + compatible = "fsl,imx6q-audio-hdmi", + "fsl,imx-audio-hdmi"; +@@ -487,6 +496,17 @@ + reg = <0x50>; + pagesize = <16>; + }; ++ ++ codec: wm8731@1a { ++ compatible = "wlf,wm8731"; ++ reg = <0x1a>; ++ clocks = <&clks 173>, <&clks 158>; ++ clock-names = "pll4", "imx-ssi.1"; ++ AVDD-supply = <&pu_dummy>; ++ HPVDD-supply = <&pu_dummy>; ++ DCVDD-supply = <&pu_dummy>; ++ DBVDD-supply = <&pu_dummy>; ++ }; + }; + + /* eth1 */ +@@ -556,6 +576,11 @@ + status = "okay"; + }; + ++&ssi2 { ++ fsl,mode = "i2s-master"; ++ status = "okay"; ++}; ++ + &mxcfb1 { + status = "okay"; + }; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0015-ARM-i.MX6-ASoC-add-imx-wm8731-machine-driver.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0015-ARM-i.MX6-ASoC-add-imx-wm8731-machine-driver.patch new file mode 100644 index 00000000..f3d4befd --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0015-ARM-i.MX6-ASoC-add-imx-wm8731-machine-driver.patch @@ -0,0 +1,573 @@ +From 5fbe55d2945782fee3f3238f20a8dcd0b9ba630c Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Sun, 20 Jul 2014 11:10:12 +0300 +Subject: [PATCH 15/59] ARM: i.MX6: ASoC: add imx-wm8731 machine driver + +This is the initial imx-wm8731 device-tree-only machine driver working with +fsl_ssi driver. Works in the slave mode. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + sound/soc/fsl/Kconfig | 12 ++ + sound/soc/fsl/Makefile | 2 + + sound/soc/fsl/imx-wm8731.c | 505 ++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 519 insertions(+) + create mode 100644 sound/soc/fsl/imx-wm8731.c + +diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig +index 573dabb..bb229da 100644 +--- a/sound/soc/fsl/Kconfig ++++ b/sound/soc/fsl/Kconfig +@@ -252,6 +252,18 @@ config SND_SOC_IMX_CS42888 + Say Y if you want to add support for SoC audio on an i.MX board with + a cs42888 codec. + ++config SND_SOC_IMX_WM8731 ++ tristate "SoC Audio support for i.MX boards with wm8731" ++ depends on OF && I2C ++ select SND_SOC_WM8731 ++ select SND_SOC_IMX_PCM_DMA ++ select SND_SOC_IMX_AUDMUX ++ select SND_SOC_FSL_SSI ++ select SND_SOC_FSL_UTILS ++ help ++ Say Y if you want to add support for SoC audio on an i.MX board with ++ a wm8731 codec. ++ + config SND_SOC_IMX_WM8962 + tristate "SoC Audio support for i.MX boards with wm8962" + depends on OF && I2C +diff --git a/sound/soc/fsl/Makefile b/sound/soc/fsl/Makefile +index 144cd69..65f8e6f 100644 +--- a/sound/soc/fsl/Makefile ++++ b/sound/soc/fsl/Makefile +@@ -55,6 +55,7 @@ snd-soc-mx27vis-aic32x4-objs := mx27vis-aic32x4.o + snd-soc-wm1133-ev1-objs := wm1133-ev1.o + snd-soc-imx-cs42888-objs := imx-cs42888.o + snd-soc-imx-sgtl5000-objs := imx-sgtl5000.o ++snd-soc-imx-wm8731-objs := imx-wm8731.o + snd-soc-imx-wm8962-objs := imx-wm8962.o + snd-soc-imx-spdif-objs := imx-spdif.o + snd-soc-imx-mc13783-objs := imx-mc13783.o +@@ -69,6 +70,7 @@ obj-$(CONFIG_SND_MXC_SOC_WM1133_EV1) += snd-soc-wm1133-ev1.o + obj-$(CONFIG_SND_SOC_IMX_CS42888) += snd-soc-imx-cs42888.o + obj-$(CONFIG_SND_SOC_IMX_SGTL5000) += snd-soc-imx-sgtl5000.o + obj-$(CONFIG_SND_SOC_IMX_WM8962) += snd-soc-imx-wm8962.o ++obj-$(CONFIG_SND_SOC_IMX_WM8731) += snd-soc-imx-wm8731.o + obj-$(CONFIG_SND_SOC_IMX_SPDIF) += snd-soc-imx-spdif.o + obj-$(CONFIG_SND_SOC_IMX_MC13783) += snd-soc-imx-mc13783.o + obj-$(CONFIG_SND_SOC_IMX_HDMI) += snd-soc-imx-hdmi.o +diff --git a/sound/soc/fsl/imx-wm8731.c b/sound/soc/fsl/imx-wm8731.c +new file mode 100644 +index 0000000..ba1363f +--- /dev/null ++++ b/sound/soc/fsl/imx-wm8731.c +@@ -0,0 +1,505 @@ ++/* ++ * Copyright (C) 2014 Freescale Semiconductor, Inc. ++ * ++ * Based on imx-sgtl5000.c ++ * Copyright (C) 2012 Freescale Semiconductor, Inc. ++ * Copyright (C) 2012 Linaro Ltd. ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++#include <linux/module.h> ++#include <linux/of_platform.h> ++#include <linux/of_i2c.h> ++#include <linux/of_gpio.h> ++#include <linux/slab.h> ++#include <linux/gpio.h> ++#include <linux/clk.h> ++#include <sound/soc.h> ++#include <sound/jack.h> ++#include <sound/pcm_params.h> ++#include <sound/soc-dapm.h> ++#include <linux/pinctrl/consumer.h> ++ ++#include "../codecs/wm8731.h" ++#include "imx-audmux.h" ++#include "imx-ssi.h" ++ ++#define DAI_NAME_SIZE 32 ++ ++struct imx_wm8731_data { ++ struct snd_soc_dai_link dai; ++ struct snd_soc_card card; ++ char codec_dai_name[DAI_NAME_SIZE]; ++ char platform_name[DAI_NAME_SIZE]; ++ struct i2c_client *codec_dev; ++ /* audio_clocking_data */ ++ struct clk *pll; ++ struct clk *clock_root; ++ long sysclk; ++ long current_rate; ++ /* platfor data */ ++ unsigned int ssi_num; ++ unsigned int src_port; ++ unsigned int ext_port; ++}; ++ ++static int imx_wm8731_init(struct snd_soc_pcm_runtime *rtd); ++static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params); ++static void imx_hifi_shutdown(struct snd_pcm_substream *substream); ++ ++struct imx_priv { ++ struct platform_device *pdev; ++ struct imx_wm8731_data *data; ++}; ++ ++static struct imx_priv card_priv; ++ ++static struct snd_soc_ops imx_hifi_ops = { ++ .shutdown = imx_hifi_shutdown, ++ .hw_params = imx_hifi_hw_params_slv_mode, ++}; ++ ++/* imx card dapm widgets */ ++static const struct snd_soc_dapm_widget imx_dapm_widgets[] = { ++ SND_SOC_DAPM_HP("Headphone Jack", NULL), ++ SND_SOC_DAPM_SPK("Ext Spk", NULL), ++ SND_SOC_DAPM_LINE("Line Jack", NULL), ++ SND_SOC_DAPM_MIC("Mic Jack", NULL), ++}; ++ ++/* imx machine connections to the codec pins */ ++static const struct snd_soc_dapm_route audio_map[] = { ++ { "Headphone Jack", NULL, "LHPOUT" }, ++ { "Headphone Jack", NULL, "RHPOUT" }, ++ ++ { "Ext Spk", NULL, "LOUT" }, ++ { "Ext Spk", NULL, "ROUT" }, ++ ++ { "LLINEIN", NULL, "Line Jack" }, ++ { "RLINEIN", NULL, "Line Jack" }, ++ ++ { "MICIN", NULL, "Mic Bias" }, ++ { "Mic Bias", NULL, "Mic Jack"}, ++}; ++ ++static int wm8731_slv_mode_init(struct imx_wm8731_data *data) ++{ ++ struct clk *new_parent; ++ struct clk *ssi_clk; ++ struct i2c_client *codec_dev = data->codec_dev; ++ ++ new_parent = devm_clk_get(&codec_dev->dev, "pll4"); ++ if (IS_ERR(new_parent)) { ++ pr_err("Could not get \"pll4\" clock \n"); ++ return PTR_ERR(new_parent); ++ } ++ ++ ssi_clk = devm_clk_get(&codec_dev->dev, "imx-ssi.1"); ++ if (IS_ERR(ssi_clk)) { ++ pr_err("Could not get \"imx-ssi.1\" clock \n"); ++ return PTR_ERR(ssi_clk); ++ } ++ ++ clk_set_parent(ssi_clk, new_parent); ++ ++ data->pll = new_parent; ++ data->clock_root = ssi_clk; ++ data->current_rate = 0; ++ ++ data->sysclk = 0; ++ ++ return 0; ++} ++ ++static int wm8731_slv_mode_clock_enable(int enable, struct imx_wm8731_data *data) ++{ ++ long pll_rate; ++ long rate_req; ++ long rate_avail; ++ ++ if (!enable) ++ return 0; ++ ++ if (data->sysclk == data->current_rate) ++ return 0; ++ ++ switch (data->sysclk) { ++ case 11289600: ++ pll_rate = 632217600; ++ break; ++ ++ case 12288000: ++ pll_rate = 688128000; ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ rate_req = pll_rate; ++ rate_avail = clk_round_rate(data->pll, rate_req); ++ clk_set_rate(data->pll, rate_avail); ++ ++ rate_req = data->sysclk; ++ rate_avail = clk_round_rate(data->clock_root, ++ rate_req); ++ clk_set_rate(data->clock_root, rate_avail); ++ ++ pr_info("%s: \"imx-ssi.1\" rate = %ld (= %ld)\n", ++ __func__, rate_avail, rate_req); ++ ++ data->current_rate = data->sysclk; ++ ++ return 0; ++} ++ ++static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ struct snd_soc_card *card = codec_dai->codec->card; ++ struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); ++ ++ u32 dai_format, pll_out; ++ snd_pcm_format_t sample_format; ++ unsigned int channels; ++ unsigned int tx_mask, rx_mask; ++ unsigned int sampling_rate; ++ unsigned int div_2, div_psr, div_pm; ++ int ret; ++ ++ sampling_rate = params_rate(params); ++ sample_format = params_format(params); ++ ++ channels = params_channels(params); ++ printk("%s:%s sampling rate = %u channels = %u \n", __FUNCTION__, ++ (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? "Playback" : "Capture"), ++ sampling_rate, channels); ++ ++ /* set CPU DAI configuration */ ++ switch (sampling_rate) { ++ case 8000: ++ case 32000: ++ case 48000: ++ case 96000: ++ data->sysclk = 12288000; ++ break; ++ ++ case 44100: ++ case 88200: ++ data->sysclk = 11289600; ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ wm8731_slv_mode_clock_enable(1,data); ++ ++ dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF | ++ SND_SOC_DAIFMT_CBS_CFS; ++ ++ ret = snd_soc_dai_set_fmt(cpu_dai, dai_format); ++ if (ret < 0) ++ return ret; ++ ++ /* set i.MX active slot mask */ ++ /* S[TR]CCR:DC */ ++ tx_mask = ~((1 << channels) - 1); ++ rx_mask = tx_mask; ++ snd_soc_dai_set_tdm_slot(cpu_dai, tx_mask, rx_mask, 2, 32); ++ ++ /* ++ * SSI sysclk divider: ++ * div_2: /1 or /2 ++ * div_psr: /1 or /8 ++ * div_pm: /1 .. /256 ++ */ ++ div_2 = 0; ++ div_psr = 0; ++ switch (sampling_rate) { ++ case 8000: ++ // 1x1x12 ++ div_pm = 11; ++ break; ++ case 32000: ++ // 1x1x3 ++ div_pm = 2; ++ break; ++ case 48000: ++ // 1x1x2 ++ div_pm = 1; ++ break; ++ case 96000: ++ // 1x1x1 ++ div_pm = 0; ++ break; ++ case 44100: ++ // 1x1x2 ++ div_pm = 1; ++ break; ++ case 88200: ++ // 1x1x1 ++ div_pm = 0; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ /* sync mode: a single clock controls both playback and capture */ ++ snd_soc_dai_set_clkdiv(cpu_dai, IMX_SSI_TX_DIV_2, (div_2 ? SSI_STCCR_DIV2 : 0)); ++ snd_soc_dai_set_clkdiv(cpu_dai, IMX_SSI_TX_DIV_PSR, (div_psr ? SSI_STCCR_PSR : 0)); ++ snd_soc_dai_set_clkdiv(cpu_dai, IMX_SSI_TX_DIV_PM, div_pm); ++ ++ /* set codec DAI configuration */ ++ dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBS_CFS; ++ ++ ret = snd_soc_dai_set_fmt(codec_dai, dai_format); ++ if (ret < 0) ++ return ret; ++ ++ ret = snd_soc_dai_set_sysclk(codec_dai, ++ WM8731_SYSCLK_MCLK, ++ data->sysclk, ++ SND_SOC_CLOCK_IN); ++ ++ if (ret < 0) { ++ pr_err("Failed to set codec master clock to %u: %d \n", ++ data->sysclk, ret); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static void imx_hifi_shutdown(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ struct snd_soc_card *card = codec_dai->codec->card; ++ struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); ++ ++ if (!codec_dai->active) ++ wm8731_slv_mode_clock_enable(0,data); ++ ++ return; ++} ++ ++static int imx_wm8731_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ int ret = 0; ++ struct snd_soc_codec *codec = rtd->codec; ++ ++ /* Add imx specific widgets */ ++ ret = snd_soc_dapm_new_controls(&codec->dapm, imx_dapm_widgets, ++ ARRAY_SIZE(imx_dapm_widgets)); ++ if (ret) ++ goto out_retcode; ++ ++ /* Set up imx specific audio path audio_map */ ++ ret = snd_soc_dapm_add_routes(&codec->dapm, audio_map, ARRAY_SIZE(audio_map)); ++ if (ret) ++ goto out_retcode; ++ ++ ret = snd_soc_dapm_enable_pin(&codec->dapm, "Headphone Jack"); ++ if (ret) ++ goto out_retcode; ++ ++ ret = snd_soc_dapm_nc_pin(&codec->dapm, "Ext Spk"); ++ if (ret) ++ goto out_retcode; ++ ++out_retcode: ++ ++ if (ret) ++ pr_err("%s: failed with error code: %d \n", __FUNCTION__, ret); ++ else ++ pr_info("%s: success \n", __FUNCTION__); ++ ++ return ret; ++} ++ ++/** ++ * Configure AUDMUX interconnection between ++ * _slave (CPU side) and _master (codec size) ++ * ++ * When SSI operates in master mode, 5-wire interconnect with ++ * audio codec is required: ++ * TXC - BCLK ++ * TXD - DAC data ++ * RXD - ADC data ++ * TXFS - {DAC|ADC}LRC, i.e. word clock ++ * RXC - MCLK, i.e. oversampling clock ++ * Audmux is operated in asynchronous mode to enable 6-wire ++ * interface (as opposed to 4-wire interface in sync mode). ++ */ ++static int imx_audmux_config_slv_mode(int _slave, int _master) ++{ ++ unsigned int ptcr, pdcr; ++ int slave = _slave - 1; ++ int master = _master - 1; ++ ++ ptcr = IMX_AUDMUX_V2_PTCR_SYN | ++ IMX_AUDMUX_V2_PTCR_TFSDIR | ++ IMX_AUDMUX_V2_PTCR_TFSEL(slave) | ++ IMX_AUDMUX_V2_PTCR_RCLKDIR | ++ IMX_AUDMUX_V2_PTCR_RCSEL(slave | 0x8) | ++ IMX_AUDMUX_V2_PTCR_TCLKDIR | ++ IMX_AUDMUX_V2_PTCR_TCSEL(slave); ++ ++ pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(slave); ++ imx_audmux_v2_configure_port(master, ptcr, pdcr); ++ ptcr = ptcr & ~IMX_AUDMUX_V2_PTCR_SYN; ++ imx_audmux_v2_configure_port(master, ptcr, pdcr); ++ ++ ptcr = IMX_AUDMUX_V2_PTCR_SYN | ++ IMX_AUDMUX_V2_PTCR_RCLKDIR | ++ IMX_AUDMUX_V2_PTCR_RCSEL(master | 0x8) | ++ IMX_AUDMUX_V2_PTCR_TCLKDIR | ++ IMX_AUDMUX_V2_PTCR_TCSEL(master); ++ ++ pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(master); ++ imx_audmux_v2_configure_port(slave, ptcr, pdcr); ++ ptcr = ptcr & ~IMX_AUDMUX_V2_PTCR_SYN; ++ imx_audmux_v2_configure_port(slave, ptcr, pdcr); ++ ++ return 0; ++} ++ ++static int imx_wm8731_probe(struct platform_device *pdev) ++{ ++ struct device_node *ssi_np, *codec_np; ++ struct platform_device *ssi_pdev; ++ struct imx_priv *priv = &card_priv; ++ struct i2c_client *codec_dev; ++ struct imx_wm8731_data *data; ++ int ret; ++ ++ priv->pdev = pdev; ++ ++ ssi_np = of_parse_phandle(pdev->dev.of_node, "ssi-controller", 0); ++ codec_np = of_parse_phandle(pdev->dev.of_node, "audio-codec", 0); ++ if (!ssi_np || !codec_np) { ++ dev_err(&pdev->dev, "phandle missing or invalid\n"); ++ ret = -EINVAL; ++ goto fail; ++ } ++ ++ ssi_pdev = of_find_device_by_node(ssi_np); ++ if (!ssi_pdev) { ++ dev_err(&pdev->dev, "failed to find SSI platform device\n"); ++ ret = -EINVAL; ++ goto fail; ++ } ++ ++ codec_dev = of_find_i2c_device_by_node(codec_np); ++ if (!codec_dev || !codec_dev->driver) { ++ dev_err(&pdev->dev, "failed to find codec platform device\n"); ++ ret = -EINVAL; ++ goto fail; ++ } ++ ++ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); ++ if (!data) { ++ ret = -ENOMEM; ++ goto fail; ++ } ++ ++ card_priv.data = data; ++ ++ data->codec_dev = codec_dev; ++ ++ data->dai.name = "HiFi"; ++ data->dai.stream_name = "HiFi"; ++ data->dai.codec_dai_name = "wm8731-hifi"; ++ data->dai.codec_of_node = codec_np; ++ data->dai.cpu_dai_name = dev_name(&ssi_pdev->dev); ++ data->dai.platform_of_node = ssi_np; ++ data->dai.ops = &imx_hifi_ops; ++ data->dai.init = &imx_wm8731_init; ++ ++ data->ssi_num = 2; /* 1-based */ ++ data->src_port = 2; ++ data->ext_port = 4; ++ ++ imx_audmux_config_slv_mode(data->src_port, data->ext_port); ++ ++ /* Slave Mode Init */ ++ wm8731_slv_mode_init(data); ++ ++ data->card.dev = &pdev->dev; ++ ret = snd_soc_of_parse_card_name(&data->card, "model"); ++ if (ret) ++ goto fail; ++ ++ ret = snd_soc_of_parse_audio_routing(&data->card, "audio-routing"); ++ if (ret) ++ goto fail; ++ ++ data->card.num_links = 1; ++ data->card.dai_link = &data->dai; ++ ++ data->card.dapm_widgets = imx_dapm_widgets; ++ data->card.num_dapm_widgets = ARRAY_SIZE(imx_dapm_widgets); ++ ++ platform_set_drvdata(pdev, &data->card); ++ snd_soc_card_set_drvdata(&data->card, data); ++ ++ ret = snd_soc_register_card(&data->card); ++ if (ret) { ++ dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); ++ goto fail; ++ } ++ ++ return 0; ++ ++fail: ++ ++ if (ssi_np) ++ of_node_put(ssi_np); ++ ++ if (codec_np) ++ of_node_put(codec_np); ++ ++ return ret; ++} ++ ++static int imx_wm8731_remove(struct platform_device *pdev) ++{ ++ struct snd_soc_card *card = platform_get_drvdata(pdev); ++ snd_soc_unregister_card(card); ++ ++ return 0; ++} ++ ++static const struct of_device_id imx_wm8731_dt_ids[] = { ++ { .compatible = "fsl,imx-audio-wm8731", }, ++ { /* sentinel */ } ++}; ++MODULE_DEVICE_TABLE(of, imx_wm8731_dt_ids); ++ ++static struct platform_driver imx_wm8731_driver = { ++ .driver = { ++ .name = "imx-wm8731", ++ .owner = THIS_MODULE, ++ .of_match_table = imx_wm8731_dt_ids, ++ }, ++ .probe = imx_wm8731_probe, ++ .remove = imx_wm8731_remove, ++}; ++module_platform_driver(imx_wm8731_driver); ++ ++MODULE_AUTHOR("Freescale Semiconductor, Inc."); ++MODULE_DESCRIPTION("Freescale i.MX WM8731 ASoC machine driver"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:imx-wm8731"); +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0016-ARM-i.MX6-ASoC-add-imx-wm8731-master-mode-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0016-ARM-i.MX6-ASoC-add-imx-wm8731-master-mode-support.patch new file mode 100644 index 00000000..ae67161a --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0016-ARM-i.MX6-ASoC-add-imx-wm8731-master-mode-support.patch @@ -0,0 +1,335 @@ +From 4c7271dbe9a5fb21e049b07fffb78a933f59382b Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Mon, 21 Jul 2014 17:17:32 +0300 +Subject: [PATCH 16/59] ARM: i.MX6: ASoC: add imx-wm8731 master mode support + +Add imx-wm8731 master mode support. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 8 +- + sound/soc/fsl/imx-wm8731.c | 212 +++++++++++++++++++++++++++++++++--- + 2 files changed, 203 insertions(+), 17 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 9f5da43..050795b 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -173,6 +173,8 @@ + "fsl,imx-audio-wm8731"; + model = "wm8731-audio"; + ssi-controller = <&ssi2>; ++ src-port = <2>; ++ ext-port = <4>; + audio-codec = <&codec>; + audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; + }; +@@ -390,6 +392,8 @@ + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 ++ /* master mode pin */ ++ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 + >; + }; + +@@ -500,8 +504,8 @@ + codec: wm8731@1a { + compatible = "wlf,wm8731"; + reg = <0x1a>; +- clocks = <&clks 173>, <&clks 158>; +- clock-names = "pll4", "imx-ssi.1"; ++ clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>; ++ clock-names = "pll4", "imx-ssi.1", "cko", "cko2"; + AVDD-supply = <&pu_dummy>; + HPVDD-supply = <&pu_dummy>; + DCVDD-supply = <&pu_dummy>; +diff --git a/sound/soc/fsl/imx-wm8731.c b/sound/soc/fsl/imx-wm8731.c +index ba1363f..72b75ad 100644 +--- a/sound/soc/fsl/imx-wm8731.c ++++ b/sound/soc/fsl/imx-wm8731.c +@@ -31,6 +31,7 @@ + #include "imx-ssi.h" + + #define DAI_NAME_SIZE 32 ++#define WM8731_MCLK_FREQ (24000000 / 2) + + struct imx_wm8731_data { + struct snd_soc_dai_link dai; +@@ -43,10 +44,8 @@ struct imx_wm8731_data { + struct clk *clock_root; + long sysclk; + long current_rate; +- /* platfor data */ +- unsigned int ssi_num; +- unsigned int src_port; +- unsigned int ext_port; ++ /* apis */ ++ int (*clock_enable)(int enable,struct imx_wm8731_data *data); + }; + + static int imx_wm8731_init(struct snd_soc_pcm_runtime *rtd); +@@ -63,7 +62,6 @@ static struct imx_priv card_priv; + + static struct snd_soc_ops imx_hifi_ops = { + .shutdown = imx_hifi_shutdown, +- .hw_params = imx_hifi_hw_params_slv_mode, + }; + + /* imx card dapm widgets */ +@@ -160,6 +158,78 @@ static int wm8731_slv_mode_clock_enable(int enable, struct imx_wm8731_data *data + return 0; + } + ++static int imx_hifi_startup_slv_mode(struct snd_pcm_substream *substream) ++{ ++ /* ++ * As SSI's sys clock rate depends on sampling rate, ++ * the clock enabling code is moved to imx_hifi_hw_params(). ++ */ ++ return 0; ++} ++ ++static int wm8731_mst_mode_init(struct imx_wm8731_data *data) ++{ ++ long rate; ++ struct clk *new_parent; ++ struct clk *ssi_clk; ++ struct i2c_client *codec_dev = data->codec_dev; ++ ++ new_parent = devm_clk_get(&codec_dev->dev, "cko2"); ++ if (IS_ERR(new_parent)) { ++ pr_err("Could not get \"cko2\" clock \n"); ++ return PTR_ERR(new_parent); ++ } ++ ++ ssi_clk = devm_clk_get(&codec_dev->dev, "cko"); ++ if (IS_ERR(ssi_clk)) { ++ pr_err("Could not get \"cko\" clock \n"); ++ return PTR_ERR(ssi_clk); ++ } ++ ++ rate = clk_round_rate(new_parent, WM8731_MCLK_FREQ); ++ clk_set_rate(new_parent, rate); ++ ++ clk_set_parent(ssi_clk, new_parent); ++ ++ rate = clk_round_rate(ssi_clk, WM8731_MCLK_FREQ); ++ clk_set_rate(ssi_clk, rate); ++ ++ pr_info("%s: \"CLKO\" rate = %ld (= %d)\n", ++ __func__, rate, WM8731_MCLK_FREQ); ++ ++ data->pll = new_parent; ++ data->clock_root = ssi_clk; ++ data->sysclk = rate; ++ ++ return 0; ++} ++ ++static int wm8731_mst_mode_clock_enable(int enable, struct imx_wm8731_data *data) ++{ ++ struct clk *clko = data->clock_root; ++ ++ if (enable) ++ clk_enable(clko); ++ else ++ clk_disable(clko); ++ ++ return 0; ++} ++ ++static int imx_hifi_startup_mst_mode(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ struct snd_soc_card *card = codec_dai->codec->card; ++ struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); ++ ++ if (!codec_dai->active) ++ data->clock_enable(1,data); ++ ++ return 0; ++} ++ ++ + static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) + { +@@ -169,7 +239,7 @@ static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, + struct snd_soc_card *card = codec_dai->codec->card; + struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); + +- u32 dai_format, pll_out; ++ u32 dai_format; + snd_pcm_format_t sample_format; + unsigned int channels; + unsigned int tx_mask, rx_mask; +@@ -282,6 +352,63 @@ static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, + return 0; + } + ++static int imx_hifi_hw_params_mst_mode(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ struct snd_soc_card *card = codec_dai->codec->card; ++ struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); ++ u32 dai_format; ++ unsigned int channels; ++ unsigned int tx_mask, rx_mask; ++ unsigned int sampling_rate; ++ int ret; ++ ++ ++ sampling_rate = params_rate(params); ++ channels = params_channels(params); ++ pr_debug("%s:%s sampling rate = %u channels = %u \n", __FUNCTION__, ++ (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? "Playback" : "Capture"), ++ sampling_rate, channels); ++ ++ /* set cpu DAI configuration */ ++ dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF | ++ SND_SOC_DAIFMT_CBM_CFM; ++ ++ ret = snd_soc_dai_set_fmt(cpu_dai, dai_format); ++ if (ret < 0) ++ return ret; ++ ++ /* set i.MX active slot mask */ ++ /* S[TR]CCR:DC */ ++ tx_mask = ~((1 << channels) - 1); ++ rx_mask = tx_mask; ++ snd_soc_dai_set_tdm_slot(cpu_dai, tx_mask, rx_mask, 2, 32); ++ ++ /* set codec DAI configuration */ ++ dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBM_CFM; ++ ++ ret = snd_soc_dai_set_fmt(codec_dai, dai_format); ++ if (ret < 0) ++ return ret; ++ ++ ret = snd_soc_dai_set_sysclk(codec_dai, ++ WM8731_SYSCLK_MCLK, ++ data->sysclk, ++ SND_SOC_CLOCK_IN); ++ ++ if (ret < 0) { ++ pr_err("Failed to set codec master clock to %u: %d \n", ++ data->sysclk, ret); ++ return ret; ++ } ++ ++ return 0; ++} ++ + static void imx_hifi_shutdown(struct snd_pcm_substream *substream) + { + struct snd_soc_pcm_runtime *rtd = substream->private_data; +@@ -290,7 +417,7 @@ static void imx_hifi_shutdown(struct snd_pcm_substream *substream) + struct imx_wm8731_data *data = snd_soc_card_get_drvdata(card); + + if (!codec_dai->active) +- wm8731_slv_mode_clock_enable(0,data); ++ data->clock_enable(0,data); + + return; + } +@@ -376,6 +503,27 @@ static int imx_audmux_config_slv_mode(int _slave, int _master) + return 0; + } + ++static int imx_audmux_config_mst_mode(int _slave, int _master) ++{ ++ unsigned int ptcr, pdcr; ++ int slave = _slave - 1; ++ int master = _master - 1; ++ ++ ptcr = IMX_AUDMUX_V2_PTCR_SYN; ++ ptcr |= IMX_AUDMUX_V2_PTCR_TFSDIR | ++ IMX_AUDMUX_V2_PTCR_TFSEL(master) | ++ IMX_AUDMUX_V2_PTCR_TCLKDIR | ++ IMX_AUDMUX_V2_PTCR_TCSEL(master); ++ pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(master); ++ imx_audmux_v2_configure_port(slave, ptcr, pdcr); ++ ++ ptcr = IMX_AUDMUX_V2_PTCR_SYN; ++ pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(slave); ++ imx_audmux_v2_configure_port(master, ptcr, pdcr); ++ ++ return 0; ++} ++ + static int imx_wm8731_probe(struct platform_device *pdev) + { + struct device_node *ssi_np, *codec_np; +@@ -383,6 +531,10 @@ static int imx_wm8731_probe(struct platform_device *pdev) + struct imx_priv *priv = &card_priv; + struct i2c_client *codec_dev; + struct imx_wm8731_data *data; ++ unsigned int src_port, ext_port; ++ unsigned int ssi_mode; ++ const char *ssi_mode_str; ++ + int ret; + + priv->pdev = pdev; +@@ -428,14 +580,44 @@ static int imx_wm8731_probe(struct platform_device *pdev) + data->dai.ops = &imx_hifi_ops; + data->dai.init = &imx_wm8731_init; + +- data->ssi_num = 2; /* 1-based */ +- data->src_port = 2; +- data->ext_port = 4; +- +- imx_audmux_config_slv_mode(data->src_port, data->ext_port); +- +- /* Slave Mode Init */ +- wm8731_slv_mode_init(data); ++ ret = of_property_read_u32(pdev->dev.of_node, "src-port", &src_port); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to get \"src-port\" value\n"); ++ ret = -EINVAL; ++ goto fail; ++ } ++ ++ ret = of_property_read_u32(pdev->dev.of_node, "ext-port", &ext_port); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to get \"ext-port\" value\n"); ++ ret = -EINVAL; ++ goto fail; ++ } ++ ++ ret = of_property_read_string(ssi_np, "fsl,mode", &ssi_mode_str); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to get \"fsl,mode\" value\n"); ++ ret = -EINVAL; ++ goto fail; ++ } ++ ++ ssi_mode = strcmp(ssi_mode_str, "i2s-master"); ++ ++ if (ssi_mode) { ++ /* Master Mode */ ++ imx_audmux_config_mst_mode(src_port, ext_port); ++ wm8731_mst_mode_init(data); ++ data->clock_enable = wm8731_mst_mode_clock_enable; ++ imx_hifi_ops.hw_params = imx_hifi_hw_params_mst_mode; ++ imx_hifi_ops.startup = imx_hifi_startup_mst_mode; ++ } else { ++ /* Slave Mode */ ++ imx_audmux_config_slv_mode(src_port, ext_port); ++ wm8731_slv_mode_init(data); ++ data->clock_enable = wm8731_slv_mode_clock_enable; ++ imx_hifi_ops.hw_params = imx_hifi_hw_params_slv_mode; ++ imx_hifi_ops.startup = imx_hifi_startup_slv_mode; ++ } + + data->card.dev = &pdev->dev; + ret = snd_soc_of_parse_card_name(&data->card, "model"); +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0017-ARM-i.MX6-dts-enable-v4l2-output.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0017-ARM-i.MX6-dts-enable-v4l2-output.patch new file mode 100644 index 00000000..21cbbc30 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0017-ARM-i.MX6-dts-enable-v4l2-output.patch @@ -0,0 +1,31 @@ +From 7b953812d9804bbce9f2b8f21ca5e72229272eb6 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 24 Jul 2014 16:11:29 +0300 +Subject: [PATCH 17/59] ARM: i.MX6: dts: enable v4l2 output + +Enable v4l2 output. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 050795b..2e04224 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -227,6 +227,11 @@ + status = "okay"; + }; + ++ v4l2_out { ++ compatible = "fsl,mxc_v4l2_output"; ++ status = "okay"; ++ }; ++ + }; + + &iomuxc { +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0018-ARM-i.MX6-dts-some-small-changes-in-the-dts-file.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0018-ARM-i.MX6-dts-some-small-changes-in-the-dts-file.patch new file mode 100644 index 00000000..328ac9b9 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0018-ARM-i.MX6-dts-some-small-changes-in-the-dts-file.patch @@ -0,0 +1,52 @@ +From 7cadcbd1a95de480f3412c56f6a3567ba213091a Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 31 Jul 2014 16:27:38 +0300 +Subject: [PATCH 18/59] ARM: i.MX6: dts: some small changes in the dts file + +1) Fixed the color depth value for both frame buffers. +2) Added a missing OTG pinmux definition. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 2e04224..1613c32 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -200,7 +200,7 @@ + disp_dev = "hdmi"; + interface_pix_fmt = "RGB24"; + mode_str ="1920x1080M@60"; +- default_bpp = <24>; ++ default_bpp = <32>; + int_clk = <0>; + late_init = <0>; + status = "disabled"; +@@ -211,12 +211,13 @@ + disp_dev = "lcd"; + interface_pix_fmt = "RGB24"; + mode_str ="1920x1080M@60"; +- default_bpp = <24>; ++ default_bpp = <32>; + int_clk = <0>; + late_init = <0>; + status = "disabled"; + }; + ++ + lcd@0 { + compatible = "fsl,lcd"; + ipu_id = <0>; +@@ -354,6 +355,7 @@ + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 ++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 + >; + }; + +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0019-igb-Define-the-device-mac-address-in-device-tree.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0019-igb-Define-the-device-mac-address-in-device-tree.patch new file mode 100644 index 00000000..39702bff --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0019-igb-Define-the-device-mac-address-in-device-tree.patch @@ -0,0 +1,79 @@ +From da2c6c15b0db7f361b0db50b93b0d2df98ad81a4 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Tue, 5 Aug 2014 15:04:44 +0300 +Subject: [PATCH 19/59] igb: Define the device mac address in device tree + +1) Define the device mac address node in the device tree. +2) Make the driver read the mac address from the device tree node. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 6 ++++++ + drivers/net/ethernet/intel/igb/igb_main.c | 27 +++++++++++++++++++++++++++ + 2 files changed, 33 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 1613c32..0e2558f 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -233,6 +233,12 @@ + status = "okay"; + }; + ++ eth@pcie { ++ compatible = "intel,i211"; ++ local-mac-address = [00 1C 1D 1E 1F 20]; ++ status = "okay"; ++ }; ++ + }; + + &iomuxc { +diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c +index 2472835..5f93765 100644 +--- a/drivers/net/ethernet/intel/igb/igb_main.c ++++ b/drivers/net/ethernet/intel/igb/igb_main.c +@@ -2185,6 +2185,30 @@ static s32 igb_init_i2c(struct igb_adapter *adapter) + return status; + } + ++ ++/** ++ * igb_read_mac_addr_dts - Read mac addres from the device tree ++ * blob ++ * @adapter: pointer to adapter structure ++ **/ ++static void igb_read_mac_addr_dts(struct e1000_hw *hw) ++{ ++ struct device_node *dn; ++ const uint8_t *mac; ++ ++ dn = of_find_compatible_node(NULL, NULL, "intel,i211"); ++ ++ if (!dn) ++ return; ++ ++ mac = of_get_property(dn, "local-mac-address", NULL); ++ ++ if (mac) ++ memcpy(hw->mac.addr, mac, ETH_ALEN); ++ ++ return; ++} ++ + /** + * igb_probe - Device Initialization Routine + * @pdev: PCI device information struct +@@ -2387,6 +2411,9 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + if (hw->mac.ops.read_mac_addr(hw)) + dev_err(&pdev->dev, "NVM Read Error\n"); + ++ if (!is_valid_ether_addr(hw->mac.addr)) ++ igb_read_mac_addr_dts(hw); ++ + if (!is_valid_ether_addr(hw->mac.addr)) { + dev_info(&pdev->dev, "Random MAC Address\n"); + random_ether_addr(hw->mac.addr); +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0020-ARM-i.MX6-cm-fx6-update-defconfig.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0020-ARM-i.MX6-cm-fx6-update-defconfig.patch new file mode 100644 index 00000000..2a455067 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0020-ARM-i.MX6-cm-fx6-update-defconfig.patch @@ -0,0 +1,87 @@ +From 764be38216e273b22671b1f4d2babb47e0dc1d74 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Tue, 5 Aug 2014 15:39:32 +0300 +Subject: [PATCH 20/59] ARM: i.MX6: cm-fx6: update defconfig + +Enable: +1) Analog audio +2) MRVL bluetooth +3) SATA AHCI +4) USB OTG +5) Board revision + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/configs/cm_fx6_defconfig | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/arch/arm/configs/cm_fx6_defconfig b/arch/arm/configs/cm_fx6_defconfig +index eb6d9cb..210062b 100644 +--- a/arch/arm/configs/cm_fx6_defconfig ++++ b/arch/arm/configs/cm_fx6_defconfig +@@ -26,6 +26,7 @@ CONFIG_SOC_IMX53=y + CONFIG_SOC_IMX6Q=y + CONFIG_SOC_IMX6SL=y + CONFIG_SOC_VF610=y ++CONFIG_MACH_CM_FX6=y + # CONFIG_SWP_EMULATE is not set + CONFIG_PCI=y + CONFIG_PCI_IMX6=y +@@ -137,6 +138,9 @@ CONFIG_VLAN_8021Q=m + CONFIG_VLAN_8021Q_GVRP=y + CONFIG_CAN=y + CONFIG_CAN_FLEXCAN=y ++CONFIG_BT=m ++CONFIG_BT_MRVL=m ++CONFIG_BT_MRVL_SDIO=m + CONFIG_CFG80211=y + CONFIG_CFG80211_WEXT=y + CONFIG_MAC80211=y +@@ -176,6 +180,7 @@ CONFIG_SCSI_LOGGING=y + CONFIG_SCSI_SCAN_ASYNC=y + # CONFIG_SCSI_LOWLEVEL is not set + CONFIG_ATA=y ++CONFIG_SATA_AHCI=y + CONFIG_SATA_AHCI_PLATFORM=y + CONFIG_AHCI_IMX=y + CONFIG_PATA_IMX=y +@@ -251,6 +256,7 @@ CONFIG_MFD_MC13XXX_I2C=y + CONFIG_MFD_MAX17135=y + CONFIG_MFD_SI476X_CORE=y + CONFIG_REGULATOR=y ++CONFIG_REGULATOR_DUMMY=y + CONFIG_REGULATOR_FIXED_VOLTAGE=y + CONFIG_REGULATOR_DA9052=y + CONFIG_REGULATOR_ANATOP=y +@@ -310,6 +316,7 @@ CONFIG_SND_SOC=y + CONFIG_SND_IMX_SOC=y + CONFIG_SND_SOC_EUKREA_TLV320=y + CONFIG_SND_SOC_IMX_CS42888=y ++CONFIG_SND_SOC_IMX_WM8731=y + CONFIG_SND_SOC_IMX_WM8962=y + CONFIG_SND_SOC_IMX_SGTL5000=y + CONFIG_SND_SOC_IMX_SPDIF=y +@@ -317,7 +324,10 @@ CONFIG_SND_SOC_IMX_MC13783=y + CONFIG_SND_SOC_IMX_HDMI=y + CONFIG_SND_SOC_IMX_SI476X=y + CONFIG_USB=y ++CONFIG_USB_OTG=y + CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_MXC=y ++CONFIG_USB_EHCI_HCD_PLATFORM=y + CONFIG_USB_STORAGE=y + CONFIG_USB_CHIPIDEA=y + CONFIG_USB_CHIPIDEA_UDC=y +@@ -326,7 +336,9 @@ CONFIG_USB_PHY=y + CONFIG_NOP_USB_XCEIV=y + CONFIG_USB_MXS_PHY=y + CONFIG_USB_GADGET=y ++CONFIG_USB_FSL_USB2=y + CONFIG_USB_ZERO=m ++CONFIG_USB_AUDIO=m + CONFIG_USB_ETH=m + CONFIG_USB_MASS_STORAGE=m + CONFIG_USB_G_SERIAL=m +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0021-ARM-i.MX6-dts-refactoring-the-cm-fx6-device-tree-fil.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0021-ARM-i.MX6-dts-refactoring-the-cm-fx6-device-tree-fil.patch new file mode 100644 index 00000000..4bfa1bda --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0021-ARM-i.MX6-dts-refactoring-the-cm-fx6-device-tree-fil.patch @@ -0,0 +1,1112 @@ +From a2cdd3f7524d4336e5a704d42b85503a7ab3f543 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 7 Aug 2014 15:30:03 +0300 +Subject: [PATCH 21/59] ARM: i.MX6: dts: refactoring the cm-fx6 device tree + file. + +Separate the staff that belongs to SB-FX6 and SB-FX6m boards. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 880 ++++++++++++++++------------------ + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 23 + + arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 83 ++++ + 3 files changed, 516 insertions(+), 470 deletions(-) + create mode 100644 arch/arm/boot/dts/imx6q-sbc-fx6.dts + create mode 100644 arch/arm/boot/dts/imx6q-sbc-fx6m.dts + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 0e2558f..fa32c57 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -15,158 +15,147 @@ + #include "imx6q.dtsi" + + / { +- model = "CompuLab CM-FX6"; +- compatible = "compulab,cm-fx6", "fsl,imx6q"; +- +- memory { +- reg = <0x10000000 0x80000000>; +- }; +- +- leds { +- compatible = "gpio-leds"; +- +- heartbeat-led { +- label = "Heartbeat"; +- gpios = <&gpio2 31 0>; +- linux,default-trigger = "heartbeat"; +- }; +- }; +- +- regulators { +- compatible = "simple-bus"; +- #address-cells = <1>; +- #size-cells = <0>; +- +- /* regulator for mmc */ +- reg_3p3v: 3p3v { +- compatible = "regulator-fixed"; +- regulator-name = "3P3V"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-always-on; +- }; +- +- /* regulator for usb otg */ +- reg_usb_otg_vbus: usb_otg_vbus { +- compatible = "regulator-fixed"; +- regulator-name = "usb_otg_vbus"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- gpio = <&gpio3 22 0>; +- enable-active-high; +- }; +- +- /* regulator for usb hub1 */ +- reg_usb_h1_vbus: usb_h1_vbus { +- compatible = "regulator-fixed"; +- regulator-name = "usb_h1_vbus"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- gpio = <&gpio7 8 0>; +- enable-active-high; +- }; +- +- /* regulator1 for wifi/bt */ +- awnh387_npoweron: regulator-awnh387-npoweron { +- compatible = "regulator-fixed"; +- regulator-name = "regulator-awnh387-npoweron"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio7 12 0>; +- enable-active-high; +- }; +- +- /* regulator2 for wifi/bt */ +- awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { +- compatible = "regulator-fixed"; +- regulator-name = "regulator-awnh387-wifi-nreset"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio6 16 0>; +- startup-delay-us = <10000>; +- }; +- +- reg_sata_phy_slp: sata_phy_slp { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_phy_slp"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio3 23 0>; +- startup-delay-us = <100>; +- enable-active-high; +- }; +- +- reg_sata_nrstdly: sata_nrstdly { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_nrstdly"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio6 6 0>; +- startup-delay-us = <100>; +- enable-active-high; +- vin-supply = <®_sata_phy_slp>; +- }; +- +- reg_sata_pwren: sata_pwren { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_pwren"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio1 28 0>; +- startup-delay-us = <100>; +- enable-active-high; +- vin-supply = <®_sata_nrstdly>; +- }; +- +- reg_sata_nstandby1: sata_nstandby1 { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_nstandby1"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio3 20 0>; +- startup-delay-us = <100>; +- enable-active-high; +- vin-supply = <®_sata_pwren>; +- }; +- +- reg_sata_nstandby2: sata_nstandby2 { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_nstandby2"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio5 2 0>; +- startup-delay-us = <100>; +- enable-active-high; +- vin-supply = <®_sata_nstandby1>; +- }; +- +- reg_sata_ldo_en: sata_ldo_en { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_ldo_en"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio2 16 0>; +- startup-delay-us = <100>; +- enable-active-high; +- regulator-boot-on; +- vin-supply = <®_sata_nstandby2>; +- }; +- }; +- +- gpio-keys { +- compatible = "gpio-keys"; +- power { +- label = "Power Button"; +- gpios = <&gpio1 29 1>; +- linux,code = <116>; /* KEY_POWER */ +- gpio-key,wakeup; ++ model = "CompuLab CM-FX6"; ++ compatible = "compulab,cm-fx6", "fsl,imx6q"; ++ ++ memory { ++ reg = <0x10000000 0x80000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ heartbeat-led { ++ label = "Heartbeat"; ++ gpios = <&gpio2 31 0>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* regulator for mmc */ ++ reg_3p3v: 3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ ++ /* regulator for usb otg */ ++ reg_usb_otg_vbus: usb_otg_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_otg_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio3 22 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator for usb hub1 */ ++ reg_usb_h1_vbus: usb_h1_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_h1_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio7 8 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator1 for wifi/bt */ ++ awnh387_npoweron: regulator-awnh387-npoweron { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-awnh387-npoweron"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio7 12 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator2 for wifi/bt */ ++ awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-awnh387-wifi-nreset"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio6 16 0>; ++ startup-delay-us = <10000>; ++ }; ++ ++ reg_sata_phy_slp: sata_phy_slp { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_phy_slp"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 23 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ }; ++ ++ reg_sata_nrstdly: sata_nrstdly { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nrstdly"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio6 6 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_phy_slp>; ++ }; ++ ++ reg_sata_pwren: sata_pwren { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_pwren"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio1 28 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_nrstdly>; ++ }; ++ ++ reg_sata_nstandby1: sata_nstandby1 { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nstandby1"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 20 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_pwren>; ++ }; ++ ++ reg_sata_nstandby2: sata_nstandby2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nstandby2"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio5 2 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_nstandby1>; ++ }; ++ ++ reg_sata_ldo_en: sata_ldo_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_ldo_en"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio2 16 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ regulator-boot-on; ++ vin-supply = <®_sata_nstandby2>; ++ }; + }; +- }; + +- aliases { +- mxcfb0 = &mxcfb1; +- mxcfb1 = &mxcfb2; +- }; ++ aliases { ++ mxcfb0 = &mxcfb1; ++ mxcfb1 = &mxcfb2; ++ }; + + sound { + compatible = "fsl,imx6q-cm-fx6-wm8731", +@@ -179,66 +168,58 @@ + audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; + }; + +- sound-hdmi { +- compatible = "fsl,imx6q-audio-hdmi", +- "fsl,imx-audio-hdmi"; +- model = "imx-audio-hdmi"; +- hdmi-controller = <&hdmi_audio>; +- }; +- +- sound-spdif { +- compatible = "fsl,imx-audio-spdif", +- "fsl,imx-sabreauto-spdif"; +- model = "imx-spdif"; +- spdif-controller = <&spdif>; +- spdif-out; +- spdif-in; +- }; +- +- mxcfb1: fb@0 { +- compatible = "fsl,mxc_sdc_fb"; +- disp_dev = "hdmi"; +- interface_pix_fmt = "RGB24"; +- mode_str ="1920x1080M@60"; +- default_bpp = <32>; +- int_clk = <0>; +- late_init = <0>; +- status = "disabled"; +- }; +- +- mxcfb2: fb@1 { +- compatible = "fsl,mxc_sdc_fb"; +- disp_dev = "lcd"; +- interface_pix_fmt = "RGB24"; +- mode_str ="1920x1080M@60"; +- default_bpp = <32>; +- int_clk = <0>; +- late_init = <0>; +- status = "disabled"; +- }; +- +- +- lcd@0 { +- compatible = "fsl,lcd"; +- ipu_id = <0>; +- disp_id = <0>; +- default_ifmt = "RGB24"; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_ipu1_1>; +- status = "okay"; +- }; ++ sound-hdmi { ++ compatible = "fsl,imx6q-audio-hdmi", ++ "fsl,imx-audio-hdmi"; ++ model = "imx-audio-hdmi"; ++ hdmi-controller = <&hdmi_audio>; ++ }; + +- v4l2_out { +- compatible = "fsl,mxc_v4l2_output"; +- status = "okay"; +- }; ++ sound-spdif { ++ compatible = "fsl,imx-audio-spdif", ++ "fsl,imx-sabreauto-spdif"; ++ model = "imx-spdif"; ++ spdif-controller = <&spdif>; ++ spdif-out; ++ spdif-in; ++ }; + +- eth@pcie { +- compatible = "intel,i211"; +- local-mac-address = [00 1C 1D 1E 1F 20]; +- status = "okay"; +- }; ++ mxcfb1: fb@0 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "hdmi"; ++ interface_pix_fmt = "RGB24"; ++ mode_str ="1920x1080M@60"; ++ default_bpp = <32>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ ++ mxcfb2: fb@1 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "lcd"; ++ interface_pix_fmt = "RGB24"; ++ mode_str ="1920x1080M@60"; ++ default_bpp = <32>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ ++ lcd@0 { ++ compatible = "fsl,lcd"; ++ ipu_id = <0>; ++ disp_id = <0>; ++ default_ifmt = "RGB24"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ipu1_1>; ++ status = "okay"; ++ }; + ++ v4l2_out { ++ compatible = "fsl,mxc_v4l2_output"; ++ status = "okay"; ++ }; + }; + + &iomuxc { +@@ -258,261 +239,240 @@ + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 + MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 + MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 ++ /* POWER_BUTTON */ ++ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 + >; + }; + }; + +- imx6q-cm-fx6 { +- /* pins for eth0 */ +- pinctrl_enet: enetgrp { +- fsl,pins = < +- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 +- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 +- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 +- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 +- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 +- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 +- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 +- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 +- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 +- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 +- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 +- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 +- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 +- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 +- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 +- >; +- }; ++ imx6q-cm-fx6 { ++ /* pins for eth0 */ ++ pinctrl_enet: enetgrp { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ++ >; ++ }; + +- /* pins for spi */ +- pinctrl_ecspi1: ecspi1grp { +- fsl,pins = < +- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 +- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 +- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 +- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 +- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 +- >; +- }; +- +- /* pins for nand */ +- pinctrl_gpmi_nand: gpminandgrp { +- fsl,pins = < +- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 +- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 +- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 +- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 +- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 +- MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 +- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 +- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 +- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 +- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 +- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 +- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 +- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 +- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 +- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 +- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 +- MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 +- >; +- }; +- +- /* pins for i2c1 */ +- pinctrl_i2c1: i2c1grp { +- fsl,pins = < +- MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 +- MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 +- >; +- }; ++ /* pins for spi */ ++ pinctrl_ecspi1: ecspi1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 ++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 ++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 ++ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 ++ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 ++ >; ++ }; ++ ++ /* pins for nand */ ++ pinctrl_gpmi_nand: gpminandgrp { ++ fsl,pins = < ++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 ++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 ++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 ++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 ++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 ++ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 ++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 ++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 ++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 ++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 ++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 ++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 ++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 ++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 ++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 ++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 ++ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 ++ >; ++ }; ++ ++ /* pins for i2c1 */ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 ++ >; ++ }; + +- /* pins for i2c2 */ +- pinctrl_i2c2: i2c2grp { +- fsl,pins = < +- MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 +- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 +- >; +- }; ++ /* pins for i2c2 */ ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; + +- /* pins for i2c3 */ +- pinctrl_i2c3: i2c3grp { +- fsl,pins = < +- MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 +- MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 +- >; +- }; +- +- /* pins for console */ +- pinctrl_uart4: uart4grp { +- fsl,pins = < +- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 +- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 +- >; +- }; ++ /* pins for i2c3 */ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for console */ ++ pinctrl_uart4: uart4grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 ++ >; ++ }; + +- /* pins for usb hub1 */ +- pinctrl_usbh1: usbh1grp { +- fsl,pins = < +- MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 +- >; +- }; ++ /* pins for usb hub1 */ ++ pinctrl_usbh1: usbh1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 ++ >; ++ }; + +- /* pins for usb otg */ +- pinctrl_usbotg: usbotggrp { +- fsl,pins = < +- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 +- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 +- >; +- }; +- +- /* pins for wifi/bt */ +- pinctrl_usdhc1: usdhc1grp { +- fsl,pins = < +- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 +- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 +- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 +- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 +- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 +- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 +- >; +- }; +- +- /* pins for mmc */ +- pinctrl_usdhc3: usdhc3grp { +- fsl,pins = < +- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 +- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 +- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 +- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 +- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 +- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 +- >; +- }; +- +- /* pins for spdif */ +- pinctrl_spdif: spdifgrp { +- fsl,pins = < +- MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 +- MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 +- >; +- }; +- +- /* pins for audmux */ +- pinctrl_audmux: audmuxgrp { +- fsl,pins = < +- MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 +- MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 +- MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 +- MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 +- MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 +- /* master mode pin */ +- MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 +- >; +- }; ++ /* pins for usb otg */ ++ pinctrl_usbotg: usbotggrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 ++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 ++ >; ++ }; + +- /* pins for uart2 */ +- pinctrl_uart2: uart2grp { +- fsl,pins = < +- MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 +- MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 +- MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 +- MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 +- >; +- }; ++ /* pins for wifi/bt */ ++ pinctrl_usdhc1: usdhc1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 ++ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 ++ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 ++ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 ++ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 ++ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 ++ >; ++ }; ++ ++ /* pins for mmc */ ++ pinctrl_usdhc3: usdhc3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ >; ++ }; ++ ++ /* pins for spdif */ ++ pinctrl_spdif: spdifgrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 ++ MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 ++ >; ++ }; + +- /* pins for pcie */ +- pinctrl_pcie: pciegrp { +- fsl,pins = < +- MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 +- MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 +- >; +- }; +- }; ++ /* pins for audmux */ ++ pinctrl_audmux: audmuxgrp { ++ fsl,pins = < ++ MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 ++ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 ++ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 ++ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 ++ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 ++ /* master mode pin */ ++ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 ++ >; ++ }; ++ }; + }; + + /* spi */ + &ecspi1 { +- fsl,spi-num-chipselects = <2>; +- cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_ecspi1>; +- status = "okay"; +- +- flash: m25p80@0 { +- #address-cells = <1>; +- #size-cells = <1>; +- compatible = "st,m25px16", "st,m25p"; +- spi-max-frequency = <20000000>; +- reg = <0>; +- +- partition@0 { +- label = "uboot"; +- reg = <0x0 0xc0000>; +- }; +- +- partition@c0000 { +- label = "uboot environment"; +- reg = <0xc0000 0x40000>; +- }; +- +- partition@100000 { +- label = "reserved"; +- reg = <0x100000 0x100000>; +- }; +- }; ++ fsl,spi-num-chipselects = <2>; ++ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi1>; ++ status = "okay"; ++ ++ flash: m25p80@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "st,m25px16", "st,m25p"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ ++ partition@0 { ++ label = "uboot"; ++ reg = <0x0 0xc0000>; ++ }; ++ ++ partition@c0000 { ++ label = "uboot environment"; ++ reg = <0xc0000 0x40000>; ++ }; ++ ++ partition@100000 { ++ label = "reserved"; ++ reg = <0x100000 0x100000>; ++ }; ++ }; + }; + + /* eth0 */ + &fec { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_enet>; +- phy-mode = "rgmii"; +- status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_enet>; ++ phy-mode = "rgmii"; ++ status = "okay"; + }; + + /* nand */ + &gpmi { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_gpmi_nand>; +- status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpmi_nand>; ++ status = "okay"; + }; + + /* i2c1 */ + &i2c1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c1>; +- status = "okay"; +- +- eeprom@50 { +- compatible = "at24,24c02"; +- reg = <0x50>; +- pagesize = <16>; +- }; +- +- rtc@56 { +- compatible = "emmicro,em3027"; +- reg = <0x56>; +- }; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ status = "okay"; ++ ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; + }; + + /* i2c2 */ +-&i2c2 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c2>; +- /* status = "okay"; */ ++&i2c2 { /* to be removed */ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c2>; ++ /* status = "okay"; */ + }; + + /* i2c3 */ + &i2c3 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c3>; +- status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "okay"; + +- eeprom@50 { +- compatible = "at24,24c02"; +- reg = <0x50>; +- pagesize = <16>; +- }; ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; + + codec: wm8731@1a { + compatible = "wlf,wm8731"; +@@ -526,71 +486,51 @@ + }; + }; + +-/* eth1 */ +-&pcie { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_pcie>; +- reset-gpio = <&gpio1 26 0>; +- power-on-gpio = <&gpio2 24 0>; +- status = "okay"; +-}; +- + /* sata */ + &sata { +- status = "okay"; +-}; +- +-/* rear serial console */ +-&uart2 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart2>; +- /* fsl,dte-mode; */ +- fsl,uart-has-rtscts; +- dma-names = "rx", "tx"; +- dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; +- status = "okay"; ++ status = "okay"; + }; + + /* console */ + &uart4 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart4>; +- status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart4>; ++ status = "okay"; + }; + + /* usb otg */ + &usbotg { +- vbus-supply = <®_usb_otg_vbus>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usbotg>; +- dr_mode = "otg"; +- status = "okay"; ++ vbus-supply = <®_usb_otg_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg>; ++ dr_mode = "otg"; ++ status = "okay"; + }; + + /* usb hub1 */ + &usbh1 { +- vbus-supply = <®_usb_h1_vbus>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usbh1>; +- status = "okay"; ++ vbus-supply = <®_usb_h1_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbh1>; ++ status = "okay"; + }; + + /* wifi/bt */ + &usdhc1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usdhc1>; +- non-removable; +- vmmc-supply = <&awnh387_npoweron>; +- vmmc_aux-supply = <&awnh387_wifi_nreset>; +- status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc1>; ++ non-removable; ++ vmmc-supply = <&awnh387_npoweron>; ++ vmmc_aux-supply = <&awnh387_wifi_nreset>; ++ status = "okay"; + }; + + /* mmc */ + &usdhc3 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usdhc3>; +- vmmc-supply = <®_3p3v>; +- status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc3>; ++ vmmc-supply = <®_3p3v>; ++ status = "okay"; + }; + + &ssi2 { +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +new file mode 100644 +index 0000000..5d3c7da +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -0,0 +1,23 @@ ++/* ++* Copyright 2014 CompuLab Ltd. ++* ++* Author: Valentin Raevsky <valentin@compulab.co.il> ++* ++* The code contained herein is licensed under the GNU General Public ++* License. You may obtain a copy of the GNU General Public License ++* Version 2 or later at the following locations: ++* ++* http://www.opensource.org/licenses/gpl-license.html ++* http://www.gnu.org/copyleft/gpl.html ++*/ ++ ++#include "imx6q-cm-fx6.dts" ++ ++/ { ++ model = "CompuLab CM-FX6 on SBC-FX6"; ++ compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; ++}; ++ ++&pcie { ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +new file mode 100644 +index 0000000..0e76f02 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +@@ -0,0 +1,83 @@ ++/* ++* Copyright 2014 CompuLab Ltd. ++* ++* Author: Valentin Raevsky <valentin@compulab.co.il> ++* ++* The code contained herein is licensed under the GNU General Public ++* License. You may obtain a copy of the GNU General Public License ++* Version 2 or later at the following locations: ++* ++* http://www.opensource.org/licenses/gpl-license.html ++* http://www.gnu.org/copyleft/gpl.html ++*/ ++ ++#include "imx6q-cm-fx6.dts" ++ ++/ { ++ model = "CompuLab CM-FX6 on SBC-FX6m"; ++ compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q"; ++ ++ eth@pcie { ++ compatible = "intel,i211"; ++ local-mac-address = [FF FF FF FF FF FF]; ++ status = "okay"; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ power { ++ label = "Power Button"; ++ gpios = <&gpio1 29 1>; ++ linux,code = <116>; /* KEY_POWER */ ++ gpio-key,wakeup; ++ }; ++ }; ++}; ++ ++&iomuxc { ++ imx6q-sb-fx6m { ++ /* pins for uart2 */ ++ pinctrl_uart2: uart2grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 ++ >; ++ }; ++ ++ /* pins for pcie */ ++ pinctrl_pcie: pciegrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 ++ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 ++ >; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ rtc@56 { ++ compatible = "emmicro,em3027"; ++ reg = <0x56>; ++ }; ++}; ++ ++&pcie { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie>; ++ reset-gpio = <&gpio1 26 0>; ++ power-on-gpio = <&gpio2 24 0>; ++ status = "okay"; ++}; ++ ++/* rear serial console */ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart2>; ++ /* fsl,dte-mode; */ ++ fsl,uart-has-rtscts; ++ dma-names = "rx", "tx"; ++ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; ++ status = "okay"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch new file mode 100644 index 00000000..f9986338 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch @@ -0,0 +1,1422 @@ +From 0597ee45b5a7b0491977b7b91745c24a0406783f Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Tue, 12 Aug 2014 17:46:23 +0300 +Subject: [PATCH 22/59] ARM: i.MX6: dts: refactoring of the cm-fx6 device tree + files. + +Refactoring device tree files: +1) Utilite: ++ imx6q.dtsi ++ imx6q-sb-fx6x.dtsi ++ imx6q-sb-fx6m.dtsi ++ imx6q-cm-fx6.dtsi += imx6q-sbc-fx6m.dts + +2) CM-FX6-EVAL: ++ imx6q.dtsi ++ imx6q-sb-fx6x.dtsi ++ imx6q-sb-fx6.dtsi ++ imx6q-cm-fx6.dtsi += imx6q-sbc-fx6.dts + +3) CM-FX6 Module: ++ imx6q.dtsi ++ imx6q-cm-fx6.dtsi += imx6q-cm-fx6.dts + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 582 +--------------------------------- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 531 +++++++++++++++++++++++++++++++ + arch/arm/boot/dts/imx6q-sb-fx6.dtsi | 14 + + arch/arm/boot/dts/imx6q-sb-fx6m.dtsi | 32 ++ + arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 75 +++++ + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 8 +- + arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 38 +-- + 7 files changed, 677 insertions(+), 603 deletions(-) + create mode 100644 arch/arm/boot/dts/imx6q-cm-fx6.dtsi + create mode 100644 arch/arm/boot/dts/imx6q-sb-fx6.dtsi + create mode 100644 arch/arm/boot/dts/imx6q-sb-fx6m.dtsi + create mode 100644 arch/arm/boot/dts/imx6q-sb-fx6x.dtsi + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index fa32c57..a0e423b 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -1,576 +1,20 @@ + /* +-* Copyright 2013 CompuLab Ltd. +-* +-* Author: Valentin Raevsky <valentin@compulab.co.il> +-* +-* The code contained herein is licensed under the GNU General Public +-* License. You may obtain a copy of the GNU General Public License +-* Version 2 or later at the following locations: +-* +-* http://www.opensource.org/licenses/gpl-license.html +-* http://www.gnu.org/copyleft/gpl.html +-*/ ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky <valentin@compulab.co.il> ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ + + /dts-v1/; +-#include "imx6q.dtsi" ++#include "imx6q-cm-fx6.dtsi" + + / { + model = "CompuLab CM-FX6"; + compatible = "compulab,cm-fx6", "fsl,imx6q"; +- +- memory { +- reg = <0x10000000 0x80000000>; +- }; +- +- leds { +- compatible = "gpio-leds"; +- heartbeat-led { +- label = "Heartbeat"; +- gpios = <&gpio2 31 0>; +- linux,default-trigger = "heartbeat"; +- }; +- }; +- +- regulators { +- compatible = "simple-bus"; +- #address-cells = <1>; +- #size-cells = <0>; +- +- /* regulator for mmc */ +- reg_3p3v: 3p3v { +- compatible = "regulator-fixed"; +- regulator-name = "3P3V"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-always-on; +- }; +- +- /* regulator for usb otg */ +- reg_usb_otg_vbus: usb_otg_vbus { +- compatible = "regulator-fixed"; +- regulator-name = "usb_otg_vbus"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- gpio = <&gpio3 22 0>; +- enable-active-high; +- }; +- +- /* regulator for usb hub1 */ +- reg_usb_h1_vbus: usb_h1_vbus { +- compatible = "regulator-fixed"; +- regulator-name = "usb_h1_vbus"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- gpio = <&gpio7 8 0>; +- enable-active-high; +- }; +- +- /* regulator1 for wifi/bt */ +- awnh387_npoweron: regulator-awnh387-npoweron { +- compatible = "regulator-fixed"; +- regulator-name = "regulator-awnh387-npoweron"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio7 12 0>; +- enable-active-high; +- }; +- +- /* regulator2 for wifi/bt */ +- awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { +- compatible = "regulator-fixed"; +- regulator-name = "regulator-awnh387-wifi-nreset"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio6 16 0>; +- startup-delay-us = <10000>; +- }; +- +- reg_sata_phy_slp: sata_phy_slp { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_phy_slp"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio3 23 0>; +- startup-delay-us = <100>; +- enable-active-high; +- }; +- +- reg_sata_nrstdly: sata_nrstdly { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_nrstdly"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio6 6 0>; +- startup-delay-us = <100>; +- enable-active-high; +- vin-supply = <®_sata_phy_slp>; +- }; +- +- reg_sata_pwren: sata_pwren { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_pwren"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio1 28 0>; +- startup-delay-us = <100>; +- enable-active-high; +- vin-supply = <®_sata_nrstdly>; +- }; +- +- reg_sata_nstandby1: sata_nstandby1 { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_nstandby1"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio3 20 0>; +- startup-delay-us = <100>; +- enable-active-high; +- vin-supply = <®_sata_pwren>; +- }; +- +- reg_sata_nstandby2: sata_nstandby2 { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_nstandby2"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio5 2 0>; +- startup-delay-us = <100>; +- enable-active-high; +- vin-supply = <®_sata_nstandby1>; +- }; +- +- reg_sata_ldo_en: sata_ldo_en { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_ldo_en"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio2 16 0>; +- startup-delay-us = <100>; +- enable-active-high; +- regulator-boot-on; +- vin-supply = <®_sata_nstandby2>; +- }; +- }; +- +- aliases { +- mxcfb0 = &mxcfb1; +- mxcfb1 = &mxcfb2; +- }; +- +- sound { +- compatible = "fsl,imx6q-cm-fx6-wm8731", +- "fsl,imx-audio-wm8731"; +- model = "wm8731-audio"; +- ssi-controller = <&ssi2>; +- src-port = <2>; +- ext-port = <4>; +- audio-codec = <&codec>; +- audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; +- }; +- +- sound-hdmi { +- compatible = "fsl,imx6q-audio-hdmi", +- "fsl,imx-audio-hdmi"; +- model = "imx-audio-hdmi"; +- hdmi-controller = <&hdmi_audio>; +- }; +- +- sound-spdif { +- compatible = "fsl,imx-audio-spdif", +- "fsl,imx-sabreauto-spdif"; +- model = "imx-spdif"; +- spdif-controller = <&spdif>; +- spdif-out; +- spdif-in; +- }; +- +- mxcfb1: fb@0 { +- compatible = "fsl,mxc_sdc_fb"; +- disp_dev = "hdmi"; +- interface_pix_fmt = "RGB24"; +- mode_str ="1920x1080M@60"; +- default_bpp = <32>; +- int_clk = <0>; +- late_init = <0>; +- status = "disabled"; +- }; +- +- mxcfb2: fb@1 { +- compatible = "fsl,mxc_sdc_fb"; +- disp_dev = "lcd"; +- interface_pix_fmt = "RGB24"; +- mode_str ="1920x1080M@60"; +- default_bpp = <32>; +- int_clk = <0>; +- late_init = <0>; +- status = "disabled"; +- }; +- +- lcd@0 { +- compatible = "fsl,lcd"; +- ipu_id = <0>; +- disp_id = <0>; +- default_ifmt = "RGB24"; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_ipu1_1>; +- status = "okay"; +- }; +- +- v4l2_out { +- compatible = "fsl,mxc_v4l2_output"; +- status = "okay"; +- }; +-}; +- +-&iomuxc { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_hog>; +- +- hog { +- pinctrl_hog: hoggrp { +- fsl,pins = < +- /* SATA PWR */ +- MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 +- MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 +- MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 +- MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 +- /* SATA CTRL */ +- MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 +- MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 +- MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 +- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 +- /* POWER_BUTTON */ +- MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 +- >; +- }; +- }; +- +- imx6q-cm-fx6 { +- /* pins for eth0 */ +- pinctrl_enet: enetgrp { +- fsl,pins = < +- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 +- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 +- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 +- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 +- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 +- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 +- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 +- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 +- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 +- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 +- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 +- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 +- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 +- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 +- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 +- >; +- }; +- +- /* pins for spi */ +- pinctrl_ecspi1: ecspi1grp { +- fsl,pins = < +- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 +- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 +- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 +- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 +- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 +- >; +- }; +- +- /* pins for nand */ +- pinctrl_gpmi_nand: gpminandgrp { +- fsl,pins = < +- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 +- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 +- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 +- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 +- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 +- MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 +- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 +- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 +- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 +- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 +- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 +- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 +- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 +- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 +- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 +- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 +- MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 +- >; +- }; +- +- /* pins for i2c1 */ +- pinctrl_i2c1: i2c1grp { +- fsl,pins = < +- MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 +- MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 +- >; +- }; +- +- /* pins for i2c2 */ +- pinctrl_i2c2: i2c2grp { +- fsl,pins = < +- MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 +- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 +- >; +- }; +- +- /* pins for i2c3 */ +- pinctrl_i2c3: i2c3grp { +- fsl,pins = < +- MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 +- MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 +- >; +- }; +- +- /* pins for console */ +- pinctrl_uart4: uart4grp { +- fsl,pins = < +- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 +- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 +- >; +- }; +- +- /* pins for usb hub1 */ +- pinctrl_usbh1: usbh1grp { +- fsl,pins = < +- MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 +- >; +- }; +- +- /* pins for usb otg */ +- pinctrl_usbotg: usbotggrp { +- fsl,pins = < +- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 +- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 +- >; +- }; +- +- /* pins for wifi/bt */ +- pinctrl_usdhc1: usdhc1grp { +- fsl,pins = < +- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 +- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 +- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 +- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 +- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 +- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 +- >; +- }; +- +- /* pins for mmc */ +- pinctrl_usdhc3: usdhc3grp { +- fsl,pins = < +- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 +- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 +- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 +- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 +- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 +- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 +- >; +- }; +- +- /* pins for spdif */ +- pinctrl_spdif: spdifgrp { +- fsl,pins = < +- MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 +- MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 +- >; +- }; +- +- /* pins for audmux */ +- pinctrl_audmux: audmuxgrp { +- fsl,pins = < +- MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 +- MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 +- MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 +- MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 +- MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 +- /* master mode pin */ +- MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 +- >; +- }; +- }; +-}; +- +-/* spi */ +-&ecspi1 { +- fsl,spi-num-chipselects = <2>; +- cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_ecspi1>; +- status = "okay"; +- +- flash: m25p80@0 { +- #address-cells = <1>; +- #size-cells = <1>; +- compatible = "st,m25px16", "st,m25p"; +- spi-max-frequency = <20000000>; +- reg = <0>; +- +- partition@0 { +- label = "uboot"; +- reg = <0x0 0xc0000>; +- }; +- +- partition@c0000 { +- label = "uboot environment"; +- reg = <0xc0000 0x40000>; +- }; +- +- partition@100000 { +- label = "reserved"; +- reg = <0x100000 0x100000>; +- }; +- }; +-}; +- +-/* eth0 */ +-&fec { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_enet>; +- phy-mode = "rgmii"; +- status = "okay"; +-}; +- +-/* nand */ +-&gpmi { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_gpmi_nand>; +- status = "okay"; +-}; +- +-/* i2c1 */ +-&i2c1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c1>; +- status = "okay"; +- +- eeprom@50 { +- compatible = "at24,24c02"; +- reg = <0x50>; +- pagesize = <16>; +- }; +-}; +- +-/* i2c2 */ +-&i2c2 { /* to be removed */ +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c2>; +- /* status = "okay"; */ +-}; +- +-/* i2c3 */ +-&i2c3 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c3>; +- status = "okay"; +- +- eeprom@50 { +- compatible = "at24,24c02"; +- reg = <0x50>; +- pagesize = <16>; +- }; +- +- codec: wm8731@1a { +- compatible = "wlf,wm8731"; +- reg = <0x1a>; +- clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>; +- clock-names = "pll4", "imx-ssi.1", "cko", "cko2"; +- AVDD-supply = <&pu_dummy>; +- HPVDD-supply = <&pu_dummy>; +- DCVDD-supply = <&pu_dummy>; +- DBVDD-supply = <&pu_dummy>; +- }; +-}; +- +-/* sata */ +-&sata { +- status = "okay"; +-}; +- +-/* console */ +-&uart4 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart4>; +- status = "okay"; +-}; +- +-/* usb otg */ +-&usbotg { +- vbus-supply = <®_usb_otg_vbus>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usbotg>; +- dr_mode = "otg"; +- status = "okay"; +-}; +- +-/* usb hub1 */ +-&usbh1 { +- vbus-supply = <®_usb_h1_vbus>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usbh1>; +- status = "okay"; +-}; +- +-/* wifi/bt */ +-&usdhc1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usdhc1>; +- non-removable; +- vmmc-supply = <&awnh387_npoweron>; +- vmmc_aux-supply = <&awnh387_wifi_nreset>; +- status = "okay"; +-}; +- +-/* mmc */ +-&usdhc3 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usdhc3>; +- vmmc-supply = <®_3p3v>; +- status = "okay"; +-}; +- +-&ssi2 { +- fsl,mode = "i2s-master"; +- status = "okay"; +-}; +- +-&mxcfb1 { +- status = "okay"; +-}; +- +-&mxcfb2 { +- status = "okay"; +-}; +- +-&hdmi_core { +- ipu_id = <1>; +- disp_id = <0>; +- status = "okay"; +-}; +- +-&hdmi_video { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; +- fsl,hdcp; +- status = "okay"; +-}; +- +-&hdmi_audio { +- status = "okay"; +-}; +- +-&spdif { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_spdif>; +- status = "okay"; +-}; +- +-&audmux { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_audmux>; +- status = "okay"; +-}; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +new file mode 100644 +index 0000000..0aa4461 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -0,0 +1,531 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky <valentin@compulab.co.il> ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++#include "imx6q.dtsi" ++ ++/ { ++ memory { ++ reg = <0x10000000 0x80000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ heartbeat-led { ++ label = "Heartbeat"; ++ gpios = <&gpio2 31 0>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* regulator for usb otg */ ++ reg_usb_otg_vbus: usb_otg_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_otg_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio3 22 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator for usb hub1 */ ++ reg_usb_h1_vbus: usb_h1_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_h1_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio7 8 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator1 for wifi/bt */ ++ awnh387_npoweron: regulator-awnh387-npoweron { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-awnh387-npoweron"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio7 12 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator2 for wifi/bt */ ++ awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-awnh387-wifi-nreset"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio6 16 0>; ++ startup-delay-us = <10000>; ++ }; ++ ++ reg_sata_phy_slp: sata_phy_slp { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_phy_slp"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 23 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ }; ++ ++ reg_sata_nrstdly: sata_nrstdly { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nrstdly"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio6 6 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_phy_slp>; ++ }; ++ ++ reg_sata_pwren: sata_pwren { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_pwren"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio1 28 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_nrstdly>; ++ }; ++ ++ reg_sata_nstandby1: sata_nstandby1 { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nstandby1"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 20 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_pwren>; ++ }; ++ ++ reg_sata_nstandby2: sata_nstandby2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nstandby2"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio5 2 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_nstandby1>; ++ }; ++ ++ reg_sata_ldo_en: sata_ldo_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_ldo_en"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio2 16 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ regulator-boot-on; ++ vin-supply = <®_sata_nstandby2>; ++ }; ++ }; ++ ++ aliases { ++ mxcfb0 = &mxcfb1; ++ mxcfb1 = &mxcfb2; ++ }; ++ ++ sound { ++ compatible = "fsl,imx6q-cm-fx6-wm8731", ++ "fsl,imx-audio-wm8731"; ++ model = "wm8731-audio"; ++ ssi-controller = <&ssi2>; ++ src-port = <2>; ++ ext-port = <4>; ++ audio-codec = <&codec>; ++ audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; ++ }; ++ ++ sound-hdmi { ++ compatible = "fsl,imx6q-audio-hdmi", ++ "fsl,imx-audio-hdmi"; ++ model = "imx-audio-hdmi"; ++ hdmi-controller = <&hdmi_audio>; ++ }; ++ ++ sound-spdif { ++ compatible = "fsl,imx-audio-spdif", ++ "fsl,imx-sabreauto-spdif"; ++ model = "imx-spdif"; ++ spdif-controller = <&spdif>; ++ spdif-out; ++ spdif-in; ++ }; ++ ++ mxcfb1: fb@0 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "hdmi"; ++ interface_pix_fmt = "RGB24"; ++ mode_str ="1920x1080M@60"; ++ default_bpp = <32>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ ++ mxcfb2: fb@1 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "lcd"; ++ interface_pix_fmt = "RGB24"; ++ mode_str ="1920x1080M@60"; ++ default_bpp = <32>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ ++ lcd@0 { ++ compatible = "fsl,lcd"; ++ ipu_id = <0>; ++ disp_id = <0>; ++ default_ifmt = "RGB24"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ipu1_1>; ++ status = "okay"; ++ }; ++ ++ v4l2_out { ++ compatible = "fsl,mxc_v4l2_output"; ++ status = "okay"; ++ }; ++}; ++ ++&iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog>; ++ ++ hog { ++ pinctrl_hog: hoggrp { ++ fsl,pins = < ++ /* SATA PWR */ ++ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 ++ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 ++ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 ++ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 ++ /* SATA CTRL */ ++ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 ++ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 ++ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 ++ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 ++ /* POWER_BUTTON */ ++ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 ++ >; ++ }; ++ }; ++ ++ imx6q-cm-fx6 { ++ /* pins for eth0 */ ++ pinctrl_enet: enetgrp { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ++ >; ++ }; ++ ++ /* pins for spi */ ++ pinctrl_ecspi1: ecspi1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 ++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 ++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 ++ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 ++ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 ++ >; ++ }; ++ ++ /* pins for nand */ ++ pinctrl_gpmi_nand: gpminandgrp { ++ fsl,pins = < ++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 ++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 ++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 ++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 ++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 ++ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 ++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 ++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 ++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 ++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 ++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 ++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 ++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 ++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 ++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 ++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 ++ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 ++ >; ++ }; ++ ++ /* pins for i2c2 */ ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for i2c3 */ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for console */ ++ pinctrl_uart4: uart4grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ /* pins for usb hub1 */ ++ pinctrl_usbh1: usbh1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 ++ >; ++ }; ++ ++ /* pins for usb otg */ ++ pinctrl_usbotg: usbotggrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 ++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 ++ >; ++ }; ++ ++ /* pins for wifi/bt */ ++ pinctrl_usdhc1: usdhc1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 ++ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 ++ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 ++ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 ++ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 ++ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 ++ >; ++ }; ++ ++ /* pins for pcie */ ++ pinctrl_pcie: pciegrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 ++ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 ++ >; ++ }; ++ ++ /* pins for spdif */ ++ pinctrl_spdif: spdifgrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 ++ MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 ++ >; ++ }; ++ ++ /* pins for audmux */ ++ pinctrl_audmux: audmuxgrp { ++ fsl,pins = < ++ MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 ++ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 ++ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 ++ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 ++ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 ++ /* master mode pin */ ++ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 ++ >; ++ }; ++ }; ++}; ++ ++/* spi */ ++&ecspi1 { ++ fsl,spi-num-chipselects = <2>; ++ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi1>; ++ status = "okay"; ++ ++ flash: m25p80@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "st,m25px16", "st,m25p"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ ++ partition@0 { ++ label = "uboot"; ++ reg = <0x0 0xc0000>; ++ }; ++ ++ partition@c0000 { ++ label = "uboot environment"; ++ reg = <0xc0000 0x40000>; ++ }; ++ ++ partition@100000 { ++ label = "reserved"; ++ reg = <0x100000 0x100000>; ++ }; ++ }; ++}; ++ ++/* eth0 */ ++&fec { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_enet>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++/* nand */ ++&gpmi { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpmi_nand>; ++ status = "okay"; ++}; ++ ++/* i2c3 */ ++&i2c3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "okay"; ++ ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ codec: wm8731@1a { ++ compatible = "wlf,wm8731"; ++ reg = <0x1a>; ++ clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>; ++ clock-names = "pll4", "imx-ssi.1", "cko", "cko2"; ++ AVDD-supply = <&pu_dummy>; ++ HPVDD-supply = <&pu_dummy>; ++ DCVDD-supply = <&pu_dummy>; ++ DBVDD-supply = <&pu_dummy>; ++ }; ++}; ++ ++&pcie { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie>; ++ reset-gpio = <&gpio1 26 0>; ++ power-on-gpio = <&gpio2 24 0>; ++ status = "okay"; ++}; ++ ++/* sata */ ++&sata { ++ status = "okay"; ++}; ++ ++/* console */ ++&uart4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart4>; ++ status = "okay"; ++}; ++ ++/* usb otg */ ++&usbotg { ++ vbus-supply = <®_usb_otg_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg>; ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++/* usb hub1 */ ++&usbh1 { ++ vbus-supply = <®_usb_h1_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbh1>; ++ status = "okay"; ++}; ++ ++/* wifi/bt */ ++&usdhc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc1>; ++ non-removable; ++ vmmc-supply = <&awnh387_npoweron>; ++ vmmc_aux-supply = <&awnh387_wifi_nreset>; ++ status = "okay"; ++}; ++ ++&ssi2 { ++ fsl,mode = "i2s-master"; ++ status = "okay"; ++}; ++ ++&mxcfb1 { ++ status = "okay"; ++}; ++ ++&mxcfb2 { ++ status = "okay"; ++}; ++ ++&hdmi_core { ++ ipu_id = <1>; ++ disp_id = <0>; ++ status = "okay"; ++}; ++ ++&hdmi_video { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; ++ fsl,hdcp; ++ status = "okay"; ++}; ++ ++&hdmi_audio { ++ status = "okay"; ++}; ++ ++&spdif { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_spdif>; ++ status = "okay"; ++}; ++ ++&audmux { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_audmux>; ++ status = "okay"; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi +new file mode 100644 +index 0000000..acfc572 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi +@@ -0,0 +1,14 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky <valentin@compulab.co.il> ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++#include "imx6q-sb-fx6x.dtsi" +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi +new file mode 100644 +index 0000000..5a488f8 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi +@@ -0,0 +1,32 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky <valentin@compulab.co.il> ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++#include "imx6q-sb-fx6x.dtsi" ++ ++/ { ++ eth@pcie { ++ compatible = "intel,i211"; ++ local-mac-address = [FF FF FF FF FF FF]; ++ status = "okay"; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ power { ++ label = "Power Button"; ++ gpios = <&gpio1 29 1>; ++ linux,code = <116>; /* KEY_POWER */ ++ gpio-key,wakeup; ++ }; ++ }; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +new file mode 100644 +index 0000000..9f67b3e +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +@@ -0,0 +1,75 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky <valentin@compulab.co.il> ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++#include "imx6q.dtsi" ++ ++/ { ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* regulator for mmc */ ++ reg_3p3v: 3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ }; ++ ++}; ++ ++&iomuxc { ++ imx6q-sb-fx6x { ++ /* pins for i2c1 */ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for mmc */ ++ pinctrl_usdhc3: usdhc3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ >; ++ }; ++ }; ++}; ++ ++/* i2c1 */ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++}; ++ ++/* mmc */ ++&usdhc3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc3>; ++ vmmc-supply = <®_3p3v>; ++ status = "disabled"; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +index 5d3c7da..33e4f33 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -11,13 +11,15 @@ + * http://www.gnu.org/copyleft/gpl.html + */ + +-#include "imx6q-cm-fx6.dts" ++/dts-v1/; ++#include "imx6q-sb-fx6x.dtsi" ++#include "imx6q-cm-fx6.dtsi" + + / { + model = "CompuLab CM-FX6 on SBC-FX6"; + compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; + }; + +-&pcie { ++&usdhc3 { + status = "okay"; +-}; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +index 0e76f02..2282250 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +@@ -11,31 +11,18 @@ + * http://www.gnu.org/copyleft/gpl.html + */ + +-#include "imx6q-cm-fx6.dts" ++/dts-v1/; ++#include "imx6q-sb-fx6m.dtsi" ++#include "imx6q-cm-fx6.dtsi" + + / { + model = "CompuLab CM-FX6 on SBC-FX6m"; + compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q"; + +- eth@pcie { +- compatible = "intel,i211"; +- local-mac-address = [FF FF FF FF FF FF]; +- status = "okay"; +- }; +- +- gpio-keys { +- compatible = "gpio-keys"; +- power { +- label = "Power Button"; +- gpios = <&gpio1 29 1>; +- linux,code = <116>; /* KEY_POWER */ +- gpio-key,wakeup; +- }; +- }; + }; + + &iomuxc { +- imx6q-sb-fx6m { ++ imx6q-sbc-fx6m { + /* pins for uart2 */ + pinctrl_uart2: uart2grp { + fsl,pins = < +@@ -45,17 +32,10 @@ + MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 + >; + }; +- +- /* pins for pcie */ +- pinctrl_pcie: pciegrp { +- fsl,pins = < +- MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 +- MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 +- >; +- }; + }; + }; + ++ + &i2c1 { + rtc@56 { + compatible = "emmicro,em3027"; +@@ -63,11 +43,7 @@ + }; + }; + +-&pcie { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_pcie>; +- reset-gpio = <&gpio1 26 0>; +- power-on-gpio = <&gpio2 24 0>; ++&usdhc3 { + status = "okay"; + }; + +@@ -80,4 +56,4 @@ + dma-names = "rx", "tx"; + dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; + status = "okay"; +-}; ++}; +\ No newline at end of file +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0023-ARM-i.MX6-dts-pcie-power-on-gpio-to-a-fixed-regulato.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0023-ARM-i.MX6-dts-pcie-power-on-gpio-to-a-fixed-regulato.patch new file mode 100644 index 00000000..89162e24 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0023-ARM-i.MX6-dts-pcie-power-on-gpio-to-a-fixed-regulato.patch @@ -0,0 +1,46 @@ +From dbd1cd2da1f43bde17e66b95128533d1658ece09 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Wed, 20 Aug 2014 14:48:09 +0300 +Subject: [PATCH 23/59] ARM: i.MX6: dts: pcie power-on-gpio to a fixed + regulator + +Define pcie power-on-gpio as a fixed regulator. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index 0aa4461..27f9567 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -42,6 +42,16 @@ + enable-active-high; + }; + ++ /* regulator1 for pcie power-on-gpio */ ++ pcie_power_on_gpio: regulator-pcie-power-on-gpio { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-pcie-power-on-gpio"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio2 24 0>; ++ enable-active-high; ++ }; ++ + /* regulator for usb hub1 */ + reg_usb_h1_vbus: usb_h1_vbus { + compatible = "regulator-fixed"; +@@ -445,7 +455,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + reset-gpio = <&gpio1 26 0>; +- power-on-gpio = <&gpio2 24 0>; ++ vdd-supply = <&pcie_power_on_gpio>; + status = "okay"; + }; + +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0024-ARM-i.MX6-dts-add-i2c1-status-okay.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0024-ARM-i.MX6-dts-add-i2c1-status-okay.patch new file mode 100644 index 00000000..cead2acc --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0024-ARM-i.MX6-dts-add-i2c1-status-okay.patch @@ -0,0 +1,45 @@ +From 84e2c9793f9240cec297eef8bb38978aade1fbb1 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Wed, 20 Aug 2014 15:15:38 +0300 +Subject: [PATCH 24/59] ARM: i.MX6: dts: add i2c1 status okay + +Restore the i2c1 bus staus that has been deleted while refactoring. +It was the reason why em3027 stoped working. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 4 ++++ + arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 1 + + 2 files changed, 5 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +index 33e4f33..6f6ad33 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -20,6 +20,10 @@ + compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; + }; + ++&i2c1 { ++ status = "okay"; ++}; ++ + &usdhc3 { + status = "okay"; + }; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +index 2282250..cf2a0eb 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +@@ -37,6 +37,7 @@ + + + &i2c1 { ++ status = "okay"; + rtc@56 { + compatible = "emmicro,em3027"; + reg = <0x56>; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0025-ARM-i.MX6-dts-add-local-mac-address-field-for-fec.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0025-ARM-i.MX6-dts-add-local-mac-address-field-for-fec.patch new file mode 100644 index 00000000..1295ded9 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0025-ARM-i.MX6-dts-add-local-mac-address-field-for-fec.patch @@ -0,0 +1,28 @@ +From b223d8ffc36e39f88c1b9014ca6bbaecd9022508 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Wed, 3 Sep 2014 10:48:29 +0300 +Subject: [PATCH 25/59] ARM: i.MX6: dts: add local-mac-address field for fec. + +Add local-mac-address field for fec. +The board U-Boot is in charge to fill this field with a correct value. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6qdl.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi +index 732f2d2..f4f3de3 100644 +--- a/arch/arm/boot/dts/imx6qdl.dtsi ++++ b/arch/arm/boot/dts/imx6qdl.dtsi +@@ -944,6 +944,7 @@ + <&clks IMX6QDL_CLK_ENET>, + <&clks IMX6QDL_CLK_ENET_REF>; + clock-names = "ipg", "ahb", "ptp"; ++ local-mac-address = [FF FF FF FF FF FF]; + status = "disabled"; + }; + +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0026-ARM-mxs-change-usb-phy-test-clock-gating.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0026-ARM-mxs-change-usb-phy-test-clock-gating.patch new file mode 100644 index 00000000..2a2436e2 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0026-ARM-mxs-change-usb-phy-test-clock-gating.patch @@ -0,0 +1,36 @@ +From e7e09deee3c3ac74e3d429cf8af2effade1152c7 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Sun, 28 Dec 2014 15:05:21 +0200 +Subject: [PATCH 26/59] ARM: mxs: change usb phy test clock gating. + +This change proposes to invert test clock gating. +This solution has fixed usb hub suspend resume loop issue. +--- + drivers/usb/phy/phy-mxs-usb.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c +index 97556b5..fffa67d 100644 +--- a/drivers/usb/phy/phy-mxs-usb.c ++++ b/drivers/usb/phy/phy-mxs-usb.c +@@ -239,7 +239,7 @@ static void __mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool disconnect) + + if (disconnect) + writel_relaxed(BM_USBPHY_DEBUG_CLKGATE, +- base + HW_USBPHY_DEBUG_CLR); ++ base + HW_USBPHY_DEBUG_SET); + + if (mxs_phy->port_id == 0) { + reg = disconnect ? ANADIG_USB1_LOOPBACK_SET +@@ -257,7 +257,7 @@ static void __mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool disconnect) + + if (!disconnect) + writel_relaxed(BM_USBPHY_DEBUG_CLKGATE, +- base + HW_USBPHY_DEBUG_SET); ++ base + HW_USBPHY_DEBUG_CLR); + + /* Delay some time, and let Linestate be SE0 for controller */ + if (disconnect) +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0027-ARM-i.MX6-dts-fix-the-cm-fx6-operation-points.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0027-ARM-i.MX6-dts-fix-the-cm-fx6-operation-points.patch new file mode 100644 index 00000000..8f77c7e1 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0027-ARM-i.MX6-dts-fix-the-cm-fx6-operation-points.patch @@ -0,0 +1,51 @@ +From 246fc4a1169a2ef6fa2582e72bdf3d9c9dc451c2 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Tue, 30 Dec 2014 13:55:58 +0200 +Subject: [PATCH 27/59] ARM: i.MX6: dts: fix the cm-fx6 operation points. + +Fix the cm-fx6 operation points. Remove settings for 1.2GHz. +The current ldo settings do not allow 1.2GHz cpu frequency. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 19 ++++++++++++++++++- + 1 file changed, 18 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index 27f9567..12eed61 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -380,6 +380,23 @@ + }; + }; + ++&cpu0 { ++ operating-points = < ++ /* kHz uV */ ++ 996000 1250000 ++ 852000 1250000 ++ 792000 1150000 ++ 396000 975000 ++ >; ++ fsl,soc-operating-points = < ++ /* ARM kHz SOC-PU uV */ ++ 996000 1250000 ++ 852000 1250000 ++ 792000 1175000 ++ 396000 1175000 ++ >; ++}; ++ + /* spi */ + &ecspi1 { + fsl,spi-num-chipselects = <2>; +@@ -538,4 +555,4 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +-}; +\ No newline at end of file ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0028-ARM-i.MX6-ASoC-fix-build-warnings-and-update-include.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0028-ARM-i.MX6-ASoC-fix-build-warnings-and-update-include.patch new file mode 100644 index 00000000..df9102d9 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0028-ARM-i.MX6-ASoC-fix-build-warnings-and-update-include.patch @@ -0,0 +1,71 @@ +From 4e0f406df2399be8984a6b774669ec1181153a37 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Mon, 5 Jan 2015 10:34:13 +0200 +Subject: [PATCH 28/59] ARM: i.MX6: ASoC: fix build warnings and update + includes + +Fix build warnings and update includes. + +sound/soc/fsl/imx-wm8731.c: In function 'imx_hifi_hw_params_slv_mode': +sound/soc/fsl/imx-wm8731.c:357:3: warning: format '%u' expects type 'unsigned int', but argument 2 has type 'long int' +sound/soc/fsl/imx-wm8731.c: In function 'imx_hifi_hw_params_mst_mode': +sound/soc/fsl/imx-wm8731.c:414:3: warning: format '%u' expects type 'unsigned int', but argument 2 has type 'long int' + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + sound/soc/fsl/imx-wm8731.c | 13 ++++--------- + 1 file changed, 4 insertions(+), 9 deletions(-) + +diff --git a/sound/soc/fsl/imx-wm8731.c b/sound/soc/fsl/imx-wm8731.c +index 72b75ad..c0833cf 100644 +--- a/sound/soc/fsl/imx-wm8731.c ++++ b/sound/soc/fsl/imx-wm8731.c +@@ -14,17 +14,12 @@ + */ + + #include <linux/module.h> ++#include <linux/of.h> + #include <linux/of_platform.h> + #include <linux/of_i2c.h> +-#include <linux/of_gpio.h> +-#include <linux/slab.h> +-#include <linux/gpio.h> + #include <linux/clk.h> + #include <sound/soc.h> +-#include <sound/jack.h> + #include <sound/pcm_params.h> +-#include <sound/soc-dapm.h> +-#include <linux/pinctrl/consumer.h> + + #include "../codecs/wm8731.h" + #include "imx-audmux.h" +@@ -344,7 +339,7 @@ static int imx_hifi_hw_params_slv_mode(struct snd_pcm_substream *substream, + SND_SOC_CLOCK_IN); + + if (ret < 0) { +- pr_err("Failed to set codec master clock to %u: %d \n", ++ pr_err("Failed to set codec master clock to %lu: %d \n", + data->sysclk, ret); + return ret; + } +@@ -401,7 +396,7 @@ static int imx_hifi_hw_params_mst_mode(struct snd_pcm_substream *substream, + SND_SOC_CLOCK_IN); + + if (ret < 0) { +- pr_err("Failed to set codec master clock to %u: %d \n", ++ pr_err("Failed to set codec master clock to %lu: %d \n", + data->sysclk, ret); + return ret; + } +@@ -555,7 +550,7 @@ static int imx_wm8731_probe(struct platform_device *pdev) + } + + codec_dev = of_find_i2c_device_by_node(codec_np); +- if (!codec_dev || !codec_dev->driver) { ++ if (!codec_dev) { + dev_err(&pdev->dev, "failed to find codec platform device\n"); + ret = -EINVAL; + goto fail; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0029-ARM-i.MX6-dts-change-issd-gpio-order.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0029-ARM-i.MX6-dts-change-issd-gpio-order.patch new file mode 100644 index 00000000..4076dfa1 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0029-ARM-i.MX6-dts-change-issd-gpio-order.patch @@ -0,0 +1,67 @@ +From 0c263e8ce8ff9a47bc336ed10d7144d7f673ed05 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 15 Jan 2015 13:52:37 +0200 +Subject: [PATCH 29/59] ARM: i.MX6: dts: change issd gpio order + +Change the order in which GPIOs are toggled in SATA init sequence to +accomodate both SanDisk and Phison SSDs. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 23 ++++++++++++----------- + 1 file changed, 12 insertions(+), 11 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index 12eed61..dd91190 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -82,6 +82,16 @@ + startup-delay-us = <10000>; + }; + ++ reg_sata_ldo_en: sata_ldo_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_ldo_en"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio2 16 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ }; ++ + reg_sata_phy_slp: sata_phy_slp { + compatible = "regulator-fixed"; + regulator-name = "cm_fx6_sata_phy_slp"; +@@ -90,6 +100,7 @@ + gpio = <&gpio3 23 0>; + startup-delay-us = <100>; + enable-active-high; ++ vin-supply = <®_sata_ldo_en>; + }; + + reg_sata_nrstdly: sata_nrstdly { +@@ -133,20 +144,10 @@ + gpio = <&gpio5 2 0>; + startup-delay-us = <100>; + enable-active-high; ++ regulator-boot-on; + vin-supply = <®_sata_nstandby1>; + }; + +- reg_sata_ldo_en: sata_ldo_en { +- compatible = "regulator-fixed"; +- regulator-name = "cm_fx6_sata_ldo_en"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio2 16 0>; +- startup-delay-us = <100>; +- enable-active-high; +- regulator-boot-on; +- vin-supply = <®_sata_nstandby2>; +- }; + }; + + aliases { +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0030-ARM-i.MX6-dts-add-missing-WiFi-BT-pinmuxes.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0030-ARM-i.MX6-dts-add-missing-WiFi-BT-pinmuxes.patch new file mode 100644 index 00000000..4aeabcdc --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0030-ARM-i.MX6-dts-add-missing-WiFi-BT-pinmuxes.patch @@ -0,0 +1,30 @@ +From 5fd7676d1ed0b1147d17304fe93f6e65df824fe3 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Tue, 27 Jan 2015 15:54:24 +0200 +Subject: [PATCH 30/59] ARM: i.MX6: dts: add missing WiFi/BT pinmuxes + +Set a correct mux mode for both: +WLAN_BT_nPD and WLAN_BT_nRESET. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index dd91190..3b1a046 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -239,6 +239,9 @@ + MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 + /* POWER_BUTTON */ + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 ++ /* WIFI_PWR_RST */ ++ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 ++ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 + >; + }; + }; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0031-ARM-i.MX6-cm-fx6-enable-i2cmux-in-defconfig.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0031-ARM-i.MX6-cm-fx6-enable-i2cmux-in-defconfig.patch new file mode 100644 index 00000000..08ac85dc --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0031-ARM-i.MX6-cm-fx6-enable-i2cmux-in-defconfig.patch @@ -0,0 +1,29 @@ +From 9c4cc9ad875d6dbbf099b3eb3cf145e8e32c8fa1 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 12 Feb 2015 13:41:56 +0200 +Subject: [PATCH 31/59] ARM: i.MX6: cm-fx6: enable i2cmux in defconfig + +Enable i2cmux in defconfig. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/configs/cm_fx6_defconfig | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm/configs/cm_fx6_defconfig b/arch/arm/configs/cm_fx6_defconfig +index 210062b..7d753ae 100644 +--- a/arch/arm/configs/cm_fx6_defconfig ++++ b/arch/arm/configs/cm_fx6_defconfig +@@ -232,6 +232,9 @@ CONFIG_FSL_OTP=y + CONFIG_MXS_VIIM=y + # CONFIG_I2C_COMPAT is not set + CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_MUX=y ++CONFIG_I2C_MUX_GPIO=y ++CONFIG_I2C_MUX_PCA954x=y + # CONFIG_I2C_HELPER_AUTO is not set + CONFIG_I2C_ALGOPCF=m + CONFIG_I2C_ALGOPCA=m +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0032-ARM-i.MX6-sb-fx6m-Fix-uart1-rts-cts-flow-control.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0032-ARM-i.MX6-sb-fx6m-Fix-uart1-rts-cts-flow-control.patch new file mode 100644 index 00000000..1d1fd3da --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0032-ARM-i.MX6-sb-fx6m-Fix-uart1-rts-cts-flow-control.patch @@ -0,0 +1,53 @@ +From 071b13a32ba25d50adf4f552e71339edce00e1f9 Mon Sep 17 00:00:00 2001 +From: Igor Grinberg <grinberg@compulab.co.il> +Date: Mon, 23 Feb 2015 15:54:13 +0200 +Subject: [PATCH 32/59] ARM: i.MX6: sb-fx6m: Fix uart1 rts/cts flow control + +According to the board schematics uart1 works in DCE mode only. +Remove the DCEDTE mode flag in the uart1 properties. + +Set a correct value in the IOMUXC_UART2_UART_RTS_B_SELECT_INPUT register. +This value lets connect RTS_B pad to ipp_uart_rts_b when UART is in DCE mode. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +[grinberg@compulab.co.il: removed remnant include from previous patch +version] +Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 13 +++++++++---- + 1 file changed, 9 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +index cf2a0eb..8afb83d 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +@@ -19,6 +19,14 @@ + model = "CompuLab CM-FX6 on SBC-FX6m"; + compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q"; + ++ iomux_uart2: pinmux@20E0924 { ++ compatible = "pinctrl-single"; ++ reg = <0x20E0000 0x924>; /* Single register */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-single,register-width = <32>; ++ pinctrl-single,function-mask = <0x4>; ++ }; + }; + + &iomuxc { +@@ -52,9 +60,6 @@ + &uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; +- /* fsl,dte-mode; */ + fsl,uart-has-rtscts; +- dma-names = "rx", "tx"; +- dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; + status = "okay"; +-}; +\ No newline at end of file ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0033-ARM-i.MX6-dts-add-i2cmux-support-for-SBC-FX6-boards.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0033-ARM-i.MX6-dts-add-i2cmux-support-for-SBC-FX6-boards.patch new file mode 100644 index 00000000..e6c21a4e --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0033-ARM-i.MX6-dts-add-i2cmux-support-for-SBC-FX6-boards.patch @@ -0,0 +1,172 @@ +From 38a739ee4a93cbf436a4d3dfbe9f9fc729177392 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Wed, 18 Feb 2015 18:25:23 +0200 +Subject: [PATCH 33/59] ARM: i.MX6: dts: add i2cmux support for SBC-FX6 boards + +Add i2cmux support for SBC-FX6 boards. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-sb-fx6.dtsi | 50 +++++++++++++++++++++++++++++++++- + arch/arm/boot/dts/imx6q-sb-fx6m.dtsi | 36 ++++++++++++++++++++++++ + arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 6 +--- + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 2 +- + arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 5 ---- + 5 files changed, 87 insertions(+), 12 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi +index acfc572..fc4f347a 100644 +--- a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi +@@ -11,4 +11,52 @@ + * http://www.gnu.org/copyleft/gpl.html + */ + +-#include "imx6q-sb-fx6x.dtsi" +\ No newline at end of file ++#include "imx6q-sb-fx6x.dtsi" ++ ++/ { ++ i2cmux { ++ compatible = "i2c-mux-gpio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mux-gpios = <&gpio1 2 0>; ++ i2c-parent = <&i2c1>; ++ ++ i2c@0 { ++ reg = <0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pca9555@26 { ++ compatible = "nxp,pca9555"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ reg = <0x26>; ++ }; ++ ++ hx8526@4a { ++ compatible = "himax,himax_ts"; ++ reg = <0x4a>; ++ gpio_intr = <&gpio1 4 0>; ++ }; ++ ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ }; ++ ++ i2c@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ dvi: edid@50 { ++ compatible = "fsl,imx6-hdmi-i2c"; ++ reg = <0x50>; ++ }; ++ }; ++ ++ }; ++}; +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi +index 5a488f8..a6cc8dd 100644 +--- a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi ++++ b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi +@@ -29,4 +29,40 @@ + gpio-key,wakeup; + }; + }; ++ ++ i2cmux { ++ compatible = "i2c-mux-gpio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mux-gpios = <&gpio1 2 0>; ++ i2c-parent = <&i2c1>; ++ ++ i2c@0 { ++ reg = <0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ rtc@56 { ++ compatible = "emmicro,em3027"; ++ reg = <0x56>; ++ }; ++ }; ++ ++ i2c@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ dvi: edid@50 { ++ compatible = "fsl,imx6-hdmi-i2c"; ++ reg = <0x50>; ++ }; ++ }; ++ }; + }; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +index 9f67b3e..ae70c87 100644 +--- a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi ++++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +@@ -59,11 +59,7 @@ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; +- eeprom@50 { +- compatible = "at24,24c02"; +- reg = <0x50>; +- pagesize = <16>; +- }; ++ status = "disabled"; + }; + + /* mmc */ +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +index 6f6ad33..4bba196 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -12,7 +12,7 @@ + */ + + /dts-v1/; +-#include "imx6q-sb-fx6x.dtsi" ++#include "imx6q-sb-fx6.dtsi" + #include "imx6q-cm-fx6.dtsi" + + / { +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +index 8afb83d..31d0e8c 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +@@ -43,13 +43,8 @@ + }; + }; + +- + &i2c1 { + status = "okay"; +- rtc@56 { +- compatible = "emmicro,em3027"; +- reg = <0x56>; +- }; + }; + + &usdhc3 { +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0034-ARM-i.MX6-dts-add-dvi-edid-GPIOs.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0034-ARM-i.MX6-dts-add-dvi-edid-GPIOs.patch new file mode 100644 index 00000000..f5e3b09c --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0034-ARM-i.MX6-dts-add-dvi-edid-GPIOs.patch @@ -0,0 +1,46 @@ +From 23349ee1dfee32db88d3a493fc7c8aaeb8e72868 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 12 Feb 2015 13:49:31 +0200 +Subject: [PATCH 34/59] ARM: i.MX6: dts: add dvi edid GPIOs + +Add dvi edid GPIOs. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +index ae70c87..41237c7 100644 +--- a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi ++++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +@@ -32,6 +32,9 @@ + }; + + &iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog>, <&pinctrl_dvi0>; ++ + imx6q-sb-fx6x { + /* pins for i2c1 */ + pinctrl_i2c1: i2c1grp { +@@ -52,6 +55,16 @@ + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + >; + }; ++ ++ /* pins for dvi/ts */ ++ pinctrl_dvi0: dvi0grp { ++ fsl,pins = < ++ /* DVI_DDC_SEL */ ++ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 ++ /* SB-FX6 Himax TS PENDOWN or SB-FX6m DVI HPD */ ++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 ++ >; ++ }; + }; + }; + +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0035-video-mxc-IPUv3-fb-restore-sync-bits.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0035-video-mxc-IPUv3-fb-restore-sync-bits.patch new file mode 100644 index 00000000..45712e58 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0035-video-mxc-IPUv3-fb-restore-sync-bits.patch @@ -0,0 +1,114 @@ +From db8c584359449958872973912001bd845438c487 Mon Sep 17 00:00:00 2001 +From: Dmitry Lifshitz <lifshitz@compulab.co.il> +Date: Thu, 12 Feb 2015 16:59:53 +0200 +Subject: [PATCH 35/59] video: mxc: IPUv3 fb: restore sync bits + +Freescale framebuffer driver uses some driver-specific +proprietary bits in the sync field (like pixel clock polarity). + +Xorg driver discards unknown sync bits in the fb_var_screeninfo +structure. As the results of dropping the proprietary sync bits +some displays shows various artifacts. + +Fix the bug by hacking mxcfb_set_par() callback. + +Before applying new var parameters, try to find a match in the mode +list, skipping proprietary sync bits (FB_MXC_SYNC_MASK). + +If the entry is found, copy its FB_MXC_SYNC_MASK bits. + +Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + drivers/video/mxc/mxc_ipuv3_fb.c | 38 ++++++++++++++++++++++++++++++++++++++ + include/linux/mxcfb.h | 11 +++++++++++ + 2 files changed, 49 insertions(+) + +diff --git a/drivers/video/mxc/mxc_ipuv3_fb.c b/drivers/video/mxc/mxc_ipuv3_fb.c +index 1fbfc9d..d24241a 100644 +--- a/drivers/video/mxc/mxc_ipuv3_fb.c ++++ b/drivers/video/mxc/mxc_ipuv3_fb.c +@@ -428,6 +428,28 @@ static bool mxcfb_need_to_set_par(struct fb_info *fbi) + sizeof(struct fb_var_screeninfo)); + } + ++static struct fb_videomode *mxc_match_mode(const struct fb_var_screeninfo *var, ++ struct list_head *head) ++{ ++ struct list_head *pos; ++ struct fb_modelist *modelist; ++ struct fb_videomode *m, mode; ++ ++ fb_var_to_videomode(&mode, var); ++ list_for_each(pos, head) { ++ modelist = list_entry(pos, struct fb_modelist, list); ++ m = &modelist->mode; ++ ++ mode.sync &= ~FB_MXC_SYNC_MASK; ++ mode.sync |= m->sync & FB_MXC_SYNC_MASK; ++ ++ if (fb_mode_is_equal(m, &mode)) ++ return m; ++ } ++ ++ return NULL; ++} ++ + /* + * Set framebuffer parameters and change the operating mode. + * +@@ -583,6 +605,7 @@ static int mxcfb_set_par(struct fb_info *fbi) + + if (!mxc_fbi->overlay) { + uint32_t out_pixel_fmt; ++ struct fb_videomode *sync_mode; + + memset(&sig_cfg, 0, sizeof(sig_cfg)); + if (fbi->var.vmode & FB_VMODE_INTERLACED) +@@ -596,6 +619,21 @@ static int mxcfb_set_par(struct fb_info *fbi) + sig_cfg.Hsync_pol = true; + if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT) + sig_cfg.Vsync_pol = true; ++ ++ /* ++ * Try to find matching all parameters, except ++ * FB_MXC_SYNC_MASK bits in the .sync field. ++ */ ++ sync_mode = mxc_match_mode(&fbi->var, &fbi->modelist); ++ /* ++ * If entry exists in the mode list and FB_MXC_SYNC_MASK ++ * bits are empty in the fbi->var.sync (most probably cleared ++ * by the user space application) then copy it from the found ++ * mode list entry. ++ */ ++ if (sync_mode && !(fbi->var.sync & FB_MXC_SYNC_MASK)) ++ fbi->var.sync = sync_mode->sync; ++ + if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL)) + sig_cfg.clk_pol = true; + if (fbi->var.sync & FB_SYNC_DATA_INVERT) +diff --git a/include/linux/mxcfb.h b/include/linux/mxcfb.h +index 67db5ee..e63aa2c 100644 +--- a/include/linux/mxcfb.h ++++ b/include/linux/mxcfb.h +@@ -23,6 +23,17 @@ + + #include <uapi/linux/mxcfb.h> + ++#define FB_SYNC_OE_LOW_ACT 0x80000000 ++#define FB_SYNC_CLK_LAT_FALL 0x40000000 ++#define FB_SYNC_DATA_INVERT 0x20000000 ++#define FB_SYNC_CLK_IDLE_EN 0x10000000 ++#define FB_SYNC_SHARP_MODE 0x08000000 ++#define FB_SYNC_SWAP_RGB 0x04000000 ++ ++#define FB_MXC_SYNC_MASK (FB_SYNC_OE_LOW_ACT | FB_SYNC_CLK_LAT_FALL | \ ++ FB_SYNC_DATA_INVERT | FB_SYNC_CLK_IDLE_EN | \ ++ FB_SYNC_SHARP_MODE | FB_SYNC_SWAP_RGB) ++ + extern struct fb_videomode mxcfb_modedb[]; + extern int mxcfb_modedb_sz; + +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0036-ARM-i.MX6-dts-add-backlight-support-for-SBC-FX6-boar.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0036-ARM-i.MX6-dts-add-backlight-support-for-SBC-FX6-boar.patch new file mode 100644 index 00000000..12216fc0 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0036-ARM-i.MX6-dts-add-backlight-support-for-SBC-FX6-boar.patch @@ -0,0 +1,48 @@ +From ed1cec186cd961a9d910bfc4817b925173a0081d Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Wed, 18 Feb 2015 18:48:26 +0200 +Subject: [PATCH 36/59] ARM: i.MX6: dts: add backlight support for SBC-FX6 + boards + +Add backlight support for SBC-FX6 boards. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +index 4bba196..5febb69 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -18,6 +18,14 @@ + / { + model = "CompuLab CM-FX6 on SBC-FX6"; + compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; ++ ++ backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&pwm3 0 5000000>; ++ brightness-levels = <0 4 8 16 32 64 128 255>; ++ default-brightness-level = <7>; ++ }; ++ + }; + + &i2c1 { +@@ -26,4 +34,10 @@ + + &usdhc3 { + status = "okay"; +-}; +\ No newline at end of file ++}; ++ ++&pwm3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm3_1>; ++ status = "okay"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0037-ARM-i.MX6-dts-rearrangement-of-the-frame-buffers-def.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0037-ARM-i.MX6-dts-rearrangement-of-the-frame-buffers-def.patch new file mode 100644 index 00000000..523ab659 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0037-ARM-i.MX6-dts-rearrangement-of-the-frame-buffers-def.patch @@ -0,0 +1,70 @@ +From fbf61cbe1472b3c719b7cd67c03c0736096dbeb1 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Wed, 18 Feb 2015 18:53:01 +0200 +Subject: [PATCH 37/59] ARM: i.MX6: dts: rearrangement of the frame buffers + definitions + +Add a correct frame buffers' definitions +with regard to the board configuration. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 8 -------- + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 8 ++++++++ + arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 8 ++++++++ + 3 files changed, 16 insertions(+), 8 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index 3b1a046..7d39f50 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -524,14 +524,6 @@ + status = "okay"; + }; + +-&mxcfb1 { +- status = "okay"; +-}; +- +-&mxcfb2 { +- status = "okay"; +-}; +- + &hdmi_core { + ipu_id = <1>; + disp_id = <0>; +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +index 5febb69..8e7432d 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -41,3 +41,11 @@ + pinctrl-0 = <&pinctrl_pwm3_1>; + status = "okay"; + }; ++ ++&mxcfb1 { ++ status = "okay"; ++}; ++ ++&mxcfb2 { ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +index 31d0e8c..0005eca 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +@@ -58,3 +58,11 @@ + fsl,uart-has-rtscts; + status = "okay"; + }; ++ ++&mxcfb1 { ++ status = "okay"; ++}; ++ ++&mxcfb2 { ++ status = "okay"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0038-ARM-i.MX6-iomux-raise-DSE-for-display-signals.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0038-ARM-i.MX6-iomux-raise-DSE-for-display-signals.patch new file mode 100644 index 00000000..f2c5823d --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0038-ARM-i.MX6-iomux-raise-DSE-for-display-signals.patch @@ -0,0 +1,73 @@ +From 18d516509c4acc54d0d8b6ce3019d721db81334a Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Wed, 11 Feb 2015 18:15:42 +0200 +Subject: [PATCH 38/59] ARM: i.MX6: iomux: raise DSE for display signals + +While drive strength of display signals is configured for 120 Ohm, some +displays exhibit artifacts. +Typical drive strength should be around 50 Ohm. +To fix the the visual artifacts, we raise the drive strength to 48 Ohm. + +Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 36 ++++++++++++++++++++++++++++++++++- + 1 file changed, 35 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index 7d39f50..9a956ac 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -210,7 +210,7 @@ + disp_id = <0>; + default_ifmt = "RGB24"; + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_ipu1_1>; ++ pinctrl-0 = <&pinctrl_ipu1_lcd>; + status = "okay"; + }; + +@@ -268,6 +268,40 @@ + >; + }; + ++ pinctrl_ipu1_lcd: ipu1grp-lcd { ++ fsl,pins = < ++ MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38 ++ MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 ++ MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38 ++ MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38 ++ MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000028 ++ MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38 ++ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38 ++ MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38 ++ MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38 ++ MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38 ++ MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38 ++ MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38 ++ MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38 ++ MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38 ++ MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38 ++ MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38 ++ MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38 ++ MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38 ++ MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38 ++ MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38 ++ MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38 ++ MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38 ++ MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38 ++ MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38 ++ MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38 ++ MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38 ++ MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38 ++ MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38 ++ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38 ++ >; ++ }; ++ + /* pins for spi */ + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0039-ARM-i.MX6-cm-fx6-add-video-mode-for-KD050C-WVGA.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0039-ARM-i.MX6-cm-fx6-add-video-mode-for-KD050C-WVGA.patch new file mode 100644 index 00000000..a5afa7e2 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0039-ARM-i.MX6-cm-fx6-add-video-mode-for-KD050C-WVGA.patch @@ -0,0 +1,46 @@ +From 9cc3784253ae0104f22cdd487e6d4065b3308f0b Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 12 Feb 2015 16:54:04 +0200 +Subject: [PATCH 39/59] ARM: i.MX6: cm-fx6: add video mode for KD050C-WVGA + +Add video mode for KD050C-WVGA, update the lcdif_modedb with +the correct parameters for KD050C-WVGA. +Change mode string for second frame buffer. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 1 + + drivers/video/mxc/mxc_lcdif.c | 6 ++++++ + 2 files changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +index 8e7432d..63f91a6 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -47,5 +47,6 @@ + }; + + &mxcfb2 { ++ mode_str ="KD050C-WVGA"; + status = "okay"; + }; +diff --git a/drivers/video/mxc/mxc_lcdif.c b/drivers/video/mxc/mxc_lcdif.c +index d635edd..ae6ac42 100644 +--- a/drivers/video/mxc/mxc_lcdif.c ++++ b/drivers/video/mxc/mxc_lcdif.c +@@ -48,6 +48,12 @@ static struct fb_videomode lcdif_modedb[] = { + FB_SYNC_CLK_LAT_FALL, + FB_VMODE_NONINTERLACED, + 0,}, ++ { ++ /* 800x480 @ 60 Hz , pixel clk @ 32MHz */ ++ "KD050C-WVGA", 60, 800, 480, 30000, 40, 40, 13, 29, 48, 3, ++ FB_SYNC_CLK_LAT_FALL, ++ FB_VMODE_NONINTERLACED, ++ 0,}, + }; + static int lcdif_modedb_sz = ARRAY_SIZE(lcdif_modedb); + +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0040-ARM-i.MX6-cm-fx6-refactor-the-cm-fx6-iomux.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0040-ARM-i.MX6-cm-fx6-refactor-the-cm-fx6-iomux.patch new file mode 100644 index 00000000..727512cc --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0040-ARM-i.MX6-cm-fx6-refactor-the-cm-fx6-iomux.patch @@ -0,0 +1,54 @@ +From e3f8a9bf6c298da7919353e364e0873425005033 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 19 Feb 2015 15:45:07 +0200 +Subject: [PATCH 40/59] ARM: i.MX6: cm-fx6: refactor the cm-fx6 iomux + +Move Marvell Power On and Reset GPIOs into a separate group. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 14 ++++++++++---- + 1 file changed, 10 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index 9a956ac..412e03b 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -239,9 +239,6 @@ + MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 + /* POWER_BUTTON */ + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 +- /* WIFI_PWR_RST */ +- MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 +- MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 + >; + }; + }; +@@ -387,6 +384,15 @@ + >; + }; + ++ /* pins for wifi/bt */ ++ pinctrl_mrvl1: mrvl1grp { ++ fsl,pins = < ++ /* WIFI_PWR_RST */ ++ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 ++ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 ++ >; ++ }; ++ + /* pins for pcie */ + pinctrl_pcie: pciegrp { + fsl,pins = < +@@ -546,7 +552,7 @@ + /* wifi/bt */ + &usdhc1 { + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usdhc1>; ++ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_mrvl1>; + non-removable; + vmmc-supply = <&awnh387_npoweron>; + vmmc_aux-supply = <&awnh387_wifi_nreset>; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0041-ARM-i.MX6-dts-gpmi-separate-kernel-and-rootfs.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0041-ARM-i.MX6-dts-gpmi-separate-kernel-and-rootfs.patch new file mode 100644 index 00000000..11d563c9 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0041-ARM-i.MX6-dts-gpmi-separate-kernel-and-rootfs.patch @@ -0,0 +1,37 @@ +From 590ff97539070fb89f25337e8123495920f17433 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 15 Jan 2015 12:52:56 +0200 +Subject: [PATCH 41/59] ARM: i.MX6: dts: gpmi: separate kernel and rootfs + +Make separate partitions for kernel and root filesystem on the NAND +flash. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index 412e03b..5ca8993 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -486,6 +486,16 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + status = "okay"; ++ ++ partition@0 { ++ label = "linux"; ++ reg = <0x0 0x800000>; ++ }; ++ ++ partition@800000 { ++ label = "rootfs"; ++ reg = < 0x800000 0x0>; ++ }; + }; + + /* i2c3 */ +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0042-ARM-dts-cm-fx6-enable-can-bus.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0042-ARM-dts-cm-fx6-enable-can-bus.patch new file mode 100644 index 00000000..0dccbaa1 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0042-ARM-dts-cm-fx6-enable-can-bus.patch @@ -0,0 +1,29 @@ +From 6c5e8a2dc899ae44e3ae1007ec1a1be4c6cb0f86 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 26 Feb 2015 16:45:42 +0200 +Subject: [PATCH 42/59] ARM: dts: cm-fx6: enable can bus + +Enable can bus. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +index 63f91a6..2432f34 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -50,3 +50,9 @@ + mode_str ="KD050C-WVGA"; + status = "okay"; + }; ++ ++&flexcan1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_flexcan1_1>; ++ status = "okay"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0043-ARM-dts-cm-fx6-add-tsc2046-touchscreen-support.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0043-ARM-dts-cm-fx6-add-tsc2046-touchscreen-support.patch new file mode 100644 index 00000000..98eb30d5 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0043-ARM-dts-cm-fx6-add-tsc2046-touchscreen-support.patch @@ -0,0 +1,85 @@ +From 5439887f65973766007f69f56277bfc7bd50494f Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Wed, 25 Feb 2015 20:18:34 +0200 +Subject: [PATCH 43/59] ARM: dts: cm-fx6: add tsc2046 touchscreen support + +Add tsc2046 touchscreen support. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 45 +++++++++++++++++++++++++++++++++++ + 1 file changed, 45 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index 5ca8993..704ef4b 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -148,6 +148,13 @@ + vin-supply = <®_sata_nstandby1>; + }; + ++ tsc2046reg: tsc2046-reg { ++ compatible = "regulator-fixed"; ++ regulator-name = "tsc2046-reg"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ + }; + + aliases { +@@ -393,6 +400,14 @@ + >; + }; + ++ /* pins for tsc2046 pendown */ ++ pinctrl_tsc2046: tsc2046grp { ++ fsl,pins = < ++ /* tsc2046 PENDOWN */ ++ MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000 ++ >; ++ }; ++ + /* pins for pcie */ + pinctrl_pcie: pciegrp { + fsl,pins = < +@@ -471,6 +486,36 @@ + reg = <0x100000 0x100000>; + }; + }; ++ ++ /* touch controller */ ++ touch: tsc2046@1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_tsc2046>; ++ ++ compatible = "ti,tsc2046"; ++ vcc-supply = <&tsc2046reg>; ++ ++ reg = <1>; /* CS1 */ ++ spi-max-frequency = <1500000>; ++ ++ interrupt-parent = <&gpio2>; ++ interrupts = <15 0>; ++ pendown-gpio = <&gpio2 15 0>; ++ ++ ti,x-min = /bits/ 16 <0x0>; ++ ti,x-max = /bits/ 16 <0x0fff>; ++ ti,y-min = /bits/ 16 <0x0>; ++ ti,y-max = /bits/ 16 <0x0fff>; ++ ++ ti,x-plate-ohms = /bits/ 16 <180>; ++ ti,pressure-max = /bits/ 16 <255>; ++ ++ ti,debounce-max = /bits/ 16 <30>; ++ ti,debounce-tol = /bits/ 16 <10>; ++ ti,debounce-rep = /bits/ 16 <1>; ++ ++ linux,wakeup; ++ }; + }; + + /* eth0 */ +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0044-ARM-i.MX6-sb-fx6x-refactoring-of-the-usdhc3-definiti.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0044-ARM-i.MX6-sb-fx6x-refactoring-of-the-usdhc3-definiti.patch new file mode 100644 index 00000000..964db0e9 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0044-ARM-i.MX6-sb-fx6x-refactoring-of-the-usdhc3-definiti.patch @@ -0,0 +1,84 @@ +From 6773725e718bd458147b9e66fa1b9edb95f8dd91 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 5 Mar 2015 09:59:32 +0200 +Subject: [PATCH 44/59] ARM: i.MX6: sb-fx6x: refactoring of the usdhc3 + definition + +Add uhs pinctrl state for usdhc3. +This is needed for supporting ultra high speed cards. + +Add cd/wp definitions. +Add a missing property no-1-8-v. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 32 ++++++++++++++++++++++++++++++-- + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 1 + + 2 files changed, 31 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +index 41237c7..372a3c1 100644 +--- a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi ++++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +@@ -53,6 +53,30 @@ + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000 ++ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 ++ >; ++ }; ++ ++ pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { /* 100Mhz */ ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 ++ >; ++ }; ++ ++ pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { /* 200Mhz */ ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 + >; + }; + +@@ -77,8 +101,12 @@ + + /* mmc */ + &usdhc3 { +- pinctrl-names = "default"; ++ pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; ++ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; ++ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; ++ cd-gpios = <&gpio7 1 0>; ++ no-1-8-v; + vmmc-supply = <®_3p3v>; + status = "disabled"; +-}; +\ No newline at end of file ++}; +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +index 2432f34..cd5c011 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -33,6 +33,7 @@ + }; + + &usdhc3 { ++ wp-gpios = <&gpio7 0 0>; + status = "okay"; + }; + +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0045-ARM-i.MX6-cm-fx6-fix-up-incorrect-compatibilities.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0045-ARM-i.MX6-cm-fx6-fix-up-incorrect-compatibilities.patch new file mode 100644 index 00000000..4a523346 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0045-ARM-i.MX6-cm-fx6-fix-up-incorrect-compatibilities.patch @@ -0,0 +1,47 @@ +From 706e2109599bd2ac09114b5064bc75140e928f2c Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Wed, 18 Mar 2015 14:30:49 +0200 +Subject: [PATCH 45/59] ARM: i.MX6: cm-fx6: fix up incorrect compatibilities + +Fix up incorrect compatibilities. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 9 +++------ + 1 file changed, 3 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index 704ef4b..8175cee 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -163,8 +163,7 @@ + }; + + sound { +- compatible = "fsl,imx6q-cm-fx6-wm8731", +- "fsl,imx-audio-wm8731"; ++ compatible = "fsl,imx-audio-wm8731"; + model = "wm8731-audio"; + ssi-controller = <&ssi2>; + src-port = <2>; +@@ -174,15 +173,13 @@ + }; + + sound-hdmi { +- compatible = "fsl,imx6q-audio-hdmi", +- "fsl,imx-audio-hdmi"; ++ compatible = "fsl,imx-audio-hdmi"; + model = "imx-audio-hdmi"; + hdmi-controller = <&hdmi_audio>; + }; + + sound-spdif { +- compatible = "fsl,imx-audio-spdif", +- "fsl,imx-sabreauto-spdif"; ++ compatible = "fsl,imx-audio-spdif"; + model = "imx-spdif"; + spdif-controller = <&spdif>; + spdif-out; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0046-ARM-i.MX6-dts-fix-include-file-order.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0046-ARM-i.MX6-dts-fix-include-file-order.patch new file mode 100644 index 00000000..bfd151b3 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0046-ARM-i.MX6-dts-fix-include-file-order.patch @@ -0,0 +1,129 @@ +From 1ba89a208ecf8096a1b9a0fd1867d4227e04a1e8 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Sun, 22 Mar 2015 11:15:08 +0200 +Subject: [PATCH 46/59] ARM: i.MX6: dts: fix include file order + +Fix include file order. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dts | 3 ++- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 2 -- + arch/arm/boot/dts/imx6q-sb-fx6.dtsi | 2 -- + arch/arm/boot/dts/imx6q-sb-fx6m.dtsi | 4 +--- + arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 2 -- + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 4 +++- + arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 4 +++- + 7 files changed, 9 insertions(+), 12 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index a0e423b..14c2d6a 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -12,9 +12,10 @@ + */ + + /dts-v1/; ++#include "imx6q.dtsi" + #include "imx6q-cm-fx6.dtsi" + + / { + model = "CompuLab CM-FX6"; + compatible = "compulab,cm-fx6", "fsl,imx6q"; +-}; +\ No newline at end of file ++}; +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index 8175cee..f53d94e 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -11,8 +11,6 @@ + * http://www.gnu.org/copyleft/gpl.html + */ + +-#include "imx6q.dtsi" +- + / { + memory { + reg = <0x10000000 0x80000000>; +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi +index fc4f347a..4d030f9 100644 +--- a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi +@@ -11,8 +11,6 @@ + * http://www.gnu.org/copyleft/gpl.html + */ + +-#include "imx6q-sb-fx6x.dtsi" +- + / { + i2cmux { + compatible = "i2c-mux-gpio"; +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi +index a6cc8dd..5e6c859 100644 +--- a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi ++++ b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi +@@ -11,8 +11,6 @@ + * http://www.gnu.org/copyleft/gpl.html + */ + +-#include "imx6q-sb-fx6x.dtsi" +- + / { + eth@pcie { + compatible = "intel,i211"; +@@ -65,4 +63,4 @@ + }; + }; + }; +-}; +\ No newline at end of file ++}; +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +index 372a3c1..01f73ae 100644 +--- a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi ++++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +@@ -11,8 +11,6 @@ + * http://www.gnu.org/copyleft/gpl.html + */ + +-#include "imx6q.dtsi" +- + / { + regulators { + compatible = "simple-bus"; +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +index cd5c011..84a6d23 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -12,8 +12,10 @@ + */ + + /dts-v1/; +-#include "imx6q-sb-fx6.dtsi" ++#include "imx6q.dtsi" + #include "imx6q-cm-fx6.dtsi" ++#include "imx6q-sb-fx6x.dtsi" ++#include "imx6q-sb-fx6.dtsi" + + / { + model = "CompuLab CM-FX6 on SBC-FX6"; +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +index 0005eca..817da28 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +@@ -12,8 +12,10 @@ + */ + + /dts-v1/; +-#include "imx6q-sb-fx6m.dtsi" ++#include "imx6q.dtsi" + #include "imx6q-cm-fx6.dtsi" ++#include "imx6q-sb-fx6x.dtsi" ++#include "imx6q-sb-fx6m.dtsi" + + / { + model = "CompuLab CM-FX6 on SBC-FX6m"; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0047-ARM-i.MX6-dts-rename-the-sb-fx6-board-files.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0047-ARM-i.MX6-dts-rename-the-sb-fx6-board-files.patch new file mode 100644 index 00000000..74f249a9 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0047-ARM-i.MX6-dts-rename-the-sb-fx6-board-files.patch @@ -0,0 +1,570 @@ +From feeb12eb1567043d60246cceb805a28d82d2c78e Mon Sep 17 00:00:00 2001 +From: Igor Grinberg <grinberg@compulab.co.il> +Date: Mon, 23 Mar 2015 09:50:04 +0200 +Subject: [PATCH 47/59] ARM: i.MX6: dts: rename the sb-fx6 board files + +In preparation for DL/S support addition, we rename the files to better +describe the content and reuse the same DT code. +Rename the sb-fx6 board files' names + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +[grinberg@compulab.co.il: added a bit more descriptive commit message] +Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-sb-fx6.dtsi | 60 ----------------- + arch/arm/boot/dts/imx6q-sb-fx6m.dtsi | 66 ------------------- + arch/arm/boot/dts/imx6q-sb-fx6x.dtsi | 110 -------------------------------- + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 4 +- + arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 4 +- + arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi | 60 +++++++++++++++++ + arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi | 66 +++++++++++++++++++ + arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi | 110 ++++++++++++++++++++++++++++++++ + 8 files changed, 240 insertions(+), 240 deletions(-) + delete mode 100644 arch/arm/boot/dts/imx6q-sb-fx6.dtsi + delete mode 100644 arch/arm/boot/dts/imx6q-sb-fx6m.dtsi + delete mode 100644 arch/arm/boot/dts/imx6q-sb-fx6x.dtsi + create mode 100644 arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi + create mode 100644 arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi + create mode 100644 arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi + +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi +deleted file mode 100644 +index 4d030f9..0000000 +--- a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi ++++ /dev/null +@@ -1,60 +0,0 @@ +-/* +- * Copyright 2014 CompuLab Ltd. +- * +- * Author: Valentin Raevsky <valentin@compulab.co.il> +- * +- * The code contained herein is licensed under the GNU General Public +- * License. You may obtain a copy of the GNU General Public License +- * Version 2 or later at the following locations: +- * +- * http://www.opensource.org/licenses/gpl-license.html +- * http://www.gnu.org/copyleft/gpl.html +- */ +- +-/ { +- i2cmux { +- compatible = "i2c-mux-gpio"; +- #address-cells = <1>; +- #size-cells = <0>; +- mux-gpios = <&gpio1 2 0>; +- i2c-parent = <&i2c1>; +- +- i2c@0 { +- reg = <0>; +- #address-cells = <1>; +- #size-cells = <0>; +- +- pca9555@26 { +- compatible = "nxp,pca9555"; +- gpio-controller; +- #gpio-cells = <2>; +- reg = <0x26>; +- }; +- +- hx8526@4a { +- compatible = "himax,himax_ts"; +- reg = <0x4a>; +- gpio_intr = <&gpio1 4 0>; +- }; +- +- eeprom@50 { +- compatible = "at24,24c02"; +- reg = <0x50>; +- pagesize = <16>; +- }; +- +- }; +- +- i2c@1 { +- reg = <1>; +- #address-cells = <1>; +- #size-cells = <0>; +- +- dvi: edid@50 { +- compatible = "fsl,imx6-hdmi-i2c"; +- reg = <0x50>; +- }; +- }; +- +- }; +-}; +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi +deleted file mode 100644 +index 5e6c859..0000000 +--- a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi ++++ /dev/null +@@ -1,66 +0,0 @@ +-/* +- * Copyright 2014 CompuLab Ltd. +- * +- * Author: Valentin Raevsky <valentin@compulab.co.il> +- * +- * The code contained herein is licensed under the GNU General Public +- * License. You may obtain a copy of the GNU General Public License +- * Version 2 or later at the following locations: +- * +- * http://www.opensource.org/licenses/gpl-license.html +- * http://www.gnu.org/copyleft/gpl.html +- */ +- +-/ { +- eth@pcie { +- compatible = "intel,i211"; +- local-mac-address = [FF FF FF FF FF FF]; +- status = "okay"; +- }; +- +- gpio-keys { +- compatible = "gpio-keys"; +- power { +- label = "Power Button"; +- gpios = <&gpio1 29 1>; +- linux,code = <116>; /* KEY_POWER */ +- gpio-key,wakeup; +- }; +- }; +- +- i2cmux { +- compatible = "i2c-mux-gpio"; +- #address-cells = <1>; +- #size-cells = <0>; +- mux-gpios = <&gpio1 2 0>; +- i2c-parent = <&i2c1>; +- +- i2c@0 { +- reg = <0>; +- #address-cells = <1>; +- #size-cells = <0>; +- +- eeprom@50 { +- compatible = "at24,24c02"; +- reg = <0x50>; +- pagesize = <16>; +- }; +- +- rtc@56 { +- compatible = "emmicro,em3027"; +- reg = <0x56>; +- }; +- }; +- +- i2c@1 { +- reg = <1>; +- #address-cells = <1>; +- #size-cells = <0>; +- +- dvi: edid@50 { +- compatible = "fsl,imx6-hdmi-i2c"; +- reg = <0x50>; +- }; +- }; +- }; +-}; +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +deleted file mode 100644 +index 01f73ae..0000000 +--- a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi ++++ /dev/null +@@ -1,110 +0,0 @@ +-/* +- * Copyright 2014 CompuLab Ltd. +- * +- * Author: Valentin Raevsky <valentin@compulab.co.il> +- * +- * The code contained herein is licensed under the GNU General Public +- * License. You may obtain a copy of the GNU General Public License +- * Version 2 or later at the following locations: +- * +- * http://www.opensource.org/licenses/gpl-license.html +- * http://www.gnu.org/copyleft/gpl.html +- */ +- +-/ { +- regulators { +- compatible = "simple-bus"; +- #address-cells = <1>; +- #size-cells = <0>; +- +- /* regulator for mmc */ +- reg_3p3v: 3p3v { +- compatible = "regulator-fixed"; +- regulator-name = "3P3V"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-always-on; +- }; +- }; +- +-}; +- +-&iomuxc { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_hog>, <&pinctrl_dvi0>; +- +- imx6q-sb-fx6x { +- /* pins for i2c1 */ +- pinctrl_i2c1: i2c1grp { +- fsl,pins = < +- MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 +- MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 +- >; +- }; +- +- /* pins for mmc */ +- pinctrl_usdhc3: usdhc3grp { +- fsl,pins = < +- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 +- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 +- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 +- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 +- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 +- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 +- MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000 +- MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 +- >; +- }; +- +- pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { /* 100Mhz */ +- fsl,pins = < +- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 +- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 +- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 +- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 +- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9 +- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 +- >; +- }; +- +- pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { /* 200Mhz */ +- fsl,pins = < +- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 +- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 +- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 +- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 +- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 +- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 +- >; +- }; +- +- /* pins for dvi/ts */ +- pinctrl_dvi0: dvi0grp { +- fsl,pins = < +- /* DVI_DDC_SEL */ +- MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 +- /* SB-FX6 Himax TS PENDOWN or SB-FX6m DVI HPD */ +- MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 +- >; +- }; +- }; +-}; +- +-/* i2c1 */ +-&i2c1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c1>; +- status = "disabled"; +-}; +- +-/* mmc */ +-&usdhc3 { +- pinctrl-names = "default", "state_100mhz", "state_200mhz"; +- pinctrl-0 = <&pinctrl_usdhc3>; +- pinctrl-1 = <&pinctrl_usdhc3_100mhz>; +- pinctrl-2 = <&pinctrl_usdhc3_200mhz>; +- cd-gpios = <&gpio7 1 0>; +- no-1-8-v; +- vmmc-supply = <®_3p3v>; +- status = "disabled"; +-}; +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +index 84a6d23..9d31d15 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -14,8 +14,8 @@ + /dts-v1/; + #include "imx6q.dtsi" + #include "imx6q-cm-fx6.dtsi" +-#include "imx6q-sb-fx6x.dtsi" +-#include "imx6q-sb-fx6.dtsi" ++#include "imx6qdl-sb-fx6x.dtsi" ++#include "imx6qdl-sb-fx6.dtsi" + + / { + model = "CompuLab CM-FX6 on SBC-FX6"; +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +index 817da28..a98f1a2 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +@@ -14,8 +14,8 @@ + /dts-v1/; + #include "imx6q.dtsi" + #include "imx6q-cm-fx6.dtsi" +-#include "imx6q-sb-fx6x.dtsi" +-#include "imx6q-sb-fx6m.dtsi" ++#include "imx6qdl-sb-fx6x.dtsi" ++#include "imx6qdl-sb-fx6m.dtsi" + + / { + model = "CompuLab CM-FX6 on SBC-FX6m"; +diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi +new file mode 100644 +index 0000000..4d030f9 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi +@@ -0,0 +1,60 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky <valentin@compulab.co.il> ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++/ { ++ i2cmux { ++ compatible = "i2c-mux-gpio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mux-gpios = <&gpio1 2 0>; ++ i2c-parent = <&i2c1>; ++ ++ i2c@0 { ++ reg = <0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pca9555@26 { ++ compatible = "nxp,pca9555"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ reg = <0x26>; ++ }; ++ ++ hx8526@4a { ++ compatible = "himax,himax_ts"; ++ reg = <0x4a>; ++ gpio_intr = <&gpio1 4 0>; ++ }; ++ ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ }; ++ ++ i2c@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ dvi: edid@50 { ++ compatible = "fsl,imx6-hdmi-i2c"; ++ reg = <0x50>; ++ }; ++ }; ++ ++ }; ++}; +diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi +new file mode 100644 +index 0000000..5e6c859 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi +@@ -0,0 +1,66 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky <valentin@compulab.co.il> ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++/ { ++ eth@pcie { ++ compatible = "intel,i211"; ++ local-mac-address = [FF FF FF FF FF FF]; ++ status = "okay"; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ power { ++ label = "Power Button"; ++ gpios = <&gpio1 29 1>; ++ linux,code = <116>; /* KEY_POWER */ ++ gpio-key,wakeup; ++ }; ++ }; ++ ++ i2cmux { ++ compatible = "i2c-mux-gpio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mux-gpios = <&gpio1 2 0>; ++ i2c-parent = <&i2c1>; ++ ++ i2c@0 { ++ reg = <0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ rtc@56 { ++ compatible = "emmicro,em3027"; ++ reg = <0x56>; ++ }; ++ }; ++ ++ i2c@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ dvi: edid@50 { ++ compatible = "fsl,imx6-hdmi-i2c"; ++ reg = <0x50>; ++ }; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi +new file mode 100644 +index 0000000..01f73ae +--- /dev/null ++++ b/arch/arm/boot/dts/imx6qdl-sb-fx6x.dtsi +@@ -0,0 +1,110 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky <valentin@compulab.co.il> ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++/ { ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* regulator for mmc */ ++ reg_3p3v: 3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ }; ++ ++}; ++ ++&iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog>, <&pinctrl_dvi0>; ++ ++ imx6q-sb-fx6x { ++ /* pins for i2c1 */ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for mmc */ ++ pinctrl_usdhc3: usdhc3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000 ++ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 ++ >; ++ }; ++ ++ pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { /* 100Mhz */ ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 ++ >; ++ }; ++ ++ pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { /* 200Mhz */ ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 ++ >; ++ }; ++ ++ /* pins for dvi/ts */ ++ pinctrl_dvi0: dvi0grp { ++ fsl,pins = < ++ /* DVI_DDC_SEL */ ++ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 ++ /* SB-FX6 Himax TS PENDOWN or SB-FX6m DVI HPD */ ++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 ++ >; ++ }; ++ }; ++}; ++ ++/* i2c1 */ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ status = "disabled"; ++}; ++ ++/* mmc */ ++&usdhc3 { ++ pinctrl-names = "default", "state_100mhz", "state_200mhz"; ++ pinctrl-0 = <&pinctrl_usdhc3>; ++ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; ++ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; ++ cd-gpios = <&gpio7 1 0>; ++ no-1-8-v; ++ vmmc-supply = <®_3p3v>; ++ status = "disabled"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0048-ARM-i.MX6-dts-refactor-the-sbc-fx6-target-files.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0048-ARM-i.MX6-dts-refactor-the-sbc-fx6-target-files.patch new file mode 100644 index 00000000..cfa79baf --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0048-ARM-i.MX6-dts-refactor-the-sbc-fx6-target-files.patch @@ -0,0 +1,243 @@ +From a19b8fff6f84ecf1199be3b0a97325a0cab437c5 Mon Sep 17 00:00:00 2001 +From: Igor Grinberg <grinberg@compulab.co.il> +Date: Mon, 23 Mar 2015 09:59:54 +0200 +Subject: [PATCH 48/59] ARM: i.MX6: dts: refactor the sbc-fx6 target files + +In preparation for DL/S support addition, we move the common code +to dtsi files for better reuse of the same DT code. +Refactor the sbc-fx6 target files. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +[grinberg@compulab.co.il: added a bit more descriptive commit message] +Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-sbc-fx6.dts | 42 ++-------------------------- + arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 47 -------------------------------- + arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi | 37 +++++++++++++++++++++++++ + arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi | 47 ++++++++++++++++++++++++++++++++ + 4 files changed, 86 insertions(+), 87 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +index 9d31d15..1234fb3 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -18,44 +18,6 @@ + #include "imx6qdl-sb-fx6.dtsi" + + / { +- model = "CompuLab CM-FX6 on SBC-FX6"; +- compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; +- +- backlight { +- compatible = "pwm-backlight"; +- pwms = <&pwm3 0 5000000>; +- brightness-levels = <0 4 8 16 32 64 128 255>; +- default-brightness-level = <7>; +- }; +- +-}; +- +-&i2c1 { +- status = "okay"; +-}; +- +-&usdhc3 { +- wp-gpios = <&gpio7 0 0>; +- status = "okay"; +-}; +- +-&pwm3 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_pwm3_1>; +- status = "okay"; +-}; +- +-&mxcfb1 { +- status = "okay"; +-}; +- +-&mxcfb2 { +- mode_str ="KD050C-WVGA"; +- status = "okay"; +-}; +- +-&flexcan1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_flexcan1_1>; +- status = "okay"; ++ model = "CompuLab CM-FX6 on SBC-FX6"; ++ compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; + }; +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +index a98f1a2..19bf948 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +@@ -20,51 +20,4 @@ + / { + model = "CompuLab CM-FX6 on SBC-FX6m"; + compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q"; +- +- iomux_uart2: pinmux@20E0924 { +- compatible = "pinctrl-single"; +- reg = <0x20E0000 0x924>; /* Single register */ +- #address-cells = <1>; +- #size-cells = <0>; +- pinctrl-single,register-width = <32>; +- pinctrl-single,function-mask = <0x4>; +- }; +-}; +- +-&iomuxc { +- imx6q-sbc-fx6m { +- /* pins for uart2 */ +- pinctrl_uart2: uart2grp { +- fsl,pins = < +- MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 +- MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 +- MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 +- MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 +- >; +- }; +- }; +-}; +- +-&i2c1 { +- status = "okay"; +-}; +- +-&usdhc3 { +- status = "okay"; +-}; +- +-/* rear serial console */ +-&uart2 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart2>; +- fsl,uart-has-rtscts; +- status = "okay"; +-}; +- +-&mxcfb1 { +- status = "okay"; +-}; +- +-&mxcfb2 { +- status = "okay"; + }; +diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi +index 4d030f9..129e88e 100644 +--- a/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi +@@ -12,6 +12,13 @@ + */ + + / { ++ backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&pwm3 0 5000000>; ++ brightness-levels = <0 4 8 16 32 64 128 255>; ++ default-brightness-level = <7>; ++ }; ++ + i2cmux { + compatible = "i2c-mux-gpio"; + #address-cells = <1>; +@@ -58,3 +65,33 @@ + + }; + }; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&usdhc3 { ++ wp-gpios = <&gpio7 0 0>; ++ status = "okay"; ++}; ++ ++&pwm3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm3_1>; ++ status = "okay"; ++}; ++ ++&mxcfb1 { ++ status = "okay"; ++}; ++ ++&mxcfb2 { ++ mode_str ="KD050C-WVGA"; ++ status = "okay"; ++}; ++ ++&flexcan1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_flexcan1_1>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi +index 5e6c859..5394364 100644 +--- a/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-sb-fx6m.dtsi +@@ -12,6 +12,15 @@ + */ + + / { ++ iomux_uart2: pinmux@20E0924 { ++ compatible = "pinctrl-single"; ++ reg = <0x20E0000 0x924>; /* Single register */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-single,register-width = <32>; ++ pinctrl-single,function-mask = <0x4>; ++ }; ++ + eth@pcie { + compatible = "intel,i211"; + local-mac-address = [FF FF FF FF FF FF]; +@@ -64,3 +73,41 @@ + }; + }; + }; ++ ++&iomuxc { ++ imx6q-sbc-fx6m { ++ /* pins for uart2 */ ++ pinctrl_uart2: uart2grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 ++ >; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&usdhc3 { ++ status = "okay"; ++}; ++ ++/* rear serial console */ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart2>; ++ fsl,uart-has-rtscts; ++ status = "okay"; ++}; ++ ++&mxcfb1 { ++ status = "okay"; ++}; ++ ++&mxcfb2 { ++ status = "okay"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0049-ARM-i.MX6-cm-fx6-separate-DL-and-Quad-stuff.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0049-ARM-i.MX6-cm-fx6-separate-DL-and-Quad-stuff.patch new file mode 100644 index 00000000..0fd11090 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0049-ARM-i.MX6-cm-fx6-separate-DL-and-Quad-stuff.patch @@ -0,0 +1,1182 @@ +From ae49df750fb2a10cf04fca9854d5faa5f1a3d5a0 Mon Sep 17 00:00:00 2001 +From: Igor Grinberg <grinberg@compulab.co.il> +Date: Mon, 23 Mar 2015 10:12:35 +0200 +Subject: [PATCH 49/59] ARM: i.MX6: cm-fx6: separate DL and Quad stuff + +Break down the cm-fx6 file into two files in order to +separate DL and Quad supported features. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +[grinberg@compulab.co.il: fix available memory size and +rename "dl" to "qdl"] +Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-cm-fx6.dtsi | 553 +------------------------------ + arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi | 573 +++++++++++++++++++++++++++++++++ + 2 files changed, 575 insertions(+), 551 deletions(-) + create mode 100644 arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi + +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +index f53d94e..3a10e5e 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -11,75 +11,14 @@ + * http://www.gnu.org/copyleft/gpl.html + */ + +-/ { +- memory { +- reg = <0x10000000 0x80000000>; +- }; +- +- leds { +- compatible = "gpio-leds"; +- heartbeat-led { +- label = "Heartbeat"; +- gpios = <&gpio2 31 0>; +- linux,default-trigger = "heartbeat"; +- }; +- }; ++#include "imx6qdl-cm-fx6.dtsi" + ++/ { + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + +- /* regulator for usb otg */ +- reg_usb_otg_vbus: usb_otg_vbus { +- compatible = "regulator-fixed"; +- regulator-name = "usb_otg_vbus"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- gpio = <&gpio3 22 0>; +- enable-active-high; +- }; +- +- /* regulator1 for pcie power-on-gpio */ +- pcie_power_on_gpio: regulator-pcie-power-on-gpio { +- compatible = "regulator-fixed"; +- regulator-name = "regulator-pcie-power-on-gpio"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio2 24 0>; +- enable-active-high; +- }; +- +- /* regulator for usb hub1 */ +- reg_usb_h1_vbus: usb_h1_vbus { +- compatible = "regulator-fixed"; +- regulator-name = "usb_h1_vbus"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- gpio = <&gpio7 8 0>; +- enable-active-high; +- }; +- +- /* regulator1 for wifi/bt */ +- awnh387_npoweron: regulator-awnh387-npoweron { +- compatible = "regulator-fixed"; +- regulator-name = "regulator-awnh387-npoweron"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio7 12 0>; +- enable-active-high; +- }; +- +- /* regulator2 for wifi/bt */ +- awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { +- compatible = "regulator-fixed"; +- regulator-name = "regulator-awnh387-wifi-nreset"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio6 16 0>; +- startup-delay-us = <10000>; +- }; +- + reg_sata_ldo_en: sata_ldo_en { + compatible = "regulator-fixed"; + regulator-name = "cm_fx6_sata_ldo_en"; +@@ -146,499 +85,11 @@ + vin-supply = <®_sata_nstandby1>; + }; + +- tsc2046reg: tsc2046-reg { +- compatible = "regulator-fixed"; +- regulator-name = "tsc2046-reg"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- }; +- +- }; +- +- aliases { +- mxcfb0 = &mxcfb1; +- mxcfb1 = &mxcfb2; +- }; +- +- sound { +- compatible = "fsl,imx-audio-wm8731"; +- model = "wm8731-audio"; +- ssi-controller = <&ssi2>; +- src-port = <2>; +- ext-port = <4>; +- audio-codec = <&codec>; +- audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; +- }; +- +- sound-hdmi { +- compatible = "fsl,imx-audio-hdmi"; +- model = "imx-audio-hdmi"; +- hdmi-controller = <&hdmi_audio>; +- }; +- +- sound-spdif { +- compatible = "fsl,imx-audio-spdif"; +- model = "imx-spdif"; +- spdif-controller = <&spdif>; +- spdif-out; +- spdif-in; +- }; +- +- mxcfb1: fb@0 { +- compatible = "fsl,mxc_sdc_fb"; +- disp_dev = "hdmi"; +- interface_pix_fmt = "RGB24"; +- mode_str ="1920x1080M@60"; +- default_bpp = <32>; +- int_clk = <0>; +- late_init = <0>; +- status = "disabled"; +- }; +- +- mxcfb2: fb@1 { +- compatible = "fsl,mxc_sdc_fb"; +- disp_dev = "lcd"; +- interface_pix_fmt = "RGB24"; +- mode_str ="1920x1080M@60"; +- default_bpp = <32>; +- int_clk = <0>; +- late_init = <0>; +- status = "disabled"; +- }; +- +- lcd@0 { +- compatible = "fsl,lcd"; +- ipu_id = <0>; +- disp_id = <0>; +- default_ifmt = "RGB24"; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_ipu1_lcd>; +- status = "okay"; +- }; +- +- v4l2_out { +- compatible = "fsl,mxc_v4l2_output"; +- status = "okay"; +- }; +-}; +- +-&iomuxc { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_hog>; +- +- hog { +- pinctrl_hog: hoggrp { +- fsl,pins = < +- /* SATA PWR */ +- MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 +- MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 +- MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 +- MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 +- /* SATA CTRL */ +- MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 +- MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 +- MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 +- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 +- /* POWER_BUTTON */ +- MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 +- >; +- }; +- }; +- +- imx6q-cm-fx6 { +- /* pins for eth0 */ +- pinctrl_enet: enetgrp { +- fsl,pins = < +- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 +- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 +- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 +- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 +- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 +- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 +- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 +- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 +- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 +- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 +- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 +- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 +- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 +- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 +- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 +- >; +- }; +- +- pinctrl_ipu1_lcd: ipu1grp-lcd { +- fsl,pins = < +- MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38 +- MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 +- MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38 +- MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38 +- MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000028 +- MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38 +- MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38 +- MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38 +- MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38 +- MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38 +- MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38 +- MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38 +- MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38 +- MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38 +- MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38 +- MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38 +- MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38 +- MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38 +- MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38 +- MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38 +- MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38 +- MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38 +- MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38 +- MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38 +- MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38 +- MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38 +- MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38 +- MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38 +- MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38 +- >; +- }; +- +- /* pins for spi */ +- pinctrl_ecspi1: ecspi1grp { +- fsl,pins = < +- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 +- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 +- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 +- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 +- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 +- >; +- }; +- +- /* pins for nand */ +- pinctrl_gpmi_nand: gpminandgrp { +- fsl,pins = < +- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 +- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 +- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 +- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 +- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 +- MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 +- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 +- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 +- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 +- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 +- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 +- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 +- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 +- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 +- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 +- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 +- MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 +- >; +- }; +- +- /* pins for i2c2 */ +- pinctrl_i2c2: i2c2grp { +- fsl,pins = < +- MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 +- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 +- >; +- }; +- +- /* pins for i2c3 */ +- pinctrl_i2c3: i2c3grp { +- fsl,pins = < +- MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 +- MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 +- >; +- }; +- +- /* pins for console */ +- pinctrl_uart4: uart4grp { +- fsl,pins = < +- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 +- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 +- >; +- }; +- +- /* pins for usb hub1 */ +- pinctrl_usbh1: usbh1grp { +- fsl,pins = < +- MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 +- >; +- }; +- +- /* pins for usb otg */ +- pinctrl_usbotg: usbotggrp { +- fsl,pins = < +- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 +- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 +- >; +- }; +- +- /* pins for wifi/bt */ +- pinctrl_usdhc1: usdhc1grp { +- fsl,pins = < +- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 +- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 +- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 +- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 +- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 +- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 +- >; +- }; +- +- /* pins for wifi/bt */ +- pinctrl_mrvl1: mrvl1grp { +- fsl,pins = < +- /* WIFI_PWR_RST */ +- MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 +- MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 +- >; +- }; +- +- /* pins for tsc2046 pendown */ +- pinctrl_tsc2046: tsc2046grp { +- fsl,pins = < +- /* tsc2046 PENDOWN */ +- MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000 +- >; +- }; +- +- /* pins for pcie */ +- pinctrl_pcie: pciegrp { +- fsl,pins = < +- MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 +- MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 +- >; +- }; +- +- /* pins for spdif */ +- pinctrl_spdif: spdifgrp { +- fsl,pins = < +- MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 +- MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 +- >; +- }; +- +- /* pins for audmux */ +- pinctrl_audmux: audmuxgrp { +- fsl,pins = < +- MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 +- MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 +- MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 +- MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 +- MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 +- /* master mode pin */ +- MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 +- >; +- }; +- }; +-}; +- +-&cpu0 { +- operating-points = < +- /* kHz uV */ +- 996000 1250000 +- 852000 1250000 +- 792000 1150000 +- 396000 975000 +- >; +- fsl,soc-operating-points = < +- /* ARM kHz SOC-PU uV */ +- 996000 1250000 +- 852000 1250000 +- 792000 1175000 +- 396000 1175000 +- >; +-}; +- +-/* spi */ +-&ecspi1 { +- fsl,spi-num-chipselects = <2>; +- cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_ecspi1>; +- status = "okay"; +- +- flash: m25p80@0 { +- #address-cells = <1>; +- #size-cells = <1>; +- compatible = "st,m25px16", "st,m25p"; +- spi-max-frequency = <20000000>; +- reg = <0>; +- +- partition@0 { +- label = "uboot"; +- reg = <0x0 0xc0000>; +- }; +- +- partition@c0000 { +- label = "uboot environment"; +- reg = <0xc0000 0x40000>; +- }; +- +- partition@100000 { +- label = "reserved"; +- reg = <0x100000 0x100000>; +- }; +- }; +- +- /* touch controller */ +- touch: tsc2046@1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_tsc2046>; +- +- compatible = "ti,tsc2046"; +- vcc-supply = <&tsc2046reg>; +- +- reg = <1>; /* CS1 */ +- spi-max-frequency = <1500000>; +- +- interrupt-parent = <&gpio2>; +- interrupts = <15 0>; +- pendown-gpio = <&gpio2 15 0>; +- +- ti,x-min = /bits/ 16 <0x0>; +- ti,x-max = /bits/ 16 <0x0fff>; +- ti,y-min = /bits/ 16 <0x0>; +- ti,y-max = /bits/ 16 <0x0fff>; +- +- ti,x-plate-ohms = /bits/ 16 <180>; +- ti,pressure-max = /bits/ 16 <255>; +- +- ti,debounce-max = /bits/ 16 <30>; +- ti,debounce-tol = /bits/ 16 <10>; +- ti,debounce-rep = /bits/ 16 <1>; +- +- linux,wakeup; +- }; +-}; +- +-/* eth0 */ +-&fec { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_enet>; +- phy-mode = "rgmii"; +- status = "okay"; +-}; +- +-/* nand */ +-&gpmi { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_gpmi_nand>; +- status = "okay"; +- +- partition@0 { +- label = "linux"; +- reg = <0x0 0x800000>; +- }; +- +- partition@800000 { +- label = "rootfs"; +- reg = < 0x800000 0x0>; +- }; +-}; +- +-/* i2c3 */ +-&i2c3 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c3>; +- status = "okay"; +- +- eeprom@50 { +- compatible = "at24,24c02"; +- reg = <0x50>; +- pagesize = <16>; + }; + +- codec: wm8731@1a { +- compatible = "wlf,wm8731"; +- reg = <0x1a>; +- clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>; +- clock-names = "pll4", "imx-ssi.1", "cko", "cko2"; +- AVDD-supply = <&pu_dummy>; +- HPVDD-supply = <&pu_dummy>; +- DCVDD-supply = <&pu_dummy>; +- DBVDD-supply = <&pu_dummy>; +- }; +-}; +- +-&pcie { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_pcie>; +- reset-gpio = <&gpio1 26 0>; +- vdd-supply = <&pcie_power_on_gpio>; +- status = "okay"; + }; + + /* sata */ + &sata { + status = "okay"; + }; +- +-/* console */ +-&uart4 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart4>; +- status = "okay"; +-}; +- +-/* usb otg */ +-&usbotg { +- vbus-supply = <®_usb_otg_vbus>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usbotg>; +- dr_mode = "otg"; +- status = "okay"; +-}; +- +-/* usb hub1 */ +-&usbh1 { +- vbus-supply = <®_usb_h1_vbus>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usbh1>; +- status = "okay"; +-}; +- +-/* wifi/bt */ +-&usdhc1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_mrvl1>; +- non-removable; +- vmmc-supply = <&awnh387_npoweron>; +- vmmc_aux-supply = <&awnh387_wifi_nreset>; +- status = "okay"; +-}; +- +-&ssi2 { +- fsl,mode = "i2s-master"; +- status = "okay"; +-}; +- +-&hdmi_core { +- ipu_id = <1>; +- disp_id = <0>; +- status = "okay"; +-}; +- +-&hdmi_video { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; +- fsl,hdcp; +- status = "okay"; +-}; +- +-&hdmi_audio { +- status = "okay"; +-}; +- +-&spdif { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_spdif>; +- status = "okay"; +-}; +- +-&audmux { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_audmux>; +- status = "okay"; +-}; +diff --git a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi +new file mode 100644 +index 0000000..31086b7 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi +@@ -0,0 +1,573 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky <valentin@compulab.co.il> ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++/ { ++ memory { ++ reg = <0x10000000 0x20000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ heartbeat-led { ++ label = "Heartbeat"; ++ gpios = <&gpio2 31 0>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* regulator for usb otg */ ++ reg_usb_otg_vbus: usb_otg_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_otg_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio3 22 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator1 for pcie power-on-gpio */ ++ pcie_power_on_gpio: regulator-pcie-power-on-gpio { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-pcie-power-on-gpio"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio2 24 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator for usb hub1 */ ++ reg_usb_h1_vbus: usb_h1_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_h1_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio7 8 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator1 for wifi/bt */ ++ awnh387_npoweron: regulator-awnh387-npoweron { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-awnh387-npoweron"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio7 12 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator2 for wifi/bt */ ++ awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-awnh387-wifi-nreset"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio6 16 0>; ++ startup-delay-us = <10000>; ++ }; ++ ++ tsc2046reg: tsc2046-reg { ++ compatible = "regulator-fixed"; ++ regulator-name = "tsc2046-reg"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ }; ++ ++ aliases { ++ mxcfb0 = &mxcfb1; ++ mxcfb1 = &mxcfb2; ++ }; ++ ++ sound { ++ compatible = "fsl,imx-audio-wm8731"; ++ model = "wm8731-audio"; ++ ssi-controller = <&ssi2>; ++ src-port = <2>; ++ ext-port = <4>; ++ audio-codec = <&codec>; ++ audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN"; ++ }; ++ ++ sound-hdmi { ++ compatible = "fsl,imx-audio-hdmi"; ++ model = "imx-audio-hdmi"; ++ hdmi-controller = <&hdmi_audio>; ++ }; ++ ++ sound-spdif { ++ compatible = "fsl,imx-audio-spdif"; ++ model = "imx-spdif"; ++ spdif-controller = <&spdif>; ++ spdif-out; ++ spdif-in; ++ }; ++ ++ mxcfb1: fb@0 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "hdmi"; ++ interface_pix_fmt = "RGB24"; ++ mode_str ="1920x1080M@60"; ++ default_bpp = <32>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ ++ mxcfb2: fb@1 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "lcd"; ++ interface_pix_fmt = "RGB24"; ++ mode_str ="1920x1080M@60"; ++ default_bpp = <32>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ ++ lcd@0 { ++ compatible = "fsl,lcd"; ++ ipu_id = <0>; ++ disp_id = <0>; ++ default_ifmt = "RGB24"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ipu1_lcd>; ++ status = "okay"; ++ }; ++ ++ v4l2_out { ++ compatible = "fsl,mxc_v4l2_output"; ++ status = "okay"; ++ }; ++}; ++ ++&iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog>; ++ ++ hog { ++ pinctrl_hog: hoggrp { ++ fsl,pins = < ++ /* SATA PWR */ ++ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 ++ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 ++ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 ++ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 ++ /* SATA CTRL */ ++ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 ++ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 ++ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 ++ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 ++ /* POWER_BUTTON */ ++ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 ++ >; ++ }; ++ }; ++ ++ imx6q-cm-fx6 { ++ /* pins for eth0 */ ++ pinctrl_enet: enetgrp { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_ipu1_lcd: ipu1grp-lcd { ++ fsl,pins = < ++ MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38 ++ MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 ++ MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38 ++ MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38 ++ MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000028 ++ MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38 ++ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38 ++ MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38 ++ MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38 ++ MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38 ++ MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38 ++ MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38 ++ MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38 ++ MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38 ++ MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38 ++ MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38 ++ MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38 ++ MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38 ++ MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38 ++ MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38 ++ MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38 ++ MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38 ++ MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38 ++ MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38 ++ MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38 ++ MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38 ++ MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38 ++ MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38 ++ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38 ++ >; ++ }; ++ ++ /* pins for spi */ ++ pinctrl_ecspi1: ecspi1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 ++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 ++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 ++ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 ++ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 ++ >; ++ }; ++ ++ /* pins for nand */ ++ pinctrl_gpmi_nand: gpminandgrp { ++ fsl,pins = < ++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 ++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 ++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 ++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 ++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 ++ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 ++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 ++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 ++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 ++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 ++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 ++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 ++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 ++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 ++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 ++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 ++ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 ++ >; ++ }; ++ ++ /* pins for i2c2 */ ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for i2c3 */ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for console */ ++ pinctrl_uart4: uart4grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ /* pins for usb hub1 */ ++ pinctrl_usbh1: usbh1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 ++ >; ++ }; ++ ++ /* pins for usb otg */ ++ pinctrl_usbotg: usbotggrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 ++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 ++ >; ++ }; ++ ++ /* pins for wifi/bt */ ++ pinctrl_usdhc1: usdhc1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 ++ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 ++ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 ++ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 ++ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 ++ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 ++ >; ++ }; ++ ++ /* pins for wifi/bt */ ++ pinctrl_mrvl1: mrvl1grp { ++ fsl,pins = < ++ /* WIFI_PWR_RST */ ++ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 ++ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 ++ >; ++ }; ++ ++ /* pins for tsc2046 pendown */ ++ pinctrl_tsc2046: tsc2046grp { ++ fsl,pins = < ++ /* tsc2046 PENDOWN */ ++ MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000 ++ >; ++ }; ++ ++ /* pins for pcie */ ++ pinctrl_pcie: pciegrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 ++ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 ++ >; ++ }; ++ ++ /* pins for spdif */ ++ pinctrl_spdif: spdifgrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 ++ MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 ++ >; ++ }; ++ ++ /* pins for audmux */ ++ pinctrl_audmux: audmuxgrp { ++ fsl,pins = < ++ MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 ++ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 ++ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 ++ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 ++ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 ++ /* master mode pin */ ++ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 ++ >; ++ }; ++ }; ++}; ++ ++&cpu0 { ++ operating-points = < ++ /* kHz uV */ ++ 996000 1250000 ++ 852000 1250000 ++ 792000 1150000 ++ 396000 975000 ++ >; ++ fsl,soc-operating-points = < ++ /* ARM kHz SOC-PU uV */ ++ 996000 1250000 ++ 852000 1250000 ++ 792000 1175000 ++ 396000 1175000 ++ >; ++}; ++ ++/* spi */ ++&ecspi1 { ++ fsl,spi-num-chipselects = <2>; ++ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi1>; ++ status = "okay"; ++ ++ flash: m25p80@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "st,m25px16", "st,m25p"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ ++ partition@0 { ++ label = "uboot"; ++ reg = <0x0 0xc0000>; ++ }; ++ ++ partition@c0000 { ++ label = "uboot environment"; ++ reg = <0xc0000 0x40000>; ++ }; ++ ++ partition@100000 { ++ label = "reserved"; ++ reg = <0x100000 0x100000>; ++ }; ++ }; ++ ++ /* touch controller */ ++ touch: tsc2046@1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_tsc2046>; ++ ++ compatible = "ti,tsc2046"; ++ vcc-supply = <&tsc2046reg>; ++ ++ reg = <1>; /* CS1 */ ++ spi-max-frequency = <1500000>; ++ ++ interrupt-parent = <&gpio2>; ++ interrupts = <15 0>; ++ pendown-gpio = <&gpio2 15 0>; ++ ++ ti,x-min = /bits/ 16 <0x0>; ++ ti,x-max = /bits/ 16 <0x0fff>; ++ ti,y-min = /bits/ 16 <0x0>; ++ ti,y-max = /bits/ 16 <0x0fff>; ++ ++ ti,x-plate-ohms = /bits/ 16 <180>; ++ ti,pressure-max = /bits/ 16 <255>; ++ ++ ti,debounce-max = /bits/ 16 <30>; ++ ti,debounce-tol = /bits/ 16 <10>; ++ ti,debounce-rep = /bits/ 16 <1>; ++ ++ linux,wakeup; ++ }; ++}; ++ ++/* eth0 */ ++&fec { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_enet>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++/* nand */ ++&gpmi { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpmi_nand>; ++ status = "okay"; ++ ++ partition@0 { ++ label = "linux"; ++ reg = <0x0 0x800000>; ++ }; ++ ++ partition@800000 { ++ label = "rootfs"; ++ reg = < 0x800000 0x0>; ++ }; ++}; ++ ++/* i2c3 */ ++&i2c3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "okay"; ++ ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ codec: wm8731@1a { ++ compatible = "wlf,wm8731"; ++ reg = <0x1a>; ++ clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>; ++ clock-names = "pll4", "imx-ssi.1", "cko", "cko2"; ++ AVDD-supply = <&pu_dummy>; ++ HPVDD-supply = <&pu_dummy>; ++ DCVDD-supply = <&pu_dummy>; ++ DBVDD-supply = <&pu_dummy>; ++ }; ++}; ++ ++&pcie { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie>; ++ reset-gpio = <&gpio1 26 0>; ++ vdd-supply = <&pcie_power_on_gpio>; ++ status = "okay"; ++}; ++ ++/* console */ ++&uart4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart4>; ++ status = "okay"; ++}; ++ ++/* usb otg */ ++&usbotg { ++ vbus-supply = <®_usb_otg_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg>; ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++/* usb hub1 */ ++&usbh1 { ++ vbus-supply = <®_usb_h1_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbh1>; ++ status = "okay"; ++}; ++ ++/* wifi/bt */ ++&usdhc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_mrvl1>; ++ non-removable; ++ vmmc-supply = <&awnh387_npoweron>; ++ vmmc_aux-supply = <&awnh387_wifi_nreset>; ++ status = "okay"; ++}; ++ ++&ssi2 { ++ fsl,mode = "i2s-master"; ++ status = "okay"; ++}; ++ ++&hdmi_core { ++ ipu_id = <1>; ++ disp_id = <0>; ++ status = "okay"; ++}; ++ ++&hdmi_video { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; ++ fsl,hdcp; ++ status = "okay"; ++}; ++ ++&hdmi_audio { ++ status = "okay"; ++}; ++ ++&spdif { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_spdif>; ++ status = "okay"; ++}; ++ ++&audmux { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_audmux>; ++ status = "okay"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0050-ARM-i.MX6-dts-add-initial-support-for-cm-fx6-DL-S.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0050-ARM-i.MX6-dts-add-initial-support-for-cm-fx6-DL-S.patch new file mode 100644 index 00000000..7c3da0ce --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0050-ARM-i.MX6-dts-add-initial-support-for-cm-fx6-DL-S.patch @@ -0,0 +1,53 @@ +From 7f9cb189d94d973ce8f8211794fc3cb20171ed1a Mon Sep 17 00:00:00 2001 +From: Igor Grinberg <grinberg@compulab.co.il> +Date: Mon, 23 Mar 2015 10:15:50 +0200 +Subject: [PATCH 50/59] ARM: i.MX6: dts: add initial support for cm-fx6 DL/S + +Add initial support for cm-fx6 DL/S modules. + +This patch configures: +1) serial console +2) hearbeat led +3) FreeScale NIC +4) pcie +5) Intel I210 NIC +6) Analog audio wm8731-audio + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +[grinberg@compulab.co.il: fix dtsi file name as per previous patch] +Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> +--- + arch/arm/boot/dts/imx6dl-cm-fx6.dts | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + create mode 100644 arch/arm/boot/dts/imx6dl-cm-fx6.dts + +diff --git a/arch/arm/boot/dts/imx6dl-cm-fx6.dts b/arch/arm/boot/dts/imx6dl-cm-fx6.dts +new file mode 100644 +index 0000000..d33d14c +--- /dev/null ++++ b/arch/arm/boot/dts/imx6dl-cm-fx6.dts +@@ -0,0 +1,21 @@ ++/* ++ * Copyright 2015 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky <valentin@compulab.co.il> ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++/dts-v1/; ++#include "imx6dl.dtsi" ++#include "imx6qdl-cm-fx6.dtsi" ++ ++/ { ++ model = "CompuLab CM-FX6"; ++ compatible = "compulab,cm-fx6", "fsl,imx6dl"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0051-ARM-i.MX6-dts-add-board-files-for-sbc-fx6-DL-S.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0051-ARM-i.MX6-dts-add-board-files-for-sbc-fx6-DL-S.patch new file mode 100644 index 00000000..d727345f --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0051-ARM-i.MX6-dts-add-board-files-for-sbc-fx6-DL-S.patch @@ -0,0 +1,78 @@ +From d979cd240d5aae4344c705524d05dbe5792695b4 Mon Sep 17 00:00:00 2001 +From: Igor Grinberg <grinberg@compulab.co.il> +Date: Mon, 23 Mar 2015 10:21:26 +0200 +Subject: [PATCH 51/59] ARM: i.MX6: dts: add board files for sbc-fx6 DL/S + +Add board files for sbc-fx6 DL/S modules and Utilite Value. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +[grinberg@compulab.co.il: fix dtsi files names as per previous patches] +Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> +--- + arch/arm/boot/dts/imx6dl-sbc-fx6.dts | 23 +++++++++++++++++++++++ + arch/arm/boot/dts/imx6dl-sbc-fx6m.dts | 23 +++++++++++++++++++++++ + 2 files changed, 46 insertions(+) + create mode 100644 arch/arm/boot/dts/imx6dl-sbc-fx6.dts + create mode 100644 arch/arm/boot/dts/imx6dl-sbc-fx6m.dts + +diff --git a/arch/arm/boot/dts/imx6dl-sbc-fx6.dts b/arch/arm/boot/dts/imx6dl-sbc-fx6.dts +new file mode 100644 +index 0000000..723b654 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6dl-sbc-fx6.dts +@@ -0,0 +1,23 @@ ++/* ++* Copyright 2015 CompuLab Ltd. ++* ++* Author: Valentin Raevsky <valentin@compulab.co.il> ++* ++* The code contained herein is licensed under the GNU General Public ++* License. You may obtain a copy of the GNU General Public License ++* Version 2 or later at the following locations: ++* ++* http://www.opensource.org/licenses/gpl-license.html ++* http://www.gnu.org/copyleft/gpl.html ++*/ ++ ++/dts-v1/; ++#include "imx6dl.dtsi" ++#include "imx6qdl-cm-fx6.dtsi" ++#include "imx6qdl-sb-fx6x.dtsi" ++#include "imx6qdl-sb-fx6.dtsi" ++ ++/ { ++ model = "CompuLab CM-FX6 on SBC-FX6"; ++ compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6dl"; ++}; +diff --git a/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts b/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts +new file mode 100644 +index 0000000..f66b177 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts +@@ -0,0 +1,23 @@ ++/* ++* Copyright 2015 CompuLab Ltd. ++* ++* Author: Valentin Raevsky <valentin@compulab.co.il> ++* ++* The code contained herein is licensed under the GNU General Public ++* License. You may obtain a copy of the GNU General Public License ++* Version 2 or later at the following locations: ++* ++* http://www.opensource.org/licenses/gpl-license.html ++* http://www.gnu.org/copyleft/gpl.html ++*/ ++ ++/dts-v1/; ++#include "imx6dl.dtsi" ++#include "imx6qdl-cm-fx6.dtsi" ++#include "imx6qdl-sb-fx6x.dtsi" ++#include "imx6qdl-sb-fx6m.dtsi" ++ ++/ { ++ model = "CompuLab CM-FX6 on SBC-FX6m"; ++ compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6dl"; ++}; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0052-ARM-dts-cm-fx6-add-build-targets-for-cm-fx6-flavour-.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0052-ARM-dts-cm-fx6-add-build-targets-for-cm-fx6-flavour-.patch new file mode 100644 index 00000000..e219233b --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0052-ARM-dts-cm-fx6-add-build-targets-for-cm-fx6-flavour-.patch @@ -0,0 +1,55 @@ +From 82c104998b3e0c8c55c3ddab4d41d8a012e40307 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Mon, 23 Mar 2015 11:47:54 +0200 +Subject: [PATCH 52/59] ARM: dts: cm-fx6: add build targets for cm-fx6 flavour + boards. + +Add build targets for cm-fx6 flavour boards. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> + +Conflicts: + + arch/arm/boot/dts/Makefile + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/Makefile | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 699bf8f..0d6813e 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ + imx53-mba53.dtb \ + imx53-qsb.dtb \ + imx53-smd.dtb \ ++ imx6dl-cm-fx6.dtb \ + imx6dl-cubox-i.dtb \ + imx6dl-hummingboard.dtb \ + imx6dl-sabreauto.dtb \ +@@ -164,8 +165,11 @@ dtb-$(CONFIG_ARCH_MXC) += \ + imx6dl-sabresd-ldo.dtb \ + imx6dl-sabresd-pf200.dtb \ + imx6dl-sabresd-hdcp.dtb \ ++ imx6dl-sbc-fx6.dtb \ ++ imx6dl-sbc-fx6m.dtb \ + imx6dl-wandboard.dtb \ + imx6q-arm2.dtb \ ++ imx6q-cm-fx6.dtb \ + imx6q-cubox-i.dtb \ + imx6q-phytec-pbab01.dtb \ + imx6q-sabreauto.dtb \ +@@ -179,6 +183,8 @@ dtb-$(CONFIG_ARCH_MXC) += \ + imx6q-sabresd-uart.dtb \ + imx6q-sabresd-hdcp.dtb \ + imx6q-sabresd-ldo.dtb \ ++ imx6q-sbc-fx6.dtb \ ++ imx6q-sbc-fx6m.dtb \ + imx6q-sbc6x.dtb \ + imx6q-udoo.dtb \ + imx6q-wandboard.dtb \ +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0053-ARM-dts-cm-fx6-change-the-hdmi_core-ipu-connection.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0053-ARM-dts-cm-fx6-change-the-hdmi_core-ipu-connection.patch new file mode 100644 index 00000000..493463e3 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0053-ARM-dts-cm-fx6-change-the-hdmi_core-ipu-connection.patch @@ -0,0 +1,47 @@ +From b59a9dad52a2c53b9921d2e8ecb98dd92ee0bd6b Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Wed, 25 Mar 2015 17:39:07 +0200 +Subject: [PATCH 53/59] ARM: dts: cm-fx6: change the hdmi_core ipu connection + +Change the hdmi_core ipu connection in order to +allow using the second IPU on quad SBC-FX6 boards with ldb devices. +SBC-FX6m boards still use an IPU per port. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6q-sbc-fx6m.dts | 6 ++++++ + arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi | 4 ++-- + 2 files changed, 8 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +index 19bf948..dd8c1c0 100644 +--- a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +@@ -21,3 +21,9 @@ + model = "CompuLab CM-FX6 on SBC-FX6m"; + compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q"; + }; ++ ++&hdmi_core { ++ ipu_id = <1>; ++ disp_id = <0>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi +index 31086b7..4f02e30 100644 +--- a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi +@@ -544,8 +544,8 @@ + }; + + &hdmi_core { +- ipu_id = <1>; +- disp_id = <0>; ++ ipu_id = <0>; ++ disp_id = <1>; + status = "okay"; + }; + +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0054-ARM-i.MX6-dts-add-ldb-support-for-SBC-FX6-boards.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0054-ARM-i.MX6-dts-add-ldb-support-for-SBC-FX6-boards.patch new file mode 100644 index 00000000..1ac22288 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0054-ARM-i.MX6-dts-add-ldb-support-for-SBC-FX6-boards.patch @@ -0,0 +1,90 @@ +From e8ab6bcb80954c1b7874c288375defe73242458d Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Wed, 25 Mar 2015 17:55:09 +0200 +Subject: [PATCH 54/59] ARM: i.MX6: dts: add ldb support for SBC-FX6 boards + +Add ldb support for SBC-FX6 boards. +LVDS1/0 ports of the SBC-FX6 are configured. +LVDS0 - IPU1:DISP0 - fb3 +LVDS1 - IPU1:DISP1 - fb5 + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi | 24 ++++++++++++++++++++++++ + arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi | 18 ++++++++++++++++++ + 2 files changed, 42 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi +index 4f02e30..d17a4d1 100644 +--- a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi +@@ -92,6 +92,8 @@ + aliases { + mxcfb0 = &mxcfb1; + mxcfb1 = &mxcfb2; ++ mxcfb2 = &mxcfb3; ++ mxcfb3 = &mxcfb4; + }; + + sound { +@@ -140,6 +142,28 @@ + status = "disabled"; + }; + ++ mxcfb3: fb@2 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "ldb"; ++ interface_pix_fmt = "RGB666"; ++ mode_str ="1366x768M-18@60"; ++ default_bpp = <16>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ ++ mxcfb4: fb@3 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "ldb"; ++ interface_pix_fmt = "RGB666"; ++ mode_str ="1280x800M-18@60"; ++ default_bpp = <16>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ + lcd@0 { + compatible = "fsl,lcd"; + ipu_id = <0>; +diff --git a/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi +index 129e88e..85836d7 100644 +--- a/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-sb-fx6.dtsi +@@ -90,6 +90,24 @@ + status = "okay"; + }; + ++&mxcfb3 { ++ status = "okay"; ++}; ++ ++&mxcfb4 { ++ status = "okay"; ++}; ++ ++&ldb { ++ ipu_id = <1>; ++ disp_id = <0>; ++ ext_ref = <1>; ++ mode = "sep0"; ++ sec_ipu_id = <1>; ++ sec_disp_id = <1>; ++ status = "okay"; ++}; ++ + &flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1_1>; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0055-ARM-dts-cm-fx6-IOMUXC_GPR1-6-7-to-set-correct-values.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0055-ARM-dts-cm-fx6-IOMUXC_GPR1-6-7-to-set-correct-values.patch new file mode 100644 index 00000000..7abbf958 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0055-ARM-dts-cm-fx6-IOMUXC_GPR1-6-7-to-set-correct-values.patch @@ -0,0 +1,47 @@ +From 8aa5e04aeeb40323b6f7615b500058c02115d17f Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Mon, 30 Mar 2015 11:29:07 +0300 +Subject: [PATCH 55/59] ARM: dts: cm-fx6: IOMUXC_GPR1/6/7 to set correct + values + +Add IOMUXC_GPR1/6/7 registers to the iomux default pinctrl group. +The IOMUXC_GPR1 register must have default value in order to let the SoC boot up after a warm reboot. +IOMUXC_GPR6/7 registers must have a correct value for the ipu QoS priority. +Otherwise the SoC reports on: +1) the interrupt that is a result of a time out error during a read access via DIx. +2) a new frame starts before the previous end-of-frame event. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi +index d17a4d1..cff8d4e 100644 +--- a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi +@@ -11,6 +11,10 @@ + * http://www.gnu.org/copyleft/gpl.html + */ + ++#define MX6QDL_GPR1 0x04 0x04 0x000 0x0 0x0 ++#define MX6QDL_GPR6 0x18 0x18 0x000 0x0 0x0 ++#define MX6QDL_GPR7 0x1c 0x1c 0x000 0x0 0x0 ++ + / { + memory { + reg = <0x10000000 0x20000000>; +@@ -187,6 +191,10 @@ + hog { + pinctrl_hog: hoggrp { + fsl,pins = < ++ MX6QDL_GPR1 0x48400005 ++ /* ipu3 QoS */ ++ MX6QDL_GPR6 0x007f007f ++ MX6QDL_GPR7 0x007f007f + /* SATA PWR */ + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 + MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0056-i2c-fix-i2c_of-include.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0056-i2c-fix-i2c_of-include.patch new file mode 100644 index 00000000..9e78f041 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0056-i2c-fix-i2c_of-include.patch @@ -0,0 +1,30 @@ +From cdf878ae149301273767ed4f5052def1529c6cfa Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 9 Apr 2015 13:27:01 +0300 +Subject: [PATCH 56/59] i2c: fix i2c_of include + +The OF helpers have been moved to the core. +As a result the i2c_of.h does not exist anymore. +Fix i2c_of include with respect to the latest core implementation. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + sound/soc/fsl/imx-wm8731.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/fsl/imx-wm8731.c b/sound/soc/fsl/imx-wm8731.c +index c0833cf..7248042 100644 +--- a/sound/soc/fsl/imx-wm8731.c ++++ b/sound/soc/fsl/imx-wm8731.c +@@ -16,7 +16,7 @@ + #include <linux/module.h> + #include <linux/of.h> + #include <linux/of_platform.h> +-#include <linux/of_i2c.h> ++#include <linux/i2c.h> + #include <linux/clk.h> + #include <sound/soc.h> + #include <sound/pcm_params.h> +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0057-ARM-dts-cm-fx6-fix-missing-defines.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0057-ARM-dts-cm-fx6-fix-missing-defines.patch new file mode 100644 index 00000000..30ed8bf9 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0057-ARM-dts-cm-fx6-fix-missing-defines.patch @@ -0,0 +1,66 @@ +From 9388d08644b2397682db8d5cfce894e42e128999 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 9 Apr 2015 13:30:42 +0300 +Subject: [PATCH 57/59] ARM: dts: cm-fx6: fix missing defines + +Fix missing defines that have been changed since 3.10.17 + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi | 26 +++++++++++++++++++++++++- + 1 file changed, 25 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi +index cff8d4e..e8f80bc 100644 +--- a/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi +@@ -182,6 +182,10 @@ + compatible = "fsl,mxc_v4l2_output"; + status = "okay"; + }; ++ ++ pu_dummy: pudummy_reg { ++ compatible = "fsl,imx6-dummy-pureg"; /* only used in ldo-bypass */ ++ }; + }; + + &iomuxc { +@@ -397,6 +401,26 @@ + MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059 + >; + }; ++ ++ pinctrl_hdmi_hdcp: hdmihdcpgrp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_pwm3_1: pwm3grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_flexcan1_1: flexcan1grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000 ++ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000 ++ >; ++ }; + }; + }; + +@@ -583,7 +607,7 @@ + + &hdmi_video { + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; ++ pinctrl-0 = <&pinctrl_hdmi_hdcp>; + fsl,hdcp; + status = "okay"; + }; +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0058-imx6-hdmi-add-missing-definition.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0058-imx6-hdmi-add-missing-definition.patch new file mode 100644 index 00000000..9caceb04 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0058-imx6-hdmi-add-missing-definition.patch @@ -0,0 +1,27 @@ +From 3cb466070695ae9586aa52d668976c590f66008c Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 9 Apr 2015 14:01:38 +0300 +Subject: [PATCH 58/59] imx6: hdmi: add missing definition + +IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +index f6515b5..a5f996f 100644 +--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h ++++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +@@ -215,6 +215,7 @@ + #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI1 (0x1 << 4) + #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU2_DI0 (0x2 << 4) + #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU2_DI1 (0x3 << 4) ++#define IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT 2 + #define IMX6Q_GPR3_HDMI_MUX_CTL_MASK (0x3 << 2) + #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU1_DI0 (0x0 << 2) + #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU1_DI1 (0x1 << 2) +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0059-ARM-i.MX6-cm-fx6-update-defconfig.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0059-ARM-i.MX6-cm-fx6-update-defconfig.patch new file mode 100644 index 00000000..80f9fe0e --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/0059-ARM-i.MX6-cm-fx6-update-defconfig.patch @@ -0,0 +1,211 @@ +From 2a61f4133182c9c5b63ceb9f73cbc9bbc758c29a Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky <valentin@compulab.co.il> +Date: Thu, 16 Apr 2015 14:55:42 +0300 +Subject: [PATCH 59/59] ARM: i.MX6: cm-fx6: update defconfig + +Update the cm_fx6_defconfig with respect to +the kernel release after applying the 3.10.17 patches. + +Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> +--- + arch/arm/configs/cm_fx6_defconfig | 55 ++++++++++++++++--------------------- + 1 file changed, 24 insertions(+), 31 deletions(-) + +diff --git a/arch/arm/configs/cm_fx6_defconfig b/arch/arm/configs/cm_fx6_defconfig +index 7d753ae..a247438 100644 +--- a/arch/arm/configs/cm_fx6_defconfig ++++ b/arch/arm/configs/cm_fx6_defconfig +@@ -1,3 +1,4 @@ ++CONFIG_LOCALVERSION="-cm-fx6" + CONFIG_KERNEL_LZO=y + CONFIG_SYSVIPC=y + CONFIG_NO_HZ=y +@@ -25,8 +26,8 @@ CONFIG_MACH_EUKREA_CPUIMX51SD=y + CONFIG_SOC_IMX53=y + CONFIG_SOC_IMX6Q=y + CONFIG_SOC_IMX6SL=y ++CONFIG_SOC_IMX6SX=y + CONFIG_SOC_VF610=y +-CONFIG_MACH_CM_FX6=y + # CONFIG_SWP_EMULATE is not set + CONFIG_PCI=y + CONFIG_PCI_IMX6=y +@@ -34,16 +35,16 @@ CONFIG_SMP=y + CONFIG_VMSPLIT_2G=y + CONFIG_PREEMPT=y + CONFIG_AEABI=y +-# CONFIG_OABI_COMPAT is not set + CONFIG_HIGHMEM=y +-CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" ++CONFIG_CMA=y ++CONFIG_CMDLINE="console=ttymxc3,115200 root=/dev/mmcblk0p1 rootwait" + CONFIG_CPU_FREQ=y + CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y + CONFIG_CPU_FREQ_GOV_POWERSAVE=y + CONFIG_CPU_FREQ_GOV_USERSPACE=y + CONFIG_CPU_FREQ_GOV_ONDEMAND=y + CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +-CONFIG_ARM_IMX6_CPUFREQ=y ++CONFIG_ARM_IMX6Q_CPUFREQ=y + CONFIG_CPU_IDLE=y + CONFIG_VFP=y + CONFIG_NEON=y +@@ -147,8 +148,6 @@ CONFIG_MAC80211=y + CONFIG_DEVTMPFS=y + CONFIG_DEVTMPFS_MOUNT=y + # CONFIG_STANDALONE is not set +-CONFIG_CMA=y +-CONFIG_CMA_SIZE_MBYTES=320 + CONFIG_IMX_WEIM=y + CONFIG_CONNECTOR=y + CONFIG_MTD=y +@@ -161,7 +160,6 @@ CONFIG_MTD_CFI_AMDSTD=y + CONFIG_MTD_CFI_STAA=y + CONFIG_MTD_PHYSMAP_OF=y + CONFIG_MTD_DATAFLASH=y +-CONFIG_MTD_M25P80=y + CONFIG_MTD_SST25L=y + CONFIG_MTD_NAND=y + CONFIG_MTD_NAND_GPMI_NAND=y +@@ -221,7 +219,6 @@ CONFIG_INPUT_MISC=y + CONFIG_INPUT_MMA8450=y + CONFIG_INPUT_ISL29023=y + CONFIG_SERIO_SERPORT=m +-CONFIG_VT_HW_CONSOLE_BINDING=y + # CONFIG_LEGACY_PTYS is not set + # CONFIG_DEVKMEM is not set + CONFIG_SERIAL_IMX=y +@@ -229,10 +226,8 @@ CONFIG_SERIAL_IMX_CONSOLE=y + CONFIG_SERIAL_FSL_LPUART=y + CONFIG_SERIAL_FSL_LPUART_CONSOLE=y + CONFIG_FSL_OTP=y +-CONFIG_MXS_VIIM=y + # CONFIG_I2C_COMPAT is not set + CONFIG_I2C_CHARDEV=y +-CONFIG_I2C_MUX=y + CONFIG_I2C_MUX_GPIO=y + CONFIG_I2C_MUX_PCA954x=y + # CONFIG_I2C_HELPER_AUTO is not set +@@ -259,24 +254,21 @@ CONFIG_MFD_MC13XXX_I2C=y + CONFIG_MFD_MAX17135=y + CONFIG_MFD_SI476X_CORE=y + CONFIG_REGULATOR=y +-CONFIG_REGULATOR_DUMMY=y + CONFIG_REGULATOR_FIXED_VOLTAGE=y +-CONFIG_REGULATOR_DA9052=y + CONFIG_REGULATOR_ANATOP=y ++CONFIG_REGULATOR_DA9052=y ++CONFIG_REGULATOR_MAX17135=y + CONFIG_REGULATOR_MC13783=y + CONFIG_REGULATOR_MC13892=y +-CONFIG_REGULATOR_MAX17135=y + CONFIG_REGULATOR_PFUZE100=y + CONFIG_MEDIA_SUPPORT=y + CONFIG_MEDIA_CAMERA_SUPPORT=y + CONFIG_MEDIA_RADIO_SUPPORT=y +-CONFIG_VIDEO_V4L2_INT_DEVICE=y + CONFIG_MEDIA_USB_SUPPORT=y + CONFIG_USB_VIDEO_CLASS=m + CONFIG_V4L_PLATFORM_DRIVERS=y + CONFIG_VIDEO_MXC_OUTPUT=y + CONFIG_VIDEO_MXC_CAPTURE=m +-CONFIG_VIDEO_MXC_CSI_CAMERA=m + CONFIG_MXC_CAMERA_OV5640=m + CONFIG_MXC_CAMERA_OV5642=m + CONFIG_MXC_CAMERA_OV5640_MIPI=m +@@ -284,13 +276,13 @@ CONFIG_MXC_TVIN_ADV7180=m + CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m + CONFIG_VIDEO_MXC_IPU_OUTPUT=y + CONFIG_VIDEO_MXC_PXP_V4L2=y ++CONFIG_VIDEO_MXC_CSI_CAMERA=m + CONFIG_SOC_CAMERA=y + CONFIG_VIDEO_MX3=y + CONFIG_RADIO_SI476X=y + CONFIG_SOC_CAMERA_OV2640=y + CONFIG_DRM=y + CONFIG_DRM_VIVANTE=y +-CONFIG_FB=y + CONFIG_FB_MXS=y + CONFIG_BACKLIGHT_LCD_SUPPORT=y + CONFIG_LCD_CLASS_DEVICE=y +@@ -307,25 +299,20 @@ CONFIG_FB_MXC_EINK_PANEL=y + CONFIG_FB_MXS_SII902X=y + CONFIG_HANNSTAR_CABC=y + CONFIG_FRAMEBUFFER_CONSOLE=y +-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +-CONFIG_FONTS=y +-CONFIG_FONT_8x8=y +-CONFIG_FONT_8x16=y + CONFIG_LOGO=y + CONFIG_SOUND=y + CONFIG_SND=y + CONFIG_SND_USB_AUDIO=m + CONFIG_SND_SOC=y ++CONFIG_SND_SOC_FSL_ASRC=y ++CONFIG_SND_SOC_FSL_SAI=y ++CONFIG_SND_SOC_FSL_SSI=y ++CONFIG_SND_SOC_FSL_ESAI=y ++CONFIG_SND_SOC_IMX_AUDMUX=y + CONFIG_SND_IMX_SOC=y +-CONFIG_SND_SOC_EUKREA_TLV320=y +-CONFIG_SND_SOC_IMX_CS42888=y +-CONFIG_SND_SOC_IMX_WM8731=y +-CONFIG_SND_SOC_IMX_WM8962=y +-CONFIG_SND_SOC_IMX_SGTL5000=y + CONFIG_SND_SOC_IMX_SPDIF=y +-CONFIG_SND_SOC_IMX_MC13783=y + CONFIG_SND_SOC_IMX_HDMI=y +-CONFIG_SND_SOC_IMX_SI476X=y ++CONFIG_SND_SOC_CS42XX8_I2C=y + CONFIG_USB=y + CONFIG_USB_OTG=y + CONFIG_USB_EHCI_HCD=y +@@ -335,7 +322,6 @@ CONFIG_USB_STORAGE=y + CONFIG_USB_CHIPIDEA=y + CONFIG_USB_CHIPIDEA_UDC=y + CONFIG_USB_CHIPIDEA_HOST=y +-CONFIG_USB_PHY=y + CONFIG_NOP_USB_XCEIV=y + CONFIG_USB_MXS_PHY=y + CONFIG_USB_GADGET=y +@@ -352,7 +338,6 @@ CONFIG_MMC_SDHCI_PLTFM=y + CONFIG_MMC_SDHCI_ESDHC_IMX=y + CONFIG_MXC_IPU=y + CONFIG_MXC_GPU_VIV=y +-CONFIG_MXC_ASRC=y + CONFIG_MXC_MIPI_CSI2=y + CONFIG_MXC_MLB150=m + CONFIG_NEW_LEDS=y +@@ -371,7 +356,13 @@ CONFIG_MXC_PXP_V2=y + CONFIG_IMX_SDMA=y + CONFIG_MXS_DMA=y + CONFIG_STAGING=y +-CONFIG_COMMON_CLK_DEBUG=y ++CONFIG_DRM_IMX=y ++CONFIG_DRM_IMX_FB_HELPER=y ++CONFIG_DRM_IMX_PARALLEL_DISPLAY=y ++CONFIG_DRM_IMX_LDB=y ++CONFIG_DRM_IMX_IPUV3_CORE=y ++CONFIG_DRM_IMX_IPUV3=y ++CONFIG_DRM_IMX_HDMI=y + # CONFIG_IOMMU_SUPPORT is not set + CONFIG_PWM=y + CONFIG_PWM_IMX=y +@@ -416,7 +407,6 @@ CONFIG_MAGIC_SYSRQ=y + CONFIG_SECURITYFS=y + CONFIG_CRYPTO_USER=y + CONFIG_CRYPTO_TEST=m +-CONFIG_CRYPTO_CCM=y + CONFIG_CRYPTO_GCM=y + CONFIG_CRYPTO_CBC=y + CONFIG_CRYPTO_CTS=y +@@ -448,3 +438,6 @@ CONFIG_CRC_CCITT=m + CONFIG_CRC_T10DIF=y + CONFIG_CRC7=m + CONFIG_LIBCRC32C=m ++CONFIG_FONTS=y ++CONFIG_FONT_8x8=y ++CONFIG_FONT_8x16=y +-- +1.7.9.5 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/defconfig new file mode 100644 index 00000000..a247438e --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab-3.14.28/defconfig @@ -0,0 +1,443 @@ +CONFIG_LOCALVERSION="-cm-fx6" +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_PERF_EVENTS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_GPIO_PCA953X=y +CONFIG_ARCH_MXC=y +CONFIG_MXC_DEBUG_BOARD=y +CONFIG_MACH_IMX51_DT=y +CONFIG_MACH_EUKREA_CPUIMX51SD=y +CONFIG_SOC_IMX53=y +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6SL=y +CONFIG_SOC_IMX6SX=y +CONFIG_SOC_VF610=y +# CONFIG_SWP_EMULATE is not set +CONFIG_PCI=y +CONFIG_PCI_IMX6=y +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_CMA=y +CONFIG_CMDLINE="console=ttymxc3,115200 root=/dev/mmcblk0p1 rootwait" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_ARM_IMX6Q_CPUFREQ=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_BINFMT_MISC=m +CONFIG_PM_RUNTIME=y +CONFIG_PM_DEBUG=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_DEBUG=y +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m +CONFIG_NETFILTER_XT_TARGET_LED=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NOTRACK=m +CONFIG_NETFILTER_XT_TARGET_TEE=m +CONFIG_NETFILTER_XT_TARGET_TRACE=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_CPU=m +CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_OSF=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_RPFILTER=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_NF_NAT_IPV4=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_CAN=y +CONFIG_CAN_FLEXCAN=y +CONFIG_BT=m +CONFIG_BT_MRVL=m +CONFIG_BT_MRVL_SDIO=m +CONFIG_CFG80211=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_IMX_WEIM=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_SST25L=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_NAND_MXC=y +CONFIG_MTD_UBI=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_ATA=y +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_IMX=y +CONFIG_PATA_IMX=y +CONFIG_NETDEVICES=y +CONFIG_TUN=m +# CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_CS89x0=y +CONFIG_CS89x0_PLATFORM=y +# CONFIG_NET_VENDOR_FARADAY is not set +CONFIG_IGB=m +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_SMC91X=y +CONFIG_SMC911X=y +CONFIG_SMSC911X=y +# CONFIG_NET_VENDOR_STMICRO is not set +CONFIG_ATH_CARDS=y +CONFIG_ATH6KL=m +CONFIG_ATH6KL_SDIO=m +CONFIG_MWIFIEX=m +CONFIG_MWIFIEX_SDIO=m +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=m +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_IMX=y +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_EGALAX=y +CONFIG_TOUCHSCREEN_ELAN=y +CONFIG_TOUCHSCREEN_MAX11801=y +CONFIG_TOUCHSCREEN_MC13783=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MMA8450=y +CONFIG_INPUT_ISL29023=y +CONFIG_SERIO_SERPORT=m +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_FSL_OTP=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX_GPIO=y +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_IMX=y +CONFIG_SPI=y +CONFIG_SPI_IMX=y +CONFIG_GPIO_SYSFS=y +CONFIG_POWER_SUPPLY=y +CONFIG_SABRESD_MAX8903=y +CONFIG_IMX6_USB_CHARGER=y +CONFIG_SENSORS_MAX17135=y +CONFIG_SENSORS_MAG3110=y +CONFIG_THERMAL=y +CONFIG_CPU_THERMAL=y +CONFIG_IMX_THERMAL=y +CONFIG_DEVICE_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_MFD_DA9052_I2C=y +CONFIG_MFD_MC13XXX_SPI=y +CONFIG_MFD_MC13XXX_I2C=y +CONFIG_MFD_MAX17135=y +CONFIG_MFD_SI476X_CORE=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_DA9052=y +CONFIG_REGULATOR_MAX17135=y +CONFIG_REGULATOR_MC13783=y +CONFIG_REGULATOR_MC13892=y +CONFIG_REGULATOR_PFUZE100=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_CAPTURE=m +CONFIG_MXC_CAMERA_OV5640=m +CONFIG_MXC_CAMERA_OV5642=m +CONFIG_MXC_CAMERA_OV5640_MIPI=m +CONFIG_MXC_TVIN_ADV7180=m +CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +CONFIG_VIDEO_MXC_PXP_V4L2=y +CONFIG_VIDEO_MXC_CSI_CAMERA=m +CONFIG_SOC_CAMERA=y +CONFIG_VIDEO_MX3=y +CONFIG_RADIO_SI476X=y +CONFIG_SOC_CAMERA_OV2640=y +CONFIG_DRM=y +CONFIG_DRM_VIVANTE=y +CONFIG_FB_MXS=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_L4F00242T03=y +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_FB_MXC_SYNC_PANEL=y +CONFIG_FB_MXC_LDB=y +CONFIG_FB_MXC_MIPI_DSI=y +CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y +CONFIG_FB_MXC_HDMI=y +CONFIG_FB_MXC_EINK_PANEL=y +CONFIG_FB_MXS_SII902X=y +CONFIG_HANNSTAR_CABC=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_SOC=y +CONFIG_SND_SOC_FSL_ASRC=y +CONFIG_SND_SOC_FSL_SAI=y +CONFIG_SND_SOC_FSL_SSI=y +CONFIG_SND_SOC_FSL_ESAI=y +CONFIG_SND_SOC_IMX_AUDMUX=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_IMX_SPDIF=y +CONFIG_SND_SOC_IMX_HDMI=y +CONFIG_SND_SOC_CS42XX8_I2C=y +CONFIG_USB=y +CONFIG_USB_OTG=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MXC=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_GADGET=y +CONFIG_USB_FSL_USB2=y +CONFIG_USB_ZERO=m +CONFIG_USB_AUDIO=m +CONFIG_USB_ETH=m +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_MMC=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MXC_IPU=y +CONFIG_MXC_GPU_VIV=y +CONFIG_MXC_MIPI_CSI2=y +CONFIG_MXC_MLB150=m +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_EM3027=y +CONFIG_RTC_DRV_MC13XXX=y +CONFIG_RTC_DRV_MXC=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_MXC_PXP_V2=y +CONFIG_IMX_SDMA=y +CONFIG_MXS_DMA=y +CONFIG_STAGING=y +CONFIG_DRM_IMX=y +CONFIG_DRM_IMX_FB_HELPER=y +CONFIG_DRM_IMX_PARALLEL_DISPLAY=y +CONFIG_DRM_IMX_LDB=y +CONFIG_DRM_IMX_IPUV3_CORE=y +CONFIG_DRM_IMX_IPUV3=y +CONFIG_DRM_IMX_HDMI=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_PWM=y +CONFIG_PWM_IMX=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_UTF8=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +CONFIG_SECURITYFS=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_RMD128=y +CONFIG_CRYPTO_RMD160=y +CONFIG_CRYPTO_RMD256=y +CONFIG_CRYPTO_RMD320=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_TGR192=y +CONFIG_CRYPTO_WP512=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_CAMELLIA=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_TWOFISH=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y +CONFIG_CRC_CCITT=m +CONFIG_CRC_T10DIF=y +CONFIG_CRC7=m +CONFIG_LIBCRC32C=m +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab_3.14.28.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab_3.14.28.bb new file mode 100644 index 00000000..013b7969 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-compulab_3.14.28.bb @@ -0,0 +1,74 @@ +require recipes-kernel/linux/linux-imx.inc + +SUMMARY = "CompuLab 3.14.28 kernel" +DESCRIPTION = "Linux kernel for CompuLab cm-fx6 boards." + +DEPENDS += "lzop-native bc-native" + +SRCBRANCH = "imx_3.14.28_1.0.0_ga" +SRCREV = "91cf351a2afc17ac4a260e4d2ad1e32d00925a1b" +LOCALVERSION = "-cm-fx6" + +SRC_URI += "file://defconfig \ + file://0001-ARM-i.MX6-dts-Add-initial-support-for-cm-fx6.patch \ + file://0002-ARM-i.MX6-cm-fx6-Add-defconfig.patch \ + file://0003-igb-Enable-random-mac-address.patch \ + file://0004-ARM-i.MX6-cm-fx6-update-defconfig.patch \ + file://0005-ARM-i.MX6-dts-add-HDMI-and-DVI-support.patch \ + file://0006-ARM-i.MX6-dts-add-HDMI-Audio-support.patch \ + file://0007-ARM-i.MX6-dts-add-SPDIF-support.patch \ + file://0008-ARM-i.MX6-dts-add-Power-Button.patch \ + file://0009-ARM-i.MX6-dts-Enable-uart2-as-a-serial-console.patch \ + file://0010-ARM-i.MX6-dts-add-pcie-power-reset-gpio-definition.patch \ + file://0011-ARM-i.MX6-dts-add-onboard-SSD-pin-configuration.patch \ + file://0012-ARM-i.MX6-dts-add-onboard-SSD-power-up-sequence.patch \ + file://0013-ARM-i.MX6-dts-add-audio-mux-pinmux-configuration.patch \ + file://0014-ARM-i.MX6-dts-add-analog-audio-support.patch \ + file://0015-ARM-i.MX6-ASoC-add-imx-wm8731-machine-driver.patch \ + file://0016-ARM-i.MX6-ASoC-add-imx-wm8731-master-mode-support.patch \ + file://0017-ARM-i.MX6-dts-enable-v4l2-output.patch \ + file://0018-ARM-i.MX6-dts-some-small-changes-in-the-dts-file.patch \ + file://0019-igb-Define-the-device-mac-address-in-device-tree.patch \ + file://0020-ARM-i.MX6-cm-fx6-update-defconfig.patch \ + file://0021-ARM-i.MX6-dts-refactoring-the-cm-fx6-device-tree-fil.patch \ + file://0022-ARM-i.MX6-dts-refactoring-of-the-cm-fx6-device-tree-.patch \ + file://0023-ARM-i.MX6-dts-pcie-power-on-gpio-to-a-fixed-regulato.patch \ + file://0024-ARM-i.MX6-dts-add-i2c1-status-okay.patch \ + file://0025-ARM-i.MX6-dts-add-local-mac-address-field-for-fec.patch \ + file://0026-ARM-mxs-change-usb-phy-test-clock-gating.patch \ + file://0027-ARM-i.MX6-dts-fix-the-cm-fx6-operation-points.patch \ + file://0028-ARM-i.MX6-ASoC-fix-build-warnings-and-update-include.patch \ + file://0029-ARM-i.MX6-dts-change-issd-gpio-order.patch \ + file://0030-ARM-i.MX6-dts-add-missing-WiFi-BT-pinmuxes.patch \ + file://0031-ARM-i.MX6-cm-fx6-enable-i2cmux-in-defconfig.patch \ + file://0032-ARM-i.MX6-sb-fx6m-Fix-uart1-rts-cts-flow-control.patch \ + file://0033-ARM-i.MX6-dts-add-i2cmux-support-for-SBC-FX6-boards.patch \ + file://0034-ARM-i.MX6-dts-add-dvi-edid-GPIOs.patch \ + file://0035-video-mxc-IPUv3-fb-restore-sync-bits.patch \ + file://0036-ARM-i.MX6-dts-add-backlight-support-for-SBC-FX6-boar.patch \ + file://0037-ARM-i.MX6-dts-rearrangement-of-the-frame-buffers-def.patch \ + file://0038-ARM-i.MX6-iomux-raise-DSE-for-display-signals.patch \ + file://0039-ARM-i.MX6-cm-fx6-add-video-mode-for-KD050C-WVGA.patch \ + file://0040-ARM-i.MX6-cm-fx6-refactor-the-cm-fx6-iomux.patch \ + file://0041-ARM-i.MX6-dts-gpmi-separate-kernel-and-rootfs.patch \ + file://0042-ARM-dts-cm-fx6-enable-can-bus.patch \ + file://0043-ARM-dts-cm-fx6-add-tsc2046-touchscreen-support.patch \ + file://0044-ARM-i.MX6-sb-fx6x-refactoring-of-the-usdhc3-definiti.patch \ + file://0045-ARM-i.MX6-cm-fx6-fix-up-incorrect-compatibilities.patch \ + file://0046-ARM-i.MX6-dts-fix-include-file-order.patch \ + file://0047-ARM-i.MX6-dts-rename-the-sb-fx6-board-files.patch \ + file://0048-ARM-i.MX6-dts-refactor-the-sbc-fx6-target-files.patch \ + file://0049-ARM-i.MX6-cm-fx6-separate-DL-and-Quad-stuff.patch \ + file://0050-ARM-i.MX6-dts-add-initial-support-for-cm-fx6-DL-S.patch \ + file://0051-ARM-i.MX6-dts-add-board-files-for-sbc-fx6-DL-S.patch \ + file://0052-ARM-dts-cm-fx6-add-build-targets-for-cm-fx6-flavour-.patch \ + file://0053-ARM-dts-cm-fx6-change-the-hdmi_core-ipu-connection.patch \ + file://0054-ARM-i.MX6-dts-add-ldb-support-for-SBC-FX6-boards.patch \ + file://0055-ARM-dts-cm-fx6-IOMUXC_GPR1-6-7-to-set-correct-values.patch \ + file://0056-i2c-fix-i2c_of-include.patch \ + file://0057-ARM-dts-cm-fx6-fix-missing-defines.patch \ + file://0058-imx6-hdmi-add-missing-definition.patch \ + file://0059-ARM-i.MX6-cm-fx6-update-defconfig.patch \ +" + +COMPATIBLE_MACHINE = "(cm-fx6)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-congatec-4.9.11/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-congatec-4.9.11/defconfig new file mode 100755 index 00000000..e3217111 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-congatec-4.9.11/defconfig @@ -0,0 +1,457 @@ +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_KALLSYMS_ALL=y +CONFIG_PERF_EVENTS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_MXC=y +CONFIG_SOC_IMX50=y +CONFIG_SOC_IMX53=y +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6SL=y +CONFIG_SOC_IMX6SX=y +CONFIG_SOC_IMX6ULL=y +CONFIG_SOC_IMX7D=y +CONFIG_SOC_IMX6SLL=y +CONFIG_SOC_IMX7ULP=y +CONFIG_SOC_VF610=y +# CONFIG_SWP_EMULATE is not set +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_CMA=y +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_ARM_IMX6Q_CPUFREQ=y +CONFIG_ARM_IMX7D_CPUFREQ=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_BINFMT_MISC=m +CONFIG_PM_DEBUG=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +CONFIG_VLAN_8021Q=y +CONFIG_LLC2=y +CONFIG_CAN=y +CONFIG_CAN_FLEXCAN=y +CONFIG_CAN_M_CAN=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIBTUSB=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIBCM203X=y +CONFIG_BT_ATH3K=y +CONFIG_CFG80211=y +CONFIG_MAC80211=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=0 +CONFIG_IMX_WEIM=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_SST25L=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_NAND_MXC=y +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_SPI_FSL_QUADSPI=y +CONFIG_MTD_UBI=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_SENSORS_FXOS8700=y +CONFIG_SENSORS_FXAS2100X=y +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_ATA=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_IMX=y +CONFIG_PATA_IMX=y +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_CS89x0=y +CONFIG_CS89x0_PLATFORM=y +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_SMC91X=y +CONFIG_SMC911X=y +CONFIG_SMSC911X=y +# CONFIG_NET_VENDOR_STMICRO is not set +CONFIG_MICREL_PHY=y +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_CDC_EEM=m +CONFIG_BCMDHD=m +CONFIG_BCMDHD_SDIO=y +CONFIG_BCMDHD_FW_PATH="/lib/firmware/bcm/ZP_BCM4339/fw_bcmdhd.bin" +CONFIG_BCMDHD_NVRAM_PATH="/lib/firmware/bcm/ZP_BCM4339/bcmdhd.ZP.OOB.cal" +# CONFIG_RTL_CARDS is not set +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=m +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_RPMSG=y +CONFIG_KEYBOARD_PF1550_ONKEY=y +CONFIG_KEYBOARD_IMX=y +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=y +CONFIG_TOUCHSCREEN_EGALAX=y +CONFIG_TOUCHSCREEN_ELAN_TS=y +CONFIG_TOUCHSCREEN_MAX11801=y +CONFIG_TOUCHSCREEN_IMX6UL_TSC=y +CONFIG_TOUCHSCREEN_MC13783=y +CONFIG_TOUCHSCREEN_TSC2007=y +CONFIG_TOUCHSCREEN_STMPE=y +CONFIG_TOUCHSCREEN_FTS=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MMA8450=y +CONFIG_INPUT_PWM_BEEPER=y +CONFIG_INPUT_MPL3115=y +CONFIG_SENSOR_FXLS8471=y +CONFIG_INPUT_ISL29023=y +CONFIG_SERIO_SERPORT=m +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_FSL_OTP=y +CONFIG_HW_RANDOM_IMX_RNG=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX_GPIO=y +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_IMX=y +CONFIG_SPI=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_IMX=y +CONFIG_SPI_FSL_LPSPI=y +CONFIG_SPI_SPIDEV=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_MAX732X=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_74X164=y +CONFIG_POWER_SUPPLY=y +CONFIG_SABRESD_MAX8903=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_CHARGER_PF1550=y +CONFIG_SENSORS_MAX17135=y +CONFIG_SENSORS_MAG3110=y +CONFIG_THERMAL=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_CPU_THERMAL=y +CONFIG_IMX_THERMAL=y +CONFIG_DEVICE_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_MFD_DA9052_I2C=y +CONFIG_MFD_MC13XXX_SPI=y +CONFIG_MFD_MC13XXX_I2C=y +CONFIG_MFD_PF1550=y +CONFIG_MFD_MAX17135=y +CONFIG_MFD_SI476X_CORE=y +CONFIG_MFD_STMPE=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_DA9052=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_MAX17135=y +CONFIG_REGULATOR_MC13783=y +CONFIG_REGULATOR_MC13892=y +CONFIG_REGULATOR_PFUZE100=y +CONFIG_REGULATOR_PF1550=y +CONFIG_REGULATOR_PF1550_RPMSG=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_RC_SUPPORT=y +CONFIG_RC_DEVICES=y +CONFIG_IR_GPIO_CIR=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_CAPTURE=m +CONFIG_MXC_CAMERA_OV5640=m +CONFIG_MXC_CAMERA_OV5642=m +CONFIG_MXC_CAMERA_OV5640_MIPI=m +CONFIG_MXC_TVIN_ADV7180=m +CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +CONFIG_VIDEO_MXC_PXP_V4L2=y +CONFIG_VIDEO_MXC_CSI_CAMERA=m +CONFIG_MXC_VADC=m +CONFIG_MXC_MIPI_CSI=m +CONFIG_MXC_CAMERA_OV5647_MIPI=m +CONFIG_SOC_CAMERA=y +CONFIG_V4L_MEM2MEM_DRIVERS=y +CONFIG_VIDEO_CODA=y +CONFIG_RADIO_SI476X=y +CONFIG_SOC_CAMERA_OV2640=y +CONFIG_DRM=y +CONFIG_DRM_VIVANTE=y +CONFIG_FB_MXS=y +CONFIG_FB_MXC_SYNC_PANEL=y +CONFIG_FB_MXC_OVERLAY=y +CONFIG_FB_MXC_MIPI_DSI=y +CONFIG_FB_MXC_MIPI_DSI_SAMSUNG=y +CONFIG_FB_MXC_MIPI_DSI_NORTHWEST=y +CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y +CONFIG_FB_MXC_LDB=y +CONFIG_FB_MXC_HDMI=y +CONFIG_FB_MXS_SII902X=y +CONFIG_FB_MXC_DCIC=m +CONFIG_FB_MXC_ADV7535=y +CONFIG_HANNSTAR_CABC=y +CONFIG_FB_MXC_EINK_PANEL=y +CONFIG_FB_MXC_EINK_V2_PANEL=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_L4F00242T03=y +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_SOC=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_EUKREA_TLV320=y +CONFIG_SND_SOC_IMX_WM8960=y +CONFIG_SND_SOC_IMX_SII902X=y +CONFIG_SND_SOC_IMX_WM8958=y +CONFIG_SND_SOC_IMX_CS42888=y +CONFIG_SND_SOC_IMX_WM8962=y +CONFIG_SND_SOC_IMX_RPMSG=y +CONFIG_SND_SOC_IMX_SGTL5000=y +CONFIG_SND_SOC_IMX_MQS=y +CONFIG_SND_SOC_IMX_SPDIF=y +CONFIG_SND_SOC_IMX_MC13783=y +CONFIG_SND_SOC_IMX_SI476X=y +CONFIG_SND_SOC_IMX_HDMI=y +CONFIG_USB=y +CONFIG_USB_OTG_WHITELIST=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MXC=y +CONFIG_USB_HCD_TEST_MODE=y +CONFIG_USB_ACM=m +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_TEST=m +CONFIG_USB_EHSET_TEST_FIXTURE=m +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V3_PRE=y +CONFIG_MXC_GPU_VIV=y +CONFIG_MXC_SIM=y +CONFIG_MXC_MIPI_CSI2=y +CONFIG_MXC_HDMI_CEC=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_M41T80=y +CONFIG_RTC_DRV_MC13XXX=y +CONFIG_RTC_DRV_MXC=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_FSL_EDMA=y +CONFIG_IMX_SDMA=y +CONFIG_MXS_DMA=y +CONFIG_MXC_PXP_V2=y +CONFIG_MXC_PXP_V3=y +CONFIG_DMATEST=m +CONFIG_STAGING=y +CONFIG_STAGING_MEDIA=y +CONFIG_ION=y +CONFIG_ION_MXC=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_EXTCON_USB_GPIO=y +CONFIG_IIO=y +CONFIG_IMX7D_ADC=y +CONFIG_VF610_ADC=y +CONFIG_PWM=y +CONFIG_PWM_IMX=y +CONFIG_PWM_TPM=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NFSD=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_UTF8=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +CONFIG_SECURITYFS=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_RMD128=y +CONFIG_CRYPTO_RMD160=y +CONFIG_CRYPTO_RMD256=y +CONFIG_CRYPTO_RMD320=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_TGR192=y +CONFIG_CRYPTO_WP512=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_CAMELLIA=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y +CONFIG_CRYPTO_DEV_MXS_DCP=y +CONFIG_CRC_CCITT=m +CONFIG_CRC_T10DIF=y +CONFIG_CRC7=m +CONFIG_LIBCRC32C=m +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_FHANDLE=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-congatec_4.9.11.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-congatec_4.9.11.bb new file mode 100755 index 00000000..76880f37 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-congatec_4.9.11.bb @@ -0,0 +1,16 @@ +# Congatec QMX6 Linux/kernel + +LICENSE = "GPLv2" + +require recipes-kernel/linux/linux-imx.inc + +DEPENDS += "lzop-native bc-native" + +SRCBRANCH = "cgt_imx_4.9.11_1.0.0" + +SRC_URI = "git://git.congatec.com/arm/imx6_kernel_4.9.git;protocol=http;branch=${SRCBRANCH} \ + file://defconfig \ + " +SRCREV = "da3c7d59e10b8c83087c9bd40de49a4fec1247f7" + +COMPATIBLE_MACHINE = "(cgtqmx6|cgtumx6|cgtimx6)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx.inc b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx.inc new file mode 100644 index 00000000..8d135f01 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx.inc @@ -0,0 +1,21 @@ +# Copyright (C) 2013 Marek Vasut <marex@denx.de> +# Released under the MIT license (see COPYING.MIT for the terms) + +SUMMARY = "DENX mainline based Linux kernel" +LICENSE = "GPLv2" +LIC_FILES_CHKSUM = "file://COPYING;md5=d7810fab7487fb0aad327b76f1be7cd7" +DEPENDS += "lzop-native" +PROVIDES = "virtual/kernel linux-mainline" + +inherit kernel + +require recipes-kernel/linux/linux-imx.inc + +# Avoid imx-test installation hacks +IMX_TEST_SUPPORT = "n" + +SRCBRANCH ?= "master" +SRC_URI = "git://git.denx.de/linux-denx.git;branch=${SRCBRANCH} \ + file://defconfig" + +LOCALVERSION = "-master" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx/m53evk/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx/m53evk/defconfig new file mode 100644 index 00000000..23b29af6 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx/m53evk/defconfig @@ -0,0 +1,290 @@ +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_KERNEL_LZMA=y +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_RELAY=y +CONFIG_EXPERT=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_MULTI_V6=y +CONFIG_ARCH_MXC=y +CONFIG_MACH_MX31LILLY=y +CONFIG_MACH_MX31LITE=y +CONFIG_MACH_PCM037=y +CONFIG_MACH_PCM037_EET=y +CONFIG_MACH_MX31_3DS=y +CONFIG_MACH_MX31MOBOARD=y +CONFIG_MACH_QONG=y +CONFIG_MACH_ARMADILLO5X0=y +CONFIG_MACH_KZM_ARM11_01=y +CONFIG_MACH_PCM043=y +CONFIG_MACH_MX35_3DS=y +CONFIG_MACH_VPR200=y +CONFIG_MACH_IMX51_DT=y +CONFIG_MACH_MX51_BABBAGE=y +CONFIG_MACH_EUKREA_CPUIMX51SD=y +CONFIG_SOC_IMX53=y +CONFIG_SOC_IMX6Q=y +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_BINFMT_MISC=m +CONFIG_PM_DEBUG=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_CAN=y +# CONFIG_CAN_BCM is not set +# CONFIG_CAN_GW is not set +CONFIG_CAN_FLEXCAN=y +# CONFIG_WIRELESS is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_SST25L=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_MXC=y +CONFIG_MTD_UBI=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_ATA=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_PATA_IMX=y +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_CS89x0=y +CONFIG_CS89x0_PLATFORM=y +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_SMC91X=y +CONFIG_SMC911X=y +CONFIG_SMSC911X=y +# CONFIG_NET_VENDOR_STMICRO is not set +CONFIG_AT803X_PHY=y +CONFIG_AMD_PHY=y +CONFIG_MARVELL_PHY=y +CONFIG_DAVICOM_PHY=y +CONFIG_QSEMI_PHY=y +CONFIG_LXT_PHY=y +CONFIG_CICADA_PHY=y +CONFIG_VITESSE_PHY=y +CONFIG_SMSC_PHY=y +CONFIG_BROADCOM_PHY=y +CONFIG_BCM87XX_PHY=y +CONFIG_ICPLUS_PHY=y +CONFIG_REALTEK_PHY=y +CONFIG_NATIONAL_PHY=y +CONFIG_STE10XP=y +CONFIG_LSI_ET1011C_PHY=y +CONFIG_MICREL_PHY=y +# CONFIG_WLAN is not set +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=800 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=m +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_IMX=y +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_MC13783=y +CONFIG_TOUCHSCREEN_STMPE=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MMA8450=y +CONFIG_SERIO_SERPORT=m +CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_MXC_RNGA=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_IMX=y +CONFIG_SPI=y +CONFIG_SPI_IMX=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_MC9S08DZ60=y +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_MFD_STMPE=y +CONFIG_MFD_DA9052_I2C=y +CONFIG_MFD_MC13XXX_SPI=y +CONFIG_MFD_MC13XXX_I2C=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DA9052=y +CONFIG_REGULATOR_MC13783=y +CONFIG_REGULATOR_MC13892=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_SOC_CAMERA=y +CONFIG_VIDEO_MX3=y +CONFIG_SOC_CAMERA_OV2640=y +CONFIG_DRM=y +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_OF_VIDEOMODE=y +CONFIG_FIRMWARE_EDID=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_L4F00242T03=y +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_SEQUENCER=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_HRTIMER=y +CONFIG_SND_SOC=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_PHYCORE_AC97=y +CONFIG_SND_SOC_EUKREA_TLV320=y +CONFIG_SND_SOC_IMX_SGTL5000=y +CONFIG_SND_SOC_IMX_MC13783=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_STORAGE=y +CONFIG_USB_MXS_PHY=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_M41T80=y +CONFIG_RTC_DRV_MC13XXX=y +CONFIG_RTC_DRV_MXC=y +CONFIG_DMADEVICES=y +CONFIG_IMX_SDMA=y +CONFIG_MXS_DMA=y +CONFIG_STAGING=y +CONFIG_DRM_IMX=y +CONFIG_DRM_IMX_FB_HELPER=y +CONFIG_DRM_IMX_PARALLEL_DISPLAY=y +CONFIG_DRM_IMX_IPUV3_CORE=y +CONFIG_DRM_IMX_IPUV3=y +CONFIG_COMMON_CLK_DEBUG=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_PWM=y +CONFIG_PWM_IMX=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_CONFIGFS_FS=m +CONFIG_JFFS2_FS=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_FTRACE is not set +# CONFIG_ARM_UNWIND is not set +CONFIG_SECURITYFS=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_HW is not set +CONFIG_CRC_CCITT=m +CONFIG_CRC_T10DIF=y +CONFIG_CRC7=m +CONFIG_LIBCRC32C=m diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx_3.9.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx_3.9.bb new file mode 100644 index 00000000..a5328671 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-denx_3.9.bb @@ -0,0 +1,10 @@ +# Copyright (C) 2013 Marek Vasut <marex@denx.de> +# Released under the MIT license (see COPYING.MIT for the terms) + +include linux-denx.inc + +# m53evk +SRCREV_m53evk = "7c75b82904fa555ce7988b97619b85a436a8ed12" +SRCBRANCH_m53evk = "m53evk-rel-2013-05-02-v3.9" + +COMPATIBLE_MACHINE = "(m53evk)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0001-MLK-11719-4-mtd-gpmi-change-the-BCH-layout-setting-f.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0001-MLK-11719-4-mtd-gpmi-change-the-BCH-layout-setting-f.patch new file mode 100644 index 00000000..c2b81030 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0001-MLK-11719-4-mtd-gpmi-change-the-BCH-layout-setting-f.patch @@ -0,0 +1,552 @@ +From: Alex Gonzalez <alex.gonzalez@digi.com> +Date: Fri, 24 Aug 2018 18:53:40 +0200 +Subject: [PATCH] MLK-11719-4: mtd: gpmi: change the BCH layout setting for + large oob NAND +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The cod change updated the NAND driver BCH ECC layout algorithm to +support large oob size NAND chips(oob > 1024 bytes) and proposed a new +way to set ECC layout. + +Current implementation requires each chunk size larger than oob size so +the bad block marker (BBM) can be guaranteed located in data chunk. The +ECC layout always using the unbalanced layout(Ecc for both meta and +Data0 chunk), but for the NAND chips with oob larger than 1k, the driver +cannot support because BCH doesn’t support GF 15 for 2K chunk. + +The change keeps the data chunk no larger than 1k and adjust the ECC +strength or ECC layout to locate the BBM in data chunk. General idea for +large oob NAND chips is + +1.Try all ECC strength from the minimum value required by NAND spec to +the maximum one that works, any ECC makes the BBM locate in data chunk +can be chosen. + +2.If none of them works, using separate ECC for meta, which will add one +extra ecc with the same ECC strength as other data chunks. This extra +ECC can guarantee BBM located in data chunk, of course, we need to check +if oob can afford it. + +Previous code has two methods for ECC layout setting, the +legacy_set_geometry and set_geometry_by_ecc_info, the difference +between these two methods is, legacy_set_geometry set the chunk size +larger chan oob size and then set the maximum ECC strength that oob can +afford. While the set_geometry_by_ecc_info set chunk size and ECC +strength according to NAND spec. It has been proved that the first +method cannot provide safe ECC strength for some modern NAND chips, so +in current code, + +1. Driver read NAND parameters first and then chose the proper ECC +layout setting method. + +2. If the oob is large or NAND required data chunk larger than oob size, +chose set_geometry_for_large_oob, otherwise use set_geometry_by_ecc_info + +3. legacy_set_geometry only used for some NAND chips does not contains +necessary information. So this is only a backup plan, it is NOT +recommended to use these NAND chips. + +Signed-off-by: Han Xu <b45815@freescale.com> +(cherry picked from commit 78e8beff734adb72185405ae2cb55e0097eb96cb) +Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com> +--- + drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c | 16 +- + drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 269 ++++++++++++++++++++++++----- + drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h | 12 +- + 3 files changed, 248 insertions(+), 49 deletions(-) + +diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c +index 88ea2203e263..a4cd9523e220 100644 +--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c ++++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c +@@ -212,7 +212,8 @@ void gpmi_dump_info(struct gpmi_nand_data *this) + "ECC Strength : %u\n" + "Page Size in Bytes : %u\n" + "Metadata Size in Bytes : %u\n" +- "ECC Chunk Size in Bytes: %u\n" ++ "ECC Chunk0 Size in Bytes: %u\n" ++ "ECC Chunkn Size in Bytes: %u\n" + "ECC Chunk Count : %u\n" + "Payload Size in Bytes : %u\n" + "Auxiliary Size in Bytes: %u\n" +@@ -223,7 +224,8 @@ void gpmi_dump_info(struct gpmi_nand_data *this) + geo->ecc_strength, + geo->page_size, + geo->metadata_size, +- geo->ecc_chunk_size, ++ geo->ecc_chunk0_size, ++ geo->ecc_chunkn_size, + geo->ecc_chunk_count, + geo->payload_size, + geo->auxiliary_size, +@@ -238,7 +240,8 @@ int bch_set_geometry(struct gpmi_nand_data *this) + struct resources *r = &this->resources; + struct bch_geometry *bch_geo = &this->bch_geometry; + unsigned int block_count; +- unsigned int block_size; ++ unsigned int block0_size; ++ unsigned int blockn_size; + unsigned int metadata_size; + unsigned int ecc_strength; + unsigned int page_size; +@@ -250,7 +253,8 @@ int bch_set_geometry(struct gpmi_nand_data *this) + return ret; + + block_count = bch_geo->ecc_chunk_count - 1; +- block_size = bch_geo->ecc_chunk_size; ++ block0_size = bch_geo->ecc_chunk0_size; ++ blockn_size = bch_geo->ecc_chunkn_size; + metadata_size = bch_geo->metadata_size; + ecc_strength = bch_geo->ecc_strength >> 1; + page_size = bch_geo->page_size; +@@ -277,13 +281,13 @@ int bch_set_geometry(struct gpmi_nand_data *this) + | BF_BCH_FLASH0LAYOUT0_META_SIZE(metadata_size) + | BF_BCH_FLASH0LAYOUT0_ECC0(ecc_strength, this) + | BF_BCH_FLASH0LAYOUT0_GF(gf_len, this) +- | BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(block_size, this), ++ | BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(block0_size, this), + r->bch_regs + HW_BCH_FLASH0LAYOUT0); + + writel(BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size) + | BF_BCH_FLASH0LAYOUT1_ECCN(ecc_strength, this) + | BF_BCH_FLASH0LAYOUT1_GF(gf_len, this) +- | BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(block_size, this), ++ | BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(blockn_size, this), + r->bch_regs + HW_BCH_FLASH0LAYOUT1); + + /* Set *all* chip selects to use layout 0. */ +diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +index 1c1ebbc82824..bc4a364e5696 100644 +--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c ++++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +@@ -179,6 +179,36 @@ static inline bool gpmi_check_ecc(struct gpmi_nand_data *this) + return geo->ecc_strength <= this->devdata->bch_max_ecc_strength; + } + ++static inline bool bbm_in_data_chunk(struct gpmi_nand_data *this, ++ unsigned int *chunk_num) ++{ ++ struct bch_geometry *geo = &this->bch_geometry; ++ struct mtd_info *mtd = &this->nand.mtd; ++ unsigned int i, j; ++ ++ if (geo->ecc_chunk0_size != geo->ecc_chunkn_size) { ++ dev_err(this->dev, "The size of chunk0 must equal to chunkn\n"); ++ return false; ++ } ++ ++ i = (mtd->writesize * 8 - geo->metadata_size * 8) / ++ (geo->gf_len * geo->ecc_strength + ++ geo->ecc_chunkn_size * 8); ++ ++ j = (mtd->writesize * 8 - geo->metadata_size * 8) - ++ (geo->gf_len * geo->ecc_strength + ++ geo->ecc_chunkn_size * 8) * i; ++ ++ if (j < geo->ecc_chunkn_size * 8) { ++ *chunk_num = i+1; ++ dev_dbg(this->dev, "Set ecc to %d and bbm in chunk %d\n", ++ geo->ecc_strength, *chunk_num); ++ return true; ++ } ++ ++ return false; ++} ++ + /* + * If we can get the ECC information from the nand chip, we do not + * need to calculate them ourselves. +@@ -207,13 +237,14 @@ static int set_geometry_by_ecc_info(struct gpmi_nand_data *this, + chip->ecc_strength_ds, chip->ecc_step_ds); + return -EINVAL; + } +- geo->ecc_chunk_size = ecc_step; +- geo->ecc_strength = round_up(ecc_strength, 2); ++ geo->ecc_chunk0_size = chip->ecc_step_ds; ++ geo->ecc_chunkn_size = chip->ecc_step_ds; ++ geo->ecc_strength = round_up(chip->ecc_strength_ds, 2); + if (!gpmi_check_ecc(this)) + return -EINVAL; + + /* Keep the C >= O */ +- if (geo->ecc_chunk_size < mtd->oobsize) { ++ if (geo->ecc_chunkn_size < mtd->oobsize) { + dev_err(this->dev, + "unsupported nand chip. ecc size: %d, oob size : %d\n", + ecc_step, mtd->oobsize); +@@ -223,7 +254,7 @@ static int set_geometry_by_ecc_info(struct gpmi_nand_data *this, + /* The default value, see comment in the legacy_set_geometry(). */ + geo->metadata_size = 10; + +- geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; ++ geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunkn_size; + + /* + * Now, the NAND chip with 2K page(data chunk is 512byte) shows below: +@@ -295,6 +326,129 @@ static int set_geometry_by_ecc_info(struct gpmi_nand_data *this, + return 0; + } + ++static int set_geometry_for_large_oob(struct gpmi_nand_data *this) ++{ ++ struct bch_geometry *geo = &this->bch_geometry; ++ struct mtd_info *mtd = &this->nand.mtd; ++ struct nand_chip *chip = mtd->priv; ++ unsigned int block_mark_bit_offset; ++ unsigned int max_ecc; ++ unsigned int bbm_chunk; ++ unsigned int i; ++ ++ ++ /* sanity check for the minimum ecc nand required */ ++ if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) ++ return -EINVAL; ++ geo->ecc_strength = chip->ecc_strength_ds; ++ ++ /* check if platform can support this nand */ ++ if (!gpmi_check_ecc(this)) { ++ dev_err(this->dev, "unsupported NAND chip, minimum ecc required %d\n" ++ , geo->ecc_strength); ++ return -EINVAL; ++ } ++ ++ /* calculate the maximum ecc platform can support*/ ++ geo->metadata_size = 10; ++ geo->gf_len = 14; ++ geo->ecc_chunk0_size = 1024; ++ geo->ecc_chunkn_size = 1024; ++ geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunkn_size; ++ max_ecc = min(get_ecc_strength(this), ++ this->devdata->bch_max_ecc_strength); ++ ++ /* search a supported ecc strength that makes bbm */ ++ /* located in data chunk */ ++ geo->ecc_strength = chip->ecc_strength_ds; ++ while (!(geo->ecc_strength > max_ecc)) { ++ if (bbm_in_data_chunk(this, &bbm_chunk)) ++ goto geo_setting; ++ geo->ecc_strength += 2; ++ } ++ ++ /* if none of them works, keep using the minimum ecc */ ++ /* nand required but changing ecc page layout */ ++ geo->ecc_strength = chip->ecc_strength_ds; ++ /* add extra ecc for meta data */ ++ geo->ecc_chunk0_size = 0; ++ geo->ecc_chunk_count = (mtd->writesize / geo->ecc_chunkn_size) + 1; ++ geo->ecc_for_meta = 1; ++ /* check if oob can afford this extra ecc chunk */ ++ if (mtd->oobsize * 8 < geo->metadata_size * 8 + ++ geo->gf_len * geo->ecc_strength ++ * geo->ecc_chunk_count) { ++ dev_err(this->dev, "unsupported NAND chip with new layout\n"); ++ return -EINVAL; ++ } ++ ++ /* calculate in which chunk bbm located */ ++ bbm_chunk = (mtd->writesize * 8 - geo->metadata_size * 8 - ++ geo->gf_len * geo->ecc_strength) / ++ (geo->gf_len * geo->ecc_strength + ++ geo->ecc_chunkn_size * 8) + 1; ++ ++geo_setting: ++ ++ geo->page_size = mtd->writesize + mtd->oobsize; ++ geo->payload_size = mtd->writesize; ++ ++ /* ++ * The auxiliary buffer contains the metadata and the ECC status. The ++ * metadata is padded to the nearest 32-bit boundary. The ECC status ++ * contains one byte for every ECC chunk, and is also padded to the ++ * nearest 32-bit boundary. ++ */ ++ geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); ++ geo->auxiliary_size = ALIGN(geo->metadata_size, 4) ++ + ALIGN(geo->ecc_chunk_count, 4); ++ ++ if (!this->swap_block_mark) ++ return 0; ++ ++ /* calculate the number of ecc chunk behind the bbm */ ++ i = (mtd->writesize / geo->ecc_chunkn_size) - bbm_chunk + 1; ++ ++ block_mark_bit_offset = mtd->writesize * 8 - ++ (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - i) ++ + geo->metadata_size * 8); ++ ++ geo->block_mark_byte_offset = block_mark_bit_offset / 8; ++ geo->block_mark_bit_offset = block_mark_bit_offset % 8; ++ ++ dev_dbg(this->dev, "BCH Geometry :\n" ++ "GF length : %u\n" ++ "ECC Strength : %u\n" ++ "Page Size in Bytes : %u\n" ++ "Metadata Size in Bytes : %u\n" ++ "ECC Chunk0 Size in Bytes: %u\n" ++ "ECC Chunkn Size in Bytes: %u\n" ++ "ECC Chunk Count : %u\n" ++ "Payload Size in Bytes : %u\n" ++ "Auxiliary Size in Bytes: %u\n" ++ "Auxiliary Status Offset: %u\n" ++ "Block Mark Byte Offset : %u\n" ++ "Block Mark Bit Offset : %u\n" ++ "Block Mark in chunk : %u\n" ++ "Ecc for Meta data : %u\n", ++ geo->gf_len, ++ geo->ecc_strength, ++ geo->page_size, ++ geo->metadata_size, ++ geo->ecc_chunk0_size, ++ geo->ecc_chunkn_size, ++ geo->ecc_chunk_count, ++ geo->payload_size, ++ geo->auxiliary_size, ++ geo->auxiliary_status_offset, ++ geo->block_mark_byte_offset, ++ geo->block_mark_bit_offset, ++ bbm_chunk, ++ geo->ecc_for_meta); ++ ++ return 0; ++} ++ + static int legacy_set_geometry(struct gpmi_nand_data *this) + { + struct bch_geometry *geo = &this->bch_geometry; +@@ -314,13 +468,15 @@ static int legacy_set_geometry(struct gpmi_nand_data *this) + geo->gf_len = 13; + + /* The default for chunk size. */ +- geo->ecc_chunk_size = 512; +- while (geo->ecc_chunk_size < mtd->oobsize) { +- geo->ecc_chunk_size *= 2; /* keep C >= O */ ++ geo->ecc_chunk0_size = 512; ++ geo->ecc_chunkn_size = 512; ++ while (geo->ecc_chunkn_size < mtd->oobsize) { ++ geo->ecc_chunk0_size *= 2; /* keep C >= O */ ++ geo->ecc_chunkn_size *= 2; /* keep C >= O */ + geo->gf_len = 14; + } + +- geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; ++ geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunkn_size; + + /* We use the same ECC strength for all chunks. */ + geo->ecc_strength = get_ecc_strength(this); +@@ -409,22 +565,25 @@ static int legacy_set_geometry(struct gpmi_nand_data *this) + + int common_nfc_set_geometry(struct gpmi_nand_data *this) + { +- struct nand_chip *chip = &this->nand; ++ struct mtd_info *mtd = &this->nand.mtd; ++ struct nand_chip *chip = mtd_to_nand(mtd); + +- if (chip->ecc.strength > 0 && chip->ecc.size > 0) +- return set_geometry_by_ecc_info(this, chip->ecc.strength, +- chip->ecc.size); ++ if (chip->ecc_strength_ds > this->devdata->bch_max_ecc_strength) { ++ dev_err(this->dev, ++ "unsupported NAND chip, minimum ecc required %d\n" ++ , chip->ecc_strength_ds); ++ return -EINVAL; ++ } + +- if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")) +- || legacy_set_geometry(this)) { +- if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) +- return -EINVAL; ++ if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0) && ++ !(mtd->oobsize > 1024)) ++ return legacy_set_geometry(this); + +- return set_geometry_by_ecc_info(this, chip->ecc_strength_ds, +- chip->ecc_step_ds); +- } ++ if (mtd->oobsize > 1024 || chip->ecc_step_ds < mtd->oobsize) ++ return set_geometry_for_large_oob(this); + +- return 0; ++ return set_geometry_by_ecc_info(this, chip->ecc_strength_ds, ++ chip->ecc_step_ds); + } + + struct dma_chan *get_dma_chan(struct gpmi_nand_data *this) +@@ -997,7 +1156,8 @@ static int gpmi_ecc_read_page_data(struct nand_chip *chip, + + /* Read ECC bytes into our internal raw_buffer */ + offset = nfc_geo->metadata_size * 8; +- offset += ((8 * nfc_geo->ecc_chunk_size) + eccbits) * (i + 1); ++ offset += ((8 * nfc_geo->ecc_chunkn_size) + eccbits) * ++ (i + 1); + offset -= eccbits; + bitoffset = offset % 8; + eccbytes = DIV_ROUND_UP(offset + eccbits, 8); +@@ -1034,19 +1194,19 @@ static int gpmi_ecc_read_page_data(struct nand_chip *chip, + if (i == 0) { + /* The first block includes metadata */ + flips = nand_check_erased_ecc_chunk( +- buf + i * nfc_geo->ecc_chunk_size, +- nfc_geo->ecc_chunk_size, +- eccbuf, eccbytes, +- this->auxiliary_virt, +- nfc_geo->metadata_size, +- nfc_geo->ecc_strength); ++ buf + i * nfc_geo->ecc_chunkn_size, ++ nfc_geo->ecc_chunkn_size, ++ eccbuf, eccbytes, ++ this->payload_virt, ++ nfc_geo->metadata_size, ++ nfc_geo->ecc_strength); + } else { + flips = nand_check_erased_ecc_chunk( +- buf + i * nfc_geo->ecc_chunk_size, +- nfc_geo->ecc_chunk_size, +- eccbuf, eccbytes, +- NULL, 0, +- nfc_geo->ecc_strength); ++ buf + i * nfc_geo->ecc_chunkn_size, ++ nfc_geo->ecc_chunkn_size, ++ eccbuf, eccbytes, ++ NULL, 0, ++ nfc_geo->ecc_strength); + } + + if (flips > 0) { +@@ -1134,9 +1294,24 @@ static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, + } + } + ++ /* ++ * if there is an ECC dedicate for meta: ++ * - need to add an extra ECC size when calculating col and page_size, ++ * if the meta size is NOT zero. ++ * ++ * - chunk0 size need to set to the same size as other chunks, ++ * if the meta size is zero. ++ */ ++ + meta = geo->metadata_size; + if (first) { +- col = meta + (size + ecc_parity_size) * first; ++ if (geo->ecc_for_meta) ++ col = meta + ecc_parity_size ++ + (size + ecc_parity_size) * first; ++ else ++ col = meta + (size + ecc_parity_size) * first; ++ ++ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, col, -1); + meta = 0; + buf = buf + first * size; + } +@@ -1149,21 +1324,37 @@ static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, + + /* change the BCH registers and bch_geometry{} */ + n = last - first + 1; +- page_size = meta + (size + ecc_parity_size) * n; ++ ++ if (geo->ecc_for_meta && meta) ++ page_size = meta + ecc_parity_size ++ + (size + ecc_parity_size) * n; ++ else ++ page_size = meta + (size + ecc_parity_size) * n; + + r1_new &= ~(BM_BCH_FLASH0LAYOUT0_NBLOCKS | + BM_BCH_FLASH0LAYOUT0_META_SIZE); +- r1_new |= BF_BCH_FLASH0LAYOUT0_NBLOCKS(n - 1) ++ r1_new |= BF_BCH_FLASH0LAYOUT0_NBLOCKS( ++ (geo->ecc_for_meta && meta) ? n : n - 1) + | BF_BCH_FLASH0LAYOUT0_META_SIZE(meta); ++ ++ /* set chunk0 size if meta size is 0 */ ++ if (!meta) { ++ if (GPMI_IS_MX6(this)) ++ r1_new &= ~MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE; ++ else ++ r1_new &= ~BM_BCH_FLASH0LAYOUT0_DATA0_SIZE; ++ r1_new |= BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(size, this); ++ } + writel(r1_new, bch_regs + HW_BCH_FLASH0LAYOUT0); + + r2_new &= ~BM_BCH_FLASH0LAYOUT1_PAGE_SIZE; + r2_new |= BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size); + writel(r2_new, bch_regs + HW_BCH_FLASH0LAYOUT1); + +- geo->ecc_chunk_count = n; ++ geo->ecc_chunk_count = (geo->ecc_for_meta && meta) ? n + 1 : n; + geo->payload_size = n * size; + geo->page_size = page_size; ++ geo->metadata_size = meta; + geo->auxiliary_status_offset = ALIGN(meta, 4); + + dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n", +@@ -1386,7 +1577,7 @@ static int gpmi_ecc_read_page_raw(struct mtd_info *mtd, + { + struct gpmi_nand_data *this = nand_get_controller_data(chip); + struct bch_geometry *nfc_geo = &this->bch_geometry; +- int eccsize = nfc_geo->ecc_chunk_size; ++ int eccsize = nfc_geo->ecc_chunkn_size; + int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; + u8 *tmp_buf = this->raw_buffer; + size_t src_bit_off; +@@ -1471,7 +1662,7 @@ static int gpmi_ecc_write_page_raw(struct mtd_info *mtd, + { + struct gpmi_nand_data *this = nand_get_controller_data(chip); + struct bch_geometry *nfc_geo = &this->bch_geometry; +- int eccsize = nfc_geo->ecc_chunk_size; ++ int eccsize = nfc_geo->ecc_chunkn_size; + int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; + u8 *tmp_buf = this->raw_buffer; + uint8_t *oob = chip->oob_poi; +@@ -1847,7 +2038,7 @@ static int gpmi_init_last(struct gpmi_nand_data *this) + ecc->read_oob_raw = gpmi_ecc_read_oob_raw; + ecc->write_oob_raw = gpmi_ecc_write_oob_raw; + ecc->mode = NAND_ECC_HW; +- ecc->size = bch_geo->ecc_chunk_size; ++ ecc->size = bch_geo->ecc_chunkn_size; + ecc->strength = bch_geo->ecc_strength; + mtd_set_ooblayout(mtd, &gpmi_ooblayout_ops); + +diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h +index 69cd0cbde4f2..ef4e57256d30 100644 +--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h ++++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h +@@ -30,9 +30,9 @@ struct resources { + * @page_size: The size, in bytes, of a physical page, including + * both data and OOB. + * @metadata_size: The size, in bytes, of the metadata. +- * @ecc_chunk_size: The size, in bytes, of a single ECC chunk. Note +- * the first chunk in the page includes both data and +- * metadata, so it's a bit larger than this value. ++ * @ecc_chunk0_size: The size, in bytes, of a first ECC chunk. ++ * @ecc_chunkn_size: The size, in bytes, of a single ECC chunk after ++ * the first chunk in the page. + * @ecc_chunk_count: The number of ECC chunks in the page, + * @payload_size: The size, in bytes, of the payload buffer. + * @auxiliary_size: The size, in bytes, of the auxiliary buffer. +@@ -42,19 +42,23 @@ struct resources { + * which the underlying physical block mark appears. + * @block_mark_bit_offset: The bit offset into the ECC-based page view at + * which the underlying physical block mark appears. ++ * @ecc_for_meta: The flag to indicate if there is a dedicate ecc ++ * for meta. + */ + struct bch_geometry { + unsigned int gf_len; + unsigned int ecc_strength; + unsigned int page_size; + unsigned int metadata_size; +- unsigned int ecc_chunk_size; ++ unsigned int ecc_chunk0_size; ++ unsigned int ecc_chunkn_size; + unsigned int ecc_chunk_count; + unsigned int payload_size; + unsigned int auxiliary_size; + unsigned int auxiliary_status_offset; + unsigned int block_mark_byte_offset; + unsigned int block_mark_bit_offset; ++ unsigned int ecc_for_meta; /* ECC for meta data */ + }; + + /** diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0002-cpufreq-imx6q-read-OCOTP-through-nvmem-for-imx6ul-im.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0002-cpufreq-imx6q-read-OCOTP-through-nvmem-for-imx6ul-im.patch new file mode 100644 index 00000000..26f6ba89 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0002-cpufreq-imx6q-read-OCOTP-through-nvmem-for-imx6ul-im.patch @@ -0,0 +1,113 @@ +From: Anson Huang <Anson.Huang@nxp.com> +Date: Mon, 8 Oct 2018 14:07:34 +0800 +Subject: [PATCH] cpufreq: imx6q: read OCOTP through nvmem for imx6ul/imx6ull + +On i.MX6UL/i.MX6ULL, accessing OCOTP directly is wrong because +the ocotp clock needs to be enabled first. Add support for reading +OCOTP through the nvmem API, and keep the old method there to +support old dtb. + +Signed-off-by: Anson Huang <Anson.Huang@nxp.com> +Acked-by: Viresh Kumar <viresh.kumar@linaro.org> +Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> +(cherry picked from commit 2733fb0d0699246711cf622e0e2faf02a05b69dc) +--- + drivers/cpufreq/imx6q-cpufreq.c | 52 +++++++++++++++++++++++++++-------------- + 1 file changed, 35 insertions(+), 17 deletions(-) + +diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c +index b2ff423ad7f8..8cfee0ab804b 100644 +--- a/drivers/cpufreq/imx6q-cpufreq.c ++++ b/drivers/cpufreq/imx6q-cpufreq.c +@@ -12,6 +12,7 @@ + #include <linux/cpu_cooling.h> + #include <linux/err.h> + #include <linux/module.h> ++#include <linux/nvmem-consumer.h> + #include <linux/of.h> + #include <linux/of_address.h> + #include <linux/pm_opp.h> +@@ -290,20 +291,32 @@ static void imx6q_opp_check_speed_grading(struct device *dev) + #define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2 + #define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3 + +-static void imx6ul_opp_check_speed_grading(struct device *dev) ++static int imx6ul_opp_check_speed_grading(struct device *dev) + { +- struct device_node *np; +- void __iomem *base; + u32 val; ++ int ret = 0; + +- np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-ocotp"); +- if (!np) +- return; ++ if (of_find_property(dev->of_node, "nvmem-cells", NULL)) { ++ ret = nvmem_cell_read_u32(dev, "speed_grade", &val); ++ if (ret) ++ return ret; ++ } else { ++ struct device_node *np; ++ void __iomem *base; ++ ++ np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-ocotp"); ++ if (!np) ++ return -ENOENT; ++ ++ base = of_iomap(np, 0); ++ of_node_put(np); ++ if (!base) { ++ dev_err(dev, "failed to map ocotp\n"); ++ return -EFAULT; ++ } + +- base = of_iomap(np, 0); +- if (!base) { +- dev_err(dev, "failed to map ocotp\n"); +- goto put_node; ++ val = readl_relaxed(base + OCOTP_CFG3); ++ iounmap(base); + } + + /* +@@ -314,7 +327,6 @@ static void imx6ul_opp_check_speed_grading(struct device *dev) + * 2b'11: 900000000Hz on i.MX6ULL only; + * We need to set the max speed of ARM according to fuse map. + */ +- val = readl_relaxed(base + OCOTP_CFG3); + val >>= OCOTP_CFG3_SPEED_SHIFT; + val &= 0x3; + +@@ -334,9 +346,7 @@ static void imx6ul_opp_check_speed_grading(struct device *dev) + dev_warn(dev, "failed to disable 900MHz OPP\n"); + } + +- iounmap(base); +-put_node: +- of_node_put(np); ++ return ret; + } + + static int imx6q_cpufreq_probe(struct platform_device *pdev) +@@ -394,10 +404,18 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev) + } + + if (of_machine_is_compatible("fsl,imx6ul") || +- of_machine_is_compatible("fsl,imx6ull")) +- imx6ul_opp_check_speed_grading(cpu_dev); +- else ++ of_machine_is_compatible("fsl,imx6ull")) { ++ ret = imx6ul_opp_check_speed_grading(cpu_dev); ++ if (ret == -EPROBE_DEFER) ++ return ret; ++ if (ret) { ++ dev_err(cpu_dev, "failed to read ocotp: %d\n", ++ ret); ++ return ret; ++ } ++ } else { + imx6q_opp_check_speed_grading(cpu_dev); ++ } + + /* Because we have added the OPPs here, we must free them */ + free_opp = true; diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0003-ARM-dts-imx6ul-use-nvmem-cells-for-cpu-speed-grading.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0003-ARM-dts-imx6ul-use-nvmem-cells-for-cpu-speed-grading.patch new file mode 100644 index 00000000..e8c6d16a --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/ccimx6ul/0003-ARM-dts-imx6ul-use-nvmem-cells-for-cpu-speed-grading.patch @@ -0,0 +1,38 @@ +From: Anson Huang <Anson.Huang@nxp.com> +Date: Fri, 14 Sep 2018 10:59:21 +0800 +Subject: [PATCH] ARM: dts: imx6ul: use nvmem-cells for cpu speed grading + +On i.MX6UL, accessing OCOTP directly is wrong because the ocotp clock +needs to be enabled first, so use the nvmem-cells binding instead. + +Signed-off-by: Anson Huang <Anson.Huang@nxp.com> +Signed-off-by: Shawn Guo <shawnguo@kernel.org> +(cherry picked from commit 92f0eb08c66a73594cf200e65689e767f7f0da5e) +--- + arch/arm/boot/dts/imx6ul.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi +index 6dc0b569acdf..c670d8e4e0a9 100644 +--- a/arch/arm/boot/dts/imx6ul.dtsi ++++ b/arch/arm/boot/dts/imx6ul.dtsi +@@ -89,6 +89,8 @@ + "pll1_sys"; + arm-supply = <®_arm>; + soc-supply = <®_soc>; ++ nvmem-cells = <&cpu_speed_grade>; ++ nvmem-cell-names = "speed_grade"; + }; + }; + +@@ -932,6 +934,10 @@ + tempmon_temp_grade: temp-grade@20 { + reg = <0x20 4>; + }; ++ ++ cpu_speed_grade: speed-grade@10 { ++ reg = <0x10 4>; ++ }; + }; + + lcdif: lcdif@21c8000 { diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/imx6q-var-som-vsc.dts b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/imx6q-var-som-vsc.dts new file mode 100644 index 00000000..63be949e --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/imx6q-var-som-vsc.dts @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Support for Variscite VAR-SOM-MX6 Starter Kit + * + * Copyright 2018 + * Author: Andreas Müller <schnitzeltony@gmail.com> + */ + +/dts-v1/; + +#include "imx6q.dtsi" +#include "imx6qdl-var-som.dtsi" +#include <dt-bindings/input/linux-event-codes.h> + +/ { + model = "Variscite i.MX6 VAR-SOM-MX6"; + compatible = "variscite,var-som", "fsl,imx6q"; + + gpio-keys { /* OK */ + compatible = "gpio-keys"; + autorepeat; + + back { + gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; + linux,code = <KEY_BACK>; + label = "Key Back"; + linux,input-type = <1>; + debounce-interval = <100>; + wakeup-source; + }; + }; + + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "tlv320aic3106-audio"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&sound_codec>; + simple-audio-card,frame-master = <&sound_codec>; + simple-audio-card,widgets = "Headphone", "Headphone Jack", + "Line", "Line In"; + simple-audio-card,routing = "Headphone Jack", "HPLOUT", + "Headphone Jack", "HPROUT", + "LINE1L", "Line In", + "LINE1R", "Line In"; + + sound_cpu: simple-audio-card,cpu { + sound-dai = <&ssi2>; + }; + + sound_codec: simple-audio-card,codec { + sound-dai = <&tlv320aic3106>; + clocks = <&clks IMX6QDL_CLK_CKO>; + }; + }; +}; + +&can1 { + status = "okay"; +}; + +&ecspi1 { + cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>, + <&gpio4 10 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&fec { /* OK */ + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&i2c3 { /* OK */ + status = "okay"; + rtc@0x68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + }; +}; + +/*&ldb { + status = "okay"; + + lvds-channel@1 { + status = "okay"; + + port@4 { + reg = <4>; + + lvds1_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; +};*/ + +&pwm2 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&usbh1 { + status = "okay"; +}; + +&usbotg { + status = "okay"; +}; + +&usdhc2 { /* OK */ + pinctrl-1 = <&pinctrl_usdhc2cdwp>; + cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&iomuxc { + pinctrl_gpio_keys: gpio_keysgrp { + fsl,pins = < + /* user button */ + MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x17059 + >; + }; + + pinctrl_usdhc2cdwp: usdhc2cdwpgrp { + fsl,pins = < + /* SDMMC2 CD/WP */ + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 + >; + }; +}; + + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/imx6qdl-var-som.dtsi b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/imx6qdl-var-som.dtsi new file mode 100644 index 00000000..47949d1c --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc/imx6qdl-var-som.dtsi @@ -0,0 +1,626 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Support for Variscite SOM Module + * + * Copyright 2018 + * Author: Andreas Müller <schnitzeltony@gmail.com> + * Based on imx6qdl-var-dart.dtsi + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/sound/fsl-imx-audmux.h> + +/ { + memory@10000000 { + reg = <0x10000000 0x40000000>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_wl18xx_vmmc: regulator-wl18xx { + compatible = "regulator-fixed"; + regulator-name = "vwl1807"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us = <70000>; + }; + + reg_usb_h1_vbus: regulator-usbh1vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_usb_otg_vbus: regulator-usbotgvbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&iomuxc { + pinctrl_audmux: audmux { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + /* Audio Clock */ + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 + /* Audio reset */ + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x178b0 + >; + }; + + pinctrl_bt: bt { + fsl,pins = < + /* Bluetooth / Wifi enable */ + MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1 + /* Bluetooth Slow Clock */ + MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0 + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x178b0 /* CS */ + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 + >; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 + MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 + >; + }; + + pinctrl_hdmicec: hdmicecgrp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_pmic: pmicgrp { + fsl,pins = < + /* PMIC INT */ + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x17059 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x13059 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp100mhz { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130B9 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130B9 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp200mhz { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130F9 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130F9 + >; + }; + + pinctrl_gpmi_nand: gpmi-nand { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + >; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; + + ssi2 { + fsl,audmux-port = <1>; + fsl,port-config = < + (IMX_AUDMUX_V2_PTCR_SYN | + IMX_AUDMUX_V2_PTCR_TFSDIR | + IMX_AUDMUX_V2_PTCR_TFSEL(2) | + IMX_AUDMUX_V2_PTCR_TCLKDIR | + IMX_AUDMUX_V2_PTCR_TCSEL(2)) + IMX_AUDMUX_V2_PDCR_RXDSEL(2) + >; + }; + + aud3 { + fsl,audmux-port = <2>; + fsl,port-config = < + IMX_AUDMUX_V2_PTCR_SYN + IMX_AUDMUX_V2_PDCR_RXDSEL(1) + >; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + status = "disabled"; +}; + +&can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + status = "disabled"; +}; + +&ecspi3 { + pinctrl-names = "default"; + fsl,spi-num-chipselects = <1>; + pinctrl-0 = <&pinctrl_ecspi3>; + cs-gpios = <&gpio4 24 0>; + status = "disabled"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio1 25 0>; + phy-reset-duration=<100>; + status = "disabled"; +}; + +&hdmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmicec>; + ddc-i2c-bus = <&i2c2>; + status = "disabled"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "disabled"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + pmic@8 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b_reg: sw3b { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + regulator-boot-on; + regulator-always-on; + }; + + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + + tlv320aic3106: codec@1b { + compatible = "ti,tlv320aic3106"; + reg = <0x1b>; + #sound-dai-cells = <0>; + DRVDD-supply = <®_3p3v>; + AVDD-supply = <®_3p3v>; + IOVDD-supply = <®_3p3v>; + DVDD-supply = <®_3p3v>; + ai3x-ocmv = <0>; + reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; + ai3x-gpio-func = < + 0 /* AIC3X_GPIO1_FUNC_DISABLED */ + 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */ + >; + }; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "disabled"; +}; + +&pcie { + fsl,tx-swing-full = <103>; + fsl,tx-swing-low = <103>; + reset-gpio = <&gpio4 11 GPIO_ACTIVE_LOW>; + status = "disabled"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "disabled"; +}; + +®_arm { + vin-supply = <&sw1a_reg>; +}; + +®_pu { + vin-supply = <&sw1c_reg>; +}; + +®_soc { + vin-supply = <&sw1c_reg>; +}; + +&snvs_poweroff { + status = "okay"; +}; + +&ssi2 { /* Onboard audio */ + fsl,mode = "i2s-slave"; + status = "okay"; +}; + +&uart1 { /* Console */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "disabled"; +}; + +&uart2 { /* Bluetooth */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "ti,wl1835-st"; + enable-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "disabled"; +}; + +&usbh1 { + vbus-supply = <®_usb_h1_vbus>; + status = "disabled"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + status = "disabled"; +}; + +&gpmi { /* NAND */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + fsl,legacy-bch-geometry; + status = "okay"; + + /* a 2 MiB partition */ + partition@0 { + label = "spl"; + reg = <0x00000000 0x00200000>; + }; + + /* a 2 MiB partition */ + partition@1 { + label = "bootloader"; + reg = <0x00200000 0x00200000>; + }; + + /* an 8 MiB partition */ + partition@2 { + label = "kernel"; + reg = <0x00400000 0x00800000>; + }; + + /* max 1012 MiB partition - truncated automatically */ + partition@3 { + label = "rootfs"; + reg = <0x00c00000 0x3f400000>; + }; +}; + +&usdhc1 { /* eMMC */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + keep-power-in-suspend; + wakeup-source; + non-removable; + status = "okay"; +}; + +&usdhc2 { /* MMC/SD card */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + no-1-8-v; + keep-power-in-suspend; + wakeup-source; + status = "disabled"; +}; + +&usdhc3 { /* Wilink8 WL18xx*/ + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + + non-removable; + keep-power-in-suspend; + wakeup-source; + bus-width = <4>; + vmmc-supply = <®_wl18xx_vmmc>; + non-removable; + wakeup-source; + keep-power-in-suspend; + cap-power-off-card; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + wlcore: wlcore@2 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio6>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + ref-clock-frequency = <38400000>; + }; +}; + +&snvs_rtc { + status = "disabled"; +}; diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc_%.bbappend b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc_%.bbappend new file mode 100644 index 00000000..5621c499 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-fslc_%.bbappend @@ -0,0 +1,19 @@ +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" + +COMPATIBLE_MACHINE_imx6sl-warp = "(.)" +COMPATIBLE_MACHINE_imx6dl-riotboard = "(.)" + +SRC_URI_append_imx6qdl-variscite-som_use-mainline-bsp = " \ + file://imx6qdl-var-som.dtsi \ + file://imx6q-var-som-vsc.dts \ +" + +SRC_URI_append_ccimx6ul = " \ + file://0001-MLK-11719-4-mtd-gpmi-change-the-BCH-layout-setting-f.patch \ + file://0002-cpufreq-imx6q-read-OCOTP-through-nvmem-for-imx6ul-im.patch \ + file://0003-ARM-dts-imx6ul-use-nvmem-cells-for-cpu-speed-grading.patch \ +" + +do_configure_prepend_imx6qdl-variscite-som() { + cp ${WORKDIR}/imx6*-var*.dts* ${S}/arch/arm/boot/dts +} diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-gateworks-imx-3.14/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-gateworks-imx-3.14/defconfig new file mode 100644 index 00000000..559bbb75 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-gateworks-imx-3.14/defconfig @@ -0,0 +1,567 @@ +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_FHANDLE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +CONFIG_PERF_EVENTS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_GPIO_PCA953X=y +CONFIG_ARCH_MXC=y +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6SL=y +CONFIG_SOC_IMX6SX=y +# CONFIG_SWP_EMULATE is not set +CONFIG_PCI=y +CONFIG_PCI_IMX6=y +# CONFIG_PCIEAER is not set +# CONFIG_PCIEASPM is not set +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_AEABI=y +CONFIG_CMA=y +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_ARM_IMX6Q_CPUFREQ=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_BINFMT_MISC=m +CONFIG_PM_RUNTIME=y +CONFIG_PM_DEBUG=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_NETFILTER=y +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CT_PROTO_DCCP=m +CONFIG_NF_CT_PROTO_SCTP=m +CONFIG_NF_CT_PROTO_UDPLITE=m +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_SNMP=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NF_CT_NETLINK_TIMEOUT=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_HMARK=m +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m +CONFIG_NETFILTER_XT_TARGET_LED=m +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_TEE=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_BPF=m +CONFIG_NETFILTER_XT_MATCH_CGROUP=m +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_CPU=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_IPCOMP=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_L2TP=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_NFACCT=m +CONFIG_NETFILTER_XT_MATCH_OSF=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_NF_NAT_IPV4=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_NF_CONNTRACK_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_NF_NAT_IPV6=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +CONFIG_IP6_NF_TARGET_NPT=m +CONFIG_BRIDGE=y +CONFIG_VLAN_8021Q=y +CONFIG_CAN=y +CONFIG_CAN_FLEXCAN=y +CONFIG_BT=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_3WIRE=y +CONFIG_BT_ATH3K=m +CONFIG_RFKILL=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_DMA_CMA=y +CONFIG_IMX_WEIM=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_SST25L=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_NAND_MXC=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_UBI=y +CONFIG_PROC_DEVICETREE=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_ATA=y +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_IMX=y +# CONFIG_ATA_SFF is not set +CONFIG_NETDEVICES=y +CONFIG_TUN=y +CONFIG_NET_DSA_MV88E6352=y +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_CS89x0=y +CONFIG_CS89x0_PLATFORM=y +# CONFIG_NET_VENDOR_FARADAY is not set +CONFIG_IGB=y +CONFIG_MVMDIO=m +CONFIG_SKGE=m +CONFIG_SKY2=m +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_SMC91X=y +CONFIG_SMC911X=y +CONFIG_SMSC911X=y +# CONFIG_NET_VENDOR_STMICRO is not set +CONFIG_MARVELL_PHY=y +CONFIG_GATEWORKS_GW16083=y +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_CDC_EEM=m +CONFIG_USB_NET_HUAWEI_CDC_NCM=m +CONFIG_USB_NET_CDC_MBIM=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_SR9700=m +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_KC2190=y +CONFIG_USB_NET_CX82310_ETH=m +CONFIG_USB_NET_KALMIA=m +CONFIG_USB_NET_QMI_WWAN=m +CONFIG_USB_HSO=m +CONFIG_USB_NET_INT51X1=m +CONFIG_USB_IPHETH=m +CONFIG_USB_SIERRA_NET=m +CONFIG_USB_VL600=m +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_TCA8418=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_EGALAX=y +CONFIG_TOUCHSCREEN_ELAN=y +CONFIG_TOUCHSCREEN_GOODIX=y +CONFIG_TOUCHSCREEN_EDT_FT5X06=y +CONFIG_TOUCHSCREEN_TSC2007=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_GSC=y +CONFIG_INPUT_MMA8450=y +CONFIG_INPUT_LSM9DS1=m +# CONFIG_SERIO is not set +CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_FSL_OTP=y +CONFIG_HW_RANDOM_IMX_RNG=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_IMX=y +CONFIG_SPI=y +CONFIG_SPI_IMX=y +CONFIG_SPI_SPIDEV=y +CONFIG_PPS_CLIENT_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_POWER_SUPPLY=y +CONFIG_IMX6_USB_CHARGER=y +CONFIG_SENSORS_GSC=y +CONFIG_THERMAL=y +CONFIG_CPU_THERMAL=y +CONFIG_IMX_THERMAL=y +CONFIG_DEVICE_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_GSC_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_GSC_CORE=y +CONFIG_MFD_TDA1997X=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_LTC3676=y +CONFIG_REGULATOR_PFUZE100=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_MEDIA_PCI_SUPPORT=y +CONFIG_VIDEO_TW6869=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_CAPTURE=y +CONFIG_MXC_TVIN_TDA1997X=y +CONFIG_MXC_TVIN_ADV7180=y +CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=y +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +CONFIG_VIDEO_MXC_PXP_V4L2=y +CONFIG_VIDEO_MXC_CSI_CAMERA=y +CONFIG_SOC_CAMERA=y +CONFIG_VIDEO_MX3=y +CONFIG_DRM=y +CONFIG_DRM_VIVANTE=m +CONFIG_FB=y +CONFIG_FB_MXS=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_L4F00242T03=y +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_FB_MXC_SYNC_PANEL=y +CONFIG_FB_MXC_TVOUT_ADV739X=y +CONFIG_FB_MXC_LDB=y +CONFIG_FB_MXC_BT656=y +CONFIG_FB_MXC_BT656_IF_DI_MSB=15 +CONFIG_FB_MXC_HDMI=y +CONFIG_HANNSTAR_CABC=y +CONFIG_LOGO=y +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_SPI is not set +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_SOC=y +CONFIG_SND_SOC_FSL_ASRC=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_IMX_SGTL5000=y +CONFIG_SND_SOC_IMX_HDMI=y +CONFIG_SND_SOC_IMX_TDA1997X=y +CONFIG_HID_MULTITOUCH=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_SIMPLE=m +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_CH341=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_CP210X=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +CONFIG_USB_SERIAL_F81232=m +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_IUU=m +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KEYSPAN_MPR=y +CONFIG_USB_SERIAL_KEYSPAN_USA28=y +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y +CONFIG_USB_SERIAL_KEYSPAN_USA19=y +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_METRO=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_MXUPORT=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_OTI6858=m +CONFIG_USB_SERIAL_QCAUX=m +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_USB_SERIAL_SPCP8X5=m +CONFIG_USB_SERIAL_SAFE=m +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +CONFIG_USB_SERIAL_SYMBOL=m +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_XIRCOM=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OMNINET=m +CONFIG_USB_SERIAL_OPTICON=m +CONFIG_USB_SERIAL_XSENS_MT=m +CONFIG_USB_SERIAL_WISHBONE=m +CONFIG_USB_SERIAL_ZTE=m +CONFIG_USB_SERIAL_SSU100=m +CONFIG_USB_SERIAL_QT2=m +CONFIG_USB_SERIAL_DEBUG=m +CONFIG_USB_EMI62=m +CONFIG_USB_EMI26=m +CONFIG_USB_ADUTUX=m +CONFIG_USB_SEVSEG=m +CONFIG_USB_RIO500=m +CONFIG_USB_LEGOTOWER=m +CONFIG_USB_LCD=m +CONFIG_USB_LED=m +CONFIG_USB_CYPRESS_CY7C63=m +CONFIG_USB_CYTHERM=m +CONFIG_USB_IDMOUSE=m +CONFIG_USB_FTDI_ELAN=m +CONFIG_USB_APPLEDISPLAY=m +CONFIG_USB_SISUSBVGA=m +CONFIG_USB_LD=m +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_IOWARRIOR=m +CONFIG_USB_TEST=m +CONFIG_USB_EHSET_TEST_FIXTURE=m +CONFIG_USB_ISIGHTFW=m +CONFIG_USB_YUREX=m +CONFIG_USB_HSIC_USB3503=m +CONFIG_USB_MXS_PHY=y +CONFIG_USB_GADGET=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_MMC=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MXC_IPU=y +CONFIG_MXC_GPU_VIV=y +CONFIG_MXC_HDMI_CEC=y +CONFIG_MXC_MLB150=m +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_LEDS_TRIGGER_TRANSIENT=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_DS1672=y +CONFIG_RTC_DRV_MXC=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_MXC_PXP_V2=y +CONFIG_IMX_SDMA=y +CONFIG_MXS_DMA=y +CONFIG_STAGING=y +CONFIG_USB_SERIAL_QUATECH2=m +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_PWM=y +CONFIG_PWM_IMX=y +CONFIG_PWM_PCA9685=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +CONFIG_SECURITYFS=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y +CONFIG_CRC_CCITT=m +CONFIG_CRC_T10DIF=y +CONFIG_CRC7=m +CONFIG_AVERAGE=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-gateworks-imx_3.14.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-gateworks-imx_3.14.bb new file mode 100644 index 00000000..63267b94 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-gateworks-imx_3.14.bb @@ -0,0 +1,13 @@ +# Copyright (C) 2015 Gateworks Corporation +# Released under the MIT license (see COPYING.MIT for the terms) + +include recipes-kernel/linux/linux-imx.inc + +DEPENDS += "lzop-native bc-native" + +SRCREV = "d9991ca465921e5ed120dd321e06a2d64eaa5099" +LOCALVERSION = "-1.0.x-ga+yocto" +SRC_URI = "git://github.com/Gateworks/linux-imx6.git;protocol=git;branch=gateworks_fslc_3.14_1.0.x_ga \ + file://defconfig" + +COMPATIBLE_MACHINE = "(ventana)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo-3.16/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo-3.16/defconfig new file mode 100644 index 00000000..d2688425 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo-3.16/defconfig @@ -0,0 +1,397 @@ +CONFIG_SYSVIPC=y +# CONFIG_CROSS_MEMORY_ATTACH is not set +# CONFIG_USELIB is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_RELAY=y +CONFIG_SGETMASK_SYSCALL=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +# CONFIG_VM_EVENT_COUNTERS is not set +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLUB_CPU_PARTIAL is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_BLK_CMDLINE_PARSER=y +CONFIG_ARCH_MXC=y +CONFIG_SOC_IMX6Q=y +CONFIG_PCI=y +CONFIG_PCI_DEBUG=y +CONFIG_PCI_IMX6=y +CONFIG_PCIE_ECRC=y +CONFIG_PCIEASPM_DEBUG=y +CONFIG_PCIEASPM_POWERSAVE=y +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_CMA=y +CONFIG_UACCESS_WITH_MEMCPY=y +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" +CONFIG_CPU_FREQ=y +# CONFIG_CPU_FREQ_STAT is not set +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_GENERIC_CPUFREQ_CPU0=y +CONFIG_ARM_IMX6Q_CPUFREQ=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_PM_AUTOSLEEP=y +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_RUNTIME=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_APM_EMULATION=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_IPV6 is not set +CONFIG_CAN=y +# CONFIG_CAN_GW is not set +CONFIG_CAN_VCAN=y +CONFIG_CAN_FLEXCAN=y +CONFIG_CFG80211=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=320 +CONFIG_IMX_WEIM=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_TESTS=m +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_NFTL=y +CONFIG_NFTL_RW=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_MTD_UBI_GLUEBI=y +CONFIG_MTD_UBI_BLOCK=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_EEPROM_AT24=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_ATA=y +# CONFIG_SATA_PMP is not set +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_IMX=y +# CONFIG_ATA_SFF is not set +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EXAR is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HP is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_NET_PACKET_ENGINE is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_SMSC_PHY=y +CONFIG_ATH_CARDS=y +CONFIG_ATH6KL=m +CONFIG_ATH6KL_SDIO=m +CONFIG_BRCMFMAC=y +CONFIG_BRCMDBG=y +# CONFIG_RTL_CARDS is not set +# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=m +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_MATRIX=y +CONFIG_KEYBOARD_IMX=y +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_EGALAX=y +CONFIG_TOUCHSCREEN_EDT_FT5X06=y +CONFIG_TOUCHSCREEN_USB_COMPOSITE=y +# CONFIG_TOUCHSCREEN_USB_PANJIT is not set +# CONFIG_TOUCHSCREEN_USB_3M is not set +# CONFIG_TOUCHSCREEN_USB_ITM is not set +# CONFIG_TOUCHSCREEN_USB_ETURBO is not set +# CONFIG_TOUCHSCREEN_USB_GUNZE is not set +# CONFIG_TOUCHSCREEN_USB_DMC_TSC10 is not set +# CONFIG_TOUCHSCREEN_USB_IRTOUCH is not set +# CONFIG_TOUCHSCREEN_USB_IDEALTEK is not set +# CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH is not set +# CONFIG_TOUCHSCREEN_USB_GOTOP is not set +# CONFIG_TOUCHSCREEN_USB_JASTEC is not set +# CONFIG_TOUCHSCREEN_USB_ELO is not set +# CONFIG_TOUCHSCREEN_USB_E2I is not set +# CONFIG_TOUCHSCREEN_USB_ZYTRONIC is not set +# CONFIG_TOUCHSCREEN_USB_ETT_TC45USB is not set +# CONFIG_TOUCHSCREEN_USB_NEXIO is not set +# CONFIG_TOUCHSCREEN_USB_EASYTOUCH is not set +CONFIG_TOUCHSCREEN_TSC2007=y +# CONFIG_SERIO is not set +CONFIG_LEGACY_PTY_COUNT=16 +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_HW_RANDOM=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_GPIO=y +CONFIG_I2C_IMX=y +CONFIG_SPI=y +CONFIG_SPI_IMX=y +CONFIG_SPI_SPIDEV=y +CONFIG_GPIO_SYSFS=y +# CONFIG_HWMON is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_CPU_THERMAL=y +CONFIG_THERMAL_EMULATION=y +CONFIG_IMX_THERMAL=y +CONFIG_DEVICE_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +CONFIG_SOC_CAMERA=y +CONFIG_VIDEO_MX3=y +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set +# CONFIG_DVB_AU8522_V4L is not set +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set +# CONFIG_VGA_ARB is not set +CONFIG_DRM=y +CONFIG_DRM_VIVANTE=y +CONFIG_FB=y +CONFIG_FB_TILEBLITTING=y +# CONFIG_FB_MX3 is not set +CONFIG_FB_MXC_SYNC_PANEL=y +CONFIG_FB_MXC_LDB=y +# CONFIG_FB_MXC_EDID is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_BACKLIGHT_PWM=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_LOGO=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_HRTIMER=y +CONFIG_SND_DYNAMIC_MINORS=y +# CONFIG_SND_SUPPORT_OLD_API is not set +CONFIG_SND_VERBOSE_PRINTK=y +CONFIG_SND_DEBUG=y +CONFIG_SND_DEBUG_VERBOSE=y +CONFIG_SND_PCM_XRUN_DEBUG=y +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_PCI is not set +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set +# CONFIG_SND_USB is not set +CONFIG_SND_SOC=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_IMX_SGTL5000=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_DYNAMIC_MINORS=y +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +CONFIG_USB_MON=m +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_STORAGE_REALTEK=y +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_TEST=m +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DEBUG_FILES=y +CONFIG_USB_GADGET_DEBUG_FS=y +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_ETH_EEM=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FUNCTIONFS=m +CONFIG_USB_FUNCTIONFS_ETH=y +CONFIG_USB_FUNCTIONFS_RNDIS=y +CONFIG_USB_FUNCTIONFS_GENERIC=y +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_USB_G_ACM_MS=m +CONFIG_USB_G_HID=m +CONFIG_MMC=y +CONFIG_MMC_CLKGATE=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MXC_IPU=y +CONFIG_MXC_GPU_VIV=y +CONFIG_MXC_VPU_DEBUG=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_IMX_SDMA=y +CONFIG_MXS_DMA=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_PM_DEVFREQ=y +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +CONFIG_PWM=y +CONFIG_PWM_IMX=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_FUSE_FS=y +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_CONFIGFS_FS=y +CONFIG_UBIFS_FS=y +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_CRAMFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=y +CONFIG_NLS_UTF8=y +CONFIG_STRIP_ASM_SYMS=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_SHIRQ=y +CONFIG_LOCKUP_DETECTOR=y +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +CONFIG_PANIC_ON_OOPS=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_BLOCK_EXT_DEVT=y +# CONFIG_FTRACE is not set +CONFIG_DEBUG_LL=y +CONFIG_EARLY_PRINTK=y +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_RMD128=y +CONFIG_CRYPTO_RMD160=y +CONFIG_CRYPTO_RMD256=y +CONFIG_CRYPTO_RMD320=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_TGR192=y +CONFIG_CRYPTO_WP512=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_CAMELLIA=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_TWOFISH=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DEV_SAHARA=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo_3.16.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo_3.16.bb new file mode 100644 index 00000000..a4d184f5 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-karo_3.16.bb @@ -0,0 +1,17 @@ +SUMMARY = "Linux Kernel for Ka-Ro electronics TX Computer-On-Modules" + +require recipes-kernel/linux/linux-imx.inc + +DEPENDS += "lzop-native bc-native" + +SRCBRANCH = "karo-tx6" +LOCALVERSION = "-2015-09-18" +SRCREV = "5340e6663c3b575808a5be437a25d8a7f85cb658" +KERNEL_SRC = "git://git.karo-electronics.de/karo-tx-linux.git;protocol=git" +SRC_URI = "${KERNEL_SRC};branch=${SRCBRANCH} \ + file://defconfig \ +" + +KERNEL_IMAGETYPE="uImage" + +COMPATIBLE_MACHINE = "(tx6[qsu]-.*)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/0001-arm-dts-vf610-phycore-rdk.dts-rename-to-vf610-pcm052.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/0001-arm-dts-vf610-phycore-rdk.dts-rename-to-vf610-pcm052.patch new file mode 100644 index 00000000..d8c2b666 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/0001-arm-dts-vf610-phycore-rdk.dts-rename-to-vf610-pcm052.patch @@ -0,0 +1,20 @@ +From 119e027174cde26d8243c52993a35283df4e4920 Mon Sep 17 00:00:00 2001 +From: Anthony Felice <tony.felice@timesys.com> +Date: Mon, 26 Oct 2015 13:07:23 -0400 +Subject: [PATCH] arm: dts: vf610-phycore-rdk.dts: rename to vf610-pcm052.dts + +Rename vf610-phycore-rdk.dts to match upstream U-Boot. + +Signed-off-by: Anthony Felice <tony.felice@timesys.com> +--- + arch/arm/boot/dts/{vf610-phycore-rdk.dts => vf610-pcm052.dts} | 0 + 1 file changed, 0 insertions(+), 0 deletions(-) + rename arch/arm/boot/dts/{vf610-phycore-rdk.dts => vf610-pcm052.dts} (100%) + +diff --git a/arch/arm/boot/dts/vf610-phycore-rdk.dts b/arch/arm/boot/dts/vf610-pcm052.dts +similarity index 100% +rename from arch/arm/boot/dts/vf610-phycore-rdk.dts +rename to arch/arm/boot/dts/vf610-pcm052.dts +-- +1.9.1 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/defconfig new file mode 100644 index 00000000..a3422bd1 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys-3.13/pcm052/defconfig @@ -0,0 +1,175 @@ +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IKCONFIG=m +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_SYSCTL_SYSCALL=y +CONFIG_EMBEDDED=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_ARCH_MXC=y +CONFIG_SOC_VF610=y +CONFIG_HAVE_IMX_EXTERNAL_MCC=y +CONFIG_ARM_ERRATA_754322=y +CONFIG_VMSPLIT_2G=y +CONFIG_AEABI=y +CONFIG_KSM=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="root=/dev/nfs rw nfsroot=10.193.20.106:/tftpboot/10.193.20.115 ip=10.193.20.115:10.193.20.106:10.193.20.254:255.255.255.0::eth0:off console=ttymxc1,115200 mem=128M" +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_PM_RUNTIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_INET_LRO is not set +# CONFIG_IPV6 is not set +CONFIG_CAN=y +CONFIG_CAN_VCAN=y +CONFIG_CAN_FLEXCAN=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_FSL_NFC=y +CONFIG_MTD_SPI_NOR_BASE=y +CONFIG_SPI_FSL_QUADSPI=y +CONFIG_MTD_UBI=y +CONFIG_BLK_DEV_RAM=y +CONFIG_EEPROM_AT24=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_NETDEVICES=y +CONFIG_MICREL_PHY=y +CONFIG_INPUT_POLLDEV=y +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_CRTOUCH=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=y +# CONFIG_CONSOLE_TRANSLATIONS is not set +CONFIG_LEGACY_PTY_COUNT=4 +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_HW_RANDOM=y +# CONFIG_IMX_MCC_LIBMCC is not set +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_IMX=y +CONFIG_SPI=y +CONFIG_SPI_FSL_DSPI=y +CONFIG_GPIO_SYSFS=y +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_MFD_SYSCON=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_FB=y +CONFIG_FB_FSL_DCU=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=m +CONFIG_BACKLIGHT_PWM=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_LOGO=y +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set +CONFIG_SND=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_FSL_SAI=y +CONFIG_SND_SOC_SGTL5000=y +CONFIG_SND_SIMPLE_CARD=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MXC=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_ULPI=y +CONFIG_USB_GADGET=y +CONFIG_USB_ETH=m +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_PWM=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_FSL_EDMA=y +CONFIG_STAGING=y +CONFIG_IIO=y +CONFIG_VF610_ADC=y +CONFIG_PWM=y +CONFIG_PWM_FSL_FTM=y +# CONFIG_RESET_CONTROLLER is not set +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT4_FS=y +CONFIG_AUTOFS4_FS=m +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_UBIFS_FS=y +CONFIG_CRAMFS=y +CONFIG_NFS_FS=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=m +CONFIG_FUNCTION_TRACER=y +CONFIG_BLK_DEV_IO_TRACE=y +# CONFIG_ARM_UNWIND is not set +CONFIG_DEBUG_LL=y +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRC_CCITT=m +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys_3.13.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys_3.13.bb new file mode 100644 index 00000000..0f3be236 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-timesys_3.13.bb @@ -0,0 +1,17 @@ +# Copyright (C) 2013-2014 Timesys Corporation +# Released under the MIT license (see COPYING.MIT for the terms) +require recipes-kernel/linux/linux-imx.inc + +SUMMARY = "Linux Kernel with added drivers and board support for Vybrid-based platforms" + +# Revision of 3.13_vybrid branch +SRC_URI = "git://github.com/Timesys/linux-timesys.git;protocol=git;branch=${SRCBRANCH} \ + file://defconfig \ + file://0001-arm-dts-vf610-phycore-rdk.dts-rename-to-vf610-pcm052.patch \ +" + +SRCBRANCH = "3.13_vybrid" +SRCREV = "a8caf227b68beff7b3e6a2b69a37272c6fc7d4ac" +LOCALVERSION ?= "-${SRCBRANCH}" + +COMPATIBLE_MACHINE = "(vf60)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.4/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.4/defconfig new file mode 100644 index 00000000..13eb3e95 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.4/defconfig @@ -0,0 +1,336 @@ +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_FHANDLE=y +CONFIG_IRQ_DOMAIN_DEBUG=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_CGROUPS=y +CONFIG_NAMESPACES=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +CONFIG_PERF_EVENTS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_MXC=y +CONFIG_SOC_VF610=y +CONFIG_SWP_EMULATE=y +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_AEABI=y +CONFIG_CMA=y +CONFIG_KEXEC=y +# CONFIG_ATAGS_PROC is not set +CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_BINFMT_MISC=y +CONFIG_PM_WAKELOCKS=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_NET_IPGRE_DEMUX=m +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_IPV6_SIT=m +CONFIG_NETFILTER=y +CONFIG_BRIDGE_NETFILTER=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_TABLES=y +CONFIG_NF_TABLES_INET=y +CONFIG_NFT_MASQ=y +CONFIG_NFT_NAT=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_NFACCT=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NFT_CHAIN_NAT_IPV4=y +CONFIG_NFT_MASQ_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_NF_TABLES_BRIDGE=y +CONFIG_L2TP=m +CONFIG_BRIDGE=y +# CONFIG_BRIDGE_IGMP_SNOOPING is not set +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_VLAN_8021Q=y +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_CAN=m +CONFIG_CAN_FLEXCAN=m +CONFIG_CAN_MCP251X=m +CONFIG_CFG80211=m +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=m +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_DMA_CMA=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VF610_NFC=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_MTD_UBI_BLOCK=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_SCSI=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_FARADAY is not set +CONFIG_FSL_L2_SWITCH=y +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_MICREL_PHY=y +CONFIG_PPP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_MPPE=m +CONFIG_PPTP=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +CONFIG_USB_NET_DRIVERS=m +CONFIG_USB_USBNET=m +# CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_ZD1201=m +CONFIG_RT2X00=m +CONFIG_RT2800USB=m +# CONFIG_RT2800USB_RT35XX is not set +CONFIG_RTL8192CU=m +# CONFIG_RTLWIFI_DEBUG is not set +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +CONFIG_TOUCHSCREEN_FUSION_F0710A=m +CONFIG_TOUCHSCREEN_WM97XX=y +# CONFIG_TOUCHSCREEN_WM9705 is not set +# CONFIG_TOUCHSCREEN_WM9713 is not set +CONFIG_TOUCHSCREEN_COLIBRI_VF50=y +# CONFIG_SERIO is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVKMEM is not set +CONFIG_VF610_SEMA4=y +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_HW_RANDOM=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_IMX=y +CONFIG_SPI=y +CONFIG_SPI_FSL_DSPI=y +CONFIG_SPI_SPIDEV=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_POWER_SUPPLY=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_SENSORS_IIO_HWMON=y +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_GPIO=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_RC_SUPPORT=y +# CONFIG_RC_MAP is not set +# CONFIG_RC_DECODERS is not set +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +# CONFIG_USB_GSPCA is not set +CONFIG_DRM=y +CONFIG_DRM_FSL_DCU=y +CONFIG_DRM_PANEL_SIMPLE=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_LCD_CLASS_DEVICE is not set +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_BACKLIGHT_PWM=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set +# CONFIG_SND_USB is not set +CONFIG_SND_SOC=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_FSL_SAI_WM9712=y +CONFIG_SND_SOC_AC97_CODEC=y +CONFIG_HIDRAW=y +CONFIG_HID_MULTITOUCH=m +CONFIG_USB_HIDDEV=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_ACM=m +CONFIG_USB_WDM=m +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_CONSOLE=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_FTDI_SIO=y +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OPTION=m +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_GADGET=y +CONFIG_USB_FSL_USB2=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_FSL_EDMA=y +# CONFIG_MX3_IPU is not set +CONFIG_ARM_TIMER_SP804=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_VF610_CM4_RPROC=m +CONFIG_IMX_RPMSG_PINGPONG=m +CONFIG_IMX_RPMSG_TTY=m +CONFIG_VF610_RPMSG=m +CONFIG_SOC_BUS_VF610=y +CONFIG_EXTCON_USB_GPIO=y +CONFIG_IIO=y +CONFIG_VF610_ADC=y +CONFIG_VF610_DAC=y +CONFIG_IIO_SYSFS_TRIGGER=y +CONFIG_PWM=y +CONFIG_PWM_FSL_FTM=y +CONFIG_NVMEM=y +CONFIG_NVMEM_VF610_OCOTP=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_CUSE=y +CONFIG_OVERLAY_FS=y +CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=y +CONFIG_NTFS_RW=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_ROOT_NFS=y +CONFIG_CIFS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_FS=y +CONFIG_LOCKUP_DETECTOR=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10 +# CONFIG_SCHED_DEBUG is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +# CONFIG_ARM_UNWIND is not set +CONFIG_DEBUG_USER=y +CONFIG_SECURITYFS=y +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_HW is not set +CONFIG_CRC_CCITT=y +CONFIG_CRC_T10DIF=y +CONFIG_XZ_DEC=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.9-1.0.x/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.9-1.0.x/defconfig new file mode 100644 index 00000000..9e5fe3e2 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex-4.9-1.0.x/defconfig @@ -0,0 +1,481 @@ +CONFIG_LOCALVERSION="-" +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_CGROUP_SCHED=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_DEBUG=y +CONFIG_NAMESPACES=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_MXC=y +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6ULL=y +CONFIG_SOC_IMX7D=y +# CONFIG_ARM_ERRATA_643719 is not set +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCI_IMX6=y +CONFIG_SMP=y +# CONFIG_ARM_CPU_TOPOLOGY is not set +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_CMA=y +CONFIG_UACCESS_WITH_MEMCPY=y +CONFIG_SECCOMP=y +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPUFREQ_DT=y +CONFIG_ARM_IMX7D_CPUFREQ=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_BINFMT_MISC=m +CONFIG_PM_DEBUG=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_NET_IPGRE_DEMUX=m +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +CONFIG_IPV6_SIT=m +CONFIG_NETFILTER=y +CONFIG_BRIDGE_NETFILTER=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_TABLES=y +CONFIG_NF_TABLES_INET=y +CONFIG_NFT_MASQ=y +CONFIG_NFT_NAT=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_NFACCT=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NFT_CHAIN_NAT_IPV4=y +CONFIG_NFT_MASQ_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_NF_TABLES_BRIDGE=y +CONFIG_L2TP=m +CONFIG_BRIDGE=y +# CONFIG_BRIDGE_IGMP_SNOOPING is not set +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_VLAN_8021Q=y +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_CAN=y +CONFIG_CAN_VCAN=y +CONFIG_CAN_FLEXCAN=m +CONFIG_CAN_MCP251X=m +CONFIG_BT=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_LL=y +CONFIG_CFG80211=m +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=m +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_GPIO=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=320 +CONFIG_CMA_SIZE_PERCENTAGE=50 +CONFIG_CMA_SIZE_SEL_MIN=y +CONFIG_IMX_WEIM=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_NAND_MXC=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_ATA=y +CONFIG_SATA_AHCI=m +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_IMX=y +CONFIG_PATA_IMX=y +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_MICREL_PHY=y +CONFIG_PPP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_MPPE=m +CONFIG_PPTP=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +CONFIG_USB_NET_DRIVERS=m +CONFIG_USB_USBNET=m +# CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_WLAN is not set +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_IMX=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_AD7879=y +CONFIG_TOUCHSCREEN_AD7879_I2C=y +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +CONFIG_TOUCHSCREEN_FUSION_F0710A=m +CONFIG_TOUCHSCREEN_STMPE=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=y +# CONFIG_SERIO is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_FSL_OTP=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_GPIO=y +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_GPIO=y +CONFIG_I2C_IMX=y +CONFIG_SPI=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_IMX=y +CONFIG_SPI_SPIDEV=y +CONFIG_GPIO_SYSFS=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_POWER_SUPPLY=y +CONFIG_SENSORS_MAG3110=y +# CONFIG_MXC_MMA8451 is not set +CONFIG_THERMAL=y +CONFIG_CPU_THERMAL=y +CONFIG_IMX_THERMAL=y +CONFIG_DEVICE_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_RN5T618_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_MFD_RN5T618=y +CONFIG_MFD_STMPE=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_PFUZE100=y +CONFIG_REGULATOR_RN5T618=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +# CONFIG_USB_GSPCA is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_CAPTURE=m +CONFIG_MXC_CAMERA_OV5640=m +CONFIG_MXC_CAMERA_OV5642=m +CONFIG_MXC_CAMERA_OV5640_MIPI=m +CONFIG_MXC_TVIN_ADV7180=m +CONFIG_MXC_TVIN_ADV7280=m +CONFIG_MXC_TVIN_MAX9526=m +CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +CONFIG_VIDEO_MXC_PXP_V4L2=y +CONFIG_VIDEO_MXC_CSI_CAMERA=m +CONFIG_MXC_VADC=m +CONFIG_SOC_CAMERA=y +CONFIG_V4L_MEM2MEM_DRIVERS=y +CONFIG_VIDEO_CODA=y +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set +CONFIG_SOC_CAMERA_OV2640=y +# CONFIG_DVB_AU8522_V4L is not set +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set +CONFIG_DRM=y +CONFIG_DRM_VIVANTE=y +CONFIG_FB_MXS=y +CONFIG_FB_MXC_SYNC_PANEL=y +CONFIG_FB_MXC_MIPI_DSI=y +CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y +CONFIG_FB_MXC_LDB=y +CONFIG_FB_MXC_HDMI=y +CONFIG_HANNSTAR_CABC=y +CONFIG_FB_MXC_EINK_PANEL=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_L4F00242T03=y +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_BACKLIGHT_PWM=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_SOC=y +CONFIG_SND_SOC_FSL_ASRC=y +CONFIG_SND_SOC_FSL_SAI=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_IMX_SGTL5000=y +CONFIG_SND_SOC_IMX_SPDIF=y +CONFIG_SND_SOC_IMX_HDMI=y +CONFIG_SND_SIMPLE_CARD=y +CONFIG_HIDRAW=y +CONFIG_HID_MULTITOUCH=m +CONFIG_USB_HIDDEV=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MXC=y +CONFIG_USB_ACM=m +CONFIG_USB_WDM=m +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_CONSOLE=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_FTDI_SIO=y +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OPTION=m +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MXC_IPU=y +CONFIG_MXC_SIM=y +CONFIG_MXC_MIPI_CSI2=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_IMX_SDMA=y +CONFIG_MXS_DMA=y +CONFIG_MXC_PXP_V2=y +CONFIG_MXC_PXP_V3=y +# CONFIG_MX3_IPU is not set +CONFIG_STAGING=y +CONFIG_STMPE_ADC=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_EXTCON_USB_GPIO=y +CONFIG_IIO=y +CONFIG_IMX7D_ADC=y +CONFIG_VF610_ADC=y +CONFIG_PWM=y +CONFIG_PWM_IMX=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_CUSE=y +CONFIG_OVERLAY_FS=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=y +CONFIG_NTFS_RW=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_UBIFS_FS=y +CONFIG_SQUASHFS=m +CONFIG_SQUASHFS_FILE_DIRECT=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_ROOT_NFS=y +CONFIG_CIFS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_FS=y +CONFIG_LOCKUP_DETECTOR=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10 +# CONFIG_SCHED_DEBUG is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +# CONFIG_ARM_UNWIND is not set +CONFIG_DEBUG_USER=y +CONFIG_CORESIGHT=y +CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y +CONFIG_CORESIGHT_SINK_TPIU=y +CONFIG_CORESIGHT_SINK_ETBV10=y +CONFIG_CORESIGHT_SOURCE_ETM3X=y +CONFIG_SECURITYFS=y +CONFIG_CRYPTO_ECDH=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_PCBC=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_RMD128=y +CONFIG_CRYPTO_RMD160=y +CONFIG_CRYPTO_RMD256=y +CONFIG_CRYPTO_RMD320=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_TGR192=y +CONFIG_CRYPTO_WP512=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_CAMELLIA=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y +CONFIG_CRYPTO_DEV_MXS_DCP=y +CONFIG_CRC_CCITT=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC7=m +CONFIG_LIBCRC32C=m +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.4.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.4.bb new file mode 100644 index 00000000..356aeb5f --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.4.bb @@ -0,0 +1,18 @@ +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}-${PV}:" +require recipes-kernel/linux/linux-imx.inc + +SUMMARY = "Linux kernel for Toradex Colibri VFxx Computer on Modules" + +SRC_URI = "git://git.toradex.com/linux-toradex.git;protocol=git;branch=${SRCBRANCH} \ + file://defconfig" + +KERNEL_MODULE_AUTOLOAD += "${@bb.utils.contains('COMBINED_FEATURES', 'usbgadget', ' libcomposite', '',d)}" + +LOCALVERSION = "-2.8.3" +PV_append = "+git${SRCPV}" + +SRCBRANCH = "toradex_vf_4.4-next" +SRCREV = "166cb6f4a4aff202d98914fe0c5530d26ce671a5" + +DEPENDS += "lzop-native bc-native" +COMPATIBLE_MACHINE = "(vf)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.9-1.0.x.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.9-1.0.x.bb new file mode 100644 index 00000000..12465a1f --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-toradex_4.9-1.0.x.bb @@ -0,0 +1,19 @@ +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}-${PV}:" +require recipes-kernel/linux/linux-imx.inc + +SUMMARY = "Linux kernel for Toradex Freescale i.MX based modules" + +SRC_URI = "git://git.toradex.com/linux-toradex.git;protocol=git;branch=${SRCBRANCH} \ + file://defconfig" + +# Load USB functions configurable through configfs (CONFIG_USB_CONFIGFS) +KERNEL_MODULE_AUTOLOAD += "${@bb.utils.contains('COMBINED_FEATURES', 'usbgadget', ' libcomposite', '',d)}" + +LOCALVERSION = "-2.8.3" +PV_append = "+git${SRCPV}" + +SRCREV = "07d40f6ffcbb9b3db3c146f0949725752ed61b63" +SRCBRANCH = "toradex_4.9-1.0.x-imx" + +DEPENDS += "lzop-native bc-native" +COMPATIBLE_MACHINE = "(mx6|mx7)" diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/0001-mxc_hdmi-mxc_hdmi-allow-EDID-to-select-non-CEA-modes.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/0001-mxc_hdmi-mxc_hdmi-allow-EDID-to-select-non-CEA-modes.patch new file mode 100644 index 00000000..32b5e4ab --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/0001-mxc_hdmi-mxc_hdmi-allow-EDID-to-select-non-CEA-modes.patch @@ -0,0 +1,36 @@ +From c22800b44ce62956f10cdbf55f003a278f35ebfe Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Andreas=20M=C3=BCller?= <schnitzeltony@googlemail.com> +Date: Mon, 14 Nov 2016 10:23:45 +0100 +Subject: [PATCH] mxc_hdmi: mxc_hdmi: allow EDID to select non CEA modes +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +I don't want to buy a new monitor to use screen resolutions other than 640*480 +on variscite imx boards. + +Upstream-Status: Inappropriate [configuration] + +Signed-off-by: Andreas Müller <schnitzeltony@googlemail.com> +--- + drivers/video/fbdev/mxc/mxc_hdmi.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/video/fbdev/mxc/mxc_hdmi.c b/drivers/video/fbdev/mxc/mxc_hdmi.c +index c1b5126..dabdc5e 100644 +--- a/drivers/video/fbdev/mxc/mxc_hdmi.c ++++ b/drivers/video/fbdev/mxc/mxc_hdmi.c +@@ -1801,8 +1801,8 @@ static void mxc_hdmi_edid_rebuild_modelist(struct mxc_hdmi *hdmi) + mode = &hdmi->fbi->monspecs.modedb[i]; + + if (!(mode->vmode & FB_VMODE_INTERLACED) && +- (mxc_edid_mode_to_vic(mode) != 0)) { +- ++ mode->xres <= 1920 && ++ mode->yres <= 1080) { + dev_dbg(&hdmi->pdev->dev, "Added mode %d:", i); + dev_dbg(&hdmi->pdev->dev, + "xres = %d, yres = %d, freq = %d, vmode = %d, flag = %d\n", +-- +2.7.4 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/Fix-the-compile-issue-under-gcc6.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/Fix-the-compile-issue-under-gcc6.patch new file mode 100644 index 00000000..3d080b63 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/Fix-the-compile-issue-under-gcc6.patch @@ -0,0 +1,92 @@ +From 5d39bd421fc093e2c852316080538cef85a9e1a0 Mon Sep 17 00:00:00 2001 +From: yocto <yocto@yocto.org> +Date: Thu, 2 Jun 2016 00:18:33 -0500 +Subject: [PATCH] Fix the compile issue under gcc6 + +Fix the following build error: +| .../include/linux/compiler-gcc.h:106:30: fatal error: linux/compiler-gcc6.h: No such file or directory +| #include gcc_header(__GNUC__) + +Signed-off-by: Zhenhua Luo <zhenhua.luo@nxp.com> + +Upstream-Status: Pending +--- + include/linux/compiler-gcc6.h | 66 +++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 66 insertions(+) + create mode 100644 include/linux/compiler-gcc6.h + +diff --git a/include/linux/compiler-gcc6.h b/include/linux/compiler-gcc6.h +new file mode 100644 +index 0000000..cdd1cc2 +--- /dev/null ++++ b/include/linux/compiler-gcc6.h +@@ -0,0 +1,66 @@ ++#ifndef __LINUX_COMPILER_H ++#error "Please don't include <linux/compiler-gcc5.h> directly, include <linux/compiler.h> instead." ++#endif ++ ++#define __used __attribute__((__used__)) ++#define __must_check __attribute__((warn_unused_result)) ++#define __compiler_offsetof(a, b) __builtin_offsetof(a, b) ++ ++/* Mark functions as cold. gcc will assume any path leading to a call ++ to them will be unlikely. This means a lot of manual unlikely()s ++ are unnecessary now for any paths leading to the usual suspects ++ like BUG(), printk(), panic() etc. [but let's keep them for now for ++ older compilers] ++ ++ Early snapshots of gcc 4.3 don't support this and we can't detect this ++ in the preprocessor, but we can live with this because they're unreleased. ++ Maketime probing would be overkill here. ++ ++ gcc also has a __attribute__((__hot__)) to move hot functions into ++ a special section, but I don't see any sense in this right now in ++ the kernel context */ ++#define __cold __attribute__((__cold__)) ++ ++#define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__) ++ ++#ifndef __CHECKER__ ++# define __compiletime_warning(message) __attribute__((warning(message))) ++# define __compiletime_error(message) __attribute__((error(message))) ++#endif /* __CHECKER__ */ ++ ++/* ++ * Mark a position in code as unreachable. This can be used to ++ * suppress control flow warnings after asm blocks that transfer ++ * control elsewhere. ++ * ++ * Early snapshots of gcc 4.5 don't support this and we can't detect ++ * this in the preprocessor, but we can live with this because they're ++ * unreleased. Really, we need to have autoconf for the kernel. ++ */ ++#define unreachable() __builtin_unreachable() ++ ++/* Mark a function definition as prohibited from being cloned. */ ++#define __noclone __attribute__((__noclone__)) ++ ++/* ++ * Tell the optimizer that something else uses this function or variable. ++ */ ++#define __visible __attribute__((externally_visible)) ++ ++/* ++ * GCC 'asm goto' miscompiles certain code sequences: ++ * ++ * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670 ++ * ++ * Work it around via a compiler barrier quirk suggested by Jakub Jelinek. ++ * Fixed in GCC 4.8.2 and later versions. ++ * ++ * (asm goto is automatically volatile - the naming reflects this.) ++ */ ++#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0) ++ ++#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP ++#define __HAVE_BUILTIN_BSWAP32__ ++#define __HAVE_BUILTIN_BSWAP64__ ++#define __HAVE_BUILTIN_BSWAP16__ ++#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */ +-- +2.5.0 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/defconfig b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/defconfig new file mode 100644 index 00000000..65980d41 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/defconfig @@ -0,0 +1,513 @@ +CONFIG_PRINTK_TIME=y +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_FHANDLE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_NAMESPACES=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_KALLSYMS_ALL=y +CONFIG_PERF_EVENTS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_MXC=y +CONFIG_SOC_IMX50=y +CONFIG_SOC_IMX53=y +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6SL=y +CONFIG_SOC_IMX6SX=y +CONFIG_SOC_IMX6UL=y +CONFIG_SOC_IMX7D=y +CONFIG_SOC_VF610=y +# CONFIG_SWP_EMULATE is not set +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCI_IMX6=y +CONFIG_SMP=y +CONFIG_HAVE_ARM_ARCH_TIMER=y +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_CMA=y +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_ARM_IMX6Q_CPUFREQ=y +CONFIG_ARM_IMX7D_CPUFREQ=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_BINFMT_MISC=m +CONFIG_PM_DEBUG=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_DEBUG=y +CONFIG_NETFILTER_NETLINK_ACCT=y +CONFIG_NETFILTER_NETLINK_QUEUE=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_TIMEOUT=y +CONFIG_NF_CONNTRACK_TIMESTAMP=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_SNMP=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NF_CT_NETLINK_TIMEOUT=y +CONFIG_NETFILTER_NETLINK_QUEUE_CT=y +CONFIG_NF_TABLES=y +CONFIG_NF_TABLES_INET=y +CONFIG_NFT_EXTHDR=y +CONFIG_NFT_META=y +CONFIG_NFT_CT=y +CONFIG_NFT_RBTREE=y +CONFIG_NFT_HASH=y +CONFIG_NFT_COUNTER=y +CONFIG_NFT_LOG=y +CONFIG_NFT_LIMIT=y +CONFIG_NFT_NAT=y +CONFIG_VLAN_8021Q=y +CONFIG_LLC2=y +CONFIG_CAN=y +CONFIG_CAN_FLEXCAN=y +CONFIG_CAN_M_CAN=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIBTUSB=y +# CONFIG_BT_HCIBTUSB_BCM is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIUART_3WIRE=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=0 +CONFIG_IMX_WEIM=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_SST25L=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_NAND_MXC=y +CONFIG_MTD_SPI_NOR=y +CONFIG_SPI_FSL_QUADSPI=y +CONFIG_MTD_UBI=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_ATA=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_IMX=y +CONFIG_PATA_IMX=y +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_CS89x0=y +CONFIG_CS89x0_PLATFORM=y +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_SMC91X=y +CONFIG_SMC911X=y +CONFIG_SMSC911X=y +# CONFIG_NET_VENDOR_STMICRO is not set +CONFIG_MICREL_PHY=y +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_CDC_EEM=m +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=m +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_IMX=y +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ELANTECH=y +# CONFIG_MOUSE_PS2_FOCALTECH is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=y +CONFIG_TOUCHSCREEN_FT5X06=y +CONFIG_TOUCHSCREEN_IMX6UL_TSC=y +CONFIG_TOUCHSCREEN_EDT_FT5X06=y +CONFIG_INPUT_MISC=y +CONFIG_SERIO_SERPORT=m +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_FSL_OTP=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_IMX=y +CONFIG_SPI=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_IMX=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_MAX732X=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_74X164=y +CONFIG_POWER_SUPPLY=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_SENSORS_MAX17135=y +CONFIG_SENSORS_MAG3110=y +CONFIG_THERMAL=y +CONFIG_CPU_THERMAL=y +CONFIG_IMX_THERMAL=y +CONFIG_DEVICE_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y +CONFIG_MFD_DA9052_I2C=y +CONFIG_MFD_MC13XXX_SPI=y +CONFIG_MFD_MC13XXX_I2C=y +CONFIG_MFD_MAX17135=y +CONFIG_MFD_SI476X_CORE=y +CONFIG_MFD_STMPE=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_DA9052=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_MAX17135=y +CONFIG_REGULATOR_MC13783=y +CONFIG_REGULATOR_MC13892=y +CONFIG_REGULATOR_PFUZE100=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_RC_SUPPORT=y +# CONFIG_RC_DECODERS is not set +CONFIG_RC_DEVICES=y +CONFIG_IR_GPIO_CIR=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_CAPTURE=m +CONFIG_MXC_CAMERA_OV5640=m +CONFIG_MXC_CAMERA_OV5642=m +CONFIG_MXC_CAMERA_OV5640_MIPI=m +CONFIG_MXC_TVIN_ADV7180=m +CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +CONFIG_VIDEO_MXC_PXP_V4L2=y +CONFIG_VIDEO_MXC_CSI_CAMERA=m +CONFIG_MXC_VADC=m +CONFIG_MXC_MIPI_CSI=m +CONFIG_MXC_CAMERA_OV5647_MIPI=m +CONFIG_SOC_CAMERA=y +CONFIG_VIDEO_MX3=y +CONFIG_V4L_MEM2MEM_DRIVERS=y +CONFIG_VIDEO_CODA=y +CONFIG_RADIO_SI476X=y +CONFIG_SOC_CAMERA_OV2640=y +CONFIG_DRM=y +CONFIG_DRM_VIVANTE=y +CONFIG_FB=y +CONFIG_FB_MXS=y +CONFIG_FB_MXC_SYNC_PANEL=y +CONFIG_FB_MXC_MIPI_DSI=y +CONFIG_FB_MXC_MIPI_DSI_SAMSUNG=y +CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y +CONFIG_FB_MXC_LDB=y +CONFIG_FB_MXC_HDMI=y +CONFIG_FB_MXS_SII902X=y +CONFIG_FB_MXC_DCIC=m +CONFIG_HANNSTAR_CABC=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_L4F00242T03=y +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_LOGO=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_SOC=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_SOC_EUKREA_TLV320=y +CONFIG_SND_SOC_IMX_WM8960=y +CONFIG_SND_SOC_IMX_SII902X=y +CONFIG_SND_SOC_IMX_WM8958=y +CONFIG_SND_SOC_IMX_CS42888=y +CONFIG_SND_SOC_IMX_WM8962=y +CONFIG_SND_SOC_IMX_TLV320AIC3X=y +CONFIG_SND_SOC_IMX_SGTL5000=y +CONFIG_SND_SOC_IMX_MQS=y +CONFIG_SND_SOC_IMX_SPDIF=y +CONFIG_SND_SOC_IMX_MC13783=y +CONFIG_SND_SOC_IMX_SI476X=y +CONFIG_SND_SOC_IMX_HDMI=y +CONFIG_SND_SOC_TLV320AIC31XX=y +CONFIG_USB=y +CONFIG_USB_OTG_WHITELIST=y +CONFIG_USB_OTG_FSM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MXC=y +CONFIG_USB_HCD_TEST_MODE=y +CONFIG_USB_ACM=m +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_EHSET_TEST_FIXTURE=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V3_PRE=y +CONFIG_MXC_SIM=y +CONFIG_MXC_MIPI_CSI2=y +CONFIG_MXC_HDMI_CEC=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_MC13XXX=y +CONFIG_RTC_DRV_MXC=y +CONFIG_RTC_DRV_SNVS=y +CONFIG_DMADEVICES=y +CONFIG_MXC_PXP_V2=y +CONFIG_MXC_PXP_V3=y +CONFIG_IMX_SDMA=y +CONFIG_MXS_DMA=y +CONFIG_DMATEST=m +CONFIG_STAGING=y +CONFIG_STAGING_MEDIA=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_IIO=y +CONFIG_IMX7D_ADC=y +CONFIG_VF610_ADC=y +CONFIG_PWM=y +CONFIG_PWM_IMX=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_UTF8=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_FTRACE is not set +CONFIG_SECURITYFS=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_RMD128=y +CONFIG_CRYPTO_RMD160=y +CONFIG_CRYPTO_RMD256=y +CONFIG_CRYPTO_RMD320=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_TGR192=y +CONFIG_CRYPTO_WP512=y +CONFIG_CRYPTO_ARC4=y +CONFIG_CRYPTO_BLOWFISH=y +CONFIG_CRYPTO_CAMELLIA=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_TWOFISH=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y +CONFIG_CRC_CCITT=m +CONFIG_CRC_T10DIF=y +CONFIG_CRC7=m +CONFIG_AVERAGE=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_CFG80211=m +CONFIG_VIRTUALIZATION=y +CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +CONFIG_MAC80211_RC_MINSTREL_VHT=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +CONFIG_MAC80211_MESH=y +CONFIG_RTL_CARDS=m +CONFIG_WL_TI=y +CONFIG_WL12XX=m +CONFIG_WL18XX=m +CONFIG_WLCORE=m +CONFIG_WLCORE_SDIO=m +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_INPUT_FF_MEMLESS=m +CONFIG_HID_BETOP_FF=m +CONFIG_HID_EMS_FF=m +CONFIG_HID_ELECOM=m +CONFIG_HID_ELO=m +CONFIG_HID_EZKEY=m +CONFIG_HID_HOLTEK=m +CONFIG_HOLTEK_FF=y +CONFIG_HID_KEYTOUCH=m +CONFIG_HID_ICADE=m +CONFIG_HID_KENSINGTON=m +CONFIG_HID_LOGITECH=m +CONFIG_HID_LOGITECH_HIDPP=m +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGIG940_FF=y +CONFIG_LOGIWHEELS_FF=y +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MULTITOUCH=m +CONFIG_HID_NTRIG=m +CONFIG_HID_PANTHERLORD=m +CONFIG_PANTHERLORD_FF=y +CONFIG_HID_PENMOUNT=m +CONFIG_HID_SONY=m +CONFIG_SONY_FF=y +CONFIG_HID_RMI=m +CONFIG_HID_WIIMOTE=m diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/imx6qdl-var-som-Enable-wl12xx.patch b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/imx6qdl-var-som-Enable-wl12xx.patch new file mode 100644 index 00000000..8accc755 --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite-4.1.15/imx6qdl-var-som-Enable-wl12xx.patch @@ -0,0 +1,84 @@ +From 14642037c45996b5288bfec2ce9202f99fa79968 Mon Sep 17 00:00:00 2001 +From: Fabio Berton <fabio.berton@ossystems.com.br> +Date: Mon, 26 Sep 2016 10:54:05 -0300 +Subject: [PATCH] imx6qdl-var-som: Enable wl12xx +Organization: O.S. Systems Software LTDA. + +Upstream-Status: Pending + +Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> +--- + arch/arm/boot/dts/imx6qdl-var-som.dtsi | 51 +++++++++++++++------------------- + 1 file changed, 22 insertions(+), 29 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6qdl-var-som.dtsi b/arch/arm/boot/dts/imx6qdl-var-som.dtsi +index 89e1e3f..66855fe 100644 +--- a/arch/arm/boot/dts/imx6qdl-var-som.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-var-som.dtsi +@@ -574,6 +574,7 @@ + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17069 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17069 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17069 ++#define GPIRQ_WL1271 <&gpio6 17 IRQ_TYPE_LEVEL_HIGH> + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x13059 /* Reserve two pins from sd1 for wl8 gpio, this is pulled low at reset for WL_EN */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 /* this is for wl_irq which driver will configure as an input with a pull down */ + >; +@@ -815,34 +816,26 @@ + status = "okay"; + }; + +-&usdhc3 { /* uSDHC3, TiWi wl1271 7 Wilink8 WL18xx*/ +- pinctrl-names = "default", "state_100mhz", "state_200mhz"; +- pinctrl-0 = <&pinctrl_usdhc3_2>; +- pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>; +- pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>; +- keep-power-in-suspend; +- enable-sdio-wakeup; +- vmmc-supply = <&wlan_en_reg>; +- bus-width = <4>; +- non-removable; +- cap-power-off-card; +- status = "okay"; +- #address-cells = <1>; +- #size-cells = <0>; +- wlcore: wlcore@0 { +- compatible = "ti,wl1835"; +- reg = <2>; +-#if 0 +- gpio = <177>; /* The wl8 driver expects gpio to be an integer, so gpio6_17 is (6-1)*32+17=207 +- irq property must not be set as driver derives irq number from gpio if no irq set +- use edge irqs for suspend/resume */ +- platform-quirks = <1>; +-#endif +- interrupt-parent = <&gpio6>; +- interrupts = <17 IRQ_TYPE_EDGE_RISING>; +- +- /* if a 12xx card is there, configure the clock to WL12XX_REFCLOCK_38_XTAL */ +- board-ref-clock = <4>; +- }; ++&usdhc3 { /* uSDHC3, TiWi wl1271 */ ++ pinctrl-names = "default", "state_100mhz", "state_200mhz"; ++ pinctrl-0 = <&pinctrl_usdhc3_2>; ++ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>; ++ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>; ++ bus-width = <4>; ++ non-removable; ++ vmmc-supply = <&wlan_en_reg>; ++ vqmmc-1-8-v; ++ cap-power-off-card; ++ keep-power-in-suspend; ++ status = "okay"; + ++ #address-cells = <1>; ++ #size-cells = <0>; ++ wlcore: wlcore@2 { ++ compatible = "ti,wl1271"; ++ interrupts-extended = GPIRQ_WL1271; ++ reg = <2>; ++ ref-clock-frequency = <38400000>; ++ }; + }; ++ +-- +2.1.4 + diff --git a/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite_4.1.15.bb b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite_4.1.15.bb new file mode 100644 index 00000000..4151af4b --- /dev/null +++ b/bsp/meta-freescale-3rdparty/recipes-kernel/linux/linux-variscite_4.1.15.bb @@ -0,0 +1,25 @@ +# Copyright (C) 2013-16 Freescale Semiconductor +# Released under the MIT license (see COPYING.MIT for the terms) + +require recipes-kernel/linux/linux-imx.inc + +DEPENDS += "lzop-native bc-native" + +COMPATIBLE_MACHINE = "(mx6)" + +SRCBRANCH = "imx-rel_imx_4.1.15_1.1.0_ga-var02" +SRCREV = "1e7785b94784f23703dabeff3072a0a89e2bc90d" +SRC_URI = " \ + git://github.com/varigit/linux-2.6-imx.git;protocol=git;branch=${SRCBRANCH} \ + file://Fix-the-compile-issue-under-gcc6.patch \ + file://0001-mxc_hdmi-mxc_hdmi-allow-EDID-to-select-non-CEA-modes.patch \ + file://imx6qdl-var-som-Enable-wl12xx.patch \ + file://defconfig \ +" + +LOCALVERSION = "-1.1.0" + +KERNEL_IMAGETYPE = "uImage" + +KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}" + |