diff options
| author |   ToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp> | 2020-03-30 09:24:26 +0900 |
|---|---|---|
| committer | ToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp> | 2020-03-30 09:24:26 +0900 |
| commit | 5b80bfd7bffd4c20d80b7c70a7130529e9a755dd (patch) | |
| tree | b4bb18dcd1487dbf1ea8127e5671b7bb2eded033 /bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas | |
| parent | 706ad73eb02caf8532deaf5d38995bd258725cb8 (diff) | |
agl-basesystem
Diffstat (limited to 'bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas')
16 files changed, 14452 insertions, 0 deletions
diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-ADSP-add-document-for-compatible-string-renesas-rcar.patch b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-ADSP-add-document-for-compatible-string-renesas-rcar.patch new file mode 100644 index 00000000..765053fa --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-ADSP-add-document-for-compatible-string-renesas-rcar.patch @@ -0,0 +1,32 @@ +From 5f378e5db591a4a119b6cface6037cbded240506 Mon Sep 17 00:00:00 2001 +From: tienphitran <tien.tran.uw@renesas.com> +Date: Thu, 25 Oct 2018 13:25:10 +0700 +Subject: [PATCH 1/6] ADSP: add document for compatible string + "renesas,rcar_adsp_sound_gen3" + +Signed-off-by: tienphitran <tien.tran.uw@renesas.com> +--- + .../devicetree/bindings/sound/renesas,adsp.txt | 11 +++++++++++ + 1 file changed, 11 insertions(+) + create mode 100644 Documentation/devicetree/bindings/sound/renesas,adsp.txt + +diff --git a/Documentation/devicetree/bindings/sound/renesas,adsp.txt b/Documentation/devicetree/bindings/sound/renesas,adsp.txt +new file mode 100644 +index 000000000000..b529bcadea82 +--- /dev/null ++++ b/Documentation/devicetree/bindings/sound/renesas,adsp.txt +@@ -0,0 +1,11 @@ ++Renesas ADSP sound driver ++ ++Required properties: ++- compatible : "renesas,rcar_adsp_sound_gen3" ++ ++Example: ++ ++rcar_adsp_sound: adsp_sound@0 { ++ compatible = "renesas,rcar_adsp_sound_gen3"; ++ status = "disabled"; ++}; +-- +2.19.1 + diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-Revert-ASoC-rsnd-ssi-wait-maximum-5ms-for-status-che.patch b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-Revert-ASoC-rsnd-ssi-wait-maximum-5ms-for-status-che.patch new file mode 100644 index 00000000..521631b0 --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-Revert-ASoC-rsnd-ssi-wait-maximum-5ms-for-status-che.patch @@ -0,0 +1,34 @@ +From a0e2d5ab917de4d8fce6bed4a5c87b729be30ca7 Mon Sep 17 00:00:00 2001 +From: Mark Farrugia <mark.farrugia@fiberdyne.com.au> +Date: Sat, 1 Dec 2018 23:48:49 +1100 +Subject: [PATCH] Revert: ASoC: rsnd: ssi: wait maximum 5ms for status check + +By waiting only a maximum of 5ms, we break the Renesas +ADSP firmware's ability to access the SSI directly. +This functionality is currently used by the Fiberdyne DSP. + +Since we shouldn't use udelay() for 50us +(linux/Documentation/timers/timers-howto.txt), we instead increase +the loop length to 1024*10 (5ms*10=50ms). + +Signed-off-by: Mark Farrugia <mark.farrugia@fiberdyne.com.au> +--- + sound/soc/sh/rcar/ssi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c +index 9538f76f8e20..0395e33bebdd 100644 +--- a/sound/soc/sh/rcar/ssi.c ++++ b/sound/soc/sh/rcar/ssi.c +@@ -166,7 +166,7 @@ static void rsnd_ssi_status_check(struct rsnd_mod *mod, + u32 status; + int i; + +- for (i = 0; i < 1024; i++) { ++ for (i = 0; i < (10*1024); i++) { + status = rsnd_ssi_status_get(mod); + if (status & bit) + return; +-- +2.17.1 + diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-arm64-bpf-correct-broken-uapi-for-BPF_PROG_TYPE_PERF.patch b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-arm64-bpf-correct-broken-uapi-for-BPF_PROG_TYPE_PERF.patch new file mode 100644 index 00000000..9c38a327 --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-arm64-bpf-correct-broken-uapi-for-BPF_PROG_TYPE_PERF.patch @@ -0,0 +1,61 @@ +From a39cada70268aadff7153e4f782bcd90a5c69d07 Mon Sep 17 00:00:00 2001 +From: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> +Date: Mon, 4 Dec 2017 10:56:46 +0100 +Subject: [PATCH] arm64/bpf: correct broken uapi for BPF_PROG_TYPE_PERF_EVENT + program type + +Correct the broken uapi for the BPF_PROG_TYPE_PERF_EVENT program type +by exporting the user_pt_regs structure instead of the pt_regs structure +that is in-kernel only. + +Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> +Reviewed-by: Thomas Richter <tmricht@linux.vnet.ibm.com> +Acked-by: Alexei Starovoitov <ast@kernel.org> +Cc: Will Deacon <will.deacon@arm.com> +Cc: Mark Rutland <mark.rutland@arm.com> +Cc: Arnaldo Carvalho de Melo <acme@kernel.org> +Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> +--- + arch/arm64/include/asm/perf_event.h | 2 ++ + arch/arm64/include/uapi/asm/bpf_perf_event.h | 9 +++++++++ + 2 files changed, 11 insertions(+) + create mode 100644 arch/arm64/include/uapi/asm/bpf_perf_event.h + +diff --git a/arch/arm64/include/asm/perf_event.h b/arch/arm64/include/asm/perf_event.h +index 8d5cbec..f9ccc36 100644 +--- a/arch/arm64/include/asm/perf_event.h ++++ b/arch/arm64/include/asm/perf_event.h +@@ -18,6 +18,7 @@ + #define __ASM_PERF_EVENT_H + + #include <asm/stack_pointer.h> ++#include <asm/ptrace.h> + + #define ARMV8_PMU_MAX_COUNTERS 32 + #define ARMV8_PMU_COUNTER_MASK (ARMV8_PMU_MAX_COUNTERS - 1) +@@ -79,6 +80,7 @@ struct pt_regs; + extern unsigned long perf_instruction_pointer(struct pt_regs *regs); + extern unsigned long perf_misc_flags(struct pt_regs *regs); + #define perf_misc_flags(regs) perf_misc_flags(regs) ++#define perf_arch_bpf_user_pt_regs(regs) ®s->user_regs + #endif + + #define perf_arch_fetch_caller_regs(regs, __ip) { \ +diff --git a/arch/arm64/include/uapi/asm/bpf_perf_event.h b/arch/arm64/include/uapi/asm/bpf_perf_event.h +new file mode 100644 +index 0000000..b551b74 +--- /dev/null ++++ b/arch/arm64/include/uapi/asm/bpf_perf_event.h +@@ -0,0 +1,9 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++#ifndef _UAPI__ASM_BPF_PERF_EVENT_H__ ++#define _UAPI__ASM_BPF_PERF_EVENT_H__ ++ ++#include <asm/ptrace.h> ++ ++typedef struct user_pt_regs bpf_user_pt_regs_t; ++ ++#endif /* _UAPI__ASM_BPF_PERF_EVENT_H__ */ +-- +2.7.4 + diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-rpmsg-Add-message-to-be-able-to-configure-RPMSG_VIRT.patch b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-rpmsg-Add-message-to-be-able-to-configure-RPMSG_VIRT.patch new file mode 100644 index 00000000..8c0a2af7 --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0001-rpmsg-Add-message-to-be-able-to-configure-RPMSG_VIRT.patch @@ -0,0 +1,27 @@ +From 1cdbf4ed4717eefa2b6237c1e63e351b62990522 Mon Sep 17 00:00:00 2001 +From: Dien Pham <dien.pham.ry@renesas.com> +Date: Fri, 23 Feb 2018 18:29:32 +0700 +Subject: [PATCH] rpmsg: Add message to be able to configure RPMSG_VIRTIO from + defconfig + +Signed-off-by: Dien Pham <dien.pham.ry@renesas.com> +--- + drivers/rpmsg/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/rpmsg/Kconfig b/drivers/rpmsg/Kconfig +index 0fe6eac..5b1e61b 100644 +--- a/drivers/rpmsg/Kconfig ++++ b/drivers/rpmsg/Kconfig +@@ -47,7 +47,7 @@ config RPMSG_QCOM_SMD + platforms. + + config RPMSG_VIRTIO +- tristate ++ tristate "Enable remote processor message and virtual I/O configure" + select RPMSG + select VIRTIO + +-- +1.9.1 + diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0002-ADSP-add-ADSP-sound-driver-source.patch b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0002-ADSP-add-ADSP-sound-driver-source.patch new file mode 100644 index 00000000..14719fba --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0002-ADSP-add-ADSP-sound-driver-source.patch @@ -0,0 +1,7204 @@ +From 829c17a722611c39cda6926f0fac46fa586c70ef Mon Sep 17 00:00:00 2001 +From: tienphitran <tien.tran.uw@renesas.com> +Date: Mon, 17 Jun 2019 17:04:02 +0700 +Subject: [PATCH 2/6] ADSP: add ADSP sound driver source + +Signed-off-by: tienphitran <tien.tran.uw@renesas.com> + +diff --git a/include/adsp_drv/xf-adsp-drv-ext.h b/include/adsp_drv/xf-adsp-drv-ext.h +new file mode 100644 +index 0000000..6c3dbc0 +--- /dev/null ++++ b/include/adsp_drv/xf-adsp-drv-ext.h +@@ -0,0 +1,58 @@ ++/***************************************************************************** ++ * \file xf-adsp-driver-ext.h ++ * \brief Header file for ADSP driver extension part ++ * \addtogroup ADSP Driver ++ ****************************************************************************** ++ * \date Oct. 21, 2017 ++ * \author Renesas Electronics Corporation ++ ****************************************************************************** ++ * \par Copyright ++ * ++ * Copyright(c) 2016 Renesas Electoronics Corporation ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++ * copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ++ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN ++ * THE SOFTWARE. ++ ******************************************************************************/ ++ ++#ifndef __XF_ADSP_DRV_EXT_H ++#define __XF_ADSP_DRV_EXT_H ++ ++/*********************************************************** ++ * Extension client APIs ++ * ********************************************************/ ++ ++struct xf_adsp_base_cmd { ++ /* register new client for ADSP base control */ ++ int (*client_register)(void **private_data); ++ /* unregister client */ ++ int (*client_unregister)(void *private_data); ++ /* get data from proxy */ ++ int (*recv)(void *private_data, void *buf); ++ /* send data to proxy */ ++ int (*send)(void *private_data, void *buf); ++ /* wait the valid message in the response queue */ ++ int (*poll)(void *private_data, int *condition); ++}; ++ ++/* create ADSP base control data */ ++int xf_adsp_base_create(struct xf_adsp_base_cmd *cmd); ++ ++/* destroy ADSP base control data */ ++int xf_adsp_base_destroy(void); ++ ++#endif +diff --git a/sound/soc/adsp/Kconfig b/sound/soc/adsp/Kconfig +new file mode 100644 +index 0000000..605261f +--- /dev/null ++++ b/sound/soc/adsp/Kconfig +@@ -0,0 +1,14 @@ ++## SoC for ADSP driver configuration ++menu "ASoC ADSP driver" ++ ++config SND_SOC_ADSP ++ tristate "SoC Audio for R-Car ADSP" ++ select SND_SIMPLE_CARD ++ select SND_SIMPLE_SCU_CARD ++ select SND_AUDIO_GRAPH_CARD ++ select SND_AUDIO_GRAPH_SCU_CARD ++ default y ++ help ++ This option enables ALSA ADSP sound supports ADSP module ++ ++endmenu +diff --git a/sound/soc/adsp/Makefile b/sound/soc/adsp/Makefile +new file mode 100644 +index 0000000..8277fdb +--- /dev/null ++++ b/sound/soc/adsp/Makefile +@@ -0,0 +1,3 @@ ++## Makefile for SoC ADSP driver ++snd-soc-adsp-objs := xf-adsp-alsa.o xf-adsp-base.o ++obj-$(CONFIG_SND_SOC_ADSP) += snd-soc-adsp.o +diff --git a/sound/soc/adsp/xf-adsp-alsa.c b/sound/soc/adsp/xf-adsp-alsa.c +new file mode 100644 +index 0000000..493ff84 +--- /dev/null ++++ b/sound/soc/adsp/xf-adsp-alsa.c +@@ -0,0 +1,3939 @@ ++/** *************************************************************************** ++ * \file xf-adsp-alsa.c ++ * \brief Source file for ADSP ALSA Driver ++ * \addtogroup ADSP Driver ++ ****************************************************************************** ++ * \date Oct. 21, 2017 ++ * \author Renesas Electronics Corporation ++ ****************************************************************************** ++ * \par Copyright ++ * ++ * Copyright(c) 2016 Renesas Electoronics Corporation ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER ++ * DEALINGS IN THE SOFTWARE. ++ *****************************************************************************/ ++ ++#include <linux/slab.h> ++#include <linux/platform_device.h> ++#include <linux/module.h> ++#include <linux/io.h> ++#include <linux/sched/signal.h> ++#include <linux/delay.h> ++#include <sound/core.h> ++#include <sound/control.h> ++#include <sound/pcm.h> ++#include <sound/pcm_params.h> ++#include <sound/soc.h> ++#include <sound/pcm-indirect.h> ++#include <linux/time.h> ++ ++#include "xf-adsp-base.h" ++ ++/* Name of Volume control for playback */ ++#define PLAYBACK_VOLUME_CTR_NAME "PlaybackVolume" ++ ++/* Name of Volume control for capture */ ++#define CAPTURE_VOLUME_CTR_NAME "CaptureVolume" ++ ++/* Name of Sample Rate control for playback */ ++#define PLAYBACK_OUT_RATE_CTR_NAME "PlaybackOutRate" ++ ++/* Name of Output Channel control for playback */ ++#define PLAYBACK_OUT_CHANNEL_CTR_NAME "PlaybackOutChannel" ++ ++/* Name of Sample Rate control for capture */ ++#define CAPTURE_IN_RATE_CTR_NAME "CaptureInRate" ++ ++/* Name of Equalizer parameters control for playback */ ++#define PLAYBACK_EQZ_CTR_NAME "PlaybackEQZControl" ++ ++/* Name of Equalizer parameters control for capture */ ++#define CAPTURE_EQZ_CTR_NAME "CaptureEQZControl" ++ ++/* Name of Equalizer Switch control for playback */ ++#define PLAYBACK_EQZ_SWITCH_CTR_NAME "PlaybackEQZSwitch" ++ ++/* Name of Equalizer Switch control for capture */ ++#define CAPTURE_EQZ_SWITCH_CTR_NAME "CaptureEQZSwitch" ++ ++/* Name of Volume control for TDM playback */ ++#define TDM_PLAYBACK_VOLUME_CTR_NAME "TDMPlaybackVolume" ++ ++/* Name of Volume control for TDM capture */ ++#define TDM_CAPTURE_VOLUME_CTR_NAME "TDMCaptureVolume" ++ ++/* Name of Sample Rate control for TDM playback */ ++#define TDM_PLAYBACK_OUT_RATE_CTR_NAME "TDMPlaybackOutRate" ++ ++/* Name of Sample Rate control for TDM capture */ ++#define TDM_CAPTURE_IN_RATE_CTR_NAME "TDMCaptureInRate" ++ ++/* Prefix of Playback control name */ ++#define PREFIX_OF_PLAYBACK_CTR_NAME PLAYBACK_VOLUME_CTR_NAME[0] ++ ++/* Prefix of Capture control name */ ++#define PREFIX_OF_CAPTURE_CTR_NAME CAPTURE_VOLUME_CTR_NAME[0] ++ ++/* Prefix of TDM control name */ ++#define PREFIX_OF_TDM_CTR_NAME TDM_PLAYBACK_VOLUME_CTR_NAME[0] ++ ++/* Prefix of TDM playback */ ++#define TDM_PLAYBACK TDM_PLAYBACK_VOLUME_CTR_NAME[3] ++ ++/* Prefix of TDM record */ ++#define TDM_CAPTURE TDM_CAPTURE_VOLUME_CTR_NAME[3] ++ ++/* Number of control for playback & capture */ ++#define RDR_CONTROL_NUM (9) ++ ++/* Number of controls for TDM */ ++#define TDM_CONTROL_NUM (4) ++ ++/* Indicate playback stream */ ++#define DIRECT_PLAYBACK (0) ++ ++/* Indicate capture stream */ ++#define DIRECT_CAPTURE (1) ++ ++/* Indicate stream number */ ++#define DIRECT_NUM (2) ++ ++/* Supported frame size for playback/record function in driver */ ++#define FRAME_SIZE (1024) ++ ++/* Supported frame size for TDM playback/record function in driver */ ++#define TDM_FRAME_SIZE (1024) ++ ++/* Supported sample rate in driver */ ++#define SND_ADSP_SAMPLE_RATES (SNDRV_PCM_RATE_32000 | \ ++ SNDRV_PCM_RATE_44100 | \ ++ SNDRV_PCM_RATE_48000) ++ ++/* Supported PCM width in driver */ ++#define SND_ADSP_PCM_WIDTHS (SNDRV_PCM_FMTBIT_S16_LE | \ ++ SNDRV_PCM_FMTBIT_S24_LE) ++ ++/* Macro to control DAI index */ ++/* DAI 0 index for playback/record functions of stereo/mono formats */ ++#define RDR_DAI_IDX0 (0) ++ ++/* DAI 1 index for playback/record functions of stereo/mono formats */ ++#define RDR_DAI_IDX1 (1) ++ ++/* DAI 2 index for playback/record functions of stereo/mono formats */ ++#define RDR_DAI_IDX2 (2) ++ ++/* DAI 3 index for playback/record functions of stereo/mono formats */ ++#define RDR_DAI_IDX3 (3) ++ ++/* DAI 4 index for playback/record functions of TDM formats */ ++#define TDM_DAI_IDX (4) ++ ++/* Maximum number of DAI supported by driver */ ++#define MAX_DAI_IDX (5) ++ ++/* Renderer/Capture software information */ ++/* Minimum channel number supported */ ++#define MIN_CHANNEL (1) ++ ++/* Maximum channel number supported */ ++#define MAX_CHANNEL (2) ++ ++/* Minimum buffer size in byte */ ++#define MIN_BUF_SIZE (FRAME_SIZE * MIN_CHANNEL * 2) ++ ++/* Maximum buffer size in byte */ ++#define MAX_BUF_SIZE (FRAME_SIZE * MAX_CHANNEL * 4) ++ ++/* Minimum numbers of period in the buffer */ ++#define MIN_PERIOD (1) ++ ++/* Maximum numbers of period in the buffer */ ++#define MAX_PERIOD (4) ++ ++/* Maximun numbers of bytes in ALSA buffer */ ++#define MAX_BUFFER_BYTES (MAX_PERIOD * MAX_BUF_SIZE) ++ ++/* TDM software information */ ++/*< Minimum channel number supported in TDM plugin */ ++#define TDM_MIN_CHANNEL (6) ++ ++/* Maximum channel number supported in TDM plugin */ ++#define TDM_MAX_CHANNEL (8) ++ ++/* Minimum buffer size in byte for TDM format */ ++#define TDM_MIN_BUF_SIZE (TDM_FRAME_SIZE * TDM_MIN_CHANNEL * 2) ++ ++/* Maximum buffer size in byte for TDM format */ ++#define TDM_MAX_BUF_SIZE (TDM_FRAME_SIZE * TDM_MAX_CHANNEL * 4) ++ ++/* Minimum numbers of period in the buffer for TDM format */ ++#define TDM_MIN_PERIOD (1) ++ ++/* Maximum numbers of period in the buffer for TDM format */ ++#define TDM_MAX_PERIOD (4) ++ ++/* Maximum numbers of bytes in ALSA buffer for TDM format */ ++#define TDM_MAX_BUFFER_BYTES (TDM_MAX_PERIOD * TDM_MAX_BUF_SIZE) ++ ++/* Volume scale used when user set */ ++#define VOLUME_SCALE (100) ++ ++/* Maximum element in Equalizer parameter control */ ++#define MAX_EQZ_PARAM_NUMBER (55) ++ ++/* Equalizer control is disabled */ ++#define EQZ_OFF (0) ++ ++/* Equalizer control is enabled */ ++#define EQZ_ON (1) ++ ++/* Component status */ ++/* Handle state is NULL */ ++#define XF_HANDLE_NULL (0) ++ ++/* Handle state is CREATED after creating handle successfully */ ++#define XF_HANDLE_CREATED BIT(0) ++ ++/* Handle state is READY after finishing handle init */ ++#define XF_HANDLE_READY BIT(1) ++ ++/* channels */ ++/* Mono stream */ ++#define MONAURAL (1) ++ ++/* Stereo stream */ ++#define STEREO (2) ++ ++/* define number of bytes in a sample of 24 bits format types */ ++/* store 24 bits data in 4 bytes LE */ ++#define FMTBIT_S24_LE_BYTES_PER_SAMPLE (4) ++ ++/* store 24 bits data in 3 bytes LE */ ++#define FMTBIT_S24_3LE_BYTES_PER_SAMPLE (3) ++ ++/* helper macro to get bytes per sample number */ ++#define BYTES_PER_SAMPLE(fmt) (FMTBIT_##fmt##_BYTES_PER_SAMPLE) ++ ++/* check component is created */ ++#define COMPONENT_IS_CREATED(n) (((n & XF_HANDLE_CREATED) != 0) ? TRUE : FALSE) ++ ++/* check component is ready */ ++#define COMPONENT_IS_READY(n) (((n & XF_HANDLE_READY) != 0) ? TRUE : FALSE) ++ ++/* indicator of stream order */ ++#define MIX_UNUSED (0) ++#define FIRST_RUN (2) ++#define SECOND_RUN (1) ++ ++/* check MIX usage */ ++#define MIX_ENABLED(mix_ctl) ((mix_ctl == SECOND_RUN) ? TRUE : FALSE) ++ ++/******************************************************************* ++ * base structures for ADSP ALSA driver ++ * ****************************************************************/ ++ ++/** \struct snd_adsp_control ++ * \brief Structure stores parameters from user ++ */ ++struct snd_adsp_control { ++ /* Volume rate for playback/record */ ++ int vol_rate[DIRECT_NUM][MAX_DAI_IDX - 1]; ++ ++ /* Volume rate for TDM playback/TDM record */ ++ int tdm_vol_rate[DIRECT_NUM]; ++ ++ /* Out sample rate with Renderer, in sample rate with Capture */ ++ int sample_rate[DIRECT_NUM][MAX_DAI_IDX - 1]; ++ ++ /* Out sample rate for TDM Renderer, in sample rate for TDM Capture */ ++ int tdm_sample_rate[DIRECT_NUM]; ++ ++ /* Output channel of playback */ ++ int rdr_out_ch[MAX_DAI_IDX - 1]; ++ ++ /* Equalizer parameters */ ++ struct xf_adsp_equalizer_params eqz_params[DIRECT_NUM][MAX_DAI_IDX - 1]; ++ ++ /* Equalizer switch */ ++ int eqz_switch[DIRECT_NUM][MAX_DAI_IDX - 1]; ++ ++ /* Indicator of MIX usage */ ++ int mix_usage; ++}; ++ ++/** \struct snd_adsp_base_info ++ * \brief Structure stores some base information of a stream ++ */ ++struct snd_adsp_base_info { ++ /* high resolution timer data */ ++ struct hrtimer hrtimer; ++ ++ /* kernel time value in nanosecond */ ++ ktime_t ktime; ++ ++ /* save interrupt state before getting lock */ ++ unsigned long flag; ++ ++ /* high resolution timer state */ ++ int hrt_state; ++ ++ /* target handle id of ALSA driver */ ++ int handle_id; ++ ++ /* data buffer */ ++ char *buffer[XF_BUF_POOL_SIZE]; ++ ++ /* size of each allocated data buffer */ ++ int buf_bytes; ++ ++ /* data index of buffer */ ++ int buf_idx; ++ ++ /* queue index of buffer */ ++ int buf_queue; ++ ++ /* HW index in bytes */ ++ int hw_idx; ++ ++ /* number of bytes in a period */ ++ int period_bytes; ++ ++ /* substream runtime object */ ++ struct snd_pcm_substream *substream; ++ ++ /* indirect PCM data transfer */ ++ struct snd_pcm_indirect pcm_indirect; ++ ++ /* spinlock data */ ++ spinlock_t lock; ++ ++ /* runtime error indicator */ ++ int runtime_err; ++}; ++ ++/** \struct snd_adsp_playback ++ * \brief Structure stores data for playback function ++ */ ++struct snd_adsp_playback { ++ /* base information of stream */ ++ struct snd_adsp_base_info base; ++ ++ /* Renderer component data */ ++ struct xf_adsp_renderer *renderer; ++ ++ /* Equalizer component data */ ++ struct xf_adsp_equalizer *equalizer; ++ ++ /* Renderer component state */ ++ int rdr_state; ++ ++ /* Equalizer component state */ ++ int eqz_state; ++}; ++ ++/** \struct snd_adsp_record ++ * \brief Structure stores data for record function ++ */ ++struct snd_adsp_record { ++ /* base information of stream */ ++ struct snd_adsp_base_info base; ++ ++ /* Capture component data */ ++ struct xf_adsp_capture *capture; ++ ++ /* Equalizer component data */ ++ struct xf_adsp_equalizer *equalizer; ++ ++ /* Capture component state */ ++ int cap_state; ++ ++ /* Equalizer component state */ ++ int eqz_state; ++}; ++ ++/** \struct snd_adsp_tdm_playback ++ * \brief Structure stores data for TDM playback function ++ */ ++struct snd_adsp_tdm_playback { ++ /* base information of stream */ ++ struct snd_adsp_base_info base; ++ ++ /* TDM Renderer component data */ ++ struct xf_adsp_tdm_renderer *tdm_renderer; ++ ++ /* TDM Renderer component state */ ++ int state; ++}; ++ ++/** \struct snd_adsp_tdm_record ++ * \brief Structure stores data for TDM record function ++ */ ++struct snd_adsp_tdm_record { ++ /* base information of stream */ ++ struct snd_adsp_base_info base; ++ ++ /* TDM Capture component data */ ++ struct xf_adsp_tdm_capture *tdm_capture; ++ ++ /* TDM Capture component state */ ++ int state; ++}; ++ ++/** \struct snd_adsp_card ++ * \brief Structure stores data for ALSA sound card ++ */ ++struct snd_adsp_card { ++ /* playback data */ ++ struct snd_adsp_playback *playback[MAX_DAI_IDX - 1]; ++ ++ /* record data */ ++ struct snd_adsp_record *record[MAX_DAI_IDX - 1]; ++ ++ /* TDM playback data */ ++ struct snd_adsp_tdm_playback *tdm_playback; ++ ++ /* TDM record data */ ++ struct snd_adsp_tdm_record *tdm_record; ++ ++ /* Structure contains params information for control */ ++ struct snd_adsp_control ctr_if; ++}; ++ ++/** HW configuration of ALSA ADSP card for Renderer/Capture */ ++static struct snd_pcm_hardware snd_pcm_adsp_hw = { ++ .info = (SNDRV_PCM_INFO_INTERLEAVED /* PRQA S 1053 14 */ ++ | SNDRV_PCM_INFO_RESUME ++ | SNDRV_PCM_INFO_BLOCK_TRANSFER ++ | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), ++ .formats = SND_ADSP_PCM_WIDTHS, ++ .rates = SND_ADSP_SAMPLE_RATES, ++ .rate_min = 32000, ++ .rate_max = 48000, ++ .channels_min = MIN_CHANNEL, ++ .channels_max = MAX_CHANNEL, ++ ++ /* maximum buffer size in bytes */ ++ .buffer_bytes_max = MAX_BUFFER_BYTES, ++ ++ /* minimum size of the periods (frame) in bytes */ ++ .period_bytes_min = MIN_BUF_SIZE, ++ ++ /* maximum size of the periods (frame) in bytes */ ++ .period_bytes_max = MAX_BUF_SIZE, ++ ++ /* minimum periods (frames) in a buffer */ ++ .periods_min = MIN_PERIOD, ++ ++ /* maximum periods (frames) in a buffer */ ++ .periods_max = MAX_PERIOD, ++}; ++ ++/* HW configuration of ALSA ADSP card for TDM */ ++static struct snd_pcm_hardware snd_pcm_adsp_tdm_hw = { ++ .info = (SNDRV_PCM_INFO_INTERLEAVED /* PRQA S 1053 14 */ ++ | SNDRV_PCM_INFO_RESUME ++ | SNDRV_PCM_INFO_BLOCK_TRANSFER ++ | SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), ++ .formats = SND_ADSP_PCM_WIDTHS, ++ .rates = SND_ADSP_SAMPLE_RATES, ++ .rate_min = 32000, ++ .rate_max = 48000, ++ .channels_min = TDM_MIN_CHANNEL, ++ .channels_max = TDM_MAX_CHANNEL, ++ ++ /* maximum buffer size in bytes */ ++ .buffer_bytes_max = TDM_MAX_BUFFER_BYTES, ++ ++ /* minimum size of the periods (frame) in bytes */ ++ .period_bytes_min = TDM_MIN_BUF_SIZE, ++ ++ /* maximum size of the periods (frame) in bytes */ ++ .period_bytes_max = TDM_MAX_BUF_SIZE, ++ ++ /* minimum periods (frames) in a buffer */ ++ .periods_min = TDM_MIN_PERIOD, ++ ++ /* maximum periods (frames) in a buffer */ ++ .periods_max = TDM_MAX_PERIOD, ++}; ++ ++/******************************************************************* ++ * function declaration ++ * ****************************************************************/ ++ ++static int ++snd_adsp_rdr_empty_buf_done(void *data, int opcode, int length, char *buffer); ++static int ++snd_adsp_rdr_fill_buf_done(void *data, int opcode, int length, char *buffer); ++static int ++snd_adsp_cap_empty_buf_done(void *data, int opcode, int length, char *buffer); ++static int ++snd_adsp_cap_fill_buf_done(void *data, int opcode, int length, char *buffer); ++static int ++snd_adsp_get_dai_id_from_substream(struct snd_pcm_substream *substream); ++static void * ++snd_adsp_get_drvdata_from_substream(struct snd_pcm_substream *substream); ++static struct snd_adsp_base_info * ++snd_adsp_get_base_from_substream(struct snd_pcm_substream *substream); ++static struct snd_adsp_base_info * ++snd_adsp_get_base_from_hrt(struct hrtimer *hrt); ++static enum hrtimer_restart snd_adsp_hrtimer_func(struct hrtimer *hrt); ++static int snd_adsp_playback_init(struct snd_adsp_playback **data, ++ int eqz_flag, ++ struct snd_pcm_substream *substream); ++static int snd_adsp_record_init(struct snd_adsp_record **data, ++ int eqz_flag, ++ struct snd_pcm_substream *substream); ++static int snd_adsp_playback_prepare(struct snd_adsp_playback *playback, ++ struct snd_pcm_substream *substream); ++static int snd_adsp_record_prepare(struct snd_adsp_record *record, ++ struct snd_pcm_substream *substream); ++static int snd_adsp_playback_deinit(struct snd_adsp_playback *playback); ++static int snd_adsp_record_deinit(struct snd_adsp_record *record); ++static int snd_adsp_tdm_playback_init(struct snd_adsp_tdm_playback **data, ++ struct snd_pcm_substream *substream); ++static int snd_adsp_tdm_record_init(struct snd_adsp_tdm_record **data, ++ struct snd_pcm_substream *substream); ++static int ++snd_adsp_tdm_playback_prepare(struct snd_adsp_tdm_playback *tdm_playback, ++ struct snd_pcm_substream *substream); ++static int snd_adsp_tdm_record_prepare(struct snd_adsp_tdm_record *tdm_record, ++ struct snd_pcm_substream *substream); ++static int ++snd_adsp_tdm_playback_deinit(struct snd_adsp_tdm_playback *tdm_playback); ++static int snd_adsp_tdm_record_deinit(struct snd_adsp_tdm_record *tdm_record); ++static int snd_adsp_pcm_open(struct snd_pcm_substream *substream); ++static int snd_adsp_pcm_close(struct snd_pcm_substream *substream); ++static int snd_adsp_pcm_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *hw_params); ++static int snd_adsp_pcm_hw_free(struct snd_pcm_substream *substream); ++static int snd_adsp_pcm_prepare(struct snd_pcm_substream *substream); ++static int snd_adsp_pcm_trigger(struct snd_pcm_substream *substream, int idx); ++static snd_pcm_uframes_t ++snd_adsp_pcm_pointer(struct snd_pcm_substream *substream); ++static int snd_adsp_pcm_ack(struct snd_pcm_substream *substream); ++static void snd_adsp_pcm_transfer(struct snd_pcm_substream *substream, ++ struct snd_pcm_indirect *rec, size_t bytes); ++static int snd_adsp_control_volume_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo); ++static int snd_adsp_control_volume_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol); ++static int snd_adsp_control_volume_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol); ++static int snd_adsp_control_eqz_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol); ++static int snd_adsp_control_eqz_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo); ++static int snd_adsp_control_eqz_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol); ++static int ++snd_adsp_control_eqz_switch_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol); ++static int ++snd_adsp_control_eqz_switch_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo); ++static int ++snd_adsp_control_sample_rate_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol); ++static int ++snd_adsp_control_sample_rate_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo); ++static int ++snd_adsp_control_sample_rate_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol); ++static int ++snd_adsp_control_eqz_switch_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol); ++static void snd_adsp_get_eqz_params_from_control( ++ struct xf_adsp_equalizer_params *eqz_params, ++ struct xf_adsp_equalizer_params *eqz_ctr_params, ++ bool flag); ++static int snd_adsp_pcm_new(struct snd_soc_pcm_runtime *runtime); ++static int snd_adsp_probe(struct platform_device *pdev); ++static int snd_adsp_remove(struct platform_device *pdev); ++ ++/******************************************************************* ++ * callback function of ADSP control interface ++ * ****************************************************************/ ++/** ************************************************************************** ++ * \brief event handler callback to notify error from ADSP ++ * ++ * \param[in] data Pointer to ADSP ALSA sound card ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_event_handler(void *data) ++{ ++ struct snd_adsp_base_info *base = (struct snd_adsp_base_info *)data; ++ ++ if (base) ++ base->runtime_err = TRUE; ++ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief empty buf done callback for playback/TDM playback functions ++ * ++ * \param[in] data Pointer to ADSP ALSA sound card ++ * \param[in] opcode Opcode of message ++ * \param[in] length Length of data buffer ++ * \param[in] buffer Pointer to data buffer ++ * \retval 0 Success ++ *****************************************************************************/ ++static int ++snd_adsp_rdr_empty_buf_done(void *data, int opcode, int length, char *buffer) ++{ ++ struct snd_adsp_base_info *base = (struct snd_adsp_base_info *)data; ++ ++ if (base) { ++ spin_lock_irqsave(&base->lock, base->flag); ++ ++ base->buf_queue++; ++ base->hw_idx += length; /* increase the DMA buffer index */ ++ ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ } ++ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief fill buf done callback for playback/TDM playback functions ++ * ++ * \param[in] data Pointer to ADSP ALSA sound card ++ * \param[in] opcode Opcode of message ++ * \param[in] length Length of data buffer ++ * \param[in] buffer Pointer to data buffer ++ * \retval 0 Success ++ *****************************************************************************/ ++static int ++snd_adsp_rdr_fill_buf_done(void *data, int opcode, int length, char *buffer) ++{ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief empty buf done callback for record/TDM record functions ++ * ++ * \param[in] data Pointer to ADSP ALSA sound card ++ * \param[in] opcode Opcode of message ++ * \param[in] length Length of data buffer ++ * \param[in] buffer Pointer to data buffer ++ * \retval 0 Success ++ *****************************************************************************/ ++static int ++snd_adsp_cap_empty_buf_done(void *data, int opcode, int length, char *buffer) ++{ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief fill buf done callback for record/TDM record functions ++ * ++ * \param[in] data Pointer to ADSP ALSA sound card ++ * \param[in] opcode Opcode of message ++ * \param[in] length Length of data buffer ++ * \param[in] buffer Pointer to data buffer ++ * \retval 0 Success ++ *****************************************************************************/ ++static int ++snd_adsp_cap_fill_buf_done(void *data, int opcode, int length, char *buffer) ++{ ++ struct snd_adsp_base_info *base = (struct snd_adsp_base_info *)data; ++ ++ if (base) { ++ spin_lock_irqsave(&base->lock, base->flag); ++ ++ base->buf_queue++; ++ base->hw_idx += length; /* increase the DMA buffer index */ ++ ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ } ++ ++ return 0; ++} ++ ++/** callback functions for playback/TDM playback */ ++static struct xf_callback_func rdr_callbacks = /* PRQA S 3218 */ ++{ ++ .empty_buf_done = &snd_adsp_rdr_empty_buf_done, /* PRQA S 1053 2 */ ++ .fill_buf_done = &snd_adsp_rdr_fill_buf_done, ++ .event_handler = &snd_adsp_event_handler ++}; ++ ++/** callback functions for record/TDM record */ ++static struct xf_callback_func cap_callbacks = /* PRQA S 3218 */ ++{ ++ .empty_buf_done = &snd_adsp_cap_empty_buf_done, /* PRQA S 1053 2 */ ++ .fill_buf_done = &snd_adsp_cap_fill_buf_done, ++ .event_handler = &snd_adsp_event_handler ++}; ++ ++/******************************************************************* ++ * helper functions to get some internal data ++ * ****************************************************************/ ++ ++/** ************************************************************************** ++ * \brief Get current index of CPU DAI from runtime data of substream ++ * ++ * \param[in] substream Pointer to PCM stream data ++ * \retval id Index of current CPU DAI ++ *****************************************************************************/ ++static int ++snd_adsp_get_dai_id_from_substream(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd; ++ ++ rtd = (struct snd_soc_pcm_runtime *)substream->private_data; ++ return rtd->cpu_dai->id; ++} ++ ++/** ************************************************************************** ++ * \brief Get ADSP ALSA driver's data from runtime data of substream ++ * ++ * \param[in] substream Pointer to PCM stream data ++ * \retval pointer Pointer to driver's data ++ *****************************************************************************/ ++static void * ++snd_adsp_get_drvdata_from_substream(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd; ++ ++ rtd = (struct snd_soc_pcm_runtime *)substream->private_data; ++ return snd_soc_dai_get_drvdata(rtd->cpu_dai); ++} ++ ++/** ************************************************************************** ++ * \brief Get base's data of playback/record from runtime data of substream ++ * ++ * \param[in] substream Pointer to PCM stream data ++ * \retval pointer Pointer to playback/record's base data ++ *****************************************************************************/ ++static struct snd_adsp_base_info * ++snd_adsp_get_base_from_substream(struct snd_pcm_substream *substream) ++{ ++ struct snd_adsp_card *adsp_card; ++ struct snd_adsp_base_info *base; ++ int dai_idx; ++ ++ adsp_card = snd_adsp_get_drvdata_from_substream(substream); ++ ++ /* get DAI index of substream */ ++ dai_idx = snd_adsp_get_dai_id_from_substream(substream); ++ ++ /* get base data of the substream */ ++ if (dai_idx == RDR_DAI_IDX0 || dai_idx == RDR_DAI_IDX1 || ++ dai_idx == RDR_DAI_IDX2 || dai_idx == RDR_DAI_IDX3) { ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ base = !adsp_card->playback[dai_idx] ? ++ NULL : &adsp_card->playback[dai_idx]->base; ++ } else { ++ base = !adsp_card->record[dai_idx] ? ++ NULL : &adsp_card->record[dai_idx]->base; ++ } ++ } else { ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ base = !adsp_card->tdm_playback ? ++ NULL : &adsp_card->tdm_playback->base; ++ } else { ++ base = !adsp_card->tdm_record ? ++ NULL : &adsp_card->tdm_record->base; ++ } ++ } ++ ++ return base; ++} ++ ++/** *************************************************************************** ++ * \brief Get playback/record/TDM playback/TDM record's base data ++ * from hr timer data ++ * ++ * \param[in] hrt Pointer to hr timer data ++ * \retval pointer Pointer to playback/record's base data ++ *****************************************************************************/ ++static struct snd_adsp_base_info * ++snd_adsp_get_base_from_hrt(struct hrtimer *hrt) ++{ ++ return (struct snd_adsp_base_info *)hrt; ++} ++ ++/***************************************************************************** ++ * hrtimer interrupt function ++ * ***************************************************************************/ ++ ++/** ************************************************************************** ++ * \brief Interrupt function of high resolution timer ++ * ++ * \param[in] hrt Pointer to hr timer data ++ * \retval HRTIMER_RESTART Restart the timer after expire time ++ *****************************************************************************/ ++static enum hrtimer_restart snd_adsp_hrtimer_func(struct hrtimer *hrt) ++{ ++ struct snd_adsp_base_info *base = snd_adsp_get_base_from_hrt(hrt); ++ ++ spin_lock_irqsave(&base->lock, base->flag); ++ if (base->hw_idx != 0) { ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ /* update PCM status for the next period */ ++ snd_pcm_period_elapsed(base->substream); ++ } else { ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ } ++ ++ hrtimer_forward_now(hrt, base->ktime); ++ ++ return HRTIMER_RESTART; ++} ++ ++/***************************************************************************** ++ * internal functions to manage playback and record functions ++ * ***************************************************************************/ ++ ++/** ************************************************************************** ++ * \brief Initialize playback data ++ * ++ * \param[out] playback_data Pointer to store playback data ++ * \param[in] eqz_flag Flag to indicate equalizer usage ++ * \param[in] substream Pointer to substream data ++ * \retval EINVAL Failed to initialize playback data ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_playback_init(struct snd_adsp_playback **playback_data, ++ int eqz_flag, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_adsp_playback *playback; ++ ++ /* allocate memory for playback data */ ++ playback = kmalloc(sizeof(*playback), GFP_KERNEL); ++ if (!playback) ++ return -EINVAL; ++ ++ /* init params */ ++ memset(playback, 0, sizeof(struct snd_adsp_playback)); ++ ++ /* save the playback data */ ++ *playback_data = playback; ++ ++ /* set handle state as NULL state */ ++ playback->rdr_state = XF_HANDLE_NULL; ++ playback->eqz_state = XF_HANDLE_NULL; ++ playback->base.hrt_state = XF_HANDLE_NULL; ++ ++ /* register renderer component */ ++ if (xf_adsp_renderer_create(&playback->renderer, ++ &rdr_callbacks, ++ (void *)&playback->base) < 0) ++ return -EINVAL; ++ ++ /* mark renderer component created */ ++ playback->rdr_state = XF_HANDLE_CREATED; ++ ++ /* set target handle ID as renderer ID */ ++ playback->base.handle_id = playback->renderer->handle_id; ++ ++ if (eqz_flag == EQZ_ON) { ++ /* create equalizer component when equalizer is used */ ++ if (xf_adsp_equalizer_create(&playback->equalizer, ++ &rdr_callbacks, ++ (void *)&playback->base) < 0) ++ return -EINVAL; ++ ++ /* mark equalizer component created */ ++ playback->eqz_state = XF_HANDLE_CREATED; ++ ++ /* set target handle ID as equalizer ID */ ++ playback->base.handle_id = playback->equalizer->handle_id; ++ } ++ ++ /* init lock */ ++ spin_lock_init(&playback->base.lock); ++ ++ /* save the substream data */ ++ playback->base.substream = substream; ++ ++ /* init high resolution timer for updating hw status */ ++ hrtimer_init(&playback->base.hrtimer, ++ CLOCK_MONOTONIC, ++ HRTIMER_MODE_REL); ++ ++ /* PRQA S 0563 1 */ ++ playback->base.hrtimer.function = &snd_adsp_hrtimer_func; ++ playback->base.hrt_state = XF_HANDLE_CREATED; ++ ++ /* success */ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Initialize record data ++ * ++ * \param[out] record_data Pointer to store record data ++ * \param[in] eqz_flag Flag to indicate equalizer usage ++ * \param[in] substream Pointer to substream data ++ * \retval -EINVAL Failed to initialize record data ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_record_init(struct snd_adsp_record **record_data, ++ int eqz_flag, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_adsp_record *record; ++ ++ /* allocate memory for record data */ ++ record = kmalloc(sizeof(*record), GFP_KERNEL); ++ if (!record) ++ return -EINVAL; ++ ++ /* init params */ ++ memset(record, 0, sizeof(struct snd_adsp_record)); ++ ++ /* save the record data */ ++ *record_data = record; ++ ++ /* set handle state as NULL state */ ++ record->cap_state = XF_HANDLE_NULL; ++ record->eqz_state = XF_HANDLE_NULL; ++ record->base.hrt_state = XF_HANDLE_NULL; ++ ++ /* register capture component */ ++ if (xf_adsp_capture_create(&record->capture, ++ &cap_callbacks, ++ (void *)&record->base) < 0) ++ return -EINVAL; ++ ++ /* mark capture component created */ ++ record->cap_state = XF_HANDLE_CREATED; ++ ++ /* set target handle ID as capture ID */ ++ record->base.handle_id = record->capture->handle_id; ++ ++ /* create equalizer component in case of it being used */ ++ if (eqz_flag == EQZ_ON) { ++ if (xf_adsp_equalizer_create(&record->equalizer, ++ &cap_callbacks, ++ (void *)&record->base) < 0) ++ return -EINVAL; ++ ++ /* mark equalizer component created */ ++ record->eqz_state = XF_HANDLE_CREATED; ++ ++ /* set target handle ID as equalizer ID */ ++ record->base.handle_id = record->equalizer->handle_id; ++ } ++ ++ /* init lock */ ++ spin_lock_init(&record->base.lock); ++ ++ /* save the substream data */ ++ record->base.substream = substream; ++ ++ /* init high resolution timer for updating hw status */ ++ hrtimer_init(&record->base.hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); ++ ++ /* PRQA S 0563 1 */ ++ record->base.hrtimer.function = &snd_adsp_hrtimer_func; ++ record->base.hrt_state = XF_HANDLE_CREATED; ++ ++ /* success */ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Prepare playback function ++ * ++ * \param[out] playback Pointer to playback data ++ * \param[in] substream Pointer to substream data ++ * \retval -EINVAL Failed to prepare playback function ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_playback_prepare(struct snd_adsp_playback *playback, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_adsp_card *adsp_card; ++ int dai_idx, pcm_width, ch, fs, frame_size, vol_rate, hw_buffer_size; ++ int out_rate; ++ struct snd_adsp_control *ctr_if; ++ struct snd_pcm_runtime *runtime; ++ struct xf_adsp_renderer *renderer; ++ struct xf_adsp_equalizer *equalizer; ++ struct snd_adsp_base_info *base; ++ int i; ++ ++ adsp_card = snd_adsp_get_drvdata_from_substream(substream); ++ dai_idx = snd_adsp_get_dai_id_from_substream(substream); ++ ctr_if = &adsp_card->ctr_if; ++ runtime = substream->runtime; ++ renderer = playback->renderer; ++ equalizer = playback->equalizer; ++ base = &playback->base; ++ ++ /* runtime parameter */ ++ fs = runtime->rate; ++ ch = runtime->channels; ++ pcm_width = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ? 16 : 24; ++ frame_size = runtime->period_size; ++ vol_rate = ctr_if->vol_rate[DIRECT_PLAYBACK][dai_idx]; ++ out_rate = ctr_if->sample_rate[DIRECT_PLAYBACK][dai_idx]; ++ hw_buffer_size = snd_pcm_lib_buffer_bytes(substream); ++ ++ /* get number of bytes in a period */ ++ base->period_bytes = snd_pcm_lib_period_bytes(substream); ++ ++ if (pcm_width == 16) ++ base->buf_bytes = base->period_bytes; ++ else ++ base->buf_bytes = (base->period_bytes * ++ BYTES_PER_SAMPLE(S24_3LE)) / BYTES_PER_SAMPLE(S24_LE); ++ ++ /* pcm indirect configuration */ ++ base->pcm_indirect.hw_buffer_size = hw_buffer_size; ++ base->pcm_indirect.sw_buffer_size = base->pcm_indirect.hw_buffer_size; ++ ++ /* it should equal to a period size in bytes */ ++ base->pcm_indirect.hw_queue_size = base->period_bytes; ++ ++ /* set parameters when Renderer is not ready */ ++ if (COMPONENT_IS_READY(playback->rdr_state) == FALSE) { ++ struct xf_adsp_renderer_params *params = &renderer->params; ++ ++ /* apply renderer parameters */ ++ params->in_rate = fs; ++ params->channel = ch; ++ params->pcm_width = pcm_width; ++ params->frame_size = frame_size; ++ ++ if (ctr_if->mix_usage == SECOND_RUN) ++ params->mix_ctrl = ctr_if->mix_usage; ++ else ++ params->mix_ctrl = MIX_UNUSED; ++ ++ /* set flow as ADSP->PDMA0->SRC0->PDMA1->SSI0 */ ++ params->dev1 = SRC0; ++ params->dev2 = SSI00; ++ params->dma1 = PDMA_CH00; ++ params->dma2 = PDMA_CH01; ++ ++ /* when MIX is enabled, change to DMAC transfer type to save */ ++ /* hw FIFO */ ++ if (MIX_ENABLED(params->mix_ctrl) == TRUE) ++ params->dma1 = ADMAC_CH01; ++ ++ /* set volume rate if it is set by user or default value */ ++ /* is 100% */ ++ if (vol_rate >= 0) ++ params->vol_rate = vol_rate; ++ else ++ params->vol_rate = (1 << 20); ++ ++ /* set output channel if it is set by user */ ++ if (ctr_if->rdr_out_ch[dai_idx] >= MONAURAL) ++ params->out_channel = ctr_if->rdr_out_ch[dai_idx]; ++ else ++ params->out_channel = params->channel; ++ ++ /* set sample rate output if it is set by user */ ++ if (out_rate >= 0) ++ params->out_rate = out_rate; ++ ++ /* set parameters to ADSP Renderer plugin */ ++ if (xf_adsp_renderer_set_params(renderer) != 0) ++ return -EINVAL; ++ ++ /* allocate buffer pool to prepare the execution */ ++ renderer->buf_pool = xf_adsp_allocate_mem_pool( ++ XF_BUF_POOL_SIZE, base->buf_bytes); ++ ++ if (IS_ERR(renderer->buf_pool)) /* PRQA S 306*/ ++ return -EINVAL; ++ ++ for (i = 0; i < XF_BUF_POOL_SIZE; i++) { ++ base->buffer[i] = xf_adsp_get_data_from_pool( ++ renderer->buf_pool, i); ++ ++ base->buf_queue++; ++ memset(base->buffer[i], 0, base->buf_bytes); ++ } ++ ++ /* mark Renderer ready */ ++ playback->rdr_state |= XF_HANDLE_READY; ++ ++ /* set parameters for Equalizer if it is used */ ++ if (COMPONENT_IS_CREATED(playback->eqz_state) == TRUE) { ++ /* apply Equalizer parameter setting */ ++ equalizer->params.channel = ch; ++ equalizer->params.pcm_width = pcm_width; ++ equalizer->params.rate = fs; ++ ++ /* get equalizer parameters from control interface */ ++ /* data */ ++ snd_adsp_get_eqz_params_from_control( ++ &equalizer->params, ++ &ctr_if->eqz_params[DIRECT_PLAYBACK][dai_idx], ++ true); ++ ++ /* set parameters to Equalizer plugin */ ++ if (xf_adsp_equalizer_set_params(equalizer) != 0) ++ return -EINVAL; ++ ++ /* route Equalizer to Renderer */ ++ if (xf_adsp_route(equalizer->handle_id, ++ renderer->handle_id, ++ XF_BUF_POOL_SIZE, ++ base->buf_bytes) != 0) ++ return -EINVAL; ++ ++ /* mark Equalizer ready */ ++ playback->eqz_state |= XF_HANDLE_READY; ++ ++ /* prepare data before start PCM */ ++ /* PRQA S 2462 1 */ /* PRQA S 2463 1 */ ++ for (i = 0; i < XF_BUF_POOL_SIZE; i++) { ++ /* send buffer to plugin to kick */ ++ /* init-processing */ ++ if (xf_adsp_empty_this_buffer( ++ base->handle_id, ++ base->buffer[i], ++ base->buf_bytes) != 0) ++ return -EINVAL; ++ ++ spin_lock_irqsave(&base->lock, base->flag); ++ base->buf_queue--; ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ } ++ } else { ++ /* send zero buffer to plugin to kick */ ++ /* init-processing */ ++ if (xf_adsp_empty_this_buffer(base->handle_id, ++ base->buffer[0], ++ base->buf_bytes) != 0) ++ return -EINVAL; ++ ++ spin_lock_irqsave(&base->lock, base->flag); ++ base->buf_queue--; ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ } ++ ++ /* wait until all the buffer have been consummed */ ++ while (base->buf_queue != XF_BUF_POOL_SIZE) { ++ schedule_timeout_interruptible(2); ++ if (signal_pending(current)) ++ break; ++ ++ /* check the error from initialization */ ++ if (base->runtime_err) ++ return -EINVAL; ++ } ++ ++ /* reset HW index */ ++ base->hw_idx = 0; ++ } ++ ++ /* success */ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Prepare record function ++ * ++ * \param[out] record Pointer to record data ++ * \param[in] substream Pointer to substream data ++ * \retval -EINVAL Failed to prepare record function ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_record_prepare(struct snd_adsp_record *record, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_adsp_card *adsp_card; ++ int dai_idx, pcm_width, ch, fs, frame_size, vol_rate, in_rate; ++ int hw_buffer_size, hw_queue_size; ++ struct snd_adsp_control *ctr_if; ++ struct snd_pcm_runtime *runtime; ++ struct xf_adsp_capture *capture; ++ struct xf_adsp_equalizer *equalizer; ++ struct snd_adsp_base_info *base; ++ int i; ++ ++ adsp_card = snd_adsp_get_drvdata_from_substream(substream); ++ dai_idx = snd_adsp_get_dai_id_from_substream(substream); ++ ctr_if = &adsp_card->ctr_if; ++ runtime = substream->runtime; ++ capture = record->capture; ++ equalizer = record->equalizer; ++ base = &record->base; ++ ++ /* runtime parameter */ ++ fs = runtime->rate; ++ ch = runtime->channels; ++ pcm_width = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ? 16 : 24; ++ frame_size = runtime->period_size; ++ vol_rate = ctr_if->vol_rate[DIRECT_CAPTURE][dai_idx]; ++ in_rate = ctr_if->sample_rate[DIRECT_CAPTURE][dai_idx]; ++ hw_buffer_size = snd_pcm_lib_buffer_bytes(substream); ++ ++ /* total size of allocated buffers */ ++ hw_queue_size = base->period_bytes * XF_BUF_POOL_SIZE; ++ ++ /* get number of bytes in a period */ ++ base->period_bytes = snd_pcm_lib_period_bytes(substream); ++ ++ if (pcm_width == 16) ++ base->buf_bytes = base->period_bytes; ++ else ++ base->buf_bytes = ((base->period_bytes * ++ BYTES_PER_SAMPLE(S24_3LE)) / BYTES_PER_SAMPLE(S24_LE)); ++ ++ /* pcm indirect configuration */ ++ base->pcm_indirect.hw_buffer_size = hw_buffer_size; ++ base->pcm_indirect.sw_buffer_size = base->pcm_indirect.hw_buffer_size; ++ base->pcm_indirect.hw_queue_size = hw_queue_size; ++ ++ /* prepare parameters to set to Capture plugin when it is not yet */ ++ /* ready */ ++ if (COMPONENT_IS_READY(record->cap_state) == FALSE) { ++ struct xf_adsp_capture_params *params = &capture->params; ++ ++ /* apply capture parameters */ ++ params->out_rate = fs; ++ params->channel = ch; ++ params->pcm_width = pcm_width; ++ params->frame_size = frame_size; ++ ++ params->dev1 = SRC0; ++ params->dev2 = SSI10; ++ params->dma1 = PDMA_CH00; ++ params->dma2 = PDMA_CH01; ++ ++ /* set volume rate if it is set by user or default volume as */ ++ /* 100% */ ++ if (vol_rate >= 0) ++ params->vol_rate = vol_rate; ++ else ++ params->vol_rate = (1 << 20); ++ ++ /* set sample rate input if it is set by user */ ++ if (in_rate >= 0) ++ params->in_rate = in_rate; ++ ++ /* allocate buffer pool to prepare the execution */ ++ capture->buf_pool = xf_adsp_allocate_mem_pool( ++ XF_BUF_POOL_SIZE, base->buf_bytes); ++ ++ if (IS_ERR(capture->buf_pool)) /* PRQA S 306 */ ++ return -EINVAL; ++ ++ for (i = 0; i < XF_BUF_POOL_SIZE; i++) { ++ base->buffer[i] = xf_adsp_get_data_from_pool( ++ capture->buf_pool, i); ++ ++ base->buf_queue++; ++ } ++ ++ /* set parameters to ADSP Capture plugin */ ++ if (xf_adsp_capture_set_params(capture) != 0) ++ return -EINVAL; ++ ++ /* mark Capture ready */ ++ record->cap_state |= XF_HANDLE_READY; ++ ++ /* set parameters for Equalizer if it's used */ ++ if (COMPONENT_IS_CREATED(record->eqz_state) == TRUE) { ++ /* apply Equalizer parameter setting */ ++ equalizer->params.channel = ch; ++ equalizer->params.pcm_width = pcm_width; ++ equalizer->params.rate = fs; ++ ++ /* get equalizer parameter from control interface */ ++ /* data */ ++ snd_adsp_get_eqz_params_from_control( ++ &equalizer->params, ++ &ctr_if->eqz_params[DIRECT_CAPTURE][dai_idx], ++ true); ++ ++ /* set parameters to Equalizer plugin */ ++ if (xf_adsp_equalizer_set_params(equalizer) != 0) ++ return -EINVAL; ++ ++ /* route Capture to Equalizer */ ++ if (xf_adsp_route(capture->handle_id, ++ equalizer->handle_id, ++ XF_BUF_POOL_SIZE, ++ base->buf_bytes) != 0) ++ return -EINVAL; ++ ++ /* mark Equalizer ready */ ++ record->eqz_state |= XF_HANDLE_READY; ++ } ++ ++ /* kick init process by sending a zero buffer length */ ++ xf_adsp_fill_this_buffer(base->handle_id, base->buffer[0], 0); ++ ++ spin_lock_irqsave(&base->lock, base->flag); ++ base->buf_queue--; ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ ++ /* wait until finishing initialization */ ++ while (base->buf_queue != XF_BUF_POOL_SIZE) { ++ schedule_timeout_interruptible(2); ++ if (signal_pending(current)) ++ break; ++ ++ /* check the error from initialization */ ++ if (base->runtime_err) ++ return -EINVAL; ++ } ++ ++ if (COMPONENT_IS_CREATED(record->eqz_state) == TRUE) { ++ /* PRQA S 2462 1 */ /* PRQA S 2463 1 */ ++ for (i = 0; i < XF_BUF_POOL_SIZE; i++) { ++ /* send buffer to plugin */ ++ if (xf_adsp_fill_this_buffer( ++ base->handle_id, ++ base->buffer[i], ++ base->buf_bytes) != 0) ++ return -EINVAL; ++ ++ spin_lock_irqsave(&base->lock, base->flag); ++ base->buf_queue--; ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ } ++ ++ /* wait until all the buffer have been responsed */ ++ while (base->buf_queue != XF_BUF_POOL_SIZE) { ++ schedule_timeout_interruptible(2); ++ if (signal_pending(current)) ++ break; ++ ++ /* check the error from initialization */ ++ if (base->runtime_err) ++ return -EINVAL; ++ } ++ } ++ ++ /* reset hw data position */ ++ base->hw_idx = 0; ++ } ++ ++ /* success */ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Deinitialize playback function ++ * ++ * \param[out] playback Pointer to playback data ++ * \retval -EINVAL Failed to deinitialize playback function ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_playback_deinit(struct snd_adsp_playback *playback) ++{ ++ int ret = 0; ++ ++ /* perform de-initialization if playback has been created already */ ++ if (playback) { ++ /* perform completion process */ ++ if (COMPONENT_IS_CREATED(playback->rdr_state) == TRUE) { ++ /* send buffer with zero length to plugin for */ ++ /* completion process *//* PRQA S 3200 2 */ ++ xf_adsp_empty_this_buffer(playback->base.handle_id, ++ NULL, 0); ++ ++ /* free buffer pool */ /* PRQA S 3200 1 */ ++ xf_adsp_free_mem_pool(playback->renderer->buf_pool); ++ ++ /* destroy Renderer */ ++ if (xf_adsp_renderer_destroy(playback->renderer) != 0) ++ ret = -EINVAL; ++ ++ playback->renderer = NULL; ++ } ++ ++ /* destroy Equalizer if it is used */ ++ if (COMPONENT_IS_CREATED(playback->eqz_state) == TRUE) { ++ if (xf_adsp_equalizer_destroy(playback->equalizer)) ++ ret = -EINVAL; ++ ++ playback->equalizer = NULL; ++ } ++ ++ /* canncel timer interrupt */ ++ if (COMPONENT_IS_CREATED(playback->base.hrt_state) == TRUE) ++ hrtimer_cancel(&playback->base.hrtimer); ++ ++ /* free playback data */ ++ kfree(playback); ++ } ++ ++ return ret; ++} ++ ++/** ************************************************************************** ++ * \brief Deinitialize record function ++ * ++ * \param[out] record Pointer to record data ++ * \retval -EINVAL Failed to deinitialize record function ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_record_deinit(struct snd_adsp_record *record) ++{ ++ int ret = 0; ++ ++ /* perform de-initialization if record has been created already */ ++ if (!record) ++ return ret; ++ ++ /* perform completion process */ ++ if (COMPONENT_IS_CREATED(record->cap_state) == TRUE) { ++ /* send buffer with zero length to plugin for */ ++ /* completion process *//* PRQA S 3200 2 */ ++ xf_adsp_empty_this_buffer(record->base.handle_id, NULL, 0); ++ ++ /* free buffer pool */ /* PRQA S 3200 1 */ ++ xf_adsp_free_mem_pool(record->capture->buf_pool); ++ ++ if (xf_adsp_capture_destroy(record->capture)) ++ ret = -EINVAL; ++ ++ record->capture = NULL; ++ } ++ ++ /* destroy Equalizer if it is used */ ++ if (COMPONENT_IS_CREATED(record->eqz_state) == TRUE) { ++ if (xf_adsp_equalizer_destroy(record->equalizer) != 0) ++ ret = -EINVAL; ++ ++ record->equalizer = NULL; ++ } ++ ++ /* canncel timer interrupt */ ++ if (COMPONENT_IS_CREATED(record->base.hrt_state) == TRUE) ++ hrtimer_cancel(&record->base.hrtimer); ++ ++ /* free record data */ ++ kfree(record); ++ ++ return ret; ++} ++ ++/***************************************************************************** ++ * internal functions to manage TDM playback and TDM record functions ++ * ***************************************************************************/ ++ ++/** ************************************************************************** ++ * \brief Initialize TDM playback data ++ * ++ * \param[out] tdm_playback_data Pointer to store TDM playback data ++ * \param[in] substream Pointer to substream data ++ * \retval -EINVAL Failed to initialize TDM playback data ++ * \retval 0 Success ++ *****************************************************************************/ ++static int ++snd_adsp_tdm_playback_init(struct snd_adsp_tdm_playback **tdm_playback_data, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_adsp_tdm_playback *tdm_playback; ++ ++ /* allocate memory for TDM playback data */ ++ tdm_playback = kmalloc(sizeof(*tdm_playback), GFP_KERNEL); ++ ++ if (!tdm_playback) ++ return -EINVAL; ++ ++ /* init params */ ++ memset(tdm_playback, 0, sizeof(struct snd_adsp_tdm_playback)); ++ ++ /* save the TDM playback data */ ++ *tdm_playback_data = tdm_playback; ++ ++ /* set handle state as NULL state */ ++ tdm_playback->state = XF_HANDLE_NULL; ++ tdm_playback->base.hrt_state = XF_HANDLE_NULL; ++ ++ /* register TDM renderer component */ ++ if (xf_adsp_tdm_renderer_create(&tdm_playback->tdm_renderer, ++ &rdr_callbacks, ++ (void *)&tdm_playback->base) < 0) ++ return -EINVAL; ++ ++ /* mark TDM renderer component created */ ++ tdm_playback->state = XF_HANDLE_CREATED; ++ ++ /* set target handle ID as TDM renderer ID */ ++ tdm_playback->base.handle_id = tdm_playback->tdm_renderer->handle_id; ++ ++ /* init lock */ ++ spin_lock_init(&tdm_playback->base.lock); ++ ++ /* save the substream data */ ++ tdm_playback->base.substream = substream; ++ ++ /* init high resolution timer for updating hw status */ ++ hrtimer_init(&tdm_playback->base.hrtimer, ++ CLOCK_MONOTONIC, ++ HRTIMER_MODE_REL); ++ ++ /* PRQA S 0563 1 */ ++ tdm_playback->base.hrtimer.function = &snd_adsp_hrtimer_func; ++ tdm_playback->base.hrt_state = XF_HANDLE_CREATED; ++ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Initialize TDM record data ++ * ++ * \param[out] tdm_record_data Pointer to store TDM record data ++ * \param[in] substream Pointer to substream data ++ * \retval -EINVAL Failed to initialize TDM record data ++ * \retval 0 Success ++ *****************************************************************************/ ++static int ++snd_adsp_tdm_record_init(struct snd_adsp_tdm_record **tdm_record_data, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_adsp_tdm_record *tdm_record; ++ ++ /* allocate memory for TDM record data */ ++ tdm_record = kmalloc(sizeof(*tdm_record), GFP_KERNEL); ++ if (!tdm_record) ++ return -EINVAL; ++ ++ /* init params */ ++ memset(tdm_record, 0, sizeof(struct snd_adsp_tdm_record)); ++ ++ /* save the TDM record data */ ++ *tdm_record_data = tdm_record; ++ ++ /* set handle state as NULL state */ ++ tdm_record->state = XF_HANDLE_NULL; ++ tdm_record->base.hrt_state = XF_HANDLE_NULL; ++ ++ /* register TDM Capture component */ ++ if (xf_adsp_tdm_capture_create(&tdm_record->tdm_capture, ++ &cap_callbacks, ++ (void *)&tdm_record->base) != 0) ++ return -EINVAL; ++ ++ /* mark TDM capture component created */ ++ tdm_record->state = XF_HANDLE_CREATED; ++ ++ /* set target handle ID as TDM capture ID */ ++ tdm_record->base.handle_id = tdm_record->tdm_capture->handle_id; ++ ++ /* init lock */ ++ spin_lock_init(&tdm_record->base.lock); ++ ++ /* save the substream data */ ++ tdm_record->base.substream = substream; ++ ++ /* init high resolution timer for updating hw status */ ++ hrtimer_init(&tdm_record->base.hrtimer, ++ CLOCK_MONOTONIC, ++ HRTIMER_MODE_REL); ++ ++ /* PRQA S 0563 1 */ ++ tdm_record->base.hrtimer.function = &snd_adsp_hrtimer_func; ++ tdm_record->base.hrt_state = XF_HANDLE_CREATED; ++ ++ /* success */ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Prepare TDM playback function ++ * ++ * \param[out] tdm_playback Pointer to TDM playback data ++ * \param[in] substream Pointer to substream data ++ * \retval -EINVAL Failed to prepare TDM playback function ++ * \retval 0 Success ++ *****************************************************************************/ ++static int ++snd_adsp_tdm_playback_prepare(struct snd_adsp_tdm_playback *tdm_playback, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_adsp_card *adsp_card; ++ struct snd_adsp_control *ctr_if; ++ struct snd_pcm_runtime *runtime; ++ struct xf_adsp_tdm_renderer *tdm_renderer; ++ struct snd_adsp_base_info *base; ++ int i; ++ int pcm_width, ch_mode, fs, frame_size, hw_buffer_size; ++ ++ adsp_card = snd_adsp_get_drvdata_from_substream(substream); ++ ctr_if = &adsp_card->ctr_if; ++ runtime = substream->runtime; ++ tdm_renderer = tdm_playback->tdm_renderer; ++ base = &tdm_playback->base; ++ ++ /* runtime parameter */ ++ fs = runtime->rate; ++ pcm_width = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ? 16 : 24; ++ frame_size = runtime->period_size; ++ ++ ch_mode = (runtime->channels == 8) ? ++ XA_TDM_RDR_CHANNEL_MODE_1X8 : XA_TDM_RDR_CHANNEL_MODE_1X6; ++ ++ hw_buffer_size = snd_pcm_lib_buffer_bytes(substream); ++ ++ /* get number of bytes in a period */ ++ base->period_bytes = snd_pcm_lib_period_bytes(substream); ++ ++ if (pcm_width == 16) ++ base->buf_bytes = base->period_bytes; ++ else ++ base->buf_bytes = ((base->period_bytes * ++ BYTES_PER_SAMPLE(S24_3LE)) / BYTES_PER_SAMPLE(S24_LE)); ++ ++ /* pcm indirect configuration */ ++ base->pcm_indirect.hw_buffer_size = hw_buffer_size; ++ base->pcm_indirect.sw_buffer_size = base->pcm_indirect.hw_buffer_size; ++ ++ /* it should equal to a period size in bytes */ ++ base->pcm_indirect.hw_queue_size = base->period_bytes; ++ ++ /* prepare parameters to set to TDM playback as it is not ready */ ++ if (COMPONENT_IS_READY(tdm_playback->state) == FALSE) { ++ struct xf_adsp_tdm_renderer_params *params; ++ ++ params = &tdm_renderer->params; ++ ++ /* apply renderer parameters */ ++ params->in_rate = fs; ++ params->ch_mode = ch_mode; ++ params->pcm_width = pcm_width; ++ params->frame_size = frame_size; ++ ++ /* setting Audio device indexes */ ++ params->dma1 = ADMAC_CH00; /* use DMAC for transfer data */ ++ params->dma2 = PDMA_CH03; ++ params->dev1 = SRC1; ++ params->dev2 = SSI30; /* set SSI index to SSI30 */ ++ ++ /* set volume rate if it is set by user or default value as */ ++ /* 100% */ ++ params->vol_rate = (ctr_if->tdm_vol_rate[DIRECT_PLAYBACK] >= 0) ++ ? ctr_if->tdm_vol_rate[DIRECT_PLAYBACK] : (1 << 20); ++ ++ /* set output sampling rate if it is set by user */ ++ if (ctr_if->tdm_sample_rate[DIRECT_PLAYBACK] >= 0) ++ params->out_rate = ++ ctr_if->tdm_sample_rate[DIRECT_PLAYBACK]; ++ ++ /* set parameters to ADSP TDM Renderer plugin */ ++ if (xf_adsp_tdm_renderer_set_params(tdm_renderer) != 0) ++ return -EINVAL; ++ ++ /* allocate buffer pool to prepare the execution */ ++ tdm_renderer->buf_pool = xf_adsp_allocate_mem_pool( ++ XF_BUF_POOL_SIZE, base->buf_bytes); ++ ++ if (IS_ERR(tdm_renderer->buf_pool)) /* PRQA S 306*/ ++ return -EINVAL; ++ ++ for (i = 0; i < XF_BUF_POOL_SIZE; i++) { ++ base->buffer[i] = xf_adsp_get_data_from_pool( ++ tdm_renderer->buf_pool, i); ++ ++ base->buf_queue++; ++ } ++ ++ /* mark TDM Renderer created */ ++ tdm_playback->state |= XF_HANDLE_READY; ++ ++ /* send zero buffer to plugin to kick init-processing */ ++ memset(base->buffer[0], 0, base->buf_bytes); ++ ++ if (xf_adsp_empty_this_buffer(base->handle_id, base->buffer[0], ++ base->buf_bytes) != 0) ++ return -EINVAL; ++ ++ spin_lock_irqsave(&base->lock, base->flag); ++ base->buf_queue--; ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ ++ /* wait until all the buffer have been consummed */ ++ while (base->buf_queue != XF_BUF_POOL_SIZE) { ++ schedule_timeout_interruptible(2); ++ if (signal_pending(current)) ++ break; ++ ++ /* check the error from initialization */ ++ if (base->runtime_err) ++ return -EINVAL; ++ } ++ ++ /* reset HW index */ ++ base->hw_idx = 0; ++ } ++ ++ /* success */ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Prepare TDM record function ++ * ++ * \param[out] tdm_record Pointer to TDM record data ++ * \param[in] substream Pointer to substream data ++ * \retval -EINVAL Failed to prepare TDM record function ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_tdm_record_prepare(struct snd_adsp_tdm_record *tdm_record, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_adsp_card *adsp_card = ++ snd_adsp_get_drvdata_from_substream(substream); ++ struct snd_adsp_control *ctr_if = &adsp_card->ctr_if; ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct xf_adsp_tdm_capture *tdm_capture = tdm_record->tdm_capture; ++ struct snd_adsp_base_info *base = &tdm_record->base; ++ int i; ++ int pcm_width, ch_mode, fs, frame_size; ++ ++ /* runtime parameter */ ++ fs = runtime->rate; ++ ++ ch_mode = (runtime->channels == 8) ? ++ XA_TDM_RDR_CHANNEL_MODE_1X8 : XA_TDM_RDR_CHANNEL_MODE_1X6; ++ ++ pcm_width = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ? 16 : 24; ++ frame_size = runtime->period_size; ++ ++ /* get number of bytes in a period */ ++ base->period_bytes = snd_pcm_lib_period_bytes(substream); ++ base->buf_bytes = (pcm_width == 16) ? ++ base->period_bytes : ((base->period_bytes * ++ BYTES_PER_SAMPLE(S24_3LE)) / ++ BYTES_PER_SAMPLE(S24_LE)); ++ ++ /* pcm indirect configuration */ ++ base->pcm_indirect.hw_buffer_size = snd_pcm_lib_buffer_bytes(substream); ++ base->pcm_indirect.sw_buffer_size = base->pcm_indirect.hw_buffer_size; ++ ++ /* total size of allocated buffers */ ++ base->pcm_indirect.hw_queue_size = base->period_bytes * ++ XF_BUF_POOL_SIZE; ++ ++ /* prepare parameters to set to TDM Capture as it is not yet ready */ ++ if (COMPONENT_IS_READY(tdm_record->state) == FALSE) { ++ struct xf_adsp_tdm_capture_params *params; ++ ++ params = &tdm_capture->params; ++ ++ /* apply capture parameters */ ++ params->out_rate = fs; ++ params->ch_mode = ch_mode; ++ params->pcm_width = pcm_width; ++ params->frame_size = frame_size; ++ ++ /* setting Audio device indexes */ ++ params->dma1 = PDMA_CH00; ++ params->dma2 = PDMA_CH01; ++ params->dev1 = SRC0; ++ params->dev2 = SSI40; /* set input device is SSI40 */ ++ ++ /* set volume rate if it is set by user or default value as */ ++ /* 100% */ ++ params->vol_rate = (ctr_if->tdm_vol_rate[DIRECT_CAPTURE] >= 0) ++ ? ctr_if->tdm_vol_rate[DIRECT_CAPTURE] : (1 << 20); ++ ++ /* set input rate if it is set by user */ ++ if (ctr_if->tdm_sample_rate[DIRECT_CAPTURE] >= 0) { ++ params->in_rate = ++ ctr_if->tdm_sample_rate[DIRECT_CAPTURE]; ++ } ++ ++ /* allocate buffer pool to prepare the execution */ ++ tdm_capture->buf_pool = xf_adsp_allocate_mem_pool( ++ XF_BUF_POOL_SIZE, base->buf_bytes); ++ ++ if (IS_ERR(tdm_capture->buf_pool)) /* PRQA S 306 */ ++ return -EINVAL; ++ ++ for (i = 0; i < XF_BUF_POOL_SIZE; i++) { ++ base->buffer[i] = xf_adsp_get_data_from_pool( ++ tdm_capture->buf_pool, i); ++ ++ base->buf_queue++; ++ } ++ ++ /* set parameters to ADSP TDM Capture plugin */ ++ if (xf_adsp_tdm_capture_set_params(tdm_capture) != 0) ++ return -EINVAL; ++ ++ /* mark TDM Capture ready */ ++ tdm_record->state |= XF_HANDLE_READY; ++ ++ /* kick init process by sending a zero buffer length */ ++ xf_adsp_fill_this_buffer(base->handle_id, base->buffer[0], 0); ++ ++ spin_lock_irqsave(&base->lock, base->flag); ++ base->buf_queue--; ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ ++ /* wait until finishing initialization */ ++ while (base->buf_queue != XF_BUF_POOL_SIZE) { ++ schedule_timeout_interruptible(2); ++ if (signal_pending(current)) ++ break; ++ ++ /* check the error from initialization */ ++ if (base->runtime_err) ++ return -EINVAL; ++ } ++ ++ /* reset hw data position */ ++ base->hw_idx = 0; ++ } ++ ++ /* success */ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Deinitialize TDM playback function ++ * ++ * \param[out] tdm_playback Pointer to TDM playback data ++ * \retval -EINVAL Failed to deinitialize TDM playback function ++ * \retval 0 Success ++ *****************************************************************************/ ++static int ++snd_adsp_tdm_playback_deinit(struct snd_adsp_tdm_playback *tdm_playback) ++{ ++ int ret = 0; ++ ++ /* perform de-initialization if TDM playback has been created */ ++ if (!tdm_playback) ++ return ret; ++ ++ /* perform completion process */ ++ if (COMPONENT_IS_CREATED(tdm_playback->state) == TRUE) { ++ /* send buffer with zero length to plugin for */ ++ /* completion process */ ++ /* PRQA S 3200 2 */ ++ xf_adsp_empty_this_buffer(tdm_playback->base.handle_id, ++ NULL, 0); ++ ++ /* free buffer pool *//* PRQA S 3200 2 */ ++ xf_adsp_free_mem_pool(tdm_playback->tdm_renderer->buf_pool); ++ ++ /* destroy TDM Renderer component */ ++ if (xf_adsp_tdm_renderer_destroy( ++ tdm_playback->tdm_renderer) != 0) ++ ret = -EINVAL; ++ ++ tdm_playback->tdm_renderer = NULL; ++ } ++ ++ /* canncel timer interrupt */ ++ if (COMPONENT_IS_CREATED(tdm_playback->base.hrt_state) == TRUE) ++ hrtimer_cancel(&tdm_playback->base.hrtimer); ++ ++ /* free playback data */ ++ kfree(tdm_playback); ++ ++ return ret; ++} ++ ++/** ************************************************************************** ++ * \brief Deinitialize TDM record function ++ * ++ * \param[out] tdm_record Pointer to TDM record data ++ * \retval -EINVAL Failed to deinitialize TDM record function ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_tdm_record_deinit(struct snd_adsp_tdm_record *tdm_record) ++{ ++ int ret = 0; ++ ++ /* perform de-initialization if TDM record has been created already */ ++ if (!tdm_record) ++ return ret; ++ ++ /* perform completion process */ ++ if (COMPONENT_IS_CREATED(tdm_record->state) == TRUE) { ++ /* send buffer with zero length to plugin for */ ++ /* completion process */ ++ /* PRQA S 3200 2 */ ++ xf_adsp_empty_this_buffer(tdm_record->base.handle_id, NULL, 0); ++ ++ /* free buffer pool *//* PRQA S 3200 2 */ ++ xf_adsp_free_mem_pool(tdm_record->tdm_capture->buf_pool); ++ ++ /* destroy TDM Capture component */ ++ if (xf_adsp_tdm_capture_destroy(tdm_record->tdm_capture) != 0) ++ ret = -EINVAL; ++ ++ tdm_record->tdm_capture = NULL; ++ } ++ ++ /* canncel timer interrupt */ ++ if (COMPONENT_IS_CREATED(tdm_record->base.hrt_state) == TRUE) ++ hrtimer_cancel(&tdm_record->base.hrtimer); ++ ++ /* free record data */ ++ kfree(tdm_record); ++ ++ return ret; ++} ++ ++/***************************************************************************** ++ * callback functions of ADSP ALSA driver ++ * ***************************************************************************/ ++ ++/** ************************************************************************** ++ * \brief Open a playback/TDM playback or record/TDM record stream ++ * ++ * \param[in] substream Pointer to substream object ++ * \retval 0 Success ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++static int snd_adsp_pcm_open(struct snd_pcm_substream *substream) ++{ ++ /* get ADSP soundcard and CPU DAI index */ ++ struct snd_adsp_card *adsp_card; ++ int dai_idx = snd_adsp_get_dai_id_from_substream(substream); ++ struct snd_adsp_control *ctr_if; ++ ++ adsp_card = snd_adsp_get_drvdata_from_substream(substream); ++ ctr_if = &adsp_card->ctr_if; ++ ++ if (dai_idx == RDR_DAI_IDX0 || dai_idx == RDR_DAI_IDX1 || ++ dai_idx == RDR_DAI_IDX2 || dai_idx == RDR_DAI_IDX3) { ++ /* register data for playback/record functions */ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ /* perform playback initialization */ ++ if (snd_adsp_playback_init( ++ &adsp_card->playback[dai_idx], ++ ctr_if->eqz_switch[DIRECT_PLAYBACK][dai_idx], ++ substream) < 0) { ++ /* perform playback de-initialization when */ ++ /* the initialization fails */ ++ snd_adsp_playback_deinit( ++ adsp_card->playback[dai_idx]); ++ ++ adsp_card->playback[dai_idx] = NULL; ++ return -EINVAL; ++ } ++ } else { ++ /* perform record initialization */ ++ if (snd_adsp_record_init( ++ &adsp_card->record[dai_idx], ++ ctr_if->eqz_switch[DIRECT_CAPTURE][dai_idx], ++ substream) < 0) { ++ /* perform record de-initialization when the */ ++ /* initialization fails */ ++ snd_adsp_record_deinit( ++ adsp_card->record[dai_idx]); ++ ++ adsp_card->record[dai_idx] = NULL; ++ return -EINVAL; ++ } ++ } ++ ++ /* save the hardware parameters */ ++ snd_soc_set_runtime_hwparams(substream, &snd_pcm_adsp_hw); ++ ++ /* each period has a frame size */ ++ snd_pcm_hw_constraint_single(substream->runtime, ++ SNDRV_PCM_HW_PARAM_PERIOD_SIZE, ++ FRAME_SIZE); ++ } else { ++ /* register data for TDM playback/record functions */ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ /* perform TDM playback initialization */ ++ if (snd_adsp_tdm_playback_init( ++ &adsp_card->tdm_playback, ++ substream) < 0) { ++ /* perform TDM playback de-initialization */ ++ /* when the initialization fails */ ++ snd_adsp_tdm_playback_deinit( ++ adsp_card->tdm_playback); ++ ++ adsp_card->tdm_playback = NULL; ++ return -EINVAL; ++ } ++ } else { ++ /* perform TDM record initialization */ ++ if (snd_adsp_tdm_record_init(&adsp_card->tdm_record, ++ substream) < 0) { ++ /* perform TDM record de-initialization */ ++ /* when the initialization fails */ ++ snd_adsp_tdm_record_deinit( ++ adsp_card->tdm_record); ++ ++ adsp_card->tdm_record = NULL; ++ return -EINVAL; ++ } ++ } ++ ++ /* save the hardware parameters */ ++ snd_soc_set_runtime_hwparams(substream, &snd_pcm_adsp_tdm_hw); ++ ++ /* each period has a frame size */ ++ snd_pcm_hw_constraint_single(substream->runtime, ++ SNDRV_PCM_HW_PARAM_PERIOD_SIZE, ++ TDM_FRAME_SIZE); ++ } ++ ++ snd_pcm_hw_constraint_integer(substream->runtime, ++ SNDRV_PCM_HW_PARAM_PERIODS); ++ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Close a playback/TDM playback or record/TDM record stream ++ * ++ * \param[in] substream Pointer to substream object ++ * \retval 0 Success ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++static int snd_adsp_pcm_close(struct snd_pcm_substream *substream) ++{ ++ /* get ADSP soundcard and CPU DAI index */ ++ struct snd_adsp_card *adsp_card = ++ snd_adsp_get_drvdata_from_substream(substream); ++ int dai_idx = snd_adsp_get_dai_id_from_substream(substream); ++ int err = 0; ++ ++ if (dai_idx == RDR_DAI_IDX0 || dai_idx == RDR_DAI_IDX1 || ++ dai_idx == RDR_DAI_IDX2 || dai_idx == RDR_DAI_IDX3) { ++ /* destroy Renderer/Capture or Equalizer (if used) */ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ if (snd_adsp_playback_deinit( ++ adsp_card->playback[dai_idx]) < 0) ++ err = -EINVAL; ++ ++ adsp_card->playback[dai_idx] = NULL; ++ } else { ++ if (snd_adsp_record_deinit( ++ adsp_card->record[dai_idx]) < 0) ++ err = -EINVAL; ++ ++ adsp_card->record[dai_idx] = NULL; ++ } ++ } else { ++ /* destroy TDM Renderer/TDM Capture */ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ if (snd_adsp_tdm_playback_deinit( ++ adsp_card->tdm_playback) < 0) ++ err = -EINVAL; ++ ++ adsp_card->tdm_playback = NULL; ++ } else { ++ if (snd_adsp_tdm_record_deinit( ++ adsp_card->tdm_record) < 0) ++ err = -EINVAL; ++ ++ adsp_card->tdm_record = NULL; ++ } ++ } ++ ++ return err; ++} ++ ++/** ************************************************************************** ++ * \brief Allocate ALSA buffer and calculate expire time of hr timer ++ * ++ * \param[in] substream Pointer to substream object ++ * \retval 0 Success ++ * \retval -ENOMEM Cannot allocate ALSA buffer ++ *****************************************************************************/ ++static int snd_adsp_pcm_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *hw_params) ++{ ++ struct snd_adsp_base_info *base; ++ int err = 0; ++ ++ base = snd_adsp_get_base_from_substream(substream); ++ ++ /* set expire time of hrtimer, this value should be time for */ ++ /* transfer a frame */ ++ base->ktime = ns_to_ktime((1000000000 / params_rate(hw_params)) * ++ params_period_size(hw_params)); ++ ++ err = snd_pcm_lib_malloc_pages(substream, ++ params_buffer_bytes(hw_params)); ++ ++ /* reset DMA buffer area */ ++ memset(substream->runtime->dma_area, 0, substream->runtime->dma_bytes); ++ ++ return err; ++} ++ ++/** ************************************************************************** ++ * \brief Free the allocated ALSA buffer ++ * ++ * \param[in] substream Pointer to substream object ++ * \retval 0 Success ++ * \retval -EINVAL Cannot deallocate buffer ++ *****************************************************************************/ ++static int snd_adsp_pcm_hw_free(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_lib_free_pages(substream); ++} ++ ++/** ************************************************************************** ++ * \brief Prepare playback/TDM playback or record/TDM record function ++ * before transferring data ++ * ++ * \param[in] substream Pointer to substream object ++ * \retval 0 Success ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++static int snd_adsp_pcm_prepare(struct snd_pcm_substream *substream) ++{ ++ /* get ADSP soundcard and CPU DAI index */ ++ struct snd_adsp_card * ++ adsp_card = snd_adsp_get_drvdata_from_substream(substream); ++ int dai_idx = snd_adsp_get_dai_id_from_substream(substream); ++ int err = 0; ++ ++ if (dai_idx == RDR_DAI_IDX0 || dai_idx == RDR_DAI_IDX1 || ++ dai_idx == RDR_DAI_IDX2 || dai_idx == RDR_DAI_IDX3) { ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ /* get playback prepared to execute */ ++ err = snd_adsp_playback_prepare( ++ adsp_card->playback[dai_idx], substream); ++ else ++ /* get record prepared to execute */ ++ err = snd_adsp_record_prepare( ++ adsp_card->record[dai_idx], substream); ++ } else { ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ /* get TDM playback prepared to execute */ ++ err = snd_adsp_tdm_playback_prepare( ++ adsp_card->tdm_playback, substream); ++ else ++ /* get TDM record prepared to execute */ ++ err = snd_adsp_tdm_record_prepare( ++ adsp_card->tdm_record, substream); ++ } ++ ++ return err; ++} ++ ++/** ************************************************************************** ++ * \brief Trigger playback/TDM playback or record/TDM record stream ++ * to go to next phase ++ * ++ * \param[in] substream Pointer to substream object ++ * \retval 0 Success ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++static int snd_adsp_pcm_trigger(struct snd_pcm_substream *substream, int idx) ++{ ++ struct snd_adsp_base_info * ++ base = snd_adsp_get_base_from_substream(substream); ++ ++ switch (idx) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ /* start high-resolution timer */ ++ hrtimer_start(&base->hrtimer, base->ktime, HRTIMER_MODE_REL); ++ ++ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { ++ int buf_queue = 0; ++ ++ /* get current available buffer */ ++ spin_lock_irqsave(&base->lock, base->flag); ++ buf_queue = base->buf_queue; ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ ++ /* send all available buffer to plugin to */ ++ /* get data */ ++ for (; buf_queue > 0; buf_queue--) { ++ if (xf_adsp_fill_this_buffer( ++ base->handle_id, ++ base->buffer[base->buf_idx], ++ base->buf_bytes) != 0) ++ return -EINVAL; ++ ++ spin_lock_irqsave(&base->lock, base->flag); ++ base->buf_queue--; ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ ++ base->buf_idx++; ++ ++ if (base->buf_idx >= XF_BUF_POOL_SIZE) ++ base->buf_idx = 0; ++ } ++ } ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ break; ++ default: ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Return HW data position ++ * ++ * \param[in] substream Pointer to substream object ++ * \retval position HW data position ++ *****************************************************************************/ ++static snd_pcm_uframes_t ++snd_adsp_pcm_pointer(struct snd_pcm_substream *substream) ++{ ++ struct snd_adsp_base_info * ++ base = snd_adsp_get_base_from_substream(substream); ++ unsigned int hw_idx, hw_buffer_size; ++ snd_pcm_uframes_t pointer; ++ ++ /* convert hw index to correct as submitted bytes */ ++ spin_lock_irqsave(&base->lock, base->flag); ++ hw_idx = (base->hw_idx / base->buf_bytes) * base->period_bytes; ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ ++ hw_buffer_size = base->pcm_indirect.hw_buffer_size; ++ ++ if (hw_idx >= hw_buffer_size) { ++ spin_lock_irqsave(&base->lock, base->flag); ++ ++ base->hw_idx -= (hw_buffer_size / base->period_bytes) * ++ base->buf_bytes; ++ ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ } ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ pointer = snd_pcm_indirect_playback_pointer(substream, ++ &base->pcm_indirect, ++ hw_idx); ++ else ++ pointer = snd_pcm_indirect_capture_pointer(substream, ++ &base->pcm_indirect, ++ hw_idx); ++ ++ return pointer; ++} ++ ++/** ************************************************************************** ++ * \brief Call read/write process to transfer data ++ * ++ * \param[in] substream Pointer to substream object ++ * \retval 0 Success ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++static int snd_adsp_pcm_ack(struct snd_pcm_substream *substream) ++{ ++ struct snd_adsp_base_info * ++ base = snd_adsp_get_base_from_substream(substream); ++ ++ if (base->runtime_err) ++ return -EINVAL; ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ snd_pcm_indirect_playback_transfer(substream, ++ &base->pcm_indirect, ++ snd_adsp_pcm_transfer); ++ else ++ snd_pcm_indirect_capture_transfer(substream, ++ &base->pcm_indirect, ++ snd_adsp_pcm_transfer); ++ ++ return 0; ++} ++ ++/** *************************************************************************** ++ * \brief Copy data from source buffer to destination buffer ++ * ++ * \params[in] dst Destination buffer pointer ++ * \params[out] src Source buffer pointer ++ * \params[in] dst_size Destination buffer size in byte ++ * \params[in] src_size Source buffer size in byte ++ * \retval None ++ *****************************************************************************/ ++static inline void ++snd_adsp_copy_data(void *dst, void *src, int dst_size, int src_size) ++{ ++ unsigned char *data_dst = dst; ++ unsigned char *data_src = src; ++ int i; ++ ++ if (dst_size == src_size) { ++ /* src and dst bufs are same size, does not need to convert */ ++ memcpy(data_dst, data_src, dst_size); ++ ++ } else if (dst_size < src_size) { ++ for (i = 0; i < (dst_size - BYTES_PER_SAMPLE(S24_3LE)); ++ i += BYTES_PER_SAMPLE(S24_3LE)) { ++ *(u32 *)data_dst = *(u32 *)data_src; ++ ++ data_dst += BYTES_PER_SAMPLE(S24_3LE); ++ data_src += BYTES_PER_SAMPLE(S24_LE); ++ } ++ ++ /* copy a S24_3LE sample from S24_LE sample */ ++ data_dst[0] = data_src[0]; ++ data_dst[1] = data_src[1]; ++ data_dst[2] = data_src[2]; ++ ++ } else { ++ unsigned int tmp; ++ ++ for (i = 0; i < (dst_size - BYTES_PER_SAMPLE(S24_LE)); ++ i += BYTES_PER_SAMPLE(S24_LE)) { ++ tmp = *(u32 *)data_src; ++ *(u32 *)data_dst = tmp & 0x0FFFFFF; ++ ++ data_dst += BYTES_PER_SAMPLE(S24_LE); ++ data_src += BYTES_PER_SAMPLE(S24_3LE); ++ } ++ ++ /* copy a S24_LE sample from S24_3LE sample */ ++ data_dst[0] = data_src[0]; ++ data_dst[1] = data_src[1]; ++ data_dst[2] = data_src[2]; ++ data_dst[3] = 0; ++ } ++} ++ ++/** ************************************************************************** ++ * \brief Transfer data process between ALSA buffer and ADSP buffer ++ * ++ * \param[in] substream Pointer to substream object ++ * \param[in] rec Pointer to indirect PCM data ++ * \param[in] bytes Number of byte need to be transferred ++ * \retval None ++ *****************************************************************************/ ++static void snd_adsp_pcm_transfer(struct snd_pcm_substream *substream, ++ struct snd_pcm_indirect *rec, ++ size_t bytes) ++{ ++ struct snd_adsp_base_info * ++ base = snd_adsp_get_base_from_substream(substream); ++ int direct = substream->stream; ++ int trans_bytes = bytes; ++ int buf_bytes, period_bytes; ++ void *dma_buf, *data_buff; ++ ++ /* get the DMA buffer pointer */ ++ dma_buf = (void *)(substream->runtime->dma_area + rec->sw_data); ++ ++ /* get information from base */ ++ buf_bytes = base->buf_bytes; ++ period_bytes = base->period_bytes; ++ ++ /* make sure the available buffer and transfer size - TBD */ ++ while (trans_bytes > 0) { ++ spin_lock_irqsave(&base->lock, base->flag); ++ if (base->buf_queue > 0 && trans_bytes >= period_bytes) { ++ base->buf_queue--; ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ ++ /* get the buffer pointer from stream */ ++ data_buff = base->buffer[base->buf_idx]; ++ ++ if (direct == SNDRV_PCM_STREAM_PLAYBACK) { ++ /* copy data from user *//* PRQA S 3200 2 */ ++ snd_adsp_copy_data(data_buff, dma_buf, ++ buf_bytes, period_bytes); ++ ++ /* send buffer to plugin */ ++ if (xf_adsp_empty_this_buffer(base->handle_id, ++ data_buff, ++ buf_bytes) < 0) ++ base->runtime_err = TRUE; ++ } else { ++ /* copy data to user *//* PRQA S 3200 2 */ ++ snd_adsp_copy_data(dma_buf, data_buff, ++ period_bytes, buf_bytes); ++ ++ /* send buffer to plugin */ ++ if (xf_adsp_fill_this_buffer(base->handle_id, ++ data_buff, ++ buf_bytes) < 0) ++ base->runtime_err = TRUE; ++ } ++ ++ base->buf_idx++; ++ if (base->buf_idx >= XF_BUF_POOL_SIZE) ++ base->buf_idx = 0; ++ } else { ++ spin_unlock_irqrestore(&base->lock, base->flag); ++ break; ++ } ++ ++ trans_bytes -= period_bytes; ++ } ++} ++ ++/** ************************************************************************** ++ * \brief Get info of Volume control ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] uinfo Pointer to info structure of volume control ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_control_volume_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 1; ++ uinfo->value.integer.min = -1; ++ uinfo->value.integer.max = 799; ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Get volume value ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] ucontrol Pointer to volume value ++ * \retval 0 Success ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++static int snd_adsp_control_volume_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_adsp_card *adsp_card = snd_kcontrol_chip(kcontrol); ++ struct snd_adsp_control *ctr_if = &adsp_card->ctr_if; ++ int handle_state, handle_id; ++ int volume, cmd_idx, direction; ++ unsigned int index; ++ ++ /* get the index */ ++ index = kcontrol->id.index; ++ ++ /* set handle state as NULL state */ ++ handle_state = XF_HANDLE_NULL; ++ handle_id = -1; ++ ++ /* determine command index, direction, handle state, handle ID */ ++ if (kcontrol->id.name[0] == PREFIX_OF_PLAYBACK_CTR_NAME) { ++ cmd_idx = XA_RDR_CONFIG_PARAM_VOLUME_RATE; ++ direction = DIRECT_PLAYBACK; ++ ++ if (adsp_card->playback[index]) { ++ handle_state = adsp_card->playback[index]->rdr_state; ++ ++ handle_id = ++ adsp_card->playback[index]->renderer->handle_id; ++ } ++ } else if (kcontrol->id.name[0] == PREFIX_OF_CAPTURE_CTR_NAME) { ++ cmd_idx = XA_CAP_CONFIG_PARAM_VOLUME_RATE; ++ direction = DIRECT_CAPTURE; ++ ++ if (adsp_card->record[index]) { ++ handle_state = adsp_card->record[index]->cap_state; ++ ++ handle_id = ++ adsp_card->record[index]->capture->handle_id; ++ } ++ } else { ++ if (kcontrol->id.name[3] == TDM_PLAYBACK) { ++ cmd_idx = XA_TDM_RDR_CONFIG_PARAM_VOLUME_RATE; ++ direction = DIRECT_PLAYBACK; ++ ++ if (adsp_card->tdm_playback) { ++ handle_state = adsp_card->tdm_playback->state; ++ ++ handle_id = ++ adsp_card->tdm_playback->tdm_renderer->handle_id; ++ } ++ } else { ++ cmd_idx = XA_TDM_CAP_CONFIG_PARAM_VOLUME_RATE; ++ direction = DIRECT_CAPTURE; ++ ++ if (adsp_card->tdm_record) { ++ handle_state = adsp_card->tdm_record->state; ++ ++ handle_id = ++ adsp_card->tdm_record->tdm_capture->handle_id; ++ } ++ } ++ } ++ ++ /* get the volume's value */ ++ if (COMPONENT_IS_READY(handle_state) == TRUE) { ++ /* get the volume's value from the plugin */ ++ if (xf_adsp_get_param(handle_id, cmd_idx, &volume) != 0) ++ return -EINVAL; ++ ++ /* check the value after getting it and adjust it */ ++ ucontrol->value.integer.value[0] = (volume == 0xFFFFFFFF) ? ++ (-1) : (volume * VOLUME_SCALE) >> 20; ++ } else { ++ if (kcontrol->id.name[0] != PREFIX_OF_TDM_CTR_NAME) ++ ucontrol->value.integer.value[0] = ++ (ctr_if->vol_rate[direction][index] * ++ VOLUME_SCALE) >> 20; ++ else ++ ucontrol->value.integer.value[0] = ++ (ctr_if->tdm_vol_rate[direction] * ++ VOLUME_SCALE) >> 20; ++ } ++ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Set volume value ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] ucontrol Pointer to volume value ++ * \retval 1 Volume change ++ * \retval 0 Volume does not change ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++/* PRQA S 3673 1*/ ++static int ++snd_adsp_control_volume_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_adsp_card *adsp_card = snd_kcontrol_chip(kcontrol); ++ struct snd_adsp_control *ctr_if = &adsp_card->ctr_if; ++ int volume; ++ int ret; ++ int handle_state, handle_id, cmd_idx, volume_get; ++ int direction; ++ unsigned int index; ++ ++ /* get the index */ ++ index = kcontrol->id.index; ++ ++ /* set handle state as NULL state and handle ID */ ++ handle_state = XF_HANDLE_NULL; ++ handle_id = -1; ++ ++ /* get the value to set */ ++ if (ucontrol->value.integer.value[0] == -1) { ++ volume = 0xFFFFFFFF; ++ } else { ++ /* round up the value if needed */ ++ volume = (ucontrol->value.integer.value[0] * (1 << 20)) / ++ VOLUME_SCALE; ++ ++ if ((ucontrol->value.integer.value[0] * (1 << 20)) > ++ (VOLUME_SCALE * volume)) ++ volume += 1; ++ } ++ ++ /* determine command index, direction, handle state, handle ID */ ++ if (kcontrol->id.name[0] == PREFIX_OF_PLAYBACK_CTR_NAME) { ++ cmd_idx = XA_RDR_CONFIG_PARAM_VOLUME_RATE; ++ direction = DIRECT_PLAYBACK; ++ ++ if (adsp_card->playback[index]) { ++ handle_state = adsp_card->playback[index]->rdr_state; ++ ++ handle_id = ++ adsp_card->playback[index]->renderer->handle_id; ++ } ++ } else if (kcontrol->id.name[0] == PREFIX_OF_CAPTURE_CTR_NAME) { ++ cmd_idx = XA_CAP_CONFIG_PARAM_VOLUME_RATE; ++ direction = DIRECT_CAPTURE; ++ ++ if (adsp_card->record[index]) { ++ handle_state = adsp_card->record[index]->cap_state; ++ ++ handle_id = ++ adsp_card->record[index]->capture->handle_id; ++ } ++ } else { ++ if (kcontrol->id.name[3] == TDM_PLAYBACK) { ++ cmd_idx = XA_TDM_RDR_CONFIG_PARAM_VOLUME_RATE; ++ direction = DIRECT_PLAYBACK; ++ ++ if (adsp_card->tdm_playback) { ++ handle_state = adsp_card->tdm_playback->state; ++ ++ handle_id = ++ adsp_card->tdm_playback->tdm_renderer->handle_id; ++ } ++ } else { ++ cmd_idx = XA_TDM_CAP_CONFIG_PARAM_VOLUME_RATE; ++ direction = DIRECT_CAPTURE; ++ ++ if (adsp_card->tdm_record) { ++ handle_state = adsp_card->tdm_record->state; ++ ++ handle_id = ++ adsp_card->tdm_record->tdm_capture->handle_id; ++ } ++ } ++ } ++ ++ /* set volume to plugin */ ++ if (COMPONENT_IS_READY(handle_state) == TRUE) { ++ /* TDM does not support set volume in runtime state */ ++ if (kcontrol->id.name[0] == PREFIX_OF_TDM_CTR_NAME) ++ return -EINVAL; ++ ++ /* apply set volume value to ADSP from user setting */ ++ if (xf_adsp_set_param(handle_id, cmd_idx, volume) != 0) ++ return -EINVAL; ++ ++ /* get volume from ADSP after setting to confirm */ ++ if (xf_adsp_get_param(handle_id, cmd_idx, &volume_get) != 0) ++ return -EINVAL; ++ ++ /* check if the value has changed */ ++ ret = (volume_get == volume) ? 1 : 0; ++ } else { ++ if (kcontrol->id.name[0] != PREFIX_OF_TDM_CTR_NAME) ++ ctr_if->vol_rate[direction][index] = volume; ++ else ++ ctr_if->tdm_vol_rate[direction] = volume; ++ ++ ret = 1; ++ } ++ ++ return ret; ++} ++ ++/** ************************************************************************** ++ * \brief Get info of Sample Rate Converter control ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] uinfo Pointer to info structure of sample rate ++ * converter control ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_control_sample_rate_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 1; ++ uinfo->value.integer.min = -1; ++ uinfo->value.integer.max = 48000; ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Get sample rate value ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] ucontrol Pointer to sample rate value ++ * \retval 0 Success ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++static int snd_adsp_control_sample_rate_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_adsp_card *adsp_card = snd_kcontrol_chip(kcontrol); ++ int *rate; ++ int handle_id, handle_state, cmd_idx, direction; ++ unsigned int index; ++ ++ rate = (int *)&ucontrol->value.integer.value[0]; /* PRQA S 310 */ ++ ++ /* get the index */ ++ index = kcontrol->id.index; ++ ++ /* set handle state as NULL state and handle ID */ ++ handle_state = XF_HANDLE_NULL; ++ handle_id = -1; ++ ++ /* determine command, direction, handle state, handle ID */ ++ if (kcontrol->id.name[0] == PREFIX_OF_PLAYBACK_CTR_NAME) { ++ cmd_idx = XA_RDR_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ direction = DIRECT_PLAYBACK; ++ ++ if (adsp_card->playback[index]) { ++ handle_state = adsp_card->playback[index]->rdr_state; ++ ++ handle_id = ++ adsp_card->playback[index]->renderer->handle_id; ++ } ++ } else if (kcontrol->id.name[0] == PREFIX_OF_CAPTURE_CTR_NAME) { ++ cmd_idx = XA_CAP_CONFIG_PARAM_SAMPLE_RATE; ++ direction = DIRECT_CAPTURE; ++ ++ if (adsp_card->record[index]) { ++ handle_state = adsp_card->record[index]->cap_state; ++ ++ handle_id = ++ adsp_card->record[index]->capture->handle_id; ++ } ++ } else { ++ if (kcontrol->id.name[3] == TDM_PLAYBACK) { ++ cmd_idx = XA_TDM_RDR_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ direction = DIRECT_PLAYBACK; ++ ++ if (adsp_card->tdm_playback) { ++ handle_state = adsp_card->tdm_playback->state; ++ ++ handle_id = ++ adsp_card->tdm_playback->tdm_renderer->handle_id; ++ } ++ } else { ++ cmd_idx = XA_TDM_CAP_CONFIG_PARAM_IN_SAMPLE_RATE; ++ direction = DIRECT_CAPTURE; ++ ++ if (adsp_card->tdm_record) { ++ handle_state = adsp_card->tdm_record->state; ++ ++ handle_id = ++ adsp_card->tdm_record->tdm_capture->handle_id; ++ } ++ } ++ } ++ ++ /* get parameter from plugin */ ++ if (COMPONENT_IS_READY(handle_state) == TRUE) { ++ if (xf_adsp_get_param(handle_id, cmd_idx, rate) != 0) ++ return -EINVAL; ++ } else { ++ if (kcontrol->id.name[0] != PREFIX_OF_TDM_CTR_NAME) ++ *rate = adsp_card->ctr_if.sample_rate[direction][index]; ++ else ++ *rate = adsp_card->ctr_if.tdm_sample_rate[direction]; ++ } ++ ++ /* success */ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Set sample rate value ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] ucontrol Pointer to sample rate value ++ * \retval 1 Sample rate change ++ * \retval 0 Sample rate does not change ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++/* PRQA S 3673 1 */ ++static int ++snd_adsp_control_sample_rate_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_adsp_card *adsp_card = snd_kcontrol_chip(kcontrol); ++ unsigned int index; ++ int rate; ++ int handle_state, cmd_idx, direction; ++ int ret = 1; ++ ++ rate = (int)ucontrol->value.integer.value[0]; ++ ++ /* get the index */ ++ index = kcontrol->id.index; ++ ++ /* set handle state as NULL state */ ++ handle_state = XF_HANDLE_NULL; ++ ++ /* determine command, direction and handle state */ ++ if (kcontrol->id.name[0] == PREFIX_OF_PLAYBACK_CTR_NAME) { ++ cmd_idx = XA_RDR_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ direction = DIRECT_PLAYBACK; ++ ++ if (adsp_card->playback[index]) ++ handle_state = adsp_card->playback[index]->rdr_state; ++ ++ } else if (kcontrol->id.name[0] == PREFIX_OF_CAPTURE_CTR_NAME) { ++ cmd_idx = XA_CAP_CONFIG_PARAM_SAMPLE_RATE; ++ direction = DIRECT_CAPTURE; ++ ++ if (adsp_card->record[index]) ++ handle_state = adsp_card->record[index]->cap_state; ++ ++ } else { ++ if (kcontrol->id.name[3] == TDM_PLAYBACK) { ++ cmd_idx = XA_TDM_RDR_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ direction = DIRECT_PLAYBACK; ++ ++ if (adsp_card->tdm_playback) ++ handle_state = adsp_card->tdm_playback->state; ++ ++ } else { ++ cmd_idx = XA_TDM_CAP_CONFIG_PARAM_IN_SAMPLE_RATE; ++ direction = DIRECT_CAPTURE; ++ ++ if (adsp_card->tdm_record) ++ handle_state = adsp_card->tdm_record->state; ++ } ++ } ++ ++ /* get the value to set */ ++ if (COMPONENT_IS_READY(handle_state) == TRUE) ++ return -EINVAL; ++ ++ if (kcontrol->id.name[0] != PREFIX_OF_TDM_CTR_NAME) ++ adsp_card->ctr_if.sample_rate[direction][index] = rate; ++ else ++ adsp_card->ctr_if.tdm_sample_rate[direction] = rate; ++ ++ ret = 1; ++ ++ return ret; ++} ++ ++/** ************************************************************************** ++ * \brief Get info of Equalizer control ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] uinfo Pointer to info structure of Equalizer control ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_control_eqz_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = MAX_EQZ_PARAM_NUMBER; ++ uinfo->value.integer.min = -1; ++ uinfo->value.integer.max = 0x7fffffff; ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Get equalizer parameters value ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] ucontrol Pointer to equalizer parameters value ++ * \retval 0 Success ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++static int snd_adsp_control_eqz_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_adsp_card *adsp_card = snd_kcontrol_chip(kcontrol); ++ int handle_state, direction; ++ int i, j, filter_index; ++ unsigned int index; ++ struct xf_adsp_equalizer *equalizer; ++ struct xf_adsp_equalizer_params *eqz_params; ++ ++ /* get the index */ ++ index = kcontrol->id.index; ++ ++ /* determin direction of stream */ ++ direction = (kcontrol->id.name[0] == PREFIX_OF_PLAYBACK_CTR_NAME) ? ++ DIRECT_PLAYBACK : DIRECT_CAPTURE; ++ ++ /* set handle state as NULL state, handle ID, equalizer pointer */ ++ handle_state = XF_HANDLE_NULL; ++ equalizer = NULL; ++ ++ /* get component's state */ ++ if (direction == DIRECT_PLAYBACK) { ++ if (adsp_card->playback[index]) { ++ handle_state = adsp_card->playback[index]->eqz_state; ++ equalizer = adsp_card->playback[index]->equalizer; ++ } ++ } else { ++ if (adsp_card->record[index]) { ++ handle_state = adsp_card->record[index]->eqz_state; ++ equalizer = adsp_card->record[index]->equalizer; ++ } ++ } ++ ++ /* perform parameters' values getting */ ++ if (COMPONENT_IS_READY(handle_state) == TRUE) { ++ /* get equalizer's parameters */ ++ if (xf_adsp_equalizer_get_params(equalizer) != 0) ++ return -EINVAL; ++ ++ eqz_params = &equalizer->params; ++ } else { ++ eqz_params = &adsp_card->ctr_if.eqz_params[direction][index]; ++ } ++ ++ /* get equalizer type: PARAMETRIC or GRAPHIC */ ++ ucontrol->value.integer.value[0] = eqz_params->eqz_type; ++ ++ /* get parameters' value from Equalizer plugin */ ++ if (eqz_params->eqz_type == XA_REL_EQZ_TYPE_PARAMETRIC) { ++ for (i = 0, filter_index = 1; ++ filter_index <= XA_REL_EQZ_FILTER_NUM; ++ i++, filter_index++) { ++ /* get filter index */ ++ ucontrol->value.integer.value[(i * 6) + 1] = ++ filter_index; ++ ++ /* get frequency centre */ ++ ucontrol->value.integer.value[(i * 6) + 2] = ++ eqz_params->p_coef.fc[i]; ++ ++ /* get bandwidth */ ++ ucontrol->value.integer.value[(i * 6) + 3] = ++ eqz_params->p_coef.band_width[i]; ++ ++ /* get filter type */ ++ ucontrol->value.integer.value[(i * 6) + 4] = ++ eqz_params->p_coef.type[i]; ++ ++ /* get gain base */ ++ ucontrol->value.integer.value[(i * 6) + 5] = ++ eqz_params->p_coef.gain_base[i]; ++ ++ /* get gain */ ++ ucontrol->value.integer.value[(i * 6) + 6] = ++ eqz_params->p_coef.gain[i]; ++ } ++ } else { ++ for (i = 0, filter_index = 1; ++ filter_index <= XA_REL_EQZ_GRAPHIC_BAND_NUM; ++ i++, filter_index++) { ++ /* get band index */ ++ ucontrol->value.integer.value[(i * 2) + 1] = ++ filter_index; ++ ++ /* get graphic gain */ ++ ucontrol->value.integer.value[(i * 2) + 2] = ++ eqz_params->g_coef.gain_g[i]; ++ } ++ ++ j = (i * 2) + 1; ++ ++ /* make the rest of values silent */ ++ while (j < MAX_EQZ_PARAM_NUMBER) { ++ ucontrol->value.integer.value[j] = -1; ++ j++; ++ } ++ } ++ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Set equalizer parameters value ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] ucontrol Pointer to equalizer parameters value ++ * \retval 1 Equalizer parameters change ++ * \retval 0 Equalizer parameters does not change ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++/* PRQA S 3673 1*/ ++static int snd_adsp_control_eqz_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_adsp_card *adsp_card = snd_kcontrol_chip(kcontrol); ++ int handle_state, direction, filter_idx; ++ int i; ++ int index; ++ struct xf_adsp_equalizer_params *eqz_params = NULL; ++ ++ /* get the index */ ++ index = kcontrol->id.index; ++ ++ /* determine the direction */ ++ direction = (kcontrol->id.name[0] == PREFIX_OF_PLAYBACK_CTR_NAME) ? ++ DIRECT_PLAYBACK : DIRECT_CAPTURE; ++ ++ /* set handle state as NULL state */ ++ handle_state = XF_HANDLE_NULL; ++ ++ /* get the handle state */ ++ if (direction == DIRECT_PLAYBACK) { ++ if (adsp_card->playback[index]) ++ handle_state = adsp_card->playback[index]->eqz_state; ++ } else { ++ if (adsp_card->record[index]) ++ handle_state = adsp_card->record[index]->eqz_state; ++ } ++ ++ /* perform equalizer's parameters setting */ ++ if (COMPONENT_IS_READY(handle_state) == TRUE) ++ return -EINVAL; ++ ++ /* PRQA S 310 1*/ ++ eqz_params = &adsp_card->ctr_if.eqz_params[direction][index]; ++ ++ i = 0; ++ /* PRQA S 3440 1*/ ++ eqz_params->eqz_type = ucontrol->value.integer.value[i]; ++ i++; ++ filter_idx = 0; ++ ++ if (eqz_params->eqz_type == XA_REL_EQZ_TYPE_PARAMETRIC) { ++ while (i < MAX_EQZ_PARAM_NUMBER) { ++ /* get index filter */ ++ /* PRQA S 3440*/ ++ filter_idx = ucontrol->value.integer.value[i]; ++ i++; ++ ++ /* valid index filter is range */ ++ /* (1 to XA_REL_EQZ_FILTER_NUM) */ ++ if (filter_idx >= 1 && ++ filter_idx <= XA_REL_EQZ_FILTER_NUM) { ++ /* PRQA S 3440 5*/ ++ eqz_params->p_coef.fc[filter_idx - 1] = ++ ucontrol->value.integer.value[i]; ++ ++ i++; ++ eqz_params->p_coef.band_width[filter_idx - 1] = ++ ucontrol->value.integer.value[i]; ++ ++ i++; ++ eqz_params->p_coef.type[filter_idx - 1] = ++ ucontrol->value.integer.value[i]; ++ ++ i++; ++ eqz_params->p_coef.gain_base[filter_idx - 1] = ++ ucontrol->value.integer.value[i]; ++ ++ i++; ++ eqz_params->p_coef.gain[filter_idx - 1] = ++ ucontrol->value.integer.value[i]; ++ ++ i++; ++ } ++ /* index filter = -1 means that user */ ++ /* does not set this filter */ ++ else if (filter_idx == -1 || filter_idx == 0) { ++ i += 5; ++ } else { ++ return -EINVAL; ++ } ++ } ++ } else if (eqz_params->eqz_type == XA_REL_EQZ_TYPE_GRAPHIC) { ++ while (i < ((XA_REL_EQZ_GRAPHIC_BAND_NUM * 2) + 1)) { ++ /*get index filter */ ++ /* PRQA S 3440 */ ++ filter_idx = ucontrol->value.integer.value[i++]; ++ ++ if (filter_idx >= 1 && ++ filter_idx <= XA_REL_EQZ_GRAPHIC_BAND_NUM) { ++ eqz_params->g_coef.gain_g[filter_idx - 1] = ++ ucontrol->value.integer.value[i]; ++ i++; ++ ++ } else if (filter_idx == -1 || filter_idx == 0) { ++ i += 1; ++ } else { ++ return -EINVAL; ++ } ++ } ++ } else { ++ return -EINVAL; ++ } ++ ++ return 1; ++} ++ ++/** ************************************************************************** ++ * \brief Get info of Equalizer Switch control ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] uinfo Pointer to info structure of Equalizer ++ * Switch control ++ * \retval 0 Success ++ *****************************************************************************/ ++static int snd_adsp_control_eqz_switch_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 1; ++ uinfo->value.integer.min = 0; ++ uinfo->value.integer.max = 1; ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Get equalizer switch value ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] ucontrol Pointer to equalizer switch value ++ * \retval 0 Success ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++static int ++snd_adsp_control_eqz_switch_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_adsp_card *adsp_card = snd_kcontrol_chip(kcontrol); ++ int direction; ++ unsigned int index; ++ ++ /* get the index */ ++ index = kcontrol->id.index; ++ ++ /* determine the direction */ ++ direction = (kcontrol->id.name[0] == PREFIX_OF_PLAYBACK_CTR_NAME) ? ++ DIRECT_PLAYBACK : DIRECT_CAPTURE; ++ ++ /* get the Equalizer switch status */ ++ ucontrol->value.integer.value[0] = ++ adsp_card->ctr_if.eqz_switch[direction][index]; ++ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Set equalizer switch value ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] ucontrol Pointer to equalizer switch value ++ * \retval 1 Equalizer switch change ++ * \retval 0 Equalizer switch does not change ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++/* PRQA S 3673 1 */ ++static int ++snd_adsp_control_eqz_switch_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_adsp_card *adsp_card = snd_kcontrol_chip(kcontrol); ++ int eqz_switch; ++ int handle_state, direction; ++ unsigned int index; ++ int ret = 0; ++ ++ eqz_switch = ucontrol->value.integer.value[0]; ++ ++ /* get the index */ ++ index = kcontrol->id.index; ++ ++ /* determine the direction */ ++ direction = (kcontrol->id.name[0] == PREFIX_OF_PLAYBACK_CTR_NAME) ? ++ DIRECT_PLAYBACK : DIRECT_CAPTURE; ++ ++ /* set handle state as NULL state */ ++ handle_state = XF_HANDLE_NULL; ++ ++ /* determine handle state */ ++ if (direction == DIRECT_PLAYBACK) { ++ if (adsp_card->playback[index]) ++ handle_state = adsp_card->playback[index]->rdr_state; ++ } else { ++ if (adsp_card->record[index]) ++ handle_state = adsp_card->record[index]->cap_state; ++ } ++ ++ /* set the status of Equalizer */ ++ if (COMPONENT_IS_READY(handle_state) == TRUE) { ++ /* runtime setting is not supported */ ++ ret = -EINVAL; ++ } else { ++ adsp_card->ctr_if.eqz_switch[direction][index] = eqz_switch; ++ ret = 1; ++ } ++ ++ return ret; ++} ++ ++/** ************************************************************************** ++ * \brief Get info of Renderer output channel ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] uinfo Pointer to info structure of Renderer output channel ++ * \retval 0 Success ++ *****************************************************************************/ ++static int ++snd_adsp_control_rdr_out_channel_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 1; ++ uinfo->value.integer.min = MONAURAL; ++ uinfo->value.integer.max = STEREO; ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Get Renderer output channel's value ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] ucontrol Pointer to Renderer output channel value ++ * \retval 0 Success ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++static int ++snd_adsp_control_rdr_out_channel_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_adsp_card *adsp_card = snd_kcontrol_chip(kcontrol); ++ int rdr_out_ch; ++ unsigned int index; ++ int handle_state, handle_id; ++ ++ /* get the index */ ++ index = kcontrol->id.index; ++ ++ handle_state = XF_HANDLE_NULL; ++ handle_id = -1; ++ ++ /* determine handle state and handle ID */ ++ if (adsp_card->playback[index]) { ++ handle_state = adsp_card->playback[index]->rdr_state; ++ handle_id = adsp_card->playback[index]->renderer->handle_id; ++ } ++ ++ /* get Renderer output channel's value */ ++ if (COMPONENT_IS_READY(handle_state) == TRUE) { ++ /* get Renderer output channel's value from Renderer plugin */ ++ if (xf_adsp_get_param(handle_id, ++ XA_RDR_CONFIG_PARAM_OUT_CHANNELS, ++ &rdr_out_ch) != 0) { ++ return -EINVAL; ++ } ++ ++ ucontrol->value.integer.value[0] = rdr_out_ch; ++ } else { ++ ucontrol->value.integer.value[0] = ++ adsp_card->ctr_if.rdr_out_ch[index]; ++ } ++ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Set Renderer output channel's value ++ * ++ * \param[in] kcontrol Pointer to control instance ++ * \param[in] ucontrol Pointer to Renderer output channel value ++ * \retval 1 Success ++ * \retval -EINVAL Error ++ *****************************************************************************/ ++static int ++snd_adsp_control_rdr_out_channel_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_adsp_card *adsp_card = snd_kcontrol_chip(kcontrol); ++ unsigned int index; ++ int handle_state; ++ int ret = 1; ++ ++ /* get the index */ ++ index = kcontrol->id.index; ++ ++ handle_state = XF_HANDLE_NULL; ++ ++ /* determine handle state and handle ID */ ++ if (adsp_card->playback[index]) ++ handle_state = adsp_card->playback[index]->rdr_state; ++ ++ /* get Renderer output channel's value */ ++ if (COMPONENT_IS_READY(handle_state) == TRUE) ++ /* not support runtime setting */ ++ ret = -EINVAL; ++ else ++ adsp_card->ctr_if.rdr_out_ch[index] = ++ ucontrol->value.integer.value[0]; ++ ++ return ret; ++} ++ ++/** control interface for playback's volume rate */ ++/* PRQA S 3218 */ ++static struct snd_kcontrol_new ++snd_adsp_playback_volume_control[MAX_DAI_IDX - 1] = { ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX0, ++ .name = PLAYBACK_VOLUME_CTR_NAME, ++ .info = &snd_adsp_control_volume_info, ++ .get = &snd_adsp_control_volume_get, ++ .put = &snd_adsp_control_volume_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX1, ++ .name = PLAYBACK_VOLUME_CTR_NAME, ++ .info = &snd_adsp_control_volume_info, ++ .get = &snd_adsp_control_volume_get, ++ .put = &snd_adsp_control_volume_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX2, ++ .name = PLAYBACK_VOLUME_CTR_NAME, ++ .info = &snd_adsp_control_volume_info, ++ .get = &snd_adsp_control_volume_get, ++ .put = &snd_adsp_control_volume_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX3, ++ .name = PLAYBACK_VOLUME_CTR_NAME, ++ .info = &snd_adsp_control_volume_info, ++ .get = &snd_adsp_control_volume_get, ++ .put = &snd_adsp_control_volume_put ++ } ++}; ++ ++/** control interface for Capture's volume rate */ ++/* PRQA S 3218 1*/ ++static struct snd_kcontrol_new ++snd_adsp_capture_volume_control[MAX_DAI_IDX - 1] = { ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX0, ++ .name = CAPTURE_VOLUME_CTR_NAME, ++ .info = &snd_adsp_control_volume_info, ++ .get = &snd_adsp_control_volume_get, ++ .put = &snd_adsp_control_volume_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX1, ++ .name = CAPTURE_VOLUME_CTR_NAME, ++ .info = &snd_adsp_control_volume_info, ++ .get = &snd_adsp_control_volume_get, ++ .put = &snd_adsp_control_volume_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX2, ++ .name = CAPTURE_VOLUME_CTR_NAME, ++ .info = &snd_adsp_control_volume_info, ++ .get = &snd_adsp_control_volume_get, ++ .put = &snd_adsp_control_volume_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX3, ++ .name = CAPTURE_VOLUME_CTR_NAME, ++ .info = &snd_adsp_control_volume_info, ++ .get = &snd_adsp_control_volume_get, ++ .put = &snd_adsp_control_volume_put ++ } ++}; ++ ++/** control interface for playback's output sample rate */ ++/* PRQA S 3218 1*/ ++static struct snd_kcontrol_new ++snd_adsp_playback_sample_rate_out_control[MAX_DAI_IDX - 1] = { ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX0, ++ .name = PLAYBACK_OUT_RATE_CTR_NAME, ++ .info = &snd_adsp_control_sample_rate_info, ++ .get = &snd_adsp_control_sample_rate_get, ++ .put = &snd_adsp_control_sample_rate_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX1, ++ .name = PLAYBACK_OUT_RATE_CTR_NAME, ++ .info = &snd_adsp_control_sample_rate_info, ++ .get = &snd_adsp_control_sample_rate_get, ++ .put = &snd_adsp_control_sample_rate_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX2, ++ .name = PLAYBACK_OUT_RATE_CTR_NAME, ++ .info = &snd_adsp_control_sample_rate_info, ++ .get = &snd_adsp_control_sample_rate_get, ++ .put = &snd_adsp_control_sample_rate_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX3, ++ .name = PLAYBACK_OUT_RATE_CTR_NAME, ++ .info = &snd_adsp_control_sample_rate_info, ++ .get = &snd_adsp_control_sample_rate_get, ++ .put = &snd_adsp_control_sample_rate_put ++ } ++}; ++ ++/** control interface for Capture's input sample rate */ ++/* PRQA S 3218 */ ++static struct snd_kcontrol_new ++snd_adsp_capture_sample_rate_in_control[MAX_DAI_IDX - 1] = { ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX0, ++ .name = CAPTURE_IN_RATE_CTR_NAME, ++ .info = &snd_adsp_control_sample_rate_info, ++ .get = &snd_adsp_control_sample_rate_get, ++ .put = &snd_adsp_control_sample_rate_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX1, ++ .name = CAPTURE_IN_RATE_CTR_NAME, ++ .info = &snd_adsp_control_sample_rate_info, ++ .get = &snd_adsp_control_sample_rate_get, ++ .put = &snd_adsp_control_sample_rate_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX2, ++ .name = CAPTURE_IN_RATE_CTR_NAME, ++ .info = &snd_adsp_control_sample_rate_info, ++ .get = &snd_adsp_control_sample_rate_get, ++ .put = &snd_adsp_control_sample_rate_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX3, ++ .name = CAPTURE_IN_RATE_CTR_NAME, ++ .info = &snd_adsp_control_sample_rate_info, ++ .get = &snd_adsp_control_sample_rate_get, ++ .put = &snd_adsp_control_sample_rate_put ++ } ++}; ++ ++/** control interface for Equalizer parameters in playback */ ++/* PRQA S 3218 1*/ ++static struct snd_kcontrol_new ++snd_adsp_playback_equalizer_control[MAX_DAI_IDX - 1] = { ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX0, ++ .name = PLAYBACK_EQZ_CTR_NAME, ++ .info = &snd_adsp_control_eqz_info, ++ .get = &snd_adsp_control_eqz_get, ++ .put = &snd_adsp_control_eqz_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX1, ++ .name = PLAYBACK_EQZ_CTR_NAME, ++ .info = &snd_adsp_control_eqz_info, ++ .get = &snd_adsp_control_eqz_get, ++ .put = &snd_adsp_control_eqz_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX2, ++ .name = PLAYBACK_EQZ_CTR_NAME, ++ .info = &snd_adsp_control_eqz_info, ++ .get = &snd_adsp_control_eqz_get, ++ .put = &snd_adsp_control_eqz_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX3, ++ .name = PLAYBACK_EQZ_CTR_NAME, ++ .info = &snd_adsp_control_eqz_info, ++ .get = &snd_adsp_control_eqz_get, ++ .put = &snd_adsp_control_eqz_put ++ } ++}; ++ ++/** control interface for Equalizer parameters in record */ ++/* PRQA S 3218 */ ++static struct snd_kcontrol_new ++snd_adsp_capture_equalizer_control[MAX_DAI_IDX - 1] = { ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX0, ++ .name = CAPTURE_EQZ_CTR_NAME, ++ .info = &snd_adsp_control_eqz_info, ++ .get = &snd_adsp_control_eqz_get, ++ .put = &snd_adsp_control_eqz_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX1, ++ .name = CAPTURE_EQZ_CTR_NAME, ++ .info = &snd_adsp_control_eqz_info, ++ .get = &snd_adsp_control_eqz_get, ++ .put = &snd_adsp_control_eqz_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX2, ++ .name = CAPTURE_EQZ_CTR_NAME, ++ .info = &snd_adsp_control_eqz_info, ++ .get = &snd_adsp_control_eqz_get, ++ .put = &snd_adsp_control_eqz_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX3, ++ .name = CAPTURE_EQZ_CTR_NAME, ++ .info = &snd_adsp_control_eqz_info, ++ .get = &snd_adsp_control_eqz_get, ++ .put = &snd_adsp_control_eqz_put ++ } ++}; ++ ++/** control interface for Equalizer usage in playback */ ++/* PRQA S 3218 */ ++static struct snd_kcontrol_new ++snd_adsp_playback_equalizer_switch_control[MAX_DAI_IDX - 1] = { ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX0, ++ .name = PLAYBACK_EQZ_SWITCH_CTR_NAME, ++ .info = &snd_adsp_control_eqz_switch_info, ++ .get = &snd_adsp_control_eqz_switch_get, ++ .put = &snd_adsp_control_eqz_switch_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX1, ++ .name = PLAYBACK_EQZ_SWITCH_CTR_NAME, ++ .info = &snd_adsp_control_eqz_switch_info, ++ .get = &snd_adsp_control_eqz_switch_get, ++ .put = &snd_adsp_control_eqz_switch_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX2, ++ .name = PLAYBACK_EQZ_SWITCH_CTR_NAME, ++ .info = &snd_adsp_control_eqz_switch_info, ++ .get = &snd_adsp_control_eqz_switch_get, ++ .put = &snd_adsp_control_eqz_switch_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX3, ++ .name = PLAYBACK_EQZ_SWITCH_CTR_NAME, ++ .info = &snd_adsp_control_eqz_switch_info, ++ .get = &snd_adsp_control_eqz_switch_get, ++ .put = &snd_adsp_control_eqz_switch_put ++ } ++}; ++ ++/** control interface for Equalizer usage in record */ ++/* PRQA S 3218 1*/ ++static struct snd_kcontrol_new ++snd_adsp_capture_equalizer_switch_control[MAX_DAI_IDX - 1] = { ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX0, ++ .name = CAPTURE_EQZ_SWITCH_CTR_NAME, ++ .info = &snd_adsp_control_eqz_switch_info, ++ .get = &snd_adsp_control_eqz_switch_get, ++ .put = &snd_adsp_control_eqz_switch_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX1, ++ .name = CAPTURE_EQZ_SWITCH_CTR_NAME, ++ .info = &snd_adsp_control_eqz_switch_info, ++ .get = &snd_adsp_control_eqz_switch_get, ++ .put = &snd_adsp_control_eqz_switch_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX2, ++ .name = CAPTURE_EQZ_SWITCH_CTR_NAME, ++ .info = &snd_adsp_control_eqz_switch_info, ++ .get = &snd_adsp_control_eqz_switch_get, ++ .put = &snd_adsp_control_eqz_switch_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX3, ++ .name = CAPTURE_EQZ_SWITCH_CTR_NAME, ++ .info = &snd_adsp_control_eqz_switch_info, ++ .get = &snd_adsp_control_eqz_switch_get, ++ .put = &snd_adsp_control_eqz_switch_put ++ } ++}; ++ ++/** control interface for playback's output channel */ ++static struct snd_kcontrol_new ++snd_adsp_playback_out_channel_control[MAX_DAI_IDX - 1] = { ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .index = RDR_DAI_IDX0, ++ .name = PLAYBACK_OUT_CHANNEL_CTR_NAME, ++ .info = &snd_adsp_control_rdr_out_channel_info, ++ .get = &snd_adsp_control_rdr_out_channel_get, ++ .put = &snd_adsp_control_rdr_out_channel_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .index = RDR_DAI_IDX1, ++ .name = PLAYBACK_OUT_CHANNEL_CTR_NAME, ++ .info = &snd_adsp_control_rdr_out_channel_info, ++ .get = &snd_adsp_control_rdr_out_channel_get, ++ .put = &snd_adsp_control_rdr_out_channel_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .index = RDR_DAI_IDX2, ++ .name = PLAYBACK_OUT_CHANNEL_CTR_NAME, ++ .info = &snd_adsp_control_rdr_out_channel_info, ++ .get = &snd_adsp_control_rdr_out_channel_get, ++ .put = &snd_adsp_control_rdr_out_channel_put ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .index = RDR_DAI_IDX3, ++ .name = PLAYBACK_OUT_CHANNEL_CTR_NAME, ++ .info = &snd_adsp_control_rdr_out_channel_info, ++ .get = &snd_adsp_control_rdr_out_channel_get, ++ .put = &snd_adsp_control_rdr_out_channel_put ++ } ++}; ++ ++/** control interface for TDM playback's volume rate */ ++static struct snd_kcontrol_new snd_adsp_tdm_playback_volume_control = { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .name = TDM_PLAYBACK_VOLUME_CTR_NAME, ++ .info = &snd_adsp_control_volume_info, ++ .get = &snd_adsp_control_volume_get, ++ .put = &snd_adsp_control_volume_put ++}; ++ ++/** control interface for TDM capture's volume rate */ ++static struct snd_kcontrol_new snd_adsp_tdm_capture_volume_control = { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .name = TDM_CAPTURE_VOLUME_CTR_NAME, ++ .info = &snd_adsp_control_volume_info, ++ .get = &snd_adsp_control_volume_get, ++ .put = &snd_adsp_control_volume_put ++}; ++ ++/** control interface for TDM playback's output sample rate */ ++static struct snd_kcontrol_new snd_adsp_tdm_playback_sample_rate_out_control = { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .name = TDM_PLAYBACK_OUT_RATE_CTR_NAME, ++ .info = &snd_adsp_control_sample_rate_info, ++ .get = &snd_adsp_control_sample_rate_get, ++ .put = &snd_adsp_control_sample_rate_put ++}; ++ ++/** control interface for TDM capture's input sample rate */ ++static struct snd_kcontrol_new snd_adsp_tdm_capture_sample_rate_in_control = { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, /* PRQA S 1053 5 */ ++ .name = TDM_CAPTURE_IN_RATE_CTR_NAME, ++ .info = &snd_adsp_control_sample_rate_info, ++ .get = &snd_adsp_control_sample_rate_get, ++ .put = &snd_adsp_control_sample_rate_put ++}; ++ ++/** PCM callback function of the sound card */ ++static struct snd_pcm_ops snd_adsp_pcm_ops = { ++ .open = &snd_adsp_pcm_open, /* PRQA S 1053 10 */ ++ .close = &snd_adsp_pcm_close, ++ .ioctl = &snd_pcm_lib_ioctl, ++ .hw_params = &snd_adsp_pcm_hw_params, ++ .hw_free = &snd_adsp_pcm_hw_free, ++ .prepare = &snd_adsp_pcm_prepare, ++ .trigger = &snd_adsp_pcm_trigger, ++ .pointer = &snd_adsp_pcm_pointer, ++ .ack = &snd_adsp_pcm_ack ++}; ++ ++/******************************************************************* ++ * Internal functions ++ * ****************************************************************/ ++ ++/** ************************************************************************** ++ * \brief Process information get from control structure ++ * ++ * \param[in] eqz_params Equalizer parameters object ++ * \param[in] eqz_ctr_params Equalizer parameters stored in control object ++ * \param[in] flag Indicate playback or capture stream ++ *****************************************************************************/ ++static void snd_adsp_get_eqz_params_from_control( ++ struct xf_adsp_equalizer_params *eqz_params, ++ struct xf_adsp_equalizer_params *eqz_ctr_params, bool flag) ++{ ++ int filter_idx; ++ ++ if (flag) { ++ if (eqz_ctr_params->eqz_type >= 0) ++ eqz_params->eqz_type = eqz_ctr_params->eqz_type; ++ ++ for (filter_idx = 0; filter_idx < XA_REL_EQZ_FILTER_NUM; ++ filter_idx++) { ++ if (eqz_ctr_params->p_coef.fc[filter_idx] >= 0) ++ eqz_params->p_coef.fc[filter_idx] = ++ eqz_ctr_params->p_coef.fc[filter_idx]; ++ ++ if (eqz_ctr_params->p_coef.band_width[filter_idx] >= 0) ++ eqz_params->p_coef.band_width[filter_idx] = ++ eqz_ctr_params->p_coef.band_width[filter_idx]; ++ ++ if (eqz_ctr_params->p_coef.type[filter_idx] >= 0) ++ eqz_params->p_coef.type[filter_idx] = ++ eqz_ctr_params->p_coef.type[filter_idx]; ++ ++ if (eqz_ctr_params->p_coef.gain_base[filter_idx] >= 0) ++ eqz_params->p_coef.gain_base[filter_idx] = ++ eqz_ctr_params->p_coef.gain_base[filter_idx]; ++ ++ if (eqz_ctr_params->p_coef.gain[filter_idx] >= 0) ++ eqz_params->p_coef.gain[filter_idx] = ++ eqz_ctr_params->p_coef.gain[filter_idx]; ++ } ++ for (filter_idx = 0; filter_idx < XA_REL_EQZ_GRAPHIC_BAND_NUM; ++ filter_idx++) { ++ if (eqz_ctr_params->g_coef.gain_g[filter_idx] >= 0) ++ eqz_params->g_coef.gain_g[filter_idx] = ++ eqz_ctr_params->g_coef.gain_g[filter_idx]; ++ } ++ } else { ++ memcpy(eqz_ctr_params, eqz_params, sizeof(*eqz_params)); ++ } ++} ++ ++/******************************************************************* ++ * ALSA ADSP Platform driver interface ++ * ****************************************************************/ ++ ++/** **************************************************************************** ++ * \brief Register control interface and preallocate ALSA buffer ++ * ++ * \param[in] runtime Pointer to runtime PCM data ++ * \retval 0 Success ++ * \retval -EINVAL Cannot register control interface ++ ******************************************************************************/ ++static int snd_adsp_pcm_new(struct snd_soc_pcm_runtime *runtime) ++{ ++ int i = 0, err = 0; ++ int id; ++ struct snd_card *card; ++ struct snd_adsp_card *adsp_card; ++ int alsa_buf_sz = 0; ++ ++ /* get sound card data */ ++ card = runtime->card->snd_card; ++ ++ /* get driver data */ ++ adsp_card = snd_soc_dai_get_drvdata(runtime->cpu_dai); ++ ++ /* get the ID of CPU DAI */ ++ id = runtime->cpu_dai->id; ++ ++ /* register control interfaces */ ++ if (id == RDR_DAI_IDX0 || id == RDR_DAI_IDX1 || ++ id == RDR_DAI_IDX2 || id == RDR_DAI_IDX3) { ++ struct snd_kcontrol *kctl[RDR_CONTROL_NUM]; ++ void *rdr_ctr[RDR_CONTROL_NUM] = { ++ &snd_adsp_playback_volume_control[id], /* PRQA S 1031 */ ++ &snd_adsp_capture_volume_control[id], ++ &snd_adsp_playback_sample_rate_out_control[id], ++ &snd_adsp_capture_sample_rate_in_control[id], ++ &snd_adsp_playback_equalizer_control[id], ++ &snd_adsp_capture_equalizer_control[id], ++ &snd_adsp_playback_equalizer_switch_control[id], ++ &snd_adsp_capture_equalizer_switch_control[id], ++ &snd_adsp_playback_out_channel_control[id] ++ }; ++ ++ /* add basic control instance */ ++ for (i = 0; i < RDR_CONTROL_NUM; i++) { ++ kctl[i] = snd_ctl_new1(rdr_ctr[i], adsp_card); ++ err = snd_ctl_add(card, kctl[i]); ++ if (err < 0) ++ return -EINVAL; ++ } ++ ++ /* assign ALSA buffer size */ ++ alsa_buf_sz = MAX_BUFFER_BYTES; ++ ++ /* enable MIX feature from the 2nd playback/record stream */ ++ if (adsp_card->ctr_if.mix_usage == MIX_UNUSED) ++ adsp_card->ctr_if.mix_usage = FIRST_RUN; ++ else if (adsp_card->ctr_if.mix_usage == FIRST_RUN) ++ adsp_card->ctr_if.mix_usage = SECOND_RUN; ++ ++ } else { ++ struct snd_kcontrol *kctl[TDM_CONTROL_NUM]; ++ void *tdm_ctr[TDM_CONTROL_NUM] = { ++ &snd_adsp_tdm_playback_volume_control, ++ &snd_adsp_tdm_playback_sample_rate_out_control, ++ &snd_adsp_tdm_capture_volume_control, ++ &snd_adsp_tdm_capture_sample_rate_in_control ++ }; ++ ++ /* add basic control instances */ ++ for (i = 0; i < TDM_CONTROL_NUM; i++) { ++ kctl[i] = snd_ctl_new1(tdm_ctr[i], adsp_card); ++ err = snd_ctl_add(card, kctl[i]); ++ if (err < 0) ++ return -EINVAL; ++ } ++ ++ /* assign ALSA buffer size */ ++ alsa_buf_sz = TDM_MAX_BUFFER_BYTES; ++ } ++ ++ return snd_pcm_lib_preallocate_pages_for_all(runtime->pcm, ++ SNDRV_DMA_TYPE_CONTINUOUS, ++ snd_dma_continuous_data(GFP_KERNEL), ++ alsa_buf_sz, alsa_buf_sz); ++} ++ ++/* **************************************************************************** ++ * ALSA ADSP DAI register ++ * ***************************************************************************/ ++ ++/** callback function of platform driver */ ++static struct snd_soc_platform_driver snd_adsp_platform = { ++ .pcm_new = &snd_adsp_pcm_new, /* PRQA S 1053 *//* PRQA S 0674 */ ++ .ops = &snd_adsp_pcm_ops, ++}; ++ ++/** component information of driver */ ++static const struct snd_soc_component_driver snd_adsp_component = { ++ .name = "snd_adsp", /* PRQA S 1053 */ ++}; ++ ++/** DAI information of ADSP ALSA driver */ ++static struct snd_soc_dai_driver snd_adsp_dai[MAX_DAI_IDX] = { ++ { ++ /* PRQA S 1053 */ ++ .id = RDR_DAI_IDX0, ++ .name = "adsp-dai.0", ++ .playback.stream_name = "Playback0", ++ .capture.stream_name = "Capture0", ++ }, ++ { ++ .id = RDR_DAI_IDX1, ++ .name = "adsp-dai.1", ++ .playback.stream_name = "Playback1", ++ .capture.stream_name = "Capture1", ++ }, ++ { ++ .id = RDR_DAI_IDX2, ++ .name = "adsp-dai.2", ++ .playback.stream_name = "Playback2", ++ .capture.stream_name = "Capture2", ++ }, ++ { ++ .id = RDR_DAI_IDX3, ++ .name = "adsp-dai.3", ++ .playback.stream_name = "Playback3", ++ .capture.stream_name = "Capture3", ++ }, ++ { ++ .id = TDM_DAI_IDX, ++ .name = "adsp-tdm-dai", ++ .playback.stream_name = "TDM Playback", ++ .capture.stream_name = "TDM Capture", ++ } ++}; ++ ++/** *************************************************************************** ++ * \brief Register platform driver and ADSP ALSA sound card ++ * ++ * \param[in] pdev Pointer to platform driver data ++ * \retval 0 Success ++ * \retval -ENOMEM Cannot allocate driver's data ++ * \retval -EINVAL Cannot register platform driver or sound card ++ ****************************************************************************/ ++static int snd_adsp_probe(struct platform_device *pdev) ++{ ++ struct snd_adsp_card *adsp_card; ++ int i; ++ ++ /* allocate a card data structure */ ++ adsp_card = kmalloc(sizeof(*adsp_card), GFP_KERNEL); ++ if (!adsp_card) ++ return -ENOMEM; ++ ++ /* init parameters */ ++ memset(adsp_card, 0, sizeof(*adsp_card)); /* PRQA S 3200 */ ++ ++ /* PRQA S 3200 1*/ ++ memset(&adsp_card->ctr_if, -1, sizeof(struct snd_adsp_control)); ++ ++ /* disable Equalizer for all streams */ ++ for (i = 0; i < (MAX_DAI_IDX - 1); i++) { ++ adsp_card->ctr_if.eqz_switch[DIRECT_CAPTURE][i] = 0; ++ adsp_card->ctr_if.eqz_switch[DIRECT_PLAYBACK][i] = 0; ++ } ++ ++ /* disable MIX function for all */ ++ adsp_card->ctr_if.mix_usage = MIX_UNUSED; ++ ++ /* save driver data */ ++ dev_set_drvdata(&pdev->dev, adsp_card); ++ ++ /* register platform device */ ++ if (snd_soc_register_platform(&pdev->dev, &snd_adsp_platform) < 0) { ++ snd_soc_unregister_platform(&pdev->dev); ++ return -EINVAL; ++ } ++ ++ /* fill format information of sound DAI driver for Rdr/Cap function */ ++ for (i = 0; i < (MAX_DAI_IDX - 1); i++) { ++ snd_adsp_dai[i].playback.rates = SND_ADSP_SAMPLE_RATES; ++ snd_adsp_dai[i].playback.formats = SND_ADSP_PCM_WIDTHS; ++ snd_adsp_dai[i].playback.channels_min = MIN_CHANNEL; ++ snd_adsp_dai[i].playback.channels_max = MAX_CHANNEL; ++ ++ snd_adsp_dai[i].capture.rates = SND_ADSP_SAMPLE_RATES; ++ snd_adsp_dai[i].capture.formats = SND_ADSP_PCM_WIDTHS; ++ snd_adsp_dai[i].capture.channels_min = MIN_CHANNEL; ++ snd_adsp_dai[i].capture.channels_max = MAX_CHANNEL; ++ } ++ ++ /* fill format information of sound DAI driver for TDM function */ ++ snd_adsp_dai[i].playback.rates = SND_ADSP_SAMPLE_RATES; ++ snd_adsp_dai[i].playback.formats = SND_ADSP_PCM_WIDTHS; ++ snd_adsp_dai[i].playback.channels_min = TDM_MIN_CHANNEL; ++ snd_adsp_dai[i].playback.channels_max = TDM_MAX_CHANNEL; ++ ++ snd_adsp_dai[i].capture.rates = SND_ADSP_SAMPLE_RATES; ++ snd_adsp_dai[i].capture.formats = SND_ADSP_PCM_WIDTHS; ++ snd_adsp_dai[i].capture.channels_min = TDM_MIN_CHANNEL; ++ snd_adsp_dai[i].capture.channels_max = TDM_MAX_CHANNEL; ++ ++ /* register CPU dai */ ++ if (snd_soc_register_component(&pdev->dev, &snd_adsp_component, ++ snd_adsp_dai, ++ ARRAY_SIZE(snd_adsp_dai)) < 0) { ++ snd_soc_unregister_platform(&pdev->dev); ++ return -EINVAL; ++ } ++ ++ dev_info(&pdev->dev, "probed\n"); ++ ++ /* success */ ++ return 0; ++} ++ ++/** ************************************************************************** ++ * \brief Unregister platform driver and ADSP ALSA sound card ++ * ++ * \param[in] pdev Pointer platform driver data ++ * \retval 0 Success ++ * \retval -EINVAL Invalid driver's data ++ *****************************************************************************/ ++static int snd_adsp_remove(struct platform_device *pdev) ++{ ++ /* get ADSP sound card data */ ++ struct snd_adsp_card *adsp_card = dev_get_drvdata(&pdev->dev); ++ ++ if (!adsp_card) ++ return -ENODEV; ++ ++ /* release the ADSP sound card */ ++ kfree(adsp_card); ++ ++ /* unregister platform driver */ ++ snd_soc_unregister_component(&pdev->dev); ++ snd_soc_unregister_platform(&pdev->dev); ++ ++ /* success */ ++ return 0; ++} ++ ++/** ADSP ALSA driver information */ ++static const struct of_device_id snd_adsp_id[] = { ++ { .compatible = "renesas,rcar_adsp_sound_gen3", }, /* PRQA S 1053 */ ++}; ++MODULE_DEVICE_TABLE(of, snd_adsp_id); ++ ++/** platform driver of ADSP ALSA sound card */ ++static struct platform_driver snd_adsp_driver = { ++ .driver = { /* PRQA S 1053 */ ++ .name = "rcar_adsp_sound", ++ .of_match_table = snd_adsp_id, ++ }, ++ .probe = snd_adsp_probe, ++ .remove = snd_adsp_remove, ++}; ++module_platform_driver(snd_adsp_driver); /* PRQA S 0651 */ ++ ++MODULE_AUTHOR("Renesas AudioDSP"); ++MODULE_DESCRIPTION("Platform driver for ADSP"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:ADSP-PCM-AUDIO"); +diff --git a/sound/soc/adsp/xf-adsp-base.c b/sound/soc/adsp/xf-adsp-base.c +new file mode 100644 +index 0000000..3ad9445 +--- /dev/null ++++ b/sound/soc/adsp/xf-adsp-base.c +@@ -0,0 +1,2259 @@ ++/** *************************************************************************** ++ *\file xf-adsp-base.c ++ *\brief Source file for ADSP Base Control layer ++ *\addtogroup ADSP Driver ++ ****************************************************************************** ++ *\date Oct. 21, 2017 ++ *\author Renesas Electronics Corporation ++ ****************************************************************************** ++ *\par Copyright ++ * ++ * Copyright(c) 2016 Renesas Electoronics Corporation ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++ * copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ++ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN ++ * THE SOFTWARE. ++ ******************************************************************************/ ++ ++#include <linux/slab.h> ++#include <linux/kthread.h> ++#include <linux/wait.h> ++ ++#include "xf-adsp-base.h" ++ ++#define XF_AUX_POOL_SIZE (16) /**< size of auxiliary pool*/ ++#define XF_AUX_POOL_MSG_LENGTH (256) /**< size of auxiliary buffer */ ++ ++#define XF_PROXY_ALIGN (64) /**< proxy alignment */ ++ ++/** \def XF_ALIGNED(size) ++ * Get properly aligned buffer length ++ */ ++#define XF_ALIGNED(size)\ ++((((size) + XF_PROXY_ALIGN) - 1) & ~(XF_PROXY_ALIGN - 1)) /* PRQA S 3453 */ ++ ++#ifndef offset_of ++/** \def offset_of(type, member) ++ * Return the offset of member in type structuer in byte ++ */ ++#define offset_of(type, member) \ ++ ((int)(long int)&(((const type *)(0))->member)) /* PRQA S 3453 */ ++#endif ++ ++/************************************************* ++ * Variable and and function declaration ++ * **********************************************/ ++ ++/** ADSP base control data */ ++static struct xf_adsp_base *base; ++ ++/* function declaration */ ++static int xf_adsp_base_register_handle(void *private_data, ++ struct xf_callback_func *cb, ++ int comp_id); ++static inline struct xf_handle *xf_adsp_base_get_handle(int handle_id); ++static int xf_adsp_base_free_handle(int handle_id); ++static void xf_adsp_base_init_handle(void); ++static int xf_adsp_base_get_valid_handle(void); ++static int xf_send_and_receive(struct xf_message *msg); ++static int xf_response_thread(void *data); ++static void xf_buffer_put(struct xf_buffer *buffer); ++static u32 xf_buffer_length(struct xf_buffer *b); ++static struct xf_buffer *xf_buffer_get(struct xf_pool *pool); ++static void *xf_buffer_data(struct xf_buffer *b); ++static int xf_adsp_unregister(int comp_id); ++static int xf_adsp_register(char *name, int *comp_id); ++ ++/************************************************* ++ * Helper function to process pool data ++ * **********************************************/ ++ ++/** *********************************************************** ++ * \brief get buffer from given pool ++ * ++ * \param[in] pool Data pool address ++ * \retval b Pointer to buffer address in pool ++ **************************************************************/ ++static struct xf_buffer *xf_buffer_get(struct xf_pool *pool) ++{ ++ struct xf_buffer *b; ++ ++ b = pool->free; ++ if (b) { ++ pool->free = b->link.next; ++ b->link.pool = pool; ++ } ++ return b; ++} ++ ++/*********************************************************** ++ *\brief return buffer back to pool ++ * ++ *\param[in] buffer Pointer to the buffer data ++ ************************************************************/ ++static void xf_buffer_put(struct xf_buffer *buffer) ++{ ++ struct xf_pool *pool = buffer->link.pool; ++ ++ buffer->link.next = pool->free; ++ pool->free = buffer; ++} ++ ++/*********************************************************** ++ *\brief get the address of the given buffer data ++ * ++ *\param[in] b Pointer to the buffer data ++ *\retval address Address of buffer data ++ ************************************************************/ ++static void *xf_buffer_data(struct xf_buffer *b) ++{ ++ return b->address; ++} ++ ++/************************************************************ ++ *\brief get the length of the given buffer data ++ * ++ *\param[in] b Pointer to the buffer data ++ *\retval length Size of buffer data ++ ************************************************************/ ++static u32 xf_buffer_length(struct xf_buffer *b) /* PRQA S 3673 */ ++{ ++ return b->link.pool->length; ++} ++ ++/************************************************************ ++ *\brief set data to the given command message ++ * ++ *\param[out] m Pointer to the command message ++ *\param[in] id Message ID ++ *\param[in] opcode Message opcode ++ *\param[in] length Message length ++ *\param[in] buf Pointer to the buffer data ++ *\param[in] next Pointer to the next message ++ *\retval m Pointer to the command message ++ ************************************************************/ ++static inline struct xf_message * ++xf_create_msg(struct xf_message *m, u32 id, u32 opcode, u32 length, void *buf, ++ struct xf_message *next) ++{ ++ if (m) { ++ m->id = id; ++ m->opcode = opcode; ++ m->length = length; ++ m->buffer = buf; ++ m->next = next; ++ } ++ ++ return m; ++} ++ ++/***************************************************************** ++ *\brief synchronous send and wait for response message from proxy ++ * ++ *\param[in] msg Pointer to the command message ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ ****************************************************************/ ++static int xf_send_and_receive(struct xf_message *msg) ++{ ++ int err; ++ int opcode = msg->opcode; ++ ++ /* reset the base flag */ ++ spin_lock(&base->lock); ++ base->base_flag = FALSE; ++ spin_unlock(&base->lock); ++ ++ err = base->cmd.send(base->client, (void *)msg); ++ if (err != 0) ++ return err; ++ ++ /* sleep and wait for the response wake up event */ ++ if (wait_event_interruptible(base->base_wait, ++ base->base_flag || base->err_flag)) { ++ return -EINVAL; ++ } ++ ++ if (base->err_flag != 0) { ++ spin_lock(&base->lock); ++ base->err_flag = FALSE; ++ spin_unlock(&base->lock); ++ return -EINVAL; ++ } ++ ++ /* save the response message */ ++ /* PRQA S 3200 */ ++ memcpy(msg, &base->base_msg, sizeof(struct xf_message)); ++ ++ /* check if the reponsed message is right */ ++ if (msg->opcode != opcode) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++/************************************************************* ++ *\brief send a message to proxy ++ * ++ *\param[in] msg Pointer to the command message ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++static inline int xf_send(struct xf_message *msg) ++{ ++ return base->cmd.send(base->client, (void *)msg); ++} ++ ++/** *********************************************************** ++ *\brief receive message from proxy ++ * ++ *\param[in] msg Pointer to store the response message ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++static inline int xf_receive(struct xf_message *msg) ++{ ++ /* do not wait here */ ++ return base->cmd.recv(base->client, (void *)msg); ++} ++ ++/** *********************************************************** ++ *\brief thread for receive response data ++ **************************************************************/ ++static int xf_response_thread(void *data) ++{ ++ struct xf_message msg; ++ struct xf_handle *handle; ++ int id; ++ ++ /* set polling to wait the response message */ ++ spin_lock(&base->lock); ++ base->wait_flag = FALSE; ++ spin_unlock(&base->lock); ++ ++ while (!kthread_should_stop()) { ++ if (base->cmd.poll(base->client, &base->wait_flag) != 0) ++ continue; ++ ++ if (xf_receive(&msg) != 0) ++ continue; ++ ++ /* get the handle id */ ++ id = XF_AP_CLIENT(msg.id); ++ ++ /* check the destination of the response message */ ++ if (id == 0) { ++ /* message is from base control */ ++ /* PRQA S 3200 1*/ ++ memcpy(&base->base_msg, &msg, ++ sizeof(struct xf_message)); ++ ++ spin_lock(&base->lock); ++ base->base_flag = TRUE; ++ spin_unlock(&base->lock); ++ ++ wake_up(&base->base_wait); ++ continue; ++ } ++ ++ /* get handle data */ ++ handle = xf_adsp_base_get_handle(id); ++ ++ if (handle == 0) ++ continue; ++ ++ switch (msg.opcode) { ++ case XF_EMPTY_THIS_BUFFER: /* PRQA S 0594 */ ++ handle->cb->empty_buf_done(handle->private_data, ++ msg.opcode, ++ msg.length, ++ msg.buffer); ++ break; ++ case XF_FILL_THIS_BUFFER: /* PRQA S 0594 */ ++ handle->cb->fill_buf_done(handle->private_data, ++ msg.opcode, ++ msg.length, ++ msg.buffer); ++ break; ++ case XF_SET_PARAM: /* PRQA S 0594 4 */ ++ case XF_GET_PARAM: ++ case XF_ROUTE: ++ case XF_UNROUTE: ++ /* message is from base control */ ++ memcpy(&base->base_msg, &msg, ++ sizeof(struct xf_message)); /* PRQA S 3200 */ ++ ++ spin_lock(&base->lock); ++ base->base_flag = TRUE; ++ spin_unlock(&base->lock); ++ ++ wake_up(&base->base_wait); ++ break; ++ default: ++ /* error has occurred */ ++ handle->cb->event_handler(handle->private_data); ++ ++ xf_adsp_base_free_handle(id); /* PRQA S 3200 */ ++ ++ spin_lock(&base->lock); ++ base->err_flag = TRUE; ++ spin_unlock(&base->lock); ++ ++ wake_up(&base->base_wait); ++ break; ++ } ++ } ++ ++ pr_info("ADSP base thread was exited\n"); ++ ++ do_exit(0); ++ return 0; ++} ++ ++/************************************************************* ++ * \brief register component to ADSP ++ * ++ * \param[in] name Name string of component ++ * \param[out] comp_id Store the registered component ID ++ * \retval 0 Success ++ * \retval -EINVAL Failed ++ **************************************************************/ ++static int xf_adsp_register(char *name, int *comp_id) /* PRQA S 3673 */ ++{ ++ struct xf_message msg; ++ struct xf_buffer *b = xf_buffer_get(base->aux_pool); ++ int err = 0; ++ ++ msg.id = __XF_MSG_ID(__XF_AP_PROXY(0), __XF_DSP_PROXY(0)); ++ msg.opcode = XF_REGISTER; ++ msg.length = strlen(name) + 1; ++ msg.buffer = xf_buffer_data(b); ++ ++ /* copy identify name of ADSP component */ ++ if (msg.length <= xf_buffer_length(b)) ++ strncpy(msg.buffer, name, msg.length); /* PRQA S 3200 */ ++ else ++ strncpy(msg.buffer, name, xf_buffer_length(b));/* PRQA S 3200 */ ++ ++ err = xf_send_and_receive(&msg); ++ if (err != 0) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* save the registered component ID */ ++ *comp_id = XF_MSG_SRC(msg.id); ++ ++exit: ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ * \brief unregister component from ADSP ++ * \param[in] comp_id Registered component ID ++ * \retval 0 Success ++ * \retval -EINVAL Failed ++ **************************************************************/ ++static int xf_adsp_unregister(int comp_id) ++{ ++ struct xf_message msg; ++ ++ xf_create_msg(&msg, __XF_MSG_ID(__XF_AP_PROXY(0), comp_id), ++ XF_UNREGISTER, 0, NULL, NULL); /* PRQA S 3200 */ ++ ++ return xf_send_and_receive(&msg); ++} ++ ++/*************************************************************** ++ * APIs for ADSP component helper ++ * ************************************************************/ ++/** *********************************************************** ++ * \brief allocate memory pool from shared memory ++ * \param[in] pool_size Number of buffer need to allocate ++ * \param[in] buf_length Size of each buffer in bytes ++ * \retval pool Pointer to allocated pool ++ * \retval -EINVAL Invalid base data ++ * \retval -ENOMEM Out of memory resource ++ **************************************************************/ ++struct xf_pool *xf_adsp_allocate_mem_pool(int pool_size, int buf_length) ++{ ++ void *data; ++ u32 number; ++ struct xf_buffer *b; ++ struct xf_message msg; ++ struct xf_pool *pool; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base) ++ return ERR_PTR(-EINVAL); /* PRQA S 0306 */ ++ ++ xf_create_msg(&msg, __XF_MSG_ID(__XF_AP_PROXY(0), __XF_DSP_PROXY(0)), ++ XF_ALLOC, ++ buf_length * pool_size, NULL, NULL); /* PRQA S 3200 */ ++ ++ err = xf_send_and_receive(&msg); ++ if (err != 0) ++ return ERR_PTR(-ENOMEM); /* PRQA S 0306 */ ++ ++ /* PRQA S 0306 1 */ ++ pool = kmalloc(offset_of(struct xf_pool, buffer) + ++ (pool_size * sizeof(struct xf_buffer)), GFP_KERNEL); ++ ++ if (!pool) ++ return ERR_PTR(-ENOMEM); /* PRQA S 0306 */ ++ ++ pool->length = buf_length; ++ pool->number = pool_size; ++ pool->p = msg.buffer; ++ ++ number = pool_size; ++ for (pool->free = b = &pool->buffer[0], data = pool->p; ++ number > 0; number--, b++) { /* PRQA S 2462,3418,0489 */ ++ /* set address of the buffer */ ++ b->address = data; ++ ++ /* fill buffer into free list */ ++ if (number == 1) ++ b->link.next = NULL; ++ else ++ b->link.next = b + 1; /* PRQA S 0489 */ ++ ++ /* advance data pointer in contigous buffer */ ++ data += buf_length; /* PRQA S 0550 */ ++ } ++ ++ return pool; ++} ++ ++/** *********************************************************** ++ *\brief return memory to shared memory ++ *\param[in] pool Data pool address ++ *\retval 0 Success ++ *\retval -EINVAL Invalid base or pool data ++ **************************************************************/ ++int xf_adsp_free_mem_pool(struct xf_pool *pool) ++{ ++ struct xf_message msg; ++ ++ /* check the sane ADSP base pool data*/ ++ if (!base || !pool) ++ return -EINVAL; ++ ++ xf_create_msg(&msg, __XF_MSG_ID(__XF_AP_PROXY(0), __XF_DSP_PROXY(0)), ++ XF_FREE, pool->number * pool->length, ++ pool->p, NULL); /* PRQA S 3200 */ ++ ++ xf_send_and_receive(&msg); /* PRQA S 3200 */ ++ ++ kfree(pool); ++ ++ return 0; ++} ++ ++/** *********************************************************** ++ *\brief get buffer from given pool ++ * ++ *\param[in] pool Data pool address ++ *\param[in] index Buffer index ++ *\retval b Pointer to buffer address in pool ++ *\retval -EINVAL Invalid pool or index ++ **************************************************************/ ++char *xf_adsp_get_data_from_pool(struct xf_pool *pool, int index) ++{ ++ struct xf_buffer *buf[XF_BUF_POOL_SIZE] = {0}; ++ char *data; ++ int i; ++ ++ /* check the sane pool data*/ ++ if (!pool) ++ return ERR_PTR(-EINVAL); /* PRQA S 306 */ ++ ++ /* check the index is valid */ ++ if (index > (pool->number - 1)) ++ return ERR_PTR(-EINVAL); /* PRQA S 306 */ ++ ++ /* get buffer from pool */ ++ for (i = 0; i <= index; i++) ++ buf[i] = xf_buffer_get(pool); ++ ++ /* get data from buffer */ ++ data = xf_buffer_data(buf[index]); ++ ++ /* return buffer to pool */ ++ for (i = index; i >= 0; i--) ++ xf_buffer_put(buf[i]); ++ ++ return data; ++} ++ ++/** *********************************************************** ++ *\brief send empty this buffer command to ADSP framework ++ * ++ *\param[in] handle_id ID of the registered handle ++ *\param[in] buffer Pointer to data buffer ++ *\param[in] length Size of buffer in bytes ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++int xf_adsp_empty_this_buffer(int handle_id, char *buffer, int length) ++{ ++ struct xf_message msg; ++ struct xf_handle *handle; ++ ++ /* check the sane ADSP base data */ ++ if (!base) ++ return -EINVAL; ++ ++ handle = xf_adsp_base_get_handle(handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ /* submit message to port 0 of component */ ++ /* PRQA S 3200 2 */ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_EMPTY_THIS_BUFFER, length, buffer, NULL); ++ ++ xf_send(&msg); /* PRQA S 3200 */ ++ ++ return 0; ++} ++ ++/** *********************************************************** ++ *\brief send fill this buffer command to ADSP framework ++ * ++ *\param[in] handle_id ID of the registered handle ++ *\param[in] buffer Pointer to data buffer ++ *\param[in] length Size of buffer in bytes ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++int xf_adsp_fill_this_buffer(int handle_id, char *buffer, int length) ++{ ++ struct xf_message msg; ++ struct xf_handle *handle; ++ ++ /* check the sane ADSP base data */ ++ if (!base) ++ return -EINVAL; ++ ++ handle = xf_adsp_base_get_handle(handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ /* submit message to port 1 of component */ ++ /* PRQA S 3200 2 */ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 1)), ++ XF_FILL_THIS_BUFFER, length, buffer, NULL); ++ ++ xf_send(&msg); /* PRQA S 3200 */ ++ ++ return 0; ++} ++ ++/** *********************************************************** ++ *\brief route data between two registered ADSP plugins ++ * ++ *\param[in] src_handle_id Handle ID of source plugin ++ *\param[in] dst_handle_id Handle ID of sink plugin ++ *\param[in] buf_cnt Number of buffer in tunnel ++ *\param[in] buf_size Size of each buffer in tunnel ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++int ++xf_adsp_route(int src_handle_id, int dst_handle_id, int buf_cnt, int buf_size) ++{ ++ struct xf_route_port_msg *route_msg; ++ struct xf_message msg; ++ struct xf_buffer *b; ++ struct xf_handle *dst_handle, *src_handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base) ++ return -EINVAL; ++ ++ /* get handle data */ ++ dst_handle = xf_adsp_base_get_handle(dst_handle_id); ++ src_handle = xf_adsp_base_get_handle(src_handle_id); ++ ++ if (!dst_handle || !src_handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ route_msg = xf_buffer_data(b); ++ ++ /* route information */ ++ route_msg->dst = __XF_PORT_SPEC2(dst_handle->comp_id, 0); ++ route_msg->alloc_align = 4; ++ route_msg->alloc_number = buf_cnt; ++ route_msg->alloc_size = buf_size; ++ ++ /* PRQA S 3200 2*/ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, src_handle_id), ++ __XF_PORT_SPEC2(src_handle->comp_id, 1)), ++ XF_ROUTE, sizeof(*route_msg), route_msg, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief set a single parameter ++ * ++ *\param[in] handle_id ID of registered handle ++ *\param[in] index Sub-command index of parameter ++ *\param[in] value the setting value ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++int xf_adsp_set_param(int handle_id, int index, int value) ++{ ++ struct xf_message msg; ++ struct xf_buffer *b; ++ struct xf_set_param_msg *msg_params; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base) ++ return -EINVAL; ++ ++ handle = xf_adsp_base_get_handle(handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ msg_params = xf_buffer_data(b); ++ ++ msg_params->item[0].id = index; ++ msg_params->item[0].value = value; ++ ++ /* PRQA S 3200 2 */ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_SET_PARAM, XF_SET_PARAM_CMD_LEN(1), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief get a single parameter ++ * ++ *\param[in] handle_id ID of registered handle ++ *\param[in] index Sub-command index of parameter ++ *\param[out] value Store the getting value ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++int xf_adsp_get_param(int handle_id, int index, int *value) ++{ ++ struct xf_message msg; ++ struct xf_buffer *b; ++ union xf_get_param_msg *msg_params; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base and value data */ ++ if (!base || !value) ++ return -EINVAL; ++ ++ handle = xf_adsp_base_get_handle(handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ msg_params = xf_buffer_data(b); ++ ++ msg_params->c.id[0] = index; ++ ++ /* PRQA S 3200 2 */ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_GET_PARAM, XF_GET_PARAM_CMD_LEN(1), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ if (err != 0) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* save the received parameters */ ++ *value = msg_params->r.value[0]; ++ ++exit: ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/*************************************************** ++ * APIs for ADSP base control ++ * ************************************************/ ++ ++/** *********************************************************** ++ *\brief initialize ADSP base's instance ++ * ++ *\retval 0 Success ++ *\retval -EINVAL ADSP base's instance has been initialized ++ *\retval -ENOMEM Cannot allocate memory for ADSP base ++ *\retval -EBUSY Cannot register client to proxy ++ **************************************************************/ ++int xf_adsp_base_create(struct xf_adsp_base_cmd *cmd) ++{ ++ int err = 0; ++ ++ if (base != 0) ++ return -EINVAL; ++ ++ if (!cmd || !cmd->recv || !cmd->send || !cmd->poll || ++ !cmd->client_register || !cmd->client_unregister) ++ return -EINVAL; ++ ++ base = kmalloc(sizeof(*base), GFP_KERNEL); ++ if (!base) ++ return -ENOMEM; ++ ++ memset(base, 0, sizeof(struct xf_adsp_base)); /* PRQA S 3200 */ ++ ++ /* store the proxy command */ ++ memcpy(&base->cmd, cmd, sizeof(struct xf_adsp_base_cmd)); ++ ++ /* create client to connect from proxy driver */ ++ err = base->cmd.client_register(&base->client); ++ if (err != 0) ++ goto err3; /* PRQA S 2001 */ ++ ++ /* initialize waiting queue */ ++ init_waitqueue_head(&base->base_wait); ++ ++ /* initialize handle */ ++ xf_adsp_base_init_handle(); ++ ++ /* create thread to get the responsed message from proxy */ ++ base->rsp_thread = kthread_run(&xf_response_thread, ++ (void *)base, "adsp base"); ++ ++ if (base->rsp_thread != 0) { ++ pr_info("ADSP base thread has been started.\n"); ++ } else { ++ pr_info("Failed in create base thread\n"); ++ err = -ENOMEM; ++ goto err2; /* PRQA S 2001 */ ++ } ++ ++ /* allocate auxiliary pool for component usage */ ++ base->aux_pool = xf_adsp_allocate_mem_pool( ++ XF_AUX_POOL_SIZE, ++ XF_ALIGNED(XF_AUX_POOL_MSG_LENGTH)); ++ ++ if (IS_ERR(base->aux_pool)) { /* PRQA S 306 */ ++ err = -ENOMEM; ++ goto err1; /* PRQA S 2001 */ ++ } ++ ++ pr_info("ADSP base was created\n"); ++ return 0; ++ ++err1: ++ /* cancel the waitting queue */ ++ spin_lock(&base->lock); ++ base->wait_flag = TRUE; ++ spin_unlock(&base->lock); ++ ++ /* stop thread inadvance */ ++ kthread_stop(base->rsp_thread); ++ ++err2: ++ base->cmd.client_unregister(base->client); ++ ++err3: ++ kfree(base); ++ base = NULL; ++ ++ return err; ++} ++EXPORT_SYMBOL(xf_adsp_base_create); /* PRQA S 0651 */ ++ ++/** *********************************************************** ++ *\brief deinitialize ADSP base's instance ++ * ++ *\retval 0 Success ++ *\retval -EINVAL Invalid ADSP base's instance ++ **************************************************************/ ++int xf_adsp_base_destroy(void) ++{ ++ /* check the sane ADSP base data */ ++ if (!base) ++ return -EINVAL; ++ ++ /* free auxiliary pool to shared memory */ ++ xf_adsp_free_mem_pool(base->aux_pool); /* PRQA S 3200 */ ++ ++ /* cancel wait the response message, go to stop process */ ++ spin_lock(&base->lock); ++ base->wait_flag = TRUE; ++ spin_unlock(&base->lock); ++ ++ /* stop response thread */ ++ kthread_stop(base->rsp_thread); ++ ++ /* unregister client */ ++ base->cmd.client_unregister(base->client); ++ ++ kfree(base); ++ base = NULL; ++ ++ pr_info("ADSP base was destroyed\n"); ++ return 0; ++} ++EXPORT_SYMBOL(xf_adsp_base_destroy); /* PRQA S 0651 */ ++ ++/** *********************************************************** ++ * \brief initialize handle instance ++ **************************************************************/ ++static inline void xf_adsp_base_init_handle(void) ++{ ++ int i; ++ ++ for (i = 0; i < MAX_HANDLE; i++) ++ base->handle[i] = NULL; ++} ++ ++/** *********************************************************** ++ *\brief get the next available handle ID for register ++ * ++ *\retval -1 Unavailable handle ID ++ *\retval 0 to 255 Available handle ID ++ **************************************************************/ ++static inline int xf_adsp_base_get_valid_handle(void) ++{ ++ int id = -1; ++ int i; ++ ++ for (i = 0; i < MAX_HANDLE; i++) { ++ /* get the id of the first available handler */ ++ if (!base->handle[i]) { ++ id = i; ++ break; ++ } ++ } ++ ++ return id; ++} ++ ++/** *********************************************************** ++ *\brief register a handle instance for component usage ++ * ++ *\param[in] private_data Private data of this component ++ *\param[in] cb Callback function ++ *\param[in] comp_id ID of register component ++ *\retval id ID of registered handle ++ *\retval -EINVAL Cannot get the handle instance ++ *\retval -ENOMEM Cannot allocate handle memory ++ **************************************************************/ ++static int xf_adsp_base_register_handle(void *private_data, ++ struct xf_callback_func *cb, ++ int comp_id) ++{ ++ struct xf_handle *handle; ++ int id; ++ ++ /* get the next handle id */ ++ id = xf_adsp_base_get_valid_handle(); ++ ++ /* check available handle in base */ ++ if (id < 0) ++ return -EINVAL; ++ ++ /* allocate handle data */ ++ handle = kmalloc(sizeof(*handle), GFP_KERNEL); ++ if (!handle) ++ return -ENOMEM; ++ ++ /* save handle data */ ++ handle->private_data = private_data; ++ handle->cb = cb; ++ handle->comp_id = comp_id; ++ ++ /* save the hanle data */ ++ base->handle[id] = handle; ++ ++ /* return the id numbering in base handle */ ++ return (id + 1); ++} ++ ++/** *********************************************************** ++ *\brief get handle instance from handle ID ++ * ++ *\param[in] handle_id ID of registered handle ++ *\retval handle Pointer to handle instance ++ **************************************************************/ ++static inline struct xf_handle *xf_adsp_base_get_handle(int handle_id) ++{ ++ return base->handle[handle_id - 1]; ++} ++ ++/** *********************************************************** ++ *\brief free the registered handle instance ++ * ++ *\param[in] handle_id ID of registered handle ++ *\retval 0 Success ++ *\retval -EINVAL Invalid handle ID ++ **************************************************************/ ++static int xf_adsp_base_free_handle(int handle_id) ++{ ++ if (handle_id < 1 || handle_id > MAX_HANDLE) ++ return -EINVAL; ++ ++ kfree(base->handle[handle_id - 1]); ++ base->handle[handle_id - 1] = NULL; ++ ++ return 0; ++} ++ ++/*********************************************************************** ++ * APIs for Renderer component ++ * ********************************************************************/ ++ ++/** *********************************************************** ++ *\brief set ADSP Renderer parameters ++ * ++ *\param[in] renderer Pointer to Renderer component ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++int xf_adsp_renderer_set_params(struct xf_adsp_renderer *renderer) ++{ ++ struct xf_message msg; ++ struct xf_set_param_msg *msg_params; ++ struct xf_adsp_renderer_params *params; ++ struct xf_buffer *b; ++ int i; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !renderer) ++ return -EINVAL; ++ ++ params = &renderer->params; ++ ++ /* get Renderer's handle data */ ++ handle = xf_adsp_base_get_handle(renderer->handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ ++ msg_params = xf_buffer_data(b); ++ ++ i = 0; ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_SAMPLE_RATE; ++ msg_params->item[i++].value = params->in_rate; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_CHANNELS; ++ msg_params->item[i++].value = params->channel; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_PCM_WIDTH; ++ msg_params->item[i++].value = params->pcm_width; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_FRAME_SIZE; ++ msg_params->item[i++].value = params->frame_size; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_OUTPUT1; ++ msg_params->item[i++].value = params->dev1; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_OUTPUT2; ++ msg_params->item[i++].value = params->dev2; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_DMACHANNEL1; ++ msg_params->item[i++].value = params->dma1; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_DMACHANNEL2; ++ msg_params->item[i++].value = params->dma2; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ msg_params->item[i++].value = params->out_rate; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_VOLUME_RATE; ++ msg_params->item[i++].value = params->vol_rate; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_OUT_CHANNELS; ++ msg_params->item[i++].value = params->out_channel; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_MIX_CONTROL; ++ msg_params->item[i++].value = params->mix_ctrl; ++ ++ msg_params->item[i].id = XA_RDR_CONFIG_PARAM_STATE; ++ msg_params->item[i++].value = params->state; ++ ++ /* PRQA S 3200 2*/ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, renderer->handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_SET_PARAM, XF_SET_PARAM_CMD_LEN(i), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief get ADSP Renderer parameters ++ * ++ *\param[in] renderer Pointer to Renderer component ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++/* PRQA S 1505 */ ++int xf_adsp_renderer_get_params(struct xf_adsp_renderer *renderer) ++{ ++ struct xf_adsp_renderer_params *rdr_params; ++ struct xf_message msg; ++ struct xf_buffer *b; ++ union xf_get_param_msg *msg_params; ++ int i; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !renderer) ++ return -EINVAL; ++ ++ rdr_params = &renderer->params; ++ ++ /* get Renderer's handle data */ ++ handle = xf_adsp_base_get_handle(renderer->handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ msg_params = xf_buffer_data(b); ++ ++ i = 0; ++ /* PRQA S 3440 13 1*/ ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_SAMPLE_RATE; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_CHANNELS; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_PCM_WIDTH; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_FRAME_SIZE; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_OUTPUT1; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_OUTPUT2; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_DMACHANNEL1; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_DMACHANNEL2; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_VOLUME_RATE; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_OUT_CHANNELS; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_MIX_CONTROL; ++ msg_params->c.id[i++] = XA_RDR_CONFIG_PARAM_STATE; ++ ++ /* PRQA S 3200 2*/ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, renderer->handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_GET_PARAM, XF_GET_PARAM_CMD_LEN(i), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ if (err != 0) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* save the received parameters */ ++ i = 0; ++ rdr_params->in_rate = msg_params->r.value[i++]; /* PRQA S 3440 13 */ ++ rdr_params->channel = msg_params->r.value[i++]; ++ rdr_params->pcm_width = msg_params->r.value[i++]; ++ rdr_params->frame_size = msg_params->r.value[i++]; ++ rdr_params->dev1 = msg_params->r.value[i++]; ++ rdr_params->dev2 = msg_params->r.value[i++]; ++ rdr_params->dma1 = msg_params->r.value[i++]; ++ rdr_params->dma2 = msg_params->r.value[i++]; ++ rdr_params->out_rate = msg_params->r.value[i++]; ++ rdr_params->vol_rate = msg_params->r.value[i++]; ++ rdr_params->out_channel = msg_params->r.value[i++]; ++ rdr_params->mix_ctrl = msg_params->r.value[i++]; ++ rdr_params->state = msg_params->r.value[i++]; ++ ++exit: ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** ************************************************************************** ++ *\brief create Renderer component ++ * ++ *\param[in,out] renderer Pointer to the registered component ++ *\param[in] cb Callback function ++ *\param[in] private_data Private data ++ *\retval 0 Success ++ *\retval -EINVAL Invalid base instance or register fail ++ *\retval -ENOMEM Cannot allocate Renderer instance ++ *****************************************************************************/ ++int xf_adsp_renderer_create(struct xf_adsp_renderer **renderer, ++ struct xf_callback_func *cb, void *private_data) ++{ ++ struct xf_adsp_renderer *rdr; ++ int err; ++ int comp_id; ++ ++ /* check the sane ADSP base data */ ++ if (!base) ++ return -EINVAL; ++ ++ rdr = kmalloc(sizeof(*rdr), GFP_KERNEL); ++ if (!rdr) ++ return -ENOMEM; ++ ++ memset(rdr, 0, sizeof(struct xf_adsp_renderer)); /* PRQA S 3200 */ ++ ++ /* register renderer component */ ++ err = xf_adsp_register("renderer", &comp_id); ++ if (err != 0) ++ goto err2; /* PRQA S 2001 */ ++ ++ /* register Renderer to ADSP base control */ ++ rdr->handle_id = xf_adsp_base_register_handle(private_data, ++ cb, comp_id); ++ ++ if (rdr->handle_id <= 0) { ++ err = -EINVAL; ++ goto err1; /* PRQA S 2001 */ ++ } ++ ++ /* get the default parameter from Renderer plugin */ ++ err = xf_adsp_renderer_get_params(rdr); ++ if (err != 0) ++ goto err1; /* PRQA S 2001 */ ++ ++ /* save renderer compoent data */ ++ *renderer = rdr; ++ ++ return 0; ++ ++err1: ++ xf_adsp_unregister(comp_id); /* PRQA S 3200 */ ++ ++err2: ++ kfree(rdr); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief deinitialize ADSP Renderer component ++ * ++ *\param[in] renderer Pointer to Renderer component ++ *\retval 0 Success ++ *\retval -EINVAL Invalid base or Renderer data ++ **************************************************************/ ++/* PRQA S 3673 */ ++int xf_adsp_renderer_destroy(struct xf_adsp_renderer *renderer) ++{ ++ struct xf_handle *handle; ++ int handle_id; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !renderer) ++ return -EINVAL; ++ ++ handle_id = renderer->handle_id; ++ ++ handle = xf_adsp_base_get_handle(handle_id); ++ if (!handle) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* unregister component */ ++ xf_adsp_unregister(handle->comp_id); /* PRQA S 3200 */ ++ ++ /* free handle data from base control */ ++ xf_adsp_base_free_handle(handle_id); /* PRQA S 3200 */ ++ ++exit: ++ kfree(renderer); ++ ++ return 0; ++} ++ ++/*********************************************************************** ++ * APIs for Capture component ++ * ********************************************************************/ ++ ++/** *********************************************************** ++ *\brief set ADSP Capture parameters ++ * ++ *\param[in] capture Pointer to Capture component ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++int xf_adsp_capture_set_params(struct xf_adsp_capture *capture) ++{ ++ struct xf_message msg; ++ struct xf_set_param_msg *msg_params; ++ struct xf_adsp_capture_params *params; ++ struct xf_buffer *b; ++ int i; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !capture) ++ return -EINVAL; ++ ++ params = &capture->params; ++ ++ /* get Capture's handle data */ ++ handle = xf_adsp_base_get_handle(capture->handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ ++ msg_params = xf_buffer_data(b); ++ ++ i = 0; ++ msg_params->item[i].id = XA_CAP_CONFIG_PARAM_SAMPLE_RATE; ++ msg_params->item[i++].value = params->in_rate; ++ ++ msg_params->item[i].id = XA_CAP_CONFIG_PARAM_CHANNELS; ++ msg_params->item[i++].value = params->channel; ++ ++ msg_params->item[i].id = XA_CAP_CONFIG_PARAM_PCM_WIDTH; ++ msg_params->item[i++].value = params->pcm_width; ++ ++ msg_params->item[i].id = XA_CAP_CONFIG_PARAM_FRAME_SIZE; ++ msg_params->item[i++].value = params->frame_size; ++ ++ msg_params->item[i].id = XA_CAP_CONFIG_PARAM_INPUT1; ++ msg_params->item[i++].value = params->dev1; ++ ++ msg_params->item[i].id = XA_CAP_CONFIG_PARAM_INPUT2; ++ msg_params->item[i++].value = params->dev2; ++ ++ msg_params->item[i].id = XA_CAP_CONFIG_PARAM_DMACHANNEL1; ++ msg_params->item[i++].value = params->dma1; ++ ++ msg_params->item[i].id = XA_CAP_CONFIG_PARAM_DMACHANNEL2; ++ msg_params->item[i++].value = params->dma2; ++ ++ msg_params->item[i].id = XA_CAP_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ msg_params->item[i++].value = params->out_rate; ++ ++ msg_params->item[i].id = XA_CAP_CONFIG_PARAM_VOLUME_RATE; ++ msg_params->item[i++].value = params->vol_rate; ++ ++ msg_params->item[i].id = XA_CAP_CONFIG_PARAM_STATE; ++ msg_params->item[i++].value = params->state; ++ ++ /* PRQA S 3200 2 */ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, capture->handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_SET_PARAM, XF_SET_PARAM_CMD_LEN(i), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief get ADSP Capture parameters ++ * ++ *\param[in] capture Pointer to Capture component ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++/* PRQA S 1505 */ ++int xf_adsp_capture_get_params(struct xf_adsp_capture *capture) ++{ ++ struct xf_adsp_capture_params *cap_params; ++ struct xf_message msg; ++ struct xf_buffer *b; ++ union xf_get_param_msg *msg_params; ++ int i; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !capture) ++ return -EINVAL; ++ ++ cap_params = &capture->params; ++ ++ /* get Capture's handle data */ ++ handle = xf_adsp_base_get_handle(capture->handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ msg_params = xf_buffer_data(b); ++ ++ i = 0; ++ /* PRQA S 3440 11 1*/ ++ msg_params->c.id[i++] = XA_CAP_CONFIG_PARAM_SAMPLE_RATE; ++ msg_params->c.id[i++] = XA_CAP_CONFIG_PARAM_CHANNELS; ++ msg_params->c.id[i++] = XA_CAP_CONFIG_PARAM_PCM_WIDTH; ++ msg_params->c.id[i++] = XA_CAP_CONFIG_PARAM_FRAME_SIZE; ++ msg_params->c.id[i++] = XA_CAP_CONFIG_PARAM_INPUT1; ++ msg_params->c.id[i++] = XA_CAP_CONFIG_PARAM_INPUT2; ++ msg_params->c.id[i++] = XA_CAP_CONFIG_PARAM_DMACHANNEL1; ++ msg_params->c.id[i++] = XA_CAP_CONFIG_PARAM_DMACHANNEL2; ++ msg_params->c.id[i++] = XA_CAP_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ msg_params->c.id[i++] = XA_CAP_CONFIG_PARAM_VOLUME_RATE; ++ msg_params->c.id[i++] = XA_CAP_CONFIG_PARAM_STATE; ++ ++ /* PRQA S 3200 2 */ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, capture->handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_GET_PARAM, XF_GET_PARAM_CMD_LEN(i), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ if (err != 0) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* save the received parameters */ ++ i = 0; ++ cap_params->in_rate = msg_params->r.value[i++]; /* PRQA S 3440 11 */ ++ cap_params->channel = msg_params->r.value[i++]; ++ cap_params->pcm_width = msg_params->r.value[i++]; ++ cap_params->frame_size = msg_params->r.value[i++]; ++ cap_params->dev1 = msg_params->r.value[i++]; ++ cap_params->dev2 = msg_params->r.value[i++]; ++ cap_params->dma1 = msg_params->r.value[i++]; ++ cap_params->dma2 = msg_params->r.value[i++]; ++ cap_params->out_rate = msg_params->r.value[i++]; ++ cap_params->vol_rate = msg_params->r.value[i++]; ++ cap_params->state = msg_params->r.value[i++]; ++ ++exit: ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** ************************************************************************** ++ *\brief create Capture component ++ * ++ *\param[in,out] capture Pointer to the registered component ++ *\param[in] cb Callback function ++ *\param[in] private_data Private data ++ *\retval 0 Success ++ *\retval -EINVAL Invalid base instance or register fail ++ *\retval -ENOMEM Cannot allocate Capture instance ++ *****************************************************************************/ ++int xf_adsp_capture_create(struct xf_adsp_capture **capture, ++ struct xf_callback_func *cb, void *private_data) ++{ ++ struct xf_adsp_capture *cap; ++ int err; ++ int comp_id; ++ ++ /* check the sane ADSP base data */ ++ if (!base) ++ return -EINVAL; ++ ++ cap = kmalloc(sizeof(*cap), GFP_KERNEL); ++ if (!cap) ++ return -ENOMEM; ++ ++ memset(cap, 0, sizeof(struct xf_adsp_capture)); /* PRQA S 3200 */ ++ ++ /* register capture component */ ++ err = xf_adsp_register("capture", &comp_id); ++ if (err != 0) ++ goto err2; /* PRQA S 2001 */ ++ ++ /* register capture to ADSP base control */ ++ cap->handle_id = xf_adsp_base_register_handle(private_data, ++ cb, comp_id); ++ ++ if (cap->handle_id <= 0) { ++ err = -EINVAL; ++ goto err1; /* PRQA S 2001 */ ++ } ++ ++ /* get the default parameter from capture plugin */ ++ err = xf_adsp_capture_get_params(cap); ++ if (err != 0) ++ goto err1; /* PRQA S 2001 */ ++ ++ /* save capture compoent data */ ++ *capture = cap; ++ ++ return 0; ++ ++err1: ++ xf_adsp_unregister(comp_id); /* PRQA S 3200 */ ++ ++err2: ++ kfree(cap); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief deinitialize ADSP Capture component ++ * ++ *\param[in] capture Pointer to Capture component ++ *\retval 0 Success ++ *\retval -EINVAL Invalid base or Capture data ++ **************************************************************/ ++int xf_adsp_capture_destroy(struct xf_adsp_capture *capture) /* PRQA S 3673 */ ++{ ++ struct xf_handle *handle; ++ int handle_id; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !capture) ++ return -EINVAL; ++ ++ handle_id = capture->handle_id; ++ ++ handle = xf_adsp_base_get_handle(handle_id); ++ if (!handle) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* unregister component */ ++ xf_adsp_unregister(handle->comp_id); /* PRQA S 3200 */ ++ ++ /* free handle data from base control */ ++ xf_adsp_base_free_handle(handle_id); /* PRQA S 3200 */ ++ ++exit: ++ kfree(capture); ++ ++ return 0; ++} ++ ++/*********************************************************************** ++ * APIs for Equalizer component ++ * ********************************************************************/ ++ ++/** *********************************************************** ++ *\brief set ADSP Equalizer parameters ++ * ++ *\param[in] equalizer Pointer to Equalizer component ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++int xf_adsp_equalizer_set_params(struct xf_adsp_equalizer *equalizer) ++{ ++ struct xf_message msg; ++ struct xf_set_param_msg *msg_params; ++ struct xf_adsp_equalizer_params *params; ++ struct xf_buffer *b; ++ int i, n; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !equalizer) ++ return -EINVAL; ++ ++ params = &equalizer->params; ++ ++ /* get Equalizer's handle data */ ++ handle = xf_adsp_base_get_handle(equalizer->handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ ++ msg_params = xf_buffer_data(b); ++ ++ i = 0; ++ msg_params->item[i].id = XA_EQZ_CONFIG_PARAM_COEF_FS; ++ msg_params->item[i++].value = params->rate; ++ ++ msg_params->item[i].id = XA_EQZ_CONFIG_PARAM_CH; ++ msg_params->item[i++].value = params->channel; ++ ++ msg_params->item[i].id = XA_EQZ_CONFIG_PARAM_PCM_WIDTH; ++ msg_params->item[i++].value = params->pcm_width; ++ ++ msg_params->item[i].id = XA_EQZ_CONFIG_PARAM_EQZ_TYPE; ++ msg_params->item[i++].value = params->eqz_type; ++ ++ if (params->eqz_type == XA_REL_EQZ_TYPE_PARAMETRIC) { ++ struct xf_equalizer_parametric_coef *coef = ¶ms->p_coef; ++ ++ for (n = 0; n < XA_REL_EQZ_FILTER_NUM; n++) { ++ msg_params->item[i].id = ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_TYPE + n; ++ msg_params->item[i++].value = coef->type[n]; ++ ++ msg_params->item[i].id = ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_FC + n; ++ msg_params->item[i++].value = coef->fc[n]; ++ ++ msg_params->item[i].id = ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_BW + n; ++ msg_params->item[i++].value = coef->band_width[n]; ++ ++ msg_params->item[i].id = ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_GA + n; ++ msg_params->item[i++].value = coef->gain[n]; ++ ++ msg_params->item[i].id = ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_BA + n; ++ msg_params->item[i++].value = coef->gain_base[n]; ++ } ++ } else { ++ struct xf_equalizer_graphic_coef *coef = ¶ms->g_coef; ++ ++ for (n = 0; n < XA_REL_EQZ_GRAPHIC_BAND_NUM; n++) { ++ msg_params->item[i].id = ++ XA_EQZ_CONFIG_PARAM_BAND_0_GCOEF_GA + n; ++ msg_params->item[i++].value = coef->gain_g[n]; ++ } ++ } ++ ++ /* PRQA S 3200 2 */ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, equalizer->handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_SET_PARAM, XF_SET_PARAM_CMD_LEN(i), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief get ADSP Equalizer parameters ++ * ++ *\param[in] equalizer Pointer to Equalizer component ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++/* PRQA S 1505 1*/ ++int xf_adsp_equalizer_get_params(struct xf_adsp_equalizer *equalizer) ++{ ++ struct xf_adsp_equalizer_params *eqz_params; ++ struct xf_message msg; ++ struct xf_buffer *b; ++ union xf_get_param_msg *msg_params; ++ int i, n; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !equalizer) ++ return -EINVAL; ++ ++ eqz_params = &equalizer->params; ++ ++ /* get Equalizer's handle data */ ++ handle = xf_adsp_base_get_handle(equalizer->handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ msg_params = xf_buffer_data(b); ++ ++ i = 0; ++ msg_params->c.id[i++] = XA_EQZ_CONFIG_PARAM_COEF_FS; /* PRQA S 3440 4 */ ++ msg_params->c.id[i++] = XA_EQZ_CONFIG_PARAM_CH; ++ msg_params->c.id[i++] = XA_EQZ_CONFIG_PARAM_PCM_WIDTH; ++ msg_params->c.id[i++] = XA_EQZ_CONFIG_PARAM_EQZ_TYPE; ++ ++ for (n = 0; n < XA_REL_EQZ_FILTER_NUM; n++) { ++ /* PRQA S 3440 5 */ ++ msg_params->c.id[i++] = ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_TYPE + n; ++ ++ msg_params->c.id[i++] = ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_FC + n; ++ ++ msg_params->c.id[i++] = ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_BW + n; ++ ++ msg_params->c.id[i++] = ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_GA + n; ++ ++ msg_params->c.id[i++] = ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_BA + n; ++ } ++ ++ for (n = 0; n < XA_REL_EQZ_GRAPHIC_BAND_NUM; n++) ++ /* PRQA S 3440 1 */ ++ msg_params->c.id[i++] = XA_EQZ_CONFIG_PARAM_BAND_0_GCOEF_GA + n; ++ ++ /* PRQA S 3200 2 */ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, equalizer->handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_GET_PARAM, XF_GET_PARAM_CMD_LEN(i), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ if (err != 0) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* save the received parameters */ ++ i = 0; ++ eqz_params->rate = msg_params->r.value[i++]; /* PRQA S 3440 4 */ ++ eqz_params->channel = msg_params->r.value[i++]; ++ eqz_params->pcm_width = msg_params->r.value[i++]; ++ eqz_params->eqz_type = msg_params->r.value[i++]; ++ ++ for (n = 0; n < XA_REL_EQZ_FILTER_NUM; n++) { ++ /* PRQA S 3440 5 */ ++ eqz_params->p_coef.type[n] = msg_params->r.value[i++]; ++ eqz_params->p_coef.fc[n] = msg_params->r.value[i++]; ++ eqz_params->p_coef.band_width[n] = msg_params->r.value[i++]; ++ eqz_params->p_coef.gain[n] = msg_params->r.value[i++]; ++ eqz_params->p_coef.gain_base[n] = msg_params->r.value[i++]; ++ } ++ ++ for (n = 0; n < XA_REL_EQZ_GRAPHIC_BAND_NUM; n++) { ++ /* PRQA S 3440 1 */ ++ eqz_params->g_coef.gain_g[n] = msg_params->r.value[i++]; ++ } ++ ++exit: ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** ************************************************************************** ++ *\brief create Equalizer component ++ * ++ *\param[in,out] equalizer Pointer to the registered component ++ *\param[in] cb Callback function ++ *\param[in] private_data Private data ++ *\retval 0 Success ++ *\retval -EINVAL Invalid base instance or register fail ++ *\retval -ENOMEM Cannot allocate Equalier instance ++ *****************************************************************************/ ++int xf_adsp_equalizer_create(struct xf_adsp_equalizer **equalizer, ++ struct xf_callback_func *cb, void *private_data) ++{ ++ struct xf_adsp_equalizer *eqz; ++ int err; ++ int comp_id; ++ ++ /* check the sane ADSP base data */ ++ if (!base) ++ return -EINVAL; ++ ++ eqz = kmalloc(sizeof(*eqz), GFP_KERNEL); ++ if (!eqz) ++ return -ENOMEM; ++ ++ memset(eqz, 0, sizeof(struct xf_adsp_equalizer)); /* PRQA S 3200 */ ++ ++ /* register equalizer component */ ++ err = xf_adsp_register("equalizer", &comp_id); ++ if (err != 0) ++ goto err2; /* PRQA S 2001 */ ++ ++ /* register equalizer to ADSP base control */ ++ eqz->handle_id = xf_adsp_base_register_handle(private_data, ++ cb, comp_id); ++ ++ if (eqz->handle_id <= 0) { ++ err = -EINVAL; ++ goto err1; /* PRQA S 2001 */ ++ } ++ ++ /* get the default parameter from equalizer plugin */ ++ err = xf_adsp_equalizer_get_params(eqz); ++ if (err != 0) ++ goto err1; /* PRQA S 2001 */ ++ ++ /* save equalizer compoent data */ ++ *equalizer = eqz; ++ ++ return 0; ++ ++err1: ++ xf_adsp_unregister(comp_id); /* PRQA S 3200 */ ++ ++err2: ++ kfree(eqz); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief deinitialize ADSP Equalizer component ++ * ++ *\param[in] equalizer Pointer to Equalizer component ++ *\retval 0 Success ++ *\retval -EINVAL Invalid base or Equalizer data ++ **************************************************************/ ++/* PRQA S 3673 */ ++int xf_adsp_equalizer_destroy(struct xf_adsp_equalizer *equalizer) ++{ ++ struct xf_handle *handle; ++ int handle_id; ++ ++ /* check the sane ADSP base and Equalizer data */ ++ if (!base || !equalizer) ++ return -EINVAL; ++ ++ handle_id = equalizer->handle_id; ++ ++ handle = xf_adsp_base_get_handle(handle_id); ++ if (!handle) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* unregister component */ ++ xf_adsp_unregister(handle->comp_id); /* PRQA S 3200 */ ++ ++ /* free handle data from base control */ ++ xf_adsp_base_free_handle(handle_id); /* PRQA S 3200 */ ++ ++exit: ++ kfree(equalizer); ++ ++ return 0; ++} ++ ++/*********************************************************************** ++ * APIs for TDM Renderer component ++ * ********************************************************************/ ++ ++/** *********************************************************** ++ *\brief set ADSP TDM Renderer parameters ++ * ++ *\param[in] tdm_renderer Pointer to TDM Renderer component ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++int xf_adsp_tdm_renderer_set_params(struct xf_adsp_tdm_renderer *tdm_renderer) ++{ ++ struct xf_message msg; ++ struct xf_set_param_msg *msg_params; ++ struct xf_adsp_tdm_renderer_params *params; ++ struct xf_buffer *b; ++ int i; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !tdm_renderer) ++ return -EINVAL; ++ ++ params = &tdm_renderer->params; ++ ++ /* get TDM Renderer's handle data */ ++ handle = xf_adsp_base_get_handle(tdm_renderer->handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ ++ msg_params = xf_buffer_data(b); ++ ++ i = 0; ++ msg_params->item[i].id = XA_TDM_RDR_CONFIG_PARAM_IN_SAMPLE_RATE; ++ msg_params->item[i++].value = params->in_rate; ++ ++ msg_params->item[i].id = XA_TDM_RDR_CONFIG_PARAM_CHANNEL_MODE; ++ msg_params->item[i++].value = params->ch_mode; ++ ++ msg_params->item[i].id = XA_TDM_RDR_CONFIG_PARAM_PCM_WIDTH; ++ msg_params->item[i++].value = params->pcm_width; ++ ++ msg_params->item[i].id = XA_TDM_RDR_CONFIG_PARAM_FRAME_SIZE; ++ msg_params->item[i++].value = params->frame_size; ++ ++ msg_params->item[i].id = XA_TDM_RDR_CONFIG_PARAM_OUTPUT1; ++ msg_params->item[i++].value = params->dev1; ++ ++ msg_params->item[i].id = XA_TDM_RDR_CONFIG_PARAM_OUTPUT2; ++ msg_params->item[i++].value = params->dev2; ++ ++ msg_params->item[i].id = XA_TDM_RDR_CONFIG_PARAM_DMACHANNEL1; ++ msg_params->item[i++].value = params->dma1; ++ ++ msg_params->item[i].id = XA_TDM_RDR_CONFIG_PARAM_DMACHANNEL2; ++ msg_params->item[i++].value = params->dma2; ++ ++ msg_params->item[i].id = XA_TDM_RDR_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ msg_params->item[i++].value = params->out_rate; ++ ++ msg_params->item[i].id = XA_TDM_RDR_CONFIG_PARAM_VOLUME_RATE; ++ msg_params->item[i++].value = params->vol_rate; ++ ++ /* PRQA S 3200 2*/ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, tdm_renderer->handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_SET_PARAM, XF_SET_PARAM_CMD_LEN(i), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief get ADSP TDM Renderer parameters ++ * ++ *\param[in] tdm_renderer Pointer to TDM Renderer component ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++/* PRQA S 1505 1*/ ++int xf_adsp_tdm_renderer_get_params(struct xf_adsp_tdm_renderer *tdm_renderer) ++{ ++ struct xf_adsp_tdm_renderer_params *params; ++ struct xf_message msg; ++ struct xf_buffer *b; ++ union xf_get_param_msg *msg_params; ++ int i; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !tdm_renderer) ++ return -EINVAL; ++ ++ params = &tdm_renderer->params; ++ ++ /* get TDM Renderer's handle data */ ++ handle = xf_adsp_base_get_handle(tdm_renderer->handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ msg_params = xf_buffer_data(b); ++ ++ i = 0; ++ /* PRQA S 3440 13 1*/ ++ msg_params->c.id[i++] = XA_TDM_RDR_CONFIG_PARAM_IN_SAMPLE_RATE; ++ msg_params->c.id[i++] = XA_TDM_RDR_CONFIG_PARAM_CHANNEL_MODE; ++ msg_params->c.id[i++] = XA_TDM_RDR_CONFIG_PARAM_PCM_WIDTH; ++ msg_params->c.id[i++] = XA_TDM_RDR_CONFIG_PARAM_FRAME_SIZE; ++ msg_params->c.id[i++] = XA_TDM_RDR_CONFIG_PARAM_OUTPUT1; ++ msg_params->c.id[i++] = XA_TDM_RDR_CONFIG_PARAM_OUTPUT2; ++ msg_params->c.id[i++] = XA_TDM_RDR_CONFIG_PARAM_DMACHANNEL1; ++ msg_params->c.id[i++] = XA_TDM_RDR_CONFIG_PARAM_DMACHANNEL2; ++ msg_params->c.id[i++] = XA_TDM_RDR_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ msg_params->c.id[i++] = XA_TDM_RDR_CONFIG_PARAM_VOLUME_RATE; ++ ++ /* PRQA S 3200 2*/ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, tdm_renderer->handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_GET_PARAM, XF_GET_PARAM_CMD_LEN(i), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ if (err != 0) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* save the received parameters */ ++ i = 0; ++ params->in_rate = msg_params->r.value[i++]; /* PRQA S 3440 13 */ ++ params->ch_mode = msg_params->r.value[i++]; ++ params->pcm_width = msg_params->r.value[i++]; ++ params->frame_size = msg_params->r.value[i++]; ++ params->dev1 = msg_params->r.value[i++]; ++ params->dev2 = msg_params->r.value[i++]; ++ params->dma1 = msg_params->r.value[i++]; ++ params->dma2 = msg_params->r.value[i++]; ++ params->out_rate = msg_params->r.value[i++]; ++ params->vol_rate = msg_params->r.value[i++]; ++ ++exit: ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** ************************************************************************** ++ *\brief create TDM Renderer component ++ * ++ *\param[in,out] tdm_renderer Pointer to the registered component ++ *\param[in] cb Callback function ++ *\param[in] private_data Private data ++ *\retval 0 Success ++ *\retval -EINVAL Invalid base instance or register fail ++ *\retval -ENOMEM Cannot allocate Renderer instance ++ *****************************************************************************/ ++int xf_adsp_tdm_renderer_create(struct xf_adsp_tdm_renderer **tdm_renderer, ++ struct xf_callback_func *cb, ++ void *private_data) ++{ ++ struct xf_adsp_tdm_renderer *tdm_rdr; ++ int err; ++ int comp_id; ++ ++ /* check the sane ADSP base data */ ++ if (!base) ++ return -EINVAL; ++ ++ tdm_rdr = kmalloc(sizeof(*tdm_rdr), GFP_KERNEL); ++ if (!tdm_rdr) ++ return -ENOMEM; ++ ++ /* PRQA S 3200 */ ++ memset(tdm_rdr, 0, sizeof(struct xf_adsp_tdm_renderer)); ++ ++ /* register TDM Renderer component */ ++ err = xf_adsp_register("tdm-renderer", &comp_id); ++ if (err != 0) ++ goto err2; /* PRQA S 2001 */ ++ ++ /* register TDM Renderer to ADSP base control */ ++ tdm_rdr->handle_id = xf_adsp_base_register_handle(private_data, ++ cb, comp_id); ++ ++ if (tdm_rdr->handle_id <= 0) { ++ err = -EINVAL; ++ goto err1; /* PRQA S 2001 */ ++ } ++ ++ /* get the default parameter from plugin */ ++ err = xf_adsp_tdm_renderer_get_params(tdm_rdr); ++ if (err != 0) ++ goto err1; /* PRQA S 2001 */ ++ ++ /* save compoent data */ ++ *tdm_renderer = tdm_rdr; ++ ++ return 0; ++ ++err1: ++ xf_adsp_unregister(comp_id); /* PRQA S 3200 */ ++ ++err2: ++ kfree(tdm_rdr); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief deinitialize ADSP TDM Renderer component ++ * ++ *\param[in] tdm_renderer Pointer to TDM Renderer component ++ *\retval 0 Success ++ *\retval -EINVAL Invalid base or Renderer data ++ **************************************************************/ ++/* PRQA S 3673 1*/ ++int xf_adsp_tdm_renderer_destroy(struct xf_adsp_tdm_renderer *tdm_renderer) ++{ ++ struct xf_handle *handle; ++ int handle_id; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !tdm_renderer) ++ return -EINVAL; ++ ++ handle_id = tdm_renderer->handle_id; ++ ++ handle = xf_adsp_base_get_handle(handle_id); ++ if (!handle) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* unregister component */ ++ xf_adsp_unregister(handle->comp_id); /* PRQA S 3200 */ ++ ++ /* free handle data from base control */ ++ xf_adsp_base_free_handle(handle_id); /* PRQA S 3200 */ ++ ++exit: ++ kfree(tdm_renderer); ++ ++ return 0; ++} ++ ++/*********************************************************************** ++ * APIs for TDM Capture component ++ * ********************************************************************/ ++ ++/** *********************************************************** ++ *\brief set ADSP TDM Capture parameters ++ * ++ *\param[in] tdm_capture Pointer to TDM Capture component ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++int xf_adsp_tdm_capture_set_params(struct xf_adsp_tdm_capture *tdm_capture) ++{ ++ struct xf_message msg; ++ struct xf_set_param_msg *msg_params; ++ struct xf_adsp_tdm_capture_params *params; ++ struct xf_buffer *b; ++ int i; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !tdm_capture) ++ return -EINVAL; ++ ++ params = &tdm_capture->params; ++ ++ /* get TDM Capture's handle data */ ++ handle = xf_adsp_base_get_handle(tdm_capture->handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ ++ msg_params = xf_buffer_data(b); ++ ++ i = 0; ++ msg_params->item[i].id = XA_TDM_CAP_CONFIG_PARAM_IN_SAMPLE_RATE; ++ msg_params->item[i++].value = params->in_rate; ++ ++ msg_params->item[i].id = XA_TDM_CAP_CONFIG_PARAM_CHANNEL_MODE; ++ msg_params->item[i++].value = params->ch_mode; ++ ++ msg_params->item[i].id = XA_TDM_CAP_CONFIG_PARAM_PCM_WIDTH; ++ msg_params->item[i++].value = params->pcm_width; ++ ++ msg_params->item[i].id = XA_TDM_CAP_CONFIG_PARAM_FRAME_SIZE; ++ msg_params->item[i++].value = params->frame_size; ++ ++ msg_params->item[i].id = XA_TDM_CAP_CONFIG_PARAM_INPUT1; ++ msg_params->item[i++].value = params->dev1; ++ ++ msg_params->item[i].id = XA_TDM_CAP_CONFIG_PARAM_INPUT2; ++ msg_params->item[i++].value = params->dev2; ++ ++ msg_params->item[i].id = XA_TDM_CAP_CONFIG_PARAM_DMACHANNEL1; ++ msg_params->item[i++].value = params->dma1; ++ ++ msg_params->item[i].id = XA_TDM_CAP_CONFIG_PARAM_DMACHANNEL2; ++ msg_params->item[i++].value = params->dma2; ++ ++ msg_params->item[i].id = XA_TDM_CAP_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ msg_params->item[i++].value = params->out_rate; ++ ++ msg_params->item[i].id = XA_TDM_CAP_CONFIG_PARAM_VOLUME_RATE; ++ msg_params->item[i++].value = params->vol_rate; ++ ++ /* PRQA S 3200 2*/ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, tdm_capture->handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_SET_PARAM, XF_SET_PARAM_CMD_LEN(i), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief get ADSP TDM Capture parameters ++ * ++ *\param[in] tdm_capture Pointer to TDM Capture component ++ *\retval 0 Success ++ *\retval -EINVAL Failed ++ **************************************************************/ ++/* PRQA S 1505 1*/ ++int xf_adsp_tdm_capture_get_params(struct xf_adsp_tdm_capture *tdm_capture) ++{ ++ struct xf_adsp_tdm_capture_params *params; ++ struct xf_message msg; ++ struct xf_buffer *b; ++ union xf_get_param_msg *msg_params; ++ int i; ++ struct xf_handle *handle; ++ int err = 0; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !tdm_capture) ++ return -EINVAL; ++ ++ params = &tdm_capture->params; ++ ++ /* get TDM Capture's handle data */ ++ handle = xf_adsp_base_get_handle(tdm_capture->handle_id); ++ if (!handle) ++ return -EINVAL; ++ ++ b = xf_buffer_get(base->aux_pool); ++ msg_params = xf_buffer_data(b); ++ ++ i = 0; ++ /* PRQA S 3440 13 1*/ ++ msg_params->c.id[i++] = XA_TDM_CAP_CONFIG_PARAM_IN_SAMPLE_RATE; ++ msg_params->c.id[i++] = XA_TDM_CAP_CONFIG_PARAM_CHANNEL_MODE; ++ msg_params->c.id[i++] = XA_TDM_CAP_CONFIG_PARAM_PCM_WIDTH; ++ msg_params->c.id[i++] = XA_TDM_CAP_CONFIG_PARAM_FRAME_SIZE; ++ msg_params->c.id[i++] = XA_TDM_CAP_CONFIG_PARAM_INPUT1; ++ msg_params->c.id[i++] = XA_TDM_CAP_CONFIG_PARAM_INPUT2; ++ msg_params->c.id[i++] = XA_TDM_CAP_CONFIG_PARAM_DMACHANNEL1; ++ msg_params->c.id[i++] = XA_TDM_CAP_CONFIG_PARAM_DMACHANNEL2; ++ msg_params->c.id[i++] = XA_TDM_CAP_CONFIG_PARAM_OUT_SAMPLE_RATE; ++ msg_params->c.id[i++] = XA_TDM_CAP_CONFIG_PARAM_VOLUME_RATE; ++ ++ /* PRQA S 3200 2*/ ++ xf_create_msg(&msg, ++ __XF_MSG_ID(__XF_AP_CLIENT(0, tdm_capture->handle_id), ++ __XF_PORT_SPEC2(handle->comp_id, 0)), ++ XF_GET_PARAM, XF_GET_PARAM_CMD_LEN(i), msg_params, NULL); ++ ++ err = xf_send_and_receive(&msg); ++ if (err != 0) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* save the received parameters */ ++ i = 0; ++ params->in_rate = msg_params->r.value[i++]; /* PRQA S 3440 13 */ ++ params->ch_mode = msg_params->r.value[i++]; ++ params->pcm_width = msg_params->r.value[i++]; ++ params->frame_size = msg_params->r.value[i++]; ++ params->dev1 = msg_params->r.value[i++]; ++ params->dev2 = msg_params->r.value[i++]; ++ params->dma1 = msg_params->r.value[i++]; ++ params->dma2 = msg_params->r.value[i++]; ++ params->out_rate = msg_params->r.value[i++]; ++ params->vol_rate = msg_params->r.value[i++]; ++ ++exit: ++ /* return msg to pool */ ++ xf_buffer_put(b); ++ ++ return err; ++} ++ ++/** ************************************************************************** ++ *\brief create TDM Capture component ++ * ++ *\param[in,out] tdm_capture Pointer to the registered component ++ *\param[in] cb Callback function ++ *\param[in] private_data Private data ++ *\retval 0 Success ++ *\retval -EINVAL Invalid base instance or register fail ++ *\retval -ENOMEM Cannot allocate Renderer instance ++ *****************************************************************************/ ++int xf_adsp_tdm_capture_create(struct xf_adsp_tdm_capture **tdm_capture, ++ struct xf_callback_func *cb, void *private_data) ++{ ++ struct xf_adsp_tdm_capture *tdm_cap; ++ int err; ++ int comp_id; ++ ++ /* check the sane ADSP base data */ ++ if (!base) ++ return -EINVAL; ++ ++ tdm_cap = kmalloc(sizeof(*tdm_cap), GFP_KERNEL); ++ if (!tdm_cap) ++ return -ENOMEM; ++ ++ /* PRQA S 3200 */ ++ memset(tdm_cap, 0, sizeof(struct xf_adsp_tdm_capture)); ++ ++ /* register TDM Capture component */ ++ err = xf_adsp_register("tdm-capture", &comp_id); ++ if (err != 0) ++ goto err2; /* PRQA S 2001 */ ++ ++ /* register TDM Capture to ADSP base control */ ++ tdm_cap->handle_id = xf_adsp_base_register_handle(private_data, ++ cb, comp_id); ++ ++ if (tdm_cap->handle_id <= 0) { ++ err = -EINVAL; ++ goto err1; /* PRQA S 2001 */ ++ } ++ ++ /* get the default parameter from plugin */ ++ err = xf_adsp_tdm_capture_get_params(tdm_cap); ++ if (err != 0) ++ goto err1; /* PRQA S 2001 */ ++ ++ /* save compoent data */ ++ *tdm_capture = tdm_cap; ++ ++ return 0; ++ ++err1: ++ xf_adsp_unregister(comp_id); /* PRQA S 3200 */ ++ ++err2: ++ kfree(tdm_cap); ++ ++ return err; ++} ++ ++/** *********************************************************** ++ *\brief deinitialize ADSP TDM Capture component ++ * ++ *\param[in] tdm_capture Pointer to TDM Capture component ++ *\retval 0 Success ++ *\retval -EINVAL Invalid base or Renderer data ++ **************************************************************/ ++/* PRQA S 3673 */ ++int xf_adsp_tdm_capture_destroy(struct xf_adsp_tdm_capture *tdm_capture) ++{ ++ struct xf_handle *handle; ++ int handle_id; ++ ++ /* check the sane ADSP base data */ ++ if (!base || !tdm_capture) ++ return -EINVAL; ++ ++ handle_id = tdm_capture->handle_id; ++ ++ handle = xf_adsp_base_get_handle(handle_id); ++ if (!handle) ++ goto exit; /* PRQA S 2001 */ ++ ++ /* unregister component */ ++ xf_adsp_unregister(handle->comp_id); /* PRQA S 3200 */ ++ ++ /* free handle data from base control */ ++ xf_adsp_base_free_handle(handle_id); /* PRQA S 3200 */ ++ ++exit: ++ kfree(tdm_capture); ++ ++ return 0; ++} +diff --git a/sound/soc/adsp/xf-adsp-base.h b/sound/soc/adsp/xf-adsp-base.h +new file mode 100644 +index 0000000..27eb084 +--- /dev/null ++++ b/sound/soc/adsp/xf-adsp-base.h +@@ -0,0 +1,275 @@ ++/** ************************************************************************* ++ *\file xf-adsp-base.h ++ *\brief Header file for ADSP Base Control layer ++ *\addtogroup ADSP Driver ++ **************************************************************************** ++ *\date Oct. 21, 2017 ++ *\author Renesas Electronics Corporation ++ **************************************************************************** ++ *\par Copyright ++ * ++ * Copyright(c) 2016 Renesas Electoronics Corporation ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++ * copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ++ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN ++ * THE SOFTWARE. ++ ******************************************************************************/ ++ ++#ifndef __XF_ADSP_BASE_H ++#define __XF_ADSP_BASE_H ++ ++#include "xf-adsp-config.h" ++#include <adsp_drv/xf-adsp-drv-ext.h> ++ ++#define XF_BUF_POOL_SIZE (4) /**< number of buffer in a data pool */ ++ ++/**< maximum number of DSP component can be registered */ ++#define MAX_HANDLE (256) ++ ++/* define boolean */ ++#define TRUE (1) ++#define FALSE (0) ++ ++/** \struct xf_callback_func ++ * \brief callback function for ADSP's response message ++ */ ++struct xf_callback_func { ++ /** callback for empty buffer done message */ ++ int (*empty_buf_done)(void *data, int opcode, int length, char *buffer); ++ ++ /** callback for fill buffer done message */ ++ int (*fill_buf_done)(void *data, int opcode, int length, char *buffer); ++ ++ /** callback for event handler */ ++ int (*event_handler)(void *data); ++}; ++ ++/** \struct xf_adsp_renderer_params ++ * \brief parameter structure for Renderer component ++ */ ++struct xf_adsp_renderer_params { ++ int channel; /**< channel number */ ++ int pcm_width; /**< PCM width */ ++ int frame_size; /**< frame size */ ++ int in_rate; /**< input sampling rate */ ++ int out_rate; /**< output sampling rate */ ++ int vol_rate; /**< volume rate */ ++ int dev1; /**< 1st device index */ ++ int dev2; /**< 2nd device index */ ++ int dma1; /**< 1st DMA index */ ++ int dma2; /**< 2nd DMA index */ ++ int out_channel; /**< output channels */ ++ int mix_ctrl; /**< mix control flag */ ++ int state; /**< operation state */ ++}; ++ ++/** \struct xf_adsp_renderer ++ * \brief Renderer component structure ++ */ ++struct xf_adsp_renderer { ++ struct xf_adsp_renderer_params params; /**< parameter structure*/ ++ struct xf_pool *buf_pool; /**< buffer pool for data transfer */ ++ int handle_id; /**< ID of registered handle*/ ++}; ++ ++/** \struct xf_adsp_capture_params ++ *\brief parameter structure of Capture component ++ */ ++struct xf_adsp_capture_params { ++ int channel; /**< channel number */ ++ int pcm_width; /**< PCM width */ ++ int frame_size; /**< frame size */ ++ int in_rate; /**< input sampling rate */ ++ int out_rate; /**< output sampling rate */ ++ int vol_rate; /**< volume rate */ ++ int dev1; /**< 1st device index */ ++ int dev2; /**< 2nd device index */ ++ int dma1; /**< 1st DMA index */ ++ int dma2; /**< 2nd DMA index */ ++ int state; /**< operation state */ ++}; ++ ++/** \struct xf_adsp_capture ++ * \brief Capture component structure ++ */ ++struct xf_adsp_capture { ++ struct xf_adsp_capture_params params; /**< parameter structuer*/ ++ struct xf_pool *buf_pool; /**< buffer pool for data transfer */ ++ int handle_id; /**< ID of registered handle*/ ++}; ++ ++/** \struct xf_equalizer_parametric_coef ++ *\brief Parametric Equalizer type's parameters ++ */ ++struct xf_equalizer_parametric_coef { ++ int type[XA_REL_EQZ_FILTER_NUM]; /**< Filter type */ ++ int fc[XA_REL_EQZ_FILTER_NUM]; /**< Filter center frequency */ ++ int gain[XA_REL_EQZ_FILTER_NUM]; /**< Filter gain */ ++ int band_width[XA_REL_EQZ_FILTER_NUM]; /**< Filter band width */ ++ int gain_base[XA_REL_EQZ_FILTER_NUM]; /**< Filter base gain */ ++}; ++ ++/** \struct xf_equalizer_graphic_coef ++ * \brief Graphic Equalizer type's parameters ++ */ ++struct xf_equalizer_graphic_coef { ++ int gain_g[XA_REL_EQZ_GRAPHIC_BAND_NUM];/**< Graphic equalizer gain */ ++}; ++ ++/** \struct xf_adsp_equalizer_params ++ *\brief Equalizer parameters ++ */ ++struct xf_adsp_equalizer_params { ++ int channel; /**< channel number */ ++ int pcm_width; /**< PCM width */ ++ int rate; /**< sampling rate */ ++ int eqz_type; /**< Equalizer type */ ++ struct xf_equalizer_parametric_coef p_coef; /**< Parametric params */ ++ struct xf_equalizer_graphic_coef g_coef; /**< Graphic params */ ++}; ++ ++/** \struct xf_adsp_equalizer ++ * \brief Equalizer component's structure ++ */ ++struct xf_adsp_equalizer { ++ struct xf_adsp_equalizer_params params;/**< Equalizer parameters */ ++ struct xf_pool *buf_pool; /**< buffer pool for transfer data */ ++ int handle_id; /**< ID of registered handle */ ++}; ++ ++/** \struct xf_adsp_tdm_renderer_params ++ * \brief parameter structure for TDM Renderer component ++ */ ++struct xf_adsp_tdm_renderer_params { ++ int ch_mode; /**< channel mode */ ++ int pcm_width; /**< PCM width */ ++ int frame_size; /**< frame size */ ++ int in_rate; /**< input sampling rate */ ++ int out_rate; /**< output sampling rate */ ++ int vol_rate; /**< volume rate */ ++ int dev1; /**< 1st device index */ ++ int dev2; /**< 2nd device index */ ++ int dma1; /**< 1st DMA index */ ++ int dma2; /**< 2nd DMA index */ ++}; ++ ++/** \struct xf_adsp_tdm_renderer ++ * \brief TDM Renderer component structure ++ */ ++struct xf_adsp_tdm_renderer { ++ struct xf_adsp_tdm_renderer_params params; /**< parameter structure*/ ++ struct xf_pool *buf_pool; /**< buffer pool for data transfer */ ++ int handle_id; /**< ID of registered handle */ ++}; ++ ++/** \struct xf_adsp_tdm_capture_params ++ * \brief parameter structure for TDM Capture component ++ */ ++struct xf_adsp_tdm_capture_params { ++ int ch_mode; /**< channel mode */ ++ int pcm_width; /**< PCM width */ ++ int frame_size; /**< frame size */ ++ int in_rate; /**< input sampling rate */ ++ int out_rate; /**< output sampling rate */ ++ int vol_rate; /**< volume rate */ ++ int dev1; /**< 1st device index */ ++ int dev2; /**< 2nd device index */ ++ int dma1; /**< 1st DMA index */ ++ int dma2; /**< 2nd DMA index */ ++}; ++ ++/** \struct xf_adsp_tdm_capture ++ * \brief TDM Capture component structure ++ */ ++struct xf_adsp_tdm_capture { ++ struct xf_adsp_tdm_capture_params params; /**< parameter structure*/ ++ struct xf_pool *buf_pool; /**< buffer pool for data transfer */ ++ int handle_id; /**< ID of registered handle*/ ++}; ++ ++/** \struct xf_handle ++ * \brief Handle struct for each ADSP component ++ */ ++struct xf_handle { ++ int comp_id;/**< ADSP component ID */ ++ struct xf_callback_func *cb;/**< callback functions */ ++ void *private_data; /**< private data for callback functions*/ ++}; ++ ++/** \struct xf_adsp_base ++ * \brief Base component structure ++ */ ++struct xf_adsp_base { ++ struct xf_adsp_base_cmd cmd; /**< proxy commands */ ++ void *client; /**< client data which registered to proxy */ ++ struct xf_pool *aux_pool; /**< auxiliary buffer pool data */ ++ struct xf_handle *handle[MAX_HANDLE]; /**< handler data */ ++ struct task_struct *rsp_thread;/**< thread for response message*/ ++ wait_queue_head_t base_wait; /**< ADSP base's waiting queue */ ++ struct xf_message base_msg; /**< ADSP base's response message */ ++ int base_flag; /**< flag to control its waiting queue */ ++ int err_flag; /**< flag to indicate a error from plugins */ ++ int wait_flag; /**< flag to control the polling waiting*/ ++ spinlock_t lock; /**< spinlock data */ ++}; ++ ++struct xf_pool *xf_adsp_allocate_mem_pool(int pool_size, int buf_length); ++int xf_adsp_free_mem_pool(struct xf_pool *pool); ++char *xf_adsp_get_data_from_pool(struct xf_pool *pool, int index); ++ ++int xf_adsp_empty_this_buffer(int handle_id, char *buffer, int length); ++int xf_adsp_fill_this_buffer(int handle_id, char *buffer, int length); ++ ++int xf_adsp_route(int src_handle_id, int dst_handle_id ++ , int buf_cnt, int buf_size); ++ ++int xf_adsp_set_param(int handle_id, int index, int value); ++int xf_adsp_get_param(int handle_id, int index, int *value); ++ ++int xf_adsp_renderer_create(struct xf_adsp_renderer **renderer, ++ struct xf_callback_func *cb, void *private_data); ++int xf_adsp_renderer_destroy(struct xf_adsp_renderer *renderer); ++int xf_adsp_renderer_set_params(struct xf_adsp_renderer *renderer); ++int xf_adsp_renderer_get_params(struct xf_adsp_renderer *renderer); ++ ++int xf_adsp_capture_create(struct xf_adsp_capture **capture, ++ struct xf_callback_func *cb, void *private_data); ++int xf_adsp_capture_destroy(struct xf_adsp_capture *capture); ++int xf_adsp_capture_set_params(struct xf_adsp_capture *capture); ++int xf_adsp_capture_get_params(struct xf_adsp_capture *capture); ++ ++int xf_adsp_equalizer_create(struct xf_adsp_equalizer **equalizer, ++ struct xf_callback_func *cb, void *private_data); ++int xf_adsp_equalizer_destroy(struct xf_adsp_equalizer *equalizer); ++int xf_adsp_equalizer_set_params(struct xf_adsp_equalizer *equalizer); ++int xf_adsp_equalizer_get_params(struct xf_adsp_equalizer *equalizer); ++ ++int xf_adsp_tdm_renderer_create(struct xf_adsp_tdm_renderer **tdm_renderer, ++ struct xf_callback_func *cb, ++ void *private_data); ++int xf_adsp_tdm_renderer_destroy(struct xf_adsp_tdm_renderer *tdm_renderer); ++int xf_adsp_tdm_renderer_set_params(struct xf_adsp_tdm_renderer *tdm_renderer); ++int xf_adsp_tdm_renderer_get_params(struct xf_adsp_tdm_renderer *tdm_renderer); ++ ++int xf_adsp_tdm_capture_create(struct xf_adsp_tdm_capture **tdm_capture, ++ struct xf_callback_func *cb, ++ void *private_data); ++int xf_adsp_tdm_capture_destroy(struct xf_adsp_tdm_capture *tdm_capture); ++int xf_adsp_tdm_capture_set_params(struct xf_adsp_tdm_capture *tdm_capture); ++int xf_adsp_tdm_capture_get_params(struct xf_adsp_tdm_capture *tdm_capture); ++ ++#endif +diff --git a/sound/soc/adsp/xf-adsp-config.h b/sound/soc/adsp/xf-adsp-config.h +new file mode 100644 +index 0000000..818a46a +--- /dev/null ++++ b/sound/soc/adsp/xf-adsp-config.h +@@ -0,0 +1,604 @@ ++/** **************************************************************************** ++ *\file xf-adsp-config.h ++ *\brief Header file for ADSP configuration ++ *\addtogroup ADSP Driver ++ ******************************************************************************* ++ *\date Oct. 21, 2017 ++ *\author Renesas Electronics Corporation ++ ******************************************************************************* ++ *\par Copyright ++ * ++ * Copyright(c) 2016 Renesas Electoronics Corporation ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++ * copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ++ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN ++ * THE SOFTWARE. ++ ******************************************************************************/ ++ ++#ifndef __XF_ADSP_CONFIG_H ++#define __XF_ADSP_CONFIG_H ++ ++/* Equalizer definition */ ++#define XA_REL_EQZ_FILTER_NUM (9) /**< number of filter */ ++#define XA_REL_EQZ_GRAPHIC_BAND_NUM (5) /**< number of graphic band */ ++ ++struct xf_buffer { ++ void *address; ++ union { /* PRQA S 750 3 */ ++ struct xf_buffer *next; ++ struct xf_pool *pool; ++ } link; ++}; ++ ++struct xf_pool { ++ /* length of individual buffer in a pool */ ++ u32 length; ++ ++ /* number of buffer in a pool */ ++ u32 number; ++ ++ /* pointer to pool memory */ ++ void *p; ++ ++ /* pointer to first free buffer in a pool */ ++ struct xf_buffer *free; ++ ++ /* individual buffer */ ++ struct xf_buffer buffer[0]; /* PRQA S 1037 */ ++}; ++ ++struct xf_message { ++ /* pointer to the next item in the list */ ++ struct xf_message *next; ++ ++ /* shmem session_id */ ++ u32 id; ++ ++ /* operation code */ ++ u32 opcode; ++ ++ /* length of attached message buffer */ ++ u32 length; ++ ++ /* message buffer */ ++ void *buffer; ++}; ++ ++/******************************************************************************* ++ * XF_GET_PARAM message ++ ******************************************************************************/ ++ ++/* ...message body (command/response) */ ++union xf_get_param_msg { /* PRQA S 750 18 */ ++ /* ...command structure */ ++ struct { ++ /* ...array of parameters requested */ ++ u32 id[0]; /* PRQA S 1037 */ ++ ++ } __attribute__((__packed__)) c; ++ ++ /* ...response structure */ ++ struct { ++ /* ...array of parameters values */ ++ u32 value[0];/* PRQA S 1037 */ ++ ++ } __attribute__((__packed__)) r; ++ ++}; ++ ++/* ...length of the XF_GET_PARAM command/response */ ++/* PRQA S 3453 2 */ ++#define XF_GET_PARAM_CMD_LEN(params) (sizeof(u32) * (params)) ++#define XF_GET_PARAM_RSP_LEN(params) (sizeof(u32) * (params)) ++ ++/******************************************************************************* ++ * XF_SET_PARAM message ++ ******************************************************************************/ ++ ++/* ...component initialization parameter */ ++struct xf_set_param_item { ++ /* ...index of parameter passed to SET_CONFIG_PARAM call */ ++ u32 id; ++ ++ /* ...value of parameter */ ++ u32 value; ++ ++} __attribute__ ((__packed__)); ++ ++/* ...message body (no response message? - tbd) */ ++struct xf_set_param_msg { ++ /* ...command message */ ++ struct xf_set_param_item item[0]; /* PRQA S 1037 */ ++ ++} __attribute__ ((__packed__)); ++ ++/* ...length of the command message */ ++/* PRQA S 3453 */ ++#define XF_SET_PARAM_CMD_LEN(params) \ ++ (sizeof(struct xf_set_param_item) * (params)) ++ ++/******************************************************************************* ++ * XF_ROUTE definition ++ ******************************************************************************/ ++ ++/* ...port routing command */ ++struct xf_route_port_msg { ++ /* ...source port specification */ ++ u32 src; ++ ++ /* ...destination port specification */ ++ u32 dst; ++ ++ /* ...number of buffers to allocate */ ++ u32 alloc_number; ++ ++ /* ...length of buffer to allocate */ ++ u32 alloc_size; ++ ++ /* ...alignment restriction for a buffer */ ++ u32 alloc_align; ++ ++} __attribute__((__packed__)); ++ ++/******************************************************************************* ++ * XF_UNROUTE definition ++ ******************************************************************************/ ++ ++/* ...port unrouting command */ ++struct xf_unroute_port_msg { ++ /* ...source port specification */ ++ u32 src; ++ ++ /* ...destination port specification */ ++ u32 dst; ++ ++} __attribute__((__packed__)); ++ ++/* ...Capture states */ ++enum xa_capture_state { ++ XA_CAP_STATE_RUN = 0, ++ XA_CAP_STATE_IDLE = 1, ++ XA_CAP_STATE_PAUSE = 2 ++}; ++ ++/* ...Renderer states */ ++enum xa_renderer_state { ++ XA_RDR_STATE_RUN = 0, ++ XA_RDR_STATE_IDLE = 1, ++ XA_RDR_STATE_PAUSE = 2 ++}; ++ ++/******************************************************************************* ++ * Message routing composition - move somewhere else - tbd ++ ******************************************************************************/ ++ ++/* ...adjust IPC client of message going from user-space */ ++#define XF_MSG_AP_FROM_USER(id, client) \ ++ (((id) & ~(0xF << 2)) | ((client) << 2)) ++ ++/* ...wipe out IPC client from message going to user-space */ ++#define XF_MSG_AP_TO_USER(id) \ ++ ((id) & ~(0xF << 18)) ++ ++/* ...port specification (12 bits) */ ++#define __XF_PORT_SPEC(core, id, port) ((core) | ((id) << 2) | ((port) << 8)) ++#define __XF_PORT_SPEC2(id, port) ((id) | ((port) << 8)) ++#define XF_PORT_CORE(spec) ((spec) & 0x3) ++#define XF_PORT_CLIENT(spec) (((spec) >> 2) & 0x3F) ++#define XF_PORT_ID(spec) (((spec) >> 8) & 0xF) ++ ++/* ...message id contains source and destination ports specification */ ++#define __XF_MSG_ID(src, dst) (((src) & 0xFFFF) | (((dst) & 0xFFFF) << 16)) ++#define XF_MSG_SRC(id) (((id) >> 0) & 0xFFFF) ++#define XF_MSG_SRC_CORE(id) (((id) >> 0) & 0x3) ++#define XF_MSG_SRC_CLIENT(id) (((id) >> 2) & 0x3F) ++#define XF_MSG_SRC_PORT(id) (((id) >> 8) & 0xF) ++#define XF_MSG_SRC_PROXY(id) (((id) >> 15) & 0x1) ++#define XF_MSG_DST(id) (((id) >> 16) & 0xFFFF) ++#define XF_MSG_DST_CORE(id) (((id) >> 16) & 0x3) ++#define XF_MSG_DST_CLIENT(id) (((id) >> 18) & 0x3F) ++#define XF_MSG_DST_PORT(id) (((id) >> 24) & 0xF) ++#define XF_MSG_DST_PROXY(id) (((id) >> 31) & 0x1) ++ ++/* ...special treatment of AP-proxy destination field */ ++#define XF_AP_IPC_CLIENT(id) (((id) >> 18) & 0xF) ++#define XF_AP_CLIENT(id) (((id) >> 22) & 0x1FF) ++#define __XF_AP_PROXY(core) ((core) | 0x8000) ++#define __XF_DSP_PROXY(core) ((core) | 0x8000) ++#define __XF_AP_CLIENT(core, client) ((core) | ((client) << 6) | 0x8000) ++ ++/******************************************************************************* ++ * Opcode composition ++ ******************************************************************************/ ++ ++/* ...opcode composition with command/response data tags */ ++#define __XF_OPCODE(c, r, op) (((c) << 31) | ((r) << 30) | ((op) & 0x3F)) ++ ++/* ...accessors */ ++#define XF_OPCODE_CDATA(opcode) ((opcode) & (1 << 31)) ++#define XF_OPCODE_RDATA(opcode) ((opcode) & (1 << 30)) ++#define XF_OPCODE_TYPE(opcode) ((opcode) & (0x3F)) ++ ++/******************************************************************************* ++ * Opcode types ++ ******************************************************************************/ ++ ++/* ...unregister client */ ++#define XF_UNREGISTER __XF_OPCODE(0, 0, 0) ++ ++/* ...register client at proxy */ ++#define XF_REGISTER __XF_OPCODE(1, 0, 1) ++ ++/* ...port routing command */ ++#define XF_ROUTE __XF_OPCODE(1, 0, 2) ++ ++/* ...port unrouting command */ ++#define XF_UNROUTE __XF_OPCODE(1, 0, 3) ++ ++/* ...shared buffer allocation */ ++#define XF_ALLOC __XF_OPCODE(0, 0, 4) ++ ++/* ...shared buffer freeing */ ++#define XF_FREE __XF_OPCODE(0, 0, 5) ++ ++/* ...set component parameters */ ++#define XF_SET_PARAM __XF_OPCODE(1, 0, 6) ++ ++/* ...get component parameters */ ++#define XF_GET_PARAM __XF_OPCODE(1, 1, 7) ++ ++/* ...input buffer reception */ ++#define XF_EMPTY_THIS_BUFFER __XF_OPCODE(1, 0, 8) ++ ++/* ...output buffer reception */ ++#define XF_FILL_THIS_BUFFER __XF_OPCODE(0, 1, 9) ++ ++/* ...flush specific port */ ++#define XF_FLUSH __XF_OPCODE(0, 0, 10) ++ ++/* ...start component operation */ ++#define XF_START __XF_OPCODE(0, 0, 11) ++ ++/* ...stop component operation */ ++#define XF_STOP __XF_OPCODE(0, 0, 12) ++ ++/* ...pause component operation */ ++#define XF_PAUSE __XF_OPCODE(0, 0, 13) ++ ++/* ...resume component operation */ ++#define XF_RESUME __XF_OPCODE(0, 0, 14) ++ ++/* ...total amount of supported decoder commands */ ++#define __XF_OP_NUM (15) ++ ++/************************************************* ++ * Renderer - specific configuration parameters ++ * **********************************************/ ++ ++enum xa_config_param_renderer { ++ XA_RDR_CONFIG_PARAM_STATE = 0, ++ XA_RDR_CONFIG_PARAM_PCM_WIDTH = 1, ++ XA_RDR_CONFIG_PARAM_CHANNELS = 2, ++ XA_RDR_CONFIG_PARAM_SAMPLE_RATE = 3, ++ XA_RDR_CONFIG_PARAM_FRAME_SIZE = 4, ++ XA_RDR_CONFIG_PARAM_OUTPUT1 = 5, ++ XA_RDR_CONFIG_PARAM_DMACHANNEL1 = 6, ++ XA_RDR_CONFIG_PARAM_OUTPUT2 = 7, ++ XA_RDR_CONFIG_PARAM_DMACHANNEL2 = 8, ++ XA_RDR_CONFIG_PARAM_OUT_SAMPLE_RATE = 9, ++ XA_RDR_CONFIG_PARAM_VOLUME_RATE = 10, ++ XA_RDR_CONFIG_PARAM_OUT_CHANNELS = 11, ++ XA_RDR_CONFIG_PARAM_MIX_CONTROL = 12, ++ XA_RDR_CONFIG_PARAM_NUM = 13 ++}; ++ ++/************************************************* ++ * Capture - specific configuration parameters ++ * **********************************************/ ++ ++enum xa_config_param_capture { ++ XA_CAP_CONFIG_PARAM_CB = 0, ++ XA_CAP_CONFIG_PARAM_STATE = 1, ++ XA_CAP_CONFIG_PARAM_PCM_WIDTH = 2, ++ XA_CAP_CONFIG_PARAM_CHANNELS = 3, ++ XA_CAP_CONFIG_PARAM_SAMPLE_RATE = 4, ++ XA_CAP_CONFIG_PARAM_FRAME_SIZE = 5, ++ XA_CAP_CONFIG_PARAM_INPUT1 = 6, ++ XA_CAP_CONFIG_PARAM_DMACHANNEL1 = 7, ++ XA_CAP_CONFIG_PARAM_INPUT2 = 8, ++ XA_CAP_CONFIG_PARAM_DMACHANNEL2 = 9, ++ XA_CAP_CONFIG_PARAM_OUT_SAMPLE_RATE = 10, ++ XA_CAP_CONFIG_PARAM_VOLUME_RATE = 11, ++ XA_CAP_CONFIG_PARAM_NUM = 12 ++}; ++ ++/************************************************* ++ * Equalizer - specific configuration parameters ++ * **********************************************/ ++ ++enum xa_rel_eqz_filter_type { ++ XA_REL_EQZ_TYPE_THROUGH = 0, ++ XA_REL_EQZ_TYPE_PEAK = 1, ++ XA_REL_EQZ_TYPE_BASS = 2, ++ XA_REL_EQZ_TYPE_TREBLE = 3 ++}; ++ ++enum xa_rel_eqz_type { ++ XA_REL_EQZ_TYPE_PARAMETRIC = 0, ++ XA_REL_EQZ_TYPE_GRAPHIC = 1 ++}; ++ ++/*****************************************************************************/ ++/* Additional subcommand indices */ ++/*****************************************************************************/ ++ ++enum xa_add_cmd_type_generic { ++ /* XA_API_CMD_SET_CONFIG_PARAM indices */ ++ XA_EQZ_CONFIG_PARAM_COEF_FS = 0x0000, ++ XA_EQZ_CONFIG_PARAM_PCM_WIDTH = 0x0001, ++ XA_EQZ_CONFIG_PARAM_CH = 0x0002, ++ XA_EQZ_CONFIG_PARAM_EQZ_TYPE = 0x0003, ++ ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_FC = 0x0010, ++ XA_EQZ_CONFIG_PARAM_FILTER_1_COEF_FC = 0x0011, ++ XA_EQZ_CONFIG_PARAM_FILTER_2_COEF_FC = 0x0012, ++ XA_EQZ_CONFIG_PARAM_FILTER_3_COEF_FC = 0x0013, ++ XA_EQZ_CONFIG_PARAM_FILTER_4_COEF_FC = 0x0014, ++ XA_EQZ_CONFIG_PARAM_FILTER_5_COEF_FC = 0x0015, ++ XA_EQZ_CONFIG_PARAM_FILTER_6_COEF_FC = 0x0016, ++ XA_EQZ_CONFIG_PARAM_FILTER_7_COEF_FC = 0x0017, ++ XA_EQZ_CONFIG_PARAM_FILTER_8_COEF_FC = 0x0018, ++ ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_TYPE = 0x0020, ++ XA_EQZ_CONFIG_PARAM_FILTER_1_COEF_TYPE = 0x0021, ++ XA_EQZ_CONFIG_PARAM_FILTER_2_COEF_TYPE = 0x0022, ++ XA_EQZ_CONFIG_PARAM_FILTER_3_COEF_TYPE = 0x0023, ++ XA_EQZ_CONFIG_PARAM_FILTER_4_COEF_TYPE = 0x0024, ++ XA_EQZ_CONFIG_PARAM_FILTER_5_COEF_TYPE = 0x0025, ++ XA_EQZ_CONFIG_PARAM_FILTER_6_COEF_TYPE = 0x0026, ++ XA_EQZ_CONFIG_PARAM_FILTER_7_COEF_TYPE = 0x0027, ++ XA_EQZ_CONFIG_PARAM_FILTER_8_COEF_TYPE = 0x0028, ++ ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_BW = 0x0030, ++ XA_EQZ_CONFIG_PARAM_FILTER_1_COEF_BW = 0x0031, ++ XA_EQZ_CONFIG_PARAM_FILTER_2_COEF_BW = 0x0032, ++ XA_EQZ_CONFIG_PARAM_FILTER_3_COEF_BW = 0x0033, ++ XA_EQZ_CONFIG_PARAM_FILTER_4_COEF_BW = 0x0034, ++ XA_EQZ_CONFIG_PARAM_FILTER_5_COEF_BW = 0x0035, ++ XA_EQZ_CONFIG_PARAM_FILTER_6_COEF_BW = 0x0036, ++ XA_EQZ_CONFIG_PARAM_FILTER_7_COEF_BW = 0x0037, ++ XA_EQZ_CONFIG_PARAM_FILTER_8_COEF_BW = 0x0038, ++ ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_GA = 0x0040, ++ XA_EQZ_CONFIG_PARAM_FILTER_1_COEF_GA = 0x0041, ++ XA_EQZ_CONFIG_PARAM_FILTER_2_COEF_GA = 0x0042, ++ XA_EQZ_CONFIG_PARAM_FILTER_3_COEF_GA = 0x0043, ++ XA_EQZ_CONFIG_PARAM_FILTER_4_COEF_GA = 0x0044, ++ XA_EQZ_CONFIG_PARAM_FILTER_5_COEF_GA = 0x0045, ++ XA_EQZ_CONFIG_PARAM_FILTER_6_COEF_GA = 0x0046, ++ XA_EQZ_CONFIG_PARAM_FILTER_7_COEF_GA = 0x0047, ++ XA_EQZ_CONFIG_PARAM_FILTER_8_COEF_GA = 0x0048, ++ ++ XA_EQZ_CONFIG_PARAM_FILTER_0_COEF_BA = 0x0050, ++ XA_EQZ_CONFIG_PARAM_FILTER_1_COEF_BA = 0x0051, ++ XA_EQZ_CONFIG_PARAM_FILTER_2_COEF_BA = 0x0052, ++ XA_EQZ_CONFIG_PARAM_FILTER_3_COEF_BA = 0x0053, ++ XA_EQZ_CONFIG_PARAM_FILTER_4_COEF_BA = 0x0054, ++ XA_EQZ_CONFIG_PARAM_FILTER_5_COEF_BA = 0x0055, ++ XA_EQZ_CONFIG_PARAM_FILTER_6_COEF_BA = 0x0056, ++ XA_EQZ_CONFIG_PARAM_FILTER_7_COEF_BA = 0x0057, ++ XA_EQZ_CONFIG_PARAM_FILTER_8_COEF_BA = 0x0058, ++ ++ XA_EQZ_CONFIG_PARAM_BAND_0_GCOEF_GA = 0x0060, ++ XA_EQZ_CONFIG_PARAM_BAND_1_GCOEF_GA = 0x0061, ++ XA_EQZ_CONFIG_PARAM_BAND_2_GCOEF_GA = 0x0062, ++ XA_EQZ_CONFIG_PARAM_BAND_3_GCOEF_GA = 0x0063, ++ XA_EQZ_CONFIG_PARAM_BAND_4_GCOEF_GA = 0x0064 ++}; ++ ++/* ...tdm-renderer-specific configuration parameters */ ++enum xa_config_param_tdm_renderer { ++ XA_TDM_RDR_CONFIG_PARAM_PCM_WIDTH = 0, ++ XA_TDM_RDR_CONFIG_PARAM_CHANNEL_MODE = 1, ++ XA_TDM_RDR_CONFIG_PARAM_IN_SAMPLE_RATE = 2, ++ XA_TDM_RDR_CONFIG_PARAM_FRAME_SIZE = 3, ++ XA_TDM_RDR_CONFIG_PARAM_OUTPUT1 = 4, ++ XA_TDM_RDR_CONFIG_PARAM_DMACHANNEL1 = 5, ++ XA_TDM_RDR_CONFIG_PARAM_OUTPUT2 = 6, ++ XA_TDM_RDR_CONFIG_PARAM_DMACHANNEL2 = 7, ++ XA_TDM_RDR_CONFIG_PARAM_OUT_SAMPLE_RATE = 8, ++ XA_TDM_RDR_CONFIG_PARAM_VOLUME_RATE = 9 ++}; ++ ++enum xa_rel_tdm_renderer_channel_mode { ++ XA_TDM_RDR_CHANNEL_MODE_2X4 = 0, /**< 4 stereo TDM data */ ++ XA_TDM_RDR_CHANNEL_MODE_1X8 = 1, /**< 1 eight-channel TDM data*/ ++ /**< 1 six-channels plus 1 two-channels TDM data */ ++ XA_TDM_RDR_CHANNEL_MODE_6_2 = 2, ++ XA_TDM_RDR_CHANNEL_MODE_2X3 = 3, /**< 3 stereo TDM data */ ++ XA_TDM_RDR_CHANNEL_MODE_1X6 = 4 /**< 1 six-channel TDM data */ ++}; ++ ++/* ...TDM Capture-specific configuration parameters */ ++enum xa_config_param_tdm_capture { ++ XA_TDM_CAP_CONFIG_PARAM_PCM_WIDTH = 0, ++ XA_TDM_CAP_CONFIG_PARAM_CHANNEL_MODE = 1, ++ XA_TDM_CAP_CONFIG_PARAM_IN_SAMPLE_RATE = 2, ++ XA_TDM_CAP_CONFIG_PARAM_FRAME_SIZE = 3, ++ XA_TDM_CAP_CONFIG_PARAM_INPUT1 = 4, ++ XA_TDM_CAP_CONFIG_PARAM_DMACHANNEL1 = 5, ++ XA_TDM_CAP_CONFIG_PARAM_INPUT2 = 6, ++ XA_TDM_CAP_CONFIG_PARAM_DMACHANNEL2 = 7, ++ XA_TDM_CAP_CONFIG_PARAM_OUT_SAMPLE_RATE = 8, ++ XA_TDM_CAP_CONFIG_PARAM_VOLUME_RATE = 9 ++}; ++ ++enum xa_rel_tdm_capture_channel_mode { ++ XA_TDM_CAP_CHANNEL_MODE_2X4 = 0, /**< 4 stereo TDM data */ ++ XA_TDM_CAP_CHANNEL_MODE_1X8 = 1, /**< 1 eight-channel TDM data*/ ++ /**< 1 six-channels plus 1 two-channels TDM data */ ++ XA_TDM_CAP_CHANNEL_MODE_6_2 = 2, ++ XA_TDM_CAP_CHANNEL_MODE_2X3 = 3, /**< 3 stereo TDM data */ ++ XA_TDM_CAP_CHANNEL_MODE_1X6 = 4 /**< 1 six-channel TDM data */ ++}; ++ ++/*****************************************************************************/ ++/* HW supported */ ++/*****************************************************************************/ ++/* ...SSI modules supported by HW */ ++enum ssi_module { ++ SSI00 = 0, ++ SSI01 = 1, ++ SSI02 = 2, ++ SSI03 = 3, ++ SSI04 = 4, ++ SSI05 = 5, ++ SSI06 = 6, ++ SSI07 = 7, ++ SSI10 = 10, ++ SSI11 = 11, ++ SSI12 = 12, ++ SSI13 = 13, ++ SSI14 = 14, ++ SSI15 = 15, ++ SSI16 = 16, ++ SSI17 = 17, ++ SSI20 = 20, ++ SSI21 = 21, ++ SSI22 = 22, ++ SSI23 = 23, ++ SSI24 = 24, ++ SSI25 = 25, ++ SSI26 = 26, ++ SSI27 = 27, ++ SSI30 = 30, ++ SSI31 = 31, ++ SSI32 = 32, ++ SSI33 = 33, ++ SSI34 = 34, ++ SSI35 = 35, ++ SSI36 = 36, ++ SSI37 = 37, ++ SSI40 = 40, ++ SSI41 = 41, ++ SSI42 = 42, ++ SSI43 = 43, ++ SSI44 = 44, ++ SSI45 = 45, ++ SSI46 = 46, ++ SSI47 = 47, ++ SSI5 = 50, ++ SSI6 = 60, ++ SSI7 = 70, ++ SSI8 = 80, ++ SSI90 = 90, ++ SSI91 = 91, ++ SSI92 = 92, ++ SSI93 = 93, ++ SSI94 = 94, ++ SSI95 = 95, ++ SSI96 = 96, ++ SSI97 = 97 ++}; ++ ++/* ...SRC modules supported by HW */ ++enum src_module { ++ SRC0 = 110, /* SRC0 */ ++ SRC1 = 111, /* SRC1 */ ++ SRC2 = 112, /* SRC2 */ ++ SRC3 = 113, /* SRC3 */ ++ SRC4 = 114, /* SRC4 */ ++ SRC5 = 115, /* SRC5 */ ++ SRC6 = 116, /* SRC6 */ ++ SRC7 = 117, /* SRC7 */ ++ SRC8 = 118, /* SRC8 */ ++ SRC9 = 119, /* SRC9 */ ++ SRCMAX = 120 /* Maximum number of SRC modules */ ++}; ++ ++/* ...PDMA supported by HW */ ++enum { ++ PDMA_CH00 = 0, ++ PDMA_CH01 = 1, ++ PDMA_CH02 = 2, ++ PDMA_CH03 = 3, ++ PDMA_CH04 = 4, ++ PDMA_CH05 = 5, ++ PDMA_CH06 = 6, ++ PDMA_CH07 = 7, ++ PDMA_CH08 = 8, ++ PDMA_CH09 = 9, ++ PDMA_CH10 = 10, ++ PDMA_CH11 = 11, ++ PDMA_CH12 = 12, ++ PDMA_CH13 = 13, ++ PDMA_CH14 = 14, ++ PDMA_CH15 = 15, ++ PDMA_CH16 = 16, ++ PDMA_CH17 = 17, ++ PDMA_CH18 = 18, ++ PDMA_CH19 = 19, ++ PDMA_CH20 = 20, ++ PDMA_CH21 = 21, ++ PDMA_CH22 = 22, ++ PDMA_CH23 = 23, ++ PDMA_CH24 = 24, ++ PDMA_CH25 = 25, ++ PDMA_CH26 = 26, ++ PDMA_CH27 = 27, ++ PDMA_CH28 = 28, ++ PDMA_CHMAX = 29 ++}; ++ ++/* ...DMAC supported by HW */ ++enum { ++ ADMAC_CH00 = PDMA_CHMAX + 0, ++ ADMAC_CH01 = PDMA_CHMAX + 1, ++ ADMAC_CH02 = PDMA_CHMAX + 2, ++ ADMAC_CH03 = PDMA_CHMAX + 3, ++ ADMAC_CH04 = PDMA_CHMAX + 4, ++ ADMAC_CH05 = PDMA_CHMAX + 5, ++ ADMAC_CH06 = PDMA_CHMAX + 6, ++ ADMAC_CH07 = PDMA_CHMAX + 7, ++ ADMAC_CH08 = PDMA_CHMAX + 8, ++ ADMAC_CH09 = PDMA_CHMAX + 9, ++ ADMAC_CH10 = PDMA_CHMAX + 10, ++ ADMAC_CH11 = PDMA_CHMAX + 11, ++ ADMAC_CH12 = PDMA_CHMAX + 12, ++ ADMAC_CH13 = PDMA_CHMAX + 13, ++ ADMAC_CH14 = PDMA_CHMAX + 14, ++ ADMAC_CH15 = PDMA_CHMAX + 15, ++ ADMAC_CH16 = PDMA_CHMAX + 16, ++ ADMAC_CH17 = PDMA_CHMAX + 17, ++ ADMAC_CH18 = PDMA_CHMAX + 18, ++ ADMAC_CH19 = PDMA_CHMAX + 19, ++ ADMAC_CH20 = PDMA_CHMAX + 20, ++ ADMAC_CH21 = PDMA_CHMAX + 21, ++ ADMAC_CH22 = PDMA_CHMAX + 22, ++ ADMAC_CH23 = PDMA_CHMAX + 23, ++ ADMAC_CH24 = PDMA_CHMAX + 24, ++ ADMAC_CH25 = PDMA_CHMAX + 25, ++ ADMAC_CH26 = PDMA_CHMAX + 26, ++ ADMAC_CH27 = PDMA_CHMAX + 27, ++ ADMAC_CH28 = PDMA_CHMAX + 28, ++ ADMAC_CH29 = PDMA_CHMAX + 29, ++ ADMAC_CH30 = PDMA_CHMAX + 30, ++ ADMAC_CH31 = PDMA_CHMAX + 31, ++ ADMAC_CHMAX = PDMA_CHMAX + 32 ++}; ++ ++#endif +-- +2.7.4 + diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0003-ADSP-add-build-for-ADSP-sound-driver.patch b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0003-ADSP-add-build-for-ADSP-sound-driver.patch new file mode 100644 index 00000000..ecab4120 --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0003-ADSP-add-build-for-ADSP-sound-driver.patch @@ -0,0 +1,35 @@ +From 3ae5cb9feda031f660becc94f5496d5ee9b90e22 Mon Sep 17 00:00:00 2001 +From: tienphitran <tien.tran.uw@renesas.com> +Date: Mon, 15 Oct 2018 17:57:56 +0700 +Subject: [PATCH 3/6] ADSP: add build for ADSP sound driver + +Signed-off-by: tienphitran <tien.tran.uw@renesas.com> +--- + sound/soc/Kconfig | 1 + + sound/soc/Makefile | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig +index c0abad2067e1..f5f6abbd6e14 100644 +--- a/sound/soc/Kconfig ++++ b/sound/soc/Kconfig +@@ -71,6 +71,7 @@ source "sound/soc/txx9/Kconfig" + source "sound/soc/ux500/Kconfig" + source "sound/soc/xtensa/Kconfig" + source "sound/soc/zte/Kconfig" ++source "sound/soc/adsp/Kconfig" + + # Supported codecs + source "sound/soc/codecs/Kconfig" +diff --git a/sound/soc/Makefile b/sound/soc/Makefile +index bf8c1e2ce0bf..6e77abba2b01 100644 +--- a/sound/soc/Makefile ++++ b/sound/soc/Makefile +@@ -52,3 +52,4 @@ obj-$(CONFIG_SND_SOC) += txx9/ + obj-$(CONFIG_SND_SOC) += ux500/ + obj-$(CONFIG_SND_SOC) += xtensa/ + obj-$(CONFIG_SND_SOC) += zte/ ++obj-$(CONFIG_SND_SOC) += adsp/ +-- +2.19.1 + diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0004-ADSP-integrate-ADSP-sound-for-H3-M3-M3N-board.patch b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0004-ADSP-integrate-ADSP-sound-for-H3-M3-M3N-board.patch new file mode 100644 index 00000000..6d95d65f --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0004-ADSP-integrate-ADSP-sound-for-H3-M3-M3N-board.patch @@ -0,0 +1,185 @@ +From 825517f3f8ebe551d297db16e4582c0eae646f05 Mon Sep 17 00:00:00 2001 +From: tienphitran <tien.tran.uw@renesas.com> +Date: Wed, 31 Oct 2018 16:12:36 +0700 +Subject: [PATCH 4/6] ADSP: integrate ADSP sound for H3, M3, M3N board + +Signed-off-by: tienphitran <tien.tran.uw@renesas.com> +[takeshi.kihara.df: fix W=1 dtc warning] +Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> +--- + arch/arm64/boot/dts/renesas/r8a7795.dtsi | 5 ++ + arch/arm64/boot/dts/renesas/r8a7796.dtsi | 5 ++ + arch/arm64/boot/dts/renesas/r8a77965.dtsi | 5 ++ + .../boot/dts/renesas/salvator-common.dtsi | 84 +++++++++++++++++-- + 4 files changed, 94 insertions(+), 5 deletions(-) + +diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi +index 1896e5250dff..8dfda0fda91c 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi +@@ -793,6 +793,11 @@ + method = "smc"; + }; + ++ rcar_adsp_sound: adsp_sound { ++ compatible = "renesas,rcar_adsp_sound_gen3"; ++ status = "disabled"; ++ }; ++ + /* External SCIF clock - to be overridden by boards that provide it */ + scif_clk: scif { + compatible = "fixed-clock"; +diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi +index c00d1da64198..726c0d07fe59 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi +@@ -798,6 +798,11 @@ + method = "smc"; + }; + ++ rcar_adsp_sound: adsp_sound { ++ compatible = "renesas,rcar_adsp_sound_gen3"; ++ status = "disabled"; ++ }; ++ + /* External SCIF clock - to be overridden by boards that provide it */ + scif_clk: scif { + compatible = "fixed-clock"; +diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi +index 454a67b132f4..799b005ade92 100644 +--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi +@@ -227,6 +227,11 @@ + method = "smc"; + }; + ++ rcar_adsp_sound: adsp_sound { ++ compatible = "renesas,rcar_adsp_sound_gen3"; ++ status = "disabled"; ++ }; ++ + /* External SCIF clock - to be overridden by boards that provide it */ + scif_clk: scif { + compatible = "fixed-clock"; +diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi +index 922b9cc4797c..2c1d49c4bcaa 100644 +--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi ++++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi +@@ -153,11 +153,27 @@ + }; + + sound_card: sound { +- compatible = "audio-graph-card"; ++ compatible = "audio-graph-scu-card"; + + label = "rcar-sound"; + +- dais = <&rsnd_port0>; ++ prefix = "ak4613"; ++ routing = "ak4613 Playback", "Playback0", ++ "ak4613 Playback", "Playback1", ++ "ak4613 Playback", "Playback2", ++ "ak4613 Playback", "Playback3", ++ "Capture0", "ak4613 Capture", ++ "Capture1", "ak4613 Capture", ++ "Capture2", "ak4613 Capture", ++ "Capture3", "ak4613 Capture", ++ "ak4613 Playback", "DAI0 Playback", ++ "DAI0 Capture", "ak4613 Capture"; ++ ++ dais = <&adsp_port0 ++ &adsp_port1 ++ &adsp_port2 ++ &adsp_port3 ++ &rsnd_port0>; + }; + + vbus0_usb2: regulator-vbus0-usb2 { +@@ -419,8 +435,27 @@ + asahi-kasei,out5-single-end; + asahi-kasei,out6-single-end; + +- port { +- ak4613_endpoint: endpoint { ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ak4613_endpoint0: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&adsp_endpoint0>; ++ }; ++ ak4613_endpoint1: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&adsp_endpoint1>; ++ }; ++ ak4613_endpoint2: endpoint@2 { ++ reg = <2>; ++ remote-endpoint = <&adsp_endpoint2>; ++ }; ++ ak4613_endpoint3: endpoint@3 { ++ reg = <3>; ++ remote-endpoint = <&adsp_endpoint3>; ++ }; ++ ak4613_endpoint4: endpoint@4 { ++ reg = <4>; + remote-endpoint = <&rsnd_endpoint0>; + }; + }; +@@ -731,6 +766,45 @@ + status = "okay"; + }; + ++&rcar_adsp_sound { ++ status = "okay"; ++ /* Multiple DAI */ ++ #sound-dai-cells = <1>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ adsp_port0: port@0 { ++ reg = <0>; ++ adsp_endpoint0: endpoint { ++ remote-endpoint = <&ak4613_endpoint0>; ++ dai-format = "left_j"; ++ }; ++ }; ++ adsp_port1: port@1 { ++ reg = <1>; ++ adsp_endpoint1: endpoint { ++ remote-endpoint = <&ak4613_endpoint1>; ++ dai-format = "left_j"; ++ }; ++ }; ++ adsp_port2: port@2 { ++ reg = <2>; ++ adsp_endpoint2: endpoint { ++ remote-endpoint = <&ak4613_endpoint2>; ++ dai-format = "left_j"; ++ }; ++ }; ++ adsp_port3: port@3 { ++ reg = <3>; ++ adsp_endpoint3: endpoint { ++ remote-endpoint = <&ak4613_endpoint3>; ++ dai-format = "left_j"; ++ }; ++ }; ++ }; ++}; ++ + &rcar_sound { + pinctrl-0 = <&sound_pins &sound_clk_pins>; + pinctrl-names = "default"; +@@ -769,7 +843,7 @@ + rsnd_port0: port@0 { + reg = <0>; + rsnd_endpoint0: endpoint { +- remote-endpoint = <&ak4613_endpoint>; ++ remote-endpoint = <&ak4613_endpoint4>; + + dai-format = "left_j"; + bitclock-master = <&rsnd_endpoint0>; +-- +2.19.1 + diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0005-ADSP-integrate-ADSP-sound-for-E3-board.patch b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0005-ADSP-integrate-ADSP-sound-for-E3-board.patch new file mode 100644 index 00000000..34b32d8f --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0005-ADSP-integrate-ADSP-sound-for-E3-board.patch @@ -0,0 +1,272 @@ +From 455f26d0de1cf6eaeb0aa5b58725e3e34d8d34bd Mon Sep 17 00:00:00 2001 +From: Nguyen Dang <nguyen.dang.wh@rvc.renesas.com> +Date: Tue, 6 Nov 2018 11:36:15 +0700 +Subject: [PATCH 5/6] ADSP: integrate ADSP sound for E3 board + +Signed-off-by: Nguyen Dang <nguyen.dang.wh@renesas.com> +[takeshi.kihara.df: fix W=1 dtc warning] +[takeshi.kihara.df: support for dt file separation by E3 ES1.0 SoC] +Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> +--- + .../arm64/boot/dts/renesas/r8a77990-ebisu.dts | 84 +++++++++++++++++-- + .../boot/dts/renesas/r8a77990-es10-ebisu.dts | 84 +++++++++++++++++-- + arch/arm64/boot/dts/renesas/r8a77990.dtsi | 5 ++ + 3 files changed, 163 insertions(+), 10 deletions(-) + +diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +index 26081a6e1866..20fdb4085d87 100644 +--- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts ++++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +@@ -221,11 +221,27 @@ + }; + + sound_card: sound { +- compatible = "audio-graph-card"; ++ compatible = "audio-graph-scu-card"; + + label = "rcar-sound"; + +- dais = <&rsnd_port0>; ++ prefix = "ak4613"; ++ routing = "ak4613 Playback", "DAI0 Playback", ++ "DAI0 Capture", "ak4613 Capture", ++ "ak4613 Playback", "Playback0", ++ "ak4613 Playback", "Playback1", ++ "ak4613 Playback", "Playback2", ++ "ak4613 Playback", "Playback3", ++ "Capture0", "ak4613 Capture", ++ "Capture1", "ak4613 Capture", ++ "Capture2", "ak4613 Capture", ++ "Capture3", "ak4613 Capture"; ++ ++ dais = <&adsp_port0 ++ &adsp_port1 ++ &adsp_port2 ++ &adsp_port3 ++ &rsnd_port0>; + }; + + vbus0_usb2: regulator-vbus0-usb2 { +@@ -501,8 +517,27 @@ + asahi-kasei,out5-single-end; + asahi-kasei,out6-single-end; + +- port { +- ak4613_endpoint: endpoint { ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ak4613_endpoint0: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&adsp_endpoint0>; ++ }; ++ ak4613_endpoint1: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&adsp_endpoint1>; ++ }; ++ ak4613_endpoint2: endpoint@2 { ++ reg = <2>; ++ remote-endpoint = <&adsp_endpoint2>; ++ }; ++ ak4613_endpoint3: endpoint@3 { ++ reg = <3>; ++ remote-endpoint = <&adsp_endpoint3>; ++ }; ++ ak4613_endpoint4: endpoint@4 { ++ reg = <4>; + remote-endpoint = <&rsnd_endpoint0>; + }; + }; +@@ -702,6 +737,45 @@ + status = "okay"; + }; + ++&rcar_adsp_sound { ++ status = "okay"; ++ /* Multiple DAI */ ++ #sound-dai-cells = <1>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ adsp_port0: port@0 { ++ reg = <0>; ++ adsp_endpoint0: endpoint { ++ remote-endpoint = <&ak4613_endpoint0>; ++ dai-format = "left_j"; ++ }; ++ }; ++ adsp_port1: port@1 { ++ reg = <1>; ++ adsp_endpoint1: endpoint { ++ remote-endpoint = <&ak4613_endpoint1>; ++ dai-format = "left_j"; ++ }; ++ }; ++ adsp_port2: port@2 { ++ reg = <2>; ++ adsp_endpoint2: endpoint { ++ remote-endpoint = <&ak4613_endpoint2>; ++ dai-format = "left_j"; ++ }; ++ }; ++ adsp_port3: port@3 { ++ reg = <3>; ++ adsp_endpoint3: endpoint { ++ remote-endpoint = <&ak4613_endpoint3>; ++ dai-format = "left_j"; ++ }; ++ }; ++ }; ++}; ++ + &rcar_sound { + pinctrl-0 = <&sound_pins &sound_clk_pins>; + pinctrl-names = "default"; +@@ -737,7 +811,7 @@ + ports { + rsnd_port0: port@0 { + rsnd_endpoint0: endpoint { +- remote-endpoint = <&ak4613_endpoint>; ++ remote-endpoint = <&ak4613_endpoint4>; + + dai-format = "left_j"; + bitclock-master = <&rsnd_endpoint0>; +diff --git a/arch/arm64/boot/dts/renesas/r8a77990-es10-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-es10-ebisu.dts +index 087d5533f3db..61e18309c4a4 100644 +--- a/arch/arm64/boot/dts/renesas/r8a77990-es10-ebisu.dts ++++ b/arch/arm64/boot/dts/renesas/r8a77990-es10-ebisu.dts +@@ -221,11 +221,27 @@ + }; + + sound_card: sound { +- compatible = "audio-graph-card"; ++ compatible = "audio-graph-scu-card"; + + label = "rcar-sound"; + +- dais = <&rsnd_port0>; ++ prefix = "ak4613"; ++ routing = "ak4613 Playback", "DAI0 Playback", ++ "DAI0 Capture", "ak4613 Capture", ++ "ak4613 Playback", "Playback0", ++ "ak4613 Playback", "Playback1", ++ "ak4613 Playback", "Playback2", ++ "ak4613 Playback", "Playback3", ++ "Capture0", "ak4613 Capture", ++ "Capture1", "ak4613 Capture", ++ "Capture2", "ak4613 Capture", ++ "Capture3", "ak4613 Capture"; ++ ++ dais = <&adsp_port0 ++ &adsp_port1 ++ &adsp_port2 ++ &adsp_port3 ++ &rsnd_port0>; + }; + + vbus0_usb2: regulator-vbus0-usb2 { +@@ -501,8 +517,27 @@ + asahi-kasei,out5-single-end; + asahi-kasei,out6-single-end; + +- port { +- ak4613_endpoint: endpoint { ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ak4613_endpoint0: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&adsp_endpoint0>; ++ }; ++ ak4613_endpoint1: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&adsp_endpoint1>; ++ }; ++ ak4613_endpoint2: endpoint@2 { ++ reg = <2>; ++ remote-endpoint = <&adsp_endpoint2>; ++ }; ++ ak4613_endpoint3: endpoint@3 { ++ reg = <3>; ++ remote-endpoint = <&adsp_endpoint3>; ++ }; ++ ak4613_endpoint4: endpoint@4 { ++ reg = <4>; + remote-endpoint = <&rsnd_endpoint0>; + }; + }; +@@ -702,6 +737,45 @@ + status = "okay"; + }; + ++&rcar_adsp_sound { ++ status = "okay"; ++ /* Multiple DAI */ ++ #sound-dai-cells = <1>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ adsp_port0: port@0 { ++ reg = <0>; ++ adsp_endpoint0: endpoint { ++ remote-endpoint = <&ak4613_endpoint0>; ++ dai-format = "left_j"; ++ }; ++ }; ++ adsp_port1: port@1 { ++ reg = <1>; ++ adsp_endpoint1: endpoint { ++ remote-endpoint = <&ak4613_endpoint1>; ++ dai-format = "left_j"; ++ }; ++ }; ++ adsp_port2: port@2 { ++ reg = <2>; ++ adsp_endpoint2: endpoint { ++ remote-endpoint = <&ak4613_endpoint2>; ++ dai-format = "left_j"; ++ }; ++ }; ++ adsp_port3: port@3 { ++ reg = <3>; ++ adsp_endpoint3: endpoint { ++ remote-endpoint = <&ak4613_endpoint3>; ++ dai-format = "left_j"; ++ }; ++ }; ++ }; ++}; ++ + &rcar_sound { + pinctrl-0 = <&sound_pins &sound_clk_pins>; + pinctrl-names = "default"; +@@ -737,7 +811,7 @@ + ports { + rsnd_port0: port@0 { + rsnd_endpoint0: endpoint { +- remote-endpoint = <&ak4613_endpoint>; ++ remote-endpoint = <&ak4613_endpoint4>; + + dai-format = "left_j"; + bitclock-master = <&rsnd_endpoint0>; +diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi +index bd4d71e2b93e..845399adcbdb 100644 +--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi +@@ -181,6 +181,11 @@ + method = "smc"; + }; + ++ rcar_adsp_sound: adsp_sound { ++ compatible = "renesas,rcar_adsp_sound_gen3"; ++ status = "disabled"; ++ }; ++ + /* External SCIF clock - to be overridden by boards that provide it */ + scif_clk: scif { + compatible = "fixed-clock"; +-- +2.19.1 + diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0006-ADSP-remove-HDMI-support-from-rcar-sound.patch b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0006-ADSP-remove-HDMI-support-from-rcar-sound.patch new file mode 100644 index 00000000..3f601b64 --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/0006-ADSP-remove-HDMI-support-from-rcar-sound.patch @@ -0,0 +1,101 @@ +From acd7751ebcce90a442588f37fc6731990b5e09ea Mon Sep 17 00:00:00 2001 +From: Nguyen Dang <nguyen.dang.wh@renesas.com> +Date: Tue, 6 Nov 2018 11:46:25 +0700 +Subject: [PATCH v2 6/6] ADSP: remove HDMI support from rcar-sound + +Signed-off-by: Nguyen Dang <nguyen.dang.wh@renesas.com> +[takeshi.kihara.df: support for dt file separation by M3v3.0 SoC] +Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> +--- + arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 6 ------ + arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 6 ------ + arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 5 ----- + arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dts | 5 ----- + arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts | 5 ----- + 5 files changed, 27 deletions(-) + +diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +index 6928afbd8e06..b268afd7df85 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts ++++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +@@ -104,12 +104,6 @@ + status = "okay"; + }; + +-&sound_card { +- dais = <&rsnd_port0 /* ak4613 */ +- &rsnd_port1 /* HDMI0 */ +- &rsnd_port2>; /* HDMI1 */ +-}; +- + &hdmi0 { + status = "okay"; + +diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts +index 498f78875dbd..b6ec3036e9fd 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts ++++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts +@@ -114,12 +114,6 @@ + status = "okay"; + }; + +-&sound_card { +- dais = <&rsnd_port0 /* ak4613 */ +- &rsnd_port1 /* HDMI0 */ +- &rsnd_port2>; /* HDMI1 */ +-}; +- + &hdmi0 { + status = "okay"; + +diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts +index cf92aa3939e3..4faf935c4a32 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts ++++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts +@@ -88,11 +88,6 @@ + "dclkin.0", "dclkin.1", "dclkin.2"; + }; + +-&sound_card { +- dais = <&rsnd_port0 /* ak4613 */ +- &rsnd_port1>; /* HDMI0 */ +-}; +- + &hdmi0 { + status = "okay"; + +diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dts +index 664dc9250bbb..13960f69b2f7 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dts ++++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs-2x4g.dts +@@ -96,11 +96,6 @@ + "dclkin.0", "dclkin.1", "dclkin.2"; + }; + +-&sound_card { +- dais = <&rsnd_port0 /* ak4613 */ +- &rsnd_port1>; /* HDMI0 */ +-}; +- + &hdmi0 { + status = "okay"; + +diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts +index 7d39dc96ac8a..1cd6f0463361 100644 +--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts ++++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts +@@ -88,11 +88,6 @@ + "dclkin.0", "dclkin.1", "dclkin.2"; + }; + +-&sound_card { +- dais = <&rsnd_port0 /* ak4613 */ +- &rsnd_port1>; /* HDMI0 */ +-}; +- + &hdmi0 { + status = "okay"; + +-- +2.21.0 + diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/adsp.cfg b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/adsp.cfg new file mode 100644 index 00000000..f19e8d29 --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/adsp.cfg @@ -0,0 +1,3 @@ +CONFIG_SND_SOC_ADSP=y +CONFIG_SND_SOC_I2C_AND_SPI=y + diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/capacity_aware_migration_strategy.cfg b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/capacity_aware_migration_strategy.cfg new file mode 100644 index 00000000..e8b09aa7 --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/capacity_aware_migration_strategy.cfg @@ -0,0 +1 @@ +CONFIG_SCHED_DEBUG=y diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/defconfig b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/defconfig new file mode 100644 index 00000000..dd59bb89 --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/defconfig @@ -0,0 +1,6423 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 4.14.75 Kernel Configuration +# +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_HAVE_GENERIC_GUP=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_SMP=y +CONFIG_SWIOTLB=y +CONFIG_IOMMU_HELPER=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_FHANDLE=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_WATCH=y +CONFIG_AUDIT_TREE=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_HANDLE_DOMAIN_IRQ=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y + +# +# RCU Subsystem +# +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_BUILD_BIN2C=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_NUMA_BALANCING=y +CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_SWAP_ENABLED=y +CONFIG_BLK_CGROUP=y +# CONFIG_DEBUG_BLK_CGROUP is not set +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +# CONFIG_CGROUP_DEBUG is not set +# CONFIG_SOCK_CGROUP_DATA is not set +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +CONFIG_SCHED_AUTOGROUP=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +# CONFIG_EXPERT is not set +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_POSIX_TIMERS=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set +CONFIG_KALLSYMS_BASE_RELATIVE=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_ADVISE_SYSCALLS=y +# CONFIG_USERFAULTFD is not set +CONFIG_PCI_QUIRKS=y +CONFIG_MEMBARRIER=y +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_MEMCG_SYSFS_ON is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_SYSTEM_DATA_VERIFICATION is not set +CONFIG_PROFILING=y +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +# CONFIG_KPROBES is not set +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +# CONFIG_UPROBES is not set +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_GCC_PLUGINS=y +# CONFIG_GCC_PLUGINS is not set +CONFIG_HAVE_CC_STACKPROTECTOR=y +# CONFIG_CC_STACKPROTECTOR is not set +CONFIG_CC_STACKPROTECTOR_NONE=y +# CONFIG_CC_STACKPROTECTOR_REGULAR is not set +# CONFIG_CC_STACKPROTECTOR_STRONG is not set +CONFIG_THIN_ARCHIVES=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +# CONFIG_HAVE_ARCH_HASH is not set +# CONFIG_ISA_BUS_API is not set +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +# CONFIG_CPU_NO_EFFICIENT_FFS is not set +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +# CONFIG_REFCOUNT_FULL is not set + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_CFQ_GROUP_IOSCHED is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +CONFIG_ARCH_SUNXI=y +CONFIG_ARCH_ALPINE=y +CONFIG_ARCH_BCM2835=y +CONFIG_ARCH_BCM_IPROC=y +CONFIG_ARCH_BERLIN=y +CONFIG_ARCH_BRCMSTB=y +CONFIG_ARCH_EXYNOS=y +CONFIG_ARCH_LAYERSCAPE=y +CONFIG_ARCH_LG1K=y +CONFIG_ARCH_HISI=y +CONFIG_ARCH_MEDIATEK=y +CONFIG_ARCH_MESON=y +CONFIG_ARCH_MVEBU=y +CONFIG_ARCH_QCOM=y +# CONFIG_ARCH_REALTEK is not set +CONFIG_ARCH_ROCKCHIP=y +CONFIG_ARCH_SEATTLE=y +CONFIG_ARCH_SHMOBILE=y +CONFIG_ARCH_RENESAS=y +CONFIG_ARCH_R8A7795=y +CONFIG_ARCH_R8A7796=y +CONFIG_ARCH_R8A77965=y +CONFIG_ARCH_R8A77970=y +CONFIG_ARCH_R8A77980=y +CONFIG_ARCH_R8A77990=y +CONFIG_ARCH_R8A77995=y +CONFIG_ARCH_STRATIX10=y +CONFIG_ARCH_TEGRA=y +CONFIG_ARCH_SPRD=y +CONFIG_ARCH_THUNDER=y +CONFIG_ARCH_THUNDER2=y +CONFIG_ARCH_UNIPHIER=y +CONFIG_ARCH_VEXPRESS=y +# CONFIG_ARCH_VULCAN is not set +CONFIG_ARCH_XGENE=y +CONFIG_ARCH_ZX=y +CONFIG_ARCH_ZYNQMP=y + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI_PCIE=y +CONFIG_PCIEAER=y +# CONFIG_PCIE_ECRC is not set +# CONFIG_PCIEAER_INJECT is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_DPC is not set +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_BUS_ADDR_T_64BIT=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# DesignWare PCI Core Support +# +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +# CONFIG_PCIE_DW_PLAT is not set +CONFIG_PCI_LAYERSCAPE=y +CONFIG_PCI_HISI=y +CONFIG_PCIE_QCOM=y +CONFIG_PCIE_ARMADA_8K=y +CONFIG_PCIE_KIRIN=y + +# +# PCI host controller drivers +# +CONFIG_PCI_AARDVARK=y +# CONFIG_PCIE_XILINX_NWL is not set +CONFIG_PCI_TEGRA=y +CONFIG_PCIE_RCAR=y +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_PCI_XGENE=y +CONFIG_PCI_XGENE_MSI=y +CONFIG_PCIE_IPROC=y +CONFIG_PCIE_IPROC_PLATFORM=y +CONFIG_PCIE_IPROC_MSI=y +CONFIG_PCI_HOST_THUNDER_PEM=y +CONFIG_PCI_HOST_THUNDER_ECAM=y +CONFIG_PCIE_ROCKCHIP=m +# CONFIG_PCIE_MEDIATEK is not set + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_834220=y +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_CAVIUM_ERRATUM_22375=y +CONFIG_CAVIUM_ERRATUM_23144=y +CONFIG_CAVIUM_ERRATUM_23154=y +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_QCOM_FALKOR_ERRATUM_E1041=y +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SCHED_MC=y +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=64 +CONFIG_HOTPLUG_CPU=y +CONFIG_NUMA=y +CONFIG_NODES_SHIFT=2 +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_HOLES_IN_ZONE=y +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_NEED_MULTIPLE_NODES=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_NO_BOOTMEM=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_MIGRATION=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +# CONFIG_HWPOISON_INJECT is not set +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +# CONFIG_ARCH_WANTS_THP_SWAP is not set +CONFIG_TRANSPARENT_HUGE_PAGECACHE=y +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_FRAME_VECTOR=y +# CONFIG_PERCPU_STATS is not set +CONFIG_SECCOMP=y +CONFIG_PARAVIRT=y +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_KEXEC=y +CONFIG_CRASH_DUMP=y +CONFIG_XEN_DOM0=y +CONFIG_XEN=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_ARM64_SSBD=y +# CONFIG_ARMV8_DEPRECATED is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +# CONFIG_ARM64_LSE_ATOMICS is not set +CONFIG_ARM64_VHE=y + +# +# ARMv8.2 architectural features +# +CONFIG_ARM64_UAO=y +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_MODULE_CMODEL_LARGE=y +# CONFIG_RANDOMIZE_BASE is not set + +# +# Boot options +# +# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set +CONFIG_CMDLINE="" +# CONFIG_CMDLINE_FORCE is not set +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ELFCORE=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_SCRIPT=y +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_OPP=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_ARM_BIG_LITTLE_CPUFREQ=y +CONFIG_ARM_BRCMSTB_AVS_CPUFREQ=y +# CONFIG_ARM_BRCMSTB_AVS_CPUFREQ_DEBUG is not set +# CONFIG_ARM_DT_BL_CPUFREQ is not set +# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set +# CONFIG_ARM_MEDIATEK_CPUFREQ is not set +CONFIG_ARM_SCPI_CPUFREQ=y +CONFIG_ARM_TEGRA20_CPUFREQ=y +CONFIG_ARM_TEGRA124_CPUFREQ=y +CONFIG_ARM_TEGRA186_CPUFREQ=y +CONFIG_ACPI_CPPC_CPUFREQ=m +# CONFIG_QORIQ_CPUFREQ is not set +CONFIG_NET=y +CONFIG_NET_INGRESS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set +# CONFIG_NET_UDP_TUNNEL is not set +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_FOU is not set +# CONFIG_IPV6_FOU_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +CONFIG_NF_CONNTRACK_PROCFS=y +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +# CONFIG_NF_CT_NETLINK_TIMEOUT is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_NF_NAT_PROTO_DCCP=y +CONFIG_NF_NAT_PROTO_UDPLITE=y +CONFIG_NF_NAT_PROTO_SCTP=y +# CONFIG_NF_NAT_AMANDA is not set +# CONFIG_NF_NAT_FTP is not set +# CONFIG_NF_NAT_IRC is not set +# CONFIG_NF_NAT_SIP is not set +# CONFIG_NF_NAT_TFTP is not set +# CONFIG_NF_NAT_REDIRECT is not set +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +CONFIG_NETFILTER_XT_TARGET_LOG=m +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_CONNTRACK_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_IPV4=m +CONFIG_NF_NAT_MASQUERADE_IPV4=m +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_H323 is not set +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV6=m +CONFIG_NF_CONNTRACK_IPV6=m +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_NF_NAT_IPV6=m +CONFIG_NF_NAT_MASQUERADE_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +CONFIG_IP6_NF_MANGLE=m +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +# CONFIG_IP6_NF_TARGET_NPT is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_MRP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_QRTR is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_BPF_JIT=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +CONFIG_BT=m +CONFIG_BT_BREDR=y +# CONFIG_BT_RFCOMM is not set +# CONFIG_BT_BNEP is not set +CONFIG_BT_HIDP=m +# CONFIG_BT_HS is not set +# CONFIG_BT_LE is not set +CONFIG_BT_LEDS=y +# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_DEBUGFS is not set + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_SERDEV=y +# CONFIG_BT_HCIUART_H4 is not set +# CONFIG_BT_HCIUART_NOKIA is not set +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +CONFIG_BT_HCIUART_LL=y +# CONFIG_BT_HCIUART_3WIRE is not set +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_BCM is not set +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIUART_MRVL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +# CONFIG_STREAM_PARSER is not set +CONFIG_WIRELESS=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_INTERNAL_REGDB is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +# CONFIG_CFG80211_WEXT is not set +# CONFIG_LIB80211 is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +# CONFIG_MAC80211_RC_MINSTREL_VHT is not set +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_GPIO is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_XEN is not set +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +# CONFIG_NET_DEVLINK is not set +CONFIG_MAY_USE_DEVLINK=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_TEGRA_AHB=y + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_ALLOW_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_SYS_HYPERVISOR=y +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_SPMI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +CONFIG_GENERIC_ARCH_TOPOLOGY=y + +# +# Bus devices +# +# CONFIG_ARM_CCI400_PMU is not set +# CONFIG_ARM_CCI5xx_PMU is not set +# CONFIG_ARM_CCN is not set +CONFIG_BRCMSTB_GISB_ARB=y +CONFIG_QCOM_EBI2=y +# CONFIG_SIMPLE_PM_BUS is not set +CONFIG_SUNXI_RSB=y +# CONFIG_TEGRA_ACONNECT is not set +# CONFIG_TEGRA_GMI is not set +CONFIG_UNIPHIER_SYSTEM_BUS=y +CONFIG_VEXPRESS_CONFIG=y +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# Partition parsers +# + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +CONFIG_MTD_NAND_ECC=y +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_ECC_BCH is not set +# CONFIG_MTD_SM_COMMON is not set +CONFIG_MTD_NAND_DENALI=y +# CONFIG_MTD_NAND_DENALI_PCI is not set +CONFIG_MTD_NAND_DENALI_DT=y +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_OMAP_BCH_BUILD is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_DOCG4 is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_PXA3xx is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_FSL_IFC is not set +# CONFIG_MTD_NAND_SUNXI is not set +# CONFIG_MTD_NAND_HISI504 is not set +# CONFIG_MTD_NAND_QCOM is not set +# CONFIG_MTD_NAND_MTK is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_MT81xx_NOR is not set +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_SPI_FSL_QUADSPI is not set +# CONFIG_SPI_HISI_SFC is not set +# CONFIG_MTD_UBI is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +CONFIG_OF_NUMA=y +# CONFIG_PARPORT is not set +CONFIG_PNP=y +CONFIG_PNP_DEBUG_MESSAGES=y + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_XEN_BLKDEV_FRONTEND=y +# CONFIG_XEN_BLKDEV_BACKEND is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_VIRTIO_BLK_SCSI is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set +CONFIG_NVME_CORE=m +CONFIG_BLK_DEV_NVME=m +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TARGET is not set + +# +# Misc devices +# +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_QCOM_COINCELL is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +CONFIG_VEXPRESS_SYSCFG=y +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +CONFIG_EEPROM_AT25=m +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# VOP Bus Driver +# + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# + +# +# VOP Driver +# +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_CXL_BASE is not set +# CONFIG_CXL_AFU_DRIVER_OPS is not set +# CONFIG_CXL_LIB is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_MQ_DEFAULT is not set +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_LIBSAS=y +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +CONFIG_SCSI_HISI_SAS=y +CONFIG_SCSI_HISI_SAS_PCI=y +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_XEN_SCSI_FRONTEND is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_ACPI=y +# CONFIG_SATA_ZPODD is not set +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +# CONFIG_AHCI_BRCM is not set +CONFIG_AHCI_CEVA=y +# CONFIG_AHCI_MTK is not set +CONFIG_AHCI_MVEBU=y +# CONFIG_AHCI_SUNXI is not set +# CONFIG_AHCI_TEGRA is not set +CONFIG_AHCI_XGENE=y +CONFIG_AHCI_QORIQ=y +# CONFIG_SATA_AHCI_SEATTLE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +CONFIG_SATA_SIL24=y +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_DWC is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +CONFIG_SATA_RCAR=y +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +CONFIG_PATA_PLATFORM=y +CONFIG_PATA_OF_PLATFORM=y +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_PATA_ACPI is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +# CONFIG_MD is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +# CONFIG_VXLAN is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +CONFIG_TUN=y +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +CONFIG_ETHERNET=y +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_AGERE=y +# CONFIG_ET131X is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +CONFIG_NET_VENDOR_ALLWINNER=y +# CONFIG_SUN4I_EMAC is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set +CONFIG_AMD_XGBE=y +# CONFIG_AMD_XGBE_HAVE_ECC is not set +CONFIG_NET_XGENE=y +# CONFIG_NET_XGENE_V2 is not set +CONFIG_NET_VENDOR_AQUANTIA=y +CONFIG_NET_VENDOR_ARC=y +# CONFIG_EMAC_ROCKCHIP is not set +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +# CONFIG_ATL1C is not set +# CONFIG_ALX is not set +# CONFIG_NET_VENDOR_AURORA is not set +CONFIG_NET_CADENCE=y +CONFIG_MACB=y +CONFIG_MACB_USE_HWSTAMP=y +# CONFIG_MACB_PCI is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_BCMGENET is not set +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2X is not set +CONFIG_BGMAC=y +CONFIG_BGMAC_PLATFORM=y +# CONFIG_SYSTEMPORT is not set +# CONFIG_BNXT is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set +CONFIG_NET_VENDOR_CAVIUM=y +CONFIG_THUNDER_NIC_PF=y +# CONFIG_THUNDER_NIC_VF is not set +CONFIG_THUNDER_NIC_BGX=y +CONFIG_THUNDER_NIC_RGX=y +# CONFIG_LIQUIDIO is not set +# CONFIG_LIQUIDIO_VF is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +# CONFIG_NET_TULIP is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_EXAR=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_FREESCALE=y +# CONFIG_FSL_FMAN is not set +# CONFIG_FSL_PQ_MDIO is not set +# CONFIG_FSL_XGMAC_MDIO is not set +# CONFIG_GIANFAR is not set +CONFIG_NET_VENDOR_HISILICON=y +# CONFIG_HIX5HD2_GMAC is not set +# CONFIG_HISI_FEMAC is not set +# CONFIG_HIP04_ETH is not set +CONFIG_HNS_MDIO=y +CONFIG_HNS=y +CONFIG_HNS_DSAF=y +CONFIG_HNS_ENET=y +# CONFIG_HNS3 is not set +CONFIG_NET_VENDOR_HP=y +# CONFIG_HP100 is not set +CONFIG_NET_VENDOR_HUAWEI=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +# CONFIG_E1000 is not set +CONFIG_E1000E=y +CONFIG_IGB=y +CONFIG_IGB_HWMON=y +CONFIG_IGBVF=y +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_FM10K is not set +CONFIG_NET_VENDOR_I825XX=y +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +CONFIG_MVMDIO=y +CONFIG_MVNETA=y +CONFIG_MVPP2=y +# CONFIG_PXA168_ETH is not set +# CONFIG_SKGE is not set +CONFIG_SKY2=y +# CONFIG_SKY2_DEBUG is not set +# CONFIG_NET_VENDOR_MEDIATEK is not set +CONFIG_NET_VENDOR_MELLANOX=y +# CONFIG_MLX4_EN is not set +# CONFIG_MLX4_CORE is not set +# CONFIG_MLX5_CORE is not set +# CONFIG_MLXSW_CORE is not set +# CONFIG_MLXFW is not set +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set +CONFIG_NET_VENDOR_NATSEMI=y +# CONFIG_NATSEMI is not set +# CONFIG_NS83820 is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP is not set +CONFIG_NET_VENDOR_8390=y +# CONFIG_NE2K_PCI is not set +CONFIG_NET_VENDOR_NVIDIA=y +# CONFIG_FORCEDETH is not set +CONFIG_NET_VENDOR_OKI=y +# CONFIG_ETHOC is not set +CONFIG_NET_PACKET_ENGINE=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_QLGE is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_QED is not set +CONFIG_NET_VENDOR_QUALCOMM=y +# CONFIG_QCA7000_SPI is not set +# CONFIG_QCA7000_UART is not set +CONFIG_QCOM_EMAC=m +# CONFIG_RMNET is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R8169 is not set +CONFIG_NET_VENDOR_RENESAS=y +# CONFIG_SH_ETH is not set +CONFIG_RAVB=y +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set +CONFIG_NET_VENDOR_ROCKER=y +CONFIG_NET_VENDOR_SAMSUNG=y +# CONFIG_SXGBE_ETH is not set +CONFIG_NET_VENDOR_SEEQ=y +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +CONFIG_NET_VENDOR_SMSC=y +CONFIG_SMC91X=y +# CONFIG_EPIC100 is not set +CONFIG_SMSC911X=y +# CONFIG_SMSC911X_ARCH_HOOKS is not set +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=y +CONFIG_DWMAC_IPQ806X=m +CONFIG_DWMAC_MESON=m +CONFIG_DWMAC_ROCKCHIP=m +# CONFIG_DWMAC_SOCFPGA is not set +CONFIG_DWMAC_SUNXI=m +CONFIG_DWMAC_SUN8I=m +# CONFIG_STMMAC_PCI is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TI_CPSW_ALE is not set +# CONFIG_TLAN is not set +CONFIG_NET_VENDOR_VIA=y +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set +CONFIG_NET_VENDOR_WIZNET=y +# CONFIG_WIZNET_W5100 is not set +# CONFIG_WIZNET_W5300 is not set +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_DWC_XLGMAC is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_NET_SB1000 is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +# CONFIG_MDIO_BCM_IPROC is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM_IPROC=y +# CONFIG_MDIO_BUS_MUX_GPIO is not set +CONFIG_MDIO_BUS_MUX_MMIOREG=y +CONFIG_MDIO_CAVIUM=y +# CONFIG_MDIO_GPIO is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_SUN4I is not set +CONFIG_MDIO_THUNDER=y +CONFIG_MDIO_XGENE=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +CONFIG_AT803X_PHY=m +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_ICPLUS_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_LXT_PHY is not set +CONFIG_MARVELL_PHY=m +CONFIG_MARVELL_10G_PHY=m +CONFIG_MESON_GXL_PHY=m +CONFIG_MICREL_PHY=y +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=m +CONFIG_ROCKCHIP_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +CONFIG_USB_NET_DM9601=m +# CONFIG_USB_NET_SR9700 is not set +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +CONFIG_WLAN=y +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +# CONFIG_ATH10K is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_SDIO=y +# CONFIG_BRCMFMAC_USB is not set +# CONFIG_BRCMFMAC_PCIE is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_MWIFIEX is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=m +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +CONFIG_WL18XX=m +CONFIG_WLCORE=m +# CONFIG_WLCORE_SPI is not set +CONFIG_WLCORE_SDIO=m +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PEARL_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +CONFIG_XEN_NETDEV_FRONTEND=y +# CONFIG_XEN_NETDEV_BACKEND is not set +# CONFIG_VMXNET3 is not set +# CONFIG_FUJITSU_ES is not set +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=m +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ADC=m +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_TEGRA is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_SH_KEYSC is not set +# CONFIG_KEYBOARD_SUN4I_LRADC is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +CONFIG_INPUT_PM8941_PWRKEY=y +# CONFIG_INPUT_PM8XXX_VIBRATOR is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_TILT_POLLED is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_AXP20X_PEK is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_RK805_PWRKEY is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set +CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +CONFIG_INPUT_HISI_POWERKEY=y +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_AMBAKMI=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_SUN4I_PS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVMEM=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_PNP=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_BCM2835AUX=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_8250_MT6577=y +CONFIG_SERIAL_8250_UNIPHIER=y +# CONFIG_SERIAL_8250_MOXA is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +CONFIG_SERIAL_MESON=y +CONFIG_SERIAL_MESON_CONSOLE=y +CONFIG_SERIAL_SAMSUNG=y +CONFIG_SERIAL_SAMSUNG_UARTS_4=y +CONFIG_SERIAL_SAMSUNG_UARTS=4 +CONFIG_SERIAL_SAMSUNG_CONSOLE=y +CONFIG_SERIAL_TEGRA=y +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_SH_SCI_NR_UARTS=18 +CONFIG_SERIAL_SH_SCI_CONSOLE=y +CONFIG_SERIAL_SH_SCI_EARLYCON=y +CONFIG_SERIAL_SH_SCI_DMA=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_SERIAL_MSM=y +CONFIG_SERIAL_MSM_CONSOLE=y +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +CONFIG_SERIAL_MVEBU_UART=y +CONFIG_SERIAL_MVEBU_CONSOLE=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HVC_XEN_FRONTEND=y +# CONFIG_HVC_DCC is not set +CONFIG_VIRTIO_CONSOLE=y +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_BCM2835=m +CONFIG_HW_RANDOM_IPROC_RNG200=m +CONFIG_HW_RANDOM_OMAP=m +# CONFIG_HW_RANDOM_VIRTIO is not set +CONFIG_HW_RANDOM_HISI=m +CONFIG_HW_RANDOM_MSM=m +CONFIG_HW_RANDOM_XGENE=m +CONFIG_HW_RANDOM_MESON=m +CONFIG_HW_RANDOM_CAVIUM=m +CONFIG_HW_RANDOM_MTK=m +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# PCMCIA character devices +# +# CONFIG_RAW_DRIVER is not set +# CONFIG_HPET is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +# CONFIG_XILLYBUS is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_HIX5HD2 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# ACPI drivers +# +# CONFIG_I2C_SCMI is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_BCM2835=m +CONFIG_I2C_BCM_IPROC=y +CONFIG_I2C_BRCMSTB=y +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=y +CONFIG_I2C_DESIGNWARE_PLATFORM=y +# CONFIG_I2C_DESIGNWARE_SLAVE is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +CONFIG_I2C_EXYNOS5=y +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_IMX=y +CONFIG_I2C_MESON=y +# CONFIG_I2C_MT65XX is not set +CONFIG_I2C_MV64XXX=y +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +CONFIG_I2C_PXA=y +# CONFIG_I2C_PXA_PCI is not set +# CONFIG_I2C_PXA_SLAVE is not set +CONFIG_I2C_QUP=y +# CONFIG_I2C_RIIC is not set +CONFIG_I2C_RK3X=y +CONFIG_I2C_SH_MOBILE=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SPRD is not set +CONFIG_I2C_TEGRA=y +CONFIG_I2C_TEGRA_BPMP=y +# CONFIG_I2C_UNIPHIER is not set +CONFIG_I2C_UNIPHIER_F=y +# CONFIG_I2C_VERSATILE is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set +# CONFIG_I2C_XLP9XX is not set +CONFIG_I2C_RCAR=y + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +CONFIG_I2C_CROS_EC_TUNNEL=y +# CONFIG_I2C_XGENE_SLIMPRO is not set +CONFIG_I2C_ZX2967=y +# CONFIG_I2C_STUB is not set +CONFIG_I2C_SLAVE=y +# CONFIG_I2C_SLAVE_EEPROM is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_ARMADA_3700 is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BCM2835=m +CONFIG_SPI_BCM2835AUX=m +CONFIG_SPI_BCM_QSPI=y +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_FSL_DSPI is not set +CONFIG_SPI_MESON_SPICC=m +CONFIG_SPI_MESON_SPIFC=m +# CONFIG_SPI_MT65XX is not set +# CONFIG_SPI_OC_TINY is not set +CONFIG_SPI_ORION=y +CONFIG_SPI_PL022=y +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_PXA2XX_PCI is not set +CONFIG_SPI_ROCKCHIP=y +# CONFIG_SPI_RSPI is not set +CONFIG_SPI_QUP=y +CONFIG_SPI_S3C64XX=y +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SH_MSIOF is not set +# CONFIG_SPI_SH_HSPI is not set +# CONFIG_SPI_SUN4I is not set +# CONFIG_SPI_SUN6I is not set +# CONFIG_SPI_TEGRA114 is not set +# CONFIG_SPI_TEGRA20_SFLASH is not set +# CONFIG_SPI_TEGRA20_SLINK is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_XLP is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=m +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPMI=y +CONFIG_SPMI_MSM_PMIC_ARB=y +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_DTE=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_PINCTRL=y + +# +# Pin controllers +# +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set +CONFIG_PINCTRL_MESON=y +CONFIG_PINCTRL_ROCKCHIP=y +CONFIG_PINCTRL_SINGLE=y +# CONFIG_PINCTRL_SX150X is not set +CONFIG_PINCTRL_MAX77620=y +# CONFIG_PINCTRL_RK805 is not set +CONFIG_PINCTRL_BCM2835=y +CONFIG_PINCTRL_IPROC_GPIO=y +CONFIG_PINCTRL_NS2_MUX=y +# CONFIG_PINCTRL_BERLIN_BG2 is not set +# CONFIG_PINCTRL_BERLIN_BG2CD is not set +# CONFIG_PINCTRL_BERLIN_BG2Q is not set +# CONFIG_PINCTRL_BERLIN_BG4CT is not set +CONFIG_PINCTRL_MVEBU=y +CONFIG_PINCTRL_ARMADA_AP806=y +CONFIG_PINCTRL_ARMADA_CP110=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_PINCTRL_MSM=y +# CONFIG_PINCTRL_APQ8064 is not set +# CONFIG_PINCTRL_APQ8084 is not set +# CONFIG_PINCTRL_IPQ4019 is not set +# CONFIG_PINCTRL_IPQ8064 is not set +CONFIG_PINCTRL_IPQ8074=y +# CONFIG_PINCTRL_MSM8660 is not set +# CONFIG_PINCTRL_MSM8960 is not set +# CONFIG_PINCTRL_MDM9615 is not set +# CONFIG_PINCTRL_MSM8X74 is not set +CONFIG_PINCTRL_MSM8916=y +CONFIG_PINCTRL_MSM8994=y +CONFIG_PINCTRL_MSM8996=y +CONFIG_PINCTRL_QDF2XXX=y +CONFIG_PINCTRL_QCOM_SPMI_PMIC=y +# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set +CONFIG_PINCTRL_SAMSUNG=y +CONFIG_PINCTRL_EXYNOS=y +CONFIG_PINCTRL_EXYNOS_ARM64=y +CONFIG_PINCTRL_SH_PFC=y +CONFIG_PINCTRL_PFC_R8A7795=y +CONFIG_PINCTRL_PFC_R8A7796=y +CONFIG_PINCTRL_PFC_R8A77965=y +CONFIG_PINCTRL_PFC_R8A77970=y +CONFIG_PINCTRL_PFC_R8A77980=y +CONFIG_PINCTRL_PFC_R8A77990=y +CONFIG_PINCTRL_PFC_R8A77995=y +# CONFIG_PINCTRL_SPRD is not set +CONFIG_PINCTRL_SUNXI=y +# CONFIG_PINCTRL_SUN4I_A10 is not set +# CONFIG_PINCTRL_SUN5I is not set +# CONFIG_PINCTRL_SUN6I_A31 is not set +# CONFIG_PINCTRL_SUN6I_A31_R is not set +# CONFIG_PINCTRL_SUN8I_A23 is not set +# CONFIG_PINCTRL_SUN8I_A33 is not set +# CONFIG_PINCTRL_SUN8I_A83T is not set +# CONFIG_PINCTRL_SUN8I_A83T_R is not set +# CONFIG_PINCTRL_SUN8I_A23_R is not set +# CONFIG_PINCTRL_SUN8I_H3 is not set +CONFIG_PINCTRL_SUN8I_H3_R=y +# CONFIG_PINCTRL_SUN8I_V3S is not set +# CONFIG_PINCTRL_SUN9I_A80 is not set +# CONFIG_PINCTRL_SUN9I_A80_R is not set +CONFIG_PINCTRL_SUN50I_A64=y +CONFIG_PINCTRL_SUN50I_A64_R=y +CONFIG_PINCTRL_SUN50I_H5=y +CONFIG_PINCTRL_TEGRA=y +CONFIG_PINCTRL_TEGRA124=y +CONFIG_PINCTRL_TEGRA210=y +CONFIG_PINCTRL_TEGRA_XUSB=y +CONFIG_PINCTRL_UNIPHIER=y +# CONFIG_PINCTRL_UNIPHIER_LD4 is not set +# CONFIG_PINCTRL_UNIPHIER_PRO4 is not set +# CONFIG_PINCTRL_UNIPHIER_SLD8 is not set +# CONFIG_PINCTRL_UNIPHIER_PRO5 is not set +# CONFIG_PINCTRL_UNIPHIER_PXS2 is not set +# CONFIG_PINCTRL_UNIPHIER_LD6B is not set +CONFIG_PINCTRL_UNIPHIER_LD11=y +CONFIG_PINCTRL_UNIPHIER_LD20=y +CONFIG_PINCTRL_UNIPHIER_PXS3=y +CONFIG_PINCTRL_MTK=y +CONFIG_PINCTRL_MT8173=y +# CONFIG_PINCTRL_ZX296718 is not set +CONFIG_GPIOLIB=y +CONFIG_OF_GPIO=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_AMDPT is not set +# CONFIG_GPIO_AXP209 is not set +CONFIG_GPIO_BRCMSTB=y +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_GPIO_MPC8XXX is not set +CONFIG_GPIO_MVEBU=y +CONFIG_GPIO_PL061=y +CONFIG_GPIO_RCAR=y +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_TEGRA=y +# CONFIG_GPIO_THUNDERX is not set +CONFIG_GPIO_XGENE=y +CONFIG_GPIO_XGENE_SB=y +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_XLP is not set +# CONFIG_GPIO_ZYNQ is not set +# CONFIG_GPIO_ZX is not set + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set +# CONFIG_GPIO_TPIC2810 is not set + +# +# MFD GPIO expanders +# +# CONFIG_GPIO_BD9571MWV is not set +CONFIG_GPIO_MAX77620=y + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set + +# +# USB GPIO expanders +# +# CONFIG_W1 is not set +CONFIG_POWER_AVS=y +CONFIG_ROCKCHIP_IODOMAIN=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_BRCMSTB=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_HISI is not set +CONFIG_POWER_RESET_MSM=y +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +CONFIG_POWER_RESET_VEXPRESS=y +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_RESET_SYSCON=y +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +# CONFIG_POWER_RESET_ZX is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_LEGO_EV3 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_CHARGER_SBS is not set +CONFIG_BATTERY_BQ27XXX=y +CONFIG_BATTERY_BQ27XXX_I2C=y +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +# CONFIG_AXP20X_POWER is not set +# CONFIG_AXP288_FUEL_GAUGE is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LTC3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_QCOM_SMBB is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_CHARGER_RT9455 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +CONFIG_SENSORS_ARM_SCPI=y +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH56XX_COMMON is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +CONFIG_SENSORS_INA2XX=m +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VEXPRESS is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_XGENE is not set + +# +# ACPI drivers +# +# CONFIG_SENSORS_ACPI_POWER is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +# CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE is not set +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR=y +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_GOV_STEP_WISE is not set +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +# CONFIG_CLOCK_THERMAL is not set +# CONFIG_DEVFREQ_THERMAL is not set +CONFIG_THERMAL_EMULATION=y +CONFIG_HISI_THERMAL=y +# CONFIG_MAX77620_THERMAL is not set +# CONFIG_QORIQ_THERMAL is not set +CONFIG_ROCKCHIP_THERMAL=m +# CONFIG_RCAR_THERMAL is not set +CONFIG_RCAR_GEN3_THERMAL=y +# CONFIG_ARMADA_THERMAL is not set + +# +# ACPI INT340X thermal drivers +# +CONFIG_MTK_THERMAL=y + +# +# Samsung thermal drivers +# +CONFIG_EXYNOS_THERMAL=y + +# +# NVIDIA Tegra thermal drivers +# +# CONFIG_TEGRA_SOCTHERM is not set +# CONFIG_QCOM_SPMI_TEMP_ALARM is not set +# CONFIG_GENERIC_ADC_THERMAL is not set + +# +# Qualcomm thermal drivers +# +CONFIG_QCOM_TSENS=y +# CONFIG_ZX2967_THERMAL is not set +CONFIG_UNIPHIER_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_WDAT_WDT is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_HAVE_S3C2410_WATCHDOG=y +CONFIG_S3C2410_WATCHDOG=y +# CONFIG_DW_WATCHDOG is not set +# CONFIG_SUNXI_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_MAX77620_WATCHDOG is not set +# CONFIG_IMX2_WDT is not set +# CONFIG_TEGRA_WATCHDOG is not set +# CONFIG_QCOM_WDT is not set +CONFIG_MESON_GXBB_WATCHDOG=m +CONFIG_MESON_WATCHDOG=m +# CONFIG_MEDIATEK_WATCHDOG is not set +CONFIG_RENESAS_WDT=y +# CONFIG_RENESAS_RZAWDT is not set +# CONFIG_ZX2967_WATCHDOG is not set +CONFIG_UNIPHIER_WATCHDOG=y +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +CONFIG_BCM2835_WDT=y +# CONFIG_BCM7038_WDT is not set +# CONFIG_MEN_A21_WDT is not set +# CONFIG_XEN_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_SUN4I_GPADC is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +CONFIG_MFD_BD9571MWV=y +# CONFIG_MFD_AC100 is not set +CONFIG_MFD_AXP20X=y +# CONFIG_MFD_AXP20X_I2C is not set +CONFIG_MFD_AXP20X_RSB=y +CONFIG_MFD_CROS_EC=y +CONFIG_MFD_CROS_EC_I2C=y +CONFIG_MFD_CROS_EC_SPI=y +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +CONFIG_MFD_EXYNOS_LPASS=m +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +CONFIG_MFD_HI6421_PMIC=y +CONFIG_MFD_HI655X_PMIC=y +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +CONFIG_MFD_MAX77620=y +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_QCOM_RPM is not set +CONFIG_MFD_SPMI_PMIC=y +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RTSX_USB is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +# CONFIG_MFD_SUN6I_PRCM is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS68470 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_MFD_VEXPRESS_SYSREG=y +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +CONFIG_REGULATOR_AXP20X=y +CONFIG_REGULATOR_BD9571MWV=y +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_HI6421 is not set +CONFIG_REGULATOR_HI6421V530=y +CONFIG_REGULATOR_HI655X=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +CONFIG_REGULATOR_MAX77620=y +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_QCOM_SMD_RPM=y +CONFIG_REGULATOR_QCOM_SPMI=y +CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_S2MPA01 is not set +CONFIG_REGULATOR_S2MPS11=y +# CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +# CONFIG_REGULATOR_VCTRL is not set +# CONFIG_REGULATOR_VEXPRESS is not set +CONFIG_CEC_CORE=y +CONFIG_RC_CORE=m +CONFIG_RC_MAP=m +CONFIG_RC_DECODERS=y +# CONFIG_LIRC is not set +CONFIG_IR_NEC_DECODER=m +CONFIG_IR_RC5_DECODER=m +CONFIG_IR_RC6_DECODER=m +CONFIG_IR_JVC_DECODER=m +CONFIG_IR_SONY_DECODER=m +CONFIG_IR_SANYO_DECODER=m +CONFIG_IR_SHARP_DECODER=m +CONFIG_IR_MCE_KBD_DECODER=m +CONFIG_IR_XMP_DECODER=m +CONFIG_RC_DEVICES=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_ENE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_ITE_CIR is not set +# CONFIG_IR_FINTEK is not set +CONFIG_IR_MESON=m +# CONFIG_IR_MTK is not set +# CONFIG_IR_NUVOTON is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +# CONFIG_IR_GPIO_CIR is not set +# CONFIG_IR_SUNXI is not set +# CONFIG_IR_SERIAL is not set +# CONFIG_IR_SIR is not set +# CONFIG_IR_ZX is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_CONTROLLER=y +# CONFIG_MEDIA_CONTROLLER_DVB is not set +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_VIDEO_V4L2=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_PCI_SKELETON is not set +CONFIG_V4L2_MEM2MEM_DEV=m +CONFIG_V4L2_FWNODE=y +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_DMA_CONTIG=y +CONFIG_VIDEOBUF2_VMALLOC=y +CONFIG_DVB_CORE=y +# CONFIG_DVB_NET is not set +# CONFIG_TTPCI_EEPROM is not set +CONFIG_DVB_MAX_ADAPTERS=16 +# CONFIG_DVB_DYNAMIC_MINORS is not set +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set + +# +# Media drivers +# +# CONFIG_MEDIA_USB_SUPPORT is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_SH_VOU is not set +# CONFIG_VIDEO_MUX is not set +# CONFIG_VIDEO_QCOM_CAMSS is not set +# CONFIG_VIDEO_RENESAS_CEU is not set +# CONFIG_SOC_CAMERA is not set +# CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS is not set +# CONFIG_VIDEO_XILINX is not set +CONFIG_VIDEO_RCAR_CSI2=y +CONFIG_VIDEO_RCAR_VIN=y +# CONFIG_VIDEO_RCAR_VIN_DEBUG is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEDIATEK_VPU is not set +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +# CONFIG_VIDEO_SAMSUNG_S5P_G2D is not set +CONFIG_VIDEO_SAMSUNG_S5P_JPEG=m +CONFIG_VIDEO_SAMSUNG_S5P_MFC=m +CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m +# CONFIG_VIDEO_SH_VEU is not set +# CONFIG_VIDEO_RENESAS_FDP1 is not set +# CONFIG_VIDEO_RENESAS_JPU is not set +CONFIG_VIDEO_RENESAS_FCP=y +CONFIG_VIDEO_RENESAS_VSP1=y +# CONFIG_VIDEO_RENESAS_DEBUG is not set +CONFIG_VIDEO_RENESAS_VSP_ALPHA_BIT_ARGB1555=0 +# CONFIG_VIDEO_QCOM_VENUS is not set +# CONFIG_V4L_TEST_DRIVERS is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_CYPRESS_FIRMWARE is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set +CONFIG_MEDIA_ATTACH=y +CONFIG_VIDEO_IR_I2C=m + +# +# I2C Encoders, decoders, sensors and other helper chips +# + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +CONFIG_VIDEO_ADV7180=y +# CONFIG_VIDEO_ADV7183 is not set +CONFIG_VIDEO_ADV748X=y +CONFIG_VIDEO_ADV7604=y +CONFIG_VIDEO_ADV7604_CEC=y +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set + +# +# Camera sensor devices +# +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV5640 is not set +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_AS3645A is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set + +# +# SDR tuner chips +# + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set + +# +# Sensors used on soc_camera driver +# + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set +CONFIG_MEDIA_TUNER=y + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MSI001=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2063=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_MEDIA_TUNER_TDA18218=m +CONFIG_MEDIA_TUNER_FC0011=m +CONFIG_MEDIA_TUNER_FC0012=m +CONFIG_MEDIA_TUNER_FC0013=m +CONFIG_MEDIA_TUNER_TDA18212=m +CONFIG_MEDIA_TUNER_E4000=m +CONFIG_MEDIA_TUNER_FC2580=m +CONFIG_MEDIA_TUNER_M88RS6000T=m +CONFIG_MEDIA_TUNER_TUA9001=m +CONFIG_MEDIA_TUNER_SI2157=m +CONFIG_MEDIA_TUNER_IT913X=m +CONFIG_MEDIA_TUNER_R820T=m +CONFIG_MEDIA_TUNER_MXL301RF=m +CONFIG_MEDIA_TUNER_QM1D1C0042=m + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV090x=m +CONFIG_DVB_STV0910=m +CONFIG_DVB_STV6110x=m +CONFIG_DVB_STV6111=m +CONFIG_DVB_MXL5XX=m +CONFIG_DVB_M88DS3103=m + +# +# Multistandard (cable + terrestrial) frontends +# +CONFIG_DVB_DRXK=m +CONFIG_DVB_TDA18271C2DD=m +CONFIG_DVB_SI2165=m +CONFIG_DVB_MN88472=m +CONFIG_DVB_MN88473=m + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_ZL10039=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24117=m +CONFIG_DVB_CX24120=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_TS2020=m +CONFIG_DVB_DS3000=m +CONFIG_DVB_MB86A16=m +CONFIG_DVB_TDA10071=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_S5H1432=m +CONFIG_DVB_DRXD=m +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DIB9000=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_AF9013=m +CONFIG_DVB_EC100=m +CONFIG_DVB_STV0367=m +CONFIG_DVB_CXD2820R=m +CONFIG_DVB_CXD2841ER=m +CONFIG_DVB_RTL2830=m +CONFIG_DVB_RTL2832=m +CONFIG_DVB_SI2168=m +# CONFIG_DVB_AS102_FE is not set +CONFIG_DVB_ZD1301_DEMOD=m +# CONFIG_DVB_GP8PSK_FE is not set + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LGDT3306A=m +CONFIG_DVB_LG2160=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_AU8522_DTV=m +CONFIG_DVB_AU8522_V4L=m +CONFIG_DVB_S5H1411=m + +# +# ISDB-T (terrestrial) frontends +# +CONFIG_DVB_S921=m +CONFIG_DVB_DIB8000=m +CONFIG_DVB_MB86A20S=m + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +CONFIG_DVB_TC90522=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_DIB0090=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_DRX39XYJ=m +CONFIG_DVB_LNBH25=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_LNBP22=m +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_ISL6423=m +CONFIG_DVB_A8293=m +CONFIG_DVB_SP2=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LGS8GXX=m +CONFIG_DVB_ATBM8830=m +CONFIG_DVB_TDA665x=m +CONFIG_DVB_IX2505V=m +CONFIG_DVB_M88RS2000=m +CONFIG_DVB_AF9033=m +CONFIG_DVB_HORUS3A=m +CONFIG_DVB_ASCOT2E=m +CONFIG_DVB_HELENE=m + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set + +# +# Graphics support +# +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_TEGRA_HOST1X=m +CONFIG_TEGRA_HOST1X_FIREWALL=y +CONFIG_DRM=y +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_MM_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +CONFIG_DRM_TTM=m +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y +CONFIG_DRM_VM=y + +# +# I2C encoder or helper chips +# +CONFIG_DRM_I2C_CH7006=m +CONFIG_DRM_I2C_SIL164=m +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set + +# +# ACP (Audio CoProcessor) Configuration +# +CONFIG_DRM_NOUVEAU=m +CONFIG_NOUVEAU_PLATFORM_DRIVER=y +CONFIG_NOUVEAU_DEBUG=5 +CONFIG_NOUVEAU_DEBUG_DEFAULT=3 +CONFIG_DRM_NOUVEAU_BACKLIGHT=y +# CONFIG_DRM_VGEM is not set +CONFIG_DRM_EXYNOS=m + +# +# CRTCs +# +# CONFIG_DRM_EXYNOS_FIMD is not set +CONFIG_DRM_EXYNOS5433_DECON=y +CONFIG_DRM_EXYNOS7_DECON=y +# CONFIG_DRM_EXYNOS_MIXER is not set +# CONFIG_DRM_EXYNOS_VIDI is not set + +# +# Encoders and Bridges +# +CONFIG_DRM_EXYNOS_DSI=y +# CONFIG_DRM_EXYNOS_DP is not set +CONFIG_DRM_EXYNOS_HDMI=y +CONFIG_DRM_EXYNOS_MIC=y + +# +# Sub-drivers +# +# CONFIG_DRM_EXYNOS_G2D is not set +# CONFIG_DRM_EXYNOS_IPP is not set +CONFIG_DRM_ROCKCHIP=m +CONFIG_ROCKCHIP_ANALOGIX_DP=y +CONFIG_ROCKCHIP_CDN_DP=y +CONFIG_ROCKCHIP_DW_HDMI=y +CONFIG_ROCKCHIP_DW_MIPI_DSI=y +CONFIG_ROCKCHIP_INNO_HDMI=y +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +CONFIG_DRM_RCAR_DU=y +CONFIG_DRM_RCAR_DW_HDMI=y +CONFIG_DRM_RCAR_LVDS=y +CONFIG_DRM_RCAR_VSP=y +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_MSM=y +# CONFIG_DRM_MSM_REGISTER_LOGGING is not set +CONFIG_DRM_MSM_HDMI_HDCP=y +CONFIG_DRM_MSM_DSI=y +CONFIG_DRM_MSM_DSI_PLL=y +CONFIG_DRM_MSM_DSI_28NM_PHY=y +CONFIG_DRM_MSM_DSI_20NM_PHY=y +CONFIG_DRM_MSM_DSI_28NM_8960_PHY=y +CONFIG_DRM_MSM_DSI_14NM_PHY=y +CONFIG_DRM_TEGRA=m +# CONFIG_DRM_TEGRA_DEBUG is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +CONFIG_DRM_PANEL_LVDS=y +CONFIG_DRM_PANEL_SIMPLE=m +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +CONFIG_DRM_DUMB_VGA_DAC=y +# CONFIG_DRM_LVDS_ENCODER is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_SIL_SII8620 is not set +# CONFIG_DRM_SII902X is not set +CONFIG_DRM_THINE_THC63LVD1024=y +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TI_TFP410 is not set +CONFIG_DRM_ANALOGIX_DP=m +CONFIG_DRM_I2C_ADV7511=y +# CONFIG_DRM_I2C_ADV7511_AUDIO is not set +CONFIG_DRM_I2C_ADV7533=y +CONFIG_DRM_I2C_ADV7511_CEC=y +CONFIG_DRM_DW_HDMI=y +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +CONFIG_DRM_DW_HDMI_I2S_AUDIO=y +# CONFIG_DRM_DW_HDMI_CEC is not set +CONFIG_DRM_VC4=m +# CONFIG_DRM_VC4_HDMI_CEC is not set +# CONFIG_DRM_ARCPGU is not set +CONFIG_DRM_HISI_HIBMC=m +CONFIG_DRM_HISI_KIRIN=m +CONFIG_HISI_KIRIN_DW_DSI=m +# CONFIG_DRM_MEDIATEK is not set +# CONFIG_DRM_ZTE is not set +# CONFIG_DRM_MXSFB is not set +CONFIG_DRM_MESON=m +CONFIG_DRM_MESON_DW_HDMI=m +# CONFIG_DRM_TINYDRM is not set +# CONFIG_DRM_PL111 is not set +# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_LIB_RANDOM is not set + +# +# Frame buffer Devices +# +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_PROVIDE_GET_FB_UNMAPPED_AREA is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +CONFIG_FB_BACKLIGHT=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +CONFIG_FB_ARMCLCD=y +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_EFI is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SH_MOBILE_LCDC is not set +# CONFIG_FB_S3C is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_XILINX is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_XEN_FBDEV_FRONTEND=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_AUO_K190X is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=m +# CONFIG_LCD_L4F00242T03 is not set +# CONFIG_LCD_LMS283GF05 is not set +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI922X is not set +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +# CONFIG_LCD_PLATFORM is not set +# CONFIG_LCD_S6E63M0 is not set +# CONFIG_LCD_LD9040 is not set +# CONFIG_LCD_AMS369FG06 is not set +# CONFIG_LCD_LMS501KF03 is not set +# CONFIG_LCD_HX8357 is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=m +CONFIG_BACKLIGHT_PWM=m +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +CONFIG_BACKLIGHT_LP855X=m +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1_SEQ is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SE6X is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# HD-Audio +# +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDA_TEGRA is not set +CONFIG_SND_HDA_PREALLOC_SIZE=64 +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +CONFIG_SND_BCM2835_SOC_I2S=m +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_KIRKWOOD_SOC is not set +# CONFIG_SND_SOC_IMG is not set +# CONFIG_SND_SOC_MT2701 is not set +# CONFIG_SND_SOC_MT8173 is not set +# CONFIG_SND_SOC_QCOM is not set +# CONFIG_SND_SOC_ROCKCHIP is not set +CONFIG_SND_SOC_SAMSUNG=y +# CONFIG_SND_SAMSUNG_PCM is not set +# CONFIG_SND_SAMSUNG_SPDIF is not set +# CONFIG_SND_SAMSUNG_I2S is not set +# CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994 is not set +# CONFIG_SND_SOC_SAMSUNG_SMDK_SPDIF is not set +# CONFIG_SND_SOC_SMDK_WM8994_PCM is not set +# CONFIG_SND_SOC_SNOW is not set +# CONFIG_SND_SOC_ODROID is not set +# CONFIG_SND_SOC_ARNDALE_RT5631_ALC5631 is not set + +# +# SoC Audio support for Renesas SoCs +# +# CONFIG_SND_SOC_SH4_FSI is not set +CONFIG_SND_SOC_RCAR=y + +# +# STMicroelectronics STM32 SOC audio support +# + +# +# Allwinner SoC Audio support +# +# CONFIG_SND_SUN4I_CODEC is not set +# CONFIG_SND_SUN8I_CODEC_ANALOG is not set +# CONFIG_SND_SUN4I_I2S is not set +# CONFIG_SND_SUN4I_SPDIF is not set +# CONFIG_SND_SOC_TEGRA is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_SPDIF is not set +# CONFIG_ZX_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4554 is not set +CONFIG_SND_SOC_AK4613=y +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_DIO2125 is not set +CONFIG_SND_SOC_HDMI_CODEC=y +# CONFIG_SND_SOC_ES7134 is not set +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX98927 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM3168A_I2C is not set +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_RT5677_SPI is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +# CONFIG_SND_SOC_SPDIF is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +CONFIG_SND_SIMPLE_CARD_UTILS=y +CONFIG_SND_SIMPLE_CARD=y +# CONFIG_SND_SIMPLE_SCU_CARD is not set +CONFIG_SND_AUDIO_GRAPH_CARD=y +# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=y +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +CONFIG_HID_APPLE=y +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +CONFIG_HID_BELKIN=y +# CONFIG_HID_BETOP_FF is not set +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +CONFIG_HID_CYPRESS=y +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +CONFIG_HID_EZKEY=y +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +CONFIG_HID_ITE=y +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_HIDPP is not set +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +# CONFIG_LOGIG940_FF is not set +# CONFIG_LOGIWHEELS_FF is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MAYFLASH is not set +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_XHCI_PLATFORM=y +# CONFIG_USB_XHCI_MTK is not set +# CONFIG_USB_XHCI_MVEBU is not set +CONFIG_USB_XHCI_RCAR=y +CONFIG_USB_XHCI_TEGRA=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +CONFIG_USB_EHCI_HCD_ORION=y +# CONFIG_USB_EHCI_MSM is not set +# CONFIG_USB_EHCI_TEGRA is not set +CONFIG_USB_EHCI_EXYNOS=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_EXYNOS=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_RENESAS_USBHS_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set +CONFIG_USB_RENESAS_USBHS=y + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_MTU3 is not set +CONFIG_USB_MUSB_HDRC=y +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_DUAL_ROLE=y + +# +# Platform Glue Layer +# +CONFIG_USB_MUSB_SUNXI=y + +# +# MUSB DMA mode +# +# CONFIG_MUSB_PIO_ONLY is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_ULPI is not set +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_EXYNOS=y +CONFIG_USB_DWC3_PCI=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_OF=y +CONFIG_USB_CHIPIDEA_PCI=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_ULPI=y +CONFIG_USB_ISP1760=y +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_ISP1761_UDC=y +# CONFIG_USB_ISP1760_HOST_ROLE is not set +# CONFIG_USB_ISP1760_GADGET_ROLE is not set +CONFIG_USB_ISP1760_DUAL_ROLE=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +CONFIG_USB_HSIC_USB3503=y +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +CONFIG_NOP_USB_XCEIV=y +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_MSM_OTG is not set +# CONFIG_USB_QCOM_8X16_PHY is not set +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +CONFIG_USB_RENESAS_USBHS_UDC=y +CONFIG_USB_RENESAS_USB3=m +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +CONFIG_USB_SNP_CORE=y +CONFIG_USB_SNP_UDC_PLAT=y +# CONFIG_USB_M66592 is not set +CONFIG_USB_BDC_UDC=y + +# +# Platform Support +# +CONFIG_USB_BDC_PCI=y +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_DUMMY_HCD is not set +# CONFIG_USB_CONFIGFS is not set + +# +# USB Power Delivery and Type-C drivers +# +# CONFIG_TYPEC_UCSI is not set +# CONFIG_USB_LED_TRIG is not set +CONFIG_USB_ULPI_BUS=y +CONFIG_USB_ROLE_SWITCH=m +# CONFIG_UWB is not set +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_QCOM_DML=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_ACPI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_AT91 is not set +CONFIG_MMC_SDHCI_OF_ESDHC=y +CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SDHCI_TEGRA=y +# CONFIG_MMC_SDHCI_PXAV3 is not set +CONFIG_MMC_SDHCI_F_SDH30=y +CONFIG_MMC_SDHCI_IPROC=y +CONFIG_MMC_MESON_GX=y +CONFIG_MMC_SDHCI_MSM=y +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MMC_SPI=y +CONFIG_MMC_TMIO_CORE=y +CONFIG_MMC_SDHI=y +# CONFIG_MMC_SDHI_SYS_DMAC is not set +CONFIG_MMC_SDHI_INTERNAL_DMAC=y +# CONFIG_MMC_SDHI_PIO is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_CAVIUM_THUNDERX is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +CONFIG_MMC_DW_EXYNOS=y +CONFIG_MMC_DW_K3=y +# CONFIG_MMC_DW_PCI is not set +CONFIG_MMC_DW_ROCKCHIP=y +# CONFIG_MMC_DW_ZX is not set +# CONFIG_MMC_SH_MMCIF is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_SUNXI=y +# CONFIG_MMC_TOSHIBA_PCI is not set +CONFIG_MMC_BCM2835=y +# CONFIG_MMC_MTK is not set +CONFIG_MMC_SDHCI_BRCMSTB=y +CONFIG_MMC_SDHCI_XENON=y +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +CONFIG_LEDS_PWM=y +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +CONFIG_LEDS_SYSCON=y +# CONFIG_LEDS_USER is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +CONFIG_LEDS_TRIGGER_DISK=y +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +CONFIG_LEDS_TRIGGER_CPU=y +# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +CONFIG_LEDS_TRIGGER_PANIC=y +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_GHES=y +# CONFIG_EDAC_LAYERSCAPE is not set +# CONFIG_EDAC_THUNDERX is not set +# CONFIG_EDAC_XGENE is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABX80X is not set +CONFIG_RTC_DRV_BRCMSTB=y +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_MAX77686=y +CONFIG_RTC_DRV_RK808=m +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV8803 is not set +CONFIG_RTC_DRV_S5M=y + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS3232_HWMON=y +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +CONFIG_HAVE_S3C_RTC=y +CONFIG_RTC_DRV_S3C=y +# CONFIG_RTC_DRV_SH is not set +# CONFIG_RTC_DRV_PL030 is not set +CONFIG_RTC_DRV_PL031=y +CONFIG_RTC_DRV_SUN6I=y +# CONFIG_RTC_DRV_MV is not set +CONFIG_RTC_DRV_ARMADA38X=y +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_PM8XXX is not set +CONFIG_RTC_DRV_TEGRA=y +# CONFIG_RTC_DRV_SNVS is not set +CONFIG_RTC_DRV_XGENE=y +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_ACPI=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +CONFIG_BCM_SBA_RAID=m +CONFIG_DMA_BCM2835=m +# CONFIG_DMA_SUN6I is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +CONFIG_K3_DMA=y +# CONFIG_MV_XOR is not set +CONFIG_MV_XOR_V2=y +CONFIG_PL330_DMA=y +CONFIG_TEGRA20_APB_DMA=y +# CONFIG_TEGRA210_ADMA is not set +# CONFIG_XGENE_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +# CONFIG_ZX_DMA is not set +CONFIG_QCOM_BAM_DMA=y +CONFIG_QCOM_HIDMA_MGMT=y +CONFIG_QCOM_HIDMA=y +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +CONFIG_RENESAS_DMA=y +CONFIG_SH_DMAE_BASE=y +# CONFIG_SH_DMAE is not set +CONFIG_RCAR_DMAC=y +CONFIG_RENESAS_USB_DMAC=y +# CONFIG_SUDMAC is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +CONFIG_VFIO_IOMMU_TYPE1=y +CONFIG_VFIO_VIRQFD=y +CONFIG_VFIO=y +# CONFIG_VFIO_NOIOMMU is not set +CONFIG_VFIO_PCI=y +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +# CONFIG_VFIO_PLATFORM is not set +# CONFIG_VFIO_MDEV is not set +CONFIG_IRQ_BYPASS_MANAGER=y +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y + +# +# Virtio drivers +# +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_INPUT is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set + +# +# Microsoft Hyper-V guest support +# +# CONFIG_HYPERV_TSCPAGE is not set + +# +# Xen driver support +# +CONFIG_XEN_BALLOON=y +CONFIG_XEN_SCRUB_PAGES=y +CONFIG_XEN_DEV_EVTCHN=y +CONFIG_XEN_BACKEND=y +CONFIG_XENFS=y +CONFIG_XEN_COMPAT_XENFS=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XEN_XENBUS_FRONTEND=y +CONFIG_XEN_GNTDEV=y +CONFIG_XEN_GRANT_DEV_ALLOC=y +CONFIG_SWIOTLB_XEN=y +# CONFIG_XEN_PVCALLS_BACKEND is not set +CONFIG_XEN_PRIVCMD=y +CONFIG_XEN_EFI=y +CONFIG_XEN_AUTO_XLATE=y +# CONFIG_STAGING is not set +# CONFIG_GOLDFISH is not set +CONFIG_CHROME_PLATFORMS=y +# CONFIG_CROS_EC_CHARDEV is not set +CONFIG_CROS_EC_PROTO=y +# CONFIG_CROS_KBD_LED_BACKLIGHT is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +CONFIG_COMMON_CLK_VERSATILE=y +CONFIG_CLK_SP810=y +CONFIG_CLK_VEXPRESS_OSC=y +# CONFIG_CLK_HSDK is not set +# CONFIG_COMMON_CLK_MAX77686 is not set +CONFIG_COMMON_CLK_RK808=y +# CONFIG_COMMON_CLK_HI655X is not set +CONFIG_COMMON_CLK_SCPI=y +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +CONFIG_COMMON_CLK_CS2000_CP=y +CONFIG_COMMON_CLK_S2MPS11=y +CONFIG_CLK_QORIQ=y +CONFIG_COMMON_CLK_XGENE=y +# CONFIG_COMMON_CLK_NXP is not set +CONFIG_COMMON_CLK_PWM=y +# CONFIG_COMMON_CLK_PXA is not set +# CONFIG_COMMON_CLK_PIC32 is not set +CONFIG_COMMON_CLK_VC5=y +CONFIG_COMMON_CLK_IPROC=y +CONFIG_CLK_BCM_NS2=y +CONFIG_CLK_BCM_SR=y +CONFIG_COMMON_CLK_HI3516CV300=y +CONFIG_COMMON_CLK_HI3519=y +CONFIG_COMMON_CLK_HI3660=y +CONFIG_COMMON_CLK_HI3798CV200=y +CONFIG_COMMON_CLK_HI6220=y +CONFIG_RESET_HISI=y +CONFIG_STUB_CLK_HI6220=y +CONFIG_COMMON_CLK_MEDIATEK=y +CONFIG_COMMON_CLK_MT6797=y +# CONFIG_COMMON_CLK_MT6797_MMSYS is not set +# CONFIG_COMMON_CLK_MT6797_IMGSYS is not set +# CONFIG_COMMON_CLK_MT6797_VDECSYS is not set +# CONFIG_COMMON_CLK_MT6797_VENCSYS is not set +CONFIG_COMMON_CLK_MT8173=y +CONFIG_COMMON_CLK_AMLOGIC=y +CONFIG_COMMON_CLK_GXBB=y +CONFIG_ARMADA_37XX_CLK=y +CONFIG_ARMADA_AP806_SYSCON=y +CONFIG_ARMADA_CP110_SYSCON=y +CONFIG_QCOM_GDSC=y +CONFIG_QCOM_RPMCC=y +CONFIG_COMMON_CLK_QCOM=y +CONFIG_QCOM_CLK_SMD_RPM=y +# CONFIG_APQ_GCC_8084 is not set +# CONFIG_APQ_MMCC_8084 is not set +# CONFIG_IPQ_GCC_4019 is not set +# CONFIG_IPQ_GCC_806X is not set +# CONFIG_IPQ_LCC_806X is not set +CONFIG_IPQ_GCC_8074=y +# CONFIG_MSM_GCC_8660 is not set +CONFIG_MSM_GCC_8916=y +# CONFIG_MSM_GCC_8960 is not set +# CONFIG_MSM_LCC_8960 is not set +# CONFIG_MDM_GCC_9615 is not set +# CONFIG_MDM_LCC_9615 is not set +# CONFIG_MSM_MMCC_8960 is not set +# CONFIG_MSM_GCC_8974 is not set +# CONFIG_MSM_MMCC_8974 is not set +CONFIG_MSM_GCC_8994=y +CONFIG_MSM_GCC_8996=y +CONFIG_MSM_MMCC_8996=y +CONFIG_CLK_RENESAS=y +CONFIG_CLK_R8A7795=y +CONFIG_CLK_R8A7796=y +CONFIG_CLK_R8A77965=y +CONFIG_CLK_R8A77970=y +CONFIG_CLK_R8A77980=y +CONFIG_CLK_R8A77990=y +CONFIG_CLK_R8A77995=y +CONFIG_CLK_RCAR_GEN3_CPG=y +# CONFIG_CLK_RCAR_USB2_CLOCK_SEL is not set +CONFIG_CLK_RENESAS_CPG_MSSR=y +CONFIG_CLK_RENESAS_DIV6=y +CONFIG_COMMON_CLK_SAMSUNG=y +CONFIG_EXYNOS_ARM64_COMMON_CLK=y +CONFIG_EXYNOS_AUDSS_CLK_CON=y +CONFIG_SUNXI_CCU=y +CONFIG_SUN50I_A64_CCU=y +# CONFIG_SUN8I_A83T_CCU is not set +CONFIG_SUN8I_H3_CCU=y +# CONFIG_SUN8I_DE2_CCU is not set +CONFIG_SUN8I_R_CCU=y +CONFIG_CLK_TEGRA_BPMP=y +CONFIG_CLK_UNIPHIER=y +CONFIG_HWSPINLOCK=y +CONFIG_HWSPINLOCK_QCOM=y +# CONFIG_HWSPINLOCK_SPRD is not set +CONFIG_HWSPINLOCK_RCAR=y + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_ACPI=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_ROCKCHIP_TIMER=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +CONFIG_ARM_TIMER_SP804=y +# CONFIG_ATMEL_PIT is not set +CONFIG_MTK_TIMER=y +# CONFIG_SH_TIMER_CMT is not set +# CONFIG_SH_TIMER_MTU2 is not set +# CONFIG_SH_TIMER_TMU is not set +# CONFIG_EM_TIMER_STI is not set +CONFIG_CLKSRC_VERSATILE=y +CONFIG_MAILBOX=y +CONFIG_ARM_MHU=y +CONFIG_PLATFORM_MHU=y +# CONFIG_PL320_MBOX is not set +# CONFIG_ROCKCHIP_MBOX is not set +CONFIG_PCC=y +# CONFIG_ALTERA_MBOX is not set +CONFIG_BCM2835_MBOX=y +CONFIG_HI6220_MBOX=y +# CONFIG_MAILBOX_TEST is not set +CONFIG_QCOM_APCS_IPC=y +CONFIG_TEGRA_HSP_MBOX=y +# CONFIG_XGENE_SLIMPRO_MBOX is not set +# CONFIG_BCM_PDC_MBOX is not set +CONFIG_BCM_FLEXRM_MBOX=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +CONFIG_IOMMU_IOVA=y +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ROCKCHIP_IOMMU=y +CONFIG_TEGRA_IOMMU_SMMU=y +# CONFIG_EXYNOS_IOMMU is not set +CONFIG_IPMMU_VMSA=y +CONFIG_IPMMU_VMSA_CTX_NUM=8 +CONFIG_IPMMU_VMSA_WHITELIST=y +CONFIG_ARM_SMMU=y +CONFIG_ARM_SMMU_V3=y +# CONFIG_MTK_IOMMU is not set +# CONFIG_QCOM_IOMMU is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set + +# +# Rpmsg drivers +# +CONFIG_RPMSG=y +# CONFIG_RPMSG_CHAR is not set +# CONFIG_RPMSG_QCOM_GLINK_RPM is not set +# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set +CONFIG_RPMSG_QCOM_SMD=y + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +CONFIG_MESON_GX_SOCINFO=y + +# +# Broadcom SoC drivers +# +CONFIG_RASPBERRYPI_POWER=y +# CONFIG_SOC_BRCMSTB is not set +CONFIG_FSL_GUTS=y + +# +# i.MX SoC drivers +# +CONFIG_MTK_INFRACFG=y +# CONFIG_MTK_PMIC_WRAP is not set +CONFIG_MTK_SCPSYS=y + +# +# Qualcomm SoC drivers +# +# CONFIG_QCOM_GSBI is not set +CONFIG_QCOM_MDT_LOADER=y +CONFIG_QCOM_SMEM=y +CONFIG_QCOM_SMD_RPM=y +CONFIG_QCOM_SMEM_STATE=y +CONFIG_QCOM_SMP2P=y +CONFIG_QCOM_SMSM=y +# CONFIG_QCOM_WCNSS_CTRL is not set +CONFIG_SOC_RENESAS=y +CONFIG_RCAR_CPU_TOPOLOGY=y +CONFIG_SYSC_R8A7795=y +CONFIG_SYSC_R8A7796=y +CONFIG_SYSC_R8A77965=y +CONFIG_SYSC_R8A77970=y +CONFIG_SYSC_R8A77980=y +CONFIG_SYSC_R8A77990=y +CONFIG_SYSC_R8A77995=y +CONFIG_RST_RCAR=y +CONFIG_SYSC_RCAR=y +CONFIG_RCAR_THERMAL_EMS=y +CONFIG_RCAR_POWER_AVS=y +CONFIG_ROCKCHIP_GRF=y +CONFIG_ROCKCHIP_PM_DOMAINS=y +CONFIG_SOC_SAMSUNG=y +CONFIG_EXYNOS_PMU=y +CONFIG_EXYNOS_PM_DOMAINS=y +CONFIG_SUNXI_SRAM=y +CONFIG_ARCH_TEGRA_132_SOC=y +CONFIG_ARCH_TEGRA_210_SOC=y +CONFIG_ARCH_TEGRA_186_SOC=y +CONFIG_SOC_TEGRA_FUSE=y +CONFIG_SOC_TEGRA_FLOWCTRL=y +CONFIG_SOC_TEGRA_PMC=y +CONFIG_SOC_TEGRA_PMC_TEGRA186=y +CONFIG_SOC_TEGRA_POWERGATE_BPMP=y +# CONFIG_SOC_TI is not set +# CONFIG_SOC_ZTE is not set +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +CONFIG_DEVFREQ_GOV_PASSIVE=y + +# +# DEVFREQ Drivers +# +# CONFIG_ARM_EXYNOS_BUS_DEVFREQ is not set +# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_AXP288 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +# CONFIG_EXTCON_QCOM_SPMI_MISC is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +CONFIG_EXTCON_USB_GPIO=y +# CONFIG_EXTCON_USBC_CROS_EC is not set +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_TEGRA_MC=y +CONFIG_IIO=y +# CONFIG_IIO_BUFFER is not set +# CONFIG_IIO_CONFIGFS is not set +# CONFIG_IIO_TRIGGER is not set +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set + +# +# Accelerometers +# +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD799X is not set +# CONFIG_AXP20X_ADC is not set +# CONFIG_AXP288_ADC is not set +# CONFIG_BCM_IPROC_ADC is not set +# CONFIG_BERLIN2_ADC is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +CONFIG_EXYNOS_ADC=y +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MEDIATEK_MT6577_AUXADC is not set +CONFIG_MESON_SARADC=y +# CONFIG_NAU7802 is not set +# CONFIG_QCOM_SPMI_IADC is not set +# CONFIG_QCOM_SPMI_VADC is not set +CONFIG_ROCKCHIP_SARADC=m +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set + +# +# Amplifiers +# +# CONFIG_AD8366 is not set + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_VZ89X is not set +# CONFIG_IIO_CROS_EC_SENSORS_CORE is not set + +# +# Hid Sensor IIO Common +# + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set + +# +# Counters +# + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_LTC2632 is not set +# CONFIG_AD5686 is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_VF610_DAC is not set + +# +# IIO dummy driver +# + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set + +# +# Light sensors +# +# CONFIG_ACPI_ALS is not set +# CONFIG_ADJD_S311 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP020A00F is not set +# CONFIG_SENSORS_ISL29018 is not set +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_MAX44000 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set + +# +# Inclinometer sensors +# + +# +# Digital potentiometers +# +# CONFIG_DS1803 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_TPL0102 is not set + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +# CONFIG_HP03 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set + +# +# Proximity and distance sensors +# +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set + +# +# Temperature sensors +# +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +CONFIG_PWM_BCM_IPROC=y +CONFIG_PWM_BCM2835=m +# CONFIG_PWM_BERLIN is not set +# CONFIG_PWM_BRCMSTB is not set +CONFIG_PWM_CROS_EC=m +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_HIBVT is not set +CONFIG_PWM_MESON=m +# CONFIG_PWM_MTK_DISP is not set +# CONFIG_PWM_MEDIATEK is not set +# CONFIG_PWM_PCA9685 is not set +CONFIG_PWM_RCAR=y +# CONFIG_PWM_RENESAS_TPU is not set +CONFIG_PWM_ROCKCHIP=y +CONFIG_PWM_SAMSUNG=y +# CONFIG_PWM_SUN4I is not set +CONFIG_PWM_TEGRA=m +# CONFIG_PWM_ZX is not set +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ALPINE_MSI=y +CONFIG_BRCMSTB_L2_IRQ=y +CONFIG_DW_APB_ICTL=y +CONFIG_HISILICON_IRQ_MBIGEN=y +CONFIG_RENESAS_IRQC=y +CONFIG_MVEBU_GICP=y +CONFIG_MVEBU_ICU=y +CONFIG_MVEBU_ODMI=y +CONFIG_MVEBU_PIC=y +CONFIG_LS_SCFG_MSI=y +CONFIG_PARTITION_PERCPU=y +CONFIG_QCOM_IRQ_COMBINER=y +CONFIG_IRQ_UNIPHIER_AIDET=y +# CONFIG_IPACK_BUS is not set +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_ATH79 is not set +CONFIG_RESET_BERLIN=y +# CONFIG_RESET_IMX7 is not set +# CONFIG_RESET_LANTIQ is not set +# CONFIG_RESET_LPC18XX is not set +CONFIG_RESET_MESON=y +# CONFIG_RESET_PISTACHIO is not set +CONFIG_RESET_SOCFPGA=y +# CONFIG_RESET_STM32 is not set +CONFIG_RESET_SUNXI=y +# CONFIG_RESET_TI_SYSCON is not set +CONFIG_RESET_UNIPHIER=y +# CONFIG_RESET_ZX2967 is not set +# CONFIG_RESET_ZYNQ is not set +CONFIG_COMMON_RESET_HI3660=y +CONFIG_COMMON_RESET_HI6220=y +CONFIG_RESET_TEGRA_BPMP=y +# CONFIG_FMC is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_PHY_XGENE=y +CONFIG_PHY_SUN4I_USB=y +# CONFIG_PHY_SUN9I_USB is not set +CONFIG_PHY_MESON8B_USB2=y +CONFIG_PHY_MESON_GXL_USB2=y +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_BCM_NS_USB2 is not set +# CONFIG_PHY_BCM_NS_USB3 is not set +CONFIG_PHY_NS2_PCIE=y +CONFIG_PHY_NS2_USB_DRD=y +CONFIG_PHY_BRCM_SATA=y +CONFIG_PHY_HI6220_USB=y +# CONFIG_PHY_BERLIN_SATA is not set +# CONFIG_PHY_BERLIN_USB is not set +CONFIG_PHY_MVEBU_CP110_COMPHY=y +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_MTK_TPHY is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_QCOM_APQ8064_SATA is not set +# CONFIG_PHY_QCOM_IPQ806X_SATA is not set +# CONFIG_PHY_QCOM_QMP is not set +# CONFIG_PHY_QCOM_QUSB2 is not set +# CONFIG_PHY_QCOM_UFS is not set +CONFIG_PHY_QCOM_USB_HS=y +# CONFIG_PHY_QCOM_USB_HSIC is not set +# CONFIG_PHY_RCAR_GEN2 is not set +CONFIG_PHY_RCAR_GEN3_USB2=y +CONFIG_PHY_RCAR_GEN3_USB3=y +# CONFIG_PHY_ROCKCHIP_DP is not set +CONFIG_PHY_ROCKCHIP_EMMC=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_PCIE=m +# CONFIG_PHY_ROCKCHIP_TYPEC is not set +# CONFIG_PHY_ROCKCHIP_USB is not set +CONFIG_PHY_EXYNOS_DP_VIDEO=y +CONFIG_PHY_EXYNOS_MIPI_VIDEO=y +# CONFIG_PHY_EXYNOS_PCIE is not set +CONFIG_PHY_SAMSUNG_USB2=y +# CONFIG_PHY_EXYNOS4210_USB2 is not set +# CONFIG_PHY_EXYNOS4X12_USB2 is not set +# CONFIG_PHY_EXYNOS5250_USB2 is not set +CONFIG_PHY_EXYNOS5_USBDRD=y +CONFIG_PHY_TEGRA_XUSB=y +# CONFIG_PHY_TUSB1210 is not set +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_PMU=y +CONFIG_ARM_PMU_ACPI=y +CONFIG_QCOM_L2_PMU=y +CONFIG_QCOM_L3_PMU=y +# CONFIG_XGENE_PMU is not set +CONFIG_RAS=y + +# +# Android +# +# CONFIG_ANDROID is not set +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +# CONFIG_MTK_EFUSE is not set +CONFIG_QCOM_QFPROM=y +# CONFIG_ROCKCHIP_EFUSE is not set +CONFIG_NVMEM_BCM_OCOTP=y +# CONFIG_NVMEM_SUNXI_SID is not set +CONFIG_MESON_EFUSE=m +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# CONFIG_FPGA is not set + +# +# FSI support +# +# CONFIG_FSI is not set +CONFIG_TEE=y + +# +# TEE drivers +# +CONFIG_OPTEE=y + +# +# Firmware Drivers +# +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_DMIID=y +# CONFIG_DMI_SYSFS is not set +CONFIG_RASPBERRYPI_FIRMWARE=y +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_QCOM_SCM=y +CONFIG_QCOM_SCM_64=y +CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +# CONFIG_EFI_VARS is not set +CONFIG_EFI_ESRT=y +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_ARMSTUB=y +CONFIG_EFI_CAPSULE_LOADER=y +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +CONFIG_UEFI_CPER=y +# CONFIG_EFI_DEV_PATH_PARSER is not set +CONFIG_MESON_SM=y + +# +# Tegra firmware driver +# +CONFIG_TEGRA_IVC=y +CONFIG_TEGRA_BPMP=y +CONFIG_ACPI=y +CONFIG_ACPI_GENERIC_GSI=y +CONFIG_ACPI_CCA_REQUIRED=y +# CONFIG_ACPI_DEBUGGER is not set +CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_MCFG=y +CONFIG_ACPI_CPPC_LIB=y +CONFIG_ACPI_PROCESSOR=y +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_THERMAL=y +CONFIG_ACPI_NUMA=y +# CONFIG_ACPI_CUSTOM_DSDT is not set +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_HED=y +# CONFIG_ACPI_CUSTOM_METHOD is not set +# CONFIG_ACPI_BGRT is not set +CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y +CONFIG_HAVE_ACPI_APEI=y +CONFIG_ACPI_APEI=y +CONFIG_ACPI_APEI_GHES=y +CONFIG_ACPI_APEI_PCIEAER=y +CONFIG_ACPI_APEI_SEA=y +CONFIG_ACPI_APEI_MEMORY_FAILURE=y +CONFIG_ACPI_APEI_EINJ=y +# CONFIG_ACPI_APEI_ERST_DEBUG is not set +# CONFIG_PMIC_OPREGION is not set +# CONFIG_ACPI_CONFIGFS is not set +CONFIG_ACPI_IORT=y +CONFIG_ACPI_GTDT=y + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_ENCRYPTION is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +# CONFIG_OVERLAY_FS_INDEX is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_VMCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=y +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +# CONFIG_SQUASHFS_XZ is not set +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_ZLIB_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_CONSOLE is not set +# CONFIG_PSTORE_PMSG is not set +# CONFIG_PSTORE_RAM is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=y +# CONFIG_9P_FS_POSIX_ACL is not set +# CONFIG_9P_FS_SECURITY is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_HAVE_KVM_IRQFD=y +CONFIG_HAVE_KVM_IRQ_ROUTING=y +CONFIG_HAVE_KVM_EVENTFD=y +CONFIG_KVM_MMIO=y +CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y +CONFIG_KVM_VFIO=y +CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y +CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_KVM_COMPAT=y +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=y +CONFIG_KVM_ARM_HOST=y +CONFIG_KVM_ARM_PMU=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_PAGE_OWNER is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +# CONFIG_KASAN is not set +CONFIG_ARCH_HAS_KCOV=y +# CONFIG_KCOV is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +# CONFIG_SOFTLOCKUP_DETECTOR is not set +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHED_INFO=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_TIMEKEEPING is not set +# CONFIG_DEBUG_PREEMPT is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PI_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_PROVE_RCU is not set +# CONFIG_TORTURE_TEST is not set +# CONFIG_RCU_PERF_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DMA_API_DEBUG is not set + +# +# Runtime Testing +# +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +CONFIG_MEMTEST=y +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_ARCH_WANTS_UBSAN_NO_NULL is not set +# CONFIG_UBSAN is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +# CONFIG_STRICT_DEVMEM is not set +# CONFIG_ARM64_PTDUMP_CORE is not set +# CONFIG_ARM64_PTDUMP_DEBUGFS is not set +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +# CONFIG_DEBUG_WX is not set +# CONFIG_DEBUG_ALIGN_RODATA is not set +# CONFIG_DEBUG_EFI is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_COMPAT=y +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +# CONFIG_SECURITY_WRITABLE_HOOKS is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +# CONFIG_SECURITY_YAMA is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +CONFIG_INTEGRITY_AUDIT=y +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y +CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=m +CONFIG_CRYPTO_ACOMP2=y +# CONFIG_CRYPTO_RSA is not set +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECDH=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_CRYPTD=y +# CONFIG_CRYPTO_MCRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_ENGINE=m + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +CONFIG_CRYPTO_CTR=m +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=m +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=m +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=m +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +CONFIG_CRYPTO_CHACHA20=m +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_MARVELL_CESA is not set +# CONFIG_CRYPTO_DEV_FSL_CAAM is not set +# CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC is not set +# CONFIG_CRYPTO_DEV_EXYNOS_RNG is not set +# CONFIG_CRYPTO_DEV_S5P is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CAVIUM_CPT is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +# CONFIG_CRYPTO_DEV_QCE is not set +# CONFIG_CRYPTO_DEV_ROCKCHIP is not set +CONFIG_CRYPTO_DEV_VIRTIO=m +CONFIG_CRYPTO_DEV_BCM_SPU=m +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_ASYMMETRIC_KEY_TYPE is not set + +# +# Certificates for signature checking +# +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA512_ARM64=m +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m +CONFIG_CRYPTO_CRC32_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m +CONFIG_CRYPTO_CHACHA20_NEON=m +CONFIG_CRYPTO_AES_ARM64_BS=m +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +# CONFIG_CRC_CCITT is not set +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=m +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_AUDIT_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=m +CONFIG_ZSTD_DECOMPRESS=m +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_RADIX_TREE_MULTIORDER=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +# CONFIG_DMA_NOOP_OPS is not set +# CONFIG_DMA_VIRT_OPS is not set +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +# CONFIG_IRQ_POLL is not set +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_SG_SPLIT is not set +CONFIG_SG_POOL=y +CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/iccom.cfg b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/iccom.cfg new file mode 100644 index 00000000..a3923c19 --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/iccom.cfg @@ -0,0 +1 @@ +CONFIG_RPMSG_VIRTIO=y diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/touch.cfg b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/touch.cfg new file mode 100644 index 00000000..327c753a --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/touch.cfg @@ -0,0 +1 @@ +CONFIG_HID_MULTITOUCH=y diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/usb-video-class.cfg b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/usb-video-class.cfg new file mode 100644 index 00000000..7446787d --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/usb-video-class.cfg @@ -0,0 +1,68 @@ +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=y +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set diff --git a/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/usb3.cfg b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/usb3.cfg new file mode 100644 index 00000000..f58b942c --- /dev/null +++ b/bsp/meta-renesas-rcar-gen3/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/usb3.cfg @@ -0,0 +1,4 @@ +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="r8a779x_usb3_v2.dlmem r8a779x_usb3_v3.dlmem" +CONFIG_EXTRA_FIRMWARE_DIR="firmware" |