diff options
author | takeshi_hoshina <takeshi_hoshina@mail.toyota.co.jp> | 2020-11-02 11:07:33 +0900 |
---|---|---|
committer | takeshi_hoshina <takeshi_hoshina@mail.toyota.co.jp> | 2020-11-02 11:07:33 +0900 |
commit | 1c7d6584a7811b7785ae5c1e378f14b5ba0971cf (patch) | |
tree | cd70a267a5ef105ba32f200aa088e281fbd85747 /bsp/meta-sancloud/dynamic-layers/meta-kernel/recipes-kernel/linux | |
parent | 4204309872da5cb401cbb2729d9e2d4869a87f42 (diff) |
basesystem-jjsandbox/ToshikazuOhiwa/master-jj
recipes
Diffstat (limited to 'bsp/meta-sancloud/dynamic-layers/meta-kernel/recipes-kernel/linux')
2 files changed, 612 insertions, 0 deletions
diff --git a/bsp/meta-sancloud/dynamic-layers/meta-kernel/recipes-kernel/linux/linux-stable/0001-arm-dts-Update-SanCloud-DTS-files.patch b/bsp/meta-sancloud/dynamic-layers/meta-kernel/recipes-kernel/linux/linux-stable/0001-arm-dts-Update-SanCloud-DTS-files.patch new file mode 100644 index 00000000..af489edb --- /dev/null +++ b/bsp/meta-sancloud/dynamic-layers/meta-kernel/recipes-kernel/linux/linux-stable/0001-arm-dts-Update-SanCloud-DTS-files.patch @@ -0,0 +1,609 @@ +From eee32ba116512ecb5297b5395c8a9e89dafabfe5 Mon Sep 17 00:00:00 2001 +From: Paul Barker <paul.barker@sancloud.co.uk> +Date: Sat, 23 May 2020 10:46:43 +0100 +Subject: [PATCH] arm: dts: Update SanCloud DTS files + +Signed-off-by: Paul Barker <paul.barker@sancloud.co.uk> +--- + .../boot/dts/am335x-sancloud-bbe-common.dtsi | 128 +++++++++++ + .../arm/boot/dts/am335x-sancloud-bbe-icu4.dts | 198 ++++++++++++++++++ + arch/arm/boot/dts/am335x-sancloud-bbe.dts | 124 +---------- + .../boot/dts/am335x-sancloud-bbei-wifi.dts | 109 ++++++++++ + 4 files changed, 436 insertions(+), 123 deletions(-) + create mode 100644 arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi + create mode 100644 arch/arm/boot/dts/am335x-sancloud-bbe-icu4.dts + create mode 100644 arch/arm/boot/dts/am335x-sancloud-bbei-wifi.dts + +diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi b/arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi +new file mode 100644 +index 000000000000..74092cfbd56c +--- /dev/null ++++ b/arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi +@@ -0,0 +1,128 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ ++ */ ++ ++#include <dt-bindings/interrupt-controller/irq.h> ++ ++&am33xx_pinmux { ++ pinctrl-names = "default"; ++ ++ cpsw_default: cpsw_default { ++ pinctrl-single,pins = < ++ /* Slave 1 */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ ++ >; ++ }; ++ ++ cpsw_sleep: cpsw_sleep { ++ pinctrl-single,pins = < ++ /* Slave 1 reset value */ ++ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ >; ++ }; ++ ++ davinci_mdio_default: davinci_mdio_default { ++ pinctrl-single,pins = < ++ /* MDIO */ ++ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) ++ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) ++ >; ++ }; ++ ++ davinci_mdio_sleep: davinci_mdio_sleep { ++ pinctrl-single,pins = < ++ /* MDIO reset value */ ++ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) ++ >; ++ }; ++ ++ usb_hub_ctrl: usb_hub_ctrl { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */ ++ >; ++ }; ++ ++ mpu6050_pins: pinmux_mpu6050_pins { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE7) /* uart0_ctsn.gpio1_8 */ ++ >; ++ }; ++ ++ lps3331ap_pins: pinmux_lps3331ap_pins { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7) /* gpmc_a10.gpio1_26 */ ++ >; ++ }; ++}; ++ ++&mac { ++ pinctrl-names = "default", "sleep"; ++ pinctrl-0 = <&cpsw_default>; ++ pinctrl-1 = <&cpsw_sleep>; ++ status = "okay"; ++}; ++ ++&davinci_mdio { ++ pinctrl-names = "default", "sleep"; ++ pinctrl-0 = <&davinci_mdio_default>; ++ pinctrl-1 = <&davinci_mdio_sleep>; ++ status = "okay"; ++ ++ ethphy0: ethernet-phy@0 { ++ reg = <0>; ++ }; ++}; ++ ++&cpsw_emac0 { ++ phy-handle = <ðphy0>; ++ phy-mode = "rgmii-id"; ++}; ++ ++&i2c0 { ++ lps331ap: barometer@5c { ++ compatible = "st,lps331ap-press"; ++ st,drdy-int-pin = <1>; ++ reg = <0x5c>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <26 IRQ_TYPE_EDGE_RISING>; ++ }; ++ ++ mpu6050: accelerometer@68 { ++ compatible = "invensense,mpu6050"; ++ reg = <0x68>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <2 IRQ_TYPE_EDGE_RISING>; ++ orientation = <0xff 0 0 0 1 0 0 0 0xff>; ++ }; ++ ++ usb2512b: usb-hub@2c { ++ compatible = "microchip,usb2512b"; ++ reg = <0x2c>; ++ reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; ++ /* wifi on port 4 */ ++ }; ++}; +diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe-icu4.dts b/arch/arm/boot/dts/am335x-sancloud-bbe-icu4.dts +new file mode 100644 +index 000000000000..3de12eff6567 +--- /dev/null ++++ b/arch/arm/boot/dts/am335x-sancloud-bbe-icu4.dts +@@ -0,0 +1,198 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ ++ */ ++/dts-v1/; ++ ++#include "am33xx.dtsi" ++#include "am335x-bone-common.dtsi" ++#include "am335x-boneblack-common.dtsi" ++#include "am335x-sancloud-bbe-common.dtsi" ++ ++/ { ++ model = "SanCloud BeagleBone Enhanced + ICU4 Automotive Cape"; ++ compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; ++}; ++ ++/ { ++ icu_leds { ++ pinctrl-names = "default", "sleep"; ++ pinctrl-0 = <&user_leds_s1>; ++ pinctrl-1 = <&user_leds_s1_sleep>; ++ ++ compatible = "gpio-leds"; ++ ++ icu_led@2 { ++ label = "beaglebone:red:led1"; ++ gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "mmc0"; ++ default-state = "off"; ++ }; ++ ++ icu_led@3 { ++ label = "beaglebone:green:led2"; ++ gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ default-state = "off"; ++ }; ++ ++ icu_led@1 { ++ label = "beaglebone:red:led3"; ++ gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "none"; ++ default-state = "off"; ++ }; ++ ++ icu_led@6 { ++ label = "beaglebone:green:led4"; ++ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "none"; ++ default-state = "off"; ++ }; ++ ++ icu_led@5 { ++ label = "beaglebone:red:led5"; ++ gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "none"; //"cpu0"; ++ default-state = "off"; ++ }; ++ ++ icu_led@4 { /*CANNOT USE ON V1*/ ++ label = "beaglebone:green:led6"; ++ gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "none"; ++ default-state = "off"; ++ }; ++ }; ++ ++ gpio_keys { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gpio_buttons_s0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* 17 -> 18 BBE SK7000*/ ++ switch1 { ++ label = "ignition"; ++ linux,code = <0x8f>; /*KEY_WAKEUP*/ ++ gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; ++ gpio-key; ++ debounce-interval = <10>; ++ }; ++ ++ /* 18 -> 17 BBE SK7000*/ ++ switch2 { ++ label = "power_on"; ++ linux,code = <0x3b>; /*KEY_F1*/ ++ gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>; ++ gpio-key; ++ debounce-interval = <10>; ++ }; ++ }; ++}; ++ ++&am33xx_pinmux { ++ pinctrl-0 = <&usb_hub_ctrl>; ++ ++ user_leds_default: user_leds_default { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */ ++ >; ++ }; ++ ++ user_leds_sleep: user_leds_sleep { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a6.gpio1_22 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a8.gpio1_24 */ ++ >; ++ }; ++ ++ dcan0_pins_s0: dcan0_pins_s0 { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE2) /* d_can0_rx, SLEWCTRL_FAST | RECV_ENABLE | INPUT_PULLUP | MODE2 */ ++ AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE2) /* d_can0_tx, SLEWCTRL_FAST | OUTPUT_PULLUP | MODE2 */ ++ >; ++ }; ++ ++ dcan0_pins_s0_sleep: dcan0_pins_s0_sleep { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* d_can0_rx, SLEWCTRL_FAST | RECV_ENABLE | INPUT_PULLUP | MODE2 */ ++ AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* d_can0_tx, SLEWCTRL_FAST | OUTPUT_PULLUP | MODE2 */ ++ >; ++ }; ++ ++ user_leds_s1: user_leds_s1 { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* mcasp0_fsr.gpio3_19LED1*/ ++ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* mcasp0_ahclkx.gpio3_21 LED2 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a1.gpio1_17 LED3*/ ++ AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* eCAP0_in_PWM0_out.gpio0_7 LED4*/ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a0.gpio1_16 LED5*/ ++ AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* uart1_txd.gpio0_15 LED6*/ ++ >; ++ }; ++ ++ user_leds_s1_sleep: user_leds_s1_sleep { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mcasp0_fsr.gpio3_19LED1*/ ++ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mcasp0_ahclkx.gpio3_21 LED2 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a1.gpio1_17 LED3*/ ++ AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLDOWN, MUX_MODE7) /* eCAP0_in_PWM0_out.gpio0_7 LED4*/ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a0.gpio1_16 LED5*/ ++ AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLDOWN, MUX_MODE7) /* uart1_txd.gpio0_15 LED6*/ ++ >; ++ }; ++ ++ gpio_buttons_s0: gpio_buttons_s0 { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) /*gpmc_ad11.gpio0_27 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /*gpmc_clk.gpio2_1 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /*gpmc_ben1.gpio1_28 */ ++ >; ++ }; ++ ++ i2c1_pins: pinmux_i2c1_pins { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE2) /* i2c1_sca */ ++ AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE2) /* i2c1_scl */ ++ >; ++ }; ++}; ++ ++&dcan0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-names = "default", "sleep"; /* Apply default pinmuxing */ ++ pinctrl-0 = <&dcan0_pins_s0>; ++ pinctrl-1 = <&dcan0_pins_s0_sleep>; ++ status = "okay"; /* Switch on DCAN0 */ ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mpu6050_pins &lps3331ap_pins>; ++}; ++ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ status = "okay"; ++ clock-frequency = <400000>; ++ ++ rtc@68 { ++ device_type = "rtc"; ++ reg = <0x68>; ++ compatible = "ds1337"; ++ }; ++}; ++ ++/* Prevent i2c2 working as we need it for DCAN0 interface */ ++&i2c2 { ++ status = "disabled"; ++}; +diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe.dts b/arch/arm/boot/dts/am335x-sancloud-bbe.dts +index e5fdb7abb0d5..640bc1cb7e86 100644 +--- a/arch/arm/boot/dts/am335x-sancloud-bbe.dts ++++ b/arch/arm/boot/dts/am335x-sancloud-bbe.dts +@@ -7,131 +7,9 @@ + #include "am33xx.dtsi" + #include "am335x-bone-common.dtsi" + #include "am335x-boneblack-common.dtsi" +-#include <dt-bindings/interrupt-controller/irq.h> ++#include "am335x-sancloud-bbe-common.dtsi" + + / { + model = "SanCloud BeagleBone Enhanced"; + compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; + }; +- +-&am33xx_pinmux { +- pinctrl-names = "default"; +- +- cpsw_default: cpsw_default { +- pinctrl-single,pins = < +- /* Slave 1 */ +- AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ +- AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ +- AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ +- AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ +- AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ +- AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ +- AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ +- AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ +- AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ +- AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ +- AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ +- AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ +- >; +- }; +- +- cpsw_sleep: cpsw_sleep { +- pinctrl-single,pins = < +- /* Slave 1 reset value */ +- AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) +- >; +- }; +- +- davinci_mdio_default: davinci_mdio_default { +- pinctrl-single,pins = < +- /* MDIO */ +- AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) +- AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) +- >; +- }; +- +- davinci_mdio_sleep: davinci_mdio_sleep { +- pinctrl-single,pins = < +- /* MDIO reset value */ +- AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) +- AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) +- >; +- }; +- +- usb_hub_ctrl: usb_hub_ctrl { +- pinctrl-single,pins = < +- AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */ +- >; +- }; +- +- mpu6050_pins: pinmux_mpu6050_pins { +- pinctrl-single,pins = < +- AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE7) /* uart0_ctsn.gpio1_8 */ +- >; +- }; +- +- lps3331ap_pins: pinmux_lps3331ap_pins { +- pinctrl-single,pins = < +- AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7) /* gpmc_a10.gpio1_26 */ +- >; +- }; +-}; +- +-&mac { +- pinctrl-names = "default", "sleep"; +- pinctrl-0 = <&cpsw_default>; +- pinctrl-1 = <&cpsw_sleep>; +- status = "okay"; +-}; +- +-&davinci_mdio { +- pinctrl-names = "default", "sleep"; +- pinctrl-0 = <&davinci_mdio_default>; +- pinctrl-1 = <&davinci_mdio_sleep>; +- status = "okay"; +- +- ethphy0: ethernet-phy@0 { +- reg = <0>; +- }; +-}; +- +-&cpsw_emac0 { +- phy-handle = <ðphy0>; +- phy-mode = "rgmii-id"; +-}; +- +-&i2c0 { +- lps331ap: barometer@5c { +- compatible = "st,lps331ap-press"; +- st,drdy-int-pin = <1>; +- reg = <0x5c>; +- interrupt-parent = <&gpio1>; +- interrupts = <26 IRQ_TYPE_EDGE_RISING>; +- }; +- +- mpu6050: accelerometer@68 { +- compatible = "invensense,mpu6050"; +- reg = <0x68>; +- interrupt-parent = <&gpio0>; +- interrupts = <2 IRQ_TYPE_EDGE_RISING>; +- orientation = <0xff 0 0 0 1 0 0 0 0xff>; +- }; +- +- usb2512b: usb-hub@2c { +- compatible = "microchip,usb2512b"; +- reg = <0x2c>; +- reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; +- /* wifi on port 4 */ +- }; +-}; +diff --git a/arch/arm/boot/dts/am335x-sancloud-bbei-wifi.dts b/arch/arm/boot/dts/am335x-sancloud-bbei-wifi.dts +new file mode 100644 +index 000000000000..813f025e0d6d +--- /dev/null ++++ b/arch/arm/boot/dts/am335x-sancloud-bbei-wifi.dts +@@ -0,0 +1,109 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Copyright (C) 2019 Sancloud Ltd ++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ ++ */ ++/dts-v1/; ++ ++#include "am33xx.dtsi" ++#include "am335x-bone-common.dtsi" ++#include "am335x-boneblack-common.dtsi" ++#include "am335x-sancloud-bbe-common.dtsi" ++ ++/ { ++ model = "SanCloud BeagleBone Enhanced Industrial WiFi"; ++ compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; ++ ++ wlan_en_reg: fixedregulator@2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "wlan-en-regulator"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us= <100000>; ++ ++ /* RADIO_EN */ ++ gpio = <&gpio1 25 0>; ++ enable-active-high; ++ }; ++}; ++ ++&am33xx_pinmux { ++ mmc3_pins: pinmux_mmc3_pins { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a9.gpio1_25: RADIO_EN */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_csn3.mmc2_cmd */ ++ AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_clk.mmc2_clk */ ++ >; ++ }; ++ ++ bluetooth_pins: pinmux_bluetooth_pins { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE7) /* event_intr0.gpio0_19 */ ++ >; ++ }; ++ ++ uart1_pins: pinmux_uart1_pins { ++ pinctrl-single,pins = < ++ AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0) /* uart1_rxd */ ++ AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0) /* uart1_txd */ ++ AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0) /* uart1_ctsn */ ++ AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* uart1_rtsn */ ++ >; ++ }; ++ ++ nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { ++ pinctrl-single,pins = <>; ++ }; ++ ++ nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { ++ pinctrl-single,pins = <>; ++ }; ++}; ++ ++&tda19988 { ++ status = "disabled"; ++}; ++ ++&i2c2 { ++ status = "disabled"; ++}; ++ ++&mmc3 { ++ status = "okay"; ++ vmmc-supply = <&wlan_en_reg>; ++ bus-width = <4>; ++ non-removable; ++ cap-power-off-card; ++ ti,needs-special-hs-handling; ++ keep-power-in-suspend; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc3_pins>; ++ dmas = <&edma_xbar 12 0 1 ++ &edma_xbar 13 0 2>; ++ dma-names = "tx", "rx"; ++ clock-frequency = <50000000>; ++ max-frequency = <50000000>; ++}; ++ ++&uart1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins &bluetooth_pins>; ++ ++ bluetooth { ++ status = "okay"; ++ compatible = "qcom,qca6174-bt"; ++ enable-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; ++ clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <19 IRQ_TYPE_EDGE_RISING>; ++ }; ++}; ++ ++&lcdc { ++ status = "disabled"; ++}; +-- +2.26.2 + diff --git a/bsp/meta-sancloud/dynamic-layers/meta-kernel/recipes-kernel/linux/linux-stable_%.bbappend b/bsp/meta-sancloud/dynamic-layers/meta-kernel/recipes-kernel/linux/linux-stable_%.bbappend new file mode 100644 index 00000000..72ad30be --- /dev/null +++ b/bsp/meta-sancloud/dynamic-layers/meta-kernel/recipes-kernel/linux/linux-stable_%.bbappend @@ -0,0 +1,3 @@ +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" + +SRC_URI += "file://0001-arm-dts-Update-SanCloud-DTS-files.patch" |