summaryrefslogtreecommitdiffstats
path: root/external/meta-openembedded/meta-oe/recipes-bsp/flashrom/flashrom/0001-platform-Add-riscv-to-known-platforms.patch
diff options
context:
space:
mode:
authorToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp>2020-03-30 09:24:26 +0900
committerToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp>2020-03-30 09:24:26 +0900
commit5b80bfd7bffd4c20d80b7c70a7130529e9a755dd (patch)
treeb4bb18dcd1487dbf1ea8127e5671b7bb2eded033 /external/meta-openembedded/meta-oe/recipes-bsp/flashrom/flashrom/0001-platform-Add-riscv-to-known-platforms.patch
parent706ad73eb02caf8532deaf5d38995bd258725cb8 (diff)
agl-basesystem
Diffstat (limited to 'external/meta-openembedded/meta-oe/recipes-bsp/flashrom/flashrom/0001-platform-Add-riscv-to-known-platforms.patch')
-rw-r--r--external/meta-openembedded/meta-oe/recipes-bsp/flashrom/flashrom/0001-platform-Add-riscv-to-known-platforms.patch37
1 files changed, 37 insertions, 0 deletions
diff --git a/external/meta-openembedded/meta-oe/recipes-bsp/flashrom/flashrom/0001-platform-Add-riscv-to-known-platforms.patch b/external/meta-openembedded/meta-oe/recipes-bsp/flashrom/flashrom/0001-platform-Add-riscv-to-known-platforms.patch
new file mode 100644
index 00000000..7ba69a91
--- /dev/null
+++ b/external/meta-openembedded/meta-oe/recipes-bsp/flashrom/flashrom/0001-platform-Add-riscv-to-known-platforms.patch
@@ -0,0 +1,37 @@
+From d2a28dcdbd1051d2f48320e2eda3393581fe0519 Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Sat, 17 Mar 2018 23:08:29 -0700
+Subject: [PATCH] platform: Add riscv to known platforms
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+Upstream-Status: Submitted [https://review.coreboot.org/#/c/flashrom/+/25260/]
+ platform.h | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/platform.h b/platform.h
+index b2fdcd0..2cadbb3 100644
+--- a/platform.h
++++ b/platform.h
+@@ -69,6 +69,9 @@
+ #elif defined (__m68k__)
+ #define __FLASHROM_ARCH__ "m68k"
+ #define IS_M68K 1
++#elif defined (__riscv)
++ #define __FLASHROM_ARCH__ "riscv"
++ #define IS_RISCV 1
+ #elif defined (__sh__)
+ #define __FLASHROM_ARCH__ "sh"
+ #define IS_SH 1
+@@ -77,7 +80,7 @@
+ #define IS_S390 1
+ #endif
+
+-#if !(IS_X86 || IS_MIPS || IS_PPC || IS_ARM || IS_SPARC || IS_ALPHA || IS_HPPA || IS_M68K || IS_SH || IS_S390)
++#if !(IS_X86 || IS_MIPS || IS_PPC || IS_ARM || IS_SPARC || IS_ALPHA || IS_HPPA || IS_M68K || IS_RISCV || IS_SH || IS_S390)
+ #error Unknown architecture
+ #endif
+
+--
+2.16.2
+