diff options
author | ToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp> | 2020-03-30 09:24:26 +0900 |
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committer | ToshikazuOhiwa <toshikazu_ohiwa@mail.toyota.co.jp> | 2020-03-30 09:24:26 +0900 |
commit | 5b80bfd7bffd4c20d80b7c70a7130529e9a755dd (patch) | |
tree | b4bb18dcd1487dbf1ea8127e5671b7bb2eded033 /external/meta-qt5/recipes-qt/qt5/qtscript/0001-3rdparty-javascriptcore-Add-RISC-V-support.patch | |
parent | 706ad73eb02caf8532deaf5d38995bd258725cb8 (diff) |
agl-basesystem
Diffstat (limited to 'external/meta-qt5/recipes-qt/qt5/qtscript/0001-3rdparty-javascriptcore-Add-RISC-V-support.patch')
-rw-r--r-- | external/meta-qt5/recipes-qt/qt5/qtscript/0001-3rdparty-javascriptcore-Add-RISC-V-support.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/external/meta-qt5/recipes-qt/qt5/qtscript/0001-3rdparty-javascriptcore-Add-RISC-V-support.patch b/external/meta-qt5/recipes-qt/qt5/qtscript/0001-3rdparty-javascriptcore-Add-RISC-V-support.patch new file mode 100644 index 00000000..d724496e --- /dev/null +++ b/external/meta-qt5/recipes-qt/qt5/qtscript/0001-3rdparty-javascriptcore-Add-RISC-V-support.patch @@ -0,0 +1,47 @@ +From 028ec1bdce6dde67cc1486e5bee311b69354e41e Mon Sep 17 00:00:00 2001 +From: Alistair Francis <alistair.francis@wdc.com> +Date: Wed, 18 Jul 2018 14:26:21 -0700 +Subject: [PATCH] 3rdparty/javascriptcore: Add RISC-V support + +Signed-off-by: Alistair Francis <alistair.francis@wdc.com> +Change-Id: I81f15084ef6b5b8d855c1f568cacca176af51b57 +Reviewed-by: Simon Hausmann <simon.hausmann@qt.io> + +Upstream-Status: Backport +--- + .../javascriptcore/JavaScriptCore/wtf/Platform.h | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +diff --git a/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h b/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h +index 00caa6d..96942c7 100644 +--- a/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h ++++ b/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h +@@ -397,6 +397,16 @@ + #endif + #endif /* __mips__ */ + ++/* CPU(RISCV64) - RISC-V 64-bit */ ++#if defined(__riscv) && __riscv_xlen == 64 ++#define WTF_CPU_RISCV64 1 ++#endif ++ ++/* CPU(RISCV32) - RISC-V 32-bit */ ++#if defined(__riscv) && __riscv_xlen == 32 ++#define WTF_CPU_RISCV32 1 ++#endif ++ + /* ==== OS() - underlying operating system; only to be used for mandated low-level services like + virtual memory, not to choose a GUI toolkit ==== */ + +@@ -948,9 +958,9 @@ + #endif + + #if !defined(WTF_USE_JSVALUE64) && !defined(WTF_USE_JSVALUE32) && !defined(WTF_USE_JSVALUE32_64) +-#if (CPU(X86_64) && !CPU(X32) && (OS(UNIX) || OS(WINDOWS) || OS(SOLARIS) || OS(HPUX))) || (CPU(IA64) && !CPU(IA64_32)) || CPU(ALPHA) || CPU(AIX64) || CPU(SPARC64) || CPU(MIPS64) || CPU(AARCH64) ++#if (CPU(X86_64) && !CPU(X32) && (OS(UNIX) || OS(WINDOWS) || OS(SOLARIS) || OS(HPUX))) || (CPU(IA64) && !CPU(IA64_32)) || CPU(ALPHA) || CPU(AIX64) || CPU(SPARC64) || CPU(MIPS64) || CPU(AARCH64) || CPU(RISCV64) + #define WTF_USE_JSVALUE64 1 +-#elif CPU(ARM) || CPU(PPC64) ++#elif CPU(ARM) || CPU(PPC64) || CPU(RISCV32) + #define WTF_USE_JSVALUE32 1 + #elif OS(WINDOWS) && COMPILER(MINGW) + /* Using JSVALUE32_64 causes padding/alignement issues for JITStubArg |