diff options
Diffstat (limited to 'bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0012-ARM-socfpga-stratix10-Temporarily-revert-to-2GB-DRAM.patch')
| -rw-r--r-- | bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0012-ARM-socfpga-stratix10-Temporarily-revert-to-2GB-DRAM.patch | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0012-ARM-socfpga-stratix10-Temporarily-revert-to-2GB-DRAM.patch b/bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0012-ARM-socfpga-stratix10-Temporarily-revert-to-2GB-DRAM.patch deleted file mode 100644 index c7f73bab..00000000 --- a/bsp/meta-altera/recipes-bsp/u-boot/files/v2019.07/0012-ARM-socfpga-stratix10-Temporarily-revert-to-2GB-DRAM.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 97d491bda1dea7d2afe74a7c3fb4ea43a83a79ff Mon Sep 17 00:00:00 2001 -From: Dalon Westergreen <dalon.westergreen@intel.com> -Date: Fri, 10 May 2019 10:31:15 -0700 -Subject: [PATCH 12/12] ARM: socfpga: stratix10: Temporarily revert to 2GB DRAM - -The current shipping GHRD still has the DDR configured as a -2GB DDR. This reverts the devicetree to use 2GB instead of -4GB. - -Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> ---- - arch/arm/dts/socfpga_stratix10_socdk.dts | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts -index 2745050810..1caae0ab6f 100755 ---- a/arch/arm/dts/socfpga_stratix10_socdk.dts -+++ b/arch/arm/dts/socfpga_stratix10_socdk.dts -@@ -37,8 +37,7 @@ - memory { - device_type = "memory"; - /* 4GB */ -- reg = <0 0x00000000 0 0x80000000>, -- <1 0x80000000 0 0x80000000>; -+ reg = <0 0x00000000 0 0x80000000>; - u-boot,dm-pre-reloc; - }; - }; --- -2.21.0 - |