diff options
Diffstat (limited to 'bsp/meta-altera/recipes-bsp')
4 files changed, 26 insertions, 3 deletions
diff --git a/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga-common.inc b/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga-common.inc index 2038545e..def29fa7 100644 --- a/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga-common.inc +++ b/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga-common.inc @@ -10,4 +10,20 @@ PV_append = "+git${SRCPV}" S = "${WORKDIR}/git" -RPROVIDES_${PN} += "u-boot" +RPROVIDES_${PN} += "u-boot" + +UBOOT_CONFIG[agilex-socdk] = "socfpga_agilex_defconfig" +UBOOT_CONFIG[agilex-socdk-qspi] = "socfpga_agilex_qspi_defconfig" +UBOOT_CONFIG[stratix10-socdk] = "socfpga_stratix10_defconfig" +UBOOT_CONFIG[stratix10-socdk-qspi] = "socfpga_stratix10_qspi_defconfig" +UBOOT_CONFIG[arria10-socdk] = "socfpga_arria10_defconfig" +UBOOT_CONFIG[arria10-socdk-nand] = "socfpga_arria10_nand_defconfig" +UBOOT_CONFIG[arria10-socdk-qspi] = "socfpga_arria10_qspi_defconfig" +UBOOT_CONFIG[cyclone5-socdk] = "socfpga_cyclone5_defconfig" +UBOOT_CONFIG[de0-nano-soc] = "socfpga_de0_nano_soc_defconfig" +UBOOT_CONFIG[de10-nano-soc] = "socfpga_de10_nano_defconfig" +UBOOT_CONFIG[mcvevk] = "socfpga_mcvevk_defconfig" +UBOOT_CONFIG[sockit] = "socfpga_sockit_defconfig" +UBOOT_CONFIG[socrates] = "socfpga_socrates_defconfig" +UBOOT_CONFIG[sr1500] = "socfpga_sr1500_defconfig" +UBOOT_CONFIG[arria5-socdk] = "socfpga_arria5_defconfig" diff --git a/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga_v2019.04.bb b/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga_v2019.04.bb index 8c7ec331..790eca13 100644 --- a/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga_v2019.04.bb +++ b/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga_v2019.04.bb @@ -2,6 +2,6 @@ require u-boot-socfpga-common.inc require ${COREBASE}/meta/recipes-bsp/u-boot/u-boot.inc SRC_URI = "git://github.com/altera-opensource/u-boot-socfpga.git;branch=socfpga_v2019.04" -SRCREV = "83e929c739beecff17529a0cf0fdd5c74fbe3c72" +SRCREV = "6296fdb7da9e205bc34416f38631715fb6d74e71" DEPENDS += "dtc-native bc-native u-boot-mkimage-native" diff --git a/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga_v2019.10.bb b/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga_v2019.10.bb index 9176f9ac..a42659a0 100644 --- a/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga_v2019.10.bb +++ b/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga_v2019.10.bb @@ -2,6 +2,6 @@ require u-boot-socfpga-common.inc require ${COREBASE}/meta/recipes-bsp/u-boot/u-boot.inc SRC_URI = "git://github.com/altera-opensource/u-boot-socfpga.git;branch=socfpga_v2019.10" -SRCREV = "7298985146c70ca8af8d43dd963b3e8aa3900d87" +SRCREV = "34638cc921269665e43340a50552302bd358f793" DEPENDS += "dtc-native bc-native u-boot-mkimage-native" diff --git a/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga_v2020.04.bb b/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga_v2020.04.bb new file mode 100644 index 00000000..5e3d99b1 --- /dev/null +++ b/bsp/meta-altera/recipes-bsp/u-boot/u-boot-socfpga_v2020.04.bb @@ -0,0 +1,7 @@ +require u-boot-socfpga-common.inc +require ${COREBASE}/meta/recipes-bsp/u-boot/u-boot.inc + +SRC_URI = "git://github.com/altera-opensource/u-boot-socfpga.git;branch=socfpga_v2020.04" +SRCREV = "2cbc36afbb31bee6e245291c51c283dbde0e3b89" + +DEPENDS += "dtc-native bc-native u-boot-mkimage-native" |