diff options
Diffstat (limited to 'bsp/meta-arm/meta-arm-bsp/recipes-kernel')
64 files changed, 2363 insertions, 0 deletions
diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/README.md b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/README.md new file mode 100644 index 00000000..ba61ca32 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/README.md @@ -0,0 +1,4 @@ +Arm platforms BSPs +================== + +This directory contains Arm platforms definitions and configuration for Linux. diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp-standard.scc b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp-standard.scc new file mode 100644 index 00000000..d29e0b81 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp-standard.scc @@ -0,0 +1,11 @@ +define KMACHINE fvp +define KTYPE standard +define KARCH arm64 + +include ktypes/standard/standard.scc + +include fvp.scc + +# default policy for standard kernels +#include features/latencytop/latencytop.scc +#include features/profiling/profiling.scc diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp.scc b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp.scc new file mode 100644 index 00000000..79e3a69a --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp.scc @@ -0,0 +1,14 @@ +include features/input/input.scc +include features/net/net.scc +include cfg/timer/no_hz.scc + +kconf hardware fvp/fvp-board.cfg +kconf hardware fvp/fvp-net.cfg +kconf hardware fvp/fvp-rtc.cfg +kconf hardware fvp/fvp-serial.cfg +kconf hardware fvp/fvp-virtio.cfg +kconf hardware fvp/fvp-cfi.cfg +kconf hardware fvp/fvp-drm.cfg +kconf hardware fvp/fvp-timer.cfg +kconf hardware fvp/fvp-virtio.cfg +kconf hardware fvp/fvp-watchdog.cfg diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-board.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-board.cfg new file mode 100644 index 00000000..2fd0264a --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-board.cfg @@ -0,0 +1,11 @@ +CONFIG_ARM64=y +CONFIG_ARCH_VEXPRESS=y +CONFIG_SMP=y +CONFIG_NR_CPUS=8 +CONFIG_HOTPLUG_CPU=y + +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y + +CONFIG_CPU_IDLE=y +CONFIG_ARM_CPUIDLE=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-cfi.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-cfi.cfg new file mode 100644 index 00000000..f28e0d92 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-cfi.cfg @@ -0,0 +1,3 @@ +# CFI Flash +CONFIG_MTD=y +CONFIG_MTD_CFI=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-drm.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-drm.cfg new file mode 100644 index 00000000..77133a9d --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-drm.cfg @@ -0,0 +1,5 @@ +# DRM CLCD +CONFIG_DRM=y +CONFIG_DRM_PL111=y +CONFIG_FB=y +CONFIG_FB_ARMCLCD=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-net.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-net.cfg new file mode 100644 index 00000000..54e3686d --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-net.cfg @@ -0,0 +1,2 @@ +CONFIG_SMSC911X=y +CONFIG_SMC91X=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-rtc.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-rtc.cfg new file mode 100644 index 00000000..5d377b39 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-rtc.cfg @@ -0,0 +1,2 @@ +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_PL031=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-serial.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-serial.cfg new file mode 100644 index 00000000..44571640 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-serial.cfg @@ -0,0 +1,2 @@ +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-timer.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-timer.cfg new file mode 100644 index 00000000..144977f2 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-timer.cfg @@ -0,0 +1,3 @@ +# Dual timer module +CONFIG_ARM_TIMER_SP804=y +CONFIG_CLK_SP810=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-virtio.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-virtio.cfg new file mode 100644 index 00000000..afc76a09 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-virtio.cfg @@ -0,0 +1,4 @@ +CONFIG_VIRTIO=y +CONFIG_VIRTIO_MMIO=y +CONFIG_BLOCK=y +CONFIG_VIRTIO_BLK=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-watchdog.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-watchdog.cfg new file mode 100644 index 00000000..977f317c --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-watchdog.cfg @@ -0,0 +1,3 @@ +# Watchdog +CONFIG_WATCHDOG=y +CONFIG_ARM_SP805_WATCHDOG=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64-standard.scc b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64-standard.scc new file mode 100644 index 00000000..0fb69e40 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64-standard.scc @@ -0,0 +1,11 @@ +define KMACHINE gem5-arm64 +define KTYPE standard +define KARCH arm64 + +include ktypes/standard/standard.scc + +include gem5-arm64.scc + +# default policy for standard kernels +#include features/latencytop/latencytop.scc +#include features/profiling/profiling.scc diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64.scc b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64.scc new file mode 100644 index 00000000..a24a3af2 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64.scc @@ -0,0 +1,14 @@ +include features/input/input.scc +include features/net/net.scc +include cfg/timer/no_hz.scc + +kconf hardware gem5-arm64/gem5-arm64-board.cfg +kconf hardware gem5-arm64/gem5-arm64-drm.cfg +kconf hardware gem5-arm64/gem5-arm64-net.cfg +kconf hardware gem5-arm64/gem5-arm64-rtc.cfg +kconf hardware gem5-arm64/gem5-arm64-serial.cfg +kconf hardware gem5-arm64/gem5-arm64-virtio.cfg +kconf hardware gem5-arm64/gem5-arm64-cfi.cfg +kconf hardware gem5-arm64/gem5-arm64-virtio.cfg +kconf hardware gem5-arm64/gem5-arm64-pci.cfg +kconf hardware gem5-arm64/gem5-arm64-pata.cfg diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-board.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-board.cfg new file mode 100644 index 00000000..56bb9e6d --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-board.cfg @@ -0,0 +1,23 @@ +CONFIG_ARM64=y +CONFIG_ARCH_VEXPRESS=y +CONFIG_SMP=y +CONFIG_NR_CPUS=256 +CONFIG_HOTPLUG_CPU=y + +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y + +CONFIG_CPU_IDLE=y +CONFIG_ARM_CPUIDLE=y + +CONFIG_VEXPRESS_CONFIG=y + +# Keyboard over AMBA +CONFIG_SERIO=y +CONFIG_SERIO_AMBAKMI=y + +CONFIG_MFD_VEXPRESS_SYSREG=y + +# Turn off RAID to speed up boot +CONFIG_MD=n +CONFIG_BTRFS_FS=n diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-cfi.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-cfi.cfg new file mode 100644 index 00000000..f28e0d92 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-cfi.cfg @@ -0,0 +1,3 @@ +# CFI Flash +CONFIG_MTD=y +CONFIG_MTD_CFI=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-drm.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-drm.cfg new file mode 100644 index 00000000..7c97020f --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-drm.cfg @@ -0,0 +1,5 @@ +CONFIG_DRM=y +CONFIG_DRM_ARM=y +CONFIG_DRM_HDLCD=y +CONFIG_FB=y +CONFIG_FB_ARMCLCD=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-net.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-net.cfg new file mode 100644 index 00000000..54e3686d --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-net.cfg @@ -0,0 +1,2 @@ +CONFIG_SMSC911X=y +CONFIG_SMC91X=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-pata.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-pata.cfg new file mode 100644 index 00000000..62722880 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-pata.cfg @@ -0,0 +1,12 @@ +CONFIG_ATA=y +CONFIG_ATA_GENERIC=y +CONFIG_PATA_PLATFORM=y +CONFIG_PATA_OF_PLATFORM=y +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_ATA_PIIX=y +CONFIG_PATA_OLDPIIX=y +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_SG=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-pci.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-pci.cfg new file mode 100644 index 00000000..c8ae9d48 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-pci.cfg @@ -0,0 +1,2 @@ +CONFIG_PCI=y +CONFIG_PCI_HOST_GENERIC=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-rtc.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-rtc.cfg new file mode 100644 index 00000000..5d377b39 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-rtc.cfg @@ -0,0 +1,2 @@ +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_PL031=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-serial.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-serial.cfg new file mode 100644 index 00000000..f58e3c2e --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-serial.cfg @@ -0,0 +1,3 @@ +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-virtio.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-virtio.cfg new file mode 100644 index 00000000..b4a53da1 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-virtio.cfg @@ -0,0 +1,9 @@ +CONFIG_VIRTIO=y +CONFIG_VIRTIO_MMIO=y +CONFIG_BLOCK=y +CONFIG_VIRTIO_BLK=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_SCSI_VIRTIO=y +CONFIG_VIRTIO_BLK_SCSI=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno-standard.scc b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno-standard.scc new file mode 100644 index 00000000..c9d2405a --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno-standard.scc @@ -0,0 +1,11 @@ +define KMACHINE juno +define KTYPE standard +define KARCH arm64 + +include ktypes/standard/standard.scc + +include juno.scc + +# default policy for standard kernels +#include features/latencytop/latencytop.scc +#include features/profiling/profiling.scc diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno.scc b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno.scc new file mode 100644 index 00000000..2980b393 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno.scc @@ -0,0 +1,22 @@ +include features/input/input.scc +include features/net/net.scc +include cfg/timer/no_hz.scc +include cfg/usb-mass-storage.scc + +kconf hardware juno/juno-board.cfg +kconf hardware juno/juno-devfreq.cfg +kconf hardware juno/juno-dma.cfg +kconf hardware juno/juno-drm.cfg +kconf hardware juno/juno-fb.cfg +kconf hardware juno/juno-i2c.cfg +# kconf hardware juno/juno-mali-midgard.cfg +kconf hardware juno/juno-mmc.cfg +kconf hardware juno/juno-net.cfg +kconf hardware juno/juno-pci.cfg +kconf hardware juno/juno-rtc.cfg +kconf hardware juno/juno-sata.cfg +kconf hardware juno/juno-serial.cfg +kconf hardware juno/juno-sound.cfg +kconf hardware juno/juno-thermal.cfg +kconf hardware juno/juno-usb.cfg + diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-board.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-board.cfg new file mode 100644 index 00000000..73ea0765 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-board.cfg @@ -0,0 +1,43 @@ +CONFIG_ARM64=y +CONFIG_ARCH_VEXPRESS=y +CONFIG_SMP=y +CONFIG_NR_CPUS=8 +CONFIG_HOTPLUG_CPU=y + +# Keyboard over AMBA +CONFIG_SERIO=y +CONFIG_SERIO_AMBAKMI=y + +# Hardware mailbox +CONFIG_MAILBOX=y +CONFIG_ARM_MHU=y + +# SCMI support +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_POWER_DOMAIN=y +CONFIG_SENSORS_ARM_SCMI=y +CONFIG_COMMON_CLK_SCMI=y + +# Power Interface and system control +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +CONFIG_SENSORS_ARM_SCPI=y +CONFIG_COMMON_CLK_SCPI=y + +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y + +CONFIG_CPU_IDLE=y +CONFIG_ARM_CPUIDLE=y + +CONFIG_CPU_FREQ=y +CONFIG_ARM_BIG_LITTLE_CPUFREQ=y +CONFIG_ARM_DT_BL_CPUFREQ=y +CONFIG_ARM_SCPI_CPUFREQ=y + +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y + +CONFIG_CONNECTOR=y +CONFIG_ARM_TIMER_SP804=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-devfreq.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-devfreq.cfg new file mode 100644 index 00000000..474e0105 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-devfreq.cfg @@ -0,0 +1,4 @@ +CONFIG_PM_DEVFREQ=y +CONFIG_DEVFREQ_THERMAL=y +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-dma.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-dma.cfg new file mode 100644 index 00000000..cbdffa3e --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-dma.cfg @@ -0,0 +1,5 @@ +CONFIG_DMADEVICES=y +CONFIG_PL330_DMA=y +CONFIG_CMA=y +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=96 diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-drm.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-drm.cfg new file mode 100644 index 00000000..fb5e855a --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-drm.cfg @@ -0,0 +1,6 @@ +CONFIG_DRM=y +CONFIG_DRM_ARM=y +CONFIG_DRM_HDLCD=y +CONFIG_DRM_I2C_NXP_TDA998X=y +CONFIG_FB=y +CONFIG_FB_ARMCLCD=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-fb.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-fb.cfg new file mode 100644 index 00000000..59499fa6 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-fb.cfg @@ -0,0 +1,4 @@ +CONFIG_FB=y +CONFIG_FB_ARMCLCD=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_VGA_CONSOLE is not set diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-i2c.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-i2c.cfg new file mode 100644 index 00000000..97f80c43 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-i2c.cfg @@ -0,0 +1,2 @@ +CONFIG_I2C=y +CONFIG_I2C_DESIGNWARE_PLATFORM=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-mali-midgard.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-mali-midgard.cfg new file mode 100644 index 00000000..adf02b7f --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-mali-midgard.cfg @@ -0,0 +1,7 @@ +CONFIG_MALI_MIDGARD=y +CONFIG_MALI_EXPERT=y +CONFIG_MALI_PLATFORM_FAKE=y +CONFIG_MALI_PLATFORM_THIRDPARTY=y +CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="juno_soc" +CONFIG_MALI_PLATFORM_DEVICETREE=y +CONFIG_MALI_DEVFREQ=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-mmc.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-mmc.cfg new file mode 100644 index 00000000..41af527c --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-mmc.cfg @@ -0,0 +1,2 @@ +CONFIG_MMC=y +CONFIG_MMC_ARMMMCI=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-net.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-net.cfg new file mode 100644 index 00000000..54e3686d --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-net.cfg @@ -0,0 +1,2 @@ +CONFIG_SMSC911X=y +CONFIG_SMC91X=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-pci.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-pci.cfg new file mode 100644 index 00000000..295d190d --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-pci.cfg @@ -0,0 +1,11 @@ +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCI_REALLOC_ENABLE_AUTO=y +CONFIG_PCI_PRI=y +CONFIG_PCI_PASID=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_PCIE=y +CONFIG_PCIEAER=y +CONFIG_PCIE_ECRC=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-rtc.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-rtc.cfg new file mode 100644 index 00000000..5d377b39 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-rtc.cfg @@ -0,0 +1,2 @@ +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_PL031=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-sata.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-sata.cfg new file mode 100644 index 00000000..a159af8f --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-sata.cfg @@ -0,0 +1,3 @@ +CONFIG_ATA=y +CONFIG_SATA_SIL24=y +CONFIG_SKY2=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-serial.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-serial.cfg new file mode 100644 index 00000000..44571640 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-serial.cfg @@ -0,0 +1,2 @@ +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-sound.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-sound.cfg new file mode 100644 index 00000000..399c77dd --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-sound.cfg @@ -0,0 +1,13 @@ +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_SEQUENCER=y +CONFIG_SND_SEQ_DUMMY=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_SEQUENCER_OSS=y +# CONFIG_SND_USB is not set +CONFIG_SND_SOC=y +CONFIG_SND_DESIGNWARE_I2S=y +CONFIG_SND_SOC_HDMI_CODEC=y +CONFIG_SND_SOC_SPDIF=y +CONFIG_SND_SIMPLE_CARD=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-thermal.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-thermal.cfg new file mode 100644 index 00000000..6241374a --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-thermal.cfg @@ -0,0 +1,5 @@ +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_CPU_THERMAL=y +CONFIG_THERMAL_WRITABLE_TRIPS=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-usb.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-usb.cfg new file mode 100644 index 00000000..9159de15 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-usb.cfg @@ -0,0 +1,7 @@ +CONFIG_USB_STORAGE=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_OHCI_HCD=y diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/0001-menuconfig-mconf-cfg-Allow-specification-of-ncurses-location.patch b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/0001-menuconfig-mconf-cfg-Allow-specification-of-ncurses-location.patch new file mode 100644 index 00000000..372d0afb --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/0001-menuconfig-mconf-cfg-Allow-specification-of-ncurses-location.patch @@ -0,0 +1,52 @@ +rom d078e29aa31ac3fa4c041bf89c46bc6372c1a02a Mon Sep 17 00:00:00 2001 +From: Bruce Ashfield <bruce.ashfield@windriver.com> +Date: Mon, 2 Jul 2018 23:10:28 -0400 +Subject: menuconfig,mconf-cfg: Allow specification of ncurses location + +In some cross build environments such as the Yocto Project build +environment it provides an ncurses library that is compiled +differently than the host's version. This causes display corruption +problems when the host's curses includes are used instead of the +includes from the provided compiler are overridden. There is a second +case where there is no curses libraries at all on the host system and +menuconfig will just fail entirely. + +The solution is simply to allow an override variable in +check-lxdialog.sh for environments such as the Yocto Project. Adding +a CROSS_CURSES_LIB and CROSS_CURSES_INC solves the issue and allowing +compiling and linking against the right headers and libraries. + +Signed-off-by: Jason Wessel <jason.wessel@windriver.com> +cc: Michal Marek <mmarek@suse.cz> +cc: linux-kbuild@vger.kernel.org +Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com> +--- + scripts/kconfig/mconf-cfg.sh | 8 ++++++++ + 1 file changed, 8 insertions(+) + mode change 100755 => 100644 scripts/kconfig/mconf-cfg.sh + +(limited to 'scripts/kconfig/mconf-cfg.sh') + +diff --git a/scripts/kconfig/mconf-cfg.sh b/scripts/kconfig/mconf-cfg.sh +old mode 100755 +new mode 100644 +index c812872d7f9d..65a9b9e5b8a6 +--- a/scripts/kconfig/mconf-cfg.sh ++++ b/scripts/kconfig/mconf-cfg.sh +@@ -4,6 +4,14 @@ + PKG="ncursesw" + PKG2="ncurses" + ++if [ "$CROSS_CURSES_LIB" != "" ]; then ++ echo libs=\'$CROSS_CURSES_LIB\' ++ if [ x"$CROSS_CURSES_INC" != x ]; then ++ echo cflags=\'$CROSS_CURSES_INC\' ++ fi ++ exit 0 ++fi ++ + if [ -n "$(command -v pkg-config)" ]; then + if pkg-config --exists $PKG; then + echo cflags=\"$(pkg-config --cflags $PKG)\" +-- +cgit v1.2.2-1-g5e49 diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/arm/fvp-base-gicv3-psci-common-custom.dtsi b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/arm/fvp-base-gicv3-psci-common-custom.dtsi new file mode 100644 index 00000000..1e056be3 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/arm/fvp-base-gicv3-psci-common-custom.dtsi @@ -0,0 +1,264 @@ +/* + * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/memreserve/ 0x80000000 0x00010000; + +/include/ "rtsm_ve-motherboard-nomap.dtsi" + +/ { + model = "FVP Base"; + compatible = "arm,vfp-base", "arm,vexpress"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &v2m_serial0; + serial1 = &v2m_serial1; + serial2 = &v2m_serial2; + serial3 = &v2m_serial3; + }; + + psci { + compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci"; + method = "smc"; + cpu_suspend = <0xc4000001>; + cpu_off = <0x84000002>; + cpu_on = <0xc4000003>; + sys_poweroff = <0x84000008>; + sys_reset = <0x84000009>; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + core1 { + cpu = <&CPU1>; + }; + core2 { + cpu = <&CPU2>; + }; + core3 { + cpu = <&CPU3>; + }; + }; + + cluster1 { + core0 { + cpu = <&CPU4>; + }; + core1 { + cpu = <&CPU5>; + }; + core2 { + cpu = <&CPU6>; + }; + core3 { + cpu = <&CPU7>; + }; + }; + }; + + idle-states { + entry-method = "arm,psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x0010000>; + entry-latency-us = <40>; + exit-latency-us = <100>; + min-residency-us = <150>; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x1010000>; + entry-latency-us = <500>; + exit-latency-us = <1000>; + min-residency-us = <2500>; + }; + }; + + CPU0:cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; + }; + + CPU1:cpu@1 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; + }; + + CPU2:cpu@2 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; + }; + + CPU3:cpu@3 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; + }; + + CPU4:cpu@100 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; + }; + + CPU5:cpu@101 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x101>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; + }; + + CPU6:cpu@102 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x102>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; + }; + + CPU7:cpu@103 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x103>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x7F000000>, + <0x00000008 0x80000000 0 0x80000000>; + }; + + gic: interrupt-controller@2f000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + interrupt-controller; + reg = <0x0 0x2f000000 0 0x10000>, // GICD + <0x0 0x2f100000 0 0x200000>, // GICR + <0x0 0x2c000000 0 0x2000>, // GICC + <0x0 0x2c010000 0 0x2000>, // GICH + <0x0 0x2c02f000 0 0x2000>; // GICV + interrupts = <1 9 4>; + + its: its@2f020000 { + compatible = "arm,gic-v3-its"; + msi-controller; + reg = <0x0 0x2f020000 0x0 0x20000>; // GITS + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xff01>, + <1 14 0xff01>, + <1 11 0xff01>, + <1 10 0xff01>; + clock-frequency = <100000000>; + }; + + timer@2a810000 { + compatible = "arm,armv7-timer-mem"; + reg = <0x0 0x2a810000 0x0 0x10000>; + clock-frequency = <100000000>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + frame@2a830000 { + frame-number = <1>; + interrupts = <0 26 4>; + reg = <0x0 0x2a830000 0x0 0x10000>; + }; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0 60 4>, + <0 61 4>, + <0 62 4>, + <0 63 4>; + }; + + smb@8000000 { + compatible = "simple-bus"; + + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0 0x08000000 0x04000000>, + <1 0 0 0x14000000 0x04000000>, + <2 0 0 0x18000000 0x04000000>, + <3 0 0 0x1c000000 0x04000000>, + <4 0 0 0x0c000000 0x04000000>, + <5 0 0 0x10000000 0x04000000>; + }; + + panels { + panel { + compatible = "panel"; + mode = "XVGA"; + refresh = <60>; + xres = <1024>; + yres = <768>; + pixclock = <15748>; + left_margin = <152>; + right_margin = <48>; + upper_margin = <23>; + lower_margin = <3>; + hsync_len = <104>; + vsync_len = <4>; + sync = <0>; + vmode = "FB_VMODE_NONINTERLACED"; + tim2 = "TIM2_BCD", "TIM2_IPC"; + cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)"; + caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888"; + bpp = <16>; + }; + }; + +}; diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/arm/fvp-base-gicv3-psci-custom.dts b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/arm/fvp-base-gicv3-psci-custom.dts new file mode 100644 index 00000000..984dbca9 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/arm/fvp-base-gicv3-psci-custom.dts @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/dts-v1/; + +/include/ "fvp-base-gicv3-psci-common-custom.dtsi" diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/arm/rtsm_ve-motherboard-nomap.dtsi b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/arm/rtsm_ve-motherboard-nomap.dtsi new file mode 100644 index 00000000..739af574 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/arm/rtsm_ve-motherboard-nomap.dtsi @@ -0,0 +1,282 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Ltd. Fast Models + * + * Versatile Express (VE) system model + * Motherboard component + * + * VEMotherBoard.lisa + * + * This is a duplicate of rtsm_ve-motherboard.dtsi but not + * using interrupt-map as this is not properly supported in + * xen right now + */ +/ { + smb@8000000 { + motherboard { + arm,v2m-memory-map = "rs1"; + compatible = "arm,vexpress,v2m-p1", "simple-bus"; + #address-cells = <2>; /* SMB chipselect number and offset */ + #size-cells = <1>; + ranges; + + flash@0,00000000 { + compatible = "arm,vexpress-flash", "cfi-flash"; + reg = <0 0x00000000 0x04000000>, + <4 0x00000000 0x04000000>; + bank-width = <4>; + }; + + v2m_video_ram: vram@2,00000000 { + compatible = "arm,vexpress-vram"; + reg = <2 0x00000000 0x00800000>; + }; + + ethernet@2,02000000 { + compatible = "smsc,lan91c111"; + reg = <2 0x02000000 0x10000>; + interrupts = <0 15 4>; + }; + + v2m_clk24mhz: clk24mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "v2m:clk24mhz"; + }; + + v2m_refclk1mhz: refclk1mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1000000>; + clock-output-names = "v2m:refclk1mhz"; + }; + + v2m_refclk32khz: refclk32khz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "v2m:refclk32khz"; + }; + + iofpga@3,00000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 3 0 0x200000>; + + v2m_sysreg: sysreg@10000 { + compatible = "arm,vexpress-sysreg"; + reg = <0x010000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + }; + + v2m_sysctl: sysctl@20000 { + compatible = "arm,sp810", "arm,primecell"; + reg = <0x020000 0x1000>; + clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; + clock-names = "refclk", "timclk", "apb_pclk"; + #clock-cells = <1>; + clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; + assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>; + assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>; + }; + + aaci@40000 { + compatible = "arm,pl041", "arm,primecell"; + reg = <0x040000 0x1000>; + interrupts = <0 11 4>; + clocks = <&v2m_clk24mhz>; + clock-names = "apb_pclk"; + }; + + mmci@50000 { + compatible = "arm,pl180", "arm,primecell"; + reg = <0x050000 0x1000>; + interrupts = <0 9 4 0 10 4>; + cd-gpios = <&v2m_sysreg 0 0>; + wp-gpios = <&v2m_sysreg 1 0>; + max-frequency = <12000000>; + vmmc-supply = <&v2m_fixed_3v3>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "mclk", "apb_pclk"; + }; + + kmi@60000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x060000 0x1000>; + interrupts = <0 12 4>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + kmi@70000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x070000 0x1000>; + interrupts = <0 13 4>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + v2m_serial0: uart@90000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x090000 0x1000>; + interrupts = <0 5 4>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial1: uart@a0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0a0000 0x1000>; + interrupts = <0 6 4>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial2: uart@b0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0b0000 0x1000>; + interrupts = <0 7 4>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial3: uart@c0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0c0000 0x1000>; + interrupts = <0 8 4>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + wdt@f0000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x0f0000 0x1000>; + interrupts = <0 0 4>; + clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>; + clock-names = "wdogclk", "apb_pclk"; + }; + + v2m_timer01: timer@110000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x110000 0x1000>; + interrupts = <0 2 4>; + clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>; + clock-names = "timclken1", "timclken2", "apb_pclk"; + }; + + v2m_timer23: timer@120000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x120000 0x1000>; + interrupts = <0 3 4>; + clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>; + clock-names = "timclken1", "timclken2", "apb_pclk"; + }; + + rtc@170000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0x170000 0x1000>; + interrupts = <0 4 4>; + clocks = <&v2m_clk24mhz>; + clock-names = "apb_pclk"; + }; + + clcd@1f0000 { + compatible = "arm,pl111", "arm,primecell"; + reg = <0x1f0000 0x1000>; + interrupt-names = "combined"; + interrupts = <0 14 4>; + clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; + clock-names = "clcdclk", "apb_pclk"; + arm,pl11x,framebuffer = <0x18000000 0x00180000>; + memory-region = <&v2m_video_ram>; + max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */ + + port { + v2m_clcd_pads: endpoint { + remote-endpoint = <&v2m_clcd_panel>; + arm,pl11x,tft-r0g0b0-pads = <0 8 16>; + }; + }; + + panel { + compatible = "panel-dpi"; + + port { + v2m_clcd_panel: endpoint { + remote-endpoint = <&v2m_clcd_pads>; + }; + }; + + panel-timing { + clock-frequency = <63500127>; + hactive = <1024>; + hback-porch = <152>; + hfront-porch = <48>; + hsync-len = <104>; + vactive = <768>; + vback-porch = <23>; + vfront-porch = <3>; + vsync-len = <4>; + }; + }; + }; + + virtio-block@130000 { + compatible = "virtio,mmio"; + reg = <0x130000 0x200>; + interrupts = <0 42 4>; + }; + }; + + v2m_fixed_3v3: v2m-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + mcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + + v2m_oscclk1: oscclk1 { + /* CLCD clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 1>; + freq-range = <23750000 63500000>; + #clock-cells = <0>; + clock-output-names = "v2m:oscclk1"; + }; + + reset { + compatible = "arm,vexpress-reset"; + arm,vexpress-sysreg,func = <5 0>; + }; + + muxfpga { + compatible = "arm,vexpress-muxfpga"; + arm,vexpress-sysreg,func = <7 0>; + }; + + shutdown { + compatible = "arm,vexpress-shutdown"; + arm,vexpress-sysreg,func = <8 0>; + }; + + reboot { + compatible = "arm,vexpress-reboot"; + arm,vexpress-sysreg,func = <9 0>; + }; + + dvimode { + compatible = "arm,vexpress-dvimode"; + arm,vexpress-sysreg,func = <11 0>; + }; + }; + }; + }; +}; diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts new file mode 100644 index 00000000..0e59fdf8 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2015-2016 ARM Limited + * All rights reserved + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Andreas Sandberg + */ + +/dts-v1/; + +/memreserve/ 0x80000000 0x00010000; + +/include/ "vexpress_gem5_v2.dtsi" + +/ { + model = "V2P-AARCH64"; + compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; + + memory@80000000 { + device_type = "memory"; + reg = <0 0x80000000 0x4 0x00000000>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 0 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + }; + + virt-encoder { + compatible = "drm,virtual-encoder"; + port { + dp0_virt_input: endpoint@0 { + remote-endpoint = <&dp0_output>; + }; + }; + + display-timings { + native-mode = <&timing0>; + + timing0: timing_1080p60 { + /* 1920x1080-60 */ + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <148>; + hback-porch = <88>; + hsync-len = <44>; + vfront-porch = <36>; + vback-porch = <4>; + vsync-len = <5>; + }; + }; + }; +}; + +&dp0 { + status = "ok"; + + port { + dp0_output: endpoint@0 { + remote-endpoint = <&dp0_virt_input>; + }; + }; +}; diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts new file mode 100644 index 00000000..441d3df2 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2015-2016 ARM Limited + * All rights reserved + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Andreas Sandberg + */ + +/dts-v1/; + +/memreserve/ 0x80000000 0x00010000; + +/include/ "vexpress_gem5_v2.dtsi" + +/ { + model = "V2P-AARCH64"; + compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; + + memory@80000000 { + device_type = "memory"; + reg = <0 0x80000000 0x4 0x00000000>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 0 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 1 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + }; + + virt-encoder { + compatible = "drm,virtual-encoder"; + port { + dp0_virt_input: endpoint@0 { + remote-endpoint = <&dp0_output>; + }; + }; + + display-timings { + native-mode = <&timing0>; + + timing0: timing_1080p60 { + /* 1920x1080-60 */ + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <148>; + hback-porch = <88>; + hsync-len = <44>; + vfront-porch = <36>; + vback-porch = <4>; + vsync-len = <5>; + }; + }; + }; +}; + +&dp0 { + status = "ok"; + + port { + dp0_output: endpoint@0 { + remote-endpoint = <&dp0_virt_input>; + }; + }; +}; diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts new file mode 100644 index 00000000..2d0311a5 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2015-2016 ARM Limited + * All rights reserved + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Andreas Sandberg + */ + +/dts-v1/; + +/memreserve/ 0x80000000 0x00010000; + +/include/ "vexpress_gem5_v2.dtsi" + +/ { + model = "V2P-AARCH64"; + compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; + + memory@80000000 { + device_type = "memory"; + reg = <0 0x80000000 0x4 0x00000000>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 0 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 1 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 2 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 3 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + }; + + virt-encoder { + compatible = "drm,virtual-encoder"; + port { + dp0_virt_input: endpoint@0 { + remote-endpoint = <&dp0_output>; + }; + }; + + display-timings { + native-mode = <&timing0>; + + timing0: timing_1080p60 { + /* 1920x1080-60 */ + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <148>; + hback-porch = <88>; + hsync-len = <44>; + vfront-porch = <36>; + vback-porch = <4>; + vsync-len = <5>; + }; + }; + }; +}; + +&dp0 { + status = "ok"; + + port { + dp0_output: endpoint@0 { + remote-endpoint = <&dp0_virt_input>; + }; + }; +}; diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts new file mode 100644 index 00000000..ba94d074 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts @@ -0,0 +1,151 @@ +/* + * Copyright (c) 2015-2016 ARM Limited + * All rights reserved + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Andreas Sandberg + */ + +/dts-v1/; + +/memreserve/ 0x80000000 0x00010000; + +/include/ "vexpress_gem5_v2.dtsi" + +/ { + model = "V2P-AARCH64"; + compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress"; + + memory@80000000 { + device_type = "memory"; + reg = <0 0x80000000 0x4 0x00000000>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 0 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 1 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 2 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 3 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + cpu@4 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 4 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + cpu@5 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 5 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + cpu@6 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 6 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + cpu@7 { + device_type = "cpu"; + compatible = "gem5,armv8", "arm,armv8"; + reg = < 7 >; + enable-method = "spin-table"; + cpu-release-addr = <0 0x8000fff8>; + }; + + }; + + virt-encoder { + compatible = "drm,virtual-encoder"; + port { + dp0_virt_input: endpoint@0 { + remote-endpoint = <&dp0_output>; + }; + }; + + display-timings { + native-mode = <&timing0>; + + timing0: timing_1080p60 { + /* 1920x1080-60 */ + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <148>; + hback-porch = <88>; + hsync-len = <44>; + vfront-porch = <36>; + vback-porch = <4>; + vsync-len = <5>; + }; + }; + }; +}; + +&dp0 { + status = "ok"; + + port { + dp0_output: endpoint@0 { + remote-endpoint = <&dp0_virt_input>; + }; + }; +}; diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2.dtsi b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2.dtsi new file mode 100644 index 00000000..e53e6e84 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2.dtsi @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2015-2018 ARM Limited + * All rights reserved + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Andreas Sandberg + */ + +/include/ "vexpress_gem5_v2_base.dtsi" + +/ { + /* The display processor needs custom configuration to setup its + * output ports. Disable it by default in the platform until the + * DT bindings have stabilize. + */ + dp0: hdlcd@2b000000 { + compatible = "arm,hdlcd"; + reg = <0x0 0x2b000000 0x0 0x1000>; + interrupts = <0 63 4>; + clocks = <&osc_pxl>; + clock-names = "pxlclk"; + status = "disabled"; + }; +}; diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi new file mode 100644 index 00000000..eba0db25 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi @@ -0,0 +1,202 @@ +/* + * Copyright (c) 2015-2017, 2019 ARM Limited + * All rights reserved + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Andreas Sandberg + */ + +/ { + arm,hbi = <0x0>; + arm,vexpress,site = <0xf>; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + gic: interrupt-controller@2c000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <0x3>; + #address-cells = <0x2>; + ranges; + interrupt-controller; + redistributor-stride = <0x0 0x40000>; // 256kB stride + reg = <0x0 0x2c000000 0x0 0x10000 + 0x0 0x2c010000 0x0 0x2000000 // room for 128 redistributors using 128K each (256K strided...) + 0x0 0x0 0x0 0x0>; + interrupts = <1 9 0xf04>; + #size-cells = <0x2>; + linux,phandle = <0x1>; + phandle = <0x1>; + + gic-its@2e010000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0x0 0x2e010000 0 0x20000>; + }; + }; + + timer { + compatible = "arm,cortex-a15-timer", + "arm,armv7-timer"; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0xf08>; + clocks = <&osc_sys>; + clock-names="apb_pclk"; + }; + + pci { + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + #address-cells = <0x3>; + #size-cells = <0x2>; + #interrupt-cells = <0x1>; + + reg = <0x0 0x30000000 0x0 0x10000000>; + + ranges = <0x01000000 0x0 0x00000000 0x0 0x2f000000 0x0 0x00010000>, + <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>; + + /* + child unit address, #cells = #address-cells + child interrupt specifier, #cells = #interrupt-cells (INTA = 1, INTB = 2, INTC = 3 and INTD = 4) + interrupt-parent, phandle + parent unit address, #cells = #address-cells@gic + parent interrupt specifier, #cells = #interrupt-cells@gic + */ + interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x44 0x1 + 0x800 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x45 0x1 + 0x1000 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x46 0x1 + 0x1800 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x47 0x1>; + + interrupt-map-mask = <0x001800 0x0 0x0 0x0>; + dma-coherent; + }; + + kmi@1c060000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x0 0x1c060000 0x0 0x1000>; + interrupts = <0 12 4>; + clocks = <&v2m_clk24mhz>, <&osc_smb>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + kmi@1c070000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x0 0x1c070000 0x0 0x1000>; + interrupts = <0 13 4>; + clocks = <&v2m_clk24mhz>, <&osc_smb>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + uart0: uart@1c090000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0x1c090000 0x0 0x1000>; + interrupts = <0 5 4>; + clocks = <&osc_peripheral>, <&osc_smb>; + clock-names = "uartclk", "apb_pclk"; + }; + + rtc@1c170000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0x0 0x1c170000 0x0 0x1000>; + interrupts = <0 4 4>; + clocks = <&osc_smb>; + clock-names = "apb_pclk"; + }; + + v2m_clk24mhz: clk24mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "v2m:clk24mhz"; + }; + + + v2m_sysreg: sysreg@1c010000 { + compatible = "arm,vexpress-sysreg"; + reg = <0 0x1c010000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + }; + + vio@1c130000 { + compatible = "virtio,mmio"; + reg = <0 0x1c130000 0x0 0x1000>; + interrupts = <0 42 4>; + }; + + vio@1c140000 { + compatible = "virtio,mmio"; + reg = <0 0x1c140000 0x0 0x1000>; + interrupts = <0 43 4>; + }; + + dcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + + osc_pxl: osc@5 { + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 5>; + freq-range = <23750000 1000000000>; + #clock-cells = <0>; + clock-output-names = "oscclk5"; + }; + + osc_smb: osc@6 { + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 6>; + freq-range = <20000000 50000000>; + #clock-cells = <0>; + clock-output-names = "oscclk6"; + }; + + osc_sys: osc@7 { + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 7>; + freq-range = <20000000 60000000>; + #clock-cells = <0>; + clock-output-names = "oscclk7"; + }; + }; + + + mcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + arm,vexpress,site = <0>; + + osc_peripheral: osc@2 { + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 2>; + freq-range = <24000000 24000000>; + #clock-cells = <0>; + clock-output-names = "v2m:oscclk2"; + }; + }; +}; diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0001-TMP-iommu-arm-smmu-v3-Ignore-IOPF-capabilities.patch b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0001-TMP-iommu-arm-smmu-v3-Ignore-IOPF-capabilities.patch new file mode 100644 index 00000000..e1ff4a55 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0001-TMP-iommu-arm-smmu-v3-Ignore-IOPF-capabilities.patch @@ -0,0 +1,46 @@ +From 4ebcbe09471d6b6b18fce42993489bed3801f10c Mon Sep 17 00:00:00 2001 +From: Jean-Philippe Brucker <jean-philippe@linaro.org> +Date: Fri, 24 Jan 2020 10:17:14 +0100 +Subject: [PATCH 1/4] TMP: iommu/arm-smmu-v3: Ignore IOPF capabilities + +Don't mandate PRI or stall to enable SVA. Some devices have their own +method for managing I/O page faults when they notice a translation +request that fails. + +Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> +--- + drivers/iommu/arm-smmu-v3.c | 18 +++++++++++++++++- + 1 file changed, 17 insertions(+), 1 deletion(-) + +diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c +index fed6a9d5867e..a8d7d6ccbb21 100644 +--- a/drivers/iommu/arm-smmu-v3.c ++++ b/drivers/iommu/arm-smmu-v3.c +@@ -3276,7 +3276,23 @@ static bool arm_smmu_ats_supported(struct arm_smmu_master *master) + + static bool arm_smmu_iopf_supported(struct arm_smmu_master *master) + { +- return master->stall_enabled || master->pri_supported; ++ /* return master->stall_enabled || master->pri_supported; */ ++ ++ /* ++ * FIXME: this temporary hack allows enabling SVA for any endpoint even ++ * when they don't have PRI/stall. ++ * ++ * To implement this more cleanly, we need a third method, complementing ++ * stall_enabled and pri_supported, to enable IOPF. A bit that says ++ * "this device's page faults are handled out of band", called for ++ * example master->oob_iopf. How to set it? It can easily be a firmware ++ * quirk, but that does not suffice in my opinion. We need to know that ++ * there is software ready to handle these page faults. The device ++ * driver owning this endpoint could for example call ++ * iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_OOB_IOPF), before ++ * enabling IOMMU_DEV_FEAT_SVA. ++ */ ++ return true; + } + + static void arm_smmu_enable_ats(struct arm_smmu_master *master) +-- +2.25.0 + diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0002-pci_quirk-add-acs-override-for-PCI-devices.patch b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0002-pci_quirk-add-acs-override-for-PCI-devices.patch new file mode 100644 index 00000000..a66083a8 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0002-pci_quirk-add-acs-override-for-PCI-devices.patch @@ -0,0 +1,156 @@ +From 224e4adc6bc6a23f5deb3e1ebea03a85e3cad606 Mon Sep 17 00:00:00 2001 +From: Manoj Kumar <manoj.kumar3@arm.com> +Date: Mon, 3 Feb 2020 10:11:19 +0000 +Subject: [PATCH 2/4] pci_quirk: add acs override for PCI devices + +Patch taken from: +https://gitlab.com/Queuecumber/linux-acs-override/raw/master/workspaces/5.4/acso.patch + +Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com> +--- + .../admin-guide/kernel-parameters.txt | 9 ++ + drivers/pci/quirks.c | 101 ++++++++++++++++++ + 2 files changed, 110 insertions(+) + +diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt +index 8d7932502edc..f2be8337e98c 100644 +--- a/Documentation/admin-guide/kernel-parameters.txt ++++ b/Documentation/admin-guide/kernel-parameters.txt +@@ -3423,6 +3423,15 @@ + nomsi [MSI] If the PCI_MSI kernel config parameter is + enabled, this kernel boot option can be used to + disable the use of MSI interrupts system-wide. ++ pcie_acs_override = ++ [PCIE] Override missing PCIe ACS support for: ++ downstream ++ All downstream ports - full ACS capabilities ++ multfunction ++ All multifunction devices - multifunction ACS subset ++ id:nnnn:nnnn ++ Specfic device - full ACS capabilities ++ Specified as vid:did (vendor/device ID) in hex + noioapicquirk [APIC] Disable all boot interrupt quirks. + Safety option to keep boot IRQs enabled. This + should never be necessary. +diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c +index d134e12aab9d..9067bc7833be 100644 +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -3494,6 +3494,106 @@ static void quirk_no_bus_reset(struct pci_dev *dev) + dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET; + } + ++static bool acs_on_downstream; ++static bool acs_on_multifunction; ++ ++#define NUM_ACS_IDS 16 ++struct acs_on_id { ++ unsigned short vendor; ++ unsigned short device; ++}; ++static struct acs_on_id acs_on_ids[NUM_ACS_IDS]; ++static u8 max_acs_id; ++ ++static __init int pcie_acs_override_setup(char *p) ++{ ++ if (!p) ++ return -EINVAL; ++ ++ while (*p) { ++ if (!strncmp(p, "downstream", 10)) ++ acs_on_downstream = true; ++ if (!strncmp(p, "multifunction", 13)) ++ acs_on_multifunction = true; ++ if (!strncmp(p, "id:", 3)) { ++ char opt[5]; ++ int ret; ++ long val; ++ ++ if (max_acs_id >= NUM_ACS_IDS - 1) { ++ pr_warn("Out of PCIe ACS override slots (%d)\n", ++ NUM_ACS_IDS); ++ goto next; ++ } ++ ++ p += 3; ++ snprintf(opt, 5, "%s", p); ++ ret = kstrtol(opt, 16, &val); ++ if (ret) { ++ pr_warn("PCIe ACS ID parse error %d\n", ret); ++ goto next; ++ } ++ acs_on_ids[max_acs_id].vendor = val; ++ ++ p += strcspn(p, ":"); ++ if (*p != ':') { ++ pr_warn("PCIe ACS invalid ID\n"); ++ goto next; ++ } ++ ++ p++; ++ snprintf(opt, 5, "%s", p); ++ ret = kstrtol(opt, 16, &val); ++ if (ret) { ++ pr_warn("PCIe ACS ID parse error %d\n", ret); ++ goto next; ++ } ++ acs_on_ids[max_acs_id].device = val; ++ max_acs_id++; ++ } ++next: ++ p += strcspn(p, ","); ++ if (*p == ',') ++ p++; ++ } ++ ++ if (acs_on_downstream || acs_on_multifunction || max_acs_id) ++ pr_warn("Warning: PCIe ACS overrides enabled; This may allow non-IOMMU protected peer-to-peer DMA\n"); ++ ++ return 0; ++} ++early_param("pcie_acs_override", pcie_acs_override_setup); ++ ++static int pcie_acs_overrides(struct pci_dev *dev, u16 acs_flags) ++{ ++ int i; ++ ++ /* Never override ACS for legacy devices or devices with ACS caps */ ++ if (!pci_is_pcie(dev) || ++ pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS)) ++ return -ENOTTY; ++ ++ for (i = 0; i < max_acs_id; i++) ++ if (acs_on_ids[i].vendor == dev->vendor && ++ acs_on_ids[i].device == dev->device) ++ return 1; ++ ++ switch (pci_pcie_type(dev)) { ++ case PCI_EXP_TYPE_DOWNSTREAM: ++ case PCI_EXP_TYPE_ROOT_PORT: ++ if (acs_on_downstream) ++ return 1; ++ break; ++ case PCI_EXP_TYPE_ENDPOINT: ++ case PCI_EXP_TYPE_UPSTREAM: ++ case PCI_EXP_TYPE_LEG_END: ++ case PCI_EXP_TYPE_RC_END: ++ if (acs_on_multifunction && dev->multifunction) ++ return 1; ++ } ++ ++ return -ENOTTY; ++} + /* + * Some Atheros AR9xxx and QCA988x chips do not behave after a bus reset. + * The device will throw a Link Down error on AER-capable systems and +@@ -4674,6 +4774,7 @@ static const struct pci_dev_acs_enabled { + { PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs }, + /* Amazon Annapurna Labs */ + { PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031, pci_quirk_al_acs }, ++ { PCI_ANY_ID, PCI_ANY_ID, pcie_acs_overrides }, + { 0 } + }; + +-- +2.25.0 + diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0003-pcie-Add-quirk-for-the-Arm-Neoverse-N1SDP-platform.patch b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0003-pcie-Add-quirk-for-the-Arm-Neoverse-N1SDP-platform.patch new file mode 100644 index 00000000..d827e9d0 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0003-pcie-Add-quirk-for-the-Arm-Neoverse-N1SDP-platform.patch @@ -0,0 +1,318 @@ +From 813f6c6015c75caf25553cd2e36361bac9151145 Mon Sep 17 00:00:00 2001 +From: Deepak Pandey <Deepak.Pandey@arm.com> +Date: Mon, 9 Dec 2019 16:06:38 +0000 +Subject: [PATCH 3/4] pcie: Add quirk for the Arm Neoverse N1SDP platform + +The Arm N1SDP SoC suffers from some PCIe integration issues, most +prominently config space accesses to not existing BDFs being answered +with a bus abort, resulting in an SError. +To mitigate this, the firmware scans the bus before boot (catching the +SErrors) and creates a table with valid BDFs, which acts as a filter for +Linux' config space accesses. + +Add code consulting the table as an ACPI PCIe quirk, also register the +corresponding device tree based description of the host controller. +Also fix the other two minor issues on the way, namely not being fully +ECAM compliant and config space accesses being restricted to 32-bit +accesses only. + +This allows the Arm Neoverse N1SDP board to boot Linux without crashing +and to access *any* devices (there are no platform devices except UART). + +Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com> +[Sudipto: extend to cover the CCIX root port as well] +Signed-off-by: Sudipto Paul <sudipto.paul@arm.com> +[Andre: fix coding style issues, rewrite some parts, add DT support] +Signed-off-by: Andre Przywara <andre.przywara@arm.com> +--- + arch/arm64/configs/defconfig | 1 + + drivers/acpi/pci_mcfg.c | 7 + + drivers/pci/controller/Kconfig | 11 ++ + drivers/pci/controller/Makefile | 1 + + drivers/pci/controller/pcie-n1sdp.c | 196 ++++++++++++++++++++++++++++ + include/linux/pci-ecam.h | 2 + + 6 files changed, 218 insertions(+) + create mode 100644 drivers/pci/controller/pcie-n1sdp.c + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index 619a892148fb..56f00e82a4c4 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -177,6 +177,7 @@ CONFIG_NET_9P=y + CONFIG_NET_9P_VIRTIO=y + CONFIG_PCI=y + CONFIG_PCIEPORTBUS=y ++CONFIG_PCI_QUIRKS=y + CONFIG_PCI_IOV=y + CONFIG_HOTPLUG_PCI=y + CONFIG_HOTPLUG_PCI_ACPI=y +diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c +index 6b347d9920cc..7a2b41b9ab57 100644 +--- a/drivers/acpi/pci_mcfg.c ++++ b/drivers/acpi/pci_mcfg.c +@@ -142,6 +142,13 @@ static struct mcfg_fixup mcfg_quirks[] = { + XGENE_V2_ECAM_MCFG(4, 0), + XGENE_V2_ECAM_MCFG(4, 1), + XGENE_V2_ECAM_MCFG(4, 2), ++ ++#define N1SDP_ECAM_MCFG(rev, seg, ops) \ ++ {"ARMLTD", "ARMN1SDP", rev, seg, MCFG_BUS_ANY, ops } ++ ++ /* N1SDP SoC with v1 PCIe controller */ ++ N1SDP_ECAM_MCFG(0x20181101, 0, &pci_n1sdp_pcie_ecam_ops), ++ N1SDP_ECAM_MCFG(0x20181101, 1, &pci_n1sdp_ccix_ecam_ops), + }; + + static char mcfg_oem_id[ACPI_OEM_ID_SIZE]; +diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig +index 70e078238899..03860176e339 100644 +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -65,6 +65,17 @@ config PCI_FTPCI100 + depends on OF + default ARCH_GEMINI + ++config PCIE_HOST_N1SDP_ECAM ++ bool "ARM N1SDP PCIe Controller" ++ depends on ARM64 ++ depends on OF || (ACPI && PCI_QUIRKS) ++ select PCI_HOST_COMMON ++ default y if ARCH_VEXPRESS ++ help ++ Say Y here if you want PCIe support for the Arm N1SDP platform. ++ The controller is ECAM compliant, but needs a quirk to workaround ++ an integration issue. ++ + config PCI_TEGRA + bool "NVIDIA Tegra PCIe controller" + depends on ARCH_TEGRA || COMPILE_TEST +diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makefile +index a2a22c9d91af..7ea98c5a04ec 100644 +--- a/drivers/pci/controller/Makefile ++++ b/drivers/pci/controller/Makefile +@@ -30,6 +30,7 @@ obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o + obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o + obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o + obj-$(CONFIG_VMD) += vmd.o ++obj-$(CONFIG_PCIE_HOST_N1SDP_ECAM) += pcie-n1sdp.o + # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW + obj-y += dwc/ + +diff --git a/drivers/pci/controller/pcie-n1sdp.c b/drivers/pci/controller/pcie-n1sdp.c +new file mode 100644 +index 000000000000..620ab221466c +--- /dev/null ++++ b/drivers/pci/controller/pcie-n1sdp.c +@@ -0,0 +1,196 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2018/2019 ARM Ltd. ++ * ++ * This quirk is to mask the following issues: ++ * - PCIE SLVERR: config space accesses to invalid PCIe BDFs cause a bus ++ * error (signalled as an asynchronous SError) ++ * - MCFG BDF mapping: the root complex is mapped separately from the device ++ * config space ++ * - Non 32-bit accesses to config space are not supported. ++ * ++ * At boot time the SCP board firmware creates a discovery table with ++ * the root complex' base address and the valid BDF values, discovered while ++ * scanning the config space and catching the SErrors. ++ * Linux responds only to the EPs listed in this table, returning NULL ++ * for the rest. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/ioport.h> ++#include <linux/sizes.h> ++#include <linux/of_pci.h> ++#include <linux/of.h> ++#include <linux/pci-ecam.h> ++#include <linux/platform_device.h> ++#include <linux/module.h> ++ ++/* Platform specific values as hardcoded in the firmware. */ ++#define AP_NS_SHARED_MEM_BASE 0x06000000 ++#define MAX_SEGMENTS 2 /* Two PCIe root complexes. */ ++#define BDF_TABLE_SIZE SZ_16K ++ ++/* ++ * Shared memory layout as written by the SCP upon boot time: ++ * ---- ++ * Discover data header --> RC base address ++ * \-> BDF Count ++ * Discover data --> BDF 0...n ++ * ---- ++ */ ++struct pcie_discovery_data { ++ u32 rc_base_addr; ++ u32 nr_bdfs; ++ u32 valid_bdfs[0]; ++} *pcie_discovery_data[MAX_SEGMENTS]; ++ ++void __iomem *rc_remapped_addr[MAX_SEGMENTS]; ++ ++/* ++ * map_bus() is called before we do a config space access for a certain ++ * device. We use this to check whether this device is valid, avoiding ++ * config space accesses which would result in an SError otherwise. ++ */ ++static void __iomem *pci_n1sdp_map_bus(struct pci_bus *bus, unsigned int devfn, ++ int where) ++{ ++ struct pci_config_window *cfg = bus->sysdata; ++ unsigned int devfn_shift = cfg->ops->bus_shift - 8; ++ unsigned int busn = bus->number; ++ unsigned int segment = bus->domain_nr; ++ unsigned int bdf_addr; ++ unsigned int table_count, i; ++ ++ if (segment >= MAX_SEGMENTS || ++ busn < cfg->busr.start || busn > cfg->busr.end) ++ return NULL; ++ ++ /* The PCIe root complex has a separate config space mapping. */ ++ if (busn == 0 && devfn == 0) ++ return rc_remapped_addr[segment] + where; ++ ++ busn -= cfg->busr.start; ++ bdf_addr = (busn << cfg->ops->bus_shift) + (devfn << devfn_shift); ++ table_count = pcie_discovery_data[segment]->nr_bdfs; ++ for (i = 0; i < table_count; i++) { ++ if (bdf_addr == pcie_discovery_data[segment]->valid_bdfs[i]) ++ return pci_ecam_map_bus(bus, devfn, where); ++ } ++ ++ return NULL; ++} ++ ++static int pci_n1sdp_init(struct pci_config_window *cfg, unsigned int segment) ++{ ++ phys_addr_t table_base; ++ struct device *dev = cfg->parent; ++ struct pcie_discovery_data *shared_data; ++ size_t bdfs_size; ++ ++ if (segment >= MAX_SEGMENTS) ++ return -ENODEV; ++ ++ table_base = AP_NS_SHARED_MEM_BASE + segment * BDF_TABLE_SIZE; ++ ++ if (!request_mem_region(table_base, BDF_TABLE_SIZE, ++ "PCIe valid BDFs")) { ++ dev_err(dev, "PCIe BDF shared region request failed\n"); ++ return -ENOMEM; ++ } ++ ++ shared_data = devm_ioremap(dev, ++ table_base, BDF_TABLE_SIZE); ++ if (!shared_data) ++ return -ENOMEM; ++ ++ /* Copy the valid BDFs structure to allocated normal memory. */ ++ bdfs_size = sizeof(struct pcie_discovery_data) + ++ sizeof(u32) * shared_data->nr_bdfs; ++ pcie_discovery_data[segment] = devm_kmalloc(dev, bdfs_size, GFP_KERNEL); ++ if (!pcie_discovery_data[segment]) ++ return -ENOMEM; ++ ++ memcpy_fromio(pcie_discovery_data[segment], shared_data, bdfs_size); ++ ++ rc_remapped_addr[segment] = devm_ioremap_nocache(dev, ++ shared_data->rc_base_addr, ++ PCI_CFG_SPACE_EXP_SIZE); ++ if (!rc_remapped_addr[segment]) { ++ dev_err(dev, "Cannot remap root port base\n"); ++ return -ENOMEM; ++ } ++ ++ devm_iounmap(dev, shared_data); ++ ++ return 0; ++} ++ ++static int pci_n1sdp_pcie_init(struct pci_config_window *cfg) ++{ ++ return pci_n1sdp_init(cfg, 0); ++} ++ ++static int pci_n1sdp_ccix_init(struct pci_config_window *cfg) ++{ ++ return pci_n1sdp_init(cfg, 1); ++} ++ ++struct pci_ecam_ops pci_n1sdp_pcie_ecam_ops = { ++ .bus_shift = 20, ++ .init = pci_n1sdp_pcie_init, ++ .pci_ops = { ++ .map_bus = pci_n1sdp_map_bus, ++ .read = pci_generic_config_read32, ++ .write = pci_generic_config_write32, ++ } ++}; ++ ++struct pci_ecam_ops pci_n1sdp_ccix_ecam_ops = { ++ .bus_shift = 20, ++ .init = pci_n1sdp_ccix_init, ++ .pci_ops = { ++ .map_bus = pci_n1sdp_map_bus, ++ .read = pci_generic_config_read32, ++ .write = pci_generic_config_write32, ++ } ++}; ++ ++static const struct of_device_id n1sdp_pcie_of_match[] = { ++ { .compatible = "arm,n1sdp-pcie" }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, n1sdp_pcie_of_match); ++ ++static int n1sdp_pcie_probe(struct platform_device *pdev) ++{ ++ const struct device_node *of_node = pdev->dev.of_node; ++ u32 segment; ++ ++ if (of_property_read_u32(of_node, "linux,pci-domain", &segment)) { ++ dev_err(&pdev->dev, "N1SDP PCI controllers require linux,pci-domain property\n"); ++ return -EINVAL; ++ } ++ ++ switch (segment) { ++ case 0: ++ return pci_host_common_probe(pdev, &pci_n1sdp_pcie_ecam_ops); ++ case 1: ++ return pci_host_common_probe(pdev, &pci_n1sdp_ccix_ecam_ops); ++ } ++ ++ dev_err(&pdev->dev, "Invalid segment number, must be smaller than %d\n", ++ MAX_SEGMENTS); ++ ++ return -EINVAL; ++} ++ ++static struct platform_driver n1sdp_pcie_driver = { ++ .driver = { ++ .name = KBUILD_MODNAME, ++ .of_match_table = n1sdp_pcie_of_match, ++ .suppress_bind_attrs = true, ++ }, ++ .probe = n1sdp_pcie_probe, ++}; ++builtin_platform_driver(n1sdp_pcie_driver); +diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h +index a73164c85e78..03cdea69f4e8 100644 +--- a/include/linux/pci-ecam.h ++++ b/include/linux/pci-ecam.h +@@ -57,6 +57,8 @@ extern struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */ + extern struct pci_ecam_ops xgene_v1_pcie_ecam_ops; /* APM X-Gene PCIe v1 */ + extern struct pci_ecam_ops xgene_v2_pcie_ecam_ops; /* APM X-Gene PCIe v2.x */ + extern struct pci_ecam_ops al_pcie_ops; /* Amazon Annapurna Labs PCIe */ ++extern struct pci_ecam_ops pci_n1sdp_pcie_ecam_ops; /* Arm N1SDP PCIe */ ++extern struct pci_ecam_ops pci_n1sdp_ccix_ecam_ops; /* Arm N1SDP PCIe */ + #endif + + #ifdef CONFIG_PCI_HOST_COMMON +-- +2.25.0 + diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0004-n1sdp-update-n1sdp-pci-quirk-for-SR-IOV-support.patch b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0004-n1sdp-update-n1sdp-pci-quirk-for-SR-IOV-support.patch new file mode 100644 index 00000000..6fb2dacd --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/0004-n1sdp-update-n1sdp-pci-quirk-for-SR-IOV-support.patch @@ -0,0 +1,51 @@ +From 7bcc0412428050b0ab1fd70cbb4aaead5ac3c0e5 Mon Sep 17 00:00:00 2001 +From: Manoj Kumar <manoj.kumar3@arm.com> +Date: Wed, 29 Jan 2020 17:21:39 +0000 +Subject: [PATCH 4/4] n1sdp: update n1sdp pci quirk for SR-IOV support + +VFs are not probing the vendor ID first, which is otherwise +the gate keeper for undiscovered devices. So any accesses using +a config space offset greater than 0 must be coming for an +already discovered device or from a VF that has just been created. + +Also if Linux already has a struct pci_dev* for a given BDF, +this device is safe to access. + +Skip the firmware table in these cases and allow accesses to +those devices. That enables SR-IOV support on the N1SDP board. + +Signed-off-by: Andre Przywara <andre.przywara@arm.com> +--- + drivers/pci/controller/pcie-n1sdp.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/pci/controller/pcie-n1sdp.c b/drivers/pci/controller/pcie-n1sdp.c +index 620ab221466c..04c0de043817 100644 +--- a/drivers/pci/controller/pcie-n1sdp.c ++++ b/drivers/pci/controller/pcie-n1sdp.c +@@ -61,6 +61,7 @@ static void __iomem *pci_n1sdp_map_bus(struct pci_bus *bus, unsigned int devfn, + unsigned int segment = bus->domain_nr; + unsigned int bdf_addr; + unsigned int table_count, i; ++ struct pci_dev *dev; + + if (segment >= MAX_SEGMENTS || + busn < cfg->busr.start || busn > cfg->busr.end) +@@ -70,6 +71,14 @@ static void __iomem *pci_n1sdp_map_bus(struct pci_bus *bus, unsigned int devfn, + if (busn == 0 && devfn == 0) + return rc_remapped_addr[segment] + where; + ++ dev = pci_get_domain_bus_and_slot(segment, busn, devfn); ++ if (dev && dev->is_virtfn) ++ return pci_ecam_map_bus(bus, devfn, where); ++ ++ /* Accesses beyond the vendor ID always go to existing devices. */ ++ if (where > 0) ++ return pci_ecam_map_bus(bus, devfn, where); ++ + busn -= cfg->busr.start; + bdf_addr = (busn << cfg->ops->bus_shift) + (devfn << devfn_shift); + table_count = pcie_discovery_data[segment]->nr_bdfs; +-- +2.25.0 + diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/disable-extra-fw.cfg b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/disable-extra-fw.cfg new file mode 100644 index 00000000..35afdddf --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm-5.4/n1sdp/disable-extra-fw.cfg @@ -0,0 +1,2 @@ +# We don't want to build firmware blobs into the kernel binary +CONFIG_EXTRA_FIRMWARE="" diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_4.19.bb b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_4.19.bb new file mode 100644 index 00000000..089f6cba --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_4.19.bb @@ -0,0 +1,32 @@ +# Recipe for building linaro provided kernel + +KBRANCH ?= "latest-4.19-armlt-19.01" + +require recipes-kernel/linux/linux-yocto.inc + + +SRCREV_machine ?= "e97e8d868aba53467039dbef3b7436c857433ae3" + +SRCREV_meta ?= "ad6f8b357720ca8167a090713b7746230cf4b314" + +SRC_URI = "git://git.linaro.org/landing-teams/working/arm/kernel-release.git;name=machine;branch=${KBRANCH}; \ + git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-4.19;destsuffix=${KMETA} \ + file://0001-menuconfig-mconf-cfg-Allow-specification-of-ncurses-location.patch \ + " + +LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814" +LINUX_VERSION ?= "4.19.0" + +DEPENDS += "${@bb.utils.contains('ARCH', 'x86', 'elfutils-native', '', d)}" +DEPENDS += "openssl-native util-linux-native" + +PV = "${LINUX_VERSION}+git${SRCPV}" + +KMETA = "kernel-meta" +KCONF_BSP_AUDIT_LEVEL = "2" + +# Functionality flags +KERNEL_EXTRA_FEATURES ?= "features/netfilter/netfilter.scc" +KERNEL_FEATURES_append = " ${KERNEL_EXTRA_FEATURES}" +KERNEL_FEATURES_append = " ${@bb.utils.contains("TUNE_FEATURES", "mx32", " cfg/x32.scc", "" ,d)}" +KERNEL_FEATURES_append = " ${@bb.utils.contains("DISTRO_FEATURES", "ptest", " features/scsi/scsi-debug.scc", "" ,d)}" diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_4.19.bbappend b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_4.19.bbappend new file mode 100644 index 00000000..ed6fbc3f --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_4.19.bbappend @@ -0,0 +1,3 @@ +# Add support for Arm Platforms (boards or simulators) + +require linux-yocto-arm-platforms.inc diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_5.4.bb b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_5.4.bb new file mode 100644 index 00000000..d2cd1270 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_5.4.bb @@ -0,0 +1,21 @@ +# Add support for Arm Linaro Kernel 5.4 for Arm Platforms (boards or simulators) + +SUMMARY = "Linux Kernel Upstream, supported by Arm/Linaro" +LICENSE = "GPLv2" +SECTION = "kernel" + +require recipes-kernel/linux/linux-yocto.inc + +COMPATIBLE_MACHINE ?= "invalid" + +# KBRANCH is set to n1sdp by default as there is no master branch on the repository +KBRANCH = "n1sdp" + +SRC_URI = "git://git.linaro.org/landing-teams/working/arm/kernel-release.git;nobranch=1 \ + file://0001-menuconfig-mconf-cfg-Allow-specification-of-ncurses-location.patch \ + " +LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814" + +# Refer to commit TAG N1SDP-2020.03.26 since it will not get force pushed +SRCREV = "137cccb0843e63b031acf67d1ca4f6447b8c417c" +LINUX_VERSION ?= "${PV}" diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_5.4.bbappend b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_5.4.bbappend new file mode 100644 index 00000000..0f516c78 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_5.4.bbappend @@ -0,0 +1,28 @@ +# +# N1SDP MACHINE specific configurations +# + +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}-5.4:" + +# Apply N1SDP specific patches +SRC_URI_append_n1sdp = " \ + git://git.linaro.org/landing-teams/working/arm/device-tree.git;name=dts;nobranch=1;destsuffix=git/arch/arm64/boot/dts \ + file://0001-TMP-iommu-arm-smmu-v3-Ignore-IOPF-capabilities.patch \ + file://0002-pci_quirk-add-acs-override-for-PCI-devices.patch \ + file://0003-pcie-Add-quirk-for-the-Arm-Neoverse-N1SDP-platform.patch \ + file://0004-n1sdp-update-n1sdp-pci-quirk-for-SR-IOV-support.patch \ + file://disable-extra-fw.cfg \ + " + +# Referring to commit TAG N1SDP-2020.03.26 +SRCREV_n1sdp = "137cccb0843e63b031acf67d1ca4f6447b8c417c" +SRCREV_dts_n1sdp = "3209a868152f348194cc1f20fd87c759d3a97d45" + +# Use intree defconfig +KBUILD_DEFCONFIG_n1sdp = "defconfig" + +# Since the intree defconfig in n1sdp kernel repository is not setting all the configs, +# KCONFIG_MODE is set to "alldefconfig" to properly expand the defconfig. +KCONFIG_MODE_n1sdp = "--alldefconfig" + +COMPATIBLE_MACHINE_n1sdp = "n1sdp" diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-upstream-arm-platforms.inc b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-upstream-arm-platforms.inc new file mode 100644 index 00000000..7b73e753 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-upstream-arm-platforms.inc @@ -0,0 +1,24 @@ +DESCRIPTION = "Linux Kernel based on upstream tree" +SECTION = "kernel" +LICENSE = "GPLv2" +SRCREV_FORMAT = "kernel" + +require recipes-kernel/linux/linux-yocto.inc + +KERNEL_VERSION_SANITY_SKIP = "1" + +S = "${WORKDIR}/git" + +# Override do_kernel_configme to avoid kernel being assembled into a linux-yocto +# style kernel +# https://www.yoctoproject.org/docs/latest/ref-manual/ref-manual.html#ref-tasks-kernel_configme +do_kernel_configme[noexec] = "1" + +# Make sure no branch is defined since here we track a specific version +KBRANCH = "" + +LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814" + +SRC_URI = "\ + git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux;protocol=https;nobranch=1 \ + " diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-upstream-arm_5.3.bb b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-upstream-arm_5.3.bb new file mode 100644 index 00000000..88a06c4b --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-upstream-arm_5.3.bb @@ -0,0 +1,8 @@ +# Add support for Upstream Kernel for Arm Platforms (boards or simulators) + +SUMMARY = "Linux Kernel Upstream, supported by Arm/Linaro" + +require recipes-kernel/linux/linux-upstream-arm-platforms.inc + +SRCREV = "v${PV}" +LINUX_VERSION ?= "${PV}" diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-yocto-arm-platforms.inc b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-yocto-arm-platforms.inc new file mode 100644 index 00000000..eeb05713 --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-yocto-arm-platforms.inc @@ -0,0 +1,47 @@ +# Kernel configuration and dts specific information + +# +# Kernel configurations and dts (If not using Linux provided ones) are captured +# in this file. Update SRC_URI and do_patch for building images with custom dts +# + +FILESEXTRAPATHS_prepend := "${THISDIR}:${THISDIR}/files:" + +# Arm platforms kmeta +SRC_URI += "file://arm-platforms-kmeta;type=kmeta;name=arm-platforms-kmeta;destsuffix=arm-platforms-kmeta" + +# +# FVP FOUNDATION KMACHINE +# +COMPATIBLE_MACHINE_foundation-armv8 = "foundation-armv8" +KMACHINE_foundation-armv8 = "fvp" + +# +# FVP BASE KMACHINE +# +COMPATIBLE_MACHINE_fvp-base = "fvp-base" +KMACHINE_fvp-base = "fvp" +SRC_URI_append_fvp-base = " file://dts/arm;subdir=add-files" + +do_patch_append_fvp-base() { + tar -C ${WORKDIR}/add-files/dts -cf - arm | \ + tar -C arch/arm64/boot/dts -xf - +} + +# +# Juno KMACHINE +# +COMPATIBLE_MACHINE_juno = "juno" +KMACHINE_juno = "juno" + +# +# Gem5 arm64 KMACHINE +# +COMPATIBLE_MACHINE_gem5-arm64 = "gem5-arm64" +KMACHINE_gem5-arm64 = "gem5-arm64" +SRC_URI_append_gem5-arm64 = " file://dts/gem5-arm64;subdir=add-files" + +do_patch_append_gem5-arm64() { + tar -C ${WORKDIR}/add-files/dts -cf - gem5-arm64 | \ + tar -C arch/arm64/boot/dts -xf - +} diff --git a/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-yocto_5.4.bbappend b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-yocto_5.4.bbappend new file mode 100644 index 00000000..ed6fbc3f --- /dev/null +++ b/bsp/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-yocto_5.4.bbappend @@ -0,0 +1,3 @@ +# Add support for Arm Platforms (boards or simulators) + +require linux-yocto-arm-platforms.inc |