diff options
Diffstat (limited to 'bsp/meta-rcar/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0370-arm64-dts-renesas-v3msk-Add-s25fs512s-QSPI-flash-nod.patch')
| -rw-r--r-- | bsp/meta-rcar/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0370-arm64-dts-renesas-v3msk-Add-s25fs512s-QSPI-flash-nod.patch | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/bsp/meta-rcar/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0370-arm64-dts-renesas-v3msk-Add-s25fs512s-QSPI-flash-nod.patch b/bsp/meta-rcar/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0370-arm64-dts-renesas-v3msk-Add-s25fs512s-QSPI-flash-nod.patch new file mode 100644 index 00000000..4753e389 --- /dev/null +++ b/bsp/meta-rcar/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0370-arm64-dts-renesas-v3msk-Add-s25fs512s-QSPI-flash-nod.patch @@ -0,0 +1,107 @@ +From d9c1db5efa52e0febebfdc351905501760d37454 Mon Sep 17 00:00:00 2001 +From: Valentine Barshak <valentine.barshak@cogentembedded.com> +Date: Fri, 16 Nov 2018 00:02:40 +0300 +Subject: [PATCH 190/211] arm64: dts: renesas: v3msk: Add s25fs512s QSPI flash + node + +Add s25fs512s QSPI flash node. This is based +on the original patch by Dmitry Shifrin. + +Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com> +Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> +--- + arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts | 72 ++++++++++++++++++++++++++ + 1 file changed, 72 insertions(+) + +diff --git a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts +index adc2b01..ef9a2c5 100644 +--- a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts ++++ b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts +@@ -179,12 +179,84 @@ + power-source = <3300>; + }; + ++ qspi0_pins: qspi0 { ++ groups = "qspi0_ctrl", "qspi0_data4"; ++ function = "qspi0"; ++ }; ++ ++ qspi1_pins: qspi1 { ++ groups = "qspi1_ctrl", "qspi1_data4"; ++ function = "qspi1"; ++ }; ++ + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; + }; + ++&qspi0 { ++ pinctrl-0 = <&qspi0_pins &qspi1_pins>; ++ pinctrl-names = "default"; ++ ++ status = "okay"; ++ ++ flash@0 { ++ compatible = "spansion,s25fs512s", "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <50000000>; ++ spi-rx-bus-width = <4>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ bootparam@0 { ++ reg = <0x00000000 0x040000>; ++ read-only; ++ }; ++ cr7@00040000 { ++ reg = <0x00040000 0x080000>; ++ read-only; ++ }; ++ cert_header_sa3@000C0000 { ++ reg = <0x000C0000 0x080000>; ++ read-only; ++ }; ++ bl2@00140000 { ++ reg = <0x00140000 0x040000>; ++ read-only; ++ }; ++ cert_header_sa6@00180000 { ++ reg = <0x00180000 0x040000>; ++ read-only; ++ }; ++ bl31@001C0000 { ++ reg = <0x001C0000 0x480000>; ++ read-only; ++ }; ++ uboot@00640000 { ++ reg = <0x00640000 0x0C0000>; ++ read-only; ++ }; ++ uboot-env@00700000 { ++ reg = <0x00700000 0x040000>; ++ read-only; ++ }; ++ dtb@00740000 { ++ reg = <0x00740000 0x080000>; ++ }; ++ kernel@007C0000 { ++ reg = <0x007C0000 0x1400000>; ++ }; ++ user@01BC0000 { ++ reg = <0x01BC0000 0x2440000>; ++ }; ++ }; ++ }; ++}; ++ + &i2c0 { + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; +-- +2.7.4 + |