summaryrefslogtreecommitdiffstats
path: root/bsp/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/files/a5ds/0001-armv7-add-mmio-timer.patch
blob: fbf8a14fdf5987888cf5d1c301f8bb0f1cbf13ec (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
From 8525c72c438b0aa66f1f38db37bd7aacf7e3ce34 Mon Sep 17 00:00:00 2001
From: Rui Miguel Silva <rui.silva@linaro.org>
Date: Wed, 18 Dec 2019 21:52:34 +0000
Subject: [PATCH 1/2] armv7: add mmio timer

This timer can be used by u-boot when arch-timer is not available in
core, for example, Cortex-A5.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
 arch/arm/cpu/armv7/Makefile     |  1 +
 arch/arm/cpu/armv7/mmio_timer.c | 56 +++++++++++++++++++++++++++++++++
 scripts/config_whitelist.txt    |  1 +
 3 files changed, 58 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/mmio_timer.c

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 8c955d0d5284..82af9c031277 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_ARMV7_PSCI)     += psci.o psci-common.o
 obj-$(CONFIG_IPROC) += iproc-common/
 obj-$(CONFIG_KONA) += kona-common/
 obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
+obj-$(CONFIG_SYS_MMIO_TIMER) += mmio_timer.o

 ifneq (,$(filter s5pc1xx exynos,$(SOC)))
 obj-y += s5p-common/
diff --git a/arch/arm/cpu/armv7/mmio_timer.c b/arch/arm/cpu/armv7/mmio_timer.c
new file mode 100644
index 000000000000..1b905db8bb19
--- /dev/null
+++ b/arch/arm/cpu/armv7/mmio_timer.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019, Arm Limited. All rights reserved.
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <div64.h>
+#include <bootstage.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define CNTCTLBASE    0x1a020000UL
+#define CNTREADBASE   0x1a030000UL
+
+static inline uint32_t mmio_read32(uintptr_t addr)
+{
+      return *(volatile uint32_t*)addr;
+}
+
+int timer_init(void)
+{
+      gd->arch.timer_rate_hz = mmio_read32(CNTCTLBASE);
+
+      return 0;
+}
+
+unsigned long long get_ticks(void)
+{
+      return ((mmio_read32(CNTCTLBASE + 0x4) << 32) |
+              mmio_read32(CNTREADBASE));
+}
+
+ulong get_timer(ulong base)
+{
+      return lldiv(get_ticks(), gd->arch.timer_rate_hz) - base;
+}
+
+void __udelay(unsigned long usec)
+{
+      unsigned long endtime;
+
+      endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz,
+                      1000UL);
+
+      endtime += get_ticks();
+
+      while (get_ticks() < endtime)
+              ;
+}
+
+ulong get_tbclk(void)
+{
+      return gd->arch.timer_rate_hz;
+}
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index cf1808e051c8..8624714ae7a6 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -3138,6 +3138,7 @@ CONFIG_SYS_MMC_U_BOOT_DST
 CONFIG_SYS_MMC_U_BOOT_OFFS
 CONFIG_SYS_MMC_U_BOOT_SIZE
 CONFIG_SYS_MMC_U_BOOT_START
+CONFIG_SYS_MMIO_TIMER
 CONFIG_SYS_MONITOR_
 CONFIG_SYS_MONITOR_BASE
 CONFIG_SYS_MONITOR_BASE_EARLY
--
2.25.0