blob: 46a92a1700cb1a1a0583679deb623dae3e466a63 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
|
From a345757975a1cbb6910d97b98976cc54f102888e Mon Sep 17 00:00:00 2001
From: Valentine Barshak <valentine.barshak@cogentembedded.com>
Date: Mon, 17 Dec 2018 17:56:40 +0300
Subject: [PATCH 067/122] arm64: dts: renesas: ulcb-kf: Set Mitsubishi
AA104XD12 1024x768 panel
This sets LVDS LCD parameters for Mitsubishi AA104XD12 1024x768 panel.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
---
arch/arm64/boot/dts/renesas/ulcb-kf-panel.dtsi | 31 ++++++++++++++++----------
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-panel.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-panel.dtsi
index b54c935..73c2378 100644
--- a/arch/arm64/boot/dts/renesas/ulcb-kf-panel.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb-kf-panel.dtsi
@@ -18,24 +18,31 @@
data-mapping = "jeida-24";
panel-timing {
- /* 1280x800 @60Hz Boundary Devices BD101LCC1 compatible panel */
+ /* 1024x768 @60Hz Mitsubishi AA104XD12 compatible panel */
clock-frequency = <65000000>;
- hactive = <1280>;
- vactive = <800>;
- hsync-len = <40>;
- hfront-porch = <80>;
- hback-porch = <40>;
- vfront-porch = <14>;
- vback-porch = <14>;
- vsync-len = <4>;
+ hactive = <1024>;
+ vactive = <768>;
+ hsync-len = <136>;
+ hfront-porch = <20>;
+ hback-porch = <160>;
+ vfront-porch = <3>;
+ vback-porch = <29>;
+ vsync-len = <6>;
};
};
&gpio2 {
- bl_pwm {
+ mode {
+ gpio-hog;
+ gpios = <2 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "LVDS ISP 6-Bit Compatibility Mode";
+ };
+
+ sd {
gpio-hog;
gpios = <3 GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "BL PWM 100%";
+ output-low;
+ line-name = "LVDS Scan Direction Normal";
};
};
--
2.7.4
|
