summaryrefslogtreecommitdiffstats
path: root/bsp/meta-rcar/meta-rcar-gen3-adas/recipes-kernel/linux/linux-renesas/0288-clk-renesas-r8a77980-cpg-mssr-Add-IMR-clocks.patch
blob: 2bc5a100d084f01c2134f479bd30b50679e96ef2 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
From a971c62087b1ffe2e074b832c7b4a0a584ffe09f Mon Sep 17 00:00:00 2001
From: Valentine Barshak <valentine.barshak@cogentembedded.com>
Date: Fri, 26 Oct 2018 19:23:58 +0300
Subject: [PATCH 108/211] clk: renesas: r8a77980: cpg-mssr: Add IMR clocks

This adds IMR clocks to R8A77980 CPG MSSR driver.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
---
 drivers/clk/renesas/r8a77980-cpg-mssr.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c b/drivers/clk/renesas/r8a77980-cpg-mssr.c
index 711a1c5..dfa947a 100644
--- a/drivers/clk/renesas/r8a77980-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c
@@ -150,6 +150,8 @@ static const struct mssr_mod_clk r8a77980_mod_clks[] __initconst = {
 	DEF_MOD("imp-ocv2",		 531,	R8A77980_CLK_S1D1),
 	DEF_MOD("fcpvd0",		 603,	R8A77980_CLK_S3D1),
 	DEF_MOD("vspd0",		 623,	R8A77980_CLK_S3D1),
+	DEF_MOD("imr5",			 706,	R8A77980_CLK_S2D1),
+	DEF_MOD("imr4",			 707,	R8A77980_CLK_S2D1),
 	DEF_MOD("csi41",		 715,	R8A77980_CLK_CSI0),
 	DEF_MOD("csi40",		 716,	R8A77980_CLK_CSI0),
 	DEF_MOD("du0",			 724,	R8A77980_CLK_S2D1),
@@ -164,6 +166,10 @@ static const struct mssr_mod_clk r8a77980_mod_clks[] __initconst = {
 	DEF_MOD("vin0",			 811,	R8A77980_CLK_S2D1),
 	DEF_MOD("etheravb",		 812,	R8A77980_CLK_S3D2),
 	DEF_MOD("gether",		 813,	R8A77980_CLK_S3D2),
+	DEF_MOD("imr3",			 820,	R8A77980_CLK_S2D1),
+	DEF_MOD("imr2",			 821,	R8A77980_CLK_S2D1),
+	DEF_MOD("imr1",			 822,	R8A77980_CLK_S2D1),
+	DEF_MOD("imr0",			 823,	R8A77980_CLK_S2D1),
 	DEF_MOD("imp3",			 824,	R8A77980_CLK_S1D1),
 	DEF_MOD("imp2",			 825,	R8A77980_CLK_S1D1),
 	DEF_MOD("imp1",			 826,	R8A77980_CLK_S1D1),
-- 
2.7.4