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authorRonan Le Martret <ronan.lemartret@iot.bzh>2021-06-22 15:34:18 +0200
committerJan-Simon Moeller <jsmoeller@linuxfoundation.org>2021-11-09 15:43:05 +0000
commit8f9663f069a47337ff957200878242c25d04b25f (patch)
treedcb1383c8d9f86be32d843fcda6f18b3621feeb4 /meta-agl-bsp/meta-rcar-gen3/recipes-kernel/linux/files/r8a77960-ulcb-xen.dts
parentc8786c3bad67d3f07124badc78c4dfd94fecdf78 (diff)
[RCAR] Update RCAR BSP recipes to 5.5.0 version
* rename the dts/dtsi file, the new BSP 5.5.0 change the file name of the dts file. * update the driver files hash * Add "meta-yocto-bsp" to BBLAYERS, it's new dependency of meta-renesas. Bug-AGL: SPEC-4081 Signed-off-by: Ronan Le Martret <ronan.lemartret@iot.bzh> Change-Id: I3d8edb2d924e43dabd16466fd68015b5be1a40d2 Reviewed-on: https://gerrit.automotivelinux.org/gerrit/c/AGL/meta-agl/+/26822 Tested-by: Jenkins Job builder account Tested-by: Jan-Simon Moeller <jsmoeller@linuxfoundation.org> ci-image-build: Jenkins Job builder account ci-image-boot-test: Jenkins Job builder account Reviewed-by: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com> Reviewed-by: Jan-Simon Moeller <jsmoeller@linuxfoundation.org>
Diffstat (limited to 'meta-agl-bsp/meta-rcar-gen3/recipes-kernel/linux/files/r8a77960-ulcb-xen.dts')
-rw-r--r--meta-agl-bsp/meta-rcar-gen3/recipes-kernel/linux/files/r8a77960-ulcb-xen.dts91
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diff --git a/meta-agl-bsp/meta-rcar-gen3/recipes-kernel/linux/files/r8a77960-ulcb-xen.dts b/meta-agl-bsp/meta-rcar-gen3/recipes-kernel/linux/files/r8a77960-ulcb-xen.dts
new file mode 100644
index 000000000..6947a62c2
--- /dev/null
+++ b/meta-agl-bsp/meta-rcar-gen3/recipes-kernel/linux/files/r8a77960-ulcb-xen.dts
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board
+ *
+ * Copyright (C) 2016-2018 Renesas Electronics Corp.
+ * Copyright (C) 2016 Cogent Embedded, Inc.
+ */
+
+/dts-v1/;
+#include "r8a77960.dtsi"
+#include "ulcb.dtsi"
+
+/ {
+ model = "Renesas M3ULCB board based on r8a7796";
+ compatible = "renesas,m3ulcb", "renesas,r8a7796";
+
+
+ chosen {
+ /delete-property/ bootargs;
+ xen,xen-bootargs = "dom0_mem=752M console=dtuart dtuart=serial0 dom0_max_vcpus=4";
+ xen,dom0-bootargs = "console=hvc0 clk_ignore_unused root=/dev/mmcblk1p2 rw rootwait ignore_loglevel cma=32M earlyprintk";
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ modules {
+ module@0 {
+ compatible = "xen,linux-zimage",
+ "xen,multiboot-module";
+ reg = <0x0 0x7a000000 0x0 0x02000000>;
+ };
+ };
+ };
+
+ cpus {
+ idle-states {
+ /delete-node/ cpu-sleep-1;
+ };
+ };
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x38000000>, <0x6 0x00000000 0x0 0x40000000>;
+ };
+
+ vspm_if {
+ compatible = "renesas,vspm_if";
+ };
+
+ versaclock5_out3: versaclk-3 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* Initial value of versaclock out3 */
+ clock-frequency = <33000000>;
+ };
+};
+
+&a53_0 {
+ /delete-property/ cpu-idle-states;
+};
+
+&a53_1 {
+ /delete-property/ cpu-idle-states;
+};
+
+&a53_2 {
+ /delete-property/ cpu-idle-states;
+};
+
+&a53_3 {
+ /delete-property/ cpu-idle-states;
+};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>,
+ <&versaclock5 1>,
+ <&versaclock5_out3>,
+ <&versaclock5 2>;
+ clock-names = "du.0", "du.1", "du.2",
+ "dclkin.0", "dclkin.1", "dclkin.2";
+};
+
+&vspb {
+ status = "okay";
+};
+
+&vspi0 {
+ status = "okay";
+};