aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--meta-agl-bsp/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend1
-rw-r--r--meta-agl-bsp/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/files/0001-fix-build-for-gcc6-for-h3-init_dram.patch26
2 files changed, 27 insertions, 0 deletions
diff --git a/meta-agl-bsp/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend b/meta-agl-bsp/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend
index 8c6ebbf89..9efb84e90 100644
--- a/meta-agl-bsp/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend
+++ b/meta-agl-bsp/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bbappend
@@ -2,4 +2,5 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
SRC_URI += " \
file://0001-fix-arm-trusted-firmware-build-for-gcc6.patch \
+ file://0001-fix-build-for-gcc6-for-h3-init_dram.patch \
"
diff --git a/meta-agl-bsp/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/files/0001-fix-build-for-gcc6-for-h3-init_dram.patch b/meta-agl-bsp/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/files/0001-fix-build-for-gcc6-for-h3-init_dram.patch
new file mode 100644
index 000000000..5b878d892
--- /dev/null
+++ b/meta-agl-bsp/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/files/0001-fix-build-for-gcc6-for-h3-init_dram.patch
@@ -0,0 +1,26 @@
+diff --git a/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h b/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h
+index b6edfb5..5d3bcc6 100644
+--- a/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h
++++ b/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h
+@@ -49,7 +49,7 @@
+ #define PI_TCCDMW 0x20
+ #define PI_TDQSCK_MAX 0x6
+ //////////////////////////////////////////////////////////////////////////////
+-#define PI_MR1 0xd4 //MRW DeviceFeature1(Post=1.5tck nWR=30 RDpre=static WRPre=2tCK BL=16//OK
++#define PI_MR1 0xd4U //MRW DeviceFeature1(Post=1.5tck nWR=30 RDpre=static WRPre=2tCK BL=16//OK
+ #define PI_MR2 0x2e //MRW DeviceFeature2(0,0SetA,101=WL14,110=RL32(nRTP14))//NG
+ #define PI_MR3 0x31
+ #define PI_MR11 0x36
+diff --git a/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h b/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h
+index 370f87f..971cb0b 100644
+--- a/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h
++++ b/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h
+@@ -28,7 +28,7 @@
+ #define PI_TCCDMW 0x20
+ #define PI_TDQSCK_MAX 0x6
+ //////////////////////////////////////////////////////////////////////////////
+-#define PI_MR1 0xd4
++#define PI_MR1 0xd4U
+ #define PI_MR2 0x2e
+ #define PI_MR3 0x31
+ #define PI_MR11 0x36