1 files changed, 0 insertions, 91 deletions
diff --git a/meta-agl-bsp/meta-rcar-gen3/recipes-kernel/linux/files/r8a7796-m3ulcb-xen.dts b/meta-agl-bsp/meta-rcar-gen3/recipes-kernel/linux/files/r8a7796-m3ulcb-xen.dts
deleted file mode 100644
index 7940b1027..000000000
--- a/meta-agl-bsp/meta-rcar-gen3/recipes-kernel/linux/files/r8a7796-m3ulcb-xen.dts
+++ /dev/null
@@ -1,91 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board
- *
- * Copyright (C) 2016-2018 Renesas Electronics Corp.
- * Copyright (C) 2016 Cogent Embedded, Inc.
- */
-
-/dts-v1/;
-#include "r8a7796.dtsi"
-#include "ulcb.dtsi"
-
-/ {
-	model = "Renesas M3ULCB board based on r8a7796";
-	compatible = "renesas,m3ulcb", "renesas,r8a7796";
-
-
-	chosen {
-		/delete-property/ bootargs;
-		xen,xen-bootargs = "dom0_mem=752M console=dtuart dtuart=serial0 dom0_max_vcpus=4";
-                xen,dom0-bootargs = "console=hvc0 clk_ignore_unused root=/dev/mmcblk1p2 rw rootwait ignore_loglevel cma=32M earlyprintk";
-
-                #address-cells = <2>;
-                #size-cells = <2>;
-                modules {
-                        module@0 {
-                                compatible = "xen,linux-zimage",
-				"xen,multiboot-module";
-                                reg = <0x0 0x7a000000 0x0 0x02000000>;
-                        };
-                };
-	};
-
-	cpus {
-		idle-states {
-			/delete-node/ cpu-sleep-1;
-		};
-	};
-
-	memory@48000000 {
-		device_type = "memory";
-		/* first 128MB is reserved for secure area. */
-		reg = <0x0 0x48000000 0x0 0x38000000>, <0x6 0x00000000 0x0 0x40000000>;
-	};
-
-	vspm_if {
-		compatible = "renesas,vspm_if";
-	};
-
-	versaclock5_out3: versaclk-3 {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		/* Initial value of versaclock out3 */
-		clock-frequency = <33000000>;
-	};
-};
-
-&a53_0 {
-	/delete-property/ cpu-idle-states;
-};
-
-&a53_1 {
-	/delete-property/ cpu-idle-states;
-};
-
-&a53_2 {
-	/delete-property/ cpu-idle-states;
-};
-
-&a53_3 {
-	/delete-property/ cpu-idle-states;
-};
-
-&du {
-	clocks = <&cpg CPG_MOD 724>,
-		 <&cpg CPG_MOD 723>,
-		 <&cpg CPG_MOD 722>,
-		 <&versaclock5 1>,
-		 <&versaclock5_out3>,
-		 <&versaclock5 2>;
-	clock-names = "du.0", "du.1", "du.2",
-		      "dclkin.0", "dclkin.1", "dclkin.2";
-};
-
-&vspb {
-	status = "okay";
-};
-
-&vspi0 {
-	status = "okay";
-};