blob: 5b878d892a53c3fa8656838609027f14a7f1de22 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
|
diff --git a/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h b/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h
index b6edfb5..5d3bcc6 100644
--- a/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h
+++ b/plat/renesas/rcar/ddr/H3/ES10/init_dram_tbl_h3_es10.h
@@ -49,7 +49,7 @@
#define PI_TCCDMW 0x20
#define PI_TDQSCK_MAX 0x6
//////////////////////////////////////////////////////////////////////////////
-#define PI_MR1 0xd4 //MRW DeviceFeature1(Post=1.5tck nWR=30 RDpre=static WRPre=2tCK BL=16//OK
+#define PI_MR1 0xd4U //MRW DeviceFeature1(Post=1.5tck nWR=30 RDpre=static WRPre=2tCK BL=16//OK
#define PI_MR2 0x2e //MRW DeviceFeature2(0,0SetA,101=WL14,110=RL32(nRTP14))//NG
#define PI_MR3 0x31
#define PI_MR11 0x36
diff --git a/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h b/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h
index 370f87f..971cb0b 100644
--- a/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h
+++ b/plat/renesas/rcar/ddr/H3/WS11/init_dram_tbl_h3_ws11.h
@@ -28,7 +28,7 @@
#define PI_TCCDMW 0x20
#define PI_TDQSCK_MAX 0x6
//////////////////////////////////////////////////////////////////////////////
-#define PI_MR1 0xd4
+#define PI_MR1 0xd4U
#define PI_MR2 0x2e
#define PI_MR3 0x31
#define PI_MR11 0x36
|