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authorDuy Dang <duy.dang.yw@rvc.renesas.com>2019-02-15 16:16:32 +0700
committerDuy Dang <duy.dang.yw@renesas.com>2019-04-02 09:31:33 +0700
commit74e431ec9d3ea20c91cbd2fc6199794cbe43c720 (patch)
tree3c948d4d61e8b56971d8532947ca6fb247685c32 /meta-rcar-gen3/recipes-bsp
parentde96e0e4738e0b473c2fb77e2384e2c516990d4d (diff)
rcar-gen3: arm-trusted-firmware: Update SRCREV to Rev.2.0.3
This commit updates IPL and Secure Monitor to Rev.2.0.3 for the following changes: [IPL] - Add support for M3 Ver.1.3/3.0 - Add QoS setting for M3 Ver.3.0 - Add DDR setting for M3 Ver.3.0 - Add E3 Ver.1.1 to build option - Change periodic write DQ training option - Add new board revision for H3ULCB - Remove duplicate line in qos.mk - Change subslot cycle - Update DDR setting rev.0.35 - BL2/BL31: Update IPL and Secure Monitor Rev2.0.3 - BL31: Change to restore timer counter value at resume - BL31: Add DBSC4 setting before self-refresh mode [Secure Monitor] - Add SiP for getting board ID - Change Suspend To RAM function for M3 Ver.3.0 - Change condition of product code with cluster off function Change-Id: I9eb8e11e679742cf315089670dee1ae90954fc43 Signed-off-by: Duy Dang <duy.dang.yw@renesas.com> Signed-off-by: Khang Nguyen <khang.nguyen.xw@renesas.com> Signed-off-by: Takamitsu Honda <takamitsu.honda.pv@renesas.com>
Diffstat (limited to 'meta-rcar-gen3/recipes-bsp')
-rw-r--r--meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb2
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb b/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb
index 1eb6b75..f12d292 100644
--- a/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb
+++ b/meta-rcar-gen3/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_git.bb
@@ -13,7 +13,7 @@ S = "${WORKDIR}/git"
BRANCH = "rcar_gen3"
SRC_URI = "git://github.com/renesas-rcar/arm-trusted-firmware.git;branch=${BRANCH}"
-SRCREV = "556a11e73f3d94c7552251370f85ecf2c40ed625"
+SRCREV = "409c176d6714d132068412411c19392a3dcd7aa4"
PV = "v1.5+renesas+git${SRCPV}"