diff options
author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /capstone/suite/MC/Sparc | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'capstone/suite/MC/Sparc')
-rw-r--r-- | capstone/suite/MC/Sparc/sparc-alu-instructions.s.cs | 47 | ||||
-rw-r--r-- | capstone/suite/MC/Sparc/sparc-atomic-instructions.s.cs | 7 | ||||
-rw-r--r-- | capstone/suite/MC/Sparc/sparc-ctrl-instructions.s.cs | 11 | ||||
-rw-r--r-- | capstone/suite/MC/Sparc/sparc-fp-instructions.s.cs | 59 | ||||
-rw-r--r-- | capstone/suite/MC/Sparc/sparc-mem-instructions.s.cs | 25 | ||||
-rw-r--r-- | capstone/suite/MC/Sparc/sparc-vis.s.cs | 2 | ||||
-rw-r--r-- | capstone/suite/MC/Sparc/sparc64-alu-instructions.s.cs | 13 | ||||
-rw-r--r-- | capstone/suite/MC/Sparc/sparc64-ctrl-instructions.s.cs | 102 | ||||
-rw-r--r-- | capstone/suite/MC/Sparc/sparcv8-instructions.s.cs | 7 | ||||
-rw-r--r-- | capstone/suite/MC/Sparc/sparcv9-instructions.s.cs | 1 |
10 files changed, 274 insertions, 0 deletions
diff --git a/capstone/suite/MC/Sparc/sparc-alu-instructions.s.cs b/capstone/suite/MC/Sparc/sparc-alu-instructions.s.cs new file mode 100644 index 000000000..98e866552 --- /dev/null +++ b/capstone/suite/MC/Sparc/sparc-alu-instructions.s.cs @@ -0,0 +1,47 @@ +# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None +0x80,0x00,0x00,0x00 = add %g0, %g0, %g0 +0x86,0x00,0x40,0x02 = add %g1, %g2, %g3 +0xa0,0x02,0x00,0x09 = add %o0, %o1, %l0 +0xa0,0x02,0x20,0x0a = add %o0, 10, %l0 +0x86,0x80,0x40,0x02 = addcc %g1, %g2, %g3 +0x86,0xc0,0x40,0x02 = addxcc %g1, %g2, %g3 +0x86,0x70,0x40,0x02 = udiv %g1, %g2, %g3 +0x86,0x78,0x40,0x02 = sdiv %g1, %g2, %g3 +0x86,0x08,0x40,0x02 = and %g1, %g2, %g3 +0x86,0x28,0x40,0x02 = andn %g1, %g2, %g3 +0x86,0x10,0x40,0x02 = or %g1, %g2, %g3 +0x86,0x30,0x40,0x02 = orn %g1, %g2, %g3 +0x86,0x18,0x40,0x02 = xor %g1, %g2, %g3 +0x86,0x38,0x40,0x02 = xnor %g1, %g2, %g3 +0x86,0x50,0x40,0x02 = umul %g1, %g2, %g3 +0x86,0x58,0x40,0x02 = smul %g1, %g2, %g3 +0x01,0x00,0x00,0x00 = nop +0x21,0x00,0x00,0x0a = sethi 10, %l0 +0x87,0x28,0x40,0x02 = sll %g1, %g2, %g3 +0x87,0x28,0x60,0x1f = sll %g1, 31, %g3 +0x87,0x30,0x40,0x02 = srl %g1, %g2, %g3 +0x87,0x30,0x60,0x1f = srl %g1, 31, %g3 +0x87,0x38,0x40,0x02 = sra %g1, %g2, %g3 +0x87,0x38,0x60,0x1f = sra %g1, 31, %g3 +0x86,0x20,0x40,0x02 = sub %g1, %g2, %g3 +0x86,0xa0,0x40,0x02 = subcc %g1, %g2, %g3 +0x86,0xe0,0x40,0x02 = subxcc %g1, %g2, %g3 +0x86,0x10,0x00,0x01 = mov %g1, %g3 +0x86,0x10,0x20,0xff = mov 0xff, %g3 +0x81,0xe8,0x00,0x00 = restore +0x86,0x40,0x80,0x01 = addx %g2, %g1, %g3 +0x86,0x60,0x80,0x01 = subx %g2, %g1, %g3 +0x86,0xd0,0x80,0x01 = umulcc %g2, %g1, %g3 +0x86,0xd8,0x80,0x01 = smulcc %g2, %g1, %g3 +0x86,0xf0,0x80,0x01 = udivcc %g2, %g1, %g3 +0x86,0xf8,0x80,0x01 = sdivcc %g2, %g1, %g3 +0x86,0x88,0x80,0x01 = andcc %g2, %g1, %g3 +0x86,0xa8,0x80,0x01 = andncc %g2, %g1, %g3 +0x86,0x90,0x80,0x01 = orcc %g2, %g1, %g3 +0x86,0xb0,0x80,0x01 = orncc %g2, %g1, %g3 +0x86,0x98,0x80,0x01 = xorcc %g2, %g1, %g3 +0x86,0xb8,0x80,0x01 = xnorcc %g2, %g1, %g3 +0x87,0x00,0x80,0x01 = taddcc %g2, %g1, %g3 +0x87,0x08,0x80,0x01 = tsubcc %g2, %g1, %g3 +0x87,0x10,0x80,0x01 = taddcctv %g2, %g1, %g3 +0x87,0x18,0x80,0x01 = tsubcctv %g2, %g1, %g3 diff --git a/capstone/suite/MC/Sparc/sparc-atomic-instructions.s.cs b/capstone/suite/MC/Sparc/sparc-atomic-instructions.s.cs new file mode 100644 index 000000000..73b1f93ec --- /dev/null +++ b/capstone/suite/MC/Sparc/sparc-atomic-instructions.s.cs @@ -0,0 +1,7 @@ +# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None +0x81,0x43,0xe0,0x0f = membar 15 +0x81,0x43,0xc0,0x00 = stbar +0xd4,0x7e,0x00,0x16 = swap [%i0+%l6], %o2 +0xd4,0x7e,0x20,0x20 = swap [%i0+32], %o2 +0xd5,0xe6,0x10,0x16 = cas [%i0], %l6, %o2 +0xd5,0xf6,0x10,0x16 = casx [%i0], %l6, %o2 diff --git a/capstone/suite/MC/Sparc/sparc-ctrl-instructions.s.cs b/capstone/suite/MC/Sparc/sparc-ctrl-instructions.s.cs new file mode 100644 index 000000000..2f8f2090b --- /dev/null +++ b/capstone/suite/MC/Sparc/sparc-ctrl-instructions.s.cs @@ -0,0 +1,11 @@ +# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None +0x9f,0xc0,0x40,0x1a = call %g1+%i2 +0x9f,0xc2,0x60,0x08 = call %o1+8 +0x9f,0xc0,0x60,0x00 = call %g1 +0x81,0xc0,0x40,0x1a = jmp %g1+%i2 +0x81,0xc2,0x60,0x08 = jmp %o1+8 +0x81,0xc0,0x60,0x00 = jmp %g1 +0x85,0xc0,0x40,0x1a = jmpl %g1+%i2, %g2 +0x85,0xc2,0x60,0x08 = jmpl %o1+8, %g2 +0x85,0xc0,0x60,0x00 = jmpl %g1, %g2 +0x81,0xcf,0xe0,0x08 = rett %i7+8 diff --git a/capstone/suite/MC/Sparc/sparc-fp-instructions.s.cs b/capstone/suite/MC/Sparc/sparc-fp-instructions.s.cs new file mode 100644 index 000000000..0ec023cf6 --- /dev/null +++ b/capstone/suite/MC/Sparc/sparc-fp-instructions.s.cs @@ -0,0 +1,59 @@ +# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN + CS_MODE_V9, None +0x89,0xa0,0x18,0x80 = fitos %f0, %f4 +0x89,0xa0,0x19,0x00 = fitod %f0, %f4 +0x89,0xa0,0x19,0x80 = fitoq %f0, %f4 +0x89,0xa0,0x1a,0x20 = fstoi %f0, %f4 +0x89,0xa0,0x1a,0x40 = fdtoi %f0, %f4 +0x89,0xa0,0x1a,0x60 = fqtoi %f0, %f4 +0x89,0xa0,0x19,0x20 = fstod %f0, %f4 +0x89,0xa0,0x19,0xa0 = fstoq %f0, %f4 +0x89,0xa0,0x18,0xc0 = fdtos %f0, %f4 +0x89,0xa0,0x19,0xc0 = fdtoq %f0, %f4 +0x89,0xa0,0x18,0xe0 = fqtos %f0, %f4 +0x89,0xa0,0x19,0x60 = fqtod %f0, %f4 +0x89,0xa0,0x00,0x20 = fmovs %f0, %f4 +0x89,0xa0,0x00,0x40 = fmovd %f0, %f4 +0x89,0xa0,0x00,0x60 = fmovq %f0, %f4 +0x89,0xa0,0x00,0xa0 = fnegs %f0, %f4 +0x89,0xa0,0x00,0xc0 = fnegd %f0, %f4 +0x89,0xa0,0x00,0xe0 = fnegq %f0, %f4 +0x89,0xa0,0x01,0x20 = fabss %f0, %f4 +0x89,0xa0,0x01,0x40 = fabsd %f0, %f4 +0x89,0xa0,0x01,0x60 = fabsq %f0, %f4 +0x89,0xa0,0x05,0x20 = fsqrts %f0, %f4 +0x89,0xa0,0x05,0x40 = fsqrtd %f0, %f4 +0x89,0xa0,0x05,0x60 = fsqrtq %f0, %f4 +0x91,0xa0,0x08,0x24 = fadds %f0, %f4, %f8 +0x91,0xa0,0x08,0x44 = faddd %f0, %f4, %f8 +0x91,0xa0,0x08,0x64 = faddq %f0, %f4, %f8 +0xbf,0xa0,0x48,0x43 = faddd %f32, %f34, %f62 +0xbb,0xa0,0x48,0x65 = faddq %f32, %f36, %f60 +0x91,0xa0,0x08,0xa4 = fsubs %f0, %f4, %f8 +0x91,0xa0,0x08,0xc4 = fsubd %f0, %f4, %f8 +0x91,0xa0,0x08,0xe4 = fsubq %f0, %f4, %f8 +0x91,0xa0,0x09,0x24 = fmuls %f0, %f4, %f8 +0x91,0xa0,0x09,0x44 = fmuld %f0, %f4, %f8 +0x91,0xa0,0x09,0x64 = fmulq %f0, %f4, %f8 +0x91,0xa0,0x0d,0x24 = fsmuld %f0, %f4, %f8 +0x91,0xa0,0x0d,0xc4 = fdmulq %f0, %f4, %f8 +0x91,0xa0,0x09,0xa4 = fdivs %f0, %f4, %f8 +0x91,0xa0,0x09,0xc4 = fdivd %f0, %f4, %f8 +0x91,0xa0,0x09,0xe4 = fdivq %f0, %f4, %f8 +// 0x81,0xa8,0x0a,0x24 = fcmps %fcc0, %f0, %f4 +// 0x81,0xa8,0x0a,0x44 = fcmpd %fcc0, %f0, %f4 +// 0x81,0xa8,0x0a,0x64 = fcmpq %fcc0, %f0, %f4 +// 0x81,0xa8,0x0a,0xa4 = fcmpes %fcc0, %f0, %f4 +// 0x81,0xa8,0x0a,0xc4 = fcmped %fcc0, %f0, %f4 +// 0x81,0xa8,0x0a,0xe4 = fcmpeq %fcc0, %f0, %f4 +0x85,0xa8,0x0a,0x24 = fcmps %fcc2, %f0, %f4 +0x85,0xa8,0x0a,0x44 = fcmpd %fcc2, %f0, %f4 +0x85,0xa8,0x0a,0x64 = fcmpq %fcc2, %f0, %f4 +0x85,0xa8,0x0a,0xa4 = fcmpes %fcc2, %f0, %f4 +0x85,0xa8,0x0a,0xc4 = fcmped %fcc2, %f0, %f4 +0x85,0xa8,0x0a,0xe4 = fcmpeq %fcc2, %f0, %f4 +0x89,0xa0,0x10,0x80 = fxtos %f0, %f4 +0x89,0xa0,0x11,0x00 = fxtod %f0, %f4 +0x89,0xa0,0x11,0x80 = fxtoq %f0, %f4 +0x89,0xa0,0x10,0x20 = fstox %f0, %f4 +0x89,0xa0,0x10,0x40 = fdtox %f0, %f4 +0x89,0xa0,0x10,0x60 = fqtox %f0, %f4 diff --git a/capstone/suite/MC/Sparc/sparc-mem-instructions.s.cs b/capstone/suite/MC/Sparc/sparc-mem-instructions.s.cs new file mode 100644 index 000000000..fd0651a39 --- /dev/null +++ b/capstone/suite/MC/Sparc/sparc-mem-instructions.s.cs @@ -0,0 +1,25 @@ +# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None +0xd4,0x4e,0x00,0x16 = ldsb [%i0+%l6], %o2 +0xd4,0x4e,0x20,0x20 = ldsb [%i0+32], %o2 +0xd8,0x48,0x60,0x00 = ldsb [%g1], %o4 +0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2 +0xd4,0x56,0x20,0x20 = ldsh [%i0+32], %o2 +0xd8,0x50,0x60,0x00 = ldsh [%g1], %o4 +0xd4,0x0e,0x00,0x16 = ldub [%i0+%l6], %o2 +0xd4,0x0e,0x20,0x20 = ldub [%i0+32], %o2 +0xd4,0x08,0x60,0x00 = ldub [%g1], %o2 +0xd4,0x16,0x00,0x16 = lduh [%i0+%l6], %o2 +0xd4,0x16,0x20,0x20 = lduh [%i0+32], %o2 +0xd4,0x10,0x60,0x00 = lduh [%g1], %o2 +0xd4,0x06,0x00,0x16 = ld [%i0+%l6], %o2 +0xd4,0x06,0x20,0x20 = ld [%i0+32], %o2 +0xd4,0x00,0x60,0x00 = ld [%g1], %o2 +0xd4,0x2e,0x00,0x16 = stb %o2, [%i0+%l6] +0xd4,0x2e,0x20,0x20 = stb %o2, [%i0+32] +0xd4,0x28,0x60,0x00 = stb %o2, [%g1] +0xd4,0x36,0x00,0x16 = sth %o2, [%i0+%l6] +0xd4,0x36,0x20,0x20 = sth %o2, [%i0+32] +0xd4,0x30,0x60,0x00 = sth %o2, [%g1] +0xd4,0x26,0x00,0x16 = st %o2, [%i0+%l6] +0xd4,0x26,0x20,0x20 = st %o2, [%i0+32] +0xd4,0x20,0x60,0x00 = st %o2, [%g1] diff --git a/capstone/suite/MC/Sparc/sparc-vis.s.cs b/capstone/suite/MC/Sparc/sparc-vis.s.cs new file mode 100644 index 000000000..10654aa98 --- /dev/null +++ b/capstone/suite/MC/Sparc/sparc-vis.s.cs @@ -0,0 +1,2 @@ +# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None +0xbf,0xb0,0x0c,0x20 = fzeros %f31 diff --git a/capstone/suite/MC/Sparc/sparc64-alu-instructions.s.cs b/capstone/suite/MC/Sparc/sparc64-alu-instructions.s.cs new file mode 100644 index 000000000..dae91b419 --- /dev/null +++ b/capstone/suite/MC/Sparc/sparc64-alu-instructions.s.cs @@ -0,0 +1,13 @@ +# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None +0xb1,0x28,0x50,0x1a = sllx %g1, %i2, %i0 +0xb1,0x28,0x70,0x3f = sllx %g1, 63, %i0 +0xb1,0x30,0x50,0x1a = srlx %g1, %i2, %i0 +0xb1,0x30,0x70,0x3f = srlx %g1, 63, %i0 +0xb1,0x38,0x50,0x1a = srax %g1, %i2, %i0 +0xb1,0x38,0x70,0x3f = srax %g1, 63, %i0 +0xb0,0x48,0x40,0x1a = mulx %g1, %i2, %i0 +0xb0,0x48,0x60,0x3f = mulx %g1, 63, %i0 +0xb1,0x68,0x40,0x1a = sdivx %g1, %i2, %i0 +0xb1,0x68,0x60,0x3f = sdivx %g1, 63, %i0 +0xb0,0x68,0x40,0x1a = udivx %g1, %i2, %i0 +0xb0,0x68,0x60,0x3f = udivx %g1, 63, %i0 diff --git a/capstone/suite/MC/Sparc/sparc64-ctrl-instructions.s.cs b/capstone/suite/MC/Sparc/sparc64-ctrl-instructions.s.cs new file mode 100644 index 000000000..8e63807dd --- /dev/null +++ b/capstone/suite/MC/Sparc/sparc64-ctrl-instructions.s.cs @@ -0,0 +1,102 @@ +# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None +0x85,0x66,0x40,0x01 = movne %icc, %g1, %g2 +0x85,0x64,0x40,0x01 = move %icc, %g1, %g2 +0x85,0x66,0x80,0x01 = movg %icc, %g1, %g2 +0x85,0x64,0x80,0x01 = movle %icc, %g1, %g2 +0x85,0x66,0xc0,0x01 = movge %icc, %g1, %g2 +0x85,0x64,0xc0,0x01 = movl %icc, %g1, %g2 +0x85,0x67,0x00,0x01 = movgu %icc, %g1, %g2 +0x85,0x65,0x00,0x01 = movleu %icc, %g1, %g2 +0x85,0x67,0x40,0x01 = movcc %icc, %g1, %g2 +0x85,0x65,0x40,0x01 = movcs %icc, %g1, %g2 +0x85,0x67,0x80,0x01 = movpos %icc, %g1, %g2 +0x85,0x65,0x80,0x01 = movneg %icc, %g1, %g2 +0x85,0x67,0xc0,0x01 = movvc %icc, %g1, %g2 +0x85,0x65,0xc0,0x01 = movvs %icc, %g1, %g2 +0x85,0x66,0x50,0x01 = movne %xcc, %g1, %g2 +0x85,0x64,0x50,0x01 = move %xcc, %g1, %g2 +0x85,0x66,0x90,0x01 = movg %xcc, %g1, %g2 +0x85,0x64,0x90,0x01 = movle %xcc, %g1, %g2 +0x85,0x66,0xd0,0x01 = movge %xcc, %g1, %g2 +0x85,0x64,0xd0,0x01 = movl %xcc, %g1, %g2 +0x85,0x67,0x10,0x01 = movgu %xcc, %g1, %g2 +0x85,0x65,0x10,0x01 = movleu %xcc, %g1, %g2 +0x85,0x67,0x50,0x01 = movcc %xcc, %g1, %g2 +0x85,0x65,0x50,0x01 = movcs %xcc, %g1, %g2 +0x85,0x67,0x90,0x01 = movpos %xcc, %g1, %g2 +0x85,0x65,0x90,0x01 = movneg %xcc, %g1, %g2 +0x85,0x67,0xd0,0x01 = movvc %xcc, %g1, %g2 +0x85,0x65,0xd0,0x01 = movvs %xcc, %g1, %g2 +0x85,0x61,0xc0,0x01 = movu %fcc0, %g1, %g2 +0x85,0x61,0x80,0x01 = movg %fcc0, %g1, %g2 +0x85,0x61,0x40,0x01 = movug %fcc0, %g1, %g2 +0x85,0x61,0x00,0x01 = movl %fcc0, %g1, %g2 +0x85,0x60,0xc0,0x01 = movul %fcc0, %g1, %g2 +0x85,0x60,0x80,0x01 = movlg %fcc0, %g1, %g2 +0x85,0x60,0x40,0x01 = movne %fcc0, %g1, %g2 +0x85,0x62,0x40,0x01 = move %fcc0, %g1, %g2 +0x85,0x62,0x80,0x01 = movue %fcc0, %g1, %g2 +0x85,0x62,0xc0,0x01 = movge %fcc0, %g1, %g2 +0x85,0x63,0x00,0x01 = movuge %fcc0, %g1, %g2 +0x85,0x63,0x40,0x01 = movle %fcc0, %g1, %g2 +0x85,0x63,0x80,0x01 = movule %fcc0, %g1, %g2 +0x85,0x63,0xc0,0x01 = movo %fcc0, %g1, %g2 +0x85,0xaa,0x60,0x21 = fmovsne %icc, %f1, %f2 +0x85,0xa8,0x60,0x21 = fmovse %icc, %f1, %f2 +0x85,0xaa,0xa0,0x21 = fmovsg %icc, %f1, %f2 +0x85,0xa8,0xa0,0x21 = fmovsle %icc, %f1, %f2 +0x85,0xaa,0xe0,0x21 = fmovsge %icc, %f1, %f2 +0x85,0xa8,0xe0,0x21 = fmovsl %icc, %f1, %f2 +0x85,0xab,0x20,0x21 = fmovsgu %icc, %f1, %f2 +0x85,0xa9,0x20,0x21 = fmovsleu %icc, %f1, %f2 +0x85,0xab,0x60,0x21 = fmovscc %icc, %f1, %f2 +0x85,0xa9,0x60,0x21 = fmovscs %icc, %f1, %f2 +0x85,0xab,0xa0,0x21 = fmovspos %icc, %f1, %f2 +0x85,0xa9,0xa0,0x21 = fmovsneg %icc, %f1, %f2 +0x85,0xab,0xe0,0x21 = fmovsvc %icc, %f1, %f2 +0x85,0xa9,0xe0,0x21 = fmovsvs %icc, %f1, %f2 +0x85,0xaa,0x70,0x21 = fmovsne %xcc, %f1, %f2 +0x85,0xa8,0x70,0x21 = fmovse %xcc, %f1, %f2 +0x85,0xaa,0xb0,0x21 = fmovsg %xcc, %f1, %f2 +0x85,0xa8,0xb0,0x21 = fmovsle %xcc, %f1, %f2 +0x85,0xaa,0xf0,0x21 = fmovsge %xcc, %f1, %f2 +0x85,0xa8,0xf0,0x21 = fmovsl %xcc, %f1, %f2 +0x85,0xab,0x30,0x21 = fmovsgu %xcc, %f1, %f2 +0x85,0xa9,0x30,0x21 = fmovsleu %xcc, %f1, %f2 +0x85,0xab,0x70,0x21 = fmovscc %xcc, %f1, %f2 +0x85,0xa9,0x70,0x21 = fmovscs %xcc, %f1, %f2 +0x85,0xab,0xb0,0x21 = fmovspos %xcc, %f1, %f2 +0x85,0xa9,0xb0,0x21 = fmovsneg %xcc, %f1, %f2 +0x85,0xab,0xf0,0x21 = fmovsvc %xcc, %f1, %f2 +0x85,0xa9,0xf0,0x21 = fmovsvs %xcc, %f1, %f2 +0x85,0xa9,0xc0,0x21 = fmovsu %fcc0, %f1, %f2 +0x85,0xa9,0x80,0x21 = fmovsg %fcc0, %f1, %f2 +0x85,0xa9,0x40,0x21 = fmovsug %fcc0, %f1, %f2 +0x85,0xa9,0x00,0x21 = fmovsl %fcc0, %f1, %f2 +0x85,0xa8,0xc0,0x21 = fmovsul %fcc0, %f1, %f2 +0x85,0xa8,0x80,0x21 = fmovslg %fcc0, %f1, %f2 +0x85,0xa8,0x40,0x21 = fmovsne %fcc0, %f1, %f2 +0x85,0xaa,0x40,0x21 = fmovse %fcc0, %f1, %f2 +0x85,0xaa,0x80,0x21 = fmovsue %fcc0, %f1, %f2 +0x85,0xaa,0xc0,0x21 = fmovsge %fcc0, %f1, %f2 +0x85,0xab,0x00,0x21 = fmovsuge %fcc0, %f1, %f2 +0x85,0xab,0x40,0x21 = fmovsle %fcc0, %f1, %f2 +0x85,0xab,0x80,0x21 = fmovsule %fcc0, %f1, %f2 +0x85,0xab,0xc0,0x21 = fmovso %fcc0, %f1, %f2 +0x85,0x61,0xc8,0x01 = movu %fcc1, %g1, %g2 +0x85,0xa9,0x90,0x21 = fmovsg %fcc2, %f1, %f2 +0x87,0x78,0x44,0x02 = movrz %g1, %g2, %g3 +0x87,0x78,0x48,0x02 = movrlez %g1, %g2, %g3 +0x87,0x78,0x4c,0x02 = movrlz %g1, %g2, %g3 +0x87,0x78,0x54,0x02 = movrnz %g1, %g2, %g3 +0x87,0x78,0x58,0x02 = movrgz %g1, %g2, %g3 +0x87,0x78,0x5c,0x02 = movrgez %g1, %g2, %g3 +0x87,0xa8,0x44,0xa2 = fmovrsz %g1, %f2, %f3 +0x87,0xa8,0x48,0xa2 = fmovrslez %g1, %f2, %f3 +0x87,0xa8,0x4c,0xa2 = fmovrslz %g1, %f2, %f3 +0x87,0xa8,0x54,0xa2 = fmovrsnz %g1, %f2, %f3 +0x87,0xa8,0x58,0xa2 = fmovrsgz %g1, %f2, %f3 +0x87,0xa8,0x5c,0xa2 = fmovrsgez %g1, %f2, %f3 +0x81,0xcf,0xe0,0x08 = rett %i7+8 +// 0x91,0xd0,0x20,0x05 = ta %icc, %g0 + 5 +0x83,0xd0,0x30,0x03 = te %xcc, %g0 + 3 diff --git a/capstone/suite/MC/Sparc/sparcv8-instructions.s.cs b/capstone/suite/MC/Sparc/sparcv8-instructions.s.cs new file mode 100644 index 000000000..fd7e5de3f --- /dev/null +++ b/capstone/suite/MC/Sparc/sparcv8-instructions.s.cs @@ -0,0 +1,7 @@ +# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None +0x81,0xa8,0x0a,0x24 = fcmps %f0, %f4 +0x81,0xa8,0x0a,0x44 = fcmpd %f0, %f4 +0x81,0xa8,0x0a,0x64 = fcmpq %f0, %f4 +0x81,0xa8,0x0a,0xa4 = fcmpes %f0, %f4 +0x81,0xa8,0x0a,0xc4 = fcmped %f0, %f4 +0x81,0xa8,0x0a,0xe4 = fcmpeq %f0, %f4 diff --git a/capstone/suite/MC/Sparc/sparcv9-instructions.s.cs b/capstone/suite/MC/Sparc/sparcv9-instructions.s.cs new file mode 100644 index 000000000..c1a0aa1d3 --- /dev/null +++ b/capstone/suite/MC/Sparc/sparcv9-instructions.s.cs @@ -0,0 +1 @@ +# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None |