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| author |   Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
|---|---|---|
| committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
| commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
| tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /capstone/suite/synctools/genall-full.sh | |
| parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) | |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'capstone/suite/synctools/genall-full.sh')
| -rwxr-xr-x | capstone/suite/synctools/genall-full.sh | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/capstone/suite/synctools/genall-full.sh b/capstone/suite/synctools/genall-full.sh new file mode 100755 index 000000000..7cb03c43e --- /dev/null +++ b/capstone/suite/synctools/genall-full.sh @@ -0,0 +1,33 @@ +#!/bin/sh +# generate all X86*.inc files for Capstone, by Nguyen Anh Quynh + +# Syntax: genall.sh <LLVM-build-lib-Target-ARCH> <clean-old-Capstone-arch-ARCH-dir> + +# ./genall-full.sh tablegen ~/projects/capstone.git/arch/X86 + +echo "Generating GenAsmWriter.inc" +./asmwriter.py $1/X86GenAsmWriter.inc X86GenAsmWriter.inc X86GenRegisterName.inc X86 + +echo "Generating GenAsmWriter1.inc" +./asmwriter.py $1/X86GenAsmWriter1.inc X86GenAsmWriter1.inc X86GenRegisterName1.inc X86 + +echo "Generating instruction enum in insn_list.txt (for include/capstone/<arch>.h)" +./insn.py $1/X86GenAsmMatcher.inc $1/X86GenInstrInfo.inc $2/X86MappingInsn.inc > insn_list.txt +# then copy these instructions to include/capstone/x86.h + +echo "Generating MappingInsnName.inc" +./mapping_insn_name.py $1/X86GenAsmMatcher.inc $1/X86GenInstrInfo.inc $2/X86MappingInsn.inc > X86MappingInsnName.inc + +echo "Generating MappingInsn.inc" +./mapping_insn.py $1/X86GenAsmMatcher.inc $1/X86GenInstrInfo.inc $2/X86MappingInsn.inc > X86MappingInsn.inc + +echo "Generating MappingInsnOp.inc" +./mapping_insn_op.py $1/X86GenAsmMatcher.inc $1/X86GenInstrInfo.inc $2/X86MappingInsnOp.inc > X86MappingInsnOp.inc + +echo "Generating GenInstrInfo.inc" +./instrinfo.py $1/X86GenInstrInfo.inc $1/X86GenAsmMatcher.inc > X86GenInstrInfo.inc + +echo "Generating GenDisassemblerTables.inc & X86GenDisassemblerTables2.inc" +./disassemblertables.py $1/X86GenDisassemblerTables.inc X86GenDisassemblerTables.inc X86GenDisassemblerTables2.inc + +make x86 |