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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /capstone/suite/synctools/genall-reduce.sh | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'capstone/suite/synctools/genall-reduce.sh')
-rwxr-xr-x | capstone/suite/synctools/genall-reduce.sh | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/capstone/suite/synctools/genall-reduce.sh b/capstone/suite/synctools/genall-reduce.sh new file mode 100755 index 000000000..6f8aafc4c --- /dev/null +++ b/capstone/suite/synctools/genall-reduce.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# generate all X86*reduce.inc files for Capstone, by Nguyen Anh Quynh + +# Syntax: genall.sh <LLVM-build-lib-Target-ARCH> <clean-old-Capstone-arch-ARCH-dir> + +# ./genall-reduce.sh tablegen ~/projects/capstone.git/arch/X86 + +echo "Generating GenAsmWriter_reduce.inc" +./asmwriter.py $1/X86GenAsmWriter_reduce.inc X86GenAsmWriter_reduce.inc X86GenRegisterName.inc X86 + +echo "Generating GenAsmWriter1_reduce.inc" +./asmwriter.py $1/X86GenAsmWriter1_reduce.inc X86GenAsmWriter1_reduce.inc X86GenRegisterName1.inc X86 + +echo "Generating MappingInsnName_reduce.inc" +./mapping_insn_name.py $1/X86GenAsmMatcher_reduce.inc $1/X86GenInstrInfo_reduce.inc $2/X86MappingInsn_reduce.inc > X86MappingInsnName_reduce.inc + +echo "Generating MappingInsn_reduce.inc" +./mapping_insn.py $1/X86GenAsmMatcher_reduce.inc $1/X86GenInstrInfo_reduce.inc $2/X86MappingInsn_reduce.inc > X86MappingInsn_reduce.inc + +echo "Generating MappingInsnOp_reduce.inc" +./mapping_insn_op.py $1/X86GenAsmMatcher.inc $1/X86GenInstrInfo_reduce.inc $2/X86MappingInsnOp_reduce.inc > X86MappingInsnOp_reduce.inc + +echo "Generating GenInstrInfo_reduce.inc" +./instrinfo.py $1/X86GenInstrInfo_reduce.inc $1/X86GenAsmMatcher_reduce.inc > X86GenInstrInfo_reduce.inc + +echo "Generating GenDisassemblerTables_reduce.inc & GenDisassemblerTables_reduce2.inc" +./disassemblertables_reduce.py $1/X86GenDisassemblerTables_reduce.inc X86GenDisassemblerTables_reduce.inc X86GenDisassemblerTables_reduce2.inc + |