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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /capstone/suite/synctools/tablegen/gen-tablegen-arch.sh | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'capstone/suite/synctools/tablegen/gen-tablegen-arch.sh')
-rwxr-xr-x | capstone/suite/synctools/tablegen/gen-tablegen-arch.sh | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/capstone/suite/synctools/tablegen/gen-tablegen-arch.sh b/capstone/suite/synctools/tablegen/gen-tablegen-arch.sh new file mode 100755 index 000000000..a2a955965 --- /dev/null +++ b/capstone/suite/synctools/tablegen/gen-tablegen-arch.sh @@ -0,0 +1,45 @@ +#!/bin/sh +# Generate raw .inc files for non-x86 architectures of Capstone, by Nguyen Anh Quynh + +# Syntax: gen-tablegen-arch.sh <path-to-llvm-tblgen> <arch> + +# Example: ./gen-tablegen-arch.sh ~/projects/llvm/7.0.1/build/bin ARM + +TBLGEN_PATH=$1 +DIR_TD=$2 +ARCH=$2 + +echo "Using llvm-tblgen from ${TBLGEN_PATH}" + +echo "Generating ${ARCH}GenInstrInfo.inc" +$TBLGEN_PATH/llvm-tblgen -gen-instr-info -I include -I ${DIR_TD} ${DIR_TD}/${ARCH}.td -o ${ARCH}GenInstrInfo.inc + +echo "Generating ${ARCH}GenRegisterInfo.inc" +$TBLGEN_PATH/llvm-tblgen -gen-register-info -I include -I ${DIR_TD} ${DIR_TD}/${ARCH}.td -o ${ARCH}GenRegisterInfo.inc + +echo "Generating ${ARCH}GenAsmMatcher.inc" +$TBLGEN_PATH/llvm-tblgen -gen-asm-matcher -I include -I ${DIR_TD} ${DIR_TD}/${ARCH}.td -o ${ARCH}GenAsmMatcher.inc + +echo "Generating ${ARCH}GenDisassemblerTables.inc" +$TBLGEN_PATH/llvm-tblgen -gen-disassembler -I include -I ${DIR_TD} ${DIR_TD}/${ARCH}.td -o ${ARCH}GenDisassemblerTables.inc + +echo "Generating ${ARCH}GenAsmWriter.inc" +$TBLGEN_PATH/llvm-tblgen -gen-asm-writer -I include -I ${DIR_TD} ${DIR_TD}/${ARCH}.td -o ${ARCH}GenAsmWriter.inc + +echo "Generating ${ARCH}GenSubtargetInfo.inc" +$TBLGEN_PATH/llvm-tblgen -gen-subtarget -I include -I ${DIR_TD} ${DIR_TD}/${ARCH}.td -o ${ARCH}GenSubtargetInfo.inc + +case $2 in + ARM) + # for ARM only + echo "Generating ${ARCH}GenAsmWriter-digit.inc" + $TBLGEN_PATH/llvm-tblgen -gen-asm-writer -I include -I ${DIR_TD} ${DIR_TD}/${ARCH}-digit.td -o ${ARCH}GenAsmWriter-digit.inc + echo "Generating ${ARCH}GenSystemRegister.inc" + $TBLGEN_PATH/llvm-tblgen -gen-searchable-tables -I include -I ${DIR_TD} ${DIR_TD}/${ARCH}.td -o ${ARCH}GenSystemRegister.inc + ;; + AArch64) + echo "Generating ${ARCH}GenSystemOperands.inc" + $TBLGEN_PATH/llvm-tblgen -gen-searchable-tables -I include -I ${DIR_TD} ${DIR_TD}/${ARCH}.td -o ${ARCH}GenSystemOperands.inc + ;; +esac + |