diff options
| author |   Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
|---|---|---|
| committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
| commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
| tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/edk2/ArmPkg | |
| parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) | |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/edk2/ArmPkg')
726 files changed, 80106 insertions, 0 deletions
diff --git a/roms/edk2/ArmPkg/ArmPkg.dec b/roms/edk2/ArmPkg/ArmPkg.dec new file mode 100644 index 000000000..eaf1072d9 --- /dev/null +++ b/roms/edk2/ArmPkg/ArmPkg.dec @@ -0,0 +1,307 @@ +#/** @file
+# ARM processor package.
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ DEC_SPECIFICATION = 0x00010005
+ PACKAGE_NAME = ArmPkg
+ PACKAGE_GUID = 5CFBD99E-3C43-4E7F-8054-9CDEAFF7710F
+ PACKAGE_VERSION = 0.1
+
+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+# Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+################################################################################
+[Includes.common]
+ Include # Root include for the package
+
+[LibraryClasses.common]
+ ArmLib|Include/Library/ArmLib.h
+ ArmMmuLib|Include/Library/ArmMmuLib.h
+ SemihostLib|Include/Library/Semihosting.h
+ DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h
+ ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
+ ArmGicArchLib|Include/Library/ArmGicArchLib.h
+ ArmMtlLib|ArmPlatformPkg/Include/Library/ArmMtlLib.h
+ ArmSvcLib|Include/Library/ArmSvcLib.h
+ OpteeLib|Include/Library/OpteeLib.h
+ StandaloneMmMmuLib|Include/Library/StandaloneMmMmuLib.h
+
+[Guids.common]
+ gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }
+
+ ## ARM MPCore table
+ # Include/Guid/ArmMpCoreInfo.h
+ gArmMpCoreInfoGuid = { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
+
+[Protocols.common]
+ ## Arm System Control and Management Interface(SCMI) Base protocol
+ ## ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h
+ gArmScmiBaseProtocolGuid = { 0xd7e5abe9, 0x33ab, 0x418e, { 0x9f, 0x91, 0x72, 0xda, 0xe2, 0xba, 0x8e, 0x2f } }
+
+ ## Arm System Control and Management Interface(SCMI) Clock management protocol
+ ## ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
+ gArmScmiClockProtocolGuid = { 0x91ce67a8, 0xe0aa, 0x4012, { 0xb9, 0x9f, 0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa } }
+ gArmScmiClock2ProtocolGuid = { 0xb8d8caf2, 0x9e94, 0x462c, { 0xa8, 0x34, 0x6c, 0x99, 0xfc, 0x05, 0xef, 0xcf } }
+
+ ## Arm System Control and Management Interface(SCMI) Clock management protocol
+ ## ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h
+ gArmScmiPerformanceProtocolGuid = { 0x9b8ba84, 0x3dd3, 0x49a6, { 0xa0, 0x5a, 0x31, 0x34, 0xa5, 0xf0, 0x7b, 0xad } }
+
+[Ppis]
+ ## Include/Ppi/ArmMpCoreInfo.h
+ gArmMpCoreInfoPpiGuid = { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} }
+
+[PcdsFeatureFlag.common]
+ gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001
+
+ # On ARM Architecture with the Security Extension, the address for the
+ # Vector Table can be mapped anywhere in the memory map. It means we can
+ # point the Exception Vector Table to its location in CpuDxe.
+ # By default we copy the Vector Table at PcdGet64(PcdCpuVectorBaseAddress)
+ gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022
+ # Set this PCD to TRUE if the Exception Vector is changed to add debugger support before
+ # it has been configured by the CPU DXE
+ gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032
+
+ # Define if the GICv3 controller should use the GICv2 legacy
+ gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042
+
+[PcdsFeatureFlag.ARM]
+ # Whether to map normal memory as non-shareable. FALSE is the safe choice, but
+ # TRUE may be appropriate to fix performance problems if you don't care about
+ # hardware coherency (i.e., no virtualization or cache coherent DMA)
+ gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x00000043
+
+[PcdsFixedAtBuild.common]
+ gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006
+
+ # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.
+ # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
+ gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024
+
+ gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT64|0x00000004
+ gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
+
+ #
+ # ARM Secure Firmware PCDs
+ #
+ gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT64|0x00000015
+ gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
+ gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT64|0x0000002F
+ gArmTokenSpaceGuid.PcdSecureFvSize|0x0|UINT32|0x00000030
+
+ #
+ # ARM Hypervisor Firmware PCDs
+ #
+ gArmTokenSpaceGuid.PcdHypFdBaseAddress|0|UINT32|0x0000003A
+ gArmTokenSpaceGuid.PcdHypFdSize|0|UINT32|0x0000003B
+ gArmTokenSpaceGuid.PcdHypFvBaseAddress|0|UINT32|0x0000003C
+ gArmTokenSpaceGuid.PcdHypFvSize|0|UINT32|0x0000003D
+
+ # Use ClusterId + CoreId to identify the PrimaryCore
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031
+ # The Primary Core is ClusterId[0] & CoreId[0]
+ gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037
+
+ #
+ # ARM L2x0 PCDs
+ #
+ gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B
+
+ #
+ # ARM Normal (or Non Secure) Firmware PCDs
+ #
+ gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C
+ gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E
+
+ #
+ # Value to add to a host address to obtain a device address, using
+ # unsigned 64-bit integer arithmetic on both ARM and AArch64. This
+ # means we can rely on truncation on overflow to specify negative
+ # offsets.
+ #
+ gArmTokenSpaceGuid.PcdArmDmaDeviceOffset|0x0|UINT64|0x0000044
+
+[PcdsFixedAtBuild.common, PcdsPatchableInModule.common]
+ gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT64|0x0000002B
+ gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT64|0x0000002D
+
+[PcdsFixedAtBuild.ARM]
+ #
+ # ARM Security Extension
+ #
+
+ # Secure Configuration Register
+ # - BIT0 : NS - Non Secure bit
+ # - BIT1 : IRQ Handler
+ # - BIT2 : FIQ Handler
+ # - BIT3 : EA - External Abort
+ # - BIT4 : FW - F bit writable
+ # - BIT5 : AW - A bit writable
+ # - BIT6 : nET - Not Early Termination
+ # - BIT7 : SCD - Secure Monitor Call Disable
+ # - BIT8 : HCE - Hyp Call enable
+ # - BIT9 : SIF - Secure Instruction Fetch
+ # 0x31 = NS | EA | FW
+ gArmTokenSpaceGuid.PcdArmScr|0x31|UINT32|0x00000038
+
+ # By default we do not do a transition to non-secure mode
+ gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x0000003E
+
+ # Non Secure Access Control Register
+ # - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality
+ # - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31
+ # - BIT11 : cp11 - Non-secure access to coprocessor 11 enable
+ # - BIT10 : cp10 - Non-secure access to coprocessor 10 enable
+ # 0xC00 = cp10 | cp11
+ gArmTokenSpaceGuid.PcdArmNsacr|0xC00|UINT32|0x00000039
+
+[PcdsFixedAtBuild.AARCH64]
+ #
+ # AArch64 Security Extension
+ #
+
+ # Secure Configuration Register
+ # - BIT0 : NS - Non Secure bit
+ # - BIT1 : IRQ Handler
+ # - BIT2 : FIQ Handler
+ # - BIT3 : EA - External Abort
+ # - BIT4 : FW - F bit writable
+ # - BIT5 : AW - A bit writable
+ # - BIT6 : nET - Not Early Termination
+ # - BIT7 : SCD - Secure Monitor Call Disable
+ # - BIT8 : HCE - Hyp Call enable
+ # - BIT9 : SIF - Secure Instruction Fetch
+ # - BIT10: RW - Register width control for lower exception levels
+ # - BIT11: SIF - Enables Secure EL1 access to EL1 Architectural Timer
+ # - BIT12: TWI - Trap WFI
+ # - BIT13: TWE - Trap WFE
+ # 0x501 = NS | HCE | RW
+ gArmTokenSpaceGuid.PcdArmScr|0x501|UINT32|0x00000038
+
+ # By default we do transition to EL2 non-secure mode with Stack for EL2.
+ # Mode Description Bits
+ # NS EL2 SP2 all interrupts disabled = 0x3c9
+ # NS EL1 SP1 all interrupts disabled = 0x3c5
+ # Other modes include using SP0 or switching to Aarch32, but these are
+ # not currently supported.
+ gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x3c9|UINT32|0x0000003E
+
+
+#
+# These PCDs are also defined as 'PcdsDynamic' or 'PcdsPatchableInModule' to be
+# redefined when using UEFI in a context of virtual machine.
+#
+[PcdsFixedAtBuild.common, PcdsDynamic.common, PcdsPatchableInModule.common]
+
+ # System Memory (DRAM): These PCDs define the region of in-built system memory
+ # Some platforms can get DRAM extensions, these additional regions may be
+ # declared to UEFI using separate resource descriptor HOBs
+ gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT64|0x00000029
+ gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT64|0x0000002A
+
+ gArmTokenSpaceGuid.PcdMmBufferBase|0|UINT64|0x00000045
+ gArmTokenSpaceGuid.PcdMmBufferSize|0|UINT64|0x00000046
+
+[PcdsFixedAtBuild.common, PcdsDynamic.common]
+ #
+ # ARM Architectural Timer
+ #
+ gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0|UINT32|0x00000034
+
+ # ARM Architectural Timer Interrupt(GIC PPI) numbers
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|29|UINT32|0x00000035
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|30|UINT32|0x00000036
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|26|UINT32|0x00000040
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|27|UINT32|0x00000041
+
+ #
+ # ARM Generic Watchdog
+ #
+
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2A440000|UINT64|0x00000007
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2A450000|UINT64|0x00000008
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93|UINT32|0x00000009
+
+ #
+ # ARM Generic Interrupt Controller
+ #
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT64|0x0000000C
+ # Base address for the GIC Redistributor region that contains the boot CPU
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0|UINT64|0x0000000E
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT64|0x0000000D
+ gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025
+
+ #
+ # Bases, sizes and translation offsets of IO and MMIO spaces, respectively.
+ # Note that "IO" is just another MMIO range that simulates IO space; there
+ # are no special instructions to access it.
+ #
+ # The base addresses PcdPciIoBase, PcdPciMmio32Base and PcdPciMmio64Base are
+ # specific to their containing address spaces. In order to get the physical
+ # address for the CPU, for a given access, the respective translation value
+ # has to be added.
+ #
+ # The translations always have to be initialized like this, using UINT64:
+ #
+ # UINT64 IoCpuBase; // mapping target in 64-bit cpu-physical space
+ # UINT64 Mmio32CpuBase; // mapping target in 64-bit cpu-physical space
+ # UINT64 Mmio64CpuBase; // mapping target in 64-bit cpu-physical space
+ #
+ # PcdPciIoTranslation = IoCpuBase - PcdPciIoBase;
+ # PcdPciMmio32Translation = Mmio32CpuBase - (UINT64)PcdPciMmio32Base;
+ # PcdPciMmio64Translation = Mmio64CpuBase - PcdPciMmio64Base;
+ #
+ # because (a) the target address space (ie. the cpu-physical space) is
+ # 64-bit, and (b) the translation values are meant as offsets for *modular*
+ # arithmetic.
+ #
+ # Accordingly, the translation itself needs to be implemented as:
+ #
+ # UINT64 UntranslatedIoAddress; // input parameter
+ # UINT32 UntranslatedMmio32Address; // input parameter
+ # UINT64 UntranslatedMmio64Address; // input parameter
+ #
+ # UINT64 TranslatedIoAddress; // output parameter
+ # UINT64 TranslatedMmio32Address; // output parameter
+ # UINT64 TranslatedMmio64Address; // output parameter
+ #
+ # TranslatedIoAddress = UntranslatedIoAddress +
+ # PcdPciIoTranslation;
+ # TranslatedMmio32Address = (UINT64)UntranslatedMmio32Address +
+ # PcdPciMmio32Translation;
+ # TranslatedMmio64Address = UntranslatedMmio64Address +
+ # PcdPciMmio64Translation;
+ #
+ # The modular arithmetic performed in UINT64 ensures that the translation
+ # works correctly regardless of the relation between IoCpuBase and
+ # PcdPciIoBase, Mmio32CpuBase and PcdPciMmio32Base, and Mmio64CpuBase and
+ # PcdPciMmio64Base.
+ #
+ gArmTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x00000050
+ gArmTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x00000051
+ gArmTokenSpaceGuid.PcdPciIoTranslation|0x0|UINT64|0x00000052
+ gArmTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT32|0x00000053
+ gArmTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT32|0x00000054
+ gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0|UINT64|0x00000055
+ gArmTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x00000056
+ gArmTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x00000057
+ gArmTokenSpaceGuid.PcdPciMmio64Translation|0x0|UINT64|0x00000058
+
+ #
+ # Inclusive range of allowed PCI buses.
+ #
+ gArmTokenSpaceGuid.PcdPciBusMin|0x0|UINT32|0x00000059
+ gArmTokenSpaceGuid.PcdPciBusMax|0x0|UINT32|0x0000005A
diff --git a/roms/edk2/ArmPkg/ArmPkg.dsc b/roms/edk2/ArmPkg/ArmPkg.dsc new file mode 100644 index 000000000..48059cf38 --- /dev/null +++ b/roms/edk2/ArmPkg/ArmPkg.dsc @@ -0,0 +1,152 @@ +#/** @file
+# ARM processor package.
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011 - 2018, ARM Ltd. All rights reserved.<BR>
+# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = ArmPkg
+ PLATFORM_GUID = 5CFBD99E-3C43-4E7F-8054-9CDEAFF7710F
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x00010005
+ OUTPUT_DIRECTORY = Build/Arm
+ SUPPORTED_ARCHITECTURES = ARM|AARCH64
+ BUILD_TARGETS = DEBUG|RELEASE|NOOPT
+ SKUID_IDENTIFIER = DEFAULT
+
+[BuildOptions]
+ RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+ *_*_*_CC_FLAGS = -DDISABLE_NEW_DEPRECATED_INTERFACES
+
+[PcdsFixedAtBuild]
+ gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
+
+[LibraryClasses.common]
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+ CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+ TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+
+ UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
+ HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+
+ SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf
+ DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+ DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
+ CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
+
+ CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+ ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
+ ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
+ ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
+ ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
+ OpteeLib|ArmPkg/Library/OpteeLib/OpteeLib.inf
+
+ UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+ SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+
+ FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
+
+ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
+ FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+
+ IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+
+ ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+ ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
+
+ ArmMtlLib|ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf
+
+[LibraryClasses.common.PEIM]
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+ PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+ PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+
+[LibraryClasses.ARM, LibraryClasses.AARCH64]
+ NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+
+ # Add support for GCC stack protector
+ NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
+
+[Components.common]
+ ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+ ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
+ ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+ ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
+ ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
+ ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
+ ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
+ ArmPkg/Library/SemiHostingDebugLib/SemiHostingDebugLib.inf
+ ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf
+ ArmPkg/Library/SemihostLib/SemihostLib.inf
+ ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf
+ ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
+ ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf
+
+ ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+ ArmPkg/Drivers/CpuPei/CpuPei.inf
+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+ ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+ ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+ ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+
+ ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
+ ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.inf
+
+ ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
+ ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf
+ ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
+ ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf
+ ArmPkg/Library/OpteeLib/OpteeLib.inf
+
+ ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
+
+ ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
+
+ ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
+ ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
+ ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
+ ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf
+ ArmPkg/Library/ArmLib/ArmBaseLib.inf
+ ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf
+ ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
+ ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
+ ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+ ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+
+ ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf
+ ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
+
+[Components.AARCH64]
+ ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
+ ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
+ ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf
diff --git a/roms/edk2/ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.c b/roms/edk2/ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.c new file mode 100644 index 000000000..137dd787e --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.c @@ -0,0 +1,32 @@ +/** @file
+
+ Copyright (c) 2017, Linaro, Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiDxe.h>
+#include <Library/DebugLib.h>
+#include <Library/DefaultExceptionHandlerLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Protocol/Cpu.h>
+
+STATIC EFI_CPU_ARCH_PROTOCOL *mCpu;
+
+EFI_STATUS
+EFIAPI
+ArmCrashDumpDxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
+ ASSERT_EFI_ERROR(Status);
+
+ return mCpu->RegisterInterruptHandler (mCpu,
+ EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS,
+ &DefaultExceptionHandler);
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.dsc b/roms/edk2/ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.dsc new file mode 100644 index 000000000..2818ce65d --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.dsc @@ -0,0 +1,50 @@ +#/** @file
+#
+# Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = ArmCrashDumpDxe
+ PLATFORM_GUID = 8dc3c2f8-988e-4e32-8fb7-0df43f6d0d8a
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x00010019
+ OUTPUT_DIRECTORY = Build/ArmCrashDumpDxe
+ SUPPORTED_ARCHITECTURES = AARCH64
+ BUILD_TARGETS = DEBUG
+ SKUID_IDENTIFIER = DEFAULT
+
+[PcdsFixedAtBuild]
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000004F
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x27
+
+[LibraryClasses]
+ ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+ DebugLib|MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.inf
+ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+ DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+ SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+
+ NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+ NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
+
+[Components.common]
+ ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf
diff --git a/roms/edk2/ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf b/roms/edk2/ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf new file mode 100644 index 000000000..4dc92a1d6 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf @@ -0,0 +1,34 @@ +#/** @file
+#
+# Copyright (c) 2017, Linaro, Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010018
+ BASE_NAME = ArmCrashDumpDxe
+ FILE_GUID = 0bda00b0-05d6-4bb8-bfc7-058ad13615cf
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = ArmCrashDumpDxeInitialize
+
+[Sources]
+ ArmCrashDumpDxe.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ DebugLib
+ DefaultExceptionHandlerLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Protocols]
+ gEfiCpuArchProtocolGuid
+
+[Depex]
+ gEfiCpuArchProtocolGuid
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c new file mode 100644 index 000000000..5fb33c546 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c @@ -0,0 +1,206 @@ +/*++
+
+Copyright (c) 2013-2017, ARM Ltd. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+--*/
+
+#include "ArmGicDxe.h"
+
+VOID
+EFIAPI
+IrqInterruptHandler (
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ );
+
+VOID
+EFIAPI
+ExitBootServicesEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ );
+
+// Making this global saves a few bytes in image size
+EFI_HANDLE gHardwareInterruptHandle = NULL;
+
+// Notifications
+EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
+
+// Maximum Number of Interrupts
+UINTN mGicNumInterrupts = 0;
+
+HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers = NULL;
+
+
+/**
+ Calculate GICD_ICFGRn base address and corresponding bit
+ field Int_config[1] of the GIC distributor register.
+
+ @param Source Hardware source of the interrupt.
+ @param RegAddress Corresponding GICD_ICFGRn base address.
+ @param Config1Bit Bit number of F Int_config[1] bit in the register.
+
+ @retval EFI_SUCCESS Source interrupt supported.
+ @retval EFI_UNSUPPORTED Source interrupt is not supported.
+**/
+EFI_STATUS
+GicGetDistributorIcfgBaseAndBit (
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ OUT UINTN *RegAddress,
+ OUT UINTN *Config1Bit
+ )
+{
+ UINTN RegIndex;
+ UINTN Field;
+
+ if (Source >= mGicNumInterrupts) {
+ ASSERT(Source < mGicNumInterrupts);
+ return EFI_UNSUPPORTED;
+ }
+
+ RegIndex = Source / ARM_GIC_ICDICFR_F_STRIDE; // NOTE: truncation is significant
+ Field = Source % ARM_GIC_ICDICFR_F_STRIDE;
+ *RegAddress = PcdGet64 (PcdGicDistributorBase)
+ + ARM_GIC_ICDICFR
+ + (ARM_GIC_ICDICFR_BYTES * RegIndex);
+ *Config1Bit = ((Field * ARM_GIC_ICDICFR_F_WIDTH)
+ + ARM_GIC_ICDICFR_F_CONFIG1_BIT);
+
+ return EFI_SUCCESS;
+}
+
+
+
+/**
+ Register Handler for the specified interrupt source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+ @param Handler Callback for interrupt. NULL to unregister
+
+ @retval EFI_SUCCESS Source was updated to support Handler.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+EFI_STATUS
+EFIAPI
+RegisterInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN HARDWARE_INTERRUPT_HANDLER Handler
+ )
+{
+ if (Source >= mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ((Handler != NULL) && (gRegisteredInterruptHandlers[Source] != NULL)) {
+ return EFI_ALREADY_STARTED;
+ }
+
+ gRegisteredInterruptHandlers[Source] = Handler;
+
+ // If the interrupt handler is unregistered then disable the interrupt
+ if (NULL == Handler){
+ return This->DisableInterruptSource (This, Source);
+ } else {
+ return This->EnableInterruptSource (This, Source);
+ }
+}
+
+STATIC VOID *mCpuArchProtocolNotifyEventRegistration;
+
+STATIC
+VOID
+EFIAPI
+CpuArchEventProtocolNotify (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_CPU_ARCH_PROTOCOL *Cpu;
+ EFI_STATUS Status;
+
+ // Get the CPU protocol that this driver requires.
+ Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ // Unregister the default exception handler.
+ Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
+ __FUNCTION__, Status));
+ return;
+ }
+
+ // Register to receive interrupts
+ Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ,
+ Context);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
+ __FUNCTION__, Status));
+ }
+
+ gBS->CloseEvent (Event);
+}
+
+EFI_STATUS
+InstallAndRegisterInterruptService (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,
+ IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol,
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
+ IN EFI_EVENT_NOTIFY ExitBootServicesEvent
+ )
+{
+ EFI_STATUS Status;
+ CONST UINTN RihArraySize =
+ (sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
+
+ // Initialize the array for the Interrupt Handlers
+ gRegisteredInterruptHandlers = AllocateZeroPool (RihArraySize);
+ if (gRegisteredInterruptHandlers == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &gHardwareInterruptHandle,
+ &gHardwareInterruptProtocolGuid,
+ InterruptProtocol,
+ &gHardwareInterrupt2ProtocolGuid,
+ Interrupt2Protocol,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Install the interrupt handler as soon as the CPU arch protocol appears.
+ //
+ EfiCreateProtocolNotifyEvent (
+ &gEfiCpuArchProtocolGuid,
+ TPL_CALLBACK,
+ CpuArchEventProtocolNotify,
+ InterruptHandler,
+ &mCpuArchProtocolNotifyEventRegistration);
+
+ // Register for an ExitBootServicesEvent
+ Status = gBS->CreateEvent (
+ EVT_SIGNAL_EXIT_BOOT_SERVICES,
+ TPL_NOTIFY,
+ ExitBootServicesEvent,
+ NULL,
+ &EfiExitBootServicesEvent
+ );
+
+ return Status;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.c b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.c new file mode 100644 index 000000000..a210a6af1 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.c @@ -0,0 +1,53 @@ +/*++
+
+Copyright (c) 2013-2014, ARM Ltd. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+Module Name:
+
+ ArmGicDxe.c
+
+Abstract:
+
+ Driver implementing the GIC interrupt controller protocol
+
+--*/
+
+#include <PiDxe.h>
+
+#include "ArmGicDxe.h"
+
+/**
+ Initialize the state information for the CPU Architectural Protocol
+
+ @param ImageHandle of the loaded driver
+ @param SystemTable Pointer to the System Table
+
+ @retval EFI_SUCCESS Protocol registered
+ @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
+ @retval EFI_DEVICE_ERROR Hardware problems
+ @retval EFI_UNSUPPORTED GIC version not supported
+
+**/
+EFI_STATUS
+InterruptDxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ ARM_GIC_ARCH_REVISION Revision;
+
+ Revision = ArmGicGetSupportedArchRevision ();
+
+ if (Revision == ARM_GIC_ARCH_REVISION_2) {
+ Status = GicV2DxeInitialize (ImageHandle, SystemTable);
+ } else if (Revision == ARM_GIC_ARCH_REVISION_3) {
+ Status = GicV3DxeInitialize (ImageHandle, SystemTable);
+ } else {
+ Status = EFI_UNSUPPORTED;
+ }
+
+ return Status;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.h b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.h new file mode 100644 index 000000000..bf067ae03 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.h @@ -0,0 +1,79 @@ +/*++
+
+Copyright (c) 2013-2017, ARM Ltd. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+--*/
+
+#ifndef __ARM_GIC_DXE_H__
+#define __ARM_GIC_DXE_H__
+
+#include <Library/ArmGicLib.h>
+#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+
+#include <Protocol/Cpu.h>
+#include <Protocol/HardwareInterrupt.h>
+#include <Protocol/HardwareInterrupt2.h>
+
+extern UINTN mGicNumInterrupts;
+extern HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers;
+
+// Common API
+EFI_STATUS
+InstallAndRegisterInterruptService (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,
+ IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol,
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
+ IN EFI_EVENT_NOTIFY ExitBootServicesEvent
+ );
+
+EFI_STATUS
+EFIAPI
+RegisterInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN HARDWARE_INTERRUPT_HANDLER Handler
+ );
+
+// GicV2 API
+EFI_STATUS
+GicV2DxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+// GicV3 API
+EFI_STATUS
+GicV3DxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+
+// Shared code
+
+/**
+ Calculate GICD_ICFGRn base address and corresponding bit
+ field Int_config[1] of the GIC distributor register.
+
+ @param Source Hardware source of the interrupt.
+ @param RegAddress Corresponding GICD_ICFGRn base address.
+ @param Config1Bit Bit number of F Int_config[1] bit in the register.
+
+ @retval EFI_SUCCESS Source interrupt supported.
+ @retval EFI_UNSUPPORTED Source interrupt is not supported.
+**/
+EFI_STATUS
+GicGetDistributorIcfgBaseAndBit (
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ OUT UINTN *RegAddress,
+ OUT UINTN *Config1Bit
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf new file mode 100644 index 000000000..cd2cec248 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf @@ -0,0 +1,57 @@ +#/** @file
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2012 - 2017, ARM Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmGicDxe
+ FILE_GUID = DE371F7C-DEC4-4D21-ADF1-593ABCC15882
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = InterruptDxeInitialize
+
+[Sources.common]
+ ArmGicDxe.h
+ ArmGicDxe.c
+ ArmGicCommonDxe.c
+
+ GicV2/ArmGicV2Dxe.c
+ GicV3/ArmGicV3Dxe.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ ArmGicLib
+ BaseLib
+ UefiLib
+ UefiBootServicesTableLib
+ DebugLib
+ PrintLib
+ MemoryAllocationLib
+ UefiDriverEntryPoint
+ IoLib
+ PcdLib
+ UefiLib
+
+[Protocols]
+ gHardwareInterruptProtocolGuid ## PRODUCES
+ gHardwareInterrupt2ProtocolGuid ## PRODUCES
+ gEfiCpuArchProtocolGuid ## CONSUMES ## NOTIFY
+
+[Pcd.common]
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
+ gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy
+
+[Depex]
+ TRUE
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.c new file mode 100644 index 000000000..001e6b143 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -0,0 +1,377 @@ +/** @file
+*
+* Copyright (c) 2011-2018, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Base.h>
+#include <Library/ArmGicLib.h>
+#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+
+// In GICv3, there are 2 x 64KB frames:
+// Redistributor control frame + SGI Control & Generation frame
+#define GIC_V3_REDISTRIBUTOR_GRANULARITY (ARM_GICR_CTLR_FRAME_SIZE \
+ + ARM_GICR_SGI_PPI_FRAME_SIZE)
+
+// In GICv4, there are 2 additional 64KB frames:
+// VLPI frame + Reserved page frame
+#define GIC_V4_REDISTRIBUTOR_GRANULARITY (GIC_V3_REDISTRIBUTOR_GRANULARITY \
+ + ARM_GICR_SGI_VLPI_FRAME_SIZE \
+ + ARM_GICR_SGI_RESERVED_FRAME_SIZE)
+
+#define ISENABLER_ADDRESS(base,offset) ((base) + \
+ ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * offset))
+
+#define ICENABLER_ADDRESS(base,offset) ((base) + \
+ ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + (4 * offset))
+
+/**
+ *
+ * Return whether the Source interrupt index refers to a shared interrupt (SPI)
+ */
+STATIC
+BOOLEAN
+SourceIsSpi (
+ IN UINTN Source
+ )
+{
+ return Source >= 32 && Source < 1020;
+}
+
+/**
+ * Return the base address of the GIC redistributor for the current CPU
+ *
+ * @param Revision GIC Revision. The GIC redistributor might have a different
+ * granularity following the GIC revision.
+ *
+ * @retval Base address of the associated GIC Redistributor
+ */
+STATIC
+UINTN
+GicGetCpuRedistributorBase (
+ IN UINTN GicRedistributorBase,
+ IN ARM_GIC_ARCH_REVISION Revision
+ )
+{
+ UINTN MpId;
+ UINTN CpuAffinity;
+ UINTN Affinity;
+ UINTN GicCpuRedistributorBase;
+ UINT64 TypeRegister;
+
+ MpId = ArmReadMpidr ();
+ // Define CPU affinity as:
+ // Affinity0[0:8], Affinity1[9:15], Affinity2[16:23], Affinity3[24:32]
+ // whereas Affinity3 is defined at [32:39] in MPIDR
+ CpuAffinity = (MpId & (ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2)) |
+ ((MpId & ARM_CORE_AFF3) >> 8);
+
+ if (Revision < ARM_GIC_ARCH_REVISION_3) {
+ ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
+ return 0;
+ }
+
+ GicCpuRedistributorBase = GicRedistributorBase;
+
+ do {
+ TypeRegister = MmioRead64 (GicCpuRedistributorBase + ARM_GICR_TYPER);
+ Affinity = ARM_GICR_TYPER_GET_AFFINITY (TypeRegister);
+ if (Affinity == CpuAffinity) {
+ return GicCpuRedistributorBase;
+ }
+
+ // Move to the next GIC Redistributor frame.
+ // The GIC specification does not forbid a mixture of redistributors
+ // with or without support for virtual LPIs, so we test Virtual LPIs
+ // Support (VLPIS) bit for each frame to decide the granularity.
+ // Note: The assumption here is that the redistributors are adjacent
+ // for all CPUs. However this may not be the case for NUMA systems.
+ GicCpuRedistributorBase += (((ARM_GICR_TYPER_VLPIS & TypeRegister) != 0)
+ ? GIC_V4_REDISTRIBUTOR_GRANULARITY
+ : GIC_V3_REDISTRIBUTOR_GRANULARITY);
+ } while ((TypeRegister & ARM_GICR_TYPER_LAST) == 0);
+
+ // The Redistributor has not been found for the current CPU
+ ASSERT_EFI_ERROR (EFI_NOT_FOUND);
+ return 0;
+}
+
+UINTN
+EFIAPI
+ArmGicGetInterfaceIdentification (
+ IN INTN GicInterruptInterfaceBase
+ )
+{
+ // Read the GIC Identification Register
+ return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIIDR);
+}
+
+UINTN
+EFIAPI
+ArmGicGetMaxNumInterrupts (
+ IN INTN GicDistributorBase
+ )
+{
+ return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1);
+}
+
+VOID
+EFIAPI
+ArmGicSendSgiTo (
+ IN INTN GicDistributorBase,
+ IN INTN TargetListFilter,
+ IN INTN CPUTargetList,
+ IN INTN SgiId
+ )
+{
+ MmioWrite32 (
+ GicDistributorBase + ARM_GIC_ICDSGIR,
+ ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId
+ );
+}
+
+/*
+ * Acknowledge and return the value of the Interrupt Acknowledge Register
+ *
+ * InterruptId is returned separately from the register value because in
+ * the GICv2 the register value contains the CpuId and InterruptId while
+ * in the GICv3 the register value is only the InterruptId.
+ *
+ * @param GicInterruptInterfaceBase Base Address of the GIC CPU Interface
+ * @param InterruptId InterruptId read from the Interrupt
+ * Acknowledge Register
+ *
+ * @retval value returned by the Interrupt Acknowledge Register
+ *
+ */
+UINTN
+EFIAPI
+ArmGicAcknowledgeInterrupt (
+ IN UINTN GicInterruptInterfaceBase,
+ OUT UINTN *InterruptId
+ )
+{
+ UINTN Value;
+ ARM_GIC_ARCH_REVISION Revision;
+
+ Revision = ArmGicGetSupportedArchRevision ();
+ if (Revision == ARM_GIC_ARCH_REVISION_2) {
+ Value = ArmGicV2AcknowledgeInterrupt (GicInterruptInterfaceBase);
+ // InterruptId is required for the caller to know if a valid or spurious
+ // interrupt has been read
+ ASSERT (InterruptId != NULL);
+ if (InterruptId != NULL) {
+ *InterruptId = Value & ARM_GIC_ICCIAR_ACKINTID;
+ }
+ } else if (Revision == ARM_GIC_ARCH_REVISION_3) {
+ Value = ArmGicV3AcknowledgeInterrupt ();
+ } else {
+ ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
+ // Report Spurious interrupt which is what the above controllers would
+ // return if no interrupt was available
+ Value = 1023;
+ }
+
+ return Value;
+}
+
+VOID
+EFIAPI
+ArmGicEndOfInterrupt (
+ IN UINTN GicInterruptInterfaceBase,
+ IN UINTN Source
+ )
+{
+ ARM_GIC_ARCH_REVISION Revision;
+
+ Revision = ArmGicGetSupportedArchRevision ();
+ if (Revision == ARM_GIC_ARCH_REVISION_2) {
+ ArmGicV2EndOfInterrupt (GicInterruptInterfaceBase, Source);
+ } else if (Revision == ARM_GIC_ARCH_REVISION_3) {
+ ArmGicV3EndOfInterrupt (Source);
+ } else {
+ ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
+ }
+}
+
+VOID
+EFIAPI
+ArmGicEnableInterrupt (
+ IN UINTN GicDistributorBase,
+ IN UINTN GicRedistributorBase,
+ IN UINTN Source
+ )
+{
+ UINT32 RegOffset;
+ UINTN RegShift;
+ ARM_GIC_ARCH_REVISION Revision;
+ UINTN GicCpuRedistributorBase;
+
+ // Calculate enable register offset and bit position
+ RegOffset = Source / 32;
+ RegShift = Source % 32;
+
+ Revision = ArmGicGetSupportedArchRevision ();
+ if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
+ FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
+ SourceIsSpi (Source)) {
+ // Write set-enable register
+ MmioWrite32 (
+ GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset),
+ 1 << RegShift
+ );
+ } else {
+ GicCpuRedistributorBase = GicGetCpuRedistributorBase (
+ GicRedistributorBase,
+ Revision
+ );
+ if (GicCpuRedistributorBase == 0) {
+ ASSERT_EFI_ERROR (EFI_NOT_FOUND);
+ return;
+ }
+
+ // Write set-enable register
+ MmioWrite32 (
+ ISENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset),
+ 1 << RegShift
+ );
+ }
+}
+
+VOID
+EFIAPI
+ArmGicDisableInterrupt (
+ IN UINTN GicDistributorBase,
+ IN UINTN GicRedistributorBase,
+ IN UINTN Source
+ )
+{
+ UINT32 RegOffset;
+ UINTN RegShift;
+ ARM_GIC_ARCH_REVISION Revision;
+ UINTN GicCpuRedistributorBase;
+
+ // Calculate enable register offset and bit position
+ RegOffset = Source / 32;
+ RegShift = Source % 32;
+
+ Revision = ArmGicGetSupportedArchRevision ();
+ if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
+ FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
+ SourceIsSpi (Source)) {
+ // Write clear-enable register
+ MmioWrite32 (
+ GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset),
+ 1 << RegShift
+ );
+ } else {
+ GicCpuRedistributorBase = GicGetCpuRedistributorBase (
+ GicRedistributorBase,
+ Revision
+ );
+ if (GicCpuRedistributorBase == 0) {
+ return;
+ }
+
+ // Write clear-enable register
+ MmioWrite32 (
+ ICENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset),
+ 1 << RegShift
+ );
+ }
+}
+
+BOOLEAN
+EFIAPI
+ArmGicIsInterruptEnabled (
+ IN UINTN GicDistributorBase,
+ IN UINTN GicRedistributorBase,
+ IN UINTN Source
+ )
+{
+ UINT32 RegOffset;
+ UINTN RegShift;
+ ARM_GIC_ARCH_REVISION Revision;
+ UINTN GicCpuRedistributorBase;
+ UINT32 Interrupts;
+
+ // Calculate enable register offset and bit position
+ RegOffset = Source / 32;
+ RegShift = Source % 32;
+
+ Revision = ArmGicGetSupportedArchRevision ();
+ if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
+ FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
+ SourceIsSpi (Source)) {
+ Interrupts = ((MmioRead32 (
+ GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)
+ )
+ & (1 << RegShift)) != 0);
+ } else {
+ GicCpuRedistributorBase = GicGetCpuRedistributorBase (
+ GicRedistributorBase,
+ Revision
+ );
+ if (GicCpuRedistributorBase == 0) {
+ return 0;
+ }
+
+ // Read set-enable register
+ Interrupts = MmioRead32 (
+ ISENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset)
+ );
+ }
+
+ return ((Interrupts & (1 << RegShift)) != 0);
+}
+
+VOID
+EFIAPI
+ArmGicDisableDistributor (
+ IN INTN GicDistributorBase
+ )
+{
+ // Disable Gic Distributor
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x0);
+}
+
+VOID
+EFIAPI
+ArmGicEnableInterruptInterface (
+ IN INTN GicInterruptInterfaceBase
+ )
+{
+ ARM_GIC_ARCH_REVISION Revision;
+
+ Revision = ArmGicGetSupportedArchRevision ();
+ if (Revision == ARM_GIC_ARCH_REVISION_2) {
+ ArmGicV2EnableInterruptInterface (GicInterruptInterfaceBase);
+ } else if (Revision == ARM_GIC_ARCH_REVISION_3) {
+ ArmGicV3EnableInterruptInterface ();
+ } else {
+ ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
+ }
+}
+
+VOID
+EFIAPI
+ArmGicDisableInterruptInterface (
+ IN INTN GicInterruptInterfaceBase
+ )
+{
+ ARM_GIC_ARCH_REVISION Revision;
+
+ Revision = ArmGicGetSupportedArchRevision ();
+ if (Revision == ARM_GIC_ARCH_REVISION_2) {
+ ArmGicV2DisableInterruptInterface (GicInterruptInterfaceBase);
+ } else if (Revision == ARM_GIC_ARCH_REVISION_3) {
+ ArmGicV3DisableInterruptInterface ();
+ } else {
+ ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
+ }
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.inf b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.inf new file mode 100644 index 000000000..5e23c732b --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.inf @@ -0,0 +1,42 @@ +#/* @file
+# Copyright (c) 2011-2018, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmGicLib
+ FILE_GUID = 03d05ee4-cdeb-458c-9dfc-993f09bdf405
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmGicLib
+
+[Sources]
+ ArmGicLib.c
+ ArmGicNonSecLib.c
+
+ GicV2/ArmGicV2Lib.c
+ GicV2/ArmGicV2NonSecLib.c
+
+[Sources.ARM]
+ GicV3/Arm/ArmGicV3.S | GCC
+ GicV3/Arm/ArmGicV3.asm | RVCT
+
+[Sources.AARCH64]
+ GicV3/AArch64/ArmGicV3.S
+
+[LibraryClasses]
+ ArmLib
+ DebugLib
+ IoLib
+ ArmGicArchLib
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdePkg/MdePkg.dec
+
+[FeaturePcd]
+ gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c new file mode 100644 index 000000000..7e8ae5ac2 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c @@ -0,0 +1,35 @@ +/** @file
+*
+* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+#include <Library/IoLib.h>
+#include <Library/ArmGicLib.h>
+
+VOID
+EFIAPI
+ArmGicEnableDistributor (
+ IN INTN GicDistributorBase
+ )
+{
+ ARM_GIC_ARCH_REVISION Revision;
+
+ /*
+ * Enable GIC distributor in Non-Secure world.
+ * Note: The ICDDCR register is banked when Security extensions are implemented
+ */
+ Revision = ArmGicGetSupportedArchRevision ();
+ if (Revision == ARM_GIC_ARCH_REVISION_2) {
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
+ } else {
+ if (MmioRead32 (GicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_ARE) {
+ MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x2);
+ } else {
+ MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
+ }
+ }
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c new file mode 100644 index 000000000..4af98bb6e --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c @@ -0,0 +1,58 @@ +/** @file
+*
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Base.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/ArmGicLib.h>
+
+/*
+ * This function configures the interrupts set by the mask to be secure.
+ *
+ */
+VOID
+EFIAPI
+ArmGicSetSecureInterrupts (
+ IN UINTN GicDistributorBase,
+ IN UINTN* GicSecureInterruptMask,
+ IN UINTN GicSecureInterruptMaskSize
+ )
+{
+ UINTN Index;
+ UINT32 InterruptStatus;
+
+ // We must not have more interrupts defined by the mask than the number of available interrupts
+ ASSERT(GicSecureInterruptMaskSize <= (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32));
+
+ // Set all the interrupts defined by the mask as Secure
+ for (Index = 0; Index < GicSecureInterruptMaskSize; Index++) {
+ InterruptStatus = MmioRead32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4));
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), InterruptStatus & (~GicSecureInterruptMask[Index]));
+ }
+}
+
+VOID
+EFIAPI
+ArmGicEnableDistributor (
+ IN INTN GicDistributorBase
+ )
+{
+ // Turn on the GIC distributor
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1);
+}
+
+VOID
+EFIAPI
+ArmGicSetupNonSecure (
+ IN UINTN MpId,
+ IN INTN GicDistributorBase,
+ IN INTN GicInterruptInterfaceBase
+ )
+{
+ ArmGicV2SetupNonSecure (MpId, GicDistributorBase, GicInterruptInterfaceBase);
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c new file mode 100644 index 000000000..a96dc7829 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c @@ -0,0 +1,460 @@ +/*++
+
+Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
+Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
+Portions copyright (c) 2011-2017, ARM Ltd. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+Module Name:
+
+ GicV2/ArmGicV2Dxe.c
+
+Abstract:
+
+ Driver implementing the GicV2 interrupt controller protocol
+
+--*/
+
+#include <Library/ArmGicLib.h>
+
+#include "ArmGicDxe.h"
+
+#define ARM_GIC_DEFAULT_PRIORITY 0x80
+
+extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol;
+extern EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol;
+
+STATIC UINT32 mGicInterruptInterfaceBase;
+STATIC UINT32 mGicDistributorBase;
+
+/**
+ Enable interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt enabled.
+ @retval EFI_UNSUPPORTED Source interrupt is not supported
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV2EnableInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ if (Source >= mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ ArmGicEnableInterrupt (mGicDistributorBase, 0, Source);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Disable interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt disabled.
+ @retval EFI_UNSUPPORTED Source interrupt is not supported
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV2DisableInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ if (Source >= mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ ArmGicDisableInterrupt (mGicDistributorBase, 0, Source);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Return current state of interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+ @param InterruptState TRUE: source enabled, FALSE: source disabled.
+
+ @retval EFI_SUCCESS InterruptState is valid
+ @retval EFI_UNSUPPORTED Source interrupt is not supported
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV2GetInterruptSourceState (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN BOOLEAN *InterruptState
+ )
+{
+ if (Source >= mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ *InterruptState = ArmGicIsInterruptEnabled (mGicDistributorBase, 0, Source);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Signal to the hardware that the End Of Interrupt state
+ has been reached.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt EOI'ed.
+ @retval EFI_UNSUPPORTED Source interrupt is not supported
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV2EndOfInterrupt (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ if (Source >= mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ ArmGicV2EndOfInterrupt (mGicInterruptInterfaceBase, Source);
+ return EFI_SUCCESS;
+}
+
+/**
+ EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
+
+ @param InterruptType Defines the type of interrupt or exception that
+ occurred on the processor.This parameter is
+ processor architecture specific.
+ @param SystemContext A pointer to the processor context when
+ the interrupt occurred on the processor.
+
+ @return None
+
+**/
+STATIC
+VOID
+EFIAPI
+GicV2IrqInterruptHandler (
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ UINT32 GicInterrupt;
+ HARDWARE_INTERRUPT_HANDLER InterruptHandler;
+
+ GicInterrupt = ArmGicV2AcknowledgeInterrupt (mGicInterruptInterfaceBase);
+
+ // Special Interrupts (ID1020-ID1023) have an Interrupt ID greater than the
+ // number of interrupt (ie: Spurious interrupt).
+ if ((GicInterrupt & ARM_GIC_ICCIAR_ACKINTID) >= mGicNumInterrupts) {
+ // The special interrupts do not need to be acknowledged
+ return;
+ }
+
+ InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt];
+ if (InterruptHandler != NULL) {
+ // Call the registered interrupt handler.
+ InterruptHandler (GicInterrupt, SystemContext);
+ } else {
+ DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
+ GicV2EndOfInterrupt (&gHardwareInterruptV2Protocol, GicInterrupt);
+ }
+}
+
+// The protocol instance produced by this driver
+EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol = {
+ RegisterInterruptSource,
+ GicV2EnableInterruptSource,
+ GicV2DisableInterruptSource,
+ GicV2GetInterruptSourceState,
+ GicV2EndOfInterrupt
+};
+
+/**
+ Get interrupt trigger type of an interrupt
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt.
+ @param TriggerType Returns interrupt trigger type.
+
+ @retval EFI_SUCCESS Source interrupt supported.
+ @retval EFI_UNSUPPORTED Source interrupt is not supported.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV2GetTriggerType (
+ IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ OUT EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE *TriggerType
+ )
+{
+ UINTN RegAddress;
+ UINTN Config1Bit;
+ EFI_STATUS Status;
+
+ Status = GicGetDistributorIcfgBaseAndBit (
+ Source,
+ &RegAddress,
+ &Config1Bit
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ if ((MmioRead32 (RegAddress) & (1 << Config1Bit)) == 0) {
+ *TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH;
+ } else {
+ *TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Set interrupt trigger type of an interrupt
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt.
+ @param TriggerType Interrupt trigger type.
+
+ @retval EFI_SUCCESS Source interrupt supported.
+ @retval EFI_UNSUPPORTED Source interrupt is not supported.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV2SetTriggerType (
+ IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE TriggerType
+ )
+{
+ UINTN RegAddress;
+ UINTN Config1Bit;
+ UINT32 Value;
+ EFI_STATUS Status;
+ BOOLEAN SourceEnabled;
+
+ if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
+ && (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
+ DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
+ TriggerType));
+ ASSERT (FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ Status = GicGetDistributorIcfgBaseAndBit (
+ Source,
+ &RegAddress,
+ &Config1Bit
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = GicV2GetInterruptSourceState (
+ (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+ Source,
+ &SourceEnabled
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Value = (TriggerType == EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
+ ? ARM_GIC_ICDICFR_EDGE_TRIGGERED
+ : ARM_GIC_ICDICFR_LEVEL_TRIGGERED;
+
+ // Before changing the value, we must disable the interrupt,
+ // otherwise GIC behavior is UNPREDICTABLE.
+ if (SourceEnabled) {
+ GicV2DisableInterruptSource (
+ (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+ Source
+ );
+ }
+
+ MmioAndThenOr32 (
+ RegAddress,
+ ~(0x1 << Config1Bit),
+ Value << Config1Bit
+ );
+
+ // Restore interrupt state
+ if (SourceEnabled) {
+ GicV2EnableInterruptSource (
+ (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+ Source
+ );
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol = {
+ (HARDWARE_INTERRUPT2_REGISTER)RegisterInterruptSource,
+ (HARDWARE_INTERRUPT2_ENABLE)GicV2EnableInterruptSource,
+ (HARDWARE_INTERRUPT2_DISABLE)GicV2DisableInterruptSource,
+ (HARDWARE_INTERRUPT2_INTERRUPT_STATE)GicV2GetInterruptSourceState,
+ (HARDWARE_INTERRUPT2_END_OF_INTERRUPT)GicV2EndOfInterrupt,
+ GicV2GetTriggerType,
+ GicV2SetTriggerType
+};
+
+/**
+ Shutdown our hardware
+
+ DXE Core will disable interrupts and turn off the timer and disable
+ interrupts after all the event handlers have run.
+
+ @param[in] Event The Event that is being processed
+ @param[in] Context Event Context
+**/
+STATIC
+VOID
+EFIAPI
+GicV2ExitBootServicesEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ UINTN Index;
+ UINT32 GicInterrupt;
+
+ // Disable all the interrupts
+ for (Index = 0; Index < mGicNumInterrupts; Index++) {
+ GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index);
+ }
+
+ // Acknowledge all pending interrupts
+ do {
+ GicInterrupt = ArmGicV2AcknowledgeInterrupt (mGicInterruptInterfaceBase);
+
+ if ((GicInterrupt & ARM_GIC_ICCIAR_ACKINTID) < mGicNumInterrupts) {
+ GicV2EndOfInterrupt (&gHardwareInterruptV2Protocol, GicInterrupt);
+ }
+ } while (!ARM_GIC_IS_SPECIAL_INTERRUPTS (GicInterrupt));
+
+ // Disable Gic Interface
+ ArmGicV2DisableInterruptInterface (mGicInterruptInterfaceBase);
+
+ // Disable Gic Distributor
+ ArmGicDisableDistributor (mGicDistributorBase);
+}
+
+/**
+ Initialize the state information for the CPU Architectural Protocol
+
+ @param ImageHandle of the loaded driver
+ @param SystemTable Pointer to the System Table
+
+ @retval EFI_SUCCESS Protocol registered
+ @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
+ @retval EFI_DEVICE_ERROR Hardware problems
+
+**/
+EFI_STATUS
+GicV2DxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ UINT32 RegOffset;
+ UINTN RegShift;
+ UINT32 CpuTarget;
+
+ // Make sure the Interrupt Controller Protocol is not already installed in
+ // the system.
+ ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
+
+ mGicInterruptInterfaceBase = PcdGet64 (PcdGicInterruptInterfaceBase);
+ mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);
+ mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
+
+ for (Index = 0; Index < mGicNumInterrupts; Index++) {
+ GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index);
+
+ // Set Priority
+ RegOffset = Index / 4;
+ RegShift = (Index % 4) * 8;
+ MmioAndThenOr32 (
+ mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
+ ~(0xff << RegShift),
+ ARM_GIC_DEFAULT_PRIORITY << RegShift
+ );
+ }
+
+ // Targets the interrupts to the Primary Cpu
+
+ // Only Primary CPU will run this code. We can identify our GIC CPU ID by
+ // reading the GIC Distributor Target register. The 8 first GICD_ITARGETSRn
+ // are banked to each connected CPU. These 8 registers hold the CPU targets
+ // fields for interrupts 0-31. More Info in the GIC Specification about
+ // "Interrupt Processor Targets Registers"
+
+ // Read the first Interrupt Processor Targets Register (that corresponds to
+ // the 4 first SGIs)
+ CpuTarget = MmioRead32 (mGicDistributorBase + ARM_GIC_ICDIPTR);
+
+ // The CPU target is a bit field mapping each CPU to a GIC CPU Interface.
+ // This value is 0 when we run on a uniprocessor platform.
+ if (CpuTarget != 0) {
+ // The 8 first Interrupt Processor Targets Registers are read-only
+ for (Index = 8; Index < (mGicNumInterrupts / 4); Index++) {
+ MmioWrite32 (
+ mGicDistributorBase + ARM_GIC_ICDIPTR + (Index * 4),
+ CpuTarget
+ );
+ }
+ }
+
+ // Set binary point reg to 0x7 (no preemption)
+ MmioWrite32 (mGicInterruptInterfaceBase + ARM_GIC_ICCBPR, 0x7);
+
+ // Set priority mask reg to 0xff to allow all priorities through
+ MmioWrite32 (mGicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0xff);
+
+ // Enable gic cpu interface
+ ArmGicEnableInterruptInterface (mGicInterruptInterfaceBase);
+
+ // Enable gic distributor
+ ArmGicEnableDistributor (mGicDistributorBase);
+
+ Status = InstallAndRegisterInterruptService (
+ &gHardwareInterruptV2Protocol,
+ &gHardwareInterrupt2V2Protocol,
+ GicV2IrqInterruptHandler,
+ GicV2ExitBootServicesEvent
+ );
+
+ return Status;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c new file mode 100644 index 000000000..ff910c175 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c @@ -0,0 +1,30 @@ +/** @file
+*
+* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/ArmGicLib.h>
+#include <Library/IoLib.h>
+
+UINTN
+EFIAPI
+ArmGicV2AcknowledgeInterrupt (
+ IN UINTN GicInterruptInterfaceBase
+ )
+{
+ // Read the Interrupt Acknowledge Register
+ return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
+}
+
+VOID
+EFIAPI
+ArmGicV2EndOfInterrupt (
+ IN UINTN GicInterruptInterfaceBase,
+ IN UINTN Source
+ )
+{
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source);
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c new file mode 100644 index 000000000..08f219c10 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c @@ -0,0 +1,36 @@ +/** @file
+*
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+#include <Library/IoLib.h>
+#include <Library/ArmGicLib.h>
+
+
+VOID
+EFIAPI
+ArmGicV2EnableInterruptInterface (
+ IN INTN GicInterruptInterfaceBase
+ )
+{
+ /*
+ * Enable the CPU interface in Non-Secure world
+ * Note: The ICCICR register is banked when Security extensions are implemented
+ */
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);
+}
+
+VOID
+EFIAPI
+ArmGicV2DisableInterruptInterface (
+ IN INTN GicInterruptInterfaceBase
+ )
+{
+ // Disable Gic Interface
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x0);
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0);
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S new file mode 100644 index 000000000..20f83aa85 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S @@ -0,0 +1,106 @@ +#
+# Copyright (c) 2014, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+#include <AsmMacroIoLibV8.h>
+
+#if !defined(__clang__)
+
+//
+// Clang versions before v3.6 do not support the GNU extension that allows
+// system registers outside of the IMPLEMENTATION DEFINED range to be specified
+// using the generic notation below. However, clang knows these registers by
+// their architectural names, so it has no need for these aliases anyway.
+//
+#define ICC_SRE_EL1 S3_0_C12_C12_5
+#define ICC_SRE_EL2 S3_4_C12_C9_5
+#define ICC_SRE_EL3 S3_6_C12_C12_5
+#define ICC_IGRPEN1_EL1 S3_0_C12_C12_7
+#define ICC_EOIR1_EL1 S3_0_C12_C12_1
+#define ICC_IAR1_EL1 S3_0_C12_C12_0
+#define ICC_PMR_EL1 S3_0_C4_C6_0
+#define ICC_BPR1_EL1 S3_0_C12_C12_3
+
+#endif
+
+//UINT32
+//EFIAPI
+//ArmGicV3GetControlSystemRegisterEnable (
+// VOID
+// );
+ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, ICC_SRE_EL1
+ b 4f
+2: mrs x0, ICC_SRE_EL2
+ b 4f
+3: mrs x0, ICC_SRE_EL3
+4: ret
+
+//VOID
+//EFIAPI
+//ArmGicV3SetControlSystemRegisterEnable (
+// IN UINT32 ControlSystemRegisterEnable
+// );
+ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable)
+ EL1_OR_EL2_OR_EL3(x1)
+1: msr ICC_SRE_EL1, x0
+ b 4f
+2: msr ICC_SRE_EL2, x0
+ b 4f
+3: msr ICC_SRE_EL3, x0
+4: isb
+ ret
+
+//VOID
+//ArmGicV3EnableInterruptInterface (
+// VOID
+// );
+ASM_FUNC(ArmGicV3EnableInterruptInterface)
+ mov x0, #1
+ msr ICC_IGRPEN1_EL1, x0
+ ret
+
+//VOID
+//ArmGicV3DisableInterruptInterface (
+// VOID
+// );
+ASM_FUNC(ArmGicV3DisableInterruptInterface)
+ mov x0, #0
+ msr ICC_IGRPEN1_EL1, x0
+ ret
+
+//VOID
+//ArmGicV3EndOfInterrupt (
+// IN UINTN InterruptId
+// );
+ASM_FUNC(ArmGicV3EndOfInterrupt)
+ msr ICC_EOIR1_EL1, x0
+ ret
+
+//UINTN
+//ArmGicV3AcknowledgeInterrupt (
+// VOID
+// );
+ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
+ mrs x0, ICC_IAR1_EL1
+ ret
+
+//VOID
+//ArmGicV3SetPriorityMask (
+// IN UINTN Priority
+// );
+ASM_FUNC(ArmGicV3SetPriorityMask)
+ msr ICC_PMR_EL1, x0
+ ret
+
+//VOID
+//ArmGicV3SetBinaryPointer (
+// IN UINTN BinaryPoint
+// );
+ASM_FUNC(ArmGicV3SetBinaryPointer)
+ msr ICC_BPR1_EL1, x0
+ ret
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S new file mode 100644 index 000000000..8c43a613d --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S @@ -0,0 +1,80 @@ +#
+# Copyright (c) 2014, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+#include <AsmMacroIoLib.h>
+#include <Library/ArmLib.h>
+
+// For the moment we assume this will run in SVC mode on ARMv7
+
+//UINT32
+//EFIAPI
+//ArmGicGetControlSystemRegisterEnable (
+// VOID
+// );
+ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable)
+ mrc p15, 0, r0, c12, c12, 5 // ICC_SRE
+ bx lr
+
+//VOID
+//EFIAPI
+//ArmGicSetControlSystemRegisterEnable (
+// IN UINT32 ControlSystemRegisterEnable
+// );
+ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable)
+ mcr p15, 0, r0, c12, c12, 5 // ICC_SRE
+ isb
+ bx lr
+
+//VOID
+//ArmGicV3EnableInterruptInterface (
+// VOID
+// );
+ASM_FUNC(ArmGicV3EnableInterruptInterface)
+ mov r0, #1
+ mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
+ bx lr
+
+//VOID
+//ArmGicV3DisableInterruptInterface (
+// VOID
+// );
+ASM_FUNC(ArmGicV3DisableInterruptInterface)
+ mov r0, #0
+ mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
+ bx lr
+
+//VOID
+//ArmGicV3EndOfInterrupt (
+// IN UINTN InterruptId
+// );
+ASM_FUNC(ArmGicV3EndOfInterrupt)
+ mcr p15, 0, r0, c12, c12, 1 //ICC_EOIR1
+ bx lr
+
+//UINTN
+//ArmGicV3AcknowledgeInterrupt (
+// VOID
+// );
+ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
+ mrc p15, 0, r0, c12, c12, 0 //ICC_IAR1
+ bx lr
+
+//VOID
+//ArmGicV3SetPriorityMask (
+// IN UINTN Priority
+// );
+ASM_FUNC(ArmGicV3SetPriorityMask)
+ mcr p15, 0, r0, c4, c6, 0 //ICC_PMR
+ bx lr
+
+//VOID
+//ArmGicV3SetBinaryPointer (
+// IN UINTN BinaryPoint
+// );
+ASM_FUNC(ArmGicV3SetBinaryPointer)
+ mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1
+ bx lr
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm new file mode 100644 index 000000000..bf79c1350 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm @@ -0,0 +1,82 @@ +//
+// Copyright (c) 2014, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+// For the moment we assume this will run in SVC mode on ARMv7
+
+
+ INCLUDE AsmMacroExport.inc
+
+//UINT32
+//EFIAPI
+//ArmGicGetControlSystemRegisterEnable (
+// VOID
+// );
+ RVCT_ASM_EXPORT ArmGicV3GetControlSystemRegisterEnable
+ mrc p15, 0, r0, c12, c12, 5 // ICC_SRE
+ bx lr
+
+//VOID
+//EFIAPI
+//ArmGicSetControlSystemRegisterEnable (
+// IN UINT32 ControlSystemRegisterEnable
+// );
+ RVCT_ASM_EXPORT ArmGicV3SetControlSystemRegisterEnable
+ mcr p15, 0, r0, c12, c12, 5 // ICC_SRE
+ isb
+ bx lr
+
+//VOID
+//ArmGicV3EnableInterruptInterface (
+// VOID
+// );
+ RVCT_ASM_EXPORT ArmGicV3EnableInterruptInterface
+ mov r0, #1
+ mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
+ bx lr
+
+//VOID
+//ArmGicV3DisableInterruptInterface (
+// VOID
+// );
+ RVCT_ASM_EXPORT ArmGicV3DisableInterruptInterface
+ mov r0, #0
+ mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
+ bx lr
+
+//VOID
+//ArmGicV3EndOfInterrupt (
+// IN UINTN InterruptId
+// );
+ RVCT_ASM_EXPORT ArmGicV3EndOfInterrupt
+ mcr p15, 0, r0, c12, c12, 1 //ICC_EOIR1
+ bx lr
+
+//UINTN
+//ArmGicV3AcknowledgeInterrupt (
+// VOID
+// );
+ RVCT_ASM_EXPORT ArmGicV3AcknowledgeInterrupt
+ mrc p15, 0, r0, c12, c12, 0 //ICC_IAR1
+ bx lr
+
+//VOID
+//ArmGicV3SetPriorityMask (
+// IN UINTN Priority
+// );
+ RVCT_ASM_EXPORT ArmGicV3SetPriorityMask
+ mcr p15, 0, r0, c4, c6, 0 //ICC_PMR
+ bx lr
+
+//VOID
+//ArmGicV3SetBinaryPointer (
+// IN UINTN BinaryPoint
+// );
+ RVCT_ASM_EXPORT ArmGicV3SetBinaryPointer
+ mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1
+ bx lr
+
+ END
diff --git a/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c new file mode 100644 index 000000000..d7da1f198 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c @@ -0,0 +1,491 @@ +/** @file
+*
+* Copyright (c) 2011-2018, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/ArmGicLib.h>
+
+#include "ArmGicDxe.h"
+
+#define ARM_GIC_DEFAULT_PRIORITY 0x80
+
+extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol;
+extern EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V3Protocol;
+
+STATIC UINTN mGicDistributorBase;
+STATIC UINTN mGicRedistributorsBase;
+
+/**
+ Enable interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt enabled.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV3EnableInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ if (Source >= mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ ArmGicEnableInterrupt (mGicDistributorBase, mGicRedistributorsBase, Source);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Disable interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt disabled.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV3DisableInterruptSource (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ if (Source >= mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ ArmGicDisableInterrupt (mGicDistributorBase, mGicRedistributorsBase, Source);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Return current state of interrupt source Source.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+ @param InterruptState TRUE: source enabled, FALSE: source disabled.
+
+ @retval EFI_SUCCESS InterruptState is valid
+ @retval EFI_DEVICE_ERROR InterruptState is not valid
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV3GetInterruptSourceState (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN BOOLEAN *InterruptState
+ )
+{
+ if (Source >= mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ *InterruptState = ArmGicIsInterruptEnabled (
+ mGicDistributorBase,
+ mGicRedistributorsBase,
+ Source
+ );
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Signal to the hardware that the End Of Interrupt state
+ has been reached.
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt
+
+ @retval EFI_SUCCESS Source interrupt EOI'ed.
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV3EndOfInterrupt (
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source
+ )
+{
+ if (Source >= mGicNumInterrupts) {
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ ArmGicV3EndOfInterrupt (Source);
+ return EFI_SUCCESS;
+}
+
+/**
+ EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
+
+ @param InterruptType Defines the type of interrupt or exception that
+ occurred on the processor. This parameter is
+ processor architecture specific.
+ @param SystemContext A pointer to the processor context when
+ the interrupt occurred on the processor.
+
+ @return None
+
+**/
+STATIC
+VOID
+EFIAPI
+GicV3IrqInterruptHandler (
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ UINT32 GicInterrupt;
+ HARDWARE_INTERRUPT_HANDLER InterruptHandler;
+
+ GicInterrupt = ArmGicV3AcknowledgeInterrupt ();
+
+ // Special Interrupts (ID1020-ID1023) have an Interrupt ID greater than the
+ // number of interrupt (ie: Spurious interrupt).
+ if ((GicInterrupt & ARM_GIC_ICCIAR_ACKINTID) >= mGicNumInterrupts) {
+ // The special interrupt do not need to be acknowledge
+ return;
+ }
+
+ InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt];
+ if (InterruptHandler != NULL) {
+ // Call the registered interrupt handler.
+ InterruptHandler (GicInterrupt, SystemContext);
+ } else {
+ DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
+ GicV3EndOfInterrupt (&gHardwareInterruptV3Protocol, GicInterrupt);
+ }
+}
+
+// The protocol instance produced by this driver
+EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol = {
+ RegisterInterruptSource,
+ GicV3EnableInterruptSource,
+ GicV3DisableInterruptSource,
+ GicV3GetInterruptSourceState,
+ GicV3EndOfInterrupt
+};
+
+/**
+ Get interrupt trigger type of an interrupt
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt.
+ @param TriggerType Returns interrupt trigger type.
+
+ @retval EFI_SUCCESS Source interrupt supported.
+ @retval EFI_UNSUPPORTED Source interrupt is not supported.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV3GetTriggerType (
+ IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ OUT EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE *TriggerType
+ )
+{
+ UINTN RegAddress;
+ UINTN Config1Bit;
+ EFI_STATUS Status;
+
+ Status = GicGetDistributorIcfgBaseAndBit (
+ Source,
+ &RegAddress,
+ &Config1Bit
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ if ((MmioRead32 (RegAddress) & (1 << Config1Bit)) == 0) {
+ *TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH;
+ } else {
+ *TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Set interrupt trigger type of an interrupt
+
+ @param This Instance pointer for this protocol
+ @param Source Hardware source of the interrupt.
+ @param TriggerType Interrupt trigger type.
+
+ @retval EFI_SUCCESS Source interrupt supported.
+ @retval EFI_UNSUPPORTED Source interrupt is not supported.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GicV3SetTriggerType (
+ IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This,
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE TriggerType
+ )
+{
+ UINTN RegAddress;
+ UINTN Config1Bit;
+ UINT32 Value;
+ EFI_STATUS Status;
+ BOOLEAN SourceEnabled;
+
+ if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
+ && (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
+ DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
+ TriggerType));
+ ASSERT (FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ Status = GicGetDistributorIcfgBaseAndBit (
+ Source,
+ &RegAddress,
+ &Config1Bit
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = GicV3GetInterruptSourceState (
+ (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+ Source,
+ &SourceEnabled
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Value = (TriggerType == EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
+ ? ARM_GIC_ICDICFR_EDGE_TRIGGERED
+ : ARM_GIC_ICDICFR_LEVEL_TRIGGERED;
+
+ // Before changing the value, we must disable the interrupt,
+ // otherwise GIC behavior is UNPREDICTABLE.
+ if (SourceEnabled) {
+ GicV3DisableInterruptSource (
+ (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+ Source
+ );
+ }
+
+ MmioAndThenOr32 (
+ RegAddress,
+ ~(0x1 << Config1Bit),
+ Value << Config1Bit
+ );
+ // Restore interrupt state
+ if (SourceEnabled) {
+ GicV3EnableInterruptSource (
+ (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
+ Source
+ );
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V3Protocol = {
+ (HARDWARE_INTERRUPT2_REGISTER)RegisterInterruptSource,
+ (HARDWARE_INTERRUPT2_ENABLE)GicV3EnableInterruptSource,
+ (HARDWARE_INTERRUPT2_DISABLE)GicV3DisableInterruptSource,
+ (HARDWARE_INTERRUPT2_INTERRUPT_STATE)GicV3GetInterruptSourceState,
+ (HARDWARE_INTERRUPT2_END_OF_INTERRUPT)GicV3EndOfInterrupt,
+ GicV3GetTriggerType,
+ GicV3SetTriggerType
+};
+
+/**
+ Shutdown our hardware
+
+ DXE Core will disable interrupts and turn off the timer and disable interrupts
+ after all the event handlers have run.
+
+ @param[in] Event The Event that is being processed
+ @param[in] Context Event Context
+**/
+VOID
+EFIAPI
+GicV3ExitBootServicesEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ UINTN Index;
+
+ // Acknowledge all pending interrupts
+ for (Index = 0; Index < mGicNumInterrupts; Index++) {
+ GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index);
+ }
+
+ for (Index = 0; Index < mGicNumInterrupts; Index++) {
+ GicV3EndOfInterrupt (&gHardwareInterruptV3Protocol, Index);
+ }
+
+ // Disable Gic Interface
+ ArmGicV3DisableInterruptInterface ();
+
+ // Disable Gic Distributor
+ ArmGicDisableDistributor (mGicDistributorBase);
+}
+
+/**
+ Initialize the state information for the CPU Architectural Protocol
+
+ @param ImageHandle of the loaded driver
+ @param SystemTable Pointer to the System Table
+
+ @retval EFI_SUCCESS Protocol registered
+ @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
+ @retval EFI_DEVICE_ERROR Hardware problems
+
+**/
+EFI_STATUS
+GicV3DxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ UINT32 RegOffset;
+ UINTN RegShift;
+ UINT64 CpuTarget;
+ UINT64 MpId;
+
+ // Make sure the Interrupt Controller Protocol is not already installed in
+ // the system.
+ ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
+
+ mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);
+ mGicRedistributorsBase = PcdGet64 (PcdGicRedistributorsBase);
+ mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
+
+ // We will be driving this GIC in native v3 mode, i.e., with Affinity
+ // Routing enabled. So ensure that the ARE bit is set.
+ if (!FeaturePcdGet (PcdArmGicV3WithV2Legacy)) {
+ MmioOr32 (mGicDistributorBase + ARM_GIC_ICDDCR, ARM_GIC_ICDDCR_ARE);
+ }
+
+ for (Index = 0; Index < mGicNumInterrupts; Index++) {
+ GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index);
+
+ // Set Priority
+ RegOffset = Index / 4;
+ RegShift = (Index % 4) * 8;
+ MmioAndThenOr32 (
+ mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
+ ~(0xff << RegShift),
+ ARM_GIC_DEFAULT_PRIORITY << RegShift
+ );
+ }
+
+ // Targets the interrupts to the Primary Cpu
+
+ if (FeaturePcdGet (PcdArmGicV3WithV2Legacy)) {
+ // Only Primary CPU will run this code. We can identify our GIC CPU ID by
+ // reading the GIC Distributor Target register. The 8 first
+ // GICD_ITARGETSRn are banked to each connected CPU. These 8 registers
+ // hold the CPU targets fields for interrupts 0-31. More Info in the GIC
+ // Specification about "Interrupt Processor Targets Registers"
+
+ // Read the first Interrupt Processor Targets Register (that corresponds
+ // to the 4 first SGIs)
+ CpuTarget = MmioRead32 (mGicDistributorBase + ARM_GIC_ICDIPTR);
+
+ // The CPU target is a bit field mapping each CPU to a GIC CPU Interface.
+ // This value is 0 when we run on a uniprocessor platform.
+ if (CpuTarget != 0) {
+ // The 8 first Interrupt Processor Targets Registers are read-only
+ for (Index = 8; Index < (mGicNumInterrupts / 4); Index++) {
+ MmioWrite32 (
+ mGicDistributorBase + ARM_GIC_ICDIPTR + (Index * 4),
+ CpuTarget
+ );
+ }
+ }
+ } else {
+ MpId = ArmReadMpidr ();
+ CpuTarget = MpId &
+ (ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2 | ARM_CORE_AFF3);
+
+ if ((MmioRead32 (
+ mGicDistributorBase + ARM_GIC_ICDDCR
+ ) & ARM_GIC_ICDDCR_DS) != 0) {
+
+ // If the Disable Security (DS) control bit is set, we are dealing with a
+ // GIC that has only one security state. In this case, let's assume we are
+ // executing in non-secure state (which is appropriate for DXE modules)
+ // and that no other firmware has performed any configuration on the GIC.
+ // This means we need to reconfigure all interrupts to non-secure Group 1
+ // first.
+
+ MmioWrite32 (
+ mGicRedistributorsBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDISR,
+ 0xffffffff
+ );
+
+ for (Index = 32; Index < mGicNumInterrupts; Index += 32) {
+ MmioWrite32 (
+ mGicDistributorBase + ARM_GIC_ICDISR + Index / 8,
+ 0xffffffff
+ );
+ }
+ }
+
+ // Route the SPIs to the primary CPU. SPIs start at the INTID 32
+ for (Index = 0; Index < (mGicNumInterrupts - 32); Index++) {
+ MmioWrite64 (
+ mGicDistributorBase + ARM_GICD_IROUTER + (Index * 8),
+ CpuTarget
+ );
+ }
+ }
+
+ // Set binary point reg to 0x7 (no preemption)
+ ArmGicV3SetBinaryPointer (0x7);
+
+ // Set priority mask reg to 0xff to allow all priorities through
+ ArmGicV3SetPriorityMask (0xff);
+
+ // Enable gic cpu interface
+ ArmGicV3EnableInterruptInterface ();
+
+ // Enable gic distributor
+ ArmGicEnableDistributor (mGicDistributorBase);
+
+ Status = InstallAndRegisterInterruptService (
+ &gHardwareInterruptV3Protocol,
+ &gHardwareInterrupt2V3Protocol,
+ GicV3IrqInterruptHandler,
+ GicV3ExitBootServicesEvent
+ );
+
+ return Status;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c b/roms/edk2/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c new file mode 100644 index 000000000..d8625e159 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c @@ -0,0 +1,553 @@ +/** @file
+ Produces the CPU I/O 2 Protocol.
+
+Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiDxe.h>
+
+#include <Protocol/CpuIo2.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#define MAX_IO_PORT_ADDRESS 0xFFFF
+
+//
+// Handle for the CPU I/O 2 Protocol
+//
+STATIC EFI_HANDLE mHandle = NULL;
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8 mInStride[] = {
+ 1, // EfiCpuIoWidthUint8
+ 2, // EfiCpuIoWidthUint16
+ 4, // EfiCpuIoWidthUint32
+ 8, // EfiCpuIoWidthUint64
+ 0, // EfiCpuIoWidthFifoUint8
+ 0, // EfiCpuIoWidthFifoUint16
+ 0, // EfiCpuIoWidthFifoUint32
+ 0, // EfiCpuIoWidthFifoUint64
+ 1, // EfiCpuIoWidthFillUint8
+ 2, // EfiCpuIoWidthFillUint16
+ 4, // EfiCpuIoWidthFillUint32
+ 8 // EfiCpuIoWidthFillUint64
+};
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8 mOutStride[] = {
+ 1, // EfiCpuIoWidthUint8
+ 2, // EfiCpuIoWidthUint16
+ 4, // EfiCpuIoWidthUint32
+ 8, // EfiCpuIoWidthUint64
+ 1, // EfiCpuIoWidthFifoUint8
+ 2, // EfiCpuIoWidthFifoUint16
+ 4, // EfiCpuIoWidthFifoUint32
+ 8, // EfiCpuIoWidthFifoUint64
+ 0, // EfiCpuIoWidthFillUint8
+ 0, // EfiCpuIoWidthFillUint16
+ 0, // EfiCpuIoWidthFillUint32
+ 0 // EfiCpuIoWidthFillUint64
+};
+
+/**
+ Check parameters to a CPU I/O 2 Protocol service request.
+
+ The I/O operations are carried out exactly as requested. The caller is responsible
+ for satisfying any alignment and I/O width restrictions that a PI System on a
+ platform might require. For example on some platforms, width requests of
+ EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
+ be handled by the driver.
+
+ @param[in] MmioOperation TRUE for an MMIO operation, FALSE for I/O Port operation.
+ @param[in] Width Signifies the width of the I/O or Memory operation.
+ @param[in] Address The base address of the I/O operation.
+ @param[in] Count The number of I/O operations to perform. The number of
+ bytes moved is Width size * Count, starting at Address.
+ @param[in] Buffer For read operations, the destination buffer to store the results.
+ For write operations, the source buffer from which to write data.
+
+ @retval EFI_SUCCESS The parameters for this request pass the checks.
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.
+ @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
+ @retval EFI_UNSUPPORTED The address range specified by Address, Width,
+ and Count is not valid for this PI system.
+
+**/
+STATIC
+EFI_STATUS
+CpuIoCheckParameter (
+ IN BOOLEAN MmioOperation,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ UINT64 MaxCount;
+ UINT64 Limit;
+
+ //
+ // Check to see if Buffer is NULL
+ //
+ if (Buffer == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Check to see if Width is in the valid range
+ //
+ if ((UINT32)Width >= EfiCpuIoWidthMaximum) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // For FIFO type, the target address won't increase during the access,
+ // so treat Count as 1
+ //
+ if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
+ Count = 1;
+ }
+
+ //
+ // Check to see if Width is in the valid range for I/O Port operations
+ //
+ Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+ if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Check to see if Address is aligned
+ //
+ if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Check to see if any address associated with this transfer exceeds the maximum
+ // allowed address. The maximum address implied by the parameters passed in is
+ // Address + Size * Count. If the following condition is met, then the transfer
+ // is not supported.
+ //
+ // Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1
+ //
+ // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
+ // can also be the maximum integer value supported by the CPU, this range
+ // check must be adjusted to avoid all overflow conditions.
+ //
+ // The following form of the range check is equivalent but assumes that
+ // MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
+ //
+ Limit = (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS);
+ if (Count == 0) {
+ if (Address > Limit) {
+ return EFI_UNSUPPORTED;
+ }
+ } else {
+ MaxCount = RShiftU64 (Limit, Width);
+ if (MaxCount < (Count - 1)) {
+ return EFI_UNSUPPORTED;
+ }
+ if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
+ return EFI_UNSUPPORTED;
+ }
+ }
+
+ //
+ // Check to see if Buffer is aligned
+ //
+ if (((UINTN)Buffer & ((MIN (sizeof (UINTN), mInStride[Width]) - 1))) != 0) {
+ return EFI_UNSUPPORTED;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Reads memory-mapped registers.
+
+ The I/O operations are carried out exactly as requested. The caller is responsible
+ for satisfying any alignment and I/O width restrictions that a PI System on a
+ platform might require. For example on some platforms, width requests of
+ EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
+ be handled by the driver.
+
+ If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
+ or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
+ each of the Count operations that is performed.
+
+ If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
+ EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
+ incremented for each of the Count operations that is performed. The read or
+ write operation is performed Count times on the same Address.
+
+ If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
+ EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
+ incremented for each of the Count operations that is performed. The read or
+ write operation is performed Count times from the first element of Buffer.
+
+ @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
+ @param[in] Width Signifies the width of the I/O or Memory operation.
+ @param[in] Address The base address of the I/O operation.
+ @param[in] Count The number of I/O operations to perform. The number of
+ bytes moved is Width size * Count, starting at Address.
+ @param[out] Buffer For read operations, the destination buffer to store the results.
+ For write operations, the source buffer from which to write data.
+
+ @retval EFI_SUCCESS The data was read from or written to the PI system.
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.
+ @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
+ @retval EFI_UNSUPPORTED The address range specified by Address, Width,
+ and Count is not valid for this PI system.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CpuMemoryServiceRead (
+ IN EFI_CPU_IO2_PROTOCOL *This,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+ UINT8 InStride;
+ UINT8 OutStride;
+ EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
+ UINT8 *Uint8Buffer;
+
+ Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Select loop based on the width of the transfer
+ //
+ InStride = mInStride[Width];
+ OutStride = mOutStride[Width];
+ OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+ for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
+ if (OperationWidth == EfiCpuIoWidthUint8) {
+ *Uint8Buffer = MmioRead8 ((UINTN)Address);
+ } else if (OperationWidth == EfiCpuIoWidthUint16) {
+ *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address);
+ } else if (OperationWidth == EfiCpuIoWidthUint32) {
+ *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address);
+ } else if (OperationWidth == EfiCpuIoWidthUint64) {
+ *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+/**
+ Writes memory-mapped registers.
+
+ The I/O operations are carried out exactly as requested. The caller is responsible
+ for satisfying any alignment and I/O width restrictions that a PI System on a
+ platform might require. For example on some platforms, width requests of
+ EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
+ be handled by the driver.
+
+ If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
+ or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
+ each of the Count operations that is performed.
+
+ If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
+ EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
+ incremented for each of the Count operations that is performed. The read or
+ write operation is performed Count times on the same Address.
+
+ If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
+ EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
+ incremented for each of the Count operations that is performed. The read or
+ write operation is performed Count times from the first element of Buffer.
+
+ @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
+ @param[in] Width Signifies the width of the I/O or Memory operation.
+ @param[in] Address The base address of the I/O operation.
+ @param[in] Count The number of I/O operations to perform. The number of
+ bytes moved is Width size * Count, starting at Address.
+ @param[in] Buffer For read operations, the destination buffer to store the results.
+ For write operations, the source buffer from which to write data.
+
+ @retval EFI_SUCCESS The data was read from or written to the PI system.
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.
+ @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
+ @retval EFI_UNSUPPORTED The address range specified by Address, Width,
+ and Count is not valid for this PI system.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CpuMemoryServiceWrite (
+ IN EFI_CPU_IO2_PROTOCOL *This,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+ UINT8 InStride;
+ UINT8 OutStride;
+ EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
+ UINT8 *Uint8Buffer;
+
+ Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Select loop based on the width of the transfer
+ //
+ InStride = mInStride[Width];
+ OutStride = mOutStride[Width];
+ OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+ for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
+ if (OperationWidth == EfiCpuIoWidthUint8) {
+ MmioWrite8 ((UINTN)Address, *Uint8Buffer);
+ } else if (OperationWidth == EfiCpuIoWidthUint16) {
+ MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
+ } else if (OperationWidth == EfiCpuIoWidthUint32) {
+ MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
+ } else if (OperationWidth == EfiCpuIoWidthUint64) {
+ MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+/**
+ Reads I/O registers.
+
+ The I/O operations are carried out exactly as requested. The caller is responsible
+ for satisfying any alignment and I/O width restrictions that a PI System on a
+ platform might require. For example on some platforms, width requests of
+ EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
+ be handled by the driver.
+
+ If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
+ or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
+ each of the Count operations that is performed.
+
+ If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
+ EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
+ incremented for each of the Count operations that is performed. The read or
+ write operation is performed Count times on the same Address.
+
+ If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
+ EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
+ incremented for each of the Count operations that is performed. The read or
+ write operation is performed Count times from the first element of Buffer.
+
+ @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
+ @param[in] Width Signifies the width of the I/O or Memory operation.
+ @param[in] Address The base address of the I/O operation.
+ @param[in] Count The number of I/O operations to perform. The number of
+ bytes moved is Width size * Count, starting at Address.
+ @param[out] Buffer For read operations, the destination buffer to store the results.
+ For write operations, the source buffer from which to write data.
+
+ @retval EFI_SUCCESS The data was read from or written to the PI system.
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.
+ @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
+ @retval EFI_UNSUPPORTED The address range specified by Address, Width,
+ and Count is not valid for this PI system.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CpuIoServiceRead (
+ IN EFI_CPU_IO2_PROTOCOL *This,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+ UINT8 InStride;
+ UINT8 OutStride;
+ EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
+ UINT8 *Uint8Buffer;
+
+ Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Address += PcdGet64 (PcdPciIoTranslation);
+
+ //
+ // Select loop based on the width of the transfer
+ //
+ InStride = mInStride[Width];
+ OutStride = mOutStride[Width];
+ OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+
+ for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
+ if (OperationWidth == EfiCpuIoWidthUint8) {
+ *Uint8Buffer = MmioRead8 ((UINTN)Address);
+ } else if (OperationWidth == EfiCpuIoWidthUint16) {
+ *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address);
+ } else if (OperationWidth == EfiCpuIoWidthUint32) {
+ *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address);
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Write I/O registers.
+
+ The I/O operations are carried out exactly as requested. The caller is responsible
+ for satisfying any alignment and I/O width restrictions that a PI System on a
+ platform might require. For example on some platforms, width requests of
+ EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
+ be handled by the driver.
+
+ If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
+ or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
+ each of the Count operations that is performed.
+
+ If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
+ EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
+ incremented for each of the Count operations that is performed. The read or
+ write operation is performed Count times on the same Address.
+
+ If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
+ EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
+ incremented for each of the Count operations that is performed. The read or
+ write operation is performed Count times from the first element of Buffer.
+
+ @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
+ @param[in] Width Signifies the width of the I/O or Memory operation.
+ @param[in] Address The base address of the I/O operation.
+ @param[in] Count The number of I/O operations to perform. The number of
+ bytes moved is Width size * Count, starting at Address.
+ @param[in] Buffer For read operations, the destination buffer to store the results.
+ For write operations, the source buffer from which to write data.
+
+ @retval EFI_SUCCESS The data was read from or written to the PI system.
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.
+ @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
+ @retval EFI_UNSUPPORTED The address range specified by Address, Width,
+ and Count is not valid for this PI system.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CpuIoServiceWrite (
+ IN EFI_CPU_IO2_PROTOCOL *This,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+ UINT8 InStride;
+ UINT8 OutStride;
+ EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
+ UINT8 *Uint8Buffer;
+
+ //
+ // Make sure the parameters are valid
+ //
+ Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Address += PcdGet64 (PcdPciIoTranslation);
+
+ //
+ // Select loop based on the width of the transfer
+ //
+ InStride = mInStride[Width];
+ OutStride = mOutStride[Width];
+ OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+
+ for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
+ if (OperationWidth == EfiCpuIoWidthUint8) {
+ MmioWrite8 ((UINTN)Address, *Uint8Buffer);
+ } else if (OperationWidth == EfiCpuIoWidthUint16) {
+ MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
+ } else if (OperationWidth == EfiCpuIoWidthUint32) {
+ MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+//
+// CPU I/O 2 Protocol instance
+//
+STATIC EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
+ {
+ CpuMemoryServiceRead,
+ CpuMemoryServiceWrite
+ },
+ {
+ CpuIoServiceRead,
+ CpuIoServiceWrite
+ }
+};
+
+
+/**
+ The user Entry Point for module CpuIo2Dxe. The user code starts with this function.
+
+ @param[in] ImageHandle The firmware allocated handle for the EFI image.
+ @param[in] SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The entry point is executed successfully.
+ @retval other Some error occurs when executing this entry point.
+
+**/
+EFI_STATUS
+EFIAPI
+ArmPciCpuIo2Initialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiCpuIo2ProtocolGuid);
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &mHandle,
+ &gEfiCpuIo2ProtocolGuid, &mCpuIo2,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf b/roms/edk2/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf new file mode 100644 index 000000000..2bc4571d0 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf @@ -0,0 +1,47 @@ +## @file
+# Produces the CPU I/O 2 Protocol by using the services of the I/O Library.
+#
+# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmPciCpuIo2Dxe
+ FILE_GUID = 168D1A6E-F4A5-448A-9E95-795661BB3067
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = ArmPciCpuIo2Initialize
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ARM AARCH64
+#
+
+[Sources]
+ ArmPciCpuIo2Dxe.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ UefiDriverEntryPoint
+ BaseLib
+ DebugLib
+ IoLib
+ PcdLib
+ UefiBootServicesTableLib
+
+[Pcd]
+ gArmTokenSpaceGuid.PcdPciIoTranslation
+
+[Protocols]
+ gEfiCpuIo2ProtocolGuid ## PRODUCES
+
+[Depex]
+ TRUE
diff --git a/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiBaseProtocolPrivate.h b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiBaseProtocolPrivate.h new file mode 100644 index 000000000..b99ec465b --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiBaseProtocolPrivate.h @@ -0,0 +1,40 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#ifndef ARM_SCMI_BASE_PROTOCOL_PRIVATE_H_
+#define ARM_SCMI_BASE_PROTOCOL_PRIVATE_H_
+
+// Return values of BASE_DISCOVER_LIST_PROTOCOLS command.
+typedef struct {
+ UINT32 NumProtocols;
+
+ // Array of four protocols in each element
+ // Total elements = 1 + (NumProtocols-1)/4
+
+ // NOTE: Since EDK2 does not allow flexible array member [] we declare
+ // here array of 1 element length. However below is used as a variable
+ // length array.
+ UINT8 Protocols[1];
+} BASE_DISCOVER_LIST;
+
+/** Initialize Base protocol and install protocol on a given handle.
+
+ @param[in] Handle Handle to install Base protocol.
+
+ @retval EFI_SUCCESS Base protocol interface installed
+ successfully.
+**/
+EFI_STATUS
+ScmiBaseProtocolInit (
+ IN OUT EFI_HANDLE* Handle
+ );
+
+#endif /* ARM_SCMI_BASE_PROTOCOL_PRIVATE_H_ */
diff --git a/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiClockProtocolPrivate.h b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiClockProtocolPrivate.h new file mode 100644 index 000000000..43cc3bff8 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiClockProtocolPrivate.h @@ -0,0 +1,85 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#ifndef ARM_SCMI_CLOCK_PROTOCOL_PRIVATE_H_
+#define ARM_SCMI_CLOCK_PROTOCOL_PRIVATE_H_
+
+#pragma pack(1)
+
+// Clock rate in two 32bit words.
+typedef struct {
+ UINT32 Low;
+ UINT32 High;
+} CLOCK_RATE_DWORD;
+
+// Format of the returned rate array. Linear or Non-linear,.RatesFlag Bit[12]
+#define RATE_FORMAT_SHIFT 12
+#define RATE_FORMAT_MASK 0x0001
+#define RATE_FORMAT(RatesFlags) ((RatesFlags >> RATE_FORMAT_SHIFT) \
+ & RATE_FORMAT_MASK)
+
+// Number of remaining rates after a call to the SCP, RatesFlag Bits[31:16]
+#define NUM_REMAIN_RATES_SHIFT 16
+#define NUM_REMAIN_RATES(RatesFlags) ((RatesFlags >> NUM_REMAIN_RATES_SHIFT))
+
+// Number of rates that are returned by a call.to the SCP, RatesFlag Bits[11:0]
+#define NUM_RATES_MASK 0x0FFF
+#define NUM_RATES(RatesFlags) (RatesFlags & NUM_RATES_MASK)
+
+// Return values for the CLOCK_DESCRIBER_RATE command.
+typedef struct {
+ UINT32 NumRatesFlags;
+
+ // NOTE: Since EDK2 does not allow flexible array member [] we declare
+ // here array of 1 element length. However below is used as a variable
+ // length array.
+ CLOCK_RATE_DWORD Rates[1];
+} CLOCK_DESCRIBE_RATES;
+
+#define CLOCK_SET_DEFAULT_FLAGS 0
+
+// Message parameters for CLOCK_RATE_SET command.
+typedef struct {
+ UINT32 Flags;
+ UINT32 ClockId;
+ CLOCK_RATE_DWORD Rate;
+} CLOCK_RATE_SET_ATTRIBUTES;
+
+
+// Message parameters for CLOCK_CONFIG_SET command.
+typedef struct {
+ UINT32 ClockId;
+ UINT32 Attributes;
+} CLOCK_CONFIG_SET_ATTRIBUTES;
+
+// if ClockAttr Bit[0] is set then clock device is enabled.
+#define CLOCK_ENABLE_MASK 0x1
+#define CLOCK_ENABLED(ClockAttr) ((ClockAttr & CLOCK_ENABLE_MASK) == 1)
+
+typedef struct {
+ UINT32 Attributes;
+ UINT8 ClockName[SCMI_MAX_STR_LEN];
+} CLOCK_ATTRIBUTES;
+
+#pragma pack()
+
+/** Initialize clock management protocol and install protocol on a given handle.
+
+ @param[in] Handle Handle to install clock management protocol.
+
+ @retval EFI_SUCCESS Clock protocol interface installed successfully.
+**/
+EFI_STATUS
+ScmiClockProtocolInit (
+ IN EFI_HANDLE *Handle
+ );
+
+#endif /* ARM_SCMI_CLOCK_PROTOCOL_PRIVATE_H_ */
diff --git a/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf new file mode 100644 index 000000000..6cd3aa1c8 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf @@ -0,0 +1,48 @@ +#/** @file
+#
+# Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+# System Control and Management Interface V1.0
+# http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+# DEN0056A_System_Control_and_Management_Interface.pdf
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = ArmScmiDxe
+ FILE_GUID = 9585984C-F027-45E9-AFDF-ADAA6DFAAAC7
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = ArmScmiDxeEntryPoint
+
+[Sources.common]
+ Scmi.c
+ ScmiBaseProtocol.c
+ ScmiClockProtocol.c
+ ScmiDxe.c
+ ScmiPerformanceProtocol.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ ArmLib
+ ArmMtlLib
+ DebugLib
+ IoLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Protocols]
+ gArmScmiBaseProtocolGuid
+ gArmScmiClockProtocolGuid
+ gArmScmiClock2ProtocolGuid
+ gArmScmiPerformanceProtocolGuid
+
+[Depex]
+ TRUE
+
diff --git a/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h new file mode 100644 index 000000000..b274b5ab2 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h @@ -0,0 +1,49 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#ifndef ARM_SCMI_PERFORMANCE_PROTOCOL_PRIVATE_H_
+#define ARM_SCMI_PERFORMANCE_PROTOCOL_PRIVATE_H_
+
+#include <Protocol/ArmScmiPerformanceProtocol.h>
+
+// Number of performance levels returned by a call to the SCP, Lvls Bits[11:0]
+#define NUM_PERF_LEVELS_MASK 0x0FFF
+#define NUM_PERF_LEVELS(Lvls) (Lvls & NUM_PERF_LEVELS_MASK)
+
+// Number of performance levels remaining after a call to the SCP, Lvls Bits[31:16]
+#define NUM_REMAIN_PERF_LEVELS_SHIFT 16
+#define NUM_REMAIN_PERF_LEVELS(Lvls) (Lvls >> NUM_REMAIN_PERF_LEVELS_SHIFT)
+
+/** Return values for SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS command.
+ SCMI Spec section 4.5.2.5
+**/
+typedef struct {
+ UINT32 NumLevels;
+
+ // NOTE: Since EDK2 does not allow flexible array member [] we declare
+ // here array of 1 element length. However below is used as a variable
+ // length array.
+ SCMI_PERFORMANCE_LEVEL PerfLevel[1]; // Offset to array of performance levels
+} PERF_DESCRIBE_LEVELS;
+
+/** Initialize performance management protocol and install on a given Handle.
+
+ @param[in] Handle Handle to install performance management
+ protocol.
+
+ @retval EFI_SUCCESS Performance protocol installed successfully.
+**/
+EFI_STATUS
+ScmiPerformanceProtocolInit (
+ IN EFI_HANDLE* Handle
+ );
+
+#endif /* ARM_SCMI_PERFORMANCE_PROTOCOL_PRIVATE_H_ */
diff --git a/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/Scmi.c b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/Scmi.c new file mode 100644 index 000000000..c4af3ec4e --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/Scmi.c @@ -0,0 +1,251 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#include <Library/ArmMtlLib.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#include "ScmiPrivate.h"
+
+// Arbitrary timeout value 20ms.
+#define RESPONSE_TIMEOUT 20000
+
+/** Return a pointer to the message payload.
+
+ @param[out] Payload Holds pointer to the message payload.
+
+ @retval EFI_SUCCESS Payload holds a valid message payload pointer.
+ @retval EFI_TIMEOUT Time out error if MTL channel is busy.
+ @retval EFI_UNSUPPORTED If MTL channel is unsupported.
+**/
+EFI_STATUS
+ScmiCommandGetPayload (
+ OUT UINT32** Payload
+ )
+{
+ EFI_STATUS Status;
+ MTL_CHANNEL *Channel;
+
+ // Get handle to the Channel.
+ Status = MtlGetChannel (MTL_CHANNEL_TYPE_LOW, &Channel);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // Payload will not be populated until channel is free.
+ Status = MtlWaitUntilChannelFree (Channel, RESPONSE_TIMEOUT);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // Get the address of the payload.
+ *Payload = MtlGetChannelPayload (Channel);
+
+ return EFI_SUCCESS;
+}
+
+/** Execute a SCMI command and receive a response.
+
+ This function uses a MTL channel to transfer message to SCP
+ and waits for a response.
+
+ @param[in] Command Pointer to the SCMI command (Protocol ID
+ and Message ID)
+
+ @param[in,out] PayloadLength SCMI command message length.
+
+ @param[out] OPTIONAL ReturnValues Pointer to SCMI response.
+
+ @retval OUT EFI_SUCCESS Command sent and message received successfully.
+ @retval OUT EFI_UNSUPPORTED Channel not supported.
+ @retval OUT EFI_TIMEOUT Timeout on the channel.
+ @retval OUT EFI_DEVICE_ERROR Channel not ready.
+ @retval OUT EFI_DEVICE_ERROR Message Header corrupted.
+ @retval OUT EFI_DEVICE_ERROR SCMI error.
+**/
+EFI_STATUS
+ScmiCommandExecute (
+ IN SCMI_COMMAND *Command,
+ IN OUT UINT32 *PayloadLength,
+ OUT UINT32 **ReturnValues OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ SCMI_MESSAGE_RESPONSE *Response;
+ UINT32 MessageHeader;
+ UINT32 ResponseHeader;
+ MTL_CHANNEL *Channel;
+
+ ASSERT (PayloadLength != NULL);
+
+ Status = MtlGetChannel (MTL_CHANNEL_TYPE_LOW, &Channel);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // Fill in message header.
+ MessageHeader = SCMI_MESSAGE_HEADER (
+ Command->MessageId,
+ SCMI_MESSAGE_TYPE_COMMAND,
+ Command->ProtocolId
+ );
+
+ // Send payload using MTL channel.
+ Status = MtlSendMessage (
+ Channel,
+ MessageHeader,
+ *PayloadLength
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // Wait for the response on the channel.
+ Status = MtlReceiveMessage (Channel, &ResponseHeader, PayloadLength);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // SCMI must return MessageHeader unmodified.
+ if (MessageHeader != ResponseHeader) {
+ ASSERT (FALSE);
+ return EFI_DEVICE_ERROR;
+ }
+
+ Response = (SCMI_MESSAGE_RESPONSE*)MtlGetChannelPayload (Channel);
+
+ if (Response->Status != SCMI_SUCCESS) {
+ DEBUG ((DEBUG_ERROR, "SCMI error: ProtocolId = 0x%x, MessageId = 0x%x, error = %d\n",
+ Command->ProtocolId,
+ Command->MessageId,
+ Response->Status
+ ));
+
+ ASSERT (FALSE);
+ return EFI_DEVICE_ERROR;
+ }
+
+ if (ReturnValues != NULL) {
+ *ReturnValues = Response->ReturnValues;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/** Internal common function useful for common protocol discovery messages.
+
+ @param[in] ProtocolId Protocol Id of the the protocol.
+ @param[in] MesaageId Message Id of the message.
+
+ @param[out] ReturnValues SCMI response return values.
+
+ @retval EFI_SUCCESS Success with valid return values.
+ @retval EFI_DEVICE_ERROR SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+ScmiProtocolDiscoveryCommon (
+ IN SCMI_PROTOCOL_ID ProtocolId,
+ IN SCMI_MESSAGE_ID MessageId,
+ OUT UINT32 **ReturnValues
+ )
+{
+ SCMI_COMMAND Command;
+ UINT32 PayloadLength = 0;
+
+ Command.ProtocolId = ProtocolId;
+ Command.MessageId = MessageId;
+
+ return ScmiCommandExecute (
+ &Command,
+ &PayloadLength,
+ ReturnValues
+ );
+}
+
+/** Return protocol version from SCP for a given protocol ID.
+
+ @param[in] Protocol ID Protocol ID.
+ @param[out] Version Pointer to version of the protocol.
+
+ @retval EFI_SUCCESS Version holds a valid version received
+ from the SCP.
+ @retval EFI_DEVICE_ERROR SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+ScmiGetProtocolVersion (
+ IN SCMI_PROTOCOL_ID ProtocolId,
+ OUT UINT32 *Version
+ )
+{
+ EFI_STATUS Status;
+ UINT32 *ProtocolVersion;
+
+ Status = ScmiProtocolDiscoveryCommon (
+ ProtocolId,
+ SCMI_MESSAGE_ID_PROTOCOL_VERSION,
+ (UINT32**)&ProtocolVersion
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *Version = *ProtocolVersion;
+
+ return EFI_SUCCESS;
+}
+
+/** Return protocol attributes from SCP for a given protocol ID.
+
+ @param[in] Protocol ID Protocol ID.
+ @param[out] ReturnValues Pointer to attributes of the protocol.
+
+ @retval EFI_SUCCESS ReturnValues points to protocol attributes.
+ @retval EFI_DEVICE_ERROR SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+ScmiGetProtocolAttributes (
+ IN SCMI_PROTOCOL_ID ProtocolId,
+ OUT UINT32 **ReturnValues
+ )
+{
+ return ScmiProtocolDiscoveryCommon (
+ ProtocolId,
+ SCMI_MESSAGE_ID_PROTOCOL_ATTRIBUTES,
+ ReturnValues
+ );
+}
+
+/** Return protocol message attributes from SCP for a given protocol ID.
+
+ @param[in] Protocol ID Protocol ID.
+ @param[out] Attributes Pointer to attributes of the protocol.
+
+ @retval EFI_SUCCESS ReturnValues points to protocol message attributes.
+ @retval EFI_DEVICE_ERROR SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+ScmiGetProtocolMessageAttributes (
+ IN SCMI_PROTOCOL_ID ProtocolId,
+ OUT UINT32 **ReturnValues
+ )
+{
+ return ScmiProtocolDiscoveryCommon (
+ ProtocolId,
+ SCMI_MESSAGE_ID_PROTOCOL_MESSAGE_ATTRIBUTES,
+ ReturnValues
+ );
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c new file mode 100644 index 000000000..d89587f9e --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c @@ -0,0 +1,312 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Protocol/ArmScmiBaseProtocol.h>
+
+#include "ArmScmiBaseProtocolPrivate.h"
+#include "ScmiPrivate.h"
+
+/** Return version of the Base protocol supported by SCP firmware.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] Version Version of the supported SCMI Base protocol.
+
+ @retval EFI_SUCCESS The version of the protocol is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+BaseGetVersion (
+ IN SCMI_BASE_PROTOCOL *This,
+ OUT UINT32 *Version
+ )
+{
+ return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_BASE, Version);
+}
+
+/** Return total number of SCMI protocols supported by the SCP firmware.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] TotalProtocols Total number of SCMI protocols supported.
+
+ @retval EFI_SUCCESS Total number of protocols supported are returned.
+ @retval EFI_DEVICE_ERROR SCP returns a SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+BaseGetTotalProtocols (
+ IN SCMI_BASE_PROTOCOL *This,
+ OUT UINT32 *TotalProtocols
+ )
+{
+ EFI_STATUS Status;
+ UINT32 *ReturnValues;
+
+ Status = ScmiGetProtocolAttributes (SCMI_PROTOCOL_ID_BASE, &ReturnValues);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *TotalProtocols = SCMI_TOTAL_PROTOCOLS (ReturnValues[0]);
+
+ return EFI_SUCCESS;
+}
+
+/** Common function which returns vendor details.
+
+ @param[in] MessageId SCMI_MESSAGE_ID_BASE_DISCOVER_VENDOR
+ OR
+ SCMI_MESSAGE_ID_BASE_DISCOVER_SUB_VENDOR
+
+ @param[out] VendorIdentifier ASCII name of the vendor/subvendor.
+
+ @retval EFI_SUCCESS VendorIdentifier is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+BaseDiscoverVendorDetails (
+ IN SCMI_MESSAGE_ID_BASE MessageId,
+ OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
+ )
+{
+ EFI_STATUS Status;
+ UINT32 *ReturnValues;
+ SCMI_COMMAND Cmd;
+ UINT32 PayloadLength;
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
+ Cmd.MessageId = MessageId;
+
+ PayloadLength = 0;
+
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ &ReturnValues
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ AsciiStrCpyS (
+ (CHAR8*)VendorIdentifier,
+ SCMI_MAX_STR_LEN,
+ (CONST CHAR8*)ReturnValues
+ );
+
+ return EFI_SUCCESS;
+}
+
+/** Return vendor name.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] VendorIdentifier Null terminated ASCII string of up to
+ 16 bytes with a vendor name.
+
+ @retval EFI_SUCCESS VendorIdentifier is returned.
+ @retval EFI_DEVICE_ERROR SCP returns a SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+BaseDiscoverVendor (
+ IN SCMI_BASE_PROTOCOL *This,
+ OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
+ )
+{
+ return BaseDiscoverVendorDetails (
+ SCMI_MESSAGE_ID_BASE_DISCOVER_VENDOR,
+ VendorIdentifier
+ );
+}
+
+/** Return sub vendor name.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] VendorIdentifier Null terminated ASCII string of up to
+ 16 bytes with a sub vendor name.
+
+ @retval EFI_SUCCESS VendorIdentifier is returned.
+ @retval EFI_DEVICE_ERROR SCP returns a SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+BaseDiscoverSubVendor (
+ IN SCMI_BASE_PROTOCOL *This,
+ OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
+ )
+{
+ return BaseDiscoverVendorDetails (
+ SCMI_MESSAGE_ID_BASE_DISCOVER_SUB_VENDOR,
+ VendorIdentifier
+ );
+}
+
+/** Return implementation version.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] ImplementationVersion Vendor specific implementation version.
+
+ @retval EFI_SUCCESS Implementation version is returned.
+ @retval EFI_DEVICE_ERROR SCP returns a SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+BaseDiscoverImplVersion (
+ IN SCMI_BASE_PROTOCOL *This,
+ OUT UINT32 *ImplementationVersion
+ )
+{
+ EFI_STATUS Status;
+ UINT32 *ReturnValues;
+ SCMI_COMMAND Cmd;
+ UINT32 PayloadLength;
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
+ Cmd.MessageId = SCMI_MESSAGE_ID_BASE_DISCOVER_IMPLEMENTATION_VERSION;
+
+ PayloadLength = 0;
+
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ &ReturnValues
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *ImplementationVersion = ReturnValues[0];
+
+ return EFI_SUCCESS;
+}
+
+/** Return list of protocols.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] ProtocolListSize Size of the ProtocolList.
+
+ @param[out] ProtocolList Protocol list.
+
+ @retval EFI_SUCCESS List of protocols is returned.
+ @retval EFI_BUFFER_TOO_SMALL ProtocolListSize is too small for the result.
+ It has been updated to the size needed.
+ @retval EFI_DEVICE_ERROR SCP returns a SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+BaseDiscoverListProtocols (
+ IN SCMI_BASE_PROTOCOL *This,
+ IN OUT UINT32 *ProtocolListSize,
+ OUT UINT8 *ProtocolList
+ )
+{
+ EFI_STATUS Status;
+ UINT32 TotalProtocols;
+ UINT32 *MessageParams;
+ BASE_DISCOVER_LIST *DiscoverList;
+ UINT32 Skip;
+ UINT32 Index;
+ SCMI_COMMAND Cmd;
+ UINT32 PayloadLength;
+ UINT32 RequiredSize;
+
+ Status = BaseGetTotalProtocols (This, &TotalProtocols);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = ScmiCommandGetPayload (&MessageParams);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ RequiredSize = sizeof (UINT8) * TotalProtocols;
+ if (*ProtocolListSize < RequiredSize) {
+ *ProtocolListSize = RequiredSize;
+ return EFI_BUFFER_TOO_SMALL;
+ }
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
+ Cmd.MessageId = SCMI_MESSAGE_ID_BASE_DISCOVER_LIST_PROTOCOLS;
+
+ Skip = 0;
+
+ while (Skip < TotalProtocols) {
+
+ *MessageParams = Skip;
+
+ // Note PayloadLength is a IN/OUT parameter.
+ PayloadLength = sizeof (Skip);
+
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ (UINT32**)&DiscoverList
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ for (Index = 0; Index < DiscoverList->NumProtocols; Index++) {
+ ProtocolList[Skip++] = DiscoverList->Protocols[Index];
+ }
+ }
+
+ *ProtocolListSize = RequiredSize;
+
+ return EFI_SUCCESS;
+}
+
+// Instance of the SCMI Base protocol.
+STATIC CONST SCMI_BASE_PROTOCOL BaseProtocol = {
+ BaseGetVersion,
+ BaseGetTotalProtocols,
+ BaseDiscoverVendor,
+ BaseDiscoverSubVendor,
+ BaseDiscoverImplVersion,
+ BaseDiscoverListProtocols
+};
+
+/** Initialize Base protocol and install protocol on a given handle.
+
+ @param[in] Handle Handle to install Base protocol.
+
+ @retval EFI_SUCCESS Base protocol interface installed
+ successfully.
+**/
+EFI_STATUS
+ScmiBaseProtocolInit (
+ IN OUT EFI_HANDLE* Handle
+ )
+{
+ return gBS->InstallMultipleProtocolInterfaces (
+ Handle,
+ &gArmScmiBaseProtocolGuid,
+ &BaseProtocol,
+ NULL
+ );
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c new file mode 100644 index 000000000..ac0d21d86 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c @@ -0,0 +1,474 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Protocol/ArmScmiClockProtocol.h>
+#include <Protocol/ArmScmiClock2Protocol.h>
+
+#include "ArmScmiClockProtocolPrivate.h"
+#include "ScmiPrivate.h"
+
+/** Convert to 64 bit value from two 32 bit words.
+
+ @param[in] Low Lower 32 bits.
+ @param[in] High Higher 32 bits.
+
+ @retval UINT64 64 bit value.
+**/
+STATIC
+UINT64
+ConvertTo64Bit (
+ IN UINT32 Low,
+ IN UINT32 High
+ )
+{
+ return (Low | ((UINT64)High << 32));
+}
+
+/** Return version of the clock management protocol supported by SCP firmware.
+
+ @param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
+
+ @param[out] Version Version of the supported SCMI Clock management protocol.
+
+ @retval EFI_SUCCESS The version is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+ClockGetVersion (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ OUT UINT32 *Version
+ )
+{
+ return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_CLOCK, Version);
+}
+
+/** Return total number of clock devices supported by the clock management
+ protocol.
+
+ @param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
+
+ @param[out] TotalClocks Total number of clocks supported.
+
+ @retval EFI_SUCCESS Total number of clocks supported is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+ClockGetTotalClocks (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ OUT UINT32 *TotalClocks
+ )
+{
+ EFI_STATUS Status;
+ UINT32 *ReturnValues;
+
+ Status = ScmiGetProtocolAttributes (SCMI_PROTOCOL_ID_CLOCK, &ReturnValues);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *TotalClocks = SCMI_CLOCK_PROTOCOL_TOTAL_CLKS (ReturnValues[0]);
+
+ return EFI_SUCCESS;
+}
+
+/** Return attributes of a clock device.
+
+ @param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+
+ @param[out] Enabled If TRUE, the clock device is enabled.
+ @param[out] ClockAsciiName A NULL terminated ASCII string with the clock
+ name, of up to 16 bytes.
+
+ @retval EFI_SUCCESS Clock device attributes are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+ClockGetClockAttributes (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ IN UINT32 ClockId,
+ OUT BOOLEAN *Enabled,
+ OUT CHAR8 *ClockAsciiName
+ )
+{
+ EFI_STATUS Status;
+
+ UINT32 *MessageParams;
+ CLOCK_ATTRIBUTES *ClockAttributes;
+ SCMI_COMMAND Cmd;
+ UINT32 PayloadLength;
+
+ Status = ScmiCommandGetPayload (&MessageParams);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *MessageParams = ClockId;
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
+ Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_ATTRIBUTES;
+
+ PayloadLength = sizeof (ClockId);
+
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ (UINT32**)&ClockAttributes
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ // TRUE if bit 0 of ClockAttributes->Attributes is set.
+ *Enabled = CLOCK_ENABLED (ClockAttributes->Attributes);
+
+ AsciiStrCpyS (
+ ClockAsciiName,
+ SCMI_MAX_STR_LEN,
+ (CONST CHAR8*)ClockAttributes->ClockName
+ );
+
+ return EFI_SUCCESS;
+}
+
+/** Return list of rates supported by a given clock device.
+
+ @param[in] This A pointer to SCMI_CLOCK_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+
+ @param[out] Format SCMI_CLOCK_RATE_FORMAT_DISCRETE: Clock device
+ supports range of clock rates which are non-linear.
+
+ SCMI_CLOCK_RATE_FORMAT_LINEAR: Clock device supports
+ range of linear clock rates from Min to Max in steps.
+
+ @param[out] TotalRates Total number of rates.
+
+ @param[in,out] RateArraySize Size of the RateArray.
+
+ @param[out] RateArray List of clock rates.
+
+ @retval EFI_SUCCESS List of clock rates is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval EFI_BUFFER_TOO_SMALL RateArraySize is too small for the result.
+ It has been updated to the size needed.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+ClockDescribeRates (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ IN UINT32 ClockId,
+ OUT SCMI_CLOCK_RATE_FORMAT *Format,
+ OUT UINT32 *TotalRates,
+ IN OUT UINT32 *RateArraySize,
+ OUT SCMI_CLOCK_RATE *RateArray
+ )
+{
+ EFI_STATUS Status;
+
+ UINT32 PayloadLength;
+ SCMI_COMMAND Cmd;
+ UINT32 *MessageParams;
+ CLOCK_DESCRIBE_RATES *DescribeRates;
+ CLOCK_RATE_DWORD *Rate;
+
+ UINT32 RequiredArraySize = 0;
+ UINT32 RateIndex = 0;
+ UINT32 RateNo;
+ UINT32 RateOffset;
+
+ *TotalRates = 0;
+
+ Status = ScmiCommandGetPayload (&MessageParams);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
+ Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_DESCRIBE_RATES;
+
+ *MessageParams++ = ClockId;
+
+ do {
+
+ *MessageParams = RateIndex;
+
+ // Set Payload length, note PayloadLength is a IN/OUT parameter.
+ PayloadLength = sizeof (ClockId) + sizeof (RateIndex);
+
+ // Execute and wait for response on a SCMI channel.
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ (UINT32**)&DescribeRates
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ if (*TotalRates == 0) {
+ // In the first iteration we will get number of returned rates and number
+ // of remaining rates. With this information calculate required size
+ // for rate array. If provided RateArraySize is less, return an
+ // error.
+
+ *Format = RATE_FORMAT (DescribeRates->NumRatesFlags);
+
+ *TotalRates = NUM_RATES (DescribeRates->NumRatesFlags)
+ + NUM_REMAIN_RATES (DescribeRates->NumRatesFlags);
+
+ if (*Format == SCMI_CLOCK_RATE_FORMAT_DISCRETE) {
+ RequiredArraySize = (*TotalRates) * sizeof (UINT64);
+ } else {
+ // We need to return triplet of 64 bit value for each rate
+ RequiredArraySize = (*TotalRates) * 3 * sizeof (UINT64);
+ }
+
+ if (RequiredArraySize > (*RateArraySize)) {
+ *RateArraySize = RequiredArraySize;
+ return EFI_BUFFER_TOO_SMALL;
+ }
+ }
+
+ RateOffset = 0;
+
+ if (*Format == SCMI_CLOCK_RATE_FORMAT_DISCRETE) {
+ for (RateNo = 0; RateNo < NUM_RATES (DescribeRates->NumRatesFlags); RateNo++) {
+ Rate = &DescribeRates->Rates[RateOffset++];
+ // Non-linear discrete rates.
+ RateArray[RateIndex++].Rate = ConvertTo64Bit (Rate->Low, Rate->High);
+ }
+ } else {
+ for (RateNo = 0; RateNo < NUM_RATES (DescribeRates->NumRatesFlags); RateNo++) {
+ // Linear clock rates from minimum to maximum in steps
+ // Minimum clock rate.
+ Rate = &DescribeRates->Rates[RateOffset++];
+ RateArray[RateIndex].Min = ConvertTo64Bit (Rate->Low, Rate->High);
+
+ Rate = &DescribeRates->Rates[RateOffset++];
+ // Maximum clock rate.
+ RateArray[RateIndex].Max = ConvertTo64Bit (Rate->Low, Rate->High);
+
+ Rate = &DescribeRates->Rates[RateOffset++];
+ // Step.
+ RateArray[RateIndex++].Step = ConvertTo64Bit (Rate->Low, Rate->High);
+ }
+ }
+ } while (NUM_REMAIN_RATES (DescribeRates->NumRatesFlags) != 0);
+
+ // Update RateArraySize with RequiredArraySize.
+ *RateArraySize = RequiredArraySize;
+
+ return EFI_SUCCESS;
+}
+
+/** Get clock rate.
+
+ @param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+
+ @param[out] Rate Clock rate.
+
+ @retval EFI_SUCCESS Clock rate is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+ClockRateGet (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ IN UINT32 ClockId,
+ OUT UINT64 *Rate
+ )
+{
+ EFI_STATUS Status;
+
+ UINT32 *MessageParams;
+ CLOCK_RATE_DWORD *ClockRate;
+ SCMI_COMMAND Cmd;
+
+ UINT32 PayloadLength;
+
+ Status = ScmiCommandGetPayload (&MessageParams);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // Fill arguments for clock protocol command.
+ *MessageParams = ClockId;
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
+ Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_RATE_GET;
+
+ PayloadLength = sizeof (ClockId);
+
+ // Execute and wait for response on a SCMI channel.
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ (UINT32**)&ClockRate
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *Rate = ConvertTo64Bit (ClockRate->Low, ClockRate->High);
+
+ return EFI_SUCCESS;
+}
+
+/** Set clock rate.
+
+ @param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+ @param[in] Rate Clock rate.
+
+ @retval EFI_SUCCESS Clock rate set success.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+ClockRateSet (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ IN UINT32 ClockId,
+ IN UINT64 Rate
+ )
+{
+ EFI_STATUS Status;
+ CLOCK_RATE_SET_ATTRIBUTES *ClockRateSetAttributes;
+ SCMI_COMMAND Cmd;
+ UINT32 PayloadLength;
+
+ Status = ScmiCommandGetPayload ((UINT32**)&ClockRateSetAttributes);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // Fill arguments for clock protocol command.
+ ClockRateSetAttributes->ClockId = ClockId;
+ ClockRateSetAttributes->Flags = CLOCK_SET_DEFAULT_FLAGS;
+ ClockRateSetAttributes->Rate.Low = (UINT32)Rate;
+ ClockRateSetAttributes->Rate.High = (UINT32)(Rate >> 32);
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
+ Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_RATE_SET;
+
+ PayloadLength = sizeof (CLOCK_RATE_SET_ATTRIBUTES);
+
+ // Execute and wait for response on a SCMI channel.
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ NULL
+ );
+
+ return Status;
+}
+
+/** Enable/Disable specified clock.
+
+ @param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+ @param[in] Enable TRUE to enable, FALSE to disable.
+
+ @retval EFI_SUCCESS Clock enable/disable successful.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+ClockEnable (
+ IN SCMI_CLOCK2_PROTOCOL *This,
+ IN UINT32 ClockId,
+ IN BOOLEAN Enable
+ )
+{
+ EFI_STATUS Status;
+ CLOCK_CONFIG_SET_ATTRIBUTES *ClockConfigSetAttributes;
+ SCMI_COMMAND Cmd;
+ UINT32 PayloadLength;
+
+ Status = ScmiCommandGetPayload ((UINT32**)&ClockConfigSetAttributes);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // Fill arguments for clock protocol command.
+ ClockConfigSetAttributes->ClockId = ClockId;
+ ClockConfigSetAttributes->Attributes = Enable ? BIT0 : 0;
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
+ Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_CONFIG_SET;
+
+ PayloadLength = sizeof (CLOCK_CONFIG_SET_ATTRIBUTES);
+
+ // Execute and wait for response on a SCMI channel.
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ NULL
+ );
+
+ return Status;
+}
+
+// Instance of the SCMI clock management protocol.
+STATIC CONST SCMI_CLOCK_PROTOCOL ScmiClockProtocol = {
+ ClockGetVersion,
+ ClockGetTotalClocks,
+ ClockGetClockAttributes,
+ ClockDescribeRates,
+ ClockRateGet,
+ ClockRateSet
+ };
+
+// Instance of the SCMI clock management protocol.
+STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
+ (SCMI_CLOCK2_GET_VERSION)ClockGetVersion,
+ (SCMI_CLOCK2_GET_TOTAL_CLOCKS)ClockGetTotalClocks,
+ (SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES)ClockGetClockAttributes,
+ (SCMI_CLOCK2_DESCRIBE_RATES)ClockDescribeRates,
+ (SCMI_CLOCK2_RATE_GET)ClockRateGet,
+ (SCMI_CLOCK2_RATE_SET)ClockRateSet,
+ SCMI_CLOCK2_PROTOCOL_VERSION,
+ ClockEnable
+ };
+
+/** Initialize clock management protocol and install protocol on a given handle.
+
+ @param[in] Handle Handle to install clock management protocol.
+
+ @retval EFI_SUCCESS Clock protocol interface installed successfully.
+**/
+EFI_STATUS
+ScmiClockProtocolInit (
+ IN EFI_HANDLE* Handle
+ )
+{
+ return gBS->InstallMultipleProtocolInterfaces (
+ Handle,
+ &gArmScmiClockProtocolGuid,
+ &ScmiClockProtocol,
+ &gArmScmiClock2ProtocolGuid,
+ &ScmiClock2Protocol,
+ NULL
+ );
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c new file mode 100644 index 000000000..e95f56e67 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c @@ -0,0 +1,147 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#include <Base.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Protocol/ArmScmiBaseProtocol.h>
+#include <Protocol/ArmScmiClockProtocol.h>
+#include <Protocol/ArmScmiPerformanceProtocol.h>
+
+#include "ArmScmiBaseProtocolPrivate.h"
+#include "ArmScmiClockProtocolPrivate.h"
+#include "ArmScmiPerformanceProtocolPrivate.h"
+#include "ScmiDxe.h"
+#include "ScmiPrivate.h"
+
+STATIC CONST SCMI_PROTOCOL_ENTRY Protocols[] = {
+ { SCMI_PROTOCOL_ID_BASE, ScmiBaseProtocolInit },
+ { SCMI_PROTOCOL_ID_PERFORMANCE, ScmiPerformanceProtocolInit },
+ { SCMI_PROTOCOL_ID_CLOCK, ScmiClockProtocolInit }
+};
+
+/** ARM SCMI driver entry point function.
+
+ This function installs the SCMI Base protocol and a list of other
+ protocols is queried using the Base protocol. If protocol is supported,
+ driver will call each protocol init function to install the protocol on
+ the ImageHandle.
+
+ @param[in] ImageHandle Handle to this EFI Image which will be used to
+ install Base, Clock and Performance protocols.
+ @param[in] SystemTable A pointer to boot time system table.
+
+ @retval EFI_SUCCESS Driver initalized successfully.
+ @retval EFI_UNSUPPORTED If SCMI base protocol version is not supported.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+EFIAPI
+ArmScmiDxeEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ SCMI_BASE_PROTOCOL *BaseProtocol;
+ UINT32 Version;
+ UINT32 Index;
+ UINT32 NumProtocols;
+ UINT32 ProtocolIndex;
+ UINT8 *SupportedList;
+ UINT32 SupportedListSize;
+
+ // Every SCMI implementation must implement the base protocol.
+ ASSERT (Protocols[0].Id == SCMI_PROTOCOL_ID_BASE);
+
+ Status = ScmiBaseProtocolInit (&ImageHandle);
+ if (EFI_ERROR (Status)) {
+ ASSERT (FALSE);
+ return Status;
+ }
+
+ Status = gBS->LocateProtocol (
+ &gArmScmiBaseProtocolGuid,
+ NULL,
+ (VOID**)&BaseProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT (FALSE);
+ return Status;
+ }
+
+ // Get SCMI Base protocol version.
+ Status = BaseProtocol->GetVersion (BaseProtocol, &Version);
+ if (EFI_ERROR (Status)) {
+ ASSERT (FALSE);
+ return Status;
+ }
+
+ if (Version != BASE_PROTOCOL_VERSION) {
+ ASSERT (FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ // Apart from Base protocol, SCMI may implement various other protocols,
+ // query total protocols implemented by the SCP firmware.
+ NumProtocols = 0;
+ Status = BaseProtocol->GetTotalProtocols (BaseProtocol, &NumProtocols);
+ if (EFI_ERROR (Status)) {
+ ASSERT (FALSE);
+ return Status;
+ }
+
+ ASSERT (NumProtocols != 0);
+
+ SupportedListSize = (NumProtocols * sizeof (*SupportedList));
+
+ Status = gBS->AllocatePool (
+ EfiBootServicesData,
+ SupportedListSize,
+ (VOID**)&SupportedList
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT (FALSE);
+ return Status;
+ }
+
+ // Get the list of protocols supported by SCP firmware on the platform.
+ Status = BaseProtocol->DiscoverListProtocols (
+ BaseProtocol,
+ &SupportedListSize,
+ SupportedList
+ );
+ if (EFI_ERROR (Status)) {
+ gBS->FreePool (SupportedList);
+ ASSERT (FALSE);
+ return Status;
+ }
+
+ // Install supported protocol on ImageHandle.
+ for (ProtocolIndex = 1; ProtocolIndex < ARRAY_SIZE (Protocols);
+ ProtocolIndex++) {
+ for (Index = 0; Index < NumProtocols; Index++) {
+ if (Protocols[ProtocolIndex].Id == SupportedList[Index]) {
+ Status = Protocols[ProtocolIndex].InitFn (&ImageHandle);
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+ break;
+ }
+ }
+ }
+
+ gBS->FreePool (SupportedList);
+
+ return EFI_SUCCESS;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.h b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.h new file mode 100644 index 000000000..28242aab1 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.h @@ -0,0 +1,36 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+#ifndef SCMI_DXE_H_
+#define SCMI_DXE_H_
+
+#include "ScmiPrivate.h"
+
+#define MAX_VENDOR_LEN SCMI_MAX_STR_LEN
+
+/** Pointer to protocol initialization function.
+
+ @param[in] Handle A pointer to the EFI_HANDLE on which the protocol
+ interface is to be installed.
+
+ @retval EFI_SUCCESS Protocol interface installed successfully.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_PROTOCOL_INIT_FXN)(
+ IN EFI_HANDLE *Handle
+ );
+
+typedef struct {
+ SCMI_PROTOCOL_ID Id; // Protocol Id.
+ SCMI_PROTOCOL_INIT_FXN InitFn; // Protocol init function.
+} SCMI_PROTOCOL_ENTRY;
+
+#endif /* SCMI_DXE_H_ */
diff --git a/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c new file mode 100644 index 000000000..712f95d6e --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c @@ -0,0 +1,451 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Protocol/ArmScmiPerformanceProtocol.h>
+
+#include "ArmScmiPerformanceProtocolPrivate.h"
+#include "ScmiPrivate.h"
+
+/** Return version of the performance management protocol supported by SCP.
+ firmware.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+
+ @param[out] Version Version of the supported SCMI performance management
+ protocol.
+
+ @retval EFI_SUCCESS The version is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+PerformanceGetVersion (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ OUT UINT32 *Version
+ )
+{
+ return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_PERFORMANCE, Version);
+}
+
+/** Return protocol attributes of the performance management protocol.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+
+ @param[out] Attributes Protocol attributes.
+
+ @retval EFI_SUCCESS Protocol attributes are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+PerformanceGetAttributes (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ OUT SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES *Attributes
+ )
+{
+ EFI_STATUS Status;
+ UINT32* ReturnValues;
+
+ Status = ScmiGetProtocolAttributes (
+ SCMI_PROTOCOL_ID_PERFORMANCE,
+ &ReturnValues
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ CopyMem (
+ Attributes,
+ ReturnValues,
+ sizeof (SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES)
+ );
+
+ return EFI_SUCCESS;
+}
+
+/** Return performance domain attributes.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+
+ @param[out] Attributes Performance domain attributes.
+
+ @retval EFI_SUCCESS Domain attributes are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+PerformanceDomainAttributes (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ IN UINT32 DomainId,
+ OUT SCMI_PERFORMANCE_DOMAIN_ATTRIBUTES *DomainAttributes
+ )
+{
+ EFI_STATUS Status;
+ UINT32 *MessageParams;
+ UINT32 *ReturnValues;
+ UINT32 PayloadLength;
+ SCMI_COMMAND Cmd;
+
+ Status = ScmiCommandGetPayload (&MessageParams);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *MessageParams = DomainId;
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+ Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_DOMAIN_ATTRIBUTES;
+
+ PayloadLength = sizeof (DomainId);
+
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ &ReturnValues
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ CopyMem (
+ DomainAttributes,
+ ReturnValues,
+ sizeof (SCMI_PERFORMANCE_DOMAIN_ATTRIBUTES)
+ );
+
+ return EFI_SUCCESS;
+}
+
+/** Return list of performance domain levels of a given domain.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+
+ @param[out] NumLevels Total number of levels a domain can support.
+
+ @param[in,out] LevelArraySize Size of the performance level array.
+
+ @param[out] LevelArray Array of the performance levels.
+
+ @retval EFI_SUCCESS Domain levels are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval EFI_BUFFER_TOO_SMALL LevelArraySize is too small for the result.
+ It has been updated to the size needed.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+STATIC
+EFI_STATUS
+PerformanceDescribeLevels (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ IN UINT32 DomainId,
+ OUT UINT32 *NumLevels,
+ IN OUT UINT32 *LevelArraySize,
+ OUT SCMI_PERFORMANCE_LEVEL *LevelArray
+ )
+{
+ EFI_STATUS Status;
+ UINT32 PayloadLength;
+ SCMI_COMMAND Cmd;
+ UINT32* MessageParams;
+ UINT32 LevelIndex;
+ UINT32 RequiredSize;
+ UINT32 LevelNo;
+ UINT32 ReturnNumLevels;
+ UINT32 ReturnRemainNumLevels;
+
+ PERF_DESCRIBE_LEVELS *Levels;
+
+ Status = ScmiCommandGetPayload (&MessageParams);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ LevelIndex = 0;
+ RequiredSize = 0;
+
+ *MessageParams++ = DomainId;
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+ Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS;
+
+ do {
+
+ *MessageParams = LevelIndex;
+
+ // Note, PayloadLength is an IN/OUT parameter.
+ PayloadLength = sizeof (DomainId) + sizeof (LevelIndex);
+
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ (UINT32**)&Levels
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ ReturnNumLevels = NUM_PERF_LEVELS (Levels->NumLevels);
+ ReturnRemainNumLevels = NUM_REMAIN_PERF_LEVELS (Levels->NumLevels);
+
+ if (RequiredSize == 0) {
+ *NumLevels = ReturnNumLevels + ReturnRemainNumLevels;
+
+ RequiredSize = (*NumLevels) * sizeof (SCMI_PERFORMANCE_LEVEL);
+ if (RequiredSize > (*LevelArraySize)) {
+ // Update LevelArraySize with required size.
+ *LevelArraySize = RequiredSize;
+ return EFI_BUFFER_TOO_SMALL;
+ }
+ }
+
+ for (LevelNo = 0; LevelNo < ReturnNumLevels; LevelNo++) {
+ CopyMem (
+ &LevelArray[LevelIndex++],
+ &Levels->PerfLevel[LevelNo],
+ sizeof (SCMI_PERFORMANCE_LEVEL)
+ );
+ }
+
+ } while (ReturnRemainNumLevels != 0);
+
+ *LevelArraySize = RequiredSize;
+
+ return EFI_SUCCESS;
+}
+
+/** Set performance limits of a domain.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+ @param[in] Limit Performance limit to set.
+
+ @retval EFI_SUCCESS Performance limits set successfully.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+PerformanceLimitsSet (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ IN UINT32 DomainId,
+ IN SCMI_PERFORMANCE_LIMITS *Limits
+ )
+{
+ EFI_STATUS Status;
+ UINT32 PayloadLength;
+ SCMI_COMMAND Cmd;
+ UINT32 *MessageParams;
+
+ Status = ScmiCommandGetPayload (&MessageParams);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *MessageParams++ = DomainId;
+ *MessageParams++ = Limits->RangeMax;
+ *MessageParams = Limits->RangeMin;
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+ Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_SET;
+
+ PayloadLength = sizeof (DomainId) + sizeof (SCMI_PERFORMANCE_LIMITS);
+
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ NULL
+ );
+
+ return Status;
+}
+
+/** Get performance limits of a domain.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+
+ @param[out] Limit Performance Limits of the domain.
+
+ @retval EFI_SUCCESS Performance limits are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+PerformanceLimitsGet (
+ SCMI_PERFORMANCE_PROTOCOL *This,
+ UINT32 DomainId,
+ SCMI_PERFORMANCE_LIMITS *Limits
+ )
+{
+ EFI_STATUS Status;
+ UINT32 PayloadLength;
+ SCMI_COMMAND Cmd;
+ UINT32 *MessageParams;
+
+ SCMI_PERFORMANCE_LIMITS *ReturnValues;
+
+ Status = ScmiCommandGetPayload (&MessageParams);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *MessageParams = DomainId;
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+ Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_GET;
+
+ PayloadLength = sizeof (DomainId);
+
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ (UINT32**)&ReturnValues
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Limits->RangeMax = ReturnValues->RangeMax;
+ Limits->RangeMin = ReturnValues->RangeMin;
+
+ return EFI_SUCCESS;
+}
+
+/** Set performance level of a domain.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+ @param[in] Level Performance level of the domain.
+
+ @retval EFI_SUCCESS Performance level set successfully.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+PerformanceLevelSet (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ IN UINT32 DomainId,
+ IN UINT32 Level
+ )
+{
+ EFI_STATUS Status;
+ UINT32 PayloadLength;
+ SCMI_COMMAND Cmd;
+ UINT32 *MessageParams;
+
+ Status = ScmiCommandGetPayload (&MessageParams);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *MessageParams++ = DomainId;
+ *MessageParams = Level;
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+ Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_SET;
+
+ PayloadLength = sizeof (DomainId) + sizeof (Level);
+
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ NULL
+ );
+
+ return Status;
+}
+
+/** Get performance level of a domain.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+
+ @param[out] Level Performance level of the domain.
+
+ @retval EFI_SUCCESS Performance level got successfully.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+PerformanceLevelGet (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ IN UINT32 DomainId,
+ OUT UINT32 *Level
+ )
+{
+ EFI_STATUS Status;
+ UINT32 PayloadLength;
+ SCMI_COMMAND Cmd;
+ UINT32 *ReturnValues;
+ UINT32 *MessageParams;
+
+ Status = ScmiCommandGetPayload (&MessageParams);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *MessageParams = DomainId;
+
+ Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+ Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_GET;
+
+ PayloadLength = sizeof (DomainId);
+
+ Status = ScmiCommandExecute (
+ &Cmd,
+ &PayloadLength,
+ &ReturnValues
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *Level = *ReturnValues;
+
+ return EFI_SUCCESS;
+}
+
+// Instance of the SCMI performance management protocol.
+STATIC CONST SCMI_PERFORMANCE_PROTOCOL PerformanceProtocol = {
+ PerformanceGetVersion,
+ PerformanceGetAttributes,
+ PerformanceDomainAttributes,
+ PerformanceDescribeLevels,
+ PerformanceLimitsSet,
+ PerformanceLimitsGet,
+ PerformanceLevelSet,
+ PerformanceLevelGet
+};
+
+/** Initialize performance management protocol and install on a given Handle.
+
+ @param[in] Handle Handle to install performance management
+ protocol.
+
+ @retval EFI_SUCCESS Performance protocol installed successfully.
+**/
+EFI_STATUS
+ScmiPerformanceProtocolInit (
+ IN EFI_HANDLE* Handle
+ )
+{
+ return gBS->InstallMultipleProtocolInterfaces (
+ Handle,
+ &gArmScmiPerformanceProtocolGuid,
+ &PerformanceProtocol,
+ NULL
+ );
+}
diff --git a/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h new file mode 100644 index 000000000..7763c848a --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h @@ -0,0 +1,168 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+#ifndef SCMI_PRIVATE_H_
+#define SCMI_PRIVATE_H_
+
+// SCMI protocol IDs.
+typedef enum {
+ SCMI_PROTOCOL_ID_BASE = 0x10,
+ SCMI_PROTOCOL_ID_POWER_DOMAIN = 0x11,
+ SCMI_PROTOCOL_ID_SYSTEM_POWER = 0x12,
+ SCMI_PROTOCOL_ID_PERFORMANCE = 0x13,
+ SCMI_PROTOCOL_ID_CLOCK = 0x14,
+ SCMI_PROTOCOL_ID_SENSOR = 0x15
+} SCMI_PROTOCOL_ID;
+
+// SCMI message types.
+typedef enum {
+ SCMI_MESSAGE_TYPE_COMMAND = 0,
+ SCMI_MESSAGE_TYPE_DELAYED_RESPONSE = 2, // Skipping 1 is deliberate.
+ SCMI_MESSAGE_TYPE_NOTIFICATION = 3
+} SCMI_MESSAGE_TYPE;
+
+// SCMI response error codes.
+typedef enum {
+ SCMI_SUCCESS = 0,
+ SCMI_NOT_SUPPORTED = -1,
+ SCMI_INVALID_PARAMETERS = -2,
+ SCMI_DENIED = -3,
+ SCMI_NOT_FOUND = -4,
+ SCMI_OUT_OF_RANGE = -5,
+ SCMI_BUSY = -6,
+ SCMI_COMMS_ERROR = -7,
+ SCMI_GENERIC_ERROR = -8,
+ SCMI_HARDWARE_ERROR = -9,
+ SCMI_PROTOCOL_ERROR = -10
+} SCMI_STATUS;
+
+// SCMI message IDs common to all protocols.
+typedef enum {
+ SCMI_MESSAGE_ID_PROTOCOL_VERSION = 0x0,
+ SCMI_MESSAGE_ID_PROTOCOL_ATTRIBUTES = 0x1,
+ SCMI_MESSAGE_ID_PROTOCOL_MESSAGE_ATTRIBUTES = 0x2
+} SCMI_MESSAGE_ID;
+
+// Not defined in SCMI specification but will help to identify a message.
+typedef struct {
+ SCMI_PROTOCOL_ID ProtocolId;
+ UINT32 MessageId;
+} SCMI_COMMAND;
+
+#pragma pack(1)
+
+// Response to a SCMI command.
+typedef struct {
+ INT32 Status;
+ UINT32 ReturnValues[];
+} SCMI_MESSAGE_RESPONSE;
+
+// Message header. MsgId[7:0], MsgType[9:8], ProtocolId[17:10]
+#define MESSAGE_TYPE_SHIFT 8
+#define PROTOCOL_ID_SHIFT 10
+#define SCMI_MESSAGE_HEADER(MsgId, MsgType, ProtocolId) ( \
+ MsgType << MESSAGE_TYPE_SHIFT | \
+ ProtocolId << PROTOCOL_ID_SHIFT | \
+ MsgId \
+ )
+// SCMI message header.
+typedef struct {
+ UINT32 MessageHeader;
+} SCMI_MESSAGE_HEADER;
+
+#pragma pack()
+
+/** Return a pointer to the message payload.
+
+ @param[out] Payload Holds pointer to the message payload.
+
+ @retval EFI_SUCCESS Payload holds a valid message payload pointer.
+ @retval EFI_TIMEOUT Time out error if MTL channel is busy.
+ @retval EFI_UNSUPPORTED If MTL channel is unsupported.
+**/
+EFI_STATUS
+ScmiCommandGetPayload (
+ OUT UINT32** Payload
+ );
+
+/** Execute a SCMI command and receive a response.
+
+ This function uses a MTL channel to transfer message to SCP
+ and waits for a response.
+
+ @param[in] Command Pointer to the SCMI command (Protocol ID
+ and Message ID)
+
+ @param[in,out] PayloadLength SCMI command message length.
+
+ @param[out] OPTIONAL ReturnValues Pointer to SCMI response.
+
+ @retval OUT EFI_SUCCESS Command sent and message received successfully.
+ @retval OUT EFI_UNSUPPORTED Channel not supported.
+ @retval OUT EFI_TIMEOUT Timeout on the channel.
+ @retval OUT EFI_DEVICE_ERROR Channel not ready.
+ @retval OUT EFI_DEVICE_ERROR Message Header corrupted.
+ @retval OUT EFI_DEVICE_ERROR SCMI error.
+**/
+EFI_STATUS
+ScmiCommandExecute (
+ IN SCMI_COMMAND *Command,
+ IN OUT UINT32 *PayloadLength,
+ OUT UINT32 **ReturnValues OPTIONAL
+ );
+
+/** Return protocol version from SCP for a given protocol ID.
+
+ @param[in] Protocol ID Protocol ID.
+ @param[out] Version Pointer to version of the protocol.
+
+ @retval EFI_SUCCESS Version holds a valid version received
+ from the SCP.
+ @retval EFI_DEVICE_ERROR SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+ScmiGetProtocolVersion (
+ IN SCMI_PROTOCOL_ID ProtocolId,
+ OUT UINT32 *Version
+ );
+
+/** Return protocol attributes from SCP for a given protocol ID.
+
+ @param[in] Protocol ID Protocol ID.
+ @param[out] ReturnValues Pointer to attributes of the protocol.
+
+ @retval EFI_SUCCESS ReturnValues points to protocol attributes.
+ @retval EFI_DEVICE_ERROR SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+ScmiGetProtocolAttributes (
+ IN SCMI_PROTOCOL_ID ProtocolId,
+ OUT UINT32 **ReturnValues
+ );
+
+/** Return protocol message attributes from SCP for a given protocol ID.
+
+ @param[in] Protocol ID Protocol ID.
+
+ @param[out] Attributes Pointer to attributes of the protocol.
+
+ @retval EFI_SUCCESS ReturnValues points to protocol message attributes.
+ @retval EFI_DEVICE_ERROR SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+EFI_STATUS
+ScmiGetProtocolMessageAttributes (
+ IN SCMI_PROTOCOL_ID ProtocolId,
+ OUT UINT32 **ReturnValues
+ );
+
+#endif /* SCMI_PRIVATE_H_ */
diff --git a/roms/edk2/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/roms/edk2/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c new file mode 100644 index 000000000..fca2d4f76 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c @@ -0,0 +1,402 @@ +/*++
+
+Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
+Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
+Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+
+--*/
+
+#include <Library/MemoryAllocationLib.h>
+#include "CpuDxe.h"
+
+#define INVALID_ENTRY ((UINT32)~0)
+
+#define MIN_T0SZ 16
+#define BITS_PER_LEVEL 9
+
+STATIC
+VOID
+GetRootTranslationTableInfo (
+ IN UINTN T0SZ,
+ OUT UINTN *RootTableLevel,
+ OUT UINTN *RootTableEntryCount
+ )
+{
+ *RootTableLevel = (T0SZ - MIN_T0SZ) / BITS_PER_LEVEL;
+ *RootTableEntryCount = TT_ENTRY_COUNT >> (T0SZ - MIN_T0SZ) % BITS_PER_LEVEL;
+}
+
+STATIC
+UINT64
+PageAttributeToGcdAttribute (
+ IN UINT64 PageAttributes
+ )
+{
+ UINT64 GcdAttributes;
+
+ switch (PageAttributes & TT_ATTR_INDX_MASK) {
+ case TT_ATTR_INDX_DEVICE_MEMORY:
+ GcdAttributes = EFI_MEMORY_UC;
+ break;
+ case TT_ATTR_INDX_MEMORY_NON_CACHEABLE:
+ GcdAttributes = EFI_MEMORY_WC;
+ break;
+ case TT_ATTR_INDX_MEMORY_WRITE_THROUGH:
+ GcdAttributes = EFI_MEMORY_WT;
+ break;
+ case TT_ATTR_INDX_MEMORY_WRITE_BACK:
+ GcdAttributes = EFI_MEMORY_WB;
+ break;
+ default:
+ DEBUG ((DEBUG_ERROR,
+ "PageAttributeToGcdAttribute: PageAttributes:0x%lX not supported.\n",
+ PageAttributes));
+ ASSERT (0);
+ // The Global Coherency Domain (GCD) value is defined as a bit set.
+ // Returning 0 means no attribute has been set.
+ GcdAttributes = 0;
+ }
+
+ // Determine protection attributes
+ if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) ||
+ ((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {
+ // Read only cases map to write-protect
+ GcdAttributes |= EFI_MEMORY_RO;
+ }
+
+ // Process eXecute Never attribute
+ if ((PageAttributes & (TT_PXN_MASK | TT_UXN_MASK)) != 0) {
+ GcdAttributes |= EFI_MEMORY_XP;
+ }
+
+ return GcdAttributes;
+}
+
+STATIC
+UINT64
+GetFirstPageAttribute (
+ IN UINT64 *FirstLevelTableAddress,
+ IN UINTN TableLevel
+ )
+{
+ UINT64 FirstEntry;
+
+ // Get the first entry of the table
+ FirstEntry = *FirstLevelTableAddress;
+
+ if ((TableLevel != 3) && (FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
+ // Only valid for Levels 0, 1 and 2
+
+ // Get the attribute of the subsequent table
+ return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);
+ } else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||
+ ((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
+ {
+ return FirstEntry & TT_ATTR_INDX_MASK;
+ } else {
+ return INVALID_ENTRY;
+ }
+}
+
+STATIC
+UINT64
+GetNextEntryAttribute (
+ IN UINT64 *TableAddress,
+ IN UINTN EntryCount,
+ IN UINTN TableLevel,
+ IN UINT64 BaseAddress,
+ IN OUT UINT32 *PrevEntryAttribute,
+ IN OUT UINT64 *StartGcdRegion
+ )
+{
+ UINTN Index;
+ UINT64 Entry;
+ UINT32 EntryAttribute;
+ UINT32 EntryType;
+ EFI_STATUS Status;
+ UINTN NumberOfDescriptors;
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
+
+ // Get the memory space map from GCD
+ MemorySpaceMap = NULL;
+ Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
+ ASSERT_EFI_ERROR (Status);
+
+ // We cannot get more than 3-level page table
+ ASSERT (TableLevel <= 3);
+
+ // While the top level table might not contain TT_ENTRY_COUNT entries;
+ // the subsequent ones should be filled up
+ for (Index = 0; Index < EntryCount; Index++) {
+ Entry = TableAddress[Index];
+ EntryType = Entry & TT_TYPE_MASK;
+ EntryAttribute = Entry & TT_ATTR_INDX_MASK;
+
+ // If Entry is a Table Descriptor type entry then go through the sub-level table
+ if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||
+ ((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {
+ if ((*PrevEntryAttribute == INVALID_ENTRY) || (EntryAttribute != *PrevEntryAttribute)) {
+ if (*PrevEntryAttribute != INVALID_ENTRY) {
+ // Update GCD with the last region
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
+ *StartGcdRegion,
+ (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
+ PageAttributeToGcdAttribute (*PrevEntryAttribute));
+ }
+
+ // Start of the new region
+ *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
+ *PrevEntryAttribute = EntryAttribute;
+ } else {
+ continue;
+ }
+ } else if (EntryType == TT_TYPE_TABLE_ENTRY) {
+ // Table Entry type is only valid for Level 0, 1, 2
+ ASSERT (TableLevel < 3);
+
+ // Increase the level number and scan the sub-level table
+ GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),
+ TT_ENTRY_COUNT, TableLevel + 1,
+ (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),
+ PrevEntryAttribute, StartGcdRegion);
+ } else {
+ if (*PrevEntryAttribute != INVALID_ENTRY) {
+ // Update GCD with the last region
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
+ *StartGcdRegion,
+ (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
+ PageAttributeToGcdAttribute (*PrevEntryAttribute));
+
+ // Start of the new region
+ *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
+ *PrevEntryAttribute = INVALID_ENTRY;
+ }
+ }
+ }
+
+ FreePool (MemorySpaceMap);
+
+ return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL(TableLevel));
+}
+
+EFI_STATUS
+SyncCacheConfig (
+ IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
+ )
+{
+ EFI_STATUS Status;
+ UINT32 PageAttribute = 0;
+ UINT64 *FirstLevelTableAddress;
+ UINTN TableLevel;
+ UINTN TableCount;
+ UINTN NumberOfDescriptors;
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
+ UINTN Tcr;
+ UINTN T0SZ;
+ UINT64 BaseAddressGcdRegion;
+ UINT64 EndAddressGcdRegion;
+
+ // This code assumes MMU is enabled and filed with section translations
+ ASSERT (ArmMmuEnabled ());
+
+ //
+ // Get the memory space map from GCD
+ //
+ MemorySpaceMap = NULL;
+ Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
+ ASSERT_EFI_ERROR (Status);
+
+ // The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
+ // to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a
+ // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were
+ // a client) to update its copy of the attributes. This is bad architecture and should be replaced
+ // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.
+
+ // Obtain page table base
+ FirstLevelTableAddress = (UINT64*)(ArmGetTTBR0BaseAddress ());
+
+ // Get Translation Control Register value
+ Tcr = ArmGetTCR ();
+ // Get Address Region Size
+ T0SZ = Tcr & TCR_T0SZ_MASK;
+
+ // Get the level of the first table for the indicated Address Region Size
+ GetRootTranslationTableInfo (T0SZ, &TableLevel, &TableCount);
+
+ // First Attribute of the Page Tables
+ PageAttribute = GetFirstPageAttribute (FirstLevelTableAddress, TableLevel);
+
+ // We scan from the start of the memory map (ie: at the address 0x0)
+ BaseAddressGcdRegion = 0x0;
+ EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress,
+ TableCount, TableLevel,
+ BaseAddressGcdRegion,
+ &PageAttribute, &BaseAddressGcdRegion);
+
+ // Update GCD with the last region if valid
+ if (PageAttribute != INVALID_ENTRY) {
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
+ BaseAddressGcdRegion,
+ EndAddressGcdRegion - BaseAddressGcdRegion,
+ PageAttributeToGcdAttribute (PageAttribute));
+ }
+
+ FreePool (MemorySpaceMap);
+
+ return EFI_SUCCESS;
+}
+
+UINT64
+EfiAttributeToArmAttribute (
+ IN UINT64 EfiAttributes
+ )
+{
+ UINT64 ArmAttributes;
+
+ switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
+ case EFI_MEMORY_UC:
+ if (ArmReadCurrentEL () == AARCH64_EL2) {
+ ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
+ } else {
+ ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
+ }
+ break;
+ case EFI_MEMORY_WC:
+ ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
+ break;
+ case EFI_MEMORY_WT:
+ ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
+ break;
+ case EFI_MEMORY_WB:
+ ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
+ break;
+ default:
+ ArmAttributes = TT_ATTR_INDX_MASK;
+ }
+
+ // Set the access flag to match the block attributes
+ ArmAttributes |= TT_AF;
+
+ // Determine protection attributes
+ if (EfiAttributes & EFI_MEMORY_RO) {
+ ArmAttributes |= TT_AP_RO_RO;
+ }
+
+ // Process eXecute Never attribute
+ if (EfiAttributes & EFI_MEMORY_XP) {
+ ArmAttributes |= TT_PXN_MASK;
+ }
+
+ return ArmAttributes;
+}
+
+// This function will recursively go down the page table to find the first block address linked to 'BaseAddress'.
+// And then the function will identify the size of the region that has the same page table attribute.
+EFI_STATUS
+GetMemoryRegionRec (
+ IN UINT64 *TranslationTable,
+ IN UINTN TableLevel,
+ IN UINT64 *LastBlockEntry,
+ IN OUT UINTN *BaseAddress,
+ OUT UINTN *RegionLength,
+ OUT UINTN *RegionAttributes
+ )
+{
+ EFI_STATUS Status;
+ UINT64 *NextTranslationTable;
+ UINT64 *BlockEntry;
+ UINT64 BlockEntryType;
+ UINT64 EntryType;
+
+ if (TableLevel != 3) {
+ BlockEntryType = TT_TYPE_BLOCK_ENTRY;
+ } else {
+ BlockEntryType = TT_TYPE_BLOCK_ENTRY_LEVEL3;
+ }
+
+ // Find the block entry linked to the Base Address
+ BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
+ EntryType = *BlockEntry & TT_TYPE_MASK;
+
+ if ((TableLevel < 3) && (EntryType == TT_TYPE_TABLE_ENTRY)) {
+ NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
+
+ // The entry is a page table, so we go to the next level
+ Status = GetMemoryRegionRec (
+ NextTranslationTable, // Address of the next level page table
+ TableLevel + 1, // Next Page Table level
+ (UINTN*)TT_LAST_BLOCK_ADDRESS(NextTranslationTable, TT_ENTRY_COUNT),
+ BaseAddress, RegionLength, RegionAttributes);
+
+ // In case of 'Success', it means the end of the block region has been found into the upper
+ // level translation table
+ if (!EFI_ERROR(Status)) {
+ return EFI_SUCCESS;
+ }
+
+ // Now we processed the table move to the next entry
+ BlockEntry++;
+ } else if (EntryType == BlockEntryType) {
+ // We have found the BlockEntry attached to the address. We save its start address (the start
+ // address might be before the 'BaseAddress') and attributes
+ *BaseAddress = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1);
+ *RegionLength = 0;
+ *RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;
+ } else {
+ // We have an 'Invalid' entry
+ return EFI_UNSUPPORTED;
+ }
+
+ while (BlockEntry <= LastBlockEntry) {
+ if ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes) {
+ *RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL(TableLevel);
+ } else {
+ // In case we have found the end of the region we return success
+ return EFI_SUCCESS;
+ }
+ BlockEntry++;
+ }
+
+ // If we have reached the end of the TranslationTable and we have not found the end of the region then
+ // we return EFI_NOT_FOUND.
+ // The caller will continue to look for the memory region at its level
+ return EFI_NOT_FOUND;
+}
+
+EFI_STATUS
+GetMemoryRegion (
+ IN OUT UINTN *BaseAddress,
+ OUT UINTN *RegionLength,
+ OUT UINTN *RegionAttributes
+ )
+{
+ EFI_STATUS Status;
+ UINT64 *TranslationTable;
+ UINTN TableLevel;
+ UINTN EntryCount;
+ UINTN T0SZ;
+
+ ASSERT ((BaseAddress != NULL) && (RegionLength != NULL) && (RegionAttributes != NULL));
+
+ TranslationTable = ArmGetTTBR0BaseAddress ();
+
+ T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;
+ // Get the Table info from T0SZ
+ GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);
+
+ Status = GetMemoryRegionRec (TranslationTable, TableLevel,
+ (UINTN*)TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount),
+ BaseAddress, RegionLength, RegionAttributes);
+
+ // If the region continues up to the end of the root table then GetMemoryRegionRec()
+ // will return EFI_NOT_FOUND
+ if (Status == EFI_NOT_FOUND) {
+ return EFI_SUCCESS;
+ } else {
+ return Status;
+ }
+}
diff --git a/roms/edk2/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/roms/edk2/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c new file mode 100644 index 000000000..6fb5112a1 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c @@ -0,0 +1,511 @@ +/*++
+
+Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
+Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
+Portions copyright (c) 2013, ARM Ltd. All rights reserved.<BR>
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+
+--*/
+
+#include <Library/MemoryAllocationLib.h>
+#include "CpuDxe.h"
+
+EFI_STATUS
+SectionToGcdAttributes (
+ IN UINT32 SectionAttributes,
+ OUT UINT64 *GcdAttributes
+ )
+{
+ *GcdAttributes = 0;
+
+ // determine cacheability attributes
+ switch(SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {
+ case TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED:
+ *GcdAttributes |= EFI_MEMORY_UC;
+ break;
+ case TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE:
+ *GcdAttributes |= EFI_MEMORY_UC;
+ break;
+ case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC:
+ *GcdAttributes |= EFI_MEMORY_WT;
+ break;
+ case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC:
+ *GcdAttributes |= EFI_MEMORY_WB;
+ break;
+ case TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE:
+ *GcdAttributes |= EFI_MEMORY_WC;
+ break;
+ case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC:
+ *GcdAttributes |= EFI_MEMORY_WB;
+ break;
+ case TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE:
+ *GcdAttributes |= EFI_MEMORY_UC;
+ break;
+ default:
+ return EFI_UNSUPPORTED;
+ }
+
+ // determine protection attributes
+ switch(SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {
+ case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write
+ //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
+ break;
+
+ case TT_DESCRIPTOR_SECTION_AP_RW_NO:
+ case TT_DESCRIPTOR_SECTION_AP_RW_RW:
+ // normal read/write access, do not add additional attributes
+ break;
+
+ // read only cases map to write-protect
+ case TT_DESCRIPTOR_SECTION_AP_RO_NO:
+ case TT_DESCRIPTOR_SECTION_AP_RO_RO:
+ *GcdAttributes |= EFI_MEMORY_RO;
+ break;
+
+ default:
+ return EFI_UNSUPPORTED;
+ }
+
+ // now process eXectue Never attribute
+ if ((SectionAttributes & TT_DESCRIPTOR_SECTION_XN_MASK) != 0 ) {
+ *GcdAttributes |= EFI_MEMORY_XP;
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+PageToGcdAttributes (
+ IN UINT32 PageAttributes,
+ OUT UINT64 *GcdAttributes
+ )
+{
+ *GcdAttributes = 0;
+
+ // determine cacheability attributes
+ switch(PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:
+ *GcdAttributes |= EFI_MEMORY_UC;
+ break;
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE:
+ *GcdAttributes |= EFI_MEMORY_UC;
+ break;
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC:
+ *GcdAttributes |= EFI_MEMORY_WT;
+ break;
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC:
+ *GcdAttributes |= EFI_MEMORY_WB;
+ break;
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE:
+ *GcdAttributes |= EFI_MEMORY_WC;
+ break;
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC:
+ *GcdAttributes |= EFI_MEMORY_WB;
+ break;
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE:
+ *GcdAttributes |= EFI_MEMORY_UC;
+ break;
+ default:
+ return EFI_UNSUPPORTED;
+ }
+
+ // determine protection attributes
+ switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {
+ case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write
+ //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
+ break;
+
+ case TT_DESCRIPTOR_PAGE_AP_RW_NO:
+ case TT_DESCRIPTOR_PAGE_AP_RW_RW:
+ // normal read/write access, do not add additional attributes
+ break;
+
+ // read only cases map to write-protect
+ case TT_DESCRIPTOR_PAGE_AP_RO_NO:
+ case TT_DESCRIPTOR_PAGE_AP_RO_RO:
+ *GcdAttributes |= EFI_MEMORY_RO;
+ break;
+
+ default:
+ return EFI_UNSUPPORTED;
+ }
+
+ // now process eXectue Never attribute
+ if ((PageAttributes & TT_DESCRIPTOR_PAGE_XN_MASK) != 0 ) {
+ *GcdAttributes |= EFI_MEMORY_XP;
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+SyncCacheConfigPage (
+ IN UINT32 SectionIndex,
+ IN UINT32 FirstLevelDescriptor,
+ IN UINTN NumberOfDescriptors,
+ IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
+ IN OUT EFI_PHYSICAL_ADDRESS *NextRegionBase,
+ IN OUT UINT64 *NextRegionLength,
+ IN OUT UINT32 *NextSectionAttributes
+ )
+{
+ EFI_STATUS Status;
+ UINT32 i;
+ volatile ARM_PAGE_TABLE_ENTRY *SecondLevelTable;
+ UINT32 NextPageAttributes = 0;
+ UINT32 PageAttributes = 0;
+ UINT32 BaseAddress;
+ UINT64 GcdAttributes;
+
+ // Get the Base Address from FirstLevelDescriptor;
+ BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
+
+ // Convert SectionAttributes into PageAttributes
+ NextPageAttributes =
+ TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(*NextSectionAttributes,0) |
+ TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(*NextSectionAttributes);
+
+ // obtain page table base
+ SecondLevelTable = (ARM_PAGE_TABLE_ENTRY *)(FirstLevelDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
+
+ for (i=0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {
+ if ((SecondLevelTable[i] & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
+ // extract attributes (cacheability and permissions)
+ PageAttributes = SecondLevelTable[i] & (TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK | TT_DESCRIPTOR_PAGE_AP_MASK);
+
+ if (NextPageAttributes == 0) {
+ // start on a new region
+ *NextRegionLength = 0;
+ *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
+ NextPageAttributes = PageAttributes;
+ } else if (PageAttributes != NextPageAttributes) {
+ // Convert Section Attributes into GCD Attributes
+ Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
+ ASSERT_EFI_ERROR (Status);
+
+ // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
+
+ // start on a new region
+ *NextRegionLength = 0;
+ *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
+ NextPageAttributes = PageAttributes;
+ }
+ } else if (NextPageAttributes != 0) {
+ // Convert Page Attributes into GCD Attributes
+ Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
+ ASSERT_EFI_ERROR (Status);
+
+ // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
+
+ *NextRegionLength = 0;
+ *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
+ NextPageAttributes = 0;
+ }
+ *NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE;
+ }
+
+ // Convert back PageAttributes into SectionAttributes
+ *NextSectionAttributes =
+ TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(NextPageAttributes,0) |
+ TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(NextPageAttributes);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+SyncCacheConfig (
+ IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
+ )
+{
+ EFI_STATUS Status;
+ UINT32 i;
+ EFI_PHYSICAL_ADDRESS NextRegionBase;
+ UINT64 NextRegionLength;
+ UINT32 NextSectionAttributes = 0;
+ UINT32 SectionAttributes = 0;
+ UINT64 GcdAttributes;
+ volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
+ UINTN NumberOfDescriptors;
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
+
+
+ DEBUG ((DEBUG_PAGE, "SyncCacheConfig()\n"));
+
+ // This code assumes MMU is enabled and filed with section translations
+ ASSERT (ArmMmuEnabled ());
+
+ //
+ // Get the memory space map from GCD
+ //
+ MemorySpaceMap = NULL;
+ Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
+ ASSERT_EFI_ERROR (Status);
+
+
+ // The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
+ // to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a
+ // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were
+ // a client) to update its copy of the attributes. This is bad architecture and should be replaced
+ // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.
+
+ // obtain page table base
+ FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)(ArmGetTTBR0BaseAddress ());
+
+ // Get the first region
+ NextSectionAttributes = FirstLevelTable[0] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);
+
+ // iterate through each 1MB descriptor
+ NextRegionBase = NextRegionLength = 0;
+ for (i=0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {
+ if ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {
+ // extract attributes (cacheability and permissions)
+ SectionAttributes = FirstLevelTable[i] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);
+
+ if (NextSectionAttributes == 0) {
+ // start on a new region
+ NextRegionLength = 0;
+ NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
+ NextSectionAttributes = SectionAttributes;
+ } else if (SectionAttributes != NextSectionAttributes) {
+ // Convert Section Attributes into GCD Attributes
+ Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
+ ASSERT_EFI_ERROR (Status);
+
+ // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
+
+ // start on a new region
+ NextRegionLength = 0;
+ NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
+ NextSectionAttributes = SectionAttributes;
+ }
+ NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
+ } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) {
+ // In this case any bits set in the 'NextSectionAttributes' are garbage and were set from
+ // bits that are actually part of the pagetable address. We clear it out to zero so that
+ // the SyncCacheConfigPage will use the page attributes instead of trying to convert the
+ // section attributes into page attributes
+ NextSectionAttributes = 0;
+ Status = SyncCacheConfigPage (
+ i,FirstLevelTable[i],
+ NumberOfDescriptors, MemorySpaceMap,
+ &NextRegionBase,&NextRegionLength,&NextSectionAttributes);
+ ASSERT_EFI_ERROR (Status);
+ } else {
+ // We do not support yet 16MB sections
+ ASSERT ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) != TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION);
+
+ // start on a new region
+ if (NextSectionAttributes != 0) {
+ // Convert Section Attributes into GCD Attributes
+ Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
+ ASSERT_EFI_ERROR (Status);
+
+ // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
+
+ NextRegionLength = 0;
+ NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
+ NextSectionAttributes = 0;
+ }
+ NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
+ }
+ } // section entry loop
+
+ if (NextSectionAttributes != 0) {
+ // Convert Section Attributes into GCD Attributes
+ Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
+ ASSERT_EFI_ERROR (Status);
+
+ // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
+ }
+
+ FreePool (MemorySpaceMap);
+
+ return EFI_SUCCESS;
+}
+
+UINT64
+EfiAttributeToArmAttribute (
+ IN UINT64 EfiAttributes
+ )
+{
+ UINT64 ArmAttributes;
+
+ switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
+ case EFI_MEMORY_UC:
+ // Map to strongly ordered
+ ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
+ break;
+
+ case EFI_MEMORY_WC:
+ // Map to normal non-cachable
+ ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
+ break;
+
+ case EFI_MEMORY_WT:
+ // Write through with no-allocate
+ ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0
+ break;
+
+ case EFI_MEMORY_WB:
+ // Write back (with allocate)
+ ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1
+ break;
+
+ case EFI_MEMORY_UCE:
+ default:
+ ArmAttributes = TT_DESCRIPTOR_SECTION_TYPE_FAULT;
+ break;
+ }
+
+ // Determine protection attributes
+ if (EfiAttributes & EFI_MEMORY_RO) {
+ ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RO_RO;
+ } else {
+ ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RW_RW;
+ }
+
+ // Determine eXecute Never attribute
+ if (EfiAttributes & EFI_MEMORY_XP) {
+ ArmAttributes |= TT_DESCRIPTOR_SECTION_XN_MASK;
+ }
+
+ return ArmAttributes;
+}
+
+EFI_STATUS
+GetMemoryRegionPage (
+ IN UINT32 *PageTable,
+ IN OUT UINTN *BaseAddress,
+ OUT UINTN *RegionLength,
+ OUT UINTN *RegionAttributes
+ )
+{
+ UINT32 PageAttributes;
+ UINT32 TableIndex;
+ UINT32 PageDescriptor;
+
+ // Convert the section attributes into page attributes
+ PageAttributes = ConvertSectionAttributesToPageAttributes (*RegionAttributes, 0);
+
+ // Calculate index into first level translation table for start of modification
+ TableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
+ ASSERT (TableIndex < TRANSLATION_TABLE_PAGE_COUNT);
+
+ // Go through the page table to find the end of the section
+ for (; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {
+ // Get the section at the given index
+ PageDescriptor = PageTable[TableIndex];
+
+ if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_FAULT) {
+ // Case: End of the boundary of the region
+ return EFI_SUCCESS;
+ } else if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_PAGE) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
+ if ((PageDescriptor & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK) == PageAttributes) {
+ *RegionLength = *RegionLength + TT_DESCRIPTOR_PAGE_SIZE;
+ } else {
+ // Case: End of the boundary of the region
+ return EFI_SUCCESS;
+ }
+ } else {
+ // We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.
+ ASSERT(0);
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
+EFI_STATUS
+GetMemoryRegion (
+ IN OUT UINTN *BaseAddress,
+ OUT UINTN *RegionLength,
+ OUT UINTN *RegionAttributes
+ )
+{
+ EFI_STATUS Status;
+ UINT32 TableIndex;
+ UINT32 PageAttributes;
+ UINT32 PageTableIndex;
+ UINT32 SectionDescriptor;
+ ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
+ UINT32 *PageTable;
+
+ // Initialize the arguments
+ *RegionLength = 0;
+
+ // Obtain page table base
+ FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
+
+ // Calculate index into first level translation table for start of modification
+ TableIndex = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (*BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
+ ASSERT (TableIndex < TRANSLATION_TABLE_SECTION_COUNT);
+
+ // Get the section at the given index
+ SectionDescriptor = FirstLevelTable[TableIndex];
+ if (!SectionDescriptor) {
+ return EFI_NOT_FOUND;
+ }
+
+ // If 'BaseAddress' belongs to the section then round it to the section boundary
+ if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
+ ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
+ {
+ *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;
+ *RegionAttributes = SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK;
+ } else {
+ // Otherwise, we round it to the page boundary
+ *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK;
+
+ // Get the attribute at the page table level (Level 2)
+ PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
+
+ // Calculate index into first level translation table for start of modification
+ PageTableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
+ ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT);
+
+ PageAttributes = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK;
+ *RegionAttributes = TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (PageAttributes, 0) |
+ TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);
+ }
+
+ for (;TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
+ // Get the section at the given index
+ SectionDescriptor = FirstLevelTable[TableIndex];
+
+ // If the entry is a level-2 page table then we scan it to find the end of the region
+ if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) {
+ // Extract the page table location from the descriptor
+ PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
+
+ // Scan the page table to find the end of the region.
+ Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);
+
+ // If we have found the end of the region (Status == EFI_SUCCESS) then we exit the for-loop
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ } else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
+ ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) {
+ if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) {
+ // If the attributes of the section differ from the one targeted then we exit the loop
+ break;
+ } else {
+ *RegionLength = *RegionLength + TT_DESCRIPTOR_SECTION_SIZE;
+ }
+ } else {
+ // If we are on an invalid section then it means it is the end of our section.
+ break;
+ }
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuDxe.c b/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuDxe.c new file mode 100644 index 000000000..082ef30fb --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuDxe.c @@ -0,0 +1,283 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2011, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "CpuDxe.h"
+
+#include <Guid/IdleLoopEvent.h>
+
+BOOLEAN mIsFlushingGCD;
+
+/**
+ This function flushes the range of addresses from Start to Start+Length
+ from the processor's data cache. If Start is not aligned to a cache line
+ boundary, then the bytes before Start to the preceding cache line boundary
+ are also flushed. If Start+Length is not aligned to a cache line boundary,
+ then the bytes past Start+Length to the end of the next cache line boundary
+ are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
+ supported. If the data cache is fully coherent with all DMA operations, then
+ this function can just return EFI_SUCCESS. If the processor does not support
+ flushing a range of the data cache, then the entire data cache can be flushed.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+ @param Start The beginning physical address to flush from the processor's data
+ cache.
+ @param Length The number of bytes to flush from the processor's data cache. This
+ function may flush more bytes than Length specifies depending upon
+ the granularity of the flush operation that the processor supports.
+ @param FlushType Specifies the type of flush operation to perform.
+
+ @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from
+ the processor's data cache.
+ @retval EFI_UNSUPPORTED The processor does not support the cache flush type specified
+ by FlushType.
+ @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed
+ from the processor's data cache.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuFlushCpuDataCache (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ IN EFI_PHYSICAL_ADDRESS Start,
+ IN UINT64 Length,
+ IN EFI_CPU_FLUSH_TYPE FlushType
+ )
+{
+
+ switch (FlushType) {
+ case EfiCpuFlushTypeWriteBack:
+ WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
+ break;
+ case EfiCpuFlushTypeInvalidate:
+ InvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
+ break;
+ case EfiCpuFlushTypeWriteBackInvalidate:
+ WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
+ break;
+ default:
+ return EFI_INVALID_PARAMETER;
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ This function enables interrupt processing by the processor.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Interrupts are enabled on the processor.
+ @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuEnableInterrupt (
+ IN EFI_CPU_ARCH_PROTOCOL *This
+ )
+{
+ ArmEnableInterrupts ();
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ This function disables interrupt processing by the processor.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Interrupts are disabled on the processor.
+ @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuDisableInterrupt (
+ IN EFI_CPU_ARCH_PROTOCOL *This
+ )
+{
+ ArmDisableInterrupts ();
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ This function retrieves the processor's current interrupt state a returns it in
+ State. If interrupts are currently enabled, then TRUE is returned. If interrupts
+ are currently disabled, then FALSE is returned.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+ @param State A pointer to the processor's current interrupt state. Set to TRUE if
+ interrupts are enabled and FALSE if interrupts are disabled.
+
+ @retval EFI_SUCCESS The processor's current interrupt state was returned in State.
+ @retval EFI_INVALID_PARAMETER State is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuGetInterruptState (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ OUT BOOLEAN *State
+ )
+{
+ if (State == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ *State = ArmGetInterruptState();
+ return EFI_SUCCESS;
+}
+
+
+/**
+ This function generates an INIT on the processor. If this function succeeds, then the
+ processor will be reset, and control will not be returned to the caller. If InitType is
+ not supported by this processor, or the processor cannot programmatically generate an
+ INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error
+ occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+ @param InitType The type of processor INIT to perform.
+
+ @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.
+ @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported
+ by this processor.
+ @retval EFI_DEVICE_ERROR The processor INIT failed.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuInit (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ IN EFI_CPU_INIT_TYPE InitType
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+EFI_STATUS
+EFIAPI
+CpuRegisterInterruptHandler (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
+ )
+{
+ return RegisterInterruptHandler (InterruptType, InterruptHandler);
+}
+
+EFI_STATUS
+EFIAPI
+CpuGetTimerValue (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ IN UINT32 TimerIndex,
+ OUT UINT64 *TimerValue,
+ OUT UINT64 *TimerPeriod OPTIONAL
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ Callback function for idle events.
+
+ @param Event Event whose notification function is being invoked.
+ @param Context The pointer to the notification function's context,
+ which is implementation-dependent.
+
+**/
+VOID
+EFIAPI
+IdleLoopEventCallback (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ CpuSleep ();
+}
+
+//
+// Globals used to initialize the protocol
+//
+EFI_HANDLE mCpuHandle = NULL;
+EFI_CPU_ARCH_PROTOCOL mCpu = {
+ CpuFlushCpuDataCache,
+ CpuEnableInterrupt,
+ CpuDisableInterrupt,
+ CpuGetInterruptState,
+ CpuInit,
+ CpuRegisterInterruptHandler,
+ CpuGetTimerValue,
+ CpuSetMemoryAttributes,
+ 0, // NumberOfTimers
+ 2048, // DmaBufferAlignment
+};
+
+STATIC
+VOID
+InitializeDma (
+ IN OUT EFI_CPU_ARCH_PROTOCOL *CpuArchProtocol
+ )
+{
+ CpuArchProtocol->DmaBufferAlignment = ArmCacheWritebackGranule ();
+}
+
+EFI_STATUS
+CpuDxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT IdleLoopEvent;
+
+ InitializeExceptions (&mCpu);
+
+ InitializeDma (&mCpu);
+
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &mCpuHandle,
+ &gEfiCpuArchProtocolGuid, &mCpu,
+ NULL
+ );
+
+ //
+ // Make sure GCD and MMU settings match. This API calls gDS->SetMemorySpaceAttributes ()
+ // and that calls EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes, so this code needs to go
+ // after the protocol is installed
+ //
+ mIsFlushingGCD = TRUE;
+ SyncCacheConfig (&mCpu);
+ mIsFlushingGCD = FALSE;
+
+ // If the platform is a MPCore system then install the Configuration Table describing the
+ // secondary core states
+ if (ArmIsMpCore()) {
+ PublishArmProcessorTable();
+ }
+
+ //
+ // Setup a callback for idle events
+ //
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ TPL_NOTIFY,
+ IdleLoopEventCallback,
+ NULL,
+ &gIdleLoopEventGuid,
+ &IdleLoopEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuDxe.h b/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuDxe.h new file mode 100644 index 000000000..3fe5c24d5 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuDxe.h @@ -0,0 +1,146 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __CPU_DXE_ARM_EXCEPTION_H__
+#define __CPU_DXE_ARM_EXCEPTION_H__
+
+#include <Uefi.h>
+
+#include <Library/ArmLib.h>
+#include <Library/ArmMmuLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/DxeServicesTableLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/PeCoffGetEntryPointLib.h>
+#include <Library/UefiLib.h>
+#include <Library/CpuLib.h>
+#include <Library/DefaultExceptionHandlerLib.h>
+#include <Library/DebugLib.h>
+
+#include <Guid/DebugImageInfoTable.h>
+#include <Protocol/Cpu.h>
+#include <Protocol/DebugSupport.h>
+#include <Protocol/LoadedImage.h>
+
+extern BOOLEAN mIsFlushingGCD;
+
+/**
+ This function registers and enables the handler specified by InterruptHandler for a processor
+ interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
+ handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
+ The installed handler is called once for each processor interrupt or exception.
+
+ @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
+ are enabled and FALSE if interrupts are disabled.
+ @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
+ when a processor interrupt occurs. If this parameter is NULL, then the handler
+ will be uninstalled.
+
+ @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
+ @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
+ previously installed.
+ @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
+ previously installed.
+ @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
+
+**/
+EFI_STATUS
+RegisterInterruptHandler (
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
+ );
+
+
+/**
+ This function registers and enables the handler specified by InterruptHandler for a processor
+ interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
+ handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
+ The installed handler is called once for each processor interrupt or exception.
+
+ @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
+ are enabled and FALSE if interrupts are disabled.
+ @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
+ when a processor interrupt occurs. If this parameter is NULL, then the handler
+ will be uninstalled.
+
+ @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
+ @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
+ previously installed.
+ @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
+ previously installed.
+ @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
+
+**/
+EFI_STATUS
+RegisterDebuggerInterruptHandler (
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
+ );
+
+
+EFI_STATUS
+EFIAPI
+CpuSetMemoryAttributes (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Attributes
+ );
+
+EFI_STATUS
+InitializeExceptions (
+ IN EFI_CPU_ARCH_PROTOCOL *Cpu
+ );
+
+EFI_STATUS
+SyncCacheConfig (
+ IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
+ );
+
+/**
+ * Publish ARM Processor Data table in UEFI SYSTEM Table.
+ * @param HobStart Pointer to the beginning of the HOB List from PEI.
+ *
+ * Description : This function iterates through HOB list and finds ARM processor Table Entry HOB.
+ * If the ARM processor Table Entry HOB is found, the HOB data is copied to run-time memory
+ * and a pointer is assigned to it in ARM processor table. Then the ARM processor table is
+ * installed in EFI configuration table.
+**/
+VOID
+EFIAPI
+PublishArmProcessorTable(
+ VOID
+ );
+
+// The ARM Attributes might be defined on 64-bit (case of the long format description table)
+UINT64
+EfiAttributeToArmAttribute (
+ IN UINT64 EfiAttributes
+ );
+
+EFI_STATUS
+GetMemoryRegion (
+ IN OUT UINTN *BaseAddress,
+ OUT UINTN *RegionLength,
+ OUT UINTN *RegionAttributes
+ );
+
+EFI_STATUS
+SetGcdMemorySpaceAttributes (
+ IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
+ IN UINTN NumberOfDescriptors,
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Attributes
+ );
+
+#endif // __CPU_DXE_ARM_EXCEPTION_H__
diff --git a/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuDxe.inf b/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuDxe.inf new file mode 100644 index 000000000..e5549fc71 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuDxe.inf @@ -0,0 +1,71 @@ +#/** @file
+#
+# DXE CPU driver
+#
+# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmCpuDxe
+ FILE_GUID = B8D9777E-D72A-451F-9BDB-BAFB52A68415
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = CpuDxeInitialize
+
+[Sources.Common]
+ CpuDxe.c
+ CpuDxe.h
+ CpuMpCore.c
+ CpuMmuCommon.c
+ Exception.c
+
+[Sources.ARM]
+ Arm/Mmu.c
+
+[Sources.AARCH64]
+ AArch64/Mmu.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+
+[LibraryClasses]
+ ArmLib
+ ArmMmuLib
+ BaseMemoryLib
+ CacheMaintenanceLib
+ CpuLib
+ CpuExceptionHandlerLib
+ DebugLib
+ DefaultExceptionHandlerLib
+ DxeServicesTableLib
+ HobLib
+ PeCoffGetEntryPointLib
+ UefiDriverEntryPoint
+ UefiLib
+
+[Protocols]
+ gEfiCpuArchProtocolGuid
+
+[Guids]
+ gEfiDebugImageInfoTableGuid
+ gArmMpCoreInfoGuid
+ gIdleLoopEventGuid
+ gEfiVectorHandoffTableGuid
+
+[Pcd.common]
+ gArmTokenSpaceGuid.PcdVFPEnabled
+
+[FeaturePcd.common]
+ gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
+
+[Depex]
+ gHardwareInterruptProtocolGuid OR gHardwareInterrupt2ProtocolGuid
diff --git a/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c new file mode 100644 index 000000000..cdb1d6786 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c @@ -0,0 +1,211 @@ +/** @file
+*
+* Copyright (c) 2013, ARM Limited. All rights reserved.
+* Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include "CpuDxe.h"
+
+/**
+ Searches memory descriptors covered by given memory range.
+
+ This function searches into the Gcd Memory Space for descriptors
+ (from StartIndex to EndIndex) that contains the memory range
+ specified by BaseAddress and Length.
+
+ @param MemorySpaceMap Gcd Memory Space Map as array.
+ @param NumberOfDescriptors Number of descriptors in map.
+ @param BaseAddress BaseAddress for the requested range.
+ @param Length Length for the requested range.
+ @param StartIndex Start index into the Gcd Memory Space Map.
+ @param EndIndex End index into the Gcd Memory Space Map.
+
+ @retval EFI_SUCCESS Search successfully.
+ @retval EFI_NOT_FOUND The requested descriptors does not exist.
+
+**/
+EFI_STATUS
+SearchGcdMemorySpaces (
+ IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
+ IN UINTN NumberOfDescriptors,
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ OUT UINTN *StartIndex,
+ OUT UINTN *EndIndex
+ )
+{
+ UINTN Index;
+
+ *StartIndex = 0;
+ *EndIndex = 0;
+ for (Index = 0; Index < NumberOfDescriptors; Index++) {
+ if ((BaseAddress >= MemorySpaceMap[Index].BaseAddress) &&
+ (BaseAddress < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
+ *StartIndex = Index;
+ }
+ if (((BaseAddress + Length - 1) >= MemorySpaceMap[Index].BaseAddress) &&
+ ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
+ *EndIndex = Index;
+ return EFI_SUCCESS;
+ }
+ }
+ return EFI_NOT_FOUND;
+}
+
+
+/**
+ Sets the attributes for a specified range in Gcd Memory Space Map.
+
+ This function sets the attributes for a specified range in
+ Gcd Memory Space Map.
+
+ @param MemorySpaceMap Gcd Memory Space Map as array
+ @param NumberOfDescriptors Number of descriptors in map
+ @param BaseAddress BaseAddress for the range
+ @param Length Length for the range
+ @param Attributes Attributes to set
+
+ @retval EFI_SUCCESS Memory attributes set successfully
+ @retval EFI_NOT_FOUND The specified range does not exist in Gcd Memory Space
+
+**/
+EFI_STATUS
+SetGcdMemorySpaceAttributes (
+ IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
+ IN UINTN NumberOfDescriptors,
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Attributes
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ UINTN StartIndex;
+ UINTN EndIndex;
+ EFI_PHYSICAL_ADDRESS RegionStart;
+ UINT64 RegionLength;
+
+ DEBUG ((DEBUG_GCD, "SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n",
+ BaseAddress, BaseAddress + Length, Attributes));
+
+ // We do not support a smaller granularity than 4KB on ARM Architecture
+ if ((Length & EFI_PAGE_MASK) != 0) {
+ DEBUG ((DEBUG_WARN,
+ "Warning: We do not support smaller granularity than 4KB on ARM Architecture (passed length: 0x%lX).\n",
+ Length));
+ }
+
+ //
+ // Get all memory descriptors covered by the memory range
+ //
+ Status = SearchGcdMemorySpaces (
+ MemorySpaceMap,
+ NumberOfDescriptors,
+ BaseAddress,
+ Length,
+ &StartIndex,
+ &EndIndex
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Go through all related descriptors and set attributes accordingly
+ //
+ for (Index = StartIndex; Index <= EndIndex; Index++) {
+ if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
+ continue;
+ }
+ //
+ // Calculate the start and end address of the overlapping range
+ //
+ if (BaseAddress >= MemorySpaceMap[Index].BaseAddress) {
+ RegionStart = BaseAddress;
+ } else {
+ RegionStart = MemorySpaceMap[Index].BaseAddress;
+ }
+ if ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)) {
+ RegionLength = BaseAddress + Length - RegionStart;
+ } else {
+ RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
+ }
+ //
+ // Set memory attributes according to MTRR attribute and the original attribute of descriptor
+ //
+ gDS->SetMemorySpaceAttributes (
+ RegionStart,
+ RegionLength,
+ (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (MemorySpaceMap[Index].Capabilities & Attributes)
+ );
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function modifies the attributes for the memory region specified by BaseAddress and
+ Length from their current attributes to the attributes specified by Attributes.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+ @param BaseAddress The physical address that is the start address of a memory region.
+ @param Length The size in bytes of the memory region.
+ @param Attributes The bit mask of attributes to set for the memory region.
+
+ @retval EFI_SUCCESS The attributes were set for the memory region.
+ @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
+ BaseAddress and Length cannot be modified.
+ @retval EFI_INVALID_PARAMETER Length is zero.
+ @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
+ the memory resource range.
+ @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
+ resource range specified by BaseAddress and Length.
+ The bit mask of attributes is not support for the memory resource
+ range specified by BaseAddress and Length.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuSetMemoryAttributes (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 EfiAttributes
+ )
+{
+ EFI_STATUS Status;
+ UINTN ArmAttributes;
+ UINTN RegionBaseAddress;
+ UINTN RegionLength;
+ UINTN RegionArmAttributes;
+
+ if (mIsFlushingGCD) {
+ return EFI_SUCCESS;
+ }
+
+ if ((BaseAddress & (SIZE_4KB - 1)) != 0) {
+ // Minimum granularity is SIZE_4KB (4KB on ARM)
+ DEBUG ((DEBUG_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum granularity is SIZE_4KB\n", BaseAddress, Length, EfiAttributes));
+ return EFI_UNSUPPORTED;
+ }
+
+ // Convert the 'Attribute' into ARM Attribute
+ ArmAttributes = EfiAttributeToArmAttribute (EfiAttributes);
+
+ // Get the region starting from 'BaseAddress' and its 'Attribute'
+ RegionBaseAddress = BaseAddress;
+ Status = GetMemoryRegion (&RegionBaseAddress, &RegionLength, &RegionArmAttributes);
+
+ // Data & Instruction Caches are flushed when we set new memory attributes.
+ // So, we only set the attributes if the new region is different.
+ if (EFI_ERROR (Status) || (RegionArmAttributes != ArmAttributes) ||
+ ((BaseAddress + Length) > (RegionBaseAddress + RegionLength)))
+ {
+ return ArmSetMemoryAttributes (BaseAddress, Length, EfiAttributes);
+ } else {
+ return EFI_SUCCESS;
+ }
+}
diff --git a/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuMpCore.c b/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuMpCore.c new file mode 100644 index 000000000..d16ae3979 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/CpuDxe/CpuMpCore.c @@ -0,0 +1,97 @@ +/** @file
+*
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/HobLib.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+
+#include <Guid/ArmMpCoreInfo.h>
+
+ARM_PROCESSOR_TABLE mArmProcessorTableTemplate = {
+ {
+ EFI_ARM_PROCESSOR_TABLE_SIGNATURE,
+ 0,
+ EFI_ARM_PROCESSOR_TABLE_REVISION,
+ EFI_ARM_PROCESSOR_TABLE_OEM_ID,
+ EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID,
+ EFI_ARM_PROCESSOR_TABLE_OEM_REVISION,
+ EFI_ARM_PROCESSOR_TABLE_CREATOR_ID,
+ EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION,
+ { 0 },
+ 0
+ }, //ARM Processor table header
+ 0, // Number of entries in ARM processor Table
+ NULL // ARM Processor Table
+};
+
+/** Publish ARM Processor Data table in UEFI SYSTEM Table.
+ * @param: HobStart Pointer to the beginning of the HOB List from PEI.
+ *
+ * Description : This function iterates through HOB list and finds ARM processor Table Entry HOB.
+ * If the ARM processor Table Entry HOB is found, the HOB data is copied to run-time memory
+ * and a pointer is assigned to it in ARM processor table. Then the ARM processor table is
+ * installed in EFI configuration table.
+**/
+VOID
+EFIAPI
+PublishArmProcessorTable (
+ VOID
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ Hob.Raw = GetHobList ();
+
+ // Iterate through the HOBs and find if there is ARM PROCESSOR ENTRY HOB
+ for (; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {
+ // Check for Correct HOB type
+ if ((GET_HOB_TYPE (Hob)) == EFI_HOB_TYPE_GUID_EXTENSION) {
+ // Check for correct GUID type
+ if (CompareGuid(&(Hob.Guid->Name), &gArmMpCoreInfoGuid)) {
+ ARM_PROCESSOR_TABLE *ArmProcessorTable;
+ EFI_STATUS Status;
+
+ // Allocate Runtime memory for ARM processor table
+ ArmProcessorTable = (ARM_PROCESSOR_TABLE*)AllocateRuntimePool(sizeof(ARM_PROCESSOR_TABLE));
+
+ // Check if the memory allocation is successful or not
+ ASSERT(NULL != ArmProcessorTable);
+
+ // Set ARM processor table to default values
+ CopyMem(ArmProcessorTable,&mArmProcessorTableTemplate,sizeof(ARM_PROCESSOR_TABLE));
+
+ // Fill in Length fields of ARM processor table
+ ArmProcessorTable->Header.Length = sizeof(ARM_PROCESSOR_TABLE);
+ ArmProcessorTable->Header.DataLen = GET_GUID_HOB_DATA_SIZE(Hob);
+
+ // Fill in Identifier(ARM processor table GUID)
+ ArmProcessorTable->Header.Identifier = gArmMpCoreInfoGuid;
+
+ // Set Number of ARM core entries in the Table
+ ArmProcessorTable->NumberOfEntries = GET_GUID_HOB_DATA_SIZE(Hob)/sizeof(ARM_CORE_INFO);
+
+ // Allocate runtime memory for ARM processor Table entries
+ ArmProcessorTable->ArmCpus = (ARM_CORE_INFO*)AllocateRuntimePool (
+ ArmProcessorTable->NumberOfEntries * sizeof(ARM_CORE_INFO));
+
+ // Check if the memory allocation is successful or not
+ ASSERT(NULL != ArmProcessorTable->ArmCpus);
+
+ // Copy ARM Processor Table data from HOB list to newly allocated memory
+ CopyMem(ArmProcessorTable->ArmCpus,GET_GUID_HOB_DATA(Hob), ArmProcessorTable->Header.DataLen);
+
+ // Install the ARM Processor table into EFI system configuration table
+ Status = gBS->InstallConfigurationTable (&gArmMpCoreInfoGuid, ArmProcessorTable);
+
+ ASSERT_EFI_ERROR (Status);
+ }
+ }
+ }
+}
diff --git a/roms/edk2/ArmPkg/Drivers/CpuDxe/Exception.c b/roms/edk2/ArmPkg/Drivers/CpuDxe/Exception.c new file mode 100644 index 000000000..50ed50ebb --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/CpuDxe/Exception.c @@ -0,0 +1,98 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Portions Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "CpuDxe.h"
+#include <Library/CpuExceptionHandlerLib.h>
+#include <Guid/VectorHandoffTable.h>
+
+EFI_STATUS
+InitializeExceptions (
+ IN EFI_CPU_ARCH_PROTOCOL *Cpu
+ ) {
+ EFI_STATUS Status;
+ EFI_VECTOR_HANDOFF_INFO *VectorInfoList;
+ EFI_VECTOR_HANDOFF_INFO *VectorInfo;
+ BOOLEAN IrqEnabled;
+ BOOLEAN FiqEnabled;
+
+ VectorInfo = (EFI_VECTOR_HANDOFF_INFO *)NULL;
+ Status = EfiGetSystemConfigurationTable(&gEfiVectorHandoffTableGuid, (VOID **)&VectorInfoList);
+ if (Status == EFI_SUCCESS && VectorInfoList != NULL) {
+ VectorInfo = VectorInfoList;
+ }
+
+ // initialize the CpuExceptionHandlerLib so we take over the exception vector table from the DXE Core
+ InitializeCpuExceptionHandlers(VectorInfo);
+
+ Status = EFI_SUCCESS;
+
+ //
+ // Disable interrupts
+ //
+ Cpu->GetInterruptState (Cpu, &IrqEnabled);
+ Cpu->DisableInterrupt (Cpu);
+
+ //
+ // EFI does not use the FIQ, but a debugger might so we must disable
+ // as we take over the exception vectors.
+ //
+ FiqEnabled = ArmGetFiqState ();
+ ArmDisableFiq ();
+
+ if (FiqEnabled) {
+ ArmEnableFiq ();
+ }
+
+ if (IrqEnabled) {
+ //
+ // Restore interrupt state
+ //
+ Status = Cpu->EnableInterrupt (Cpu);
+ }
+
+ //
+ // On a DEBUG build, unmask SErrors so they are delivered right away rather
+ // than when the OS unmasks them. This gives us a better chance of figuring
+ // out the cause.
+ //
+ DEBUG_CODE (
+ ArmEnableAsynchronousAbort ();
+ );
+
+ return Status;
+}
+
+/**
+This function registers and enables the handler specified by InterruptHandler for a processor
+interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
+handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
+The installed handler is called once for each processor interrupt or exception.
+
+@param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
+are enabled and FALSE if interrupts are disabled.
+@param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
+when a processor interrupt occurs. If this parameter is NULL, then the handler
+will be uninstalled.
+
+@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
+@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
+previously installed.
+@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
+previously installed.
+@retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
+
+**/
+EFI_STATUS
+RegisterInterruptHandler(
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
+ ) {
+ // pass down to CpuExceptionHandlerLib
+ return (EFI_STATUS)RegisterCpuInterruptHandler(InterruptType, InterruptHandler);
+}
diff --git a/roms/edk2/ArmPkg/Drivers/CpuPei/CpuPei.c b/roms/edk2/ArmPkg/Drivers/CpuPei/CpuPei.c new file mode 100644 index 000000000..c44311d6b --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/CpuPei/CpuPei.c @@ -0,0 +1,85 @@ +/**@file
+
+Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
+Copyright (c) 2011-2013, ARM Limited. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+Module Name:
+
+ MemoryInit.c
+
+Abstract:
+
+ PEIM to provide fake memory init
+
+**/
+
+
+
+//
+// The package level header files this module uses
+//
+#include <PiPei.h>
+//
+// The protocols, PPI and GUID definitions for this module
+//
+#include <Ppi/ArmMpCoreInfo.h>
+
+//
+// The Library classes this module consumes
+//
+#include <Library/DebugLib.h>
+#include <Library/PeimEntryPoint.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/PcdLib.h>
+#include <Library/HobLib.h>
+#include <Library/ArmLib.h>
+
+/*++
+
+Routine Description:
+
+Arguments:
+
+ FileHandle - Handle of the file being invoked.
+ PeiServices - Describes the list of possible PEI Services.
+
+Returns:
+
+ Status - EFI_SUCCESS if the boot mode could be set
+
+--*/
+EFI_STATUS
+EFIAPI
+InitializeCpuPeim (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+ ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;
+ UINTN ArmCoreCount;
+ ARM_CORE_INFO *ArmCoreInfoTable;
+
+ // Enable program flow prediction, if supported.
+ ArmEnableBranchPrediction ();
+
+ // Publish the CPU memory and io spaces sizes
+ BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
+
+ // Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
+ Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi);
+ if (!EFI_ERROR(Status)) {
+ // Build the MP Core Info Table
+ ArmCoreCount = 0;
+ Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
+ if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {
+ // Build MPCore Info HOB
+ BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);
+ }
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/CpuPei/CpuPei.inf b/roms/edk2/ArmPkg/Drivers/CpuPei/CpuPei.inf new file mode 100644 index 000000000..a9f85cbc6 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/CpuPei/CpuPei.inf @@ -0,0 +1,52 @@ +## @file
+# Component description file for BootMode module
+#
+# This module provides platform specific function to detect boot mode.
+# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = CpuPei
+ FILE_GUID = 2FD8B7AD-F8FA-4021-9FC0-0AA572147CDC
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = InitializeCpuPeim
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ARM
+#
+
+[Sources]
+ CpuPei.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ PeimEntryPoint
+ DebugLib
+ HobLib
+ ArmLib
+
+[Ppis]
+ gArmMpCoreInfoPpiGuid
+
+[Guids]
+ gArmMpCoreInfoGuid
+
+[FixedPcd]
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
+
+[Depex]
+ gEfiPeiMemoryDiscoveredPpiGuid
+
diff --git a/roms/edk2/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h b/roms/edk2/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h new file mode 100644 index 000000000..c64bc5c46 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h @@ -0,0 +1,24 @@ +/** @file
+*
+* Copyright (c) 2013-2017, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+#ifndef __GENERIC_WATCHDOG_H__
+#define __GENERIC_WATCHDOG_H__
+
+// Refresh Frame:
+#define GENERIC_WDOG_REFRESH_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogRefreshBase) + 0x000)
+
+// Control Frame:
+#define GENERIC_WDOG_CONTROL_STATUS_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x000)
+#define GENERIC_WDOG_OFFSET_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x008)
+#define GENERIC_WDOG_COMPARE_VALUE_REG_LOW ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x010)
+#define GENERIC_WDOG_COMPARE_VALUE_REG_HIGH ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x014)
+
+// Values of bit 0 of the Control/Status Register
+#define GENERIC_WDOG_ENABLED 1
+#define GENERIC_WDOG_DISABLED 0
+
+#endif // __GENERIC_WATCHDOG_H__
diff --git a/roms/edk2/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c b/roms/edk2/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c new file mode 100644 index 000000000..f79cc9170 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c @@ -0,0 +1,363 @@ +/** @file
+*
+* Copyright (c) 2013-2018, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/ArmGenericTimerCounterLib.h>
+
+#include <Protocol/HardwareInterrupt2.h>
+#include <Protocol/WatchdogTimer.h>
+
+#include "GenericWatchdog.h"
+
+/* The number of 100ns periods (the unit of time passed to these functions)
+ in a second */
+#define TIME_UNITS_PER_SECOND 10000000
+
+// Tick frequency of the generic timer basis of the generic watchdog.
+STATIC UINTN mTimerFrequencyHz = 0;
+
+/* In cases where the compare register was set manually, information about
+ how long the watchdog was asked to wait cannot be retrieved from hardware.
+ It is therefore stored here. 0 means the timer is not running. */
+STATIC UINT64 mNumTimerTicks = 0;
+
+STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol;
+STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify;
+
+STATIC
+VOID
+WatchdogWriteOffsetRegister (
+ UINT32 Value
+ )
+{
+ MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value);
+}
+
+STATIC
+VOID
+WatchdogWriteCompareRegister (
+ UINT64 Value
+ )
+{
+ MmioWrite32 (GENERIC_WDOG_COMPARE_VALUE_REG_LOW, Value & MAX_UINT32);
+ MmioWrite32 (GENERIC_WDOG_COMPARE_VALUE_REG_HIGH, (Value >> 32) & MAX_UINT32);
+}
+
+STATIC
+VOID
+WatchdogEnable (
+ VOID
+ )
+{
+ MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_ENABLED);
+}
+
+STATIC
+VOID
+WatchdogDisable (
+ VOID
+ )
+{
+ MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_DISABLED);
+}
+
+/** On exiting boot services we must make sure the Watchdog Timer
+ is stopped.
+**/
+STATIC
+VOID
+EFIAPI
+WatchdogExitBootServicesEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ WatchdogDisable ();
+ mNumTimerTicks = 0;
+}
+
+/* This function is called when the watchdog's first signal (WS0) goes high.
+ It uses the ResetSystem Runtime Service to reset the board.
+*/
+STATIC
+VOID
+EFIAPI
+WatchdogInterruptHandler (
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ STATIC CONST CHAR16 ResetString[]= L"The generic watchdog timer ran out.";
+ UINT64 TimerPeriod;
+
+ WatchdogDisable ();
+
+ mInterruptProtocol->EndOfInterrupt (mInterruptProtocol, Source);
+
+ //
+ // The notify function should be called with the elapsed number of ticks
+ // since the watchdog was armed, which should exceed the timer period.
+ // We don't actually know the elapsed number of ticks, so let's return
+ // the timer period plus 1.
+ //
+ if (mWatchdogNotify != NULL) {
+ TimerPeriod = ((TIME_UNITS_PER_SECOND / mTimerFrequencyHz) * mNumTimerTicks);
+ mWatchdogNotify (TimerPeriod + 1);
+ }
+
+ gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, StrSize (ResetString),
+ (CHAR16 *)ResetString);
+
+ // If we got here then the reset didn't work
+ ASSERT (FALSE);
+}
+
+/**
+ This function registers the handler NotifyFunction so it is called every time
+ the watchdog timer expires. It also passes the amount of time since the last
+ handler call to the NotifyFunction.
+ If NotifyFunction is not NULL and a handler is not already registered,
+ then the new handler is registered and EFI_SUCCESS is returned.
+ If NotifyFunction is NULL, and a handler is already registered,
+ then that handler is unregistered.
+ If an attempt is made to register a handler when a handler is already
+ registered, then EFI_ALREADY_STARTED is returned.
+ If an attempt is made to unregister a handler when a handler is not
+ registered, then EFI_INVALID_PARAMETER is returned.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param NotifyFunction The function to call when a timer interrupt fires.
+ This function executes at TPL_HIGH_LEVEL. The DXE
+ Core will register a handler for the timer interrupt,
+ so it can know how much time has passed. This
+ information is used to signal timer based events.
+ NULL will unregister the handler.
+
+ @retval EFI_UNSUPPORTED The code does not support NotifyFunction.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+WatchdogRegisterHandler (
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
+ )
+{
+ if (mWatchdogNotify == NULL && NotifyFunction == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (mWatchdogNotify != NULL && NotifyFunction != NULL) {
+ return EFI_ALREADY_STARTED;
+ }
+
+ mWatchdogNotify = NotifyFunction;
+ return EFI_SUCCESS;
+}
+
+/**
+ This function sets the amount of time to wait before firing the watchdog
+ timer to TimerPeriod 100ns units. If TimerPeriod is 0, then the watchdog
+ timer is disabled.
+
+ @param This The EFI_WATCHDOG_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod The amount of time in 100ns units to wait before
+ the watchdog timer is fired. If TimerPeriod is zero,
+ then the watchdog timer is disabled.
+
+ @retval EFI_SUCCESS The watchdog timer has been programmed to fire
+ in TimerPeriod 100ns units.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+WatchdogSetTimerPeriod (
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
+ IN UINT64 TimerPeriod // In 100ns units
+ )
+{
+ UINTN SystemCount;
+
+ // if TimerPeriod is 0, this is a request to stop the watchdog.
+ if (TimerPeriod == 0) {
+ mNumTimerTicks = 0;
+ WatchdogDisable ();
+ return EFI_SUCCESS;
+ }
+
+ // Work out how many timer ticks will equate to TimerPeriod
+ mNumTimerTicks = (mTimerFrequencyHz * TimerPeriod) / TIME_UNITS_PER_SECOND;
+
+ /* If the number of required ticks is greater than the max the watchdog's
+ offset register (WOR) can hold, we need to manually compute and set
+ the compare register (WCV) */
+ if (mNumTimerTicks > MAX_UINT32) {
+ /* We need to enable the watchdog *before* writing to the compare register,
+ because enabling the watchdog causes an "explicit refresh", which
+ clobbers the compare register (WCV). In order to make sure this doesn't
+ trigger an interrupt, set the offset to max. */
+ WatchdogWriteOffsetRegister (MAX_UINT32);
+ WatchdogEnable ();
+ SystemCount = ArmGenericTimerGetSystemCount ();
+ WatchdogWriteCompareRegister (SystemCount + mNumTimerTicks);
+ } else {
+ WatchdogWriteOffsetRegister ((UINT32)mNumTimerTicks);
+ WatchdogEnable ();
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function retrieves the period of timer interrupts in 100ns units,
+ returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
+ is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
+ returned, then the timer is currently disabled.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod A pointer to the timer period to retrieve in
+ 100ns units. If 0 is returned, then the timer is
+ currently disabled.
+
+
+ @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
+ @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+WatchdogGetTimerPeriod (
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
+ OUT UINT64 *TimerPeriod
+ )
+{
+ if (TimerPeriod == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ *TimerPeriod = ((TIME_UNITS_PER_SECOND / mTimerFrequencyHz) * mNumTimerTicks);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Interface structure for the Watchdog Architectural Protocol.
+
+ @par Protocol Description:
+ This protocol provides a service to set the amount of time to wait
+ before firing the watchdog timer, and it also provides a service to
+ register a handler that is invoked when the watchdog timer fires.
+
+ @par When the watchdog timer fires, control will be passed to a handler
+ if one has been registered. If no handler has been registered,
+ or the registered handler returns, then the system will be
+ reset by calling the Runtime Service ResetSystem().
+
+ @param RegisterHandler
+ Registers a handler that will be called each time the
+ watchdogtimer interrupt fires. TimerPeriod defines the minimum
+ time between timer interrupts, so TimerPeriod will also
+ be the minimum time between calls to the registered
+ handler.
+ NOTE: If the watchdog resets the system in hardware, then
+ this function will not have any chance of executing.
+
+ @param SetTimerPeriod
+ Sets the period of the timer interrupt in 100ns units.
+ This function is optional, and may return EFI_UNSUPPORTED.
+ If this function is supported, then the timer period will
+ be rounded up to the nearest supported timer period.
+
+ @param GetTimerPeriod
+ Retrieves the period of the timer interrupt in 100ns units.
+
+**/
+STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = {
+ WatchdogRegisterHandler,
+ WatchdogSetTimerPeriod,
+ WatchdogGetTimerPeriod
+};
+
+STATIC EFI_EVENT mEfiExitBootServicesEvent;
+
+EFI_STATUS
+EFIAPI
+GenericWatchdogEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+
+ Status = gBS->LocateProtocol (&gHardwareInterrupt2ProtocolGuid, NULL,
+ (VOID **)&mInterruptProtocol);
+ ASSERT_EFI_ERROR (Status);
+
+ /* Make sure the Watchdog Timer Architectural Protocol has not been installed
+ in the system yet.
+ This will avoid conflicts with the universal watchdog */
+ ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid);
+
+ mTimerFrequencyHz = ArmGenericTimerGetTimerFreq ();
+ ASSERT (mTimerFrequencyHz != 0);
+
+ // Install interrupt handler
+ Status = mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
+ FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
+ WatchdogInterruptHandler);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = mInterruptProtocol->SetTriggerType (mInterruptProtocol,
+ FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
+ EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING);
+ if (EFI_ERROR (Status)) {
+ goto UnregisterHandler;
+ }
+
+ // Install the Timer Architectural Protocol onto a new handle
+ Handle = NULL;
+ Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
+ &gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer,
+ NULL);
+ if (EFI_ERROR (Status)) {
+ goto UnregisterHandler;
+ }
+
+ // Register for an ExitBootServicesEvent
+ Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
+ WatchdogExitBootServicesEvent, NULL,
+ &mEfiExitBootServicesEvent);
+ ASSERT_EFI_ERROR (Status);
+
+ mNumTimerTicks = 0;
+ WatchdogDisable ();
+
+ return EFI_SUCCESS;
+
+UnregisterHandler:
+ // Unregister the handler
+ mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
+ FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
+ NULL);
+ return Status;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf b/roms/edk2/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf new file mode 100644 index 000000000..d725a2c85 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf @@ -0,0 +1,46 @@ +#
+# Copyright (c) 2013-2017, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+[Defines]
+ INF_VERSION = 0x00010016
+ BASE_NAME = GenericWatchdogDxe
+ FILE_GUID = 0619f5c2-4858-4caa-a86a-73a21a18df6b
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = GenericWatchdogEntry
+
+[Sources.common]
+ GenericWatchdogDxe.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ ArmGenericTimerCounterLib
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ IoLib
+ PcdLib
+ UefiLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ UefiRuntimeServicesTableLib
+
+[Pcd.common]
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
+
+[Protocols]
+ gEfiWatchdogTimerArchProtocolGuid ## ALWAYS_PRODUCES
+ gHardwareInterrupt2ProtocolGuid ## ALWAYS_CONSUMES
+
+[Depex]
+ gHardwareInterrupt2ProtocolGuid
diff --git a/roms/edk2/ArmPkg/Drivers/MmCommunicationDxe/MmCommunicate.h b/roms/edk2/ArmPkg/Drivers/MmCommunicationDxe/MmCommunicate.h new file mode 100644 index 000000000..fcc346ba7 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/MmCommunicationDxe/MmCommunicate.h @@ -0,0 +1,22 @@ +/** @file
+
+ Copyright (c) 2016-2018, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#if !defined _MM_COMMUNICATE_H_
+#define _MM_COMMUNICATE_H_
+
+#define MM_MAJOR_VER_MASK 0xEFFF0000
+#define MM_MINOR_VER_MASK 0x0000FFFF
+#define MM_MAJOR_VER_SHIFT 16
+
+#define MM_MAJOR_VER(x) (((x) & MM_MAJOR_VER_MASK) >> MM_MAJOR_VER_SHIFT)
+#define MM_MINOR_VER(x) ((x) & MM_MINOR_VER_MASK)
+
+#define MM_CALLER_MAJOR_VER 0x1UL
+#define MM_CALLER_MINOR_VER 0x0
+
+#endif /* _MM_COMMUNICATE_H_ */
diff --git a/roms/edk2/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c b/roms/edk2/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c new file mode 100644 index 000000000..9457eaf1d --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c @@ -0,0 +1,412 @@ +/** @file
+
+ Copyright (c) 2016-2019, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmSmcLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DxeServicesTableLib.h>
+#include <Library/HobLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+
+#include <Protocol/MmCommunication2.h>
+
+#include <IndustryStandard/ArmStdSmc.h>
+
+#include "MmCommunicate.h"
+
+//
+// Address, Length of the pre-allocated buffer for communication with the secure
+// world.
+//
+STATIC ARM_MEMORY_REGION_DESCRIPTOR mNsCommBuffMemRegion;
+
+// Notification event when virtual address map is set.
+STATIC EFI_EVENT mSetVirtualAddressMapEvent;
+
+//
+// Handle to install the MM Communication Protocol
+//
+STATIC EFI_HANDLE mMmCommunicateHandle;
+
+/**
+ Communicates with a registered handler.
+
+ This function provides a service to send and receive messages from a registered UEFI service.
+
+ @param[in] This The EFI_MM_COMMUNICATION_PROTOCOL instance.
+ @param[in] CommBufferPhysical Physical address of the MM communication buffer
+ @param[in] CommBufferVirtual Virtual address of the MM communication buffer
+ @param[in] CommSize The size of the data buffer being passed in. On exit, the size of data
+ being returned. Zero if the handler does not wish to reply with any data.
+ This parameter is optional and may be NULL.
+
+ @retval EFI_SUCCESS The message was successfully posted.
+ @retval EFI_INVALID_PARAMETER CommBufferPhysical was NULL or CommBufferVirtual was NULL.
+ @retval EFI_BAD_BUFFER_SIZE The buffer is too large for the MM implementation.
+ If this error is returned, the MessageLength field
+ in the CommBuffer header or the integer pointed by
+ CommSize, are updated to reflect the maximum payload
+ size the implementation can accommodate.
+ @retval EFI_ACCESS_DENIED The CommunicateBuffer parameter or CommSize parameter,
+ if not omitted, are in address range that cannot be
+ accessed by the MM environment.
+
+**/
+EFI_STATUS
+EFIAPI
+MmCommunication2Communicate (
+ IN CONST EFI_MM_COMMUNICATION2_PROTOCOL *This,
+ IN OUT VOID *CommBufferPhysical,
+ IN OUT VOID *CommBufferVirtual,
+ IN OUT UINTN *CommSize OPTIONAL
+ )
+{
+ EFI_MM_COMMUNICATE_HEADER *CommunicateHeader;
+ ARM_SMC_ARGS CommunicateSmcArgs;
+ EFI_STATUS Status;
+ UINTN BufferSize;
+
+ Status = EFI_ACCESS_DENIED;
+ BufferSize = 0;
+
+ ZeroMem (&CommunicateSmcArgs, sizeof (ARM_SMC_ARGS));
+
+ //
+ // Check parameters
+ //
+ if (CommBufferVirtual == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ CommunicateHeader = CommBufferVirtual;
+ // CommBuffer is a mandatory parameter. Hence, Rely on
+ // MessageLength + Header to ascertain the
+ // total size of the communication payload rather than
+ // rely on optional CommSize parameter
+ BufferSize = CommunicateHeader->MessageLength +
+ sizeof (CommunicateHeader->HeaderGuid) +
+ sizeof (CommunicateHeader->MessageLength);
+
+ // If the length of the CommBuffer is 0 then return the expected length.
+ if (CommSize) {
+ // This case can be used by the consumer of this driver to find out the
+ // max size that can be used for allocating CommBuffer.
+ if ((*CommSize == 0) ||
+ (*CommSize > mNsCommBuffMemRegion.Length)) {
+ *CommSize = mNsCommBuffMemRegion.Length;
+ return EFI_BAD_BUFFER_SIZE;
+ }
+ //
+ // CommSize must match MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER);
+ //
+ if (*CommSize != BufferSize) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ //
+ // If the buffer size is 0 or greater than what can be tolerated by the MM
+ // environment then return the expected size.
+ //
+ if ((BufferSize == 0) ||
+ (BufferSize > mNsCommBuffMemRegion.Length)) {
+ CommunicateHeader->MessageLength = mNsCommBuffMemRegion.Length -
+ sizeof (CommunicateHeader->HeaderGuid) -
+ sizeof (CommunicateHeader->MessageLength);
+ return EFI_BAD_BUFFER_SIZE;
+ }
+
+ // SMC Function ID
+ CommunicateSmcArgs.Arg0 = ARM_SMC_ID_MM_COMMUNICATE_AARCH64;
+
+ // Cookie
+ CommunicateSmcArgs.Arg1 = 0;
+
+ // Copy Communication Payload
+ CopyMem ((VOID *)mNsCommBuffMemRegion.VirtualBase, CommBufferVirtual, BufferSize);
+
+ // comm_buffer_address (64-bit physical address)
+ CommunicateSmcArgs.Arg2 = (UINTN)mNsCommBuffMemRegion.PhysicalBase;
+
+ // comm_size_address (not used, indicated by setting to zero)
+ CommunicateSmcArgs.Arg3 = 0;
+
+ // Call the Standalone MM environment.
+ ArmCallSmc (&CommunicateSmcArgs);
+
+ switch (CommunicateSmcArgs.Arg0) {
+ case ARM_SMC_MM_RET_SUCCESS:
+ ZeroMem (CommBufferVirtual, BufferSize);
+ // On successful return, the size of data being returned is inferred from
+ // MessageLength + Header.
+ CommunicateHeader = (EFI_MM_COMMUNICATE_HEADER *)mNsCommBuffMemRegion.VirtualBase;
+ BufferSize = CommunicateHeader->MessageLength +
+ sizeof (CommunicateHeader->HeaderGuid) +
+ sizeof (CommunicateHeader->MessageLength);
+
+ CopyMem (
+ CommBufferVirtual,
+ (VOID *)mNsCommBuffMemRegion.VirtualBase,
+ BufferSize
+ );
+ Status = EFI_SUCCESS;
+ break;
+
+ case ARM_SMC_MM_RET_INVALID_PARAMS:
+ Status = EFI_INVALID_PARAMETER;
+ break;
+
+ case ARM_SMC_MM_RET_DENIED:
+ Status = EFI_ACCESS_DENIED;
+ break;
+
+ case ARM_SMC_MM_RET_NO_MEMORY:
+ // Unexpected error since the CommSize was checked for zero length
+ // prior to issuing the SMC
+ Status = EFI_OUT_OF_RESOURCES;
+ ASSERT (0);
+ break;
+
+ default:
+ Status = EFI_ACCESS_DENIED;
+ ASSERT (0);
+ }
+
+ return Status;
+}
+
+//
+// MM Communication Protocol instance
+//
+STATIC EFI_MM_COMMUNICATION2_PROTOCOL mMmCommunication2 = {
+ MmCommunication2Communicate
+};
+
+/**
+ Notification callback on SetVirtualAddressMap event.
+
+ This function notifies the MM communication protocol interface on
+ SetVirtualAddressMap event and converts pointers used in this driver
+ from physical to virtual address.
+
+ @param Event SetVirtualAddressMap event.
+ @param Context A context when the SetVirtualAddressMap triggered.
+
+ @retval EFI_SUCCESS The function executed successfully.
+ @retval Other Some error occurred when executing this function.
+
+**/
+STATIC
+VOID
+EFIAPI
+NotifySetVirtualAddressMap (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gRT->ConvertPointer (
+ EFI_OPTIONAL_PTR,
+ (VOID **)&mNsCommBuffMemRegion.VirtualBase
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "NotifySetVirtualAddressMap():"
+ " Unable to convert MM runtime pointer. Status:0x%r\n", Status));
+ }
+
+}
+
+STATIC
+EFI_STATUS
+GetMmCompatibility ()
+{
+ EFI_STATUS Status;
+ UINT32 MmVersion;
+ ARM_SMC_ARGS MmVersionArgs;
+
+ // MM_VERSION uses SMC32 calling conventions
+ MmVersionArgs.Arg0 = ARM_SMC_ID_MM_VERSION_AARCH32;
+
+ ArmCallSmc (&MmVersionArgs);
+
+ MmVersion = MmVersionArgs.Arg0;
+
+ if ((MM_MAJOR_VER(MmVersion) == MM_CALLER_MAJOR_VER) &&
+ (MM_MINOR_VER(MmVersion) >= MM_CALLER_MINOR_VER)) {
+ DEBUG ((DEBUG_INFO, "MM Version: Major=0x%x, Minor=0x%x\n",
+ MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion)));
+ Status = EFI_SUCCESS;
+ } else {
+ DEBUG ((DEBUG_ERROR, "Incompatible MM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",
+ MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion), MM_CALLER_MAJOR_VER, MM_CALLER_MINOR_VER));
+ Status = EFI_UNSUPPORTED;
+ }
+
+ return Status;
+}
+
+STATIC EFI_GUID* CONST mGuidedEventGuid[] = {
+ &gEfiEndOfDxeEventGroupGuid,
+ &gEfiEventExitBootServicesGuid,
+ &gEfiEventReadyToBootGuid,
+};
+
+STATIC EFI_EVENT mGuidedEvent[ARRAY_SIZE (mGuidedEventGuid)];
+
+/**
+ Event notification that is fired when GUIDed Event Group is signaled.
+
+ @param Event The Event that is being processed, not used.
+ @param Context Event Context, not used.
+
+**/
+STATIC
+VOID
+EFIAPI
+MmGuidedEventNotify (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_MM_COMMUNICATE_HEADER Header;
+ UINTN Size;
+
+ //
+ // Use Guid to initialize EFI_SMM_COMMUNICATE_HEADER structure
+ //
+ CopyGuid (&Header.HeaderGuid, Context);
+ Header.MessageLength = 1;
+ Header.Data[0] = 0;
+
+ Size = sizeof (Header);
+ MmCommunication2Communicate (&mMmCommunication2, &Header, &Header, &Size);
+}
+
+/**
+ The Entry Point for MM Communication
+
+ This function installs the MM communication protocol interface and finds out
+ what type of buffer management will be required prior to invoking the
+ communication SMC.
+
+ @param ImageHandle The firmware allocated handle for the EFI image.
+ @param SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The entry point is executed successfully.
+ @retval Other Some error occurred when executing this entry point.
+
+**/
+EFI_STATUS
+EFIAPI
+MmCommunication2Initialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+
+ // Check if we can make the MM call
+ Status = GetMmCompatibility ();
+ if (EFI_ERROR(Status)) {
+ goto ReturnErrorStatus;
+ }
+
+ mNsCommBuffMemRegion.PhysicalBase = PcdGet64 (PcdMmBufferBase);
+ // During boot , Virtual and Physical are same
+ mNsCommBuffMemRegion.VirtualBase = mNsCommBuffMemRegion.PhysicalBase;
+ mNsCommBuffMemRegion.Length = PcdGet64 (PcdMmBufferSize);
+
+ ASSERT (mNsCommBuffMemRegion.PhysicalBase != 0);
+
+ ASSERT (mNsCommBuffMemRegion.Length != 0);
+
+ Status = gDS->AddMemorySpace (
+ EfiGcdMemoryTypeReserved,
+ mNsCommBuffMemRegion.PhysicalBase,
+ mNsCommBuffMemRegion.Length,
+ EFI_MEMORY_WB |
+ EFI_MEMORY_XP |
+ EFI_MEMORY_RUNTIME
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
+ "Failed to add MM-NS Buffer Memory Space\n"));
+ goto ReturnErrorStatus;
+ }
+
+ Status = gDS->SetMemorySpaceAttributes (
+ mNsCommBuffMemRegion.PhysicalBase,
+ mNsCommBuffMemRegion.Length,
+ EFI_MEMORY_WB | EFI_MEMORY_XP | EFI_MEMORY_RUNTIME
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
+ "Failed to set MM-NS Buffer Memory attributes\n"));
+ goto CleanAddedMemorySpace;
+ }
+
+ // Install the communication protocol
+ Status = gBS->InstallProtocolInterface (
+ &mMmCommunicateHandle,
+ &gEfiMmCommunication2ProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &mMmCommunication2
+ );
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "MmCommunicationInitialize: "
+ "Failed to install MM communication protocol\n"));
+ goto CleanAddedMemorySpace;
+ }
+
+ // Register notification callback when virtual address is associated
+ // with the physical address.
+ // Create a Set Virtual Address Map event.
+ Status = gBS->CreateEvent (
+ EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE,
+ TPL_NOTIFY,
+ NotifySetVirtualAddressMap,
+ NULL,
+ &mSetVirtualAddressMapEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ for (Index = 0; Index < ARRAY_SIZE (mGuidedEventGuid); Index++) {
+ Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
+ MmGuidedEventNotify, mGuidedEventGuid[Index],
+ mGuidedEventGuid[Index], &mGuidedEvent[Index]);
+ ASSERT_EFI_ERROR (Status);
+ if (EFI_ERROR (Status)) {
+ while (Index-- > 0) {
+ gBS->CloseEvent (mGuidedEvent[Index]);
+ }
+ goto UninstallProtocol;
+ }
+ }
+ return EFI_SUCCESS;
+
+UninstallProtocol:
+ gBS->UninstallProtocolInterface (
+ mMmCommunicateHandle,
+ &gEfiMmCommunication2ProtocolGuid,
+ &mMmCommunication2
+ );
+
+CleanAddedMemorySpace:
+ gDS->RemoveMemorySpace (
+ mNsCommBuffMemRegion.PhysicalBase,
+ mNsCommBuffMemRegion.Length
+ );
+
+ReturnErrorStatus:
+ return EFI_INVALID_PARAMETER;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf b/roms/edk2/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf new file mode 100644 index 000000000..2465fb77c --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf @@ -0,0 +1,55 @@ +#/** @file
+#
+# DXE MM Communicate driver
+#
+# Copyright (c) 2016 - 2019, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = ArmMmCommunication
+ FILE_GUID = 09EE81D3-F15E-43F4-85B4-CB9873DA5D6B
+ MODULE_TYPE = DXE_RUNTIME_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = MmCommunication2Initialize
+
+#
+# The following is for reference only and not required by
+# build tools
+#
+# VALID_ARCHITECTURES = AARCH64
+#
+
+[Sources.AARCH64]
+ MmCommunication.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ ArmLib
+ ArmSmcLib
+ BaseMemoryLib
+ DebugLib
+ DxeServicesTableLib
+ HobLib
+ UefiDriverEntryPoint
+
+[Protocols]
+ gEfiMmCommunication2ProtocolGuid ## PRODUCES
+
+[Guids]
+ gEfiEndOfDxeEventGroupGuid
+ gEfiEventExitBootServicesGuid
+ gEfiEventReadyToBootGuid
+
+[Pcd.common]
+ gArmTokenSpaceGuid.PcdMmBufferBase
+ gArmTokenSpaceGuid.PcdMmBufferSize
+
+[Depex]
+ gEfiCpuArchProtocolGuid
diff --git a/roms/edk2/ArmPkg/Drivers/TimerDxe/TimerDxe.c b/roms/edk2/ArmPkg/Drivers/TimerDxe/TimerDxe.c new file mode 100644 index 000000000..dccaeae23 --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/TimerDxe/TimerDxe.c @@ -0,0 +1,428 @@ +/** @file
+ Timer Architecture Protocol driver of the ARM flavor
+
+ Copyright (c) 2011-2013 ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#include <PiDxe.h>
+
+#include <Library/ArmLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <Library/ArmGenericTimerCounterLib.h>
+
+#include <Protocol/Timer.h>
+#include <Protocol/HardwareInterrupt.h>
+
+// The notification function to call on every timer interrupt.
+EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL;
+EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
+
+// The current period of the timer interrupt
+UINT64 mTimerPeriod = 0;
+// The latest Timer Tick calculated for mTimerPeriod
+UINT64 mTimerTicks = 0;
+// Number of elapsed period since the last Timer interrupt
+UINT64 mElapsedPeriod = 1;
+
+// Cached copy of the Hardware Interrupt protocol instance
+EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL;
+
+/**
+ This function registers the handler NotifyFunction so it is called every time
+ the timer interrupt fires. It also passes the amount of time since the last
+ handler call to the NotifyFunction. If NotifyFunction is NULL, then the
+ handler is unregistered. If the handler is registered, then EFI_SUCCESS is
+ returned. If the CPU does not support registering a timer interrupt handler,
+ then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler
+ when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+ If an attempt is made to unregister a handler when a handler is not registered,
+ then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to
+ register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
+ is returned.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param NotifyFunction The function to call when a timer interrupt fires. This
+ function executes at TPL_HIGH_LEVEL. The DXE Core will
+ register a handler for the timer interrupt, so it can know
+ how much time has passed. This information is used to
+ signal timer based events. NULL will unregister the handler.
+ @retval EFI_SUCCESS The timer handler was registered.
+ @retval EFI_UNSUPPORTED The platform does not support timer interrupts.
+ @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
+ registered.
+ @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
+ previously registered.
+ @retval EFI_DEVICE_ERROR The timer handler could not be registered.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverRegisterHandler (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_TIMER_NOTIFY NotifyFunction
+ )
+{
+ if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) {
+ return EFI_ALREADY_STARTED;
+ }
+
+ mTimerNotifyFunction = NotifyFunction;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Disable the timer
+**/
+VOID
+EFIAPI
+ExitBootServicesEvent (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ ArmGenericTimerDisableTimer ();
+}
+
+/**
+
+ This function adjusts the period of timer interrupts to the value specified
+ by TimerPeriod. If the timer period is updated, then the selected timer
+ period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+ If an error occurs while attempting to update the timer period, then the
+ timer hardware will be put back in its state prior to this call, and
+ EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
+ is disabled. This is not the same as disabling the CPU's interrupts.
+ Instead, it must either turn off the timer hardware, or it must adjust the
+ interrupt controller so that a CPU interrupt is not generated when the timer
+ interrupt fires.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is
+ returned. If the timer is programmable, then the timer period
+ will be rounded up to the nearest timer period that is supported
+ by the timer hardware. If TimerPeriod is set to 0, then the
+ timer interrupts will be disabled.
+
+
+ @retval EFI_SUCCESS The timer period was changed.
+ @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
+ @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverSetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN UINT64 TimerPeriod
+ )
+{
+ UINT64 CounterValue;
+ UINT64 TimerTicks;
+ EFI_TPL OriginalTPL;
+
+ // Always disable the timer
+ ArmGenericTimerDisableTimer ();
+
+ if (TimerPeriod != 0) {
+ // mTimerTicks = TimerPeriod in 1ms unit x Frequency.10^-3
+ // = TimerPeriod.10^-4 x Frequency.10^-3
+ // = (TimerPeriod x Frequency) x 10^-7
+ TimerTicks = MultU64x32 (TimerPeriod, ArmGenericTimerGetTimerFreq ());
+ TimerTicks = DivU64x32 (TimerTicks, 10000000U);
+
+ // Raise TPL to update the mTimerTicks and mTimerPeriod to ensure these values
+ // are coherent in the interrupt handler
+ OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+ mTimerTicks = TimerTicks;
+ mTimerPeriod = TimerPeriod;
+ mElapsedPeriod = 1;
+
+ gBS->RestoreTPL (OriginalTPL);
+
+ // Get value of the current timer
+ CounterValue = ArmGenericTimerGetSystemCount ();
+ // Set the interrupt in Current Time + mTimerTick
+ ArmGenericTimerSetCompareVal (CounterValue + mTimerTicks);
+
+ // Enable the timer
+ ArmGenericTimerEnableTimer ();
+ } else {
+ // Save the new timer period
+ mTimerPeriod = TimerPeriod;
+ // Reset the elapsed period
+ mElapsedPeriod = 1;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function retrieves the period of timer interrupts in 100 ns units,
+ returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
+ is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
+ returned, then the timer is currently disabled.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
+ 0 is returned, then the timer is currently disabled.
+
+
+ @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
+ @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ OUT UINT64 *TimerPeriod
+ )
+{
+ if (TimerPeriod == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ *TimerPeriod = mTimerPeriod;
+ return EFI_SUCCESS;
+}
+
+/**
+ This function generates a soft timer interrupt. If the platform does not support soft
+ timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.
+ If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()
+ service, then a soft timer interrupt will be generated. If the timer interrupt is
+ enabled when this service is called, then the registered handler will be invoked. The
+ registered handler should not be able to distinguish a hardware-generated timer
+ interrupt from a software-generated timer interrupt.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The soft timer interrupt was generated.
+ @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGenerateSoftInterrupt (
+ IN EFI_TIMER_ARCH_PROTOCOL *This
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ Interface structure for the Timer Architectural Protocol.
+
+ @par Protocol Description:
+ This protocol provides the services to initialize a periodic timer
+ interrupt, and to register a handler that is called each time the timer
+ interrupt fires. It may also provide a service to adjust the rate of the
+ periodic timer interrupt. When a timer interrupt occurs, the handler is
+ passed the amount of time that has passed since the previous timer
+ interrupt.
+
+ @param RegisterHandler
+ Registers a handler that will be called each time the
+ timer interrupt fires. TimerPeriod defines the minimum
+ time between timer interrupts, so TimerPeriod will also
+ be the minimum time between calls to the registered
+ handler.
+
+ @param SetTimerPeriod
+ Sets the period of the timer interrupt in 100 nS units.
+ This function is optional, and may return EFI_UNSUPPORTED.
+ If this function is supported, then the timer period will
+ be rounded up to the nearest supported timer period.
+
+
+ @param GetTimerPeriod
+ Retrieves the period of the timer interrupt in 100 nS units.
+
+ @param GenerateSoftInterrupt
+ Generates a soft timer interrupt that simulates the firing of
+ the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for
+ a period of time.
+
+**/
+EFI_TIMER_ARCH_PROTOCOL gTimer = {
+ TimerDriverRegisterHandler,
+ TimerDriverSetTimerPeriod,
+ TimerDriverGetTimerPeriod,
+ TimerDriverGenerateSoftInterrupt
+};
+
+/**
+
+ C Interrupt Handler called in the interrupt context when Source interrupt is active.
+
+
+ @param Source Source of the interrupt. Hardware routing off a specific platform defines
+ what source means.
+
+ @param SystemContext Pointer to system register context. Mostly used by debuggers and will
+ update the system context after the return from the interrupt if
+ modified. Don't change these values unless you know what you are doing
+
+**/
+VOID
+EFIAPI
+TimerInterruptHandler (
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ EFI_TPL OriginalTPL;
+ UINT64 CurrentValue;
+ UINT64 CompareValue;
+
+ //
+ // DXE core uses this callback for the EFI timer tick. The DXE core uses locks
+ // that raise to TPL_HIGH and then restore back to current level. Thus we need
+ // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick.
+ //
+ OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+ // Signal end of interrupt early to help avoid losing subsequent ticks
+ // from long duration handlers
+ gInterrupt->EndOfInterrupt (gInterrupt, Source);
+
+ // Check if the timer interrupt is active
+ if ((ArmGenericTimerGetTimerCtrlReg () ) & ARM_ARCH_TIMER_ISTATUS) {
+
+ if (mTimerNotifyFunction) {
+ mTimerNotifyFunction (mTimerPeriod * mElapsedPeriod);
+ }
+
+ //
+ // Reload the Timer
+ //
+
+ // Get current counter value
+ CurrentValue = ArmGenericTimerGetSystemCount ();
+ // Get the counter value to compare with
+ CompareValue = ArmGenericTimerGetCompareVal ();
+
+ // This loop is needed in case we missed interrupts (eg: case when the interrupt handling
+ // has taken longer than mTickPeriod).
+ // Note: Physical Counter is counting up
+ mElapsedPeriod = 0;
+ do {
+ CompareValue += mTimerTicks;
+ mElapsedPeriod++;
+ } while (CompareValue < CurrentValue);
+
+ // Set next compare value
+ ArmGenericTimerSetCompareVal (CompareValue);
+ ArmGenericTimerReenableTimer ();
+ ArmInstructionSynchronizationBarrier ();
+ }
+
+ gBS->RestoreTPL (OriginalTPL);
+}
+
+
+/**
+ Initialize the state information for the Timer Architectural Protocol and
+ the Timer Debug support protocol that allows the debugger to break into a
+ running program.
+
+ @param ImageHandle of the loaded driver
+ @param SystemTable Pointer to the System Table
+
+ @retval EFI_SUCCESS Protocol registered
+ @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
+ @retval EFI_DEVICE_ERROR Hardware problems
+
+**/
+EFI_STATUS
+EFIAPI
+TimerInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_HANDLE Handle = NULL;
+ EFI_STATUS Status;
+ UINTN TimerCtrlReg;
+ UINT32 TimerHypIntrNum;
+
+ if (ArmIsArchTimerImplemented () == 0) {
+ DEBUG ((DEBUG_ERROR, "ARM Architectural Timer is not available in the CPU, hence can't use this Driver \n"));
+ ASSERT (0);
+ }
+
+ // Find the interrupt controller protocol. ASSERT if not found.
+ Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt);
+ ASSERT_EFI_ERROR (Status);
+
+ // Disable the timer
+ TimerCtrlReg = ArmGenericTimerGetTimerCtrlReg ();
+ TimerCtrlReg |= ARM_ARCH_TIMER_IMASK;
+ TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;
+ ArmGenericTimerSetTimerCtrlReg (TimerCtrlReg);
+ Status = TimerDriverSetTimerPeriod (&gTimer, 0);
+ ASSERT_EFI_ERROR (Status);
+
+ // Install secure and Non-secure interrupt handlers
+ // Note: Because it is not possible to determine the security state of the
+ // CPU dynamically, we just install interrupt handler for both sec and non-sec
+ // timer PPI
+ Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerVirtIntrNum), TimerInterruptHandler);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // The hypervisor timer interrupt may be omitted by implementations that
+ // execute under virtualization.
+ //
+ TimerHypIntrNum = PcdGet32 (PcdArmArchTimerHypIntrNum);
+ if (TimerHypIntrNum != 0) {
+ Status = gInterrupt->RegisterInterruptSource (gInterrupt, TimerHypIntrNum, TimerInterruptHandler);
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerSecIntrNum), TimerInterruptHandler);
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerIntrNum), TimerInterruptHandler);
+ ASSERT_EFI_ERROR (Status);
+
+ // Set up default timer
+ Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
+ ASSERT_EFI_ERROR (Status);
+
+ // Install the Timer Architectural Protocol onto a new handle
+ Status = gBS->InstallMultipleProtocolInterfaces(
+ &Handle,
+ &gEfiTimerArchProtocolGuid, &gTimer,
+ NULL
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ // Everything is ready, unmask and enable timer interrupts
+ TimerCtrlReg = ARM_ARCH_TIMER_ENABLE;
+ ArmGenericTimerSetTimerCtrlReg (TimerCtrlReg);
+
+ // Register for an ExitBootServicesEvent
+ Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
diff --git a/roms/edk2/ArmPkg/Drivers/TimerDxe/TimerDxe.inf b/roms/edk2/ArmPkg/Drivers/TimerDxe/TimerDxe.inf new file mode 100644 index 000000000..8b2d4b0fa --- /dev/null +++ b/roms/edk2/ArmPkg/Drivers/TimerDxe/TimerDxe.inf @@ -0,0 +1,54 @@ +#/** @file
+#
+# Component description file for Timer DXE module
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmTimerDxe
+ FILE_GUID = 49ea041e-6752-42ca-b0b1-7344fe2546b7
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = TimerInitialize
+
+[Sources.common]
+ TimerDxe.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+ ArmLib
+ BaseLib
+ UefiRuntimeServicesTableLib
+ UefiLib
+ UefiBootServicesTableLib
+ BaseMemoryLib
+ DebugLib
+ UefiDriverEntryPoint
+ IoLib
+ ArmGenericTimerCounterLib
+
+[Guids]
+
+[Protocols]
+ gEfiTimerArchProtocolGuid
+ gHardwareInterruptProtocolGuid
+
+[Pcd.common]
+ gEmbeddedTokenSpaceGuid.PcdTimerPeriod
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+
+[Depex]
+ gHardwareInterruptProtocolGuid
diff --git a/roms/edk2/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c b/roms/edk2/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c new file mode 100644 index 000000000..a66bcb136 --- /dev/null +++ b/roms/edk2/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c @@ -0,0 +1,1203 @@ +/** @file
+ Support a Semi Host file system over a debuggers JTAG
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+
+#include <Guid/FileInfo.h>
+#include <Guid/FileSystemInfo.h>
+#include <Guid/FileSystemVolumeLabelInfo.h>
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/SemihostLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+
+#include <Protocol/DevicePath.h>
+#include <Protocol/SimpleFileSystem.h>
+
+#include "SemihostFs.h"
+
+#define DEFAULT_SEMIHOST_FS_LABEL L"SemihostFs"
+
+STATIC CHAR16 *mSemihostFsLabel;
+
+EFI_SIMPLE_FILE_SYSTEM_PROTOCOL gSemihostFs = {
+ EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION,
+ VolumeOpen
+};
+
+EFI_FILE gSemihostFsFile = {
+ EFI_FILE_PROTOCOL_REVISION,
+ FileOpen,
+ FileClose,
+ FileDelete,
+ FileRead,
+ FileWrite,
+ FileGetPosition,
+ FileSetPosition,
+ FileGetInfo,
+ FileSetInfo,
+ FileFlush
+};
+
+//
+// Device path for semi-hosting. It contains our autogened Caller ID GUID.
+//
+typedef struct {
+ VENDOR_DEVICE_PATH Guid;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} SEMIHOST_DEVICE_PATH;
+
+SEMIHOST_DEVICE_PATH gDevicePath = {
+ {
+ { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 } },
+ EFI_CALLER_ID_GUID
+ },
+ { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } }
+};
+
+typedef struct {
+ LIST_ENTRY Link;
+ UINT64 Signature;
+ EFI_FILE File;
+ CHAR8 *FileName;
+ UINT64 OpenMode;
+ UINT32 Position;
+ UINTN SemihostHandle;
+ BOOLEAN IsRoot;
+ EFI_FILE_INFO Info;
+} SEMIHOST_FCB;
+
+#define SEMIHOST_FCB_SIGNATURE SIGNATURE_32( 'S', 'H', 'F', 'C' )
+#define SEMIHOST_FCB_FROM_THIS(a) CR(a, SEMIHOST_FCB, File, SEMIHOST_FCB_SIGNATURE)
+#define SEMIHOST_FCB_FROM_LINK(a) CR(a, SEMIHOST_FCB, Link, SEMIHOST_FCB_SIGNATURE);
+
+EFI_HANDLE gInstallHandle = NULL;
+LIST_ENTRY gFileList = INITIALIZE_LIST_HEAD_VARIABLE (gFileList);
+
+SEMIHOST_FCB *
+AllocateFCB (
+ VOID
+ )
+{
+ SEMIHOST_FCB *Fcb = AllocateZeroPool (sizeof (SEMIHOST_FCB));
+
+ if (Fcb != NULL) {
+ CopyMem (&Fcb->File, &gSemihostFsFile, sizeof (gSemihostFsFile));
+ Fcb->Signature = SEMIHOST_FCB_SIGNATURE;
+ }
+
+ return Fcb;
+}
+
+VOID
+FreeFCB (
+ IN SEMIHOST_FCB *Fcb
+ )
+{
+ // Remove Fcb from gFileList.
+ RemoveEntryList (&Fcb->Link);
+
+ // To help debugging...
+ Fcb->Signature = 0;
+
+ FreePool (Fcb);
+}
+
+
+
+EFI_STATUS
+VolumeOpen (
+ IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This,
+ OUT EFI_FILE **Root
+ )
+{
+ SEMIHOST_FCB *RootFcb = NULL;
+
+ if (Root == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ RootFcb = AllocateFCB ();
+ if (RootFcb == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ RootFcb->IsRoot = TRUE;
+ RootFcb->Info.Attribute = EFI_FILE_READ_ONLY | EFI_FILE_DIRECTORY;
+
+ InsertTailList (&gFileList, &RootFcb->Link);
+
+ *Root = &RootFcb->File;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Open a file on the host system by means of the semihosting interface.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
+ the file handle to source location.
+ @param[out] NewHandle A pointer to the location to return the opened
+ handle for the new file.
+ @param[in] FileName The Null-terminated string of the name of the file
+ to be opened.
+ @param[in] OpenMode The mode to open the file : Read or Read/Write or
+ Read/Write/Create
+ @param[in] Attributes Only valid for EFI_FILE_MODE_CREATE, in which case these
+ are the attribute bits for the newly created file. The
+ mnemonics of the attribute bits are : EFI_FILE_READ_ONLY,
+ EFI_FILE_HIDDEN, EFI_FILE_SYSTEM, EFI_FILE_RESERVED,
+ EFI_FILE_DIRECTORY and EFI_FILE_ARCHIVE.
+
+ @retval EFI_SUCCESS The file was open.
+ @retval EFI_NOT_FOUND The specified file could not be found.
+ @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
+ @retval EFI_WRITE_PROTECTED Attempt to create a directory. This is not possible
+ with the semi-hosting interface.
+ @retval EFI_OUT_OF_RESOURCES Not enough resources were available to open the file.
+ @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid.
+
+**/
+EFI_STATUS
+FileOpen (
+ IN EFI_FILE *This,
+ OUT EFI_FILE **NewHandle,
+ IN CHAR16 *FileName,
+ IN UINT64 OpenMode,
+ IN UINT64 Attributes
+ )
+{
+ SEMIHOST_FCB *FileFcb;
+ RETURN_STATUS Return;
+ EFI_STATUS Status;
+ UINTN SemihostHandle;
+ CHAR8 *AsciiFileName;
+ UINT32 SemihostMode;
+ UINTN Length;
+
+ if ((FileName == NULL) || (NewHandle == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ( (OpenMode != EFI_FILE_MODE_READ) &&
+ (OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE)) &&
+ (OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE)) ) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ((OpenMode & EFI_FILE_MODE_CREATE) &&
+ (Attributes & EFI_FILE_DIRECTORY) ) {
+ return EFI_WRITE_PROTECTED;
+ }
+
+ Length = StrLen (FileName) + 1;
+ AsciiFileName = AllocatePool (Length);
+ if (AsciiFileName == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ UnicodeStrToAsciiStrS (FileName, AsciiFileName, Length);
+
+ // Opening '/', '\', '.', or the NULL pathname is trying to open the root directory
+ if ((AsciiStrCmp (AsciiFileName, "\\") == 0) ||
+ (AsciiStrCmp (AsciiFileName, "/") == 0) ||
+ (AsciiStrCmp (AsciiFileName, "") == 0) ||
+ (AsciiStrCmp (AsciiFileName, ".") == 0) ) {
+ FreePool (AsciiFileName);
+ return (VolumeOpen (&gSemihostFs, NewHandle));
+ }
+
+ //
+ // No control is done here concerning the file path. It is passed
+ // as it is to the host operating system through the semi-hosting
+ // interface. We first try to open the file in the read or update
+ // mode even if the file creation has been asked for. That way, if
+ // the file already exists, it is not truncated to zero length. In
+ // write mode (bit SEMIHOST_FILE_MODE_WRITE up), if the file already
+ // exists, it is reset to an empty file.
+ //
+ if (OpenMode == EFI_FILE_MODE_READ) {
+ SemihostMode = SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY;
+ } else {
+ SemihostMode = SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE;
+ }
+ Return = SemihostFileOpen (AsciiFileName, SemihostMode, &SemihostHandle);
+
+ if (RETURN_ERROR (Return)) {
+ if (OpenMode & EFI_FILE_MODE_CREATE) {
+ //
+ // In the create if does not exist case, if the opening in update
+ // mode failed, create it and open it in update mode. The update
+ // mode allows for both read and write from and to the file.
+ //
+ Return = SemihostFileOpen (
+ AsciiFileName,
+ SEMIHOST_FILE_MODE_WRITE | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE,
+ &SemihostHandle
+ );
+ if (RETURN_ERROR (Return)) {
+ Status = EFI_DEVICE_ERROR;
+ goto Error;
+ }
+ } else {
+ Status = EFI_NOT_FOUND;
+ goto Error;
+ }
+ }
+
+ // Allocate a control block and fill it
+ FileFcb = AllocateFCB ();
+ if (FileFcb == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ goto Error;
+ }
+
+ FileFcb->FileName = AsciiFileName;
+ FileFcb->SemihostHandle = SemihostHandle;
+ FileFcb->Position = 0;
+ FileFcb->IsRoot = 0;
+ FileFcb->OpenMode = OpenMode;
+
+ Return = SemihostFileLength (SemihostHandle, &Length);
+ if (RETURN_ERROR (Return)) {
+ Status = EFI_DEVICE_ERROR;
+ FreeFCB (FileFcb);
+ goto Error;
+ }
+
+ FileFcb->Info.FileSize = Length;
+ FileFcb->Info.PhysicalSize = Length;
+ FileFcb->Info.Attribute = (OpenMode & EFI_FILE_MODE_CREATE) ? Attributes : 0;
+
+ InsertTailList (&gFileList, &FileFcb->Link);
+
+ *NewHandle = &FileFcb->File;
+
+ return EFI_SUCCESS;
+
+Error:
+
+ FreePool (AsciiFileName);
+
+ return Status;
+}
+
+/**
+ Worker function that truncate a file specified by its name to a given size.
+
+ @param[in] FileName The Null-terminated string of the name of the file to be opened.
+ @param[in] Size The target size for the file.
+
+ @retval EFI_SUCCESS The file was truncated.
+ @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
+
+**/
+STATIC
+EFI_STATUS
+TruncateFile (
+ IN CHAR8 *FileName,
+ IN UINTN Size
+ )
+{
+ EFI_STATUS Status;
+ RETURN_STATUS Return;
+ UINTN FileHandle;
+ UINT8 *Buffer;
+ UINTN Remaining;
+ UINTN Read;
+ UINTN ToRead;
+
+ Status = EFI_DEVICE_ERROR;
+ FileHandle = 0;
+ Buffer = NULL;
+
+ Return = SemihostFileOpen (
+ FileName,
+ SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY,
+ &FileHandle
+ );
+ if (RETURN_ERROR (Return)) {
+ goto Error;
+ }
+
+ Buffer = AllocatePool (Size);
+ if (Buffer == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ goto Error;
+ }
+
+ Read = 0;
+ Remaining = Size;
+ while (Remaining > 0) {
+ ToRead = Remaining;
+ Return = SemihostFileRead (FileHandle, &ToRead, Buffer + Read);
+ if (RETURN_ERROR (Return)) {
+ goto Error;
+ }
+ Remaining -= ToRead;
+ Read += ToRead;
+ }
+
+ Return = SemihostFileClose (FileHandle);
+ FileHandle = 0;
+ if (RETURN_ERROR (Return)) {
+ goto Error;
+ }
+
+ Return = SemihostFileOpen (
+ FileName,
+ SEMIHOST_FILE_MODE_WRITE | SEMIHOST_FILE_MODE_BINARY,
+ &FileHandle
+ );
+ if (RETURN_ERROR (Return)) {
+ goto Error;
+ }
+
+ if (Size > 0) {
+ Return = SemihostFileWrite (FileHandle, &Size, Buffer);
+ if (RETURN_ERROR (Return)) {
+ goto Error;
+ }
+ }
+
+ Status = EFI_SUCCESS;
+
+Error:
+
+ if (FileHandle != 0) {
+ SemihostFileClose (FileHandle);
+ }
+ if (Buffer != NULL) {
+ FreePool (Buffer);
+ }
+
+ return (Status);
+
+}
+
+/**
+ Close a specified file handle.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file
+ handle to close.
+
+ @retval EFI_SUCCESS The file was closed.
+ @retval EFI_INVALID_PARAMETER The parameter "This" is NULL.
+
+**/
+EFI_STATUS
+FileClose (
+ IN EFI_FILE *This
+ )
+{
+ SEMIHOST_FCB *Fcb;
+
+ if (This == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Fcb = SEMIHOST_FCB_FROM_THIS(This);
+
+ if (!Fcb->IsRoot) {
+ SemihostFileClose (Fcb->SemihostHandle);
+ //
+ // The file size might have been reduced from its actual
+ // size on the host file system with FileSetInfo(). In
+ // that case, the file has to be truncated.
+ //
+ if (Fcb->Info.FileSize < Fcb->Info.PhysicalSize) {
+ TruncateFile (Fcb->FileName, Fcb->Info.FileSize);
+ }
+ FreePool (Fcb->FileName);
+ }
+
+ FreeFCB (Fcb);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Close and delete a file.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file
+ handle to delete.
+
+ @retval EFI_SUCCESS The file was closed and deleted.
+ @retval EFI_WARN_DELETE_FAILURE The handle was closed, but the file was not deleted.
+ @retval EFI_INVALID_PARAMETER The parameter "This" is NULL.
+
+**/
+EFI_STATUS
+FileDelete (
+ IN EFI_FILE *This
+ )
+{
+ SEMIHOST_FCB *Fcb;
+ RETURN_STATUS Return;
+ CHAR8 *FileName;
+ UINTN NameSize;
+
+ if (This == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Fcb = SEMIHOST_FCB_FROM_THIS (This);
+
+ if (!Fcb->IsRoot) {
+ // Get the filename from the Fcb
+ NameSize = AsciiStrLen (Fcb->FileName);
+ FileName = AllocatePool (NameSize + 1);
+
+ AsciiStrCpyS (FileName, NameSize + 1, Fcb->FileName);
+
+ // Close the file if it's open. Disregard return status,
+ // since it might give an error if the file isn't open.
+ This->Close (This);
+
+ // Call the semihost interface to delete the file.
+ Return = SemihostFileRemove (FileName);
+ if (RETURN_ERROR (Return)) {
+ return EFI_WARN_DELETE_FAILURE;
+ }
+ return EFI_SUCCESS;
+ } else {
+ return EFI_WARN_DELETE_FAILURE;
+ }
+}
+
+/**
+ Read data from an open file.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
+ is the file handle to read data from.
+ @param[in out] BufferSize On input, the size of the Buffer. On output, the
+ amount of data returned in Buffer. In both cases,
+ the size is measured in bytes.
+ @param[out] Buffer The buffer into which the data is read.
+
+ @retval EFI_SUCCESS The data was read.
+ @retval EFI_DEVICE_ERROR On entry, the current file position is
+ beyond the end of the file, or the semi-hosting
+ interface reported an error while performing the
+ read operation.
+ @retval EFI_INVALID_PARAMETER At least one of the three input pointers is NULL.
+
+**/
+EFI_STATUS
+FileRead (
+ IN EFI_FILE *This,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ )
+{
+ SEMIHOST_FCB *Fcb;
+ EFI_STATUS Status;
+ RETURN_STATUS Return;
+
+ if ((This == NULL) || (BufferSize == NULL) || (Buffer == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Fcb = SEMIHOST_FCB_FROM_THIS (This);
+
+ if (Fcb->IsRoot) {
+ // The semi-hosting interface does not allow to list files on the host machine.
+ Status = EFI_UNSUPPORTED;
+ } else {
+ Status = EFI_SUCCESS;
+ if (Fcb->Position >= Fcb->Info.FileSize) {
+ *BufferSize = 0;
+ if (Fcb->Position > Fcb->Info.FileSize) {
+ Status = EFI_DEVICE_ERROR;
+ }
+ } else {
+ Return = SemihostFileRead (Fcb->SemihostHandle, BufferSize, Buffer);
+ if (RETURN_ERROR (Return)) {
+ Status = EFI_DEVICE_ERROR;
+ } else {
+ Fcb->Position += *BufferSize;
+ }
+ }
+ }
+
+ return Status;
+}
+
+/**
+ Worker function that extends the size of an open file.
+
+ The extension is filled with zeros.
+
+ @param[in] Fcb Internal description of the opened file
+ @param[in] Size The number of bytes, the file has to be extended.
+
+ @retval EFI_SUCCESS The file was extended.
+ @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
+
+**/
+STATIC
+EFI_STATUS
+ExtendFile (
+ IN SEMIHOST_FCB *Fcb,
+ IN UINTN Size
+ )
+{
+ RETURN_STATUS Return;
+ UINTN Remaining;
+ CHAR8 WriteBuffer[128];
+ UINTN WriteNb;
+ UINTN WriteSize;
+
+ Return = SemihostFileSeek (Fcb->SemihostHandle, Fcb->Info.FileSize);
+ if (RETURN_ERROR (Return)) {
+ return EFI_DEVICE_ERROR;
+ }
+
+ Remaining = Size;
+ SetMem (WriteBuffer, 0, sizeof(WriteBuffer));
+ while (Remaining > 0) {
+ WriteNb = MIN (Remaining, sizeof(WriteBuffer));
+ WriteSize = WriteNb;
+ Return = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, WriteBuffer);
+ if (RETURN_ERROR (Return)) {
+ return EFI_DEVICE_ERROR;
+ }
+ Remaining -= WriteNb;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Write data to an open file.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
+ is the file handle to write data to.
+ @param[in out] BufferSize On input, the size of the Buffer. On output, the
+ size of the data actually written. In both cases,
+ the size is measured in bytes.
+ @param[in] Buffer The buffer of data to write.
+
+ @retval EFI_SUCCESS The data was written.
+ @retval EFI_ACCESS_DENIED Attempt to write into a read only file or
+ in a file opened in read only mode.
+ @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
+ @retval EFI_INVALID_PARAMETER At least one of the three input pointers is NULL.
+
+**/
+EFI_STATUS
+FileWrite (
+ IN EFI_FILE *This,
+ IN OUT UINTN *BufferSize,
+ IN VOID *Buffer
+ )
+{
+ SEMIHOST_FCB *Fcb;
+ EFI_STATUS Status;
+ UINTN WriteSize;
+ RETURN_STATUS Return;
+ UINTN Length;
+
+ if ((This == NULL) || (BufferSize == NULL) || (Buffer == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Fcb = SEMIHOST_FCB_FROM_THIS (This);
+
+ // We cannot write a read-only file
+ if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
+ || !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
+ return EFI_ACCESS_DENIED;
+ }
+
+ //
+ // If the position has been set past the end of the file, first grow the
+ // file from its current size "Fcb->Info.FileSize" to "Fcb->Position"
+ // size, filling the gap with zeros.
+ //
+ if (Fcb->Position > Fcb->Info.FileSize) {
+ Status = ExtendFile (Fcb, Fcb->Position - Fcb->Info.FileSize);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ Fcb->Info.FileSize = Fcb->Position;
+ }
+
+ WriteSize = *BufferSize;
+ Return = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, Buffer);
+ if (RETURN_ERROR (Return)) {
+ return EFI_DEVICE_ERROR;
+ }
+
+ Fcb->Position += *BufferSize;
+ if (Fcb->Position > Fcb->Info.FileSize) {
+ Fcb->Info.FileSize = Fcb->Position;
+ }
+
+ Return = SemihostFileLength (Fcb->SemihostHandle, &Length);
+ if (RETURN_ERROR (Return)) {
+ return EFI_DEVICE_ERROR;
+ }
+ Fcb->Info.PhysicalSize = Length;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Return a file's current position.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
+ the file handle to get the current position on.
+ @param[out] Position The address to return the file's current position value.
+
+ @retval EFI_SUCCESS The position was returned.
+ @retval EFI_INVALID_PARAMETER The parameter "This" or "Position" is NULL.
+
+**/
+EFI_STATUS
+FileGetPosition (
+ IN EFI_FILE *This,
+ OUT UINT64 *Position
+ )
+{
+ SEMIHOST_FCB *Fcb;
+
+ if ((This == NULL) || (Position == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Fcb = SEMIHOST_FCB_FROM_THIS(This);
+
+ *Position = Fcb->Position;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Set a file's current position.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
+ the file handle to set the requested position on.
+ @param[in] Position The byte position from the start of the file to set.
+
+ @retval EFI_SUCCESS The position was set.
+ @retval EFI_DEVICE_ERROR The semi-hosting positioning operation failed.
+ @retval EFI_UNSUPPORTED The seek request for nonzero is not valid on open
+ directories.
+ @retval EFI_INVALID_PARAMETER The parameter "This" is NULL.
+
+**/
+EFI_STATUS
+FileSetPosition (
+ IN EFI_FILE *This,
+ IN UINT64 Position
+ )
+{
+ SEMIHOST_FCB *Fcb;
+ RETURN_STATUS Return;
+
+ if (This == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Fcb = SEMIHOST_FCB_FROM_THIS (This);
+
+ if (Fcb->IsRoot) {
+ if (Position != 0) {
+ return EFI_UNSUPPORTED;
+ }
+ }
+ else {
+ //
+ // UEFI Spec section 12.5:
+ // "Seeking to position 0xFFFFFFFFFFFFFFFF causes the current position to
+ // be set to the end of the file."
+ //
+ if (Position == 0xFFFFFFFFFFFFFFFF) {
+ Position = Fcb->Info.FileSize;
+ }
+ Return = SemihostFileSeek (Fcb->SemihostHandle, MIN (Position, Fcb->Info.FileSize));
+ if (RETURN_ERROR (Return)) {
+ return EFI_DEVICE_ERROR;
+ }
+ }
+
+ Fcb->Position = Position;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Return information about a file.
+
+ @param[in] Fcb A pointer to the description of an open file.
+ @param[in out] BufferSize The size, in bytes, of Buffer.
+ @param[out] Buffer A pointer to the data buffer to return. Not NULL if
+ "*BufferSize" is greater than 0.
+
+ @retval EFI_SUCCESS The information was returned.
+ @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information.
+ BufferSize has been updated with the size needed to
+ complete the request.
+**/
+STATIC
+EFI_STATUS
+GetFileInfo (
+ IN SEMIHOST_FCB *Fcb,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ )
+{
+ EFI_FILE_INFO *Info = NULL;
+ UINTN NameSize = 0;
+ UINTN ResultSize;
+ UINTN Index;
+
+ if (Fcb->IsRoot == TRUE) {
+ ResultSize = SIZE_OF_EFI_FILE_INFO + sizeof(CHAR16);
+ } else {
+ NameSize = AsciiStrLen (Fcb->FileName) + 1;
+ ResultSize = SIZE_OF_EFI_FILE_INFO + NameSize * sizeof (CHAR16);
+ }
+
+ if (*BufferSize < ResultSize) {
+ *BufferSize = ResultSize;
+ return EFI_BUFFER_TOO_SMALL;
+ }
+
+ Info = Buffer;
+
+ // Copy the current file info
+ CopyMem (Info, &Fcb->Info, SIZE_OF_EFI_FILE_INFO);
+
+ // Fill in the structure
+ Info->Size = ResultSize;
+
+ if (Fcb->IsRoot == TRUE) {
+ Info->FileName[0] = L'\0';
+ } else {
+ for (Index = 0; Index < NameSize; Index++) {
+ Info->FileName[Index] = Fcb->FileName[Index];
+ }
+ }
+
+ *BufferSize = ResultSize;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Return information about a file system.
+
+ @param[in] Fcb A pointer to the description of an open file
+ which belongs to the file system, the information
+ is requested for.
+ @param[in out] BufferSize The size, in bytes, of Buffer.
+ @param[out] Buffer A pointer to the data buffer to return. Not NULL if
+ "*BufferSize" is greater than 0.
+
+ @retval EFI_SUCCESS The information was returned.
+ @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information.
+ BufferSize has been updated with the size needed to
+ complete the request.
+
+**/
+STATIC
+EFI_STATUS
+GetFilesystemInfo (
+ IN SEMIHOST_FCB *Fcb,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ )
+{
+ EFI_FILE_SYSTEM_INFO *Info;
+ EFI_STATUS Status;
+ UINTN ResultSize;
+ UINTN StringSize;
+
+ StringSize = StrSize (mSemihostFsLabel);
+ ResultSize = SIZE_OF_EFI_FILE_SYSTEM_INFO + StringSize;
+
+ if (*BufferSize >= ResultSize) {
+ ZeroMem (Buffer, ResultSize);
+ Status = EFI_SUCCESS;
+
+ Info = Buffer;
+
+ Info->Size = ResultSize;
+ Info->ReadOnly = FALSE;
+ Info->VolumeSize = 0;
+ Info->FreeSpace = 0;
+ Info->BlockSize = 0;
+
+ CopyMem (Info->VolumeLabel, mSemihostFsLabel, StringSize);
+ } else {
+ Status = EFI_BUFFER_TOO_SMALL;
+ }
+
+ *BufferSize = ResultSize;
+ return Status;
+}
+
+/**
+ Return information about a file or a file system.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
+ is the file handle the requested information is for.
+ @param[in] InformationType The type identifier for the information being requested :
+ EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or
+ EFI_FILE_SYSTEM_VOLUME_LABEL_ID
+ @param[in out] BufferSize The size, in bytes, of Buffer.
+ @param[out] Buffer A pointer to the data buffer to return. The type of the
+ data inside the buffer is indicated by InformationType.
+
+ @retval EFI_SUCCESS The information was returned.
+ @retval EFI_UNSUPPORTED The InformationType is not known.
+ @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information.
+ BufferSize has been updated with the size needed to
+ complete the request.
+ @retval EFI_INVALID_PARAMETER The parameter "This" or "InformationType" or "BufferSize"
+ is NULL or "Buffer" is NULL and "*Buffersize" is greater
+ than 0.
+
+**/
+EFI_STATUS
+FileGetInfo (
+ IN EFI_FILE *This,
+ IN EFI_GUID *InformationType,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ )
+{
+ SEMIHOST_FCB *Fcb;
+ EFI_STATUS Status;
+ UINTN ResultSize;
+
+ if ((This == NULL) ||
+ (InformationType == NULL) ||
+ (BufferSize == NULL) ||
+ ((Buffer == NULL) && (*BufferSize > 0)) ) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Fcb = SEMIHOST_FCB_FROM_THIS(This);
+
+ if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) {
+ Status = GetFilesystemInfo (Fcb, BufferSize, Buffer);
+ } else if (CompareGuid (InformationType, &gEfiFileInfoGuid)) {
+ Status = GetFileInfo (Fcb, BufferSize, Buffer);
+ } else if (CompareGuid (InformationType, &gEfiFileSystemVolumeLabelInfoIdGuid)) {
+ ResultSize = StrSize (mSemihostFsLabel);
+
+ if (*BufferSize >= ResultSize) {
+ CopyMem (Buffer, mSemihostFsLabel, ResultSize);
+ Status = EFI_SUCCESS;
+ } else {
+ Status = EFI_BUFFER_TOO_SMALL;
+ }
+
+ *BufferSize = ResultSize;
+ } else {
+ Status = EFI_UNSUPPORTED;
+ }
+
+ return Status;
+}
+
+/**
+ Set information about a file.
+
+ @param[in] Fcb A pointer to the description of the open file.
+ @param[in] Info A pointer to the file information to write.
+
+ @retval EFI_SUCCESS The information was set.
+ @retval EFI_ACCESS_DENIED An attempt is made to change the name of a file
+ to a file that is already present.
+ @retval EFI_ACCESS_DENIED An attempt is being made to change the
+ EFI_FILE_DIRECTORY Attribute.
+ @retval EFI_ACCESS_DENIED The file is a read-only file or has been
+ opened in read-only mode and an attempt is
+ being made to modify a field other than
+ Attribute.
+ @retval EFI_WRITE_PROTECTED An attempt is being made to modify a
+ read-only attribute.
+ @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
+ @retval EFI_OUT_OF_RESOURCES A allocation needed to process the request failed.
+
+**/
+STATIC
+EFI_STATUS
+SetFileInfo (
+ IN SEMIHOST_FCB *Fcb,
+ IN EFI_FILE_INFO *Info
+ )
+{
+ EFI_STATUS Status;
+ RETURN_STATUS Return;
+ BOOLEAN FileSizeIsDifferent;
+ BOOLEAN FileNameIsDifferent;
+ BOOLEAN ReadOnlyIsDifferent;
+ CHAR8 *AsciiFileName;
+ UINTN FileSize;
+ UINTN Length;
+ UINTN SemihostHandle;
+
+ //
+ // A directory can not be changed to a file and a file can
+ // not be changed to a directory.
+ //
+ if (((Info->Attribute & EFI_FILE_DIRECTORY) != 0) != Fcb->IsRoot) {
+ return EFI_ACCESS_DENIED;
+ }
+
+ Length = StrLen (Info->FileName) + 1;
+ AsciiFileName = AllocatePool (Length);
+ if (AsciiFileName == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ UnicodeStrToAsciiStrS (Info->FileName, AsciiFileName, Length);
+
+ FileSizeIsDifferent = (Info->FileSize != Fcb->Info.FileSize);
+ FileNameIsDifferent = (AsciiStrCmp (AsciiFileName, Fcb->FileName) != 0);
+ ReadOnlyIsDifferent = CompareMem (
+ &Info->CreateTime,
+ &Fcb->Info.CreateTime,
+ 3 * sizeof (EFI_TIME)
+ ) != 0;
+
+ //
+ // For a read-only file or a file opened in read-only mode, only
+ // the Attribute field can be modified. As the root directory is
+ // read-only (i.e. VolumeOpen()), this protects the root directory
+ // description.
+ //
+ if ((Fcb->OpenMode == EFI_FILE_MODE_READ) ||
+ (Fcb->Info.Attribute & EFI_FILE_READ_ONLY) ) {
+ if (FileSizeIsDifferent || FileNameIsDifferent || ReadOnlyIsDifferent) {
+ Status = EFI_ACCESS_DENIED;
+ goto Error;
+ }
+ }
+
+ if (ReadOnlyIsDifferent) {
+ Status = EFI_WRITE_PROTECTED;
+ goto Error;
+ }
+
+ Status = EFI_DEVICE_ERROR;
+
+ if (FileSizeIsDifferent) {
+ FileSize = Info->FileSize;
+ if (Fcb->Info.FileSize < FileSize) {
+ Status = ExtendFile (Fcb, FileSize - Fcb->Info.FileSize);
+ if (EFI_ERROR (Status)) {
+ goto Error;
+ }
+ //
+ // The read/write position from the host file system point of view
+ // is at the end of the file. If the position from this module
+ // point of view is smaller than the new file size, then
+ // ask the host file system to move to that position.
+ //
+ if (Fcb->Position < FileSize) {
+ FileSetPosition (&Fcb->File, Fcb->Position);
+ }
+ }
+ Fcb->Info.FileSize = FileSize;
+
+ Return = SemihostFileLength (Fcb->SemihostHandle, &Length);
+ if (RETURN_ERROR (Return)) {
+ goto Error;
+ }
+ Fcb->Info.PhysicalSize = Length;
+ }
+
+ //
+ // Note down in RAM the Attribute field but we can not ask
+ // for its modification to the host file system as the
+ // semi-host interface does not provide this feature.
+ //
+ Fcb->Info.Attribute = Info->Attribute;
+
+ if (FileNameIsDifferent) {
+ Return = SemihostFileOpen (
+ AsciiFileName,
+ SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY,
+ &SemihostHandle
+ );
+ if (!RETURN_ERROR (Return)) {
+ SemihostFileClose (SemihostHandle);
+ Status = EFI_ACCESS_DENIED;
+ goto Error;
+ }
+
+ Return = SemihostFileRename (Fcb->FileName, AsciiFileName);
+ if (RETURN_ERROR (Return)) {
+ goto Error;
+ }
+ FreePool (Fcb->FileName);
+ Fcb->FileName = AsciiFileName;
+ AsciiFileName = NULL;
+ }
+
+ Status = EFI_SUCCESS;
+
+Error:
+ if (AsciiFileName != NULL) {
+ FreePool (AsciiFileName);
+ }
+
+ return Status;
+}
+
+/**
+ Set information about a file or a file system.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
+ is the file handle the information is for.
+ @param[in] InformationType The type identifier for the information being set :
+ EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or
+ EFI_FILE_SYSTEM_VOLUME_LABEL_ID
+ @param[in] BufferSize The size, in bytes, of Buffer.
+ @param[in] Buffer A pointer to the data buffer to write. The type of the
+ data inside the buffer is indicated by InformationType.
+
+ @retval EFI_SUCCESS The information was set.
+ @retval EFI_UNSUPPORTED The InformationType is not known.
+ @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
+ @retval EFI_ACCESS_DENIED An attempt is being made to change the
+ EFI_FILE_DIRECTORY Attribute.
+ @retval EFI_ACCESS_DENIED InformationType is EFI_FILE_INFO_ID and
+ the file is a read-only file or has been
+ opened in read-only mode and an attempt is
+ being made to modify a field other than
+ Attribute.
+ @retval EFI_ACCESS_DENIED An attempt is made to change the name of a file
+ to a file that is already present.
+ @retval EFI_WRITE_PROTECTED An attempt is being made to modify a
+ read-only attribute.
+ @retval EFI_BAD_BUFFER_SIZE The size of the buffer is lower than that indicated by
+ the data inside the buffer.
+ @retval EFI_OUT_OF_RESOURCES An allocation needed to process the request failed.
+ @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid.
+
+**/
+EFI_STATUS
+FileSetInfo (
+ IN EFI_FILE *This,
+ IN EFI_GUID *InformationType,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
+ )
+{
+ SEMIHOST_FCB *Fcb;
+ EFI_FILE_INFO *Info;
+ EFI_FILE_SYSTEM_INFO *SystemInfo;
+ CHAR16 *VolumeLabel;
+
+ if ((This == NULL) || (InformationType == NULL) || (Buffer == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Fcb = SEMIHOST_FCB_FROM_THIS (This);
+
+ if (CompareGuid (InformationType, &gEfiFileInfoGuid)) {
+ Info = Buffer;
+ if (Info->Size < (SIZE_OF_EFI_FILE_INFO + StrSize (Info->FileName))) {
+ return EFI_INVALID_PARAMETER;
+ }
+ if (BufferSize < Info->Size) {
+ return EFI_BAD_BUFFER_SIZE;
+ }
+ return SetFileInfo (Fcb, Info);
+ } else if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) {
+ SystemInfo = Buffer;
+ if (SystemInfo->Size <
+ (SIZE_OF_EFI_FILE_SYSTEM_INFO + StrSize (SystemInfo->VolumeLabel))) {
+ return EFI_INVALID_PARAMETER;
+ }
+ if (BufferSize < SystemInfo->Size) {
+ return EFI_BAD_BUFFER_SIZE;
+ }
+ Buffer = SystemInfo->VolumeLabel;
+
+ if (StrSize (Buffer) > 0) {
+ VolumeLabel = AllocateCopyPool (StrSize (Buffer), Buffer);
+ if (VolumeLabel != NULL) {
+ FreePool (mSemihostFsLabel);
+ mSemihostFsLabel = VolumeLabel;
+ return EFI_SUCCESS;
+ } else {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ } else {
+ return EFI_INVALID_PARAMETER;
+ }
+ } else if (!CompareGuid (InformationType, &gEfiFileSystemVolumeLabelInfoIdGuid)) {
+ return EFI_UNSUPPORTED;
+ } else {
+ return EFI_UNSUPPORTED;
+ }
+}
+
+EFI_STATUS
+FileFlush (
+ IN EFI_FILE *File
+ )
+{
+ SEMIHOST_FCB *Fcb;
+
+ Fcb = SEMIHOST_FCB_FROM_THIS(File);
+
+ if (Fcb->IsRoot) {
+ return EFI_SUCCESS;
+ } else {
+ if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
+ || !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
+ return EFI_ACCESS_DENIED;
+ } else {
+ return EFI_SUCCESS;
+ }
+ }
+}
+
+EFI_STATUS
+SemihostFsEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = EFI_NOT_FOUND;
+
+ if (SemihostConnectionSupported ()) {
+ mSemihostFsLabel = AllocateCopyPool (StrSize (DEFAULT_SEMIHOST_FS_LABEL), DEFAULT_SEMIHOST_FS_LABEL);
+ if (mSemihostFsLabel == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &gInstallHandle,
+ &gEfiSimpleFileSystemProtocolGuid, &gSemihostFs,
+ &gEfiDevicePathProtocolGuid, &gDevicePath,
+ NULL
+ );
+
+ if (EFI_ERROR(Status)) {
+ FreePool (mSemihostFsLabel);
+ }
+ }
+
+ return Status;
+}
diff --git a/roms/edk2/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h b/roms/edk2/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h new file mode 100644 index 000000000..ce92fe9f1 --- /dev/null +++ b/roms/edk2/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h @@ -0,0 +1,246 @@ +/** @file
+ Support a Semi Host file system over a debuggers JTAG
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __SEMIHOST_FS_H__
+#define __SEMIHOST_FS_H__
+
+EFI_STATUS
+VolumeOpen (
+ IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This,
+ OUT EFI_FILE **Root
+ );
+
+/**
+ Open a file on the host system by means of the semihosting interface.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
+ the file handle to source location.
+ @param[out] NewHandle A pointer to the location to return the opened
+ handle for the new file.
+ @param[in] FileName The Null-terminated string of the name of the file
+ to be opened.
+ @param[in] OpenMode The mode to open the file : Read or Read/Write or
+ Read/Write/Create
+ @param[in] Attributes Only valid for EFI_FILE_MODE_CREATE, in which case these
+ are the attribute bits for the newly created file. The
+ mnemonics of the attribute bits are : EFI_FILE_READ_ONLY,
+ EFI_FILE_HIDDEN, EFI_FILE_SYSTEM, EFI_FILE_RESERVED,
+ EFI_FILE_DIRECTORY and EFI_FILE_ARCHIVE.
+
+ @retval EFI_SUCCESS The file was open.
+ @retval EFI_NOT_FOUND The specified file could not be found.
+ @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
+ @retval EFI_WRITE_PROTECTED Attempt to create a directory. This is not possible
+ with the semi-hosting interface.
+ @retval EFI_OUT_OF_RESOURCES Not enough resources were available to open the file.
+ @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid.
+
+**/
+EFI_STATUS
+FileOpen (
+ IN EFI_FILE *This,
+ OUT EFI_FILE **NewHandle,
+ IN CHAR16 *FileName,
+ IN UINT64 OpenMode,
+ IN UINT64 Attributes
+ );
+
+/**
+ Close a specified file handle.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file
+ handle to close.
+
+ @retval EFI_SUCCESS The file was closed.
+ @retval EFI_INVALID_PARAMETER The parameter "This" is NULL.
+
+**/
+EFI_STATUS
+FileClose (
+ IN EFI_FILE *This
+ );
+
+/**
+ Close and delete a file.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file
+ handle to delete.
+
+ @retval EFI_SUCCESS The file was closed and deleted.
+ @retval EFI_WARN_DELETE_FAILURE The handle was closed, but the file was not deleted.
+ @retval EFI_INVALID_PARAMETER The parameter "This" is NULL.
+
+**/
+EFI_STATUS
+FileDelete (
+ IN EFI_FILE *This
+ );
+
+/**
+ Read data from an open file.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
+ is the file handle to read data from.
+ @param[in out] BufferSize On input, the size of the Buffer. On output, the
+ amount of data returned in Buffer. In both cases,
+ the size is measured in bytes.
+ @param[out] Buffer The buffer into which the data is read.
+
+ @retval EFI_SUCCESS The data was read.
+ @retval EFI_DEVICE_ERROR On entry, the current file position is
+ beyond the end of the file, or the semi-hosting
+ interface reported an error while performing the
+ read operation.
+ @retval EFI_INVALID_PARAMETER The parameter "This" or the parameter "Buffer"
+ is NULL.
+**/
+EFI_STATUS
+FileRead (
+ IN EFI_FILE *This,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ );
+
+/**
+ Write data to an open file.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
+ is the file handle to write data to.
+ @param[in out] BufferSize On input, the size of the Buffer. On output, the
+ size of the data actually written. In both cases,
+ the size is measured in bytes.
+ @param[in] Buffer The buffer of data to write.
+
+ @retval EFI_SUCCESS The data was written.
+ @retval EFI_ACCESS_DENIED Attempt to write into a read only file or
+ in a file opened in read only mode.
+ @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
+ @retval EFI_INVALID_PARAMETER The parameter "This" or the parameter "Buffer"
+ is NULL.
+
+**/
+EFI_STATUS
+FileWrite (
+ IN EFI_FILE *This,
+ IN OUT UINTN *BufferSize,
+ IN VOID *Buffer
+ );
+
+/**
+ Return a file's current position.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
+ the file handle to get the current position on.
+ @param[out] Position The address to return the file's current position value.
+
+ @retval EFI_SUCCESS The position was returned.
+ @retval EFI_INVALID_PARAMETER Position is a NULL pointer.
+
+**/
+EFI_STATUS
+FileGetPosition (
+ IN EFI_FILE *File,
+ OUT UINT64 *Position
+ );
+
+/**
+ Set a file's current position.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is
+ the file handle to set the requested position on.
+ @param[in] Position The byte position from the start of the file to set.
+
+ @retval EFI_SUCCESS The position was set.
+ @retval EFI_DEVICE_ERROR The semi-hosting positioning operation failed.
+ @retval EFI_UNSUPPORTED The seek request for nonzero is not valid on open
+ directories.
+
+**/
+EFI_STATUS
+FileSetPosition (
+ IN EFI_FILE *File,
+ IN UINT64 Position
+ );
+
+/**
+ Return information about a file or a file system.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
+ is the file handle the requested information is for.
+ @param[in] InformationType The type identifier for the information being requested :
+ EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or
+ EFI_FILE_SYSTEM_VOLUME_LABEL_ID
+ @param[in out] BufferSize The size, in bytes, of Buffer.
+ @param[out] Buffer A pointer to the data buffer to return. The type of the
+ data inside the buffer is indicated by InformationType.
+
+ @retval EFI_SUCCESS The information was returned.
+ @retval EFI_UNSUPPORTED The InformationType is not known.
+ @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information.
+ BufferSize has been updated with the size needed to
+ complete the request.
+ @retval EFI_INVALID_PARAMETER The parameter "This" or the parameter "Buffer"
+ is NULL.
+
+**/
+EFI_STATUS
+FileGetInfo (
+ IN EFI_FILE *This,
+ IN EFI_GUID *InformationType,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ );
+
+/**
+ Set information about a file or a file system.
+
+ @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that
+ is the file handle the information is for.
+ @param[in] InformationType The type identifier for the information being set :
+ EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or
+ EFI_FILE_SYSTEM_VOLUME_LABEL_ID
+ @param[in] BufferSize The size, in bytes, of Buffer.
+ @param[in] Buffer A pointer to the data buffer to write. The type of the
+ data inside the buffer is indicated by InformationType.
+
+ @retval EFI_SUCCESS The information was set.
+ @retval EFI_UNSUPPORTED The InformationType is not known.
+ @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed.
+ @retval EFI_ACCESS_DENIED An attempt is being made to change the
+ EFI_FILE_DIRECTORY Attribute.
+ @retval EFI_ACCESS_DENIED InformationType is EFI_FILE_INFO_ID and
+ the file is a read-only file or has been
+ opened in read-only mode and an attempt is
+ being made to modify a field other than
+ Attribute.
+ @retval EFI_ACCESS_DENIED An attempt is made to change the name of a file
+ to a file that is already present.
+ @retval EFI_WRITE_PROTECTED An attempt is being made to modify a
+ read-only attribute.
+ @retval EFI_BAD_BUFFER_SIZE The size of the buffer is lower than that indicated by
+ the data inside the buffer.
+ @retval EFI_OUT_OF_RESOURCES An allocation needed to process the request failed.
+ @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid.
+
+**/
+EFI_STATUS
+FileSetInfo (
+ IN EFI_FILE *This,
+ IN EFI_GUID *InformationType,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
+ );
+
+EFI_STATUS
+FileFlush (
+ IN EFI_FILE *File
+ );
+
+#endif // __SEMIHOST_FS_H__
+
diff --git a/roms/edk2/ArmPkg/Filesystem/SemihostFs/SemihostFs.inf b/roms/edk2/ArmPkg/Filesystem/SemihostFs/SemihostFs.inf new file mode 100644 index 000000000..cd79e18b2 --- /dev/null +++ b/roms/edk2/ArmPkg/Filesystem/SemihostFs/SemihostFs.inf @@ -0,0 +1,42 @@ +#/** @file
+# Support a Semi Host file system over a debuggers JTAG
+#
+# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
+# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = SemihostFs
+ FILE_GUID = C5B9C74A-6D72-4719-99AB-C59F199091EB
+ MODULE_TYPE = UEFI_DRIVER
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = SemihostFsEntryPoint
+
+[Sources.ARM, Sources.AARCH64]
+ Arm/SemihostFs.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ MemoryAllocationLib
+ SemihostLib
+ UefiDriverEntryPoint
+ UefiLib
+
+[Guids]
+ gEfiFileSystemInfoGuid
+ gEfiFileInfoGuid
+ gEfiFileSystemVolumeLabelInfoIdGuid
+
+[Protocols]
+ gEfiSimpleFileSystemProtocolGuid
+ gEfiDevicePathProtocolGuid
+
diff --git a/roms/edk2/ArmPkg/Include/AsmMacroExport.inc b/roms/edk2/ArmPkg/Include/AsmMacroExport.inc new file mode 100644 index 000000000..615feee54 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/AsmMacroExport.inc @@ -0,0 +1,23 @@ +;%HEADER%
+;/** @file
+; Macros to centralize the EXPORT, AREA, and definition of an assembly
+; function. The AREA prefix is required to put the function in its own
+; section so that removal of unused functions in the final link is performed.
+; This provides equivalent functionality to the compiler's --split-sections
+; option.
+;
+; Copyright (c) 2015 HP Development Company, L.P.
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;**/
+
+
+ MACRO
+ RVCT_ASM_EXPORT $func
+ EXPORT $func
+ AREA s_$func, CODE, READONLY
+$func
+ MEND
+
+ END
diff --git a/roms/edk2/ArmPkg/Include/AsmMacroIoLib.h b/roms/edk2/ArmPkg/Include/AsmMacroIoLib.h new file mode 100644 index 000000000..e3576c8be --- /dev/null +++ b/roms/edk2/ArmPkg/Include/AsmMacroIoLib.h @@ -0,0 +1,39 @@ +/** @file
+ Macros to work around lack of Apple support for LDR register, =expr
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#ifndef __MACRO_IO_LIB_H__
+#define __MACRO_IO_LIB_H__
+
+#define _ASM_FUNC(Name, Section) \
+ .global Name ; \
+ .section #Section, "ax" ; \
+ .type Name, %function ; \
+ .p2align 2 ; \
+ Name:
+
+#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
+
+#define MOV32(Reg, Val) \
+ movw Reg, #(Val) & 0xffff ; \
+ movt Reg, #(Val) >> 16
+
+#define ADRL(Reg, Sym) \
+ movw Reg, #:lower16:(Sym) - (. + 16) ; \
+ movt Reg, #:upper16:(Sym) - (. + 12) ; \
+ add Reg, Reg, pc
+
+#define LDRL(Reg, Sym) \
+ movw Reg, #:lower16:(Sym) - (. + 16) ; \
+ movt Reg, #:upper16:(Sym) - (. + 12) ; \
+ ldr Reg, [pc, Reg]
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/AsmMacroIoLib.inc b/roms/edk2/ArmPkg/Include/AsmMacroIoLib.inc new file mode 100644 index 000000000..66b8d3d33 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/AsmMacroIoLib.inc @@ -0,0 +1,33 @@ +;%HEADER%
+;/** @file
+; Macros to work around lack of Apple support for LDR register, =expr
+;
+; Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
+; Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;**/
+
+
+ MACRO
+ adrll $Reg, $Symbol
+ add $Reg, pc, #-8
+ RELOC R_ARM_ALU_PC_G0_NC, $Symbol
+ add $Reg, $Reg, #-4
+ RELOC R_ARM_ALU_PC_G1_NC, $Symbol
+ add $Reg, $Reg, #0
+ RELOC R_ARM_ALU_PC_G2, $Symbol
+ MEND
+
+ MACRO
+ ldrl $Reg, $Symbol
+ add $Reg, pc, #-8
+ RELOC R_ARM_ALU_PC_G0_NC, $Symbol
+ add $Reg, $Reg, #-4
+ RELOC R_ARM_ALU_PC_G1_NC, $Symbol
+ ldr $Reg, [$Reg, #0]
+ RELOC R_ARM_LDR_PC_G2, $Symbol
+ MEND
+
+ END
diff --git a/roms/edk2/ArmPkg/Include/AsmMacroIoLibV8.h b/roms/edk2/ArmPkg/Include/AsmMacroIoLibV8.h new file mode 100644 index 000000000..bcc0d8daf --- /dev/null +++ b/roms/edk2/ArmPkg/Include/AsmMacroIoLibV8.h @@ -0,0 +1,57 @@ +/** @file
+ Macros to work around lack of Clang support for LDR register, =expr
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#ifndef __MACRO_IO_LIBV8_H__
+#define __MACRO_IO_LIBV8_H__
+
+// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
+// This only selects between EL1 and EL2, else we die.
+// Provide the Macro with a safe temp xreg to use.
+#define EL1_OR_EL2(SAFE_XREG) \
+ mrs SAFE_XREG, CurrentEL ;\
+ cmp SAFE_XREG, #0x8 ;\
+ b.gt . ;\
+ b.eq 2f ;\
+ cbnz SAFE_XREG, 1f ;\
+ b . ;// We should never get here
+
+
+// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
+// This only selects between EL1 and EL2 and EL3, else we die.
+// Provide the Macro with a safe temp xreg to use.
+#define EL1_OR_EL2_OR_EL3(SAFE_XREG) \
+ mrs SAFE_XREG, CurrentEL ;\
+ cmp SAFE_XREG, #0x8 ;\
+ b.gt 3f ;\
+ b.eq 2f ;\
+ cbnz SAFE_XREG, 1f ;\
+ b . ;// We should never get here
+
+#define _ASM_FUNC(Name, Section) \
+ .global Name ; \
+ .section #Section, "ax" ; \
+ .type Name, %function ; \
+ Name:
+
+#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
+
+#define MOV32(Reg, Val) \
+ movz Reg, (Val) >> 16, lsl #16 ; \
+ movk Reg, (Val) & 0xffff
+
+#define MOV64(Reg, Val) \
+ movz Reg, (Val) >> 48, lsl #48 ; \
+ movk Reg, ((Val) >> 32) & 0xffff, lsl #32 ; \
+ movk Reg, ((Val) >> 16) & 0xffff, lsl #16 ; \
+ movk Reg, (Val) & 0xffff
+
+#endif // __MACRO_IO_LIBV8_H__
diff --git a/roms/edk2/ArmPkg/Include/Chipset/AArch64.h b/roms/edk2/ArmPkg/Include/Chipset/AArch64.h new file mode 100644 index 000000000..0ade5cce9 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Chipset/AArch64.h @@ -0,0 +1,237 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2011 - 2017, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __AARCH64_H__
+#define __AARCH64_H__
+
+#include <Chipset/AArch64Mmu.h>
+
+// ARM Interrupt ID in Exception Table
+#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_AARCH64_IRQ
+
+// CPACR - Coprocessor Access Control Register definitions
+#define CPACR_TTA_EN (1UL << 28)
+#define CPACR_FPEN_EL1 (1UL << 20)
+#define CPACR_FPEN_FULL (3UL << 20)
+#define CPACR_CP_FULL_ACCESS 0x300000
+
+// Coprocessor Trap Register (CPTR)
+#define AARCH64_CPTR_TFP (1 << 10)
+
+// ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions
+#define AARCH64_PFR0_FP (0xF << 16)
+#define AARCH64_PFR0_GIC (0xF << 24)
+
+// SCR - Secure Configuration Register definitions
+#define SCR_NS (1 << 0)
+#define SCR_IRQ (1 << 1)
+#define SCR_FIQ (1 << 2)
+#define SCR_EA (1 << 3)
+#define SCR_FW (1 << 4)
+#define SCR_AW (1 << 5)
+
+// MIDR - Main ID Register definitions
+#define ARM_CPU_TYPE_SHIFT 4
+#define ARM_CPU_TYPE_MASK 0xFFF
+#define ARM_CPU_TYPE_AEMv8 0xD0F
+#define ARM_CPU_TYPE_A53 0xD03
+#define ARM_CPU_TYPE_A57 0xD07
+#define ARM_CPU_TYPE_A72 0xD08
+#define ARM_CPU_TYPE_A15 0xC0F
+#define ARM_CPU_TYPE_A9 0xC09
+#define ARM_CPU_TYPE_A7 0xC07
+#define ARM_CPU_TYPE_A5 0xC05
+
+#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) )
+#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF))
+
+// Hypervisor Configuration Register
+#define ARM_HCR_FMO BIT3
+#define ARM_HCR_IMO BIT4
+#define ARM_HCR_AMO BIT5
+#define ARM_HCR_TSC BIT19
+#define ARM_HCR_TGE BIT27
+
+// Exception Syndrome Register
+#define AARCH64_ESR_EC(Ecr) ((0x3F << 26) & (Ecr))
+#define AARCH64_ESR_ISS(Ecr) ((0x1FFFFFF) & (Ecr))
+
+#define AARCH64_ESR_EC_SMC32 (0x13 << 26)
+#define AARCH64_ESR_EC_SMC64 (0x17 << 26)
+
+// AArch64 Exception Level
+#define AARCH64_EL3 0xC
+#define AARCH64_EL2 0x8
+#define AARCH64_EL1 0x4
+
+// Saved Program Status Register definitions
+#define SPSR_A BIT8
+#define SPSR_I BIT7
+#define SPSR_F BIT6
+
+#define SPSR_AARCH32 BIT4
+
+#define SPSR_AARCH32_MODE_USER 0x0
+#define SPSR_AARCH32_MODE_FIQ 0x1
+#define SPSR_AARCH32_MODE_IRQ 0x2
+#define SPSR_AARCH32_MODE_SVC 0x3
+#define SPSR_AARCH32_MODE_ABORT 0x7
+#define SPSR_AARCH32_MODE_UNDEF 0xB
+#define SPSR_AARCH32_MODE_SYS 0xF
+
+// Counter-timer Hypervisor Control register definitions
+#define CNTHCTL_EL2_EL1PCTEN BIT0
+#define CNTHCTL_EL2_EL1PCEN BIT1
+
+#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 11)-1)
+
+// Vector table offset definitions
+#define ARM_VECTOR_CUR_SP0_SYNC 0x000
+#define ARM_VECTOR_CUR_SP0_IRQ 0x080
+#define ARM_VECTOR_CUR_SP0_FIQ 0x100
+#define ARM_VECTOR_CUR_SP0_SERR 0x180
+
+#define ARM_VECTOR_CUR_SPx_SYNC 0x200
+#define ARM_VECTOR_CUR_SPx_IRQ 0x280
+#define ARM_VECTOR_CUR_SPx_FIQ 0x300
+#define ARM_VECTOR_CUR_SPx_SERR 0x380
+
+#define ARM_VECTOR_LOW_A64_SYNC 0x400
+#define ARM_VECTOR_LOW_A64_IRQ 0x480
+#define ARM_VECTOR_LOW_A64_FIQ 0x500
+#define ARM_VECTOR_LOW_A64_SERR 0x580
+
+#define ARM_VECTOR_LOW_A32_SYNC 0x600
+#define ARM_VECTOR_LOW_A32_IRQ 0x680
+#define ARM_VECTOR_LOW_A32_FIQ 0x700
+#define ARM_VECTOR_LOW_A32_SERR 0x780
+
+#define VECTOR_BASE(tbl) \
+ .section .text.##tbl##,"ax"; \
+ .align 11; \
+ .org 0x0; \
+ GCC_ASM_EXPORT(tbl); \
+ ASM_PFX(tbl): \
+
+#define VECTOR_ENTRY(tbl, off) \
+ .org off
+
+#define VECTOR_END(tbl) \
+ .org 0x800; \
+ .previous
+
+VOID
+EFIAPI
+ArmEnableSWPInstruction (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmReadCbar (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmReadTpidrurw (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteTpidrurw (
+ UINTN Value
+ );
+
+UINTN
+EFIAPI
+ArmGetTCR (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmSetTCR (
+ UINTN Value
+ );
+
+UINTN
+EFIAPI
+ArmGetMAIR (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmSetMAIR (
+ UINTN Value
+ );
+
+VOID
+EFIAPI
+ArmDisableAlignmentCheck (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmEnableAlignmentCheck (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmDisableStackAlignmentCheck (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmEnableStackAlignmentCheck (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmDisableAllExceptions (
+ VOID
+ );
+
+VOID
+ArmWriteHcr (
+ IN UINTN Hcr
+ );
+
+UINTN
+ArmReadHcr (
+ VOID
+ );
+
+UINTN
+ArmReadCurrentEL (
+ VOID
+ );
+
+UINTN
+ArmWriteCptr (
+ IN UINT64 Cptr
+ );
+
+UINT32
+ArmReadCntHctl (
+ VOID
+ );
+
+VOID
+ArmWriteCntHctl (
+ IN UINT32 CntHctl
+ );
+
+#endif // __AARCH64_H__
diff --git a/roms/edk2/ArmPkg/Include/Chipset/AArch64Mmu.h b/roms/edk2/ArmPkg/Include/Chipset/AArch64Mmu.h new file mode 100644 index 000000000..606fe7420 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Chipset/AArch64Mmu.h @@ -0,0 +1,198 @@ +/** @file
+*
+* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef __AARCH64_MMU_H_
+#define __AARCH64_MMU_H_
+
+//
+// Memory Attribute Indirection register Definitions
+//
+#define MAIR_ATTR_DEVICE_MEMORY 0x0ULL
+#define MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE 0x44ULL
+#define MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH 0xBBULL
+#define MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK 0xFFULL
+
+#define MAIR_ATTR(n,value) ((value) << (((n) >> 2)*8))
+
+//
+// Long-descriptor Translation Table format
+//
+
+// Return the smallest offset from the table level.
+// The first offset starts at 12bit. There are 4 levels of 9-bit address range from level 3 to level 0
+#define TT_ADDRESS_OFFSET_AT_LEVEL(TableLevel) (12 + ((3 - (TableLevel)) * 9))
+
+#define TT_BLOCK_ENTRY_SIZE_AT_LEVEL(Level) (1ULL << TT_ADDRESS_OFFSET_AT_LEVEL(Level))
+
+// Get the associated entry in the given Translation Table
+#define TT_GET_ENTRY_FOR_ADDRESS(TranslationTable, Level, Address) \
+ ((UINTN)(TranslationTable) + ((((UINTN)(Address) >> TT_ADDRESS_OFFSET_AT_LEVEL(Level)) & (BIT9-1)) * sizeof(UINT64)))
+
+// Return the smallest address granularity from the table level.
+// The first offset starts at 12bit. There are 4 levels of 9-bit address range from level 3 to level 0
+#define TT_ADDRESS_AT_LEVEL(TableLevel) (1ULL << TT_ADDRESS_OFFSET_AT_LEVEL(TableLevel))
+
+#define TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount) \
+ ((UINT64*)((EFI_PHYSICAL_ADDRESS)(TranslationTable) + (((EntryCount) - 1) * sizeof(UINT64))))
+
+// There are 512 entries per table when 4K Granularity
+#define TT_ENTRY_COUNT 512
+#define TT_ALIGNMENT_BLOCK_ENTRY BIT12
+#define TT_ALIGNMENT_DESCRIPTION_TABLE BIT12
+
+#define TT_ADDRESS_MASK_BLOCK_ENTRY (0xFFFFFFFFFULL << 12)
+#define TT_ADDRESS_MASK_DESCRIPTION_TABLE (0xFFFFFFFFFULL << 12)
+
+#define TT_TYPE_MASK 0x3
+#define TT_TYPE_TABLE_ENTRY 0x3
+#define TT_TYPE_BLOCK_ENTRY 0x1
+#define TT_TYPE_BLOCK_ENTRY_LEVEL3 0x3
+
+#define TT_ATTR_INDX_MASK (0x7 << 2)
+#define TT_ATTR_INDX_DEVICE_MEMORY (0x0 << 2)
+#define TT_ATTR_INDX_MEMORY_NON_CACHEABLE (0x1 << 2)
+#define TT_ATTR_INDX_MEMORY_WRITE_THROUGH (0x2 << 2)
+#define TT_ATTR_INDX_MEMORY_WRITE_BACK (0x3 << 2)
+
+#define TT_AP_MASK (0x3UL << 6)
+#define TT_AP_NO_RW (0x0UL << 6)
+#define TT_AP_RW_RW (0x1UL << 6)
+#define TT_AP_NO_RO (0x2UL << 6)
+#define TT_AP_RO_RO (0x3UL << 6)
+
+#define TT_NS BIT5
+#define TT_AF BIT10
+
+#define TT_SH_NON_SHAREABLE (0x0 << 8)
+#define TT_SH_OUTER_SHAREABLE (0x2 << 8)
+#define TT_SH_INNER_SHAREABLE (0x3 << 8)
+#define TT_SH_MASK (0x3 << 8)
+
+#define TT_PXN_MASK BIT53
+#define TT_UXN_MASK BIT54 // EL1&0
+#define TT_XN_MASK BIT54 // EL2 / EL3
+
+#define TT_ATTRIBUTES_MASK ((0xFFFULL << 52) | (0x3FFULL << 2))
+
+#define TT_TABLE_PXN BIT59
+#define TT_TABLE_UXN BIT60 // EL1&0
+#define TT_TABLE_XN BIT60 // EL2 / EL3
+#define TT_TABLE_NS BIT63
+
+#define TT_TABLE_AP_MASK (BIT62 | BIT61)
+#define TT_TABLE_AP_NO_PERMISSION (0x0ULL << 61)
+#define TT_TABLE_AP_EL0_NO_ACCESS (0x1ULL << 61)
+#define TT_TABLE_AP_NO_WRITE_ACCESS (0x2ULL << 61)
+
+//
+// Translation Control Register
+//
+#define TCR_T0SZ_MASK 0x3FUL
+
+#define TCR_PS_4GB (0UL << 16)
+#define TCR_PS_64GB (1UL << 16)
+#define TCR_PS_1TB (2UL << 16)
+#define TCR_PS_4TB (3UL << 16)
+#define TCR_PS_16TB (4UL << 16)
+#define TCR_PS_256TB (5UL << 16)
+
+#define TCR_TG0_4KB (0UL << 14)
+#define TCR_TG1_4KB (2UL << 30)
+
+#define TCR_IPS_4GB (0ULL << 32)
+#define TCR_IPS_64GB (1ULL << 32)
+#define TCR_IPS_1TB (2ULL << 32)
+#define TCR_IPS_4TB (3ULL << 32)
+#define TCR_IPS_16TB (4ULL << 32)
+#define TCR_IPS_256TB (5ULL << 32)
+
+#define TCR_EPD1 (1UL << 23)
+
+#define TTBR_ASID_FIELD (48)
+#define TTBR_ASID_MASK (0xFF << TTBR_ASID_FIELD)
+#define TTBR_BADDR_MASK (0xFFFFFFFFFFFF ) // The width of this field depends on the values in TxSZ. Addr occupies bottom 48bits
+
+#define TCR_EL1_T0SZ_FIELD (0)
+#define TCR_EL1_EPD0_FIELD (7)
+#define TCR_EL1_IRGN0_FIELD (8)
+#define TCR_EL1_ORGN0_FIELD (10)
+#define TCR_EL1_SH0_FIELD (12)
+#define TCR_EL1_TG0_FIELD (14)
+#define TCR_EL1_T1SZ_FIELD (16)
+#define TCR_EL1_A1_FIELD (22)
+#define TCR_EL1_EPD1_FIELD (23)
+#define TCR_EL1_IRGN1_FIELD (24)
+#define TCR_EL1_ORGN1_FIELD (26)
+#define TCR_EL1_SH1_FIELD (28)
+#define TCR_EL1_TG1_FIELD (30)
+#define TCR_EL1_IPS_FIELD (32)
+#define TCR_EL1_AS_FIELD (36)
+#define TCR_EL1_TBI0_FIELD (37)
+#define TCR_EL1_TBI1_FIELD (38)
+#define TCR_EL1_T0SZ_MASK (0x1FUL << TCR_EL1_T0SZ_FIELD)
+#define TCR_EL1_EPD0_MASK (0x01UL << TCR_EL1_EPD0_FIELD)
+#define TCR_EL1_IRGN0_MASK (0x03UL << TCR_EL1_IRGN0_FIELD)
+#define TCR_EL1_ORGN0_MASK (0x03UL << TCR_EL1_ORGN0_FIELD)
+#define TCR_EL1_SH0_MASK (0x03UL << TCR_EL1_SH0_FIELD)
+#define TCR_EL1_TG0_MASK (0x01UL << TCR_EL1_TG0_FIELD)
+#define TCR_EL1_T1SZ_MASK (0x1FUL << TCR_EL1_T1SZ_FIELD)
+#define TCR_EL1_A1_MASK (0x01UL << TCR_EL1_A1_FIELD)
+#define TCR_EL1_EPD1_MASK (0x01UL << TCR_EL1_EPD1_FIELD)
+#define TCR_EL1_IRGN1_MASK (0x03UL << TCR_EL1_IRGN1_FIELD)
+#define TCR_EL1_ORGN1_MASK (0x03UL << TCR_EL1_ORGN1_FIELD)
+#define TCR_EL1_SH1_MASK (0x03UL << TCR_EL1_SH1_FIELD)
+#define TCR_EL1_TG1_MASK (0x01UL << TCR_EL1_TG1_FIELD)
+#define TCR_EL1_IPS_MASK (0x07UL << TCR_EL1_IPS_FIELD)
+#define TCR_EL1_AS_MASK (0x01UL << TCR_EL1_AS_FIELD)
+#define TCR_EL1_TBI0_MASK (0x01UL << TCR_EL1_TBI0_FIELD)
+#define TCR_EL1_TBI1_MASK (0x01UL << TCR_EL1_TBI1_FIELD)
+
+
+#define TCR_EL23_T0SZ_FIELD (0)
+#define TCR_EL23_IRGN0_FIELD (8)
+#define TCR_EL23_ORGN0_FIELD (10)
+#define TCR_EL23_SH0_FIELD (12)
+#define TCR_EL23_TG0_FIELD (14)
+#define TCR_EL23_PS_FIELD (16)
+#define TCR_EL23_T0SZ_MASK (0x1FUL << TCR_EL23_T0SZ_FIELD)
+#define TCR_EL23_IRGN0_MASK (0x03UL << TCR_EL23_IRGN0_FIELD)
+#define TCR_EL23_ORGN0_MASK (0x03UL << TCR_EL23_ORGN0_FIELD)
+#define TCR_EL23_SH0_MASK (0x03UL << TCR_EL23_SH0_FIELD)
+#define TCR_EL23_TG0_MASK (0x01UL << TCR_EL23_TG0_FIELD)
+#define TCR_EL23_PS_MASK (0x07UL << TCR_EL23_PS_FIELD)
+
+
+#define TCR_RGN_OUTER_NON_CACHEABLE (0x0UL << 10)
+#define TCR_RGN_OUTER_WRITE_BACK_ALLOC (0x1UL << 10)
+#define TCR_RGN_OUTER_WRITE_THROUGH (0x2UL << 10)
+#define TCR_RGN_OUTER_WRITE_BACK_NO_ALLOC (0x3UL << 10)
+
+#define TCR_RGN_INNER_NON_CACHEABLE (0x0UL << 8)
+#define TCR_RGN_INNER_WRITE_BACK_ALLOC (0x1UL << 8)
+#define TCR_RGN_INNER_WRITE_THROUGH (0x2UL << 8)
+#define TCR_RGN_INNER_WRITE_BACK_NO_ALLOC (0x3UL << 8)
+
+#define TCR_SH_NON_SHAREABLE (0x0UL << 12)
+#define TCR_SH_OUTER_SHAREABLE (0x2UL << 12)
+#define TCR_SH_INNER_SHAREABLE (0x3UL << 12)
+
+#define TCR_PASZ_32BITS_4GB (0x0UL)
+#define TCR_PASZ_36BITS_64GB (0x1UL)
+#define TCR_PASZ_40BITS_1TB (0x2UL)
+#define TCR_PASZ_42BITS_4TB (0x3UL)
+#define TCR_PASZ_44BITS_16TB (0x4UL)
+#define TCR_PASZ_48BITS_256TB (0x5UL)
+
+// The value written to the T*SZ fields are defined as 2^(64-T*SZ). So a 39Bit
+// Virtual address range for 512GB of virtual space sets T*SZ to 25
+#define INPUT_ADDRESS_SIZE_TO_TxSZ(a) (64 - a)
+
+// Uses LPAE Page Table format
+
+#endif // __AARCH64_MMU_H_
+
diff --git a/roms/edk2/ArmPkg/Include/Chipset/ArmCortexA5x.h b/roms/edk2/ArmPkg/Include/Chipset/ArmCortexA5x.h new file mode 100644 index 000000000..847a6e004 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Chipset/ArmCortexA5x.h @@ -0,0 +1,44 @@ +/** @file
+
+ Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __ARM_CORTEX_A5x_H__
+#define __ARM_CORTEX_A5x_H__
+
+//
+// Cortex A5x feature bit definitions
+//
+#define A5X_FEATURE_SMP (1 << 6)
+
+//
+// Helper functions to access CPU Extended Control Register
+//
+UINT64
+EFIAPI
+ArmReadCpuExCr (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCpuExCr (
+ IN UINT64 Val
+ );
+
+VOID
+EFIAPI
+ArmSetCpuExCrBit (
+ IN UINT64 Bits
+ );
+
+VOID
+EFIAPI
+ArmUnsetCpuExCrBit (
+ IN UINT64 Bits
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Chipset/ArmCortexA9.h b/roms/edk2/ArmPkg/Include/Chipset/ArmCortexA9.h new file mode 100644 index 000000000..13d18e589 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Chipset/ArmCortexA9.h @@ -0,0 +1,59 @@ +/** @file
+
+ Copyright (c) 2011, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __ARM_CORTEX_A9_H__
+#define __ARM_CORTEX_A9_H__
+
+#include <Chipset/ArmV7.h>
+
+//
+// Cortex A9 feature bit definitions
+//
+#define A9_FEATURE_PARITY (1<<9)
+#define A9_FEATURE_AOW (1<<8)
+#define A9_FEATURE_EXCL (1<<7)
+#define A9_FEATURE_SMP (1<<6)
+#define A9_FEATURE_FOZ (1<<3)
+#define A9_FEATURE_DPREF (1<<2)
+#define A9_FEATURE_HINT (1<<1)
+#define A9_FEATURE_FWD (1<<0)
+
+//
+// Cortex A9 Watchdog
+//
+#define ARM_A9_WATCHDOG_REGION 0x600
+
+#define ARM_A9_WATCHDOG_LOAD_REGISTER 0x20
+#define ARM_A9_WATCHDOG_CONTROL_REGISTER 0x28
+
+#define ARM_A9_WATCHDOG_WATCHDOG_MODE (1 << 3)
+#define ARM_A9_WATCHDOG_TIMER_MODE (0 << 3)
+#define ARM_A9_WATCHDOG_SINGLE_SHOT (0 << 1)
+#define ARM_A9_WATCHDOG_AUTORELOAD (1 << 1)
+#define ARM_A9_WATCHDOG_ENABLE 1
+
+//
+// SCU register offsets & masks
+//
+#define A9_SCU_CONTROL_OFFSET 0x0
+#define A9_SCU_CONFIG_OFFSET 0x4
+#define A9_SCU_INVALL_OFFSET 0xC
+#define A9_SCU_FILT_START_OFFSET 0x40
+#define A9_SCU_FILT_END_OFFSET 0x44
+#define A9_SCU_SACR_OFFSET 0x50
+#define A9_SCU_SSACR_OFFSET 0x54
+
+
+UINTN
+EFIAPI
+ArmGetScuBaseAddress (
+ VOID
+ );
+
+#endif
+
diff --git a/roms/edk2/ArmPkg/Include/Chipset/ArmV7.h b/roms/edk2/ArmPkg/Include/Chipset/ArmV7.h new file mode 100644 index 000000000..fe91031ef --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Chipset/ArmV7.h @@ -0,0 +1,123 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2011-2015, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __ARM_V7_H__
+#define __ARM_V7_H__
+
+#include <Chipset/ArmV7Mmu.h>
+
+// ARM Interrupt ID in Exception Table
+#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_ARM_IRQ
+
+// ID_PFR1 - ARM Processor Feature Register 1 definitions
+#define ARM_PFR1_SEC (0xFUL << 4)
+#define ARM_PFR1_TIMER (0xFUL << 16)
+#define ARM_PFR1_GIC (0xFUL << 28)
+
+// Domain Access Control Register
+#define DOMAIN_ACCESS_CONTROL_MASK(a) (3UL << (2 * (a)))
+#define DOMAIN_ACCESS_CONTROL_NONE(a) (0UL << (2 * (a)))
+#define DOMAIN_ACCESS_CONTROL_CLIENT(a) (1UL << (2 * (a)))
+#define DOMAIN_ACCESS_CONTROL_RESERVED(a) (2UL << (2 * (a)))
+#define DOMAIN_ACCESS_CONTROL_MANAGER(a) (3UL << (2 * (a)))
+
+// CPSR - Coprocessor Status Register definitions
+#define CPSR_MODE_USER 0x10
+#define CPSR_MODE_FIQ 0x11
+#define CPSR_MODE_IRQ 0x12
+#define CPSR_MODE_SVC 0x13
+#define CPSR_MODE_ABORT 0x17
+#define CPSR_MODE_HYP 0x1A
+#define CPSR_MODE_UNDEFINED 0x1B
+#define CPSR_MODE_SYSTEM 0x1F
+#define CPSR_MODE_MASK 0x1F
+#define CPSR_ASYNC_ABORT (1 << 8)
+#define CPSR_IRQ (1 << 7)
+#define CPSR_FIQ (1 << 6)
+
+
+// CPACR - Coprocessor Access Control Register definitions
+#define CPACR_CP_DENIED(cp) 0x00
+#define CPACR_CP_PRIV(cp) ((0x1 << ((cp) << 1)) & 0x0FFFFFFF)
+#define CPACR_CP_FULL(cp) ((0x3 << ((cp) << 1)) & 0x0FFFFFFF)
+#define CPACR_ASEDIS (1 << 31)
+#define CPACR_D32DIS (1 << 30)
+#define CPACR_CP_FULL_ACCESS 0x0FFFFFFF
+
+// NSACR - Non-Secure Access Control Register definitions
+#define NSACR_CP(cp) ((1 << (cp)) & 0x3FFF)
+#define NSACR_NSD32DIS (1 << 14)
+#define NSACR_NSASEDIS (1 << 15)
+#define NSACR_PLE (1 << 16)
+#define NSACR_TL (1 << 17)
+#define NSACR_NS_SMP (1 << 18)
+#define NSACR_RFR (1 << 19)
+
+// SCR - Secure Configuration Register definitions
+#define SCR_NS (1 << 0)
+#define SCR_IRQ (1 << 1)
+#define SCR_FIQ (1 << 2)
+#define SCR_EA (1 << 3)
+#define SCR_FW (1 << 4)
+#define SCR_AW (1 << 5)
+
+// MIDR - Main ID Register definitions
+#define ARM_CPU_TYPE_SHIFT 4
+#define ARM_CPU_TYPE_MASK 0xFFF
+#define ARM_CPU_TYPE_AEMv8 0xD0F
+#define ARM_CPU_TYPE_A53 0xD03
+#define ARM_CPU_TYPE_A57 0xD07
+#define ARM_CPU_TYPE_A15 0xC0F
+#define ARM_CPU_TYPE_A12 0xC0D
+#define ARM_CPU_TYPE_A9 0xC09
+#define ARM_CPU_TYPE_A7 0xC07
+#define ARM_CPU_TYPE_A5 0xC05
+
+#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) )
+#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF))
+
+#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 5)-1)
+
+VOID
+EFIAPI
+ArmEnableSWPInstruction (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmReadCbar (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmReadTpidrurw (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteTpidrurw (
+ UINTN Value
+ );
+
+UINT32
+EFIAPI
+ArmReadNsacr (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteNsacr (
+ IN UINT32 Nsacr
+ );
+
+#endif // __ARM_V7_H__
diff --git a/roms/edk2/ArmPkg/Include/Chipset/ArmV7Mmu.h b/roms/edk2/ArmPkg/Include/Chipset/ArmV7Mmu.h new file mode 100644 index 000000000..25d82d029 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Chipset/ArmV7Mmu.h @@ -0,0 +1,238 @@ +/** @file
+*
+* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef __ARMV7_MMU_H_
+#define __ARMV7_MMU_H_
+
+#define TTBR_NOT_OUTER_SHAREABLE BIT5
+#define TTBR_RGN_OUTER_NON_CACHEABLE 0
+#define TTBR_RGN_OUTER_WRITE_BACK_ALLOC BIT3
+#define TTBR_RGN_OUTER_WRITE_THROUGH BIT4
+#define TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC (BIT3|BIT4)
+#define TTBR_SHAREABLE BIT1
+#define TTBR_NON_SHAREABLE 0
+#define TTBR_INNER_CACHEABLE BIT0
+#define TTBR_INNER_NON_CACHEABLE 0
+#define TTBR_RGN_INNER_NON_CACHEABLE 0
+#define TTBR_RGN_INNER_WRITE_BACK_ALLOC BIT6
+#define TTBR_RGN_INNER_WRITE_THROUGH BIT0
+#define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC (BIT0|BIT6)
+
+#define TTBR_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
+#define TTBR_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
+#define TTBR_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_INNER_NON_CACHEABLE )
+#define TTBR_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
+
+#define TTBR_MP_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_RGN_INNER_WRITE_THROUGH | TTBR_SHAREABLE)
+#define TTBR_MP_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC | TTBR_SHAREABLE)
+#define TTBR_MP_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )
+#define TTBR_MP_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
+
+
+#define TRANSLATION_TABLE_SECTION_COUNT 4096
+#define TRANSLATION_TABLE_SECTION_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
+#define TRANSLATION_TABLE_SECTION_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
+#define TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK (TRANSLATION_TABLE_SECTION_ALIGNMENT - 1)
+
+#define TRANSLATION_TABLE_PAGE_COUNT 256
+#define TRANSLATION_TABLE_PAGE_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
+#define TRANSLATION_TABLE_PAGE_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
+#define TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK (TRANSLATION_TABLE_PAGE_ALIGNMENT - 1)
+
+#define TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(table, address) ((UINT32 *)(table) + (((UINTN)(address)) >> 20))
+
+// Translation table descriptor types
+#define TT_DESCRIPTOR_SECTION_TYPE_MASK ((1UL << 18) | (3UL << 0))
+#define TT_DESCRIPTOR_SECTION_TYPE_FAULT (0UL << 0)
+#define TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE (1UL << 0)
+#define TT_DESCRIPTOR_SECTION_TYPE_SECTION ((0UL << 18) | (2UL << 0))
+#define TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION ((1UL << 18) | (2UL << 0))
+#define TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Desc) (((Desc) & 3UL) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE)
+
+// Translation table descriptor types
+#define TT_DESCRIPTOR_PAGE_TYPE_MASK (3UL << 0)
+#define TT_DESCRIPTOR_PAGE_TYPE_FAULT (0UL << 0)
+#define TT_DESCRIPTOR_PAGE_TYPE_PAGE (2UL << 0)
+#define TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN (3UL << 0)
+#define TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE (1UL << 0)
+
+// Section descriptor definitions
+#define TT_DESCRIPTOR_SECTION_SIZE (0x00100000)
+
+#define TT_DESCRIPTOR_SECTION_NS_MASK (1UL << 19)
+#define TT_DESCRIPTOR_SECTION_NS (1UL << 19)
+
+#define TT_DESCRIPTOR_SECTION_NG_MASK (1UL << 17)
+#define TT_DESCRIPTOR_SECTION_NG_GLOBAL (0UL << 17)
+#define TT_DESCRIPTOR_SECTION_NG_LOCAL (1UL << 17)
+
+#define TT_DESCRIPTOR_PAGE_NG_MASK (1UL << 11)
+#define TT_DESCRIPTOR_PAGE_NG_GLOBAL (0UL << 11)
+#define TT_DESCRIPTOR_PAGE_NG_LOCAL (1UL << 11)
+
+#define TT_DESCRIPTOR_SECTION_S_MASK (1UL << 16)
+#define TT_DESCRIPTOR_SECTION_S_NOT_SHARED (0UL << 16)
+#define TT_DESCRIPTOR_SECTION_S_SHARED (1UL << 16)
+
+#define TT_DESCRIPTOR_PAGE_S_MASK (1UL << 10)
+#define TT_DESCRIPTOR_PAGE_S_NOT_SHARED (0UL << 10)
+#define TT_DESCRIPTOR_PAGE_S_SHARED (1UL << 10)
+
+#define TT_DESCRIPTOR_SECTION_AP_MASK ((1UL << 15) | (3UL << 10))
+#define TT_DESCRIPTOR_SECTION_AP_NO_NO ((0UL << 15) | (0UL << 10))
+#define TT_DESCRIPTOR_SECTION_AP_RW_NO ((0UL << 15) | (1UL << 10))
+#define TT_DESCRIPTOR_SECTION_AP_RW_RO ((0UL << 15) | (2UL << 10))
+#define TT_DESCRIPTOR_SECTION_AP_RW_RW ((0UL << 15) | (3UL << 10))
+#define TT_DESCRIPTOR_SECTION_AP_RO_NO ((1UL << 15) | (1UL << 10))
+#define TT_DESCRIPTOR_SECTION_AP_RO_RO ((1UL << 15) | (3UL << 10))
+
+#define TT_DESCRIPTOR_PAGE_AP_MASK ((1UL << 9) | (3UL << 4))
+#define TT_DESCRIPTOR_PAGE_AP_NO_NO ((0UL << 9) | (0UL << 4))
+#define TT_DESCRIPTOR_PAGE_AP_RW_NO ((0UL << 9) | (1UL << 4))
+#define TT_DESCRIPTOR_PAGE_AP_RW_RO ((0UL << 9) | (2UL << 4))
+#define TT_DESCRIPTOR_PAGE_AP_RW_RW ((0UL << 9) | (3UL << 4))
+#define TT_DESCRIPTOR_PAGE_AP_RO_NO ((1UL << 9) | (1UL << 4))
+#define TT_DESCRIPTOR_PAGE_AP_RO_RO ((1UL << 9) | (3UL << 4))
+
+#define TT_DESCRIPTOR_SECTION_XN_MASK (0x1UL << 4)
+#define TT_DESCRIPTOR_PAGE_XN_MASK (0x1UL << 0)
+#define TT_DESCRIPTOR_LARGEPAGE_XN_MASK (0x1UL << 15)
+
+#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_SECTION_CACHEABLE_MASK (1UL << 3)
+#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2))
+#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))
+#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2))
+#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2))
+
+#define TT_DESCRIPTOR_PAGE_SIZE (0x00001000)
+
+#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK ((3UL << 6) | (1UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_PAGE_CACHEABLE_MASK (1UL << 3)
+#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 6) | (0UL << 3) | (0UL << 2))
+#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 6) | (0UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 6) | (1UL << 3) | (0UL << 2))
+#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 6) | (1UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 6) | (0UL << 3) | (0UL << 2))
+#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 6) | (1UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 6) | (0UL << 3) | (0UL << 2))
+
+#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2))
+#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))
+#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2))
+#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2))
+#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2))
+
+#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK)
+#define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK)
+#define TT_DESCRIPTOR_CONVERT_TO_PAGE_S(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK)
+#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc,IsLargePage) ((IsLargePage)? \
+ ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) << 11) & TT_DESCRIPTOR_LARGEPAGE_XN_MASK): \
+ ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) >> 4) & TT_DESCRIPTOR_PAGE_XN_MASK))
+#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc,IsLargePage) (IsLargePage? \
+ (((Desc) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK): \
+ (((((Desc) & (0x3 << 12)) >> 6) | (Desc & (0x3 << 2)))))
+
+#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(Desc) ((((Desc) & TT_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK)
+
+#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc,IsLargePage) (IsLargePage? \
+ (((Desc) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK): \
+ (((((Desc) & (0x3 << 6)) << 6) | (Desc & (0x3 << 2)))))
+
+#define TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK (TT_DESCRIPTOR_SECTION_NS_MASK | TT_DESCRIPTOR_SECTION_NG_MASK | \
+ TT_DESCRIPTOR_SECTION_S_MASK | TT_DESCRIPTOR_SECTION_AP_MASK | \
+ TT_DESCRIPTOR_SECTION_XN_MASK | TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK)
+
+#define TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK (TT_DESCRIPTOR_PAGE_NG_MASK | TT_DESCRIPTOR_PAGE_S_MASK | \
+ TT_DESCRIPTOR_PAGE_AP_MASK | TT_DESCRIPTOR_PAGE_XN_MASK | \
+ TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK)
+
+#define TT_DESCRIPTOR_SECTION_DOMAIN_MASK (0x0FUL << 5)
+#define TT_DESCRIPTOR_SECTION_DOMAIN(a) (((a) & 0x0FUL) << 5)
+
+#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK (0xFFF00000)
+#define TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK (0xFFFFFC00)
+#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK)
+#define TT_DESCRIPTOR_SECTION_BASE_SHIFT 20
+
+#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK (0xFFFFF000)
+#define TT_DESCRIPTOR_PAGE_INDEX_MASK (0x000FF000)
+#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK)
+#define TT_DESCRIPTOR_PAGE_BASE_SHIFT 12
+
+#define TT_DESCRIPTOR_SECTION_WRITE_BACK(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
+ ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
+ TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
+ TT_DESCRIPTOR_SECTION_S_SHARED | \
+ TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
+ TT_DESCRIPTOR_SECTION_AP_RW_RW | \
+ TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC)
+#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
+ ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
+ TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
+ TT_DESCRIPTOR_SECTION_S_SHARED | \
+ TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
+ TT_DESCRIPTOR_SECTION_AP_RW_RW | \
+ TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)
+#define TT_DESCRIPTOR_SECTION_DEVICE(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
+ ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
+ TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
+ TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \
+ TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
+ TT_DESCRIPTOR_SECTION_AP_RW_RW | \
+ TT_DESCRIPTOR_SECTION_XN_MASK | \
+ TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE)
+#define TT_DESCRIPTOR_SECTION_UNCACHED(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
+ ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
+ TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
+ TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \
+ TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
+ TT_DESCRIPTOR_SECTION_AP_RW_RW | \
+ TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE)
+
+#define TT_DESCRIPTOR_PAGE_WRITE_BACK (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
+ TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
+ TT_DESCRIPTOR_PAGE_S_SHARED | \
+ TT_DESCRIPTOR_PAGE_AP_RW_RW | \
+ TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC)
+#define TT_DESCRIPTOR_PAGE_WRITE_THROUGH (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
+ TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
+ TT_DESCRIPTOR_PAGE_S_SHARED | \
+ TT_DESCRIPTOR_PAGE_AP_RW_RW | \
+ TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)
+#define TT_DESCRIPTOR_PAGE_DEVICE (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
+ TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
+ TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
+ TT_DESCRIPTOR_PAGE_AP_RW_RW | \
+ TT_DESCRIPTOR_PAGE_XN_MASK | \
+ TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE)
+#define TT_DESCRIPTOR_PAGE_UNCACHED (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
+ TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
+ TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
+ TT_DESCRIPTOR_PAGE_AP_RW_RW | \
+ TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE)
+
+// First Level Descriptors
+typedef UINT32 ARM_FIRST_LEVEL_DESCRIPTOR;
+
+// Second Level Descriptors
+typedef UINT32 ARM_PAGE_TABLE_ENTRY;
+
+UINT32
+ConvertSectionAttributesToPageAttributes (
+ IN UINT32 SectionAttributes,
+ IN BOOLEAN IsLargePage
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Guid/ArmMpCoreInfo.h b/roms/edk2/ArmPkg/Include/Guid/ArmMpCoreInfo.h new file mode 100644 index 000000000..3f9d17bb7 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Guid/ArmMpCoreInfo.h @@ -0,0 +1,60 @@ +/** @file
+*
+* Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef __ARM_MP_CORE_INFO_GUID_H_
+#define __ARM_MP_CORE_INFO_GUID_H_
+
+#define MAX_CPUS_PER_MPCORE_SYSTEM 0x04
+#define SCU_CONFIG_REG_OFFSET 0x04
+#define MPIDR_U_BIT_MASK 0x40000000
+
+typedef struct {
+ UINT32 ClusterId;
+ UINT32 CoreId;
+
+ // MP Core Mailbox
+ EFI_PHYSICAL_ADDRESS MailboxSetAddress;
+ EFI_PHYSICAL_ADDRESS MailboxGetAddress;
+ EFI_PHYSICAL_ADDRESS MailboxClearAddress;
+ UINT64 MailboxClearValue;
+} ARM_CORE_INFO;
+
+typedef struct{
+ UINT64 Signature;
+ UINT32 Length;
+ UINT32 Revision;
+ UINT64 OemId;
+ UINT64 OemTableId;
+ UINTN OemRevision;
+ UINTN CreatorId;
+ UINTN CreatorRevision;
+ EFI_GUID Identifier;
+ UINTN DataLen;
+} ARM_PROCESSOR_TABLE_HEADER;
+
+typedef struct {
+ ARM_PROCESSOR_TABLE_HEADER Header;
+ UINTN NumberOfEntries;
+ ARM_CORE_INFO *ArmCpus;
+} ARM_PROCESSOR_TABLE;
+
+
+#define ARM_MP_CORE_INFO_GUID \
+ { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
+
+#define EFI_ARM_PROCESSOR_TABLE_SIGNATURE SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')
+#define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000 //1.0
+#define EFI_ARM_PROCESSOR_TABLE_OEM_ID SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')
+#define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')
+#define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION 0x00000001
+#define EFI_ARM_PROCESSOR_TABLE_CREATOR_ID 0xA5A5A5A5
+#define EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION 0x01000001
+
+extern EFI_GUID gArmMpCoreInfoGuid;
+
+#endif /* MPCOREINFO_H_ */
diff --git a/roms/edk2/ArmPkg/Include/IndustryStandard/ArmMmSvc.h b/roms/edk2/ArmPkg/Include/IndustryStandard/ArmMmSvc.h new file mode 100644 index 000000000..ee29c2fec --- /dev/null +++ b/roms/edk2/ArmPkg/Include/IndustryStandard/ArmMmSvc.h @@ -0,0 +1,44 @@ +/** @file
+*
+* Copyright (c) 2012-2017, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef __ARM_MM_SVC_H__
+#define __ARM_MM_SVC_H__
+
+/*
+ * SVC IDs to allow the MM secure partition to initialise itself, handle
+ * delegated events and request the Secure partition manager to perform
+ * privileged operations on its behalf.
+ */
+#define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060
+#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061
+#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064
+#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065
+
+#define SET_MEM_ATTR_DATA_PERM_MASK 0x3
+#define SET_MEM_ATTR_DATA_PERM_SHIFT 0
+#define SET_MEM_ATTR_DATA_PERM_NO_ACCESS 0
+#define SET_MEM_ATTR_DATA_PERM_RW 1
+#define SET_MEM_ATTR_DATA_PERM_RO 3
+
+#define SET_MEM_ATTR_CODE_PERM_MASK 0x1
+#define SET_MEM_ATTR_CODE_PERM_SHIFT 2
+#define SET_MEM_ATTR_CODE_PERM_X 0
+#define SET_MEM_ATTR_CODE_PERM_XN 1
+
+#define SET_MEM_ATTR_MAKE_PERM_REQUEST(d_perm, c_perm) \
+ ((((c_perm) & SET_MEM_ATTR_CODE_PERM_MASK) << SET_MEM_ATTR_CODE_PERM_SHIFT) | \
+ (( (d_perm) & SET_MEM_ATTR_DATA_PERM_MASK) << SET_MEM_ATTR_DATA_PERM_SHIFT))
+
+/* MM SVC Return error codes */
+#define ARM_SVC_SPM_RET_SUCCESS 0
+#define ARM_SVC_SPM_RET_NOT_SUPPORTED -1
+#define ARM_SVC_SPM_RET_INVALID_PARAMS -2
+#define ARM_SVC_SPM_RET_DENIED -3
+#define ARM_SVC_SPM_RET_NO_MEMORY -5
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/IndustryStandard/ArmStdSmc.h b/roms/edk2/ArmPkg/Include/IndustryStandard/ArmStdSmc.h new file mode 100644 index 000000000..3509eb680 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/IndustryStandard/ArmStdSmc.h @@ -0,0 +1,116 @@ +/** @file
+*
+* Copyright (c) 2012-2017, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef __ARM_STD_SMC_H__
+#define __ARM_STD_SMC_H__
+
+/*
+ * SMC function IDs for Standard Service queries
+ */
+
+#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00
+#define ARM_SMC_ID_STD_UID 0x8400ff01
+/* 0x8400ff02 is reserved */
+#define ARM_SMC_ID_STD_REVISION 0x8400ff03
+
+/*
+ * The 'Standard Service Call UID' is supposed to return the Standard
+ * Service UUID. This is a 128-bit value.
+ */
+#define ARM_SMC_STD_UUID0 0x108d905b
+#define ARM_SMC_STD_UUID1 0x47e8f863
+#define ARM_SMC_STD_UUID2 0xfbc02dae
+#define ARM_SMC_STD_UUID3 0xe2f64156
+
+/*
+ * ARM Standard Service Calls revision numbers
+ * The current revision is: 0.1
+ */
+#define ARM_SMC_STD_REVISION_MAJOR 0x0
+#define ARM_SMC_STD_REVISION_MINOR 0x1
+
+/*
+ * Management Mode (MM) calls cover a subset of the Standard Service Call range.
+ * The list below is not exhaustive.
+ */
+#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040
+#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040
+
+// Request service from secure standalone MM environment
+#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041
+#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041
+
+/* MM return error codes */
+#define ARM_SMC_MM_RET_SUCCESS 0
+#define ARM_SMC_MM_RET_NOT_SUPPORTED -1
+#define ARM_SMC_MM_RET_INVALID_PARAMS -2
+#define ARM_SMC_MM_RET_DENIED -3
+#define ARM_SMC_MM_RET_NO_MEMORY -4
+
+/*
+ * Power State Coordination Interface (PSCI) calls cover a subset of the
+ * Standard Service Call range.
+ * The list below is not exhaustive.
+ */
+#define ARM_SMC_ID_PSCI_VERSION 0x84000000
+#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH64 0xc4000001
+#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH32 0x84000001
+#define ARM_SMC_ID_PSCI_CPU_OFF 0x84000002
+#define ARM_SMC_ID_PSCI_CPU_ON_AARCH64 0xc4000003
+#define ARM_SMC_ID_PSCI_CPU_ON_AARCH32 0x84000003
+#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH64 0xc4000004
+#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH32 0x84000004
+#define ARM_SMC_ID_PSCI_MIGRATE_AARCH64 0xc4000005
+#define ARM_SMC_ID_PSCI_MIGRATE_AARCH32 0x84000005
+#define ARM_SMC_ID_PSCI_SYSTEM_OFF 0x84000008
+#define ARM_SMC_ID_PSCI_SYSTEM_RESET 0x84000009
+
+/* The current PSCI version is: 0.2 */
+#define ARM_SMC_PSCI_VERSION_MAJOR 0
+#define ARM_SMC_PSCI_VERSION_MINOR 2
+#define ARM_SMC_PSCI_VERSION \
+ ((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR)
+
+/* PSCI return error codes */
+#define ARM_SMC_PSCI_RET_SUCCESS 0
+#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1
+#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2
+#define ARM_SMC_PSCI_RET_DENIED -3
+#define ARM_SMC_PSCI_RET_ALREADY_ON -4
+#define ARM_SMC_PSCI_RET_ON_PENDING -5
+#define ARM_SMC_PSCI_RET_INTERN_FAIL -6
+#define ARM_SMC_PSCI_RET_NOT_PRESENT -7
+#define ARM_SMC_PSCI_RET_DISABLED -8
+
+#define ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) \
+ ((((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
+
+#define ARM_SMC_PSCI_TARGET_CPU64(Aff3, Aff2, Aff1, Aff0) \
+ ((((Aff3) & 0xFFULL) << 32) | (((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
+
+#define ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId) ((TargetId) & 0xFF)
+#define ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId) (((TargetId) >> 8) & 0xFF)
+
+#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0
+#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1
+#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2
+#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3
+
+#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON 0
+#define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1
+#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2
+
+/*
+ * SMC function IDs for Trusted OS Service queries
+ */
+#define ARM_SMC_ID_TOS_CALL_COUNT 0xbf00ff00
+#define ARM_SMC_ID_TOS_UID 0xbf00ff01
+/* 0xbf00ff02 is reserved */
+#define ARM_SMC_ID_TOS_REVISION 0xbf00ff03
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Library/ArmDisassemblerLib.h b/roms/edk2/ArmPkg/Include/Library/ArmDisassemblerLib.h new file mode 100644 index 000000000..c103b72e8 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/ArmDisassemblerLib.h @@ -0,0 +1,37 @@ +/** @file
+
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __ARM_DISASSEBLER_LIB_H__
+#define __ARM_DISASSEBLER_LIB_H__
+
+/**
+ Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+ point to next instruction.
+
+ We cheat and only decode instructions that access
+ memory. If the instruction is not found we dump the instruction in hex.
+
+ @param OpCodePtrPtr Pointer to pointer of ARM Thumb instruction to disassemble.
+ @param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream
+ @param Extended TRUE dump hex for instruction too.
+ @param ItBlock Size of IT Block
+ @param Buf Buffer to sprintf disassembly into.
+ @param Size Size of Buf in bytes.
+
+**/
+VOID
+DisassembleInstruction (
+ IN UINT8 **OpCodePtr,
+ IN BOOLEAN Thumb,
+ IN BOOLEAN Extended,
+ IN OUT UINT32 *ItBlock,
+ OUT CHAR8 *Buf,
+ OUT UINTN Size
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h b/roms/edk2/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h new file mode 100644 index 000000000..d3051be30 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h @@ -0,0 +1,85 @@ +/** @file
+
+ Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __ARM_GENERIC_TIMER_COUNTER_LIB_H__
+#define __ARM_GENERIC_TIMER_COUNTER_LIB_H__
+
+VOID
+EFIAPI
+ArmGenericTimerEnableTimer (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmGenericTimerReenableTimer (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmGenericTimerDisableTimer (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmGenericTimerSetTimerFreq (
+ IN UINTN FreqInHz
+ );
+
+UINTN
+EFIAPI
+ArmGenericTimerGetTimerFreq (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmGenericTimerSetTimerVal (
+ IN UINTN Value
+ );
+
+UINTN
+EFIAPI
+ArmGenericTimerGetTimerVal (
+ VOID
+ );
+
+UINT64
+EFIAPI
+ArmGenericTimerGetSystemCount (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmGenericTimerGetTimerCtrlReg (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmGenericTimerSetTimerCtrlReg (
+ UINTN Value
+ );
+
+UINT64
+EFIAPI
+ArmGenericTimerGetCompareVal (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmGenericTimerSetCompareVal (
+ IN UINT64 Value
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Library/ArmGicArchLib.h b/roms/edk2/ArmPkg/Include/Library/ArmGicArchLib.h new file mode 100644 index 000000000..264322f1d --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/ArmGicArchLib.h @@ -0,0 +1,27 @@ +/** @file
+*
+* Copyright (c) 2015, Linaro Ltd. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef __ARM_GIC_ARCH_LIB_H__
+#define __ARM_GIC_ARCH_LIB_H__
+
+//
+// GIC definitions
+//
+typedef enum {
+ ARM_GIC_ARCH_REVISION_2,
+ ARM_GIC_ARCH_REVISION_3
+} ARM_GIC_ARCH_REVISION;
+
+
+ARM_GIC_ARCH_REVISION
+EFIAPI
+ArmGicGetSupportedArchRevision (
+ VOID
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Library/ArmGicLib.h b/roms/edk2/ArmPkg/Include/Library/ArmGicLib.h new file mode 100644 index 000000000..550931896 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/ArmGicLib.h @@ -0,0 +1,327 @@ +/** @file
+*
+* Copyright (c) 2011-2018, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef __ARMGIC_H
+#define __ARMGIC_H
+
+#include <Library/ArmGicArchLib.h>
+
+// GIC Distributor
+#define ARM_GIC_ICDDCR 0x000 // Distributor Control Register
+#define ARM_GIC_ICDICTR 0x004 // Interrupt Controller Type Register
+#define ARM_GIC_ICDIIDR 0x008 // Implementer Identification Register
+
+// Each reg base below repeats for Number of interrupts / 4 (see GIC spec)
+#define ARM_GIC_ICDISR 0x080 // Interrupt Security Registers
+#define ARM_GIC_ICDISER 0x100 // Interrupt Set-Enable Registers
+#define ARM_GIC_ICDICER 0x180 // Interrupt Clear-Enable Registers
+#define ARM_GIC_ICDSPR 0x200 // Interrupt Set-Pending Registers
+#define ARM_GIC_ICDICPR 0x280 // Interrupt Clear-Pending Registers
+#define ARM_GIC_ICDABR 0x300 // Active Bit Registers
+
+// Each reg base below repeats for Number of interrupts / 4
+#define ARM_GIC_ICDIPR 0x400 // Interrupt Priority Registers
+
+// Each reg base below repeats for Number of interrupts
+#define ARM_GIC_ICDIPTR 0x800 // Interrupt Processor Target Registers
+#define ARM_GIC_ICDICFR 0xC00 // Interrupt Configuration Registers
+
+#define ARM_GIC_ICDPPISR 0xD00 // PPI Status register
+
+// just one of these
+#define ARM_GIC_ICDSGIR 0xF00 // Software Generated Interrupt Register
+
+// GICv3 specific registers
+#define ARM_GICD_IROUTER 0x6100 // Interrupt Routing Registers
+
+// GICD_CTLR bits
+#define ARM_GIC_ICDDCR_ARE (1 << 4) // Affinity Routing Enable (ARE)
+#define ARM_GIC_ICDDCR_DS (1 << 6) // Disable Security (DS)
+
+// GICD_ICDICFR bits
+#define ARM_GIC_ICDICFR_WIDTH 32 // ICDICFR is a 32 bit register
+#define ARM_GIC_ICDICFR_BYTES (ARM_GIC_ICDICFR_WIDTH / 8)
+#define ARM_GIC_ICDICFR_F_WIDTH 2 // Each F field is 2 bits
+#define ARM_GIC_ICDICFR_F_STRIDE 16 // (32/2) F fields per register
+#define ARM_GIC_ICDICFR_F_CONFIG1_BIT 1 // Bit number within F field
+#define ARM_GIC_ICDICFR_LEVEL_TRIGGERED 0x0 // Level triggered interrupt
+#define ARM_GIC_ICDICFR_EDGE_TRIGGERED 0x1 // Edge triggered interrupt
+
+
+// GIC Redistributor
+#define ARM_GICR_CTLR_FRAME_SIZE SIZE_64KB
+#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB
+#define ARM_GICR_SGI_VLPI_FRAME_SIZE SIZE_64KB
+#define ARM_GICR_SGI_RESERVED_FRAME_SIZE SIZE_64KB
+
+// GIC Redistributor Control frame
+#define ARM_GICR_TYPER 0x0008 // Redistributor Type Register
+
+// GIC Redistributor TYPER bit assignments
+#define ARM_GICR_TYPER_PLPIS (1 << 0) // Physical LPIs
+#define ARM_GICR_TYPER_VLPIS (1 << 1) // Virtual LPIs
+#define ARM_GICR_TYPER_DIRECTLPI (1 << 3) // Direct LPIs
+#define ARM_GICR_TYPER_LAST (1 << 4) // Last Redistributor in series
+#define ARM_GICR_TYPER_DPGS (1 << 5) // Disable Processor Group
+ // Selection Support
+#define ARM_GICR_TYPER_PROCNO (0xFFFF << 8) // Processor Number
+#define ARM_GICR_TYPER_COMMONLPIAFF (0x3 << 24) // Common LPI Affinity
+#define ARM_GICR_TYPER_AFFINITY (0xFFFFFFFFULL << 32) // Redistributor Affinity
+
+#define ARM_GICR_TYPER_GET_AFFINITY(TypeReg) (((TypeReg) & \
+ ARM_GICR_TYPER_AFFINITY) >> 32)
+
+// GIC SGI & PPI Redistributor frame
+#define ARM_GICR_ISENABLER 0x0100 // Interrupt Set-Enable Registers
+#define ARM_GICR_ICENABLER 0x0180 // Interrupt Clear-Enable Registers
+
+// GIC Cpu interface
+#define ARM_GIC_ICCICR 0x00 // CPU Interface Control Register
+#define ARM_GIC_ICCPMR 0x04 // Interrupt Priority Mask Register
+#define ARM_GIC_ICCBPR 0x08 // Binary Point Register
+#define ARM_GIC_ICCIAR 0x0C // Interrupt Acknowledge Register
+#define ARM_GIC_ICCEIOR 0x10 // End Of Interrupt Register
+#define ARM_GIC_ICCRPR 0x14 // Running Priority Register
+#define ARM_GIC_ICCPIR 0x18 // Highest Pending Interrupt Register
+#define ARM_GIC_ICCABPR 0x1C // Aliased Binary Point Register
+#define ARM_GIC_ICCIIDR 0xFC // Identification Register
+
+#define ARM_GIC_ICDSGIR_FILTER_TARGETLIST 0x0
+#define ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE 0x1
+#define ARM_GIC_ICDSGIR_FILTER_ITSELF 0x2
+
+// Bit-masks to configure the CPU Interface Control register
+#define ARM_GIC_ICCICR_ENABLE_SECURE 0x01
+#define ARM_GIC_ICCICR_ENABLE_NS 0x02
+#define ARM_GIC_ICCICR_ACK_CTL 0x04
+#define ARM_GIC_ICCICR_SIGNAL_SECURE_TO_FIQ 0x08
+#define ARM_GIC_ICCICR_USE_SBPR 0x10
+
+// Bit Mask for GICC_IIDR
+#define ARM_GIC_ICCIIDR_GET_PRODUCT_ID(IccIidr) (((IccIidr) >> 20) & 0xFFF)
+#define ARM_GIC_ICCIIDR_GET_ARCH_VERSION(IccIidr) (((IccIidr) >> 16) & 0xF)
+#define ARM_GIC_ICCIIDR_GET_REVISION(IccIidr) (((IccIidr) >> 12) & 0xF)
+#define ARM_GIC_ICCIIDR_GET_IMPLEMENTER(IccIidr) ((IccIidr) & 0xFFF)
+
+// Bit Mask for
+#define ARM_GIC_ICCIAR_ACKINTID 0x3FF
+
+UINTN
+EFIAPI
+ArmGicGetInterfaceIdentification (
+ IN INTN GicInterruptInterfaceBase
+ );
+
+// GIC Secure interfaces
+VOID
+EFIAPI
+ArmGicSetupNonSecure (
+ IN UINTN MpId,
+ IN INTN GicDistributorBase,
+ IN INTN GicInterruptInterfaceBase
+ );
+
+VOID
+EFIAPI
+ArmGicSetSecureInterrupts (
+ IN UINTN GicDistributorBase,
+ IN UINTN* GicSecureInterruptMask,
+ IN UINTN GicSecureInterruptMaskSize
+ );
+
+VOID
+EFIAPI
+ArmGicEnableInterruptInterface (
+ IN INTN GicInterruptInterfaceBase
+ );
+
+VOID
+EFIAPI
+ArmGicDisableInterruptInterface (
+ IN INTN GicInterruptInterfaceBase
+ );
+
+VOID
+EFIAPI
+ArmGicEnableDistributor (
+ IN INTN GicDistributorBase
+ );
+
+VOID
+EFIAPI
+ArmGicDisableDistributor (
+ IN INTN GicDistributorBase
+ );
+
+UINTN
+EFIAPI
+ArmGicGetMaxNumInterrupts (
+ IN INTN GicDistributorBase
+ );
+
+VOID
+EFIAPI
+ArmGicSendSgiTo (
+ IN INTN GicDistributorBase,
+ IN INTN TargetListFilter,
+ IN INTN CPUTargetList,
+ IN INTN SgiId
+ );
+
+/*
+ * Acknowledge and return the value of the Interrupt Acknowledge Register
+ *
+ * InterruptId is returned separately from the register value because in
+ * the GICv2 the register value contains the CpuId and InterruptId while
+ * in the GICv3 the register value is only the InterruptId.
+ *
+ * @param GicInterruptInterfaceBase Base Address of the GIC CPU Interface
+ * @param InterruptId InterruptId read from the Interrupt
+ * Acknowledge Register
+ *
+ * @retval value returned by the Interrupt Acknowledge Register
+ *
+ */
+UINTN
+EFIAPI
+ArmGicAcknowledgeInterrupt (
+ IN UINTN GicInterruptInterfaceBase,
+ OUT UINTN *InterruptId
+ );
+
+VOID
+EFIAPI
+ArmGicEndOfInterrupt (
+ IN UINTN GicInterruptInterfaceBase,
+ IN UINTN Source
+ );
+
+UINTN
+EFIAPI
+ArmGicSetPriorityMask (
+ IN INTN GicInterruptInterfaceBase,
+ IN INTN PriorityMask
+ );
+
+VOID
+EFIAPI
+ArmGicEnableInterrupt (
+ IN UINTN GicDistributorBase,
+ IN UINTN GicRedistributorBase,
+ IN UINTN Source
+ );
+
+VOID
+EFIAPI
+ArmGicDisableInterrupt (
+ IN UINTN GicDistributorBase,
+ IN UINTN GicRedistributorBase,
+ IN UINTN Source
+ );
+
+BOOLEAN
+EFIAPI
+ArmGicIsInterruptEnabled (
+ IN UINTN GicDistributorBase,
+ IN UINTN GicRedistributorBase,
+ IN UINTN Source
+ );
+
+// GIC revision 2 specific declarations
+
+// Interrupts from 1020 to 1023 are considered as special interrupts
+// (eg: spurious interrupts)
+#define ARM_GIC_IS_SPECIAL_INTERRUPTS(Interrupt) \
+ (((Interrupt) >= 1020) && ((Interrupt) <= 1023))
+
+VOID
+EFIAPI
+ArmGicV2SetupNonSecure (
+ IN UINTN MpId,
+ IN INTN GicDistributorBase,
+ IN INTN GicInterruptInterfaceBase
+ );
+
+VOID
+EFIAPI
+ArmGicV2EnableInterruptInterface (
+ IN INTN GicInterruptInterfaceBase
+ );
+
+VOID
+EFIAPI
+ArmGicV2DisableInterruptInterface (
+ IN INTN GicInterruptInterfaceBase
+ );
+
+UINTN
+EFIAPI
+ArmGicV2AcknowledgeInterrupt (
+ IN UINTN GicInterruptInterfaceBase
+ );
+
+VOID
+EFIAPI
+ArmGicV2EndOfInterrupt (
+ IN UINTN GicInterruptInterfaceBase,
+ IN UINTN Source
+ );
+
+// GIC revision 3 specific declarations
+
+#define ICC_SRE_EL2_SRE (1 << 0)
+
+#define ARM_GICD_IROUTER_IRM BIT31
+
+UINT32
+EFIAPI
+ArmGicV3GetControlSystemRegisterEnable (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmGicV3SetControlSystemRegisterEnable (
+ IN UINT32 ControlSystemRegisterEnable
+ );
+
+VOID
+EFIAPI
+ArmGicV3EnableInterruptInterface (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmGicV3DisableInterruptInterface (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmGicV3AcknowledgeInterrupt (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmGicV3EndOfInterrupt (
+ IN UINTN Source
+ );
+
+VOID
+ArmGicV3SetBinaryPointer (
+ IN UINTN BinaryPoint
+ );
+
+VOID
+ArmGicV3SetPriorityMask (
+ IN UINTN Priority
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Library/ArmHvcLib.h b/roms/edk2/ArmPkg/Include/Library/ArmHvcLib.h new file mode 100644 index 000000000..d26f0cff3 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/ArmHvcLib.h @@ -0,0 +1,40 @@ +/** @file
+*
+* Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef __ARM_HVC_LIB__
+#define __ARM_HVC_LIB__
+
+/**
+ * The size of the HVC arguments are different between AArch64 and AArch32.
+ * The native size is used for the arguments.
+ */
+typedef struct {
+ UINTN Arg0;
+ UINTN Arg1;
+ UINTN Arg2;
+ UINTN Arg3;
+ UINTN Arg4;
+ UINTN Arg5;
+ UINTN Arg6;
+ UINTN Arg7;
+} ARM_HVC_ARGS;
+
+/**
+ Trigger an HVC call
+
+ HVC calls can take up to 8 arguments and return up to 4 return values.
+ Therefore, the 4 first fields in the ARM_HVC_ARGS structure are used
+ for both input and output values.
+
+**/
+VOID
+ArmCallHvc (
+ IN OUT ARM_HVC_ARGS *Args
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Library/ArmLib.h b/roms/edk2/ArmPkg/Include/Library/ArmLib.h new file mode 100644 index 000000000..5a27b7c2f --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/ArmLib.h @@ -0,0 +1,718 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __ARM_LIB__
+#define __ARM_LIB__
+
+#include <Uefi/UefiBaseType.h>
+
+#ifdef MDE_CPU_ARM
+ #include <Chipset/ArmV7.h>
+#elif defined(MDE_CPU_AARCH64)
+ #include <Chipset/AArch64.h>
+#else
+ #error "Unknown chipset."
+#endif
+
+#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | EFI_MEMORY_WC | \
+ EFI_MEMORY_WT | EFI_MEMORY_WB | \
+ EFI_MEMORY_UCE)
+
+/**
+ * The UEFI firmware must not use the ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_* attributes.
+ *
+ * The Non Secure memory attribute (ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_*) should only
+ * be used in Secure World to distinguished Secure to Non-Secure memory.
+ */
+typedef enum {
+ ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED = 0,
+ ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED,
+ ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
+ ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK,
+
+ // On some platforms, memory mapped flash region is designed as not supporting
+ // shareable attribute, so WRITE_BACK_NONSHAREABLE is added for such special
+ // need.
+ // Do NOT use below two attributes if you are not sure.
+ ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE,
+ ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE,
+
+ ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH,
+ ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH,
+ ARM_MEMORY_REGION_ATTRIBUTE_DEVICE,
+ ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE
+} ARM_MEMORY_REGION_ATTRIBUTES;
+
+#define IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(attr) ((UINT32)(attr) & 1)
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS PhysicalBase;
+ EFI_VIRTUAL_ADDRESS VirtualBase;
+ UINT64 Length;
+ ARM_MEMORY_REGION_ATTRIBUTES Attributes;
+} ARM_MEMORY_REGION_DESCRIPTOR;
+
+typedef VOID (*CACHE_OPERATION)(VOID);
+typedef VOID (*LINE_OPERATION)(UINTN);
+
+//
+// ARM Processor Mode
+//
+typedef enum {
+ ARM_PROCESSOR_MODE_USER = 0x10,
+ ARM_PROCESSOR_MODE_FIQ = 0x11,
+ ARM_PROCESSOR_MODE_IRQ = 0x12,
+ ARM_PROCESSOR_MODE_SUPERVISOR = 0x13,
+ ARM_PROCESSOR_MODE_ABORT = 0x17,
+ ARM_PROCESSOR_MODE_HYP = 0x1A,
+ ARM_PROCESSOR_MODE_UNDEFINED = 0x1B,
+ ARM_PROCESSOR_MODE_SYSTEM = 0x1F,
+ ARM_PROCESSOR_MODE_MASK = 0x1F
+} ARM_PROCESSOR_MODE;
+
+//
+// ARM Cpu IDs
+//
+#define ARM_CPU_IMPLEMENTER_MASK (0xFFU << 24)
+#define ARM_CPU_IMPLEMENTER_ARMLTD (0x41U << 24)
+#define ARM_CPU_IMPLEMENTER_DEC (0x44U << 24)
+#define ARM_CPU_IMPLEMENTER_MOT (0x4DU << 24)
+#define ARM_CPU_IMPLEMENTER_QUALCOMM (0x51U << 24)
+#define ARM_CPU_IMPLEMENTER_MARVELL (0x56U << 24)
+
+#define ARM_CPU_PRIMARY_PART_MASK (0xFFF << 4)
+#define ARM_CPU_PRIMARY_PART_CORTEXA5 (0xC05 << 4)
+#define ARM_CPU_PRIMARY_PART_CORTEXA7 (0xC07 << 4)
+#define ARM_CPU_PRIMARY_PART_CORTEXA8 (0xC08 << 4)
+#define ARM_CPU_PRIMARY_PART_CORTEXA9 (0xC09 << 4)
+#define ARM_CPU_PRIMARY_PART_CORTEXA15 (0xC0F << 4)
+
+//
+// ARM MP Core IDs
+//
+#define ARM_CORE_AFF0 0xFF
+#define ARM_CORE_AFF1 (0xFF << 8)
+#define ARM_CORE_AFF2 (0xFF << 16)
+#define ARM_CORE_AFF3 (0xFFULL << 32)
+
+#define ARM_CORE_MASK ARM_CORE_AFF0
+#define ARM_CLUSTER_MASK ARM_CORE_AFF1
+#define GET_CORE_ID(MpId) ((MpId) & ARM_CORE_MASK)
+#define GET_CLUSTER_ID(MpId) (((MpId) & ARM_CLUSTER_MASK) >> 8)
+#define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId))
+#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)
+
+UINTN
+EFIAPI
+ArmDataCacheLineLength (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmInstructionCacheLineLength (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmCacheWritebackGranule (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmIsArchTimerImplemented (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmReadIdPfr0 (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmReadIdPfr1 (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmCacheInfo (
+ VOID
+ );
+
+BOOLEAN
+EFIAPI
+ArmIsMpCore (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmInvalidateDataCache (
+ VOID
+ );
+
+
+VOID
+EFIAPI
+ArmCleanInvalidateDataCache (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmCleanDataCache (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmInvalidateInstructionCache (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmInvalidateDataCacheEntryByMVA (
+ IN UINTN Address
+ );
+
+VOID
+EFIAPI
+ArmCleanDataCacheEntryToPoUByMVA (
+ IN UINTN Address
+ );
+
+VOID
+EFIAPI
+ArmInvalidateInstructionCacheEntryToPoUByMVA (
+ IN UINTN Address
+ );
+
+VOID
+EFIAPI
+ArmCleanDataCacheEntryByMVA (
+IN UINTN Address
+);
+
+VOID
+EFIAPI
+ArmCleanInvalidateDataCacheEntryByMVA (
+ IN UINTN Address
+ );
+
+VOID
+EFIAPI
+ArmEnableDataCache (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmDisableDataCache (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmEnableInstructionCache (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmDisableInstructionCache (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmEnableMmu (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmDisableMmu (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmEnableCachesAndMmu (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmDisableCachesAndMmu (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmEnableInterrupts (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmDisableInterrupts (
+ VOID
+ );
+
+BOOLEAN
+EFIAPI
+ArmGetInterruptState (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmEnableAsynchronousAbort (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmDisableAsynchronousAbort (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmEnableIrq (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmDisableIrq (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmEnableFiq (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmDisableFiq (
+ VOID
+ );
+
+BOOLEAN
+EFIAPI
+ArmGetFiqState (
+ VOID
+ );
+
+/**
+ * Invalidate Data and Instruction TLBs
+ */
+VOID
+EFIAPI
+ArmInvalidateTlb (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmUpdateTranslationTableEntry (
+ IN VOID *TranslationTableEntry,
+ IN VOID *Mva
+ );
+
+VOID
+EFIAPI
+ArmSetDomainAccessControl (
+ IN UINT32 Domain
+ );
+
+VOID
+EFIAPI
+ArmSetTTBR0 (
+ IN VOID *TranslationTableBase
+ );
+
+VOID
+EFIAPI
+ArmSetTTBCR (
+ IN UINT32 Bits
+ );
+
+VOID *
+EFIAPI
+ArmGetTTBR0BaseAddress (
+ VOID
+ );
+
+BOOLEAN
+EFIAPI
+ArmMmuEnabled (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmEnableBranchPrediction (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmDisableBranchPrediction (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmSetLowVectors (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmSetHighVectors (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmDataMemoryBarrier (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmDataSynchronizationBarrier (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmInstructionSynchronizationBarrier (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteVBar (
+ IN UINTN VectorBase
+ );
+
+UINTN
+EFIAPI
+ArmReadVBar (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteAuxCr (
+ IN UINT32 Bit
+ );
+
+UINT32
+EFIAPI
+ArmReadAuxCr (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmSetAuxCrBit (
+ IN UINT32 Bits
+ );
+
+VOID
+EFIAPI
+ArmUnsetAuxCrBit (
+ IN UINT32 Bits
+ );
+
+VOID
+EFIAPI
+ArmCallSEV (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmCallWFE (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmCallWFI (
+
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmReadMpidr (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmReadMidr (
+ VOID
+ );
+
+UINT32
+EFIAPI
+ArmReadCpacr (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCpacr (
+ IN UINT32 Access
+ );
+
+VOID
+EFIAPI
+ArmEnableVFP (
+ VOID
+ );
+
+/**
+ Get the Secure Configuration Register value
+
+ @return Value read from the Secure Configuration Register
+
+**/
+UINT32
+EFIAPI
+ArmReadScr (
+ VOID
+ );
+
+/**
+ Set the Secure Configuration Register
+
+ @param Value Value to write to the Secure Configuration Register
+
+**/
+VOID
+EFIAPI
+ArmWriteScr (
+ IN UINT32 Value
+ );
+
+UINT32
+EFIAPI
+ArmReadMVBar (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteMVBar (
+ IN UINT32 VectorMonitorBase
+ );
+
+UINT32
+EFIAPI
+ArmReadSctlr (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteSctlr (
+ IN UINT32 Value
+ );
+
+UINTN
+EFIAPI
+ArmReadHVBar (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteHVBar (
+ IN UINTN HypModeVectorBase
+ );
+
+
+//
+// Helper functions for accessing CPU ACTLR
+//
+
+UINTN
+EFIAPI
+ArmReadCpuActlr (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCpuActlr (
+ IN UINTN Val
+ );
+
+VOID
+EFIAPI
+ArmSetCpuActlrBit (
+ IN UINTN Bits
+ );
+
+VOID
+EFIAPI
+ArmUnsetCpuActlrBit (
+ IN UINTN Bits
+ );
+
+//
+// Accessors for the architected generic timer registers
+//
+
+#define ARM_ARCH_TIMER_ENABLE (1 << 0)
+#define ARM_ARCH_TIMER_IMASK (1 << 1)
+#define ARM_ARCH_TIMER_ISTATUS (1 << 2)
+
+UINTN
+EFIAPI
+ArmReadCntFrq (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCntFrq (
+ UINTN FreqInHz
+ );
+
+UINT64
+EFIAPI
+ArmReadCntPct (
+ VOID
+ );
+
+UINTN
+EFIAPI
+ArmReadCntkCtl (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCntkCtl (
+ UINTN Val
+ );
+
+UINTN
+EFIAPI
+ArmReadCntpTval (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCntpTval (
+ UINTN Val
+ );
+
+UINTN
+EFIAPI
+ArmReadCntpCtl (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCntpCtl (
+ UINTN Val
+ );
+
+UINTN
+EFIAPI
+ArmReadCntvTval (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCntvTval (
+ UINTN Val
+ );
+
+UINTN
+EFIAPI
+ArmReadCntvCtl (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCntvCtl (
+ UINTN Val
+ );
+
+UINT64
+EFIAPI
+ArmReadCntvCt (
+ VOID
+ );
+
+UINT64
+EFIAPI
+ArmReadCntpCval (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCntpCval (
+ UINT64 Val
+ );
+
+UINT64
+EFIAPI
+ArmReadCntvCval (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCntvCval (
+ UINT64 Val
+ );
+
+UINT64
+EFIAPI
+ArmReadCntvOff (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCntvOff (
+ UINT64 Val
+ );
+
+UINTN
+EFIAPI
+ArmGetPhysicalAddressBits (
+ VOID
+ );
+
+#endif // __ARM_LIB__
diff --git a/roms/edk2/ArmPkg/Include/Library/ArmMmuLib.h b/roms/edk2/ArmPkg/Include/Library/ArmMmuLib.h new file mode 100644 index 000000000..23e89a0c6 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/ArmMmuLib.h @@ -0,0 +1,67 @@ +/** @file
+
+ Copyright (c) 2015 - 2016, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __ARM_MMU_LIB__
+#define __ARM_MMU_LIB__
+
+#include <Uefi/UefiBaseType.h>
+
+#include <Library/ArmLib.h>
+
+EFI_STATUS
+EFIAPI
+ArmConfigureMmu (
+ IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
+ OUT VOID **TranslationTableBase OPTIONAL,
+ OUT UINTN *TranslationTableSize OPTIONAL
+ );
+
+EFI_STATUS
+EFIAPI
+ArmSetMemoryRegionNoExec (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ );
+
+EFI_STATUS
+EFIAPI
+ArmClearMemoryRegionNoExec (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ );
+
+EFI_STATUS
+EFIAPI
+ArmSetMemoryRegionReadOnly (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ );
+
+EFI_STATUS
+EFIAPI
+ArmClearMemoryRegionReadOnly (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ );
+
+VOID
+EFIAPI
+ArmReplaceLiveTranslationEntry (
+ IN UINT64 *Entry,
+ IN UINT64 Value,
+ IN UINT64 RegionStart
+ );
+
+EFI_STATUS
+ArmSetMemoryAttributes (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Attributes
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Library/ArmMtlLib.h b/roms/edk2/ArmPkg/Include/Library/ArmMtlLib.h new file mode 100644 index 000000000..35059bf78 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/ArmMtlLib.h @@ -0,0 +1,131 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#ifndef ARM_MTL_LIB_H_
+#define ARM_MTL_LIB_H_
+
+#include <Uefi/UefiBaseType.h>
+
+// Ideally we don't need packed struct. However we can't rely on compilers.
+#pragma pack(1)
+
+typedef struct {
+ UINT32 Reserved1;
+ UINT32 ChannelStatus;
+ UINT64 Reserved2;
+ UINT32 Flags;
+ UINT32 Length;
+ UINT32 MessageHeader;
+
+ // NOTE: Since EDK2 does not allow flexible array member [] we declare
+ // here array of 1 element length. However below is used as a variable
+ // length array.
+ UINT32 Payload[1]; // size less object gives offset to payload.
+} MTL_MAILBOX;
+
+#pragma pack()
+
+// Channel Type, Low-priority, and High-priority
+typedef enum {
+ MTL_CHANNEL_TYPE_LOW = 0,
+ MTL_CHANNEL_TYPE_HIGH = 1
+} MTL_CHANNEL_TYPE;
+
+typedef struct {
+ UINT64 PhysicalAddress;
+ UINT32 ModifyMask;
+ UINT32 PreserveMask;
+} MTL_DOORBELL;
+
+typedef struct {
+ MTL_CHANNEL_TYPE ChannelType;
+ MTL_MAILBOX * CONST MailBox;
+ MTL_DOORBELL DoorBell;
+} MTL_CHANNEL;
+
+/** Wait until channel is free.
+
+ @param[in] Channel Pointer to a channel.
+ @param[in] TimeOutInMicroSeconds Time out in micro seconds.
+
+ @retval EFI_SUCCESS Channel is free.
+ @retval EFI_TIMEOUT Time out error.
+**/
+EFI_STATUS
+MtlWaitUntilChannelFree (
+ IN MTL_CHANNEL *Channel,
+ IN UINTN TimeOutInMicroSeconds
+ );
+
+/** Return the address of the message payload.
+
+ @param[in] Channel Pointer to a channel.
+
+ @retval UINT32* Pointer to the payload.
+**/
+UINT32*
+MtlGetChannelPayload (
+ IN MTL_CHANNEL *Channel
+ );
+
+/** Return pointer to a channel for the requested channel type.
+
+ @param[in] ChannelType ChannelType, Low or High priority channel.
+ MTL_CHANNEL_TYPE_LOW or
+ MTL_CHANNEL_TYPE_HIGH
+
+ @param[out] Channel Holds pointer to the channel.
+
+ @retval EFI_SUCCESS Pointer to channel is returned.
+ @retval EFI_UNSUPPORTED Requested channel type not supported.
+**/
+EFI_STATUS
+MtlGetChannel (
+ IN MTL_CHANNEL_TYPE ChannelType,
+ OUT MTL_CHANNEL **Channel
+ );
+
+/** Mark the channel busy and ring the doorbell.
+
+ @param[in] Channel Pointer to a channel.
+ @param[in] MessageHeader Message header.
+
+ @param[out] PayloadLength Message length.
+
+ @retval EFI_SUCCESS Message sent successfully.
+ @retval EFI_DEVICE_ERROR Channel is busy.
+**/
+EFI_STATUS
+MtlSendMessage (
+ IN MTL_CHANNEL *Channel,
+ IN UINT32 MessageHeader,
+ OUT UINT32 PayloadLength
+ );
+
+/** Wait for a response on a channel.
+
+ If channel is free after sending message, it implies SCP responded
+ with a response on the channel.
+
+ @param[in] Channel Pointer to a channel.
+
+ @retval EFI_SUCCESS Message received successfully.
+ @retval EFI_TIMEOUT Time out error.
+**/
+EFI_STATUS
+MtlReceiveMessage (
+ IN MTL_CHANNEL *Channel,
+ OUT UINT32 *MessageHeader,
+ OUT UINT32 *PayloadLength
+ );
+
+#endif /* ARM_MTL_LIB_H_ */
+
diff --git a/roms/edk2/ArmPkg/Include/Library/ArmSmcLib.h b/roms/edk2/ArmPkg/Include/Library/ArmSmcLib.h new file mode 100644 index 000000000..835d6788e --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/ArmSmcLib.h @@ -0,0 +1,40 @@ +/** @file
+*
+* Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef __ARM_SMC_LIB__
+#define __ARM_SMC_LIB__
+
+/**
+ * The size of the SMC arguments are different between AArch64 and AArch32.
+ * The native size is used for the arguments.
+ */
+typedef struct {
+ UINTN Arg0;
+ UINTN Arg1;
+ UINTN Arg2;
+ UINTN Arg3;
+ UINTN Arg4;
+ UINTN Arg5;
+ UINTN Arg6;
+ UINTN Arg7;
+} ARM_SMC_ARGS;
+
+/**
+ Trigger an SMC call
+
+ SMC calls can take up to 7 arguments and return up to 4 return values.
+ Therefore, the 4 first fields in the ARM_SMC_ARGS structure are used
+ for both input and output values.
+
+**/
+VOID
+ArmCallSmc (
+ IN OUT ARM_SMC_ARGS *Args
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Library/ArmSvcLib.h b/roms/edk2/ArmPkg/Include/Library/ArmSvcLib.h new file mode 100644 index 000000000..a94ead196 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/ArmSvcLib.h @@ -0,0 +1,40 @@ +/** @file
+*
+* Copyright (c) 2016 - 2017, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef __ARM_SVC_LIB__
+#define __ARM_SVC_LIB__
+
+/**
+ * The size of the SVC arguments are different between AArch64 and AArch32.
+ * The native size is used for the arguments.
+ */
+typedef struct {
+ UINTN Arg0;
+ UINTN Arg1;
+ UINTN Arg2;
+ UINTN Arg3;
+ UINTN Arg4;
+ UINTN Arg5;
+ UINTN Arg6;
+ UINTN Arg7;
+} ARM_SVC_ARGS;
+
+/**
+ Trigger an SVC call
+
+ SVC calls can take up to 7 arguments and return up to 4 return values.
+ Therefore, the 4 first fields in the ARM_SVC_ARGS structure are used
+ for both input and output values.
+
+**/
+VOID
+ArmCallSvc (
+ IN OUT ARM_SVC_ARGS *Args
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h b/roms/edk2/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h new file mode 100644 index 000000000..bbcf30f85 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h @@ -0,0 +1,25 @@ +/** @file
+
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __DEFAULT_EXCEPTION_HANDLER_LIB_H__
+#define __DEFAULT_EXCEPTION_HANDLER_LIB_H__
+
+/**
+ This is the default action to take on an unexpected exception
+
+ @param ExceptionType Type of the exception
+ @param SystemContext Register state at the time of the Exception
+
+**/
+VOID
+DefaultExceptionHandler (
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN OUT EFI_SYSTEM_CONTEXT SystemContext
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Library/OpteeLib.h b/roms/edk2/ArmPkg/Include/Library/OpteeLib.h new file mode 100644 index 000000000..d71636143 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/OpteeLib.h @@ -0,0 +1,117 @@ +/** @file
+ OP-TEE specific header file.
+
+ Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _OPTEE_H_
+#define _OPTEE_H_
+
+/*
+ * The 'Trusted OS Call UID' is supposed to return the following UUID for
+ * OP-TEE OS. This is a 128-bit value.
+ */
+#define OPTEE_OS_UID0 0x384fb3e0
+#define OPTEE_OS_UID1 0xe7f811e3
+#define OPTEE_OS_UID2 0xaf630002
+#define OPTEE_OS_UID3 0xa5d5c51b
+
+#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_NONE 0x0
+#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INPUT 0x1
+#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_OUTPUT 0x2
+#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INOUT 0x3
+#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INPUT 0x9
+#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_OUTPUT 0xa
+#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INOUT 0xb
+
+#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MASK 0xff
+
+#define OPTEE_SUCCESS 0x00000000
+#define OPTEE_ORIGIN_COMMUNICATION 0x00000002
+#define OPTEE_ERROR_COMMUNICATION 0xFFFF000E
+
+typedef struct {
+ UINT64 BufferAddress;
+ UINT64 Size;
+ UINT64 SharedMemoryReference;
+} OPTEE_MESSAGE_PARAM_MEMORY;
+
+typedef struct {
+ UINT64 A;
+ UINT64 B;
+ UINT64 C;
+} OPTEE_MESSAGE_PARAM_VALUE;
+
+typedef struct {
+ UINT64 Attribute;
+ union {
+ OPTEE_MESSAGE_PARAM_MEMORY Memory;
+ OPTEE_MESSAGE_PARAM_VALUE Value;
+ } Union;
+} OPTEE_MESSAGE_PARAM;
+
+#define OPTEE_MAX_CALL_PARAMS 4
+
+typedef struct {
+ UINT32 Command;
+ UINT32 Function;
+ UINT32 Session;
+ UINT32 CancelId;
+ UINT32 Pad;
+ UINT32 Return;
+ UINT32 ReturnOrigin;
+ UINT32 NumParams;
+
+ // NumParams tells the actual number of element in Params
+ OPTEE_MESSAGE_PARAM Params[OPTEE_MAX_CALL_PARAMS];
+} OPTEE_MESSAGE_ARG;
+
+typedef struct {
+ EFI_GUID Uuid; // [in] GUID/UUID of the Trusted Application
+ UINT32 Session; // [out] Session id
+ UINT32 Return; // [out] Return value
+ UINT32 ReturnOrigin; // [out] Origin of the return value
+} OPTEE_OPEN_SESSION_ARG;
+
+typedef struct {
+ UINT32 Function; // [in] Trusted Application function, specific to the TA
+ UINT32 Session; // [in] Session id
+ UINT32 Return; // [out] Return value
+ UINT32 ReturnOrigin; // [out] Origin of the return value
+ OPTEE_MESSAGE_PARAM Params[OPTEE_MAX_CALL_PARAMS]; // Params for function to be invoked
+} OPTEE_INVOKE_FUNCTION_ARG;
+
+BOOLEAN
+EFIAPI
+IsOpteePresent (
+ VOID
+ );
+
+EFI_STATUS
+EFIAPI
+OpteeInit (
+ VOID
+ );
+
+EFI_STATUS
+EFIAPI
+OpteeOpenSession (
+ IN OUT OPTEE_OPEN_SESSION_ARG *OpenSessionArg
+ );
+
+EFI_STATUS
+EFIAPI
+OpteeCloseSession (
+ IN UINT32 Session
+ );
+
+EFI_STATUS
+EFIAPI
+OpteeInvokeFunction (
+ IN OUT OPTEE_INVOKE_FUNCTION_ARG *InvokeFunctionArg
+ );
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Library/SemihostLib.h b/roms/edk2/ArmPkg/Include/Library/SemihostLib.h new file mode 100644 index 000000000..ce08b2778 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/SemihostLib.h @@ -0,0 +1,132 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Portions copyright (c) 2011, 2012, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __SEMIHOSTING_H__
+#define __SEMIHOSTING_H__
+
+/*
+ *
+ * Please refer to ARM RVDS 3.0 Compiler and Libraries Guide for more information
+ * about the semihosting interface.
+ *
+ */
+
+#define SEMIHOST_FILE_MODE_READ (0 << 2)
+#define SEMIHOST_FILE_MODE_WRITE (1 << 2)
+#define SEMIHOST_FILE_MODE_APPEND (2 << 2)
+#define SEMIHOST_FILE_MODE_UPDATE (1 << 1)
+#define SEMIHOST_FILE_MODE_BINARY (1 << 0)
+#define SEMIHOST_FILE_MODE_ASCII (0 << 0)
+
+BOOLEAN
+SemihostConnectionSupported (
+ VOID
+ );
+
+RETURN_STATUS
+SemihostFileOpen (
+ IN CHAR8 *FileName,
+ IN UINT32 Mode,
+ OUT UINTN *FileHandle
+ );
+
+RETURN_STATUS
+SemihostFileSeek (
+ IN UINTN FileHandle,
+ IN UINTN Offset
+ );
+
+RETURN_STATUS
+SemihostFileRead (
+ IN UINTN FileHandle,
+ IN OUT UINTN *Length,
+ OUT VOID *Buffer
+ );
+
+RETURN_STATUS
+SemihostFileWrite (
+ IN UINTN FileHandle,
+ IN OUT UINTN *Length,
+ IN VOID *Buffer
+ );
+
+RETURN_STATUS
+SemihostFileClose (
+ IN UINTN FileHandle
+ );
+
+RETURN_STATUS
+SemihostFileLength (
+ IN UINTN FileHandle,
+ OUT UINTN *Length
+ );
+
+/**
+ Get a temporary name for a file from the host running the debug agent.
+
+ @param[out] Buffer Pointer to the buffer where the temporary name has to
+ be stored
+ @param[in] Identifier File name identifier (integer in the range 0 to 255)
+ @param[in] Length Length of the buffer to store the temporary name
+
+ @retval RETURN_SUCCESS Temporary name returned
+ @retval RETURN_INVALID_PARAMETER Invalid buffer address
+ @retval RETURN_ABORTED Temporary name not returned
+
+**/
+RETURN_STATUS
+SemihostFileTmpName(
+ OUT VOID *Buffer,
+ IN UINT8 Identifier,
+ IN UINTN Length
+ );
+
+RETURN_STATUS
+SemihostFileRemove (
+ IN CHAR8 *FileName
+ );
+
+/**
+ Rename a specified file.
+
+ @param[in] FileName Name of the file to rename.
+ @param[in] NewFileName The new name of the file.
+
+ @retval RETURN_SUCCESS File Renamed
+ @retval RETURN_INVALID_PARAMETER Either the current or the new name is not specified
+ @retval RETURN_ABORTED Rename failed
+
+**/
+RETURN_STATUS
+SemihostFileRename(
+ IN CHAR8 *FileName,
+ IN CHAR8 *NewFileName
+ );
+
+CHAR8
+SemihostReadCharacter (
+ VOID
+ );
+
+VOID
+SemihostWriteCharacter (
+ IN CHAR8 Character
+ );
+
+VOID
+SemihostWriteString (
+ IN CHAR8 *String
+ );
+
+UINT32
+SemihostSystem (
+ IN CHAR8 *CommandLine
+ );
+
+#endif // __SEMIHOSTING_H__
diff --git a/roms/edk2/ArmPkg/Include/Library/StandaloneMmMmuLib.h b/roms/edk2/ArmPkg/Include/Library/StandaloneMmMmuLib.h new file mode 100644 index 000000000..1d2a0e0c2 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Library/StandaloneMmMmuLib.h @@ -0,0 +1,36 @@ +/** @file
+
+ Copyright (c) 2018, ARM Ltd. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __STANDALONEMM_MMU_LIB__
+#define __STANDALONEMM_MMU_LIB__
+
+EFI_STATUS
+ArmSetMemoryRegionNoExec (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ );
+
+EFI_STATUS
+ArmClearMemoryRegionNoExec (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ );
+
+EFI_STATUS
+ArmSetMemoryRegionReadOnly (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ );
+
+EFI_STATUS
+ArmClearMemoryRegionReadOnly (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ );
+
+#endif /* __STANDALONEMM_MMU_LIB__ */
diff --git a/roms/edk2/ArmPkg/Include/Ppi/ArmMpCoreInfo.h b/roms/edk2/ArmPkg/Include/Ppi/ArmMpCoreInfo.h new file mode 100644 index 000000000..871119bde --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Ppi/ArmMpCoreInfo.h @@ -0,0 +1,52 @@ +/** @file
+*
+* Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef __ARM_MP_CORE_INFO_PPI_H__
+#define __ARM_MP_CORE_INFO_PPI_H__
+
+#include <Guid/ArmMpCoreInfo.h>
+
+#define ARM_MP_CORE_INFO_PPI_GUID \
+ { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} }
+
+/**
+ This service of the EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into
+ permanent memory.
+
+ @param PeiServices Pointer to the PEI Services Table.
+ @param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the
+ Temporary RAM contents.
+ @param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the
+ Temporary RAM contents.
+ @param CopySize Amount of memory to migrate from temporary to permanent memory.
+
+ @retval EFI_SUCCESS The data was successfully returned.
+ @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when
+ TemporaryMemoryBase > PermanentMemoryBase.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI * ARM_MP_CORE_INFO_GET) (
+ OUT UINTN *ArmCoreCount,
+ OUT ARM_CORE_INFO **ArmCoreTable
+);
+
+///
+/// This service abstracts the ability to migrate contents of the platform early memory store.
+/// Note: The name EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI is different from the current PI 1.2 spec.
+/// This PPI was optional.
+///
+typedef struct {
+ ARM_MP_CORE_INFO_GET GetMpCoreInfo;
+} ARM_MP_CORE_INFO_PPI;
+
+extern EFI_GUID gArmMpCoreInfoPpiGuid;
+extern EFI_GUID gArmMpCoreInfoGuid;
+
+#endif
diff --git a/roms/edk2/ArmPkg/Include/Protocol/ArmScmi.h b/roms/edk2/ArmPkg/Include/Protocol/ArmScmi.h new file mode 100644 index 000000000..aedea8f61 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Protocol/ArmScmi.h @@ -0,0 +1,21 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#ifndef ARM_SCMI_H_
+#define ARM_SCMI_H_
+
+/* As per SCMI specification, maximum allowed ASCII string length
+ for various return values/parameters of a SCMI message.
+*/
+#define SCMI_MAX_STR_LEN 16
+
+#endif /* ARM_SCMI_H_ */
+
diff --git a/roms/edk2/ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h b/roms/edk2/ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h new file mode 100644 index 000000000..2f93ec923 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h @@ -0,0 +1,168 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#ifndef ARM_SCMI_BASE_PROTOCOL_H_
+#define ARM_SCMI_BASE_PROTOCOL_H_
+
+#include <Protocol/ArmScmi.h>
+
+#define BASE_PROTOCOL_VERSION 0x10000
+
+#define NUM_PROTOCOL_MASK 0xFFU
+#define NUM_AGENT_MASK 0xFFU
+
+#define NUM_AGENT_SHIFT 0x8
+
+/** Returns total number of protocols that are
+ implemented (excluding the Base protocol)
+*/
+#define SCMI_TOTAL_PROTOCOLS(Attr) (Attr & NUM_PROTOCOL_MASK)
+
+// Returns total number of agents in the system.
+#define SCMI_TOTAL_AGENTS(Attr) ((Attr >> NUM_AGENT_SHIFT) & NUM_AGENT_MASK)
+
+#define ARM_SCMI_BASE_PROTOCOL_GUID { \
+ 0xd7e5abe9, 0x33ab, 0x418e, {0x9f, 0x91, 0x72, 0xda, 0xe2, 0xba, 0x8e, 0x2f} \
+ }
+
+extern EFI_GUID gArmScmiBaseProtocolGuid;
+
+typedef struct _SCMI_BASE_PROTOCOL SCMI_BASE_PROTOCOL;
+
+/** Return version of the Base protocol supported by SCP firmware.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] Version Version of the supported SCMI Base protocol.
+
+ @retval EFI_SUCCESS The version of the protocol is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_BASE_GET_VERSION) (
+ IN SCMI_BASE_PROTOCOL *This,
+ OUT UINT32 *Version
+ );
+
+/** Return total number of SCMI protocols supported by the SCP firmware.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] TotalProtocols Total number of SCMI protocols supported.
+
+ @retval EFI_SUCCESS Total number of protocols supported are returned.
+ @retval EFI_DEVICE_ERROR SCP returns a SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_BASE_GET_TOTAL_PROTOCOLS) (
+ IN SCMI_BASE_PROTOCOL *This,
+ OUT UINT32 *TotalProtocols
+ );
+
+/** Return vendor name.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] VendorIdentifier Null terminated ASCII string of up to
+ 16 bytes with a vendor name.
+
+ @retval EFI_SUCCESS VendorIdentifier is returned.
+ @retval EFI_DEVICE_ERROR SCP returns a SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_BASE_DISCOVER_VENDOR) (
+ IN SCMI_BASE_PROTOCOL *This,
+ OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
+ );
+
+/** Return sub vendor name.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] VendorIdentifier Null terminated ASCII string of up to
+ 16 bytes with a vendor name.
+
+ @retval EFI_SUCCESS VendorIdentifier is returned.
+ @retval EFI_DEVICE_ERROR SCP returns a SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_BASE_DISCOVER_SUB_VENDOR) (
+ IN SCMI_BASE_PROTOCOL *This,
+ OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
+ );
+
+/** Return implementation version.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] ImplementationVersion Vendor specific implementation version.
+
+ @retval EFI_SUCCESS Implementation version is returned.
+ @retval EFI_DEVICE_ERROR SCP returns a SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_BASE_DISCOVER_IMPLEMENTATION_VERSION) (
+ IN SCMI_BASE_PROTOCOL *This,
+ OUT UINT32 *ImplementationVersion
+ );
+
+/** Return list of protocols.
+
+ @param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
+
+ @param[out] ProtocolListSize Size of the ProtocolList.
+
+ @param[out] ProtocolList Protocol list.
+
+ @retval EFI_SUCCESS List of protocols is returned.
+ @retval EFI_BUFFER_TOO_SMALL ProtocolListSize is too small for the result.
+ It has been updated to the size needed.
+ @retval EFI_DEVICE_ERROR SCP returns a SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_BASE_DISCOVER_LIST_PROTOCOLS) (
+ IN SCMI_BASE_PROTOCOL *This,
+ IN OUT UINT32 *ProtocolListSize,
+ OUT UINT8 *ProtocolList
+ );
+
+// Base protocol.
+typedef struct _SCMI_BASE_PROTOCOL {
+ SCMI_BASE_GET_VERSION GetVersion;
+ SCMI_BASE_GET_TOTAL_PROTOCOLS GetTotalProtocols;
+ SCMI_BASE_DISCOVER_VENDOR DiscoverVendor;
+ SCMI_BASE_DISCOVER_SUB_VENDOR DiscoverSubVendor;
+ SCMI_BASE_DISCOVER_IMPLEMENTATION_VERSION DiscoverImplementationVersion;
+ SCMI_BASE_DISCOVER_LIST_PROTOCOLS DiscoverListProtocols;
+} SCMI_BASE_PROTOCOL;
+
+// SCMI Message IDs for Base protocol.
+typedef enum {
+ SCMI_MESSAGE_ID_BASE_DISCOVER_VENDOR = 0x3,
+ SCMI_MESSAGE_ID_BASE_DISCOVER_SUB_VENDOR = 0x4,
+ SCMI_MESSAGE_ID_BASE_DISCOVER_IMPLEMENTATION_VERSION = 0x5,
+ SCMI_MESSAGE_ID_BASE_DISCOVER_LIST_PROTOCOLS = 0x6
+} SCMI_MESSAGE_ID_BASE;
+
+#endif /* ARM_SCMI_BASE_PROTOCOL_H_ */
+
diff --git a/roms/edk2/ArmPkg/Include/Protocol/ArmScmiClock2Protocol.h b/roms/edk2/ArmPkg/Include/Protocol/ArmScmiClock2Protocol.h new file mode 100644 index 000000000..950141cbd --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Protocol/ArmScmiClock2Protocol.h @@ -0,0 +1,191 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#ifndef ARM_SCMI_CLOCK2_PROTOCOL_H_
+#define ARM_SCMI_CLOCK2_PROTOCOL_H_
+
+#include <Protocol/ArmScmi.h>
+#include <Protocol/ArmScmiClockProtocol.h>
+
+#define ARM_SCMI_CLOCK2_PROTOCOL_GUID { \
+ 0xb8d8caf2, 0x9e94, 0x462c, { 0xa8, 0x34, 0x6c, 0x99, 0xfc, 0x05, 0xef, 0xcf } \
+ }
+
+extern EFI_GUID gArmScmiClock2ProtocolGuid;
+
+#define SCMI_CLOCK2_PROTOCOL_VERSION 1
+
+typedef struct _SCMI_CLOCK2_PROTOCOL SCMI_CLOCK2_PROTOCOL;
+
+// Protocol Interface functions.
+
+/** Return version of the clock management protocol supported by SCP firmware.
+
+ @param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
+
+ @param[out] Version Version of the supported SCMI Clock management protocol.
+
+ @retval EFI_SUCCESS The version is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK2_GET_VERSION) (
+ IN SCMI_CLOCK2_PROTOCOL *This,
+ OUT UINT32 *Version
+ );
+
+/** Return total number of clock devices supported by the clock management
+ protocol.
+
+ @param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
+
+ @param[out] TotalClocks Total number of clocks supported.
+
+ @retval EFI_SUCCESS Total number of clocks supported is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK2_GET_TOTAL_CLOCKS) (
+ IN SCMI_CLOCK2_PROTOCOL *This,
+ OUT UINT32 *TotalClocks
+ );
+
+/** Return attributes of a clock device.
+
+ @param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+
+ @param[out] Enabled If TRUE, the clock device is enabled.
+ @param[out] ClockAsciiName A NULL terminated ASCII string with the clock
+ name, of up to 16 bytes.
+
+ @retval EFI_SUCCESS Clock device attributes are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES) (
+ IN SCMI_CLOCK2_PROTOCOL *This,
+ IN UINT32 ClockId,
+ OUT BOOLEAN *Enabled,
+ OUT CHAR8 *ClockAsciiName
+ );
+
+/** Return list of rates supported by a given clock device.
+
+ @param[in] This A pointer to SCMI_CLOCK2_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+
+ @param[out] Format SCMI_CLOCK_RATE_FORMAT_DISCRETE: Clock device
+ supports range of clock rates which are non-linear.
+
+ SCMI_CLOCK_RATE_FORMAT_LINEAR: Clock device supports
+ range of linear clock rates from Min to Max in steps.
+
+ @param[out] TotalRates Total number of rates.
+
+ @param[in,out] RateArraySize Size of the RateArray.
+
+ @param[out] RateArray List of clock rates.
+
+ @retval EFI_SUCCESS List of clock rates are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval EFI_BUFFER_TOO_SMALL RateArraySize is too small for the result.
+ It has been updated to the size needed.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK2_DESCRIBE_RATES) (
+ IN SCMI_CLOCK2_PROTOCOL *This,
+ IN UINT32 ClockId,
+ OUT SCMI_CLOCK_RATE_FORMAT *Format,
+ OUT UINT32 *TotalRates,
+ IN OUT UINT32 *RateArraySize,
+ OUT SCMI_CLOCK_RATE *RateArray
+ );
+
+/** Get clock rate.
+
+ @param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+
+ @param[out] Rate Clock rate.
+
+ @retval EFI_SUCCESS Clock rate is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK2_RATE_GET) (
+ IN SCMI_CLOCK2_PROTOCOL *This,
+ IN UINT32 ClockId,
+ OUT UINT64 *Rate
+ );
+
+/** Set clock rate.
+
+ @param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+ @param[in] Rate Clock rate.
+
+ @retval EFI_SUCCESS Clock rate set success.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK2_RATE_SET) (
+ IN SCMI_CLOCK2_PROTOCOL *This,
+ IN UINT32 ClockId,
+ IN UINT64 Rate
+ );
+
+/** Enable/Disable specified clock.
+ Function is only available under gArmScmiClock2ProtocolGuid
+
+ @param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+ @param[in] Enable TRUE to enable, FALSE to disable.
+
+ @retval EFI_SUCCESS Clock enable/disable successful.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK2_ENABLE) (
+ IN SCMI_CLOCK2_PROTOCOL *This,
+ IN UINT32 ClockId,
+ IN BOOLEAN Enable
+ );
+
+typedef struct _SCMI_CLOCK2_PROTOCOL {
+ SCMI_CLOCK2_GET_VERSION GetVersion;
+ SCMI_CLOCK2_GET_TOTAL_CLOCKS GetTotalClocks;
+ SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES GetClockAttributes;
+ SCMI_CLOCK2_DESCRIBE_RATES DescribeRates;
+ SCMI_CLOCK2_RATE_GET RateGet;
+ SCMI_CLOCK2_RATE_SET RateSet;
+
+ // Extension to original ClockProtocol, added here so SCMI_CLOCK2_PROTOCOL
+ // can be cast to SCMI_CLOCK_PROTOCOL
+ UINTN Version; // For future expandability
+ SCMI_CLOCK2_ENABLE Enable;
+} SCMI_CLOCK2_PROTOCOL;
+
+#endif /* ARM_SCMI_CLOCK2_PROTOCOL_H_ */
diff --git a/roms/edk2/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h b/roms/edk2/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h new file mode 100644 index 000000000..b4d970dee --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h @@ -0,0 +1,212 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#ifndef ARM_SCMI_CLOCK_PROTOCOL_H_
+#define ARM_SCMI_CLOCK_PROTOCOL_H_
+
+#include <Protocol/ArmScmi.h>
+
+#define ARM_SCMI_CLOCK_PROTOCOL_GUID { \
+ 0x91ce67a8, 0xe0aa, 0x4012, {0xb9, 0x9f, 0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa} \
+ }
+
+extern EFI_GUID gArmScmiClockProtocolGuid;
+
+// Message Type for clock management protocol.
+typedef enum {
+ SCMI_MESSAGE_ID_CLOCK_ATTRIBUTES = 0x3,
+ SCMI_MESSAGE_ID_CLOCK_DESCRIBE_RATES = 0x4,
+ SCMI_MESSAGE_ID_CLOCK_RATE_SET = 0x5,
+ SCMI_MESSAGE_ID_CLOCK_RATE_GET = 0x6,
+ SCMI_MESSAGE_ID_CLOCK_CONFIG_SET = 0x7
+} SCMI_MESSAGE_ID_CLOCK;
+
+typedef enum {
+ SCMI_CLOCK_RATE_FORMAT_DISCRETE, // Non-linear range.
+ SCMI_CLOCK_RATE_FORMAT_LINEAR // Linear range.
+} SCMI_CLOCK_RATE_FORMAT;
+
+// Clock management protocol version.
+#define SCMI_CLOCK_PROTOCOL_VERSION 0x10000
+
+#define SCMI_CLOCK_PROTOCOL_PENDING_ASYNC_RATES_MASK 0xFFU
+#define SCMI_CLOCK_PROTOCOL_PENDING_ASYNC_RATES_SHIFT 16
+#define SCMI_CLOCK_PROTOCOL_NUM_CLOCKS_MASK 0xFFFFU
+
+/** Total number of pending asynchronous clock rates changes
+ supported by the SCP, Attr Bits[23:16]
+*/
+#define SCMI_CLOCK_PROTOCOL_MAX_ASYNC_CLK_RATES(Attr) ( \
+ (Attr >> SCMI_CLOCK_PROTOCOL_PENDING_ASYNC_RATES_SHIFT) && \
+ SCMI_CLOCK_PROTOCOL_PENDING_ASYNC_RATES_MASK)
+
+// Total of clock devices supported by the SCP, Attr Bits[15:0]
+#define SCMI_CLOCK_PROTOCOL_TOTAL_CLKS(Attr) (Attr & SCMI_CLOCK_PROTOCOL_NUM_CLOCKS_MASK)
+
+#pragma pack(1)
+
+/* Depending on the format (linear/non-linear) supported by a clock device
+ either Rate or Min/Max/Step triplet is valid.
+*/
+typedef struct {
+ union {
+ UINT64 Min;
+ UINT64 Rate;
+ };
+ UINT64 Max;
+ UINT64 Step;
+} SCMI_CLOCK_RATE;
+
+#pragma pack()
+
+typedef struct _SCMI_CLOCK_PROTOCOL SCMI_CLOCK_PROTOCOL;
+
+// Protocol Interface functions.
+
+/** Return version of the clock management protocol supported by SCP firmware.
+
+ @param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
+
+ @param[out] Version Version of the supported SCMI Clock management protocol.
+
+ @retval EFI_SUCCESS The version is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK_GET_VERSION) (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ OUT UINT32 *Version
+ );
+
+/** Return total number of clock devices supported by the clock management
+ protocol.
+
+ @param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
+
+ @param[out] TotalClocks Total number of clocks supported.
+
+ @retval EFI_SUCCESS Total number of clocks supported is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK_GET_TOTAL_CLOCKS) (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ OUT UINT32 *TotalClocks
+ );
+
+/** Return attributes of a clock device.
+
+ @param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+
+ @param[out] Enabled If TRUE, the clock device is enabled.
+ @param[out] ClockAsciiName A NULL terminated ASCII string with the clock
+ name, of up to 16 bytes.
+
+ @retval EFI_SUCCESS Clock device attributes are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK_GET_CLOCK_ATTRIBUTES) (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ IN UINT32 ClockId,
+ OUT BOOLEAN *Enabled,
+ OUT CHAR8 *ClockAsciiName
+ );
+
+/** Return list of rates supported by a given clock device.
+
+ @param[in] This A pointer to SCMI_CLOCK_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+
+ @param[out] Format SCMI_CLOCK_RATE_FORMAT_DISCRETE: Clock device
+ supports range of clock rates which are non-linear.
+
+ SCMI_CLOCK_RATE_FORMAT_LINEAR: Clock device supports
+ range of linear clock rates from Min to Max in steps.
+
+ @param[out] TotalRates Total number of rates.
+
+ @param[in,out] RateArraySize Size of the RateArray.
+
+ @param[out] RateArray List of clock rates.
+
+ @retval EFI_SUCCESS List of clock rates are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval EFI_BUFFER_TOO_SMALL RateArraySize is too small for the result.
+ It has been updated to the size needed.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK_DESCRIBE_RATES) (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ IN UINT32 ClockId,
+ OUT SCMI_CLOCK_RATE_FORMAT *Format,
+ OUT UINT32 *TotalRates,
+ IN OUT UINT32 *RateArraySize,
+ OUT SCMI_CLOCK_RATE *RateArray
+ );
+
+/** Get clock rate.
+
+ @param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+
+ @param[out] Rate Clock rate.
+
+ @retval EFI_SUCCESS Clock rate is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK_RATE_GET) (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ IN UINT32 ClockId,
+ OUT UINT64 *Rate
+ );
+
+/** Set clock rate.
+
+ @param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
+ @param[in] ClockId Identifier for the clock device.
+ @param[in] Rate Clock rate.
+
+ @retval EFI_SUCCESS Clock rate set success.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_CLOCK_RATE_SET) (
+ IN SCMI_CLOCK_PROTOCOL *This,
+ IN UINT32 ClockId,
+ IN UINT64 Rate
+ );
+
+typedef struct _SCMI_CLOCK_PROTOCOL {
+ SCMI_CLOCK_GET_VERSION GetVersion;
+ SCMI_CLOCK_GET_TOTAL_CLOCKS GetTotalClocks;
+ SCMI_CLOCK_GET_CLOCK_ATTRIBUTES GetClockAttributes;
+ SCMI_CLOCK_DESCRIBE_RATES DescribeRates;
+ SCMI_CLOCK_RATE_GET RateGet;
+ SCMI_CLOCK_RATE_SET RateSet;
+} SCMI_CLOCK_PROTOCOL;
+
+#endif /* ARM_SCMI_CLOCK_PROTOCOL_H_ */
+
diff --git a/roms/edk2/ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h b/roms/edk2/ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h new file mode 100644 index 000000000..96a4d6673 --- /dev/null +++ b/roms/edk2/ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h @@ -0,0 +1,259 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#ifndef ARM_SCMI_PERFORMANCE_PROTOCOL_H_
+#define ARM_SCMI_PERFORMANCE_PROTOCOL_H_
+
+#include <Protocol/ArmScmi.h>
+
+#define PERFORMANCE_PROTOCOL_VERSION 0x10000
+
+#define ARM_SCMI_PERFORMANCE_PROTOCOL_GUID { \
+ 0x9b8ba84, 0x3dd3, 0x49a6, {0xa0, 0x5a, 0x31, 0x34, 0xa5, 0xf0, 0x7b, 0xad} \
+ }
+
+extern EFI_GUID gArmScmiPerformanceProtocolGuid;
+
+typedef struct _SCMI_PERFORMANCE_PROTOCOL SCMI_PERFORMANCE_PROTOCOL;
+
+#pragma pack(1)
+
+#define POWER_IN_MW_SHIFT 16
+#define POWER_IN_MW_MASK 0x1
+#define NUM_PERF_DOMAINS_MASK 0xFFFF
+
+// Total number of performance domains, Attr Bits [15:0]
+#define SCMI_PERF_TOTAL_DOMAINS(Attr) (Attr & NUM_PERF_DOMAINS_MASK)
+
+// A flag to express power values in mW or platform specific way, Attr Bit [16]
+#define SCMI_PERF_POWER_IN_MW(Attr) ((Attr >> POWER_IN_MW_SHIFT) & \
+ POWER_IN_MW_MASK)
+
+// Performance protocol attributes return values.
+typedef struct {
+ UINT32 Attributes;
+ UINT64 StatisticsAddress;
+ UINT32 StatisticsLen;
+} SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES;
+
+#define SCMI_PERF_SUPPORT_LVL_CHANGE_NOTIFY(Attr) ((Attr >> 28) & 0x1)
+#define SCMI_PERF_SUPPORT_LIM_CHANGE_NOTIFY(Attr) ((Attr >> 29) & 0x1)
+#define SCMI_PERF_SUPPORT_SET_LVL(Attr) ((Attr >> 30) & 0x1)
+#define SCMI_PERF_SUPPORT_SET_LIM(Attr) ((Attr >> 31) & 0x1)
+#define SCMI_PERF_RATE_LIMIT(RateLimit) (RateLimit & 0xFFF)
+
+// Performance protocol domain attributes.
+typedef struct {
+ UINT32 Attributes;
+ UINT32 RateLimit;
+ UINT32 SustainedFreq;
+ UINT32 SustainedPerfLevel;
+ UINT8 Name[SCMI_MAX_STR_LEN];
+} SCMI_PERFORMANCE_DOMAIN_ATTRIBUTES;
+
+// Worst case latency in microseconds, Bits[15:0]
+#define PERF_LATENCY_MASK 0xFFFF
+#define SCMI_PERFORMANCE_PROTOCOL_LATENCY(Latency) (Latency & PERF_LATENCY_MASK)
+
+// Performance protocol performance level.
+typedef struct {
+ UINT32 Level;
+ UINT32 PowerCost;
+ UINT32 Latency;
+} SCMI_PERFORMANCE_LEVEL;
+
+// Performance protocol performance limit.
+typedef struct {
+ UINT32 RangeMax;
+ UINT32 RangeMin;
+} SCMI_PERFORMANCE_LIMITS;
+
+#pragma pack()
+
+/** Return version of the performance management protocol supported by SCP.
+ firmware.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+
+ @param[out] Version Version of the supported SCMI performance management
+ protocol.
+
+ @retval EFI_SUCCESS The version is returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_PERFORMANCE_GET_VERSION) (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ OUT UINT32 *Version
+ );
+
+/** Return protocol attributes of the performance management protocol.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+
+ @param[out] Attributes Protocol attributes.
+
+ @retval EFI_SUCCESS Protocol attributes are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_PERFORMANCE_GET_ATTRIBUTES) (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ OUT SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES *Attributes
+
+ );
+
+/** Return performance domain attributes.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+
+ @param[out] Attributes Performance domain attributes.
+
+ @retval EFI_SUCCESS Domain attributes are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_PERFORMANCE_GET_DOMAIN_ATTRIBUTES) (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ IN UINT32 DomainId,
+ OUT SCMI_PERFORMANCE_DOMAIN_ATTRIBUTES *DomainAttributes
+ );
+
+/** Return list of performance domain levels of a given domain.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+
+ @param[out] NumLevels Total number of levels a domain can support.
+
+ @param[in,out] LevelArraySize Size of the performance level array.
+
+ @param[out] LevelArray Array of the performance levels.
+
+ @retval EFI_SUCCESS Domain levels are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval EFI_BUFFER_TOO_SMALL LevelArraySize is too small for the result.
+ It has been updated to the size needed.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_PERFORMANCE_DESCRIBE_LEVELS) (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ IN UINT32 DomainId,
+ OUT UINT32 *NumLevels,
+ IN OUT UINT32 *LevelArraySize,
+ OUT SCMI_PERFORMANCE_LEVEL *LevelArray
+ );
+
+/** Set performance limits of a domain.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+ @param[in] Limit Performance limit to set.
+
+ @retval EFI_SUCCESS Performance limits set successfully.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_PERFORMANCE_LIMITS_SET) (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ IN UINT32 DomainId,
+ IN SCMI_PERFORMANCE_LIMITS *Limits
+ );
+
+/** Get performance limits of a domain.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+
+ @param[out] Limit Performance Limits of the domain.
+
+ @retval EFI_SUCCESS Performance limits are returned.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_PERFORMANCE_LIMITS_GET) (
+ SCMI_PERFORMANCE_PROTOCOL *This,
+ UINT32 DomainId,
+ SCMI_PERFORMANCE_LIMITS *Limits
+ );
+
+/** Set performance level of a domain.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+ @param[in] Level Performance level of the domain.
+
+ @retval EFI_SUCCESS Performance level set successfully.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_PERFORMANCE_LEVEL_SET) (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ IN UINT32 DomainId,
+ IN UINT32 Level
+ );
+
+/** Get performance level of a domain.
+
+ @param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
+ @param[in] DomainId Identifier for the performance domain.
+
+ @param[out] Level Performance level of the domain.
+
+ @retval EFI_SUCCESS Performance level got successfully.
+ @retval EFI_DEVICE_ERROR SCP returns an SCMI error.
+ @retval !(EFI_SUCCESS) Other errors.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *SCMI_PERFORMANCE_LEVEL_GET) (
+ IN SCMI_PERFORMANCE_PROTOCOL *This,
+ IN UINT32 DomainId,
+ OUT UINT32 *Level
+ );
+
+typedef struct _SCMI_PERFORMANCE_PROTOCOL {
+ SCMI_PERFORMANCE_GET_VERSION GetVersion;
+ SCMI_PERFORMANCE_GET_ATTRIBUTES GetProtocolAttributes;
+ SCMI_PERFORMANCE_GET_DOMAIN_ATTRIBUTES GetDomainAttributes;
+ SCMI_PERFORMANCE_DESCRIBE_LEVELS DescribeLevels;
+ SCMI_PERFORMANCE_LIMITS_SET LimitsSet;
+ SCMI_PERFORMANCE_LIMITS_GET LimitsGet;
+ SCMI_PERFORMANCE_LEVEL_SET LevelSet;
+ SCMI_PERFORMANCE_LEVEL_GET LevelGet;
+} SCMI_PERFORMANCE_PROTOCOL;
+
+typedef enum {
+ SCMI_MESSAGE_ID_PERFORMANCE_DOMAIN_ATTRIBUTES = 0x3,
+ SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS = 0x4,
+ SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_SET = 0x5,
+ SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_GET = 0x6,
+ SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_SET = 0x7,
+ SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_GET = 0x8,
+} SCMI_MESSAGE_ID_PERFORMANCE;
+
+#endif /* ARM_SCMI_PERFORMANCE_PROTOCOL_H_ */
+
diff --git a/roms/edk2/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c b/roms/edk2/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c new file mode 100644 index 000000000..7c698fe47 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c @@ -0,0 +1,286 @@ +/** @file
+ Generic ARM implementation of TimerLib.h
+
+ Copyright (c) 2011-2016, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#include <Base.h>
+#include <Library/ArmLib.h>
+#include <Library/BaseLib.h>
+#include <Library/TimerLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/ArmGenericTimerCounterLib.h>
+
+#define TICKS_PER_MICRO_SEC (PcdGet32 (PcdArmArchTimerFreqInHz)/1000000U)
+
+// Select appropriate multiply function for platform architecture.
+#ifdef MDE_CPU_ARM
+#define MultU64xN MultU64x32
+#else
+#define MultU64xN MultU64x64
+#endif
+
+
+RETURN_STATUS
+EFIAPI
+TimerConstructor (
+ VOID
+ )
+{
+ //
+ // Check if the ARM Generic Timer Extension is implemented.
+ //
+ if (ArmIsArchTimerImplemented ()) {
+
+ //
+ // Check if Architectural Timer frequency is pre-determined by the platform
+ // (ie. nonzero).
+ //
+ if (PcdGet32 (PcdArmArchTimerFreqInHz) != 0) {
+ //
+ // Check if ticks/uS is not 0. The Architectural timer runs at constant
+ // frequency, irrespective of CPU frequency. According to Generic Timer
+ // Ref manual, lower bound of the frequency is in the range of 1-10MHz.
+ //
+ ASSERT (TICKS_PER_MICRO_SEC);
+
+#ifdef MDE_CPU_ARM
+ //
+ // Only set the frequency for ARMv7. We expect the secure firmware to
+ // have already done it.
+ // If the security extension is not implemented, set Timer Frequency
+ // here.
+ //
+ if ((ArmReadIdPfr1 () & ARM_PFR1_SEC) == 0x0) {
+ ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));
+ }
+#endif
+ }
+
+ //
+ // Architectural Timer Frequency must be set in Secure privileged
+ // mode (if secure extension is supported).
+ // If the reset value (0) is returned, just ASSERT.
+ //
+ ASSERT (ArmGenericTimerGetTimerFreq () != 0);
+
+ } else {
+ DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library cannot be used.\n"));
+ ASSERT (0);
+ }
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ A local utility function that returns the PCD value, if specified.
+ Otherwise it defaults to ArmGenericTimerGetTimerFreq.
+
+ @return The timer frequency.
+
+**/
+STATIC
+UINTN
+EFIAPI
+GetPlatformTimerFreq (
+ )
+{
+ UINTN TimerFreq;
+
+ TimerFreq = PcdGet32 (PcdArmArchTimerFreqInHz);
+ if (TimerFreq == 0) {
+ TimerFreq = ArmGenericTimerGetTimerFreq ();
+ }
+ return TimerFreq;
+}
+
+
+/**
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+ @param MicroSeconds The minimum number of microseconds to delay.
+
+ @return The value of MicroSeconds input.
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+ IN UINTN MicroSeconds
+ )
+{
+ UINT64 TimerTicks64;
+ UINT64 SystemCounterVal;
+
+ // Calculate counter ticks that represent requested delay:
+ // = MicroSeconds x TICKS_PER_MICRO_SEC
+ // = MicroSeconds x Frequency.10^-6
+ TimerTicks64 = DivU64x32 (
+ MultU64xN (
+ MicroSeconds,
+ GetPlatformTimerFreq ()
+ ),
+ 1000000U
+ );
+
+ // Read System Counter value
+ SystemCounterVal = ArmGenericTimerGetSystemCount ();
+
+ TimerTicks64 += SystemCounterVal;
+
+ // Wait until delay count expires.
+ while (SystemCounterVal < TimerTicks64) {
+ SystemCounterVal = ArmGenericTimerGetSystemCount ();
+ }
+
+ return MicroSeconds;
+}
+
+
+/**
+ Stalls the CPU for at least the given number of nanoseconds.
+
+ Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
+
+ When the timer frequency is 1MHz, each tick corresponds to 1 microsecond.
+ Therefore, the nanosecond delay will be rounded up to the nearest 1 microsecond.
+
+ @param NanoSeconds The minimum number of nanoseconds to delay.
+
+ @return The value of NanoSeconds inputted.
+
+**/
+UINTN
+EFIAPI
+NanoSecondDelay (
+ IN UINTN NanoSeconds
+ )
+{
+ UINTN MicroSeconds;
+
+ // Round up to 1us Tick Number
+ MicroSeconds = NanoSeconds / 1000;
+ MicroSeconds += ((NanoSeconds % 1000) == 0) ? 0 : 1;
+
+ MicroSecondDelay (MicroSeconds);
+
+ return NanoSeconds;
+}
+
+/**
+ Retrieves the current value of a 64-bit free running performance counter.
+
+ The counter can either count up by 1 or count down by 1. If the physical
+ performance counter counts by a larger increment, then the counter values
+ must be translated. The properties of the counter can be retrieved from
+ GetPerformanceCounterProperties().
+
+ @return The current value of the free running performance counter.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounter (
+ VOID
+ )
+{
+ // Just return the value of system count
+ return ArmGenericTimerGetSystemCount ();
+}
+
+/**
+ Retrieves the 64-bit frequency in Hz and the range of performance counter
+ values.
+
+ If StartValue is not NULL, then the value that the performance counter starts
+ with immediately after is it rolls over is returned in StartValue. If
+ EndValue is not NULL, then the value that the performance counter end with
+ immediately before it rolls over is returned in EndValue. The 64-bit
+ frequency of the performance counter in Hz is always returned. If StartValue
+ is less than EndValue, then the performance counter counts up. If StartValue
+ is greater than EndValue, then the performance counter counts down. For
+ example, a 64-bit free running counter that counts up would have a StartValue
+ of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
+ that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
+
+ @param StartValue The value the performance counter starts with when it
+ rolls over.
+ @param EndValue The value that the performance counter ends with before
+ it rolls over.
+
+ @return The frequency in Hz.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounterProperties (
+ OUT UINT64 *StartValue, OPTIONAL
+ OUT UINT64 *EndValue OPTIONAL
+ )
+{
+ if (StartValue != NULL) {
+ // Timer starts at 0
+ *StartValue = (UINT64)0ULL ;
+ }
+
+ if (EndValue != NULL) {
+ // Timer counts up.
+ *EndValue = 0xFFFFFFFFFFFFFFFFUL;
+ }
+
+ return (UINT64)ArmGenericTimerGetTimerFreq ();
+}
+
+/**
+ Converts elapsed ticks of performance counter to time in nanoseconds.
+
+ This function converts the elapsed ticks of running performance counter to
+ time value in unit of nanoseconds.
+
+ @param Ticks The number of elapsed ticks of running performance counter.
+
+ @return The elapsed time in nanoseconds.
+
+**/
+UINT64
+EFIAPI
+GetTimeInNanoSecond (
+ IN UINT64 Ticks
+ )
+{
+ UINT64 NanoSeconds;
+ UINT32 Remainder;
+ UINT32 TimerFreq;
+
+ TimerFreq = GetPlatformTimerFreq ();
+ //
+ // Ticks
+ // Time = --------- x 1,000,000,000
+ // Frequency
+ //
+ NanoSeconds = MultU64xN (
+ DivU64x32Remainder (
+ Ticks,
+ TimerFreq,
+ &Remainder),
+ 1000000000U
+ );
+
+ //
+ // Frequency < 0x100000000, so Remainder < 0x100000000, then (Remainder * 1,000,000,000)
+ // will not overflow 64-bit.
+ //
+ NanoSeconds += DivU64x32 (
+ MultU64xN (
+ (UINT64) Remainder,
+ 1000000000U),
+ TimerFreq
+ );
+
+ return NanoSeconds;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf b/roms/edk2/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf new file mode 100644 index 000000000..6f576ceab --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf @@ -0,0 +1,32 @@ +#/** @file
+#
+# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmArchTimerLib
+ FILE_GUID = 82da1b44-d2d6-4a7d-bbf0-a0cb67964034
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = TimerLib
+ CONSTRUCTOR = TimerConstructor
+
+[Sources.common]
+ ArmArchTimerLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ ArmLib
+ BaseLib
+ ArmGenericTimerCounterLib
+
+[Pcd]
+ gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz
diff --git a/roms/edk2/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c b/roms/edk2/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c new file mode 100644 index 000000000..440a5c372 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c @@ -0,0 +1,125 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#include <Base.h>
+#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+STATIC
+VOID
+CacheRangeOperation (
+ IN VOID *Start,
+ IN UINTN Length,
+ IN LINE_OPERATION LineOperation,
+ IN UINTN LineLength
+ )
+{
+ UINTN ArmCacheLineAlignmentMask = LineLength - 1;
+
+ // Align address (rounding down)
+ UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
+ UINTN EndAddress = (UINTN)Start + Length;
+
+ // Perform the line operation on an address in each cache line
+ while (AlignedAddress < EndAddress) {
+ LineOperation(AlignedAddress);
+ AlignedAddress += LineLength;
+ }
+ ArmDataSynchronizationBarrier ();
+}
+
+VOID
+EFIAPI
+InvalidateInstructionCache (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID
+EFIAPI
+InvalidateDataCache (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID *
+EFIAPI
+InvalidateInstructionCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA,
+ ArmDataCacheLineLength ());
+ CacheRangeOperation (Address, Length,
+ ArmInvalidateInstructionCacheEntryToPoUByMVA,
+ ArmInstructionCacheLineLength ());
+
+ ArmInstructionSynchronizationBarrier ();
+
+ return Address;
+}
+
+VOID
+EFIAPI
+WriteBackInvalidateDataCache (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID *
+EFIAPI
+WriteBackInvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA,
+ ArmDataCacheLineLength ());
+ return Address;
+}
+
+VOID
+EFIAPI
+WriteBackDataCache (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID *
+EFIAPI
+WriteBackDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA,
+ ArmDataCacheLineLength ());
+ return Address;
+}
+
+VOID *
+EFIAPI
+InvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA,
+ ArmDataCacheLineLength ());
+ return Address;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf b/roms/edk2/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf new file mode 100644 index 000000000..94261e104 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf @@ -0,0 +1,28 @@ +#/** @file
+# Implement CacheMaintenanceLib for ARM architectures
+#
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmCacheMaintenanceLib
+ FILE_GUID = 1A20BE1F-33AD-450C-B49A-7123FCA8B7F9
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = CacheMaintenanceLib
+
+[Sources.common]
+ ArmCacheMaintenanceLib.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ ArmLib
+ BaseLib
diff --git a/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c b/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c new file mode 100644 index 000000000..353f41bfb --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c @@ -0,0 +1,42 @@ +/** @file
+ Default exception handler
+
+ Copyright (c) 2014, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h>
+#include <Library/BaseLib.h>
+#include <Library/PrintLib.h>
+#include <Library/ArmDisassemblerLib.h>
+
+/**
+ Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+ point to next instruction.
+
+ @param OpCodePtrPtr Pointer to pointer of instruction to disassemble.
+ @param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream
+ @param Extended TRUE dump hex for instruction too.
+ @param ItBlock Size of IT Block
+ @param Buf Buffer to sprintf disassembly into.
+ @param Size Size of Buf in bytes.
+
+**/
+VOID
+DisassembleInstruction (
+ IN UINT8 **OpCodePtr,
+ IN BOOLEAN Thumb,
+ IN BOOLEAN Extended,
+ IN OUT UINT32 *ItBlock,
+ OUT CHAR8 *Buf,
+ OUT UINTN Size
+ )
+{
+ // Not yet supported for AArch64.
+ // Put error in the buffer as we have no return code and the buffer may be
+ // printed directly so needs a '\0'.
+ AsciiSPrint (Buf, Size, "AArch64 not supported");
+ return;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c new file mode 100644 index 000000000..b4f0f8dbb --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c @@ -0,0 +1,449 @@ +/** @file
+ Default exception handler
+
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h>
+#include <Library/BaseLib.h>
+#include <Library/PrintLib.h>
+#include <Library/ArmDisassemblerLib.h>
+
+CHAR8 *gCondition[] = {
+ "EQ",
+ "NE",
+ "CS",
+ "CC",
+ "MI",
+ "PL",
+ "VS",
+ "VC",
+ "HI",
+ "LS",
+ "GE",
+ "LT",
+ "GT",
+ "LE",
+ "",
+ "2"
+};
+
+#define COND(_a) gCondition[((_a) >> 28)]
+
+CHAR8 *gReg[] = {
+ "r0",
+ "r1",
+ "r2",
+ "r3",
+ "r4",
+ "r5",
+ "r6",
+ "r7",
+ "r8",
+ "r9",
+ "r10",
+ "r11",
+ "r12",
+ "sp",
+ "lr",
+ "pc"
+};
+
+CHAR8 *gLdmAdr[] = {
+ "DA",
+ "IA",
+ "DB",
+ "IB"
+};
+
+CHAR8 *gLdmStack[] = {
+ "FA",
+ "FD",
+ "EA",
+ "ED"
+};
+
+#define LDM_EXT(_reg, _off) ((_reg == 13) ? gLdmStack[(_off)] : gLdmAdr[(_off)])
+
+
+#define SIGN(_U) ((_U) ? "" : "-")
+#define WRITE(_W) ((_W) ? "!" : "")
+#define BYTE(_B) ((_B) ? "B":"")
+#define USER(_B) ((_B) ? "^" : "")
+
+CHAR8 mMregListStr[4*15 + 1];
+
+CHAR8 *
+MRegList (
+ UINT32 OpCode
+ )
+{
+ UINTN Index, Start, End;
+ BOOLEAN First;
+
+ mMregListStr[0] = '\0';
+ AsciiStrCatS (mMregListStr, sizeof mMregListStr, "{");
+ for (Index = 0, First = TRUE; Index <= 15; Index++) {
+ if ((OpCode & (1 << Index)) != 0) {
+ Start = End = Index;
+ for (Index++; ((OpCode & (1 << Index)) != 0) && Index <= 15; Index++) {
+ End = Index;
+ }
+
+ if (!First) {
+ AsciiStrCatS (mMregListStr, sizeof mMregListStr, ",");
+ } else {
+ First = FALSE;
+ }
+
+ if (Start == End) {
+ AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[Start]);
+ AsciiStrCatS (mMregListStr, sizeof mMregListStr, ", ");
+ } else {
+ AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[Start]);
+ AsciiStrCatS (mMregListStr, sizeof mMregListStr, "-");
+ AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[End]);
+ }
+ }
+ }
+ if (First) {
+ AsciiStrCatS (mMregListStr, sizeof mMregListStr, "ERROR");
+ }
+ AsciiStrCatS (mMregListStr, sizeof mMregListStr, "}");
+
+ // BugBug: Make caller pass in buffer it is cleaner
+ return mMregListStr;
+}
+
+CHAR8 *
+FieldMask (
+ IN UINT32 Mask
+ )
+{
+ return "";
+}
+
+UINT32
+RotateRight (
+ IN UINT32 Op,
+ IN UINT32 Shift
+ )
+{
+ return (Op >> Shift) | (Op << (32 - Shift));
+}
+
+
+/**
+ Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+ point to next instruction.
+
+ We cheat and only decode instructions that access
+ memory. If the instruction is not found we dump the instruction in hex.
+
+ @param OpCodePtr Pointer to pointer of ARM instruction to disassemble.
+ @param Buf Buffer to sprintf disassembly into.
+ @param Size Size of Buf in bytes.
+ @param Extended TRUE dump hex for instruction too.
+
+**/
+VOID
+DisassembleArmInstruction (
+ IN UINT32 **OpCodePtr,
+ OUT CHAR8 *Buf,
+ OUT UINTN Size,
+ IN BOOLEAN Extended
+ )
+{
+ UINT32 OpCode = **OpCodePtr;
+ CHAR8 *Type, *Root;
+ BOOLEAN I, P, U, B, W, L, S, H;
+ UINT32 Rn, Rd, Rm;
+ UINT32 imode, offset_8, offset_12;
+ UINT32 Index;
+ UINT32 shift_imm, shift;
+
+ I = (OpCode & BIT25) == BIT25;
+ P = (OpCode & BIT24) == BIT24;
+ U = (OpCode & BIT23) == BIT23;
+ B = (OpCode & BIT22) == BIT22; // Also called S
+ W = (OpCode & BIT21) == BIT21;
+ L = (OpCode & BIT20) == BIT20;
+ S = (OpCode & BIT6) == BIT6;
+ H = (OpCode & BIT5) == BIT5;
+ Rn = (OpCode >> 16) & 0xf;
+ Rd = (OpCode >> 12) & 0xf;
+ Rm = (OpCode & 0xf);
+
+
+ if (Extended) {
+ Index = AsciiSPrint (Buf, Size, "0x%08x ", OpCode);
+ Buf += Index;
+ Size -= Index;
+ }
+
+ // LDREX, STREX
+ if ((OpCode & 0x0fe000f0) == 0x01800090) {
+ if (L) {
+ // A4.1.27 LDREX{<cond>} <Rd>, [<Rn>]
+ AsciiSPrint (Buf, Size, "LDREX%a %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn]);
+ } else {
+ // A4.1.103 STREX{<cond>} <Rd>, <Rm>, [<Rn>]
+ AsciiSPrint (Buf, Size, "STREX%a %a, %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn], gReg[Rn]);
+ }
+ return;
+ }
+
+ // LDM/STM
+ if ((OpCode & 0x0e000000) == 0x08000000) {
+ if (L) {
+ // A4.1.20 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers>
+ // A4.1.21 LDM{<cond>}<addressing_mode> <Rn>, <registers_without_pc>^
+ // A4.1.22 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers_and_pc>^
+ AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B));
+ } else {
+ // A4.1.97 STM{<cond>}<addressing_mode> <Rn>{!}, <registers>
+ // A4.1.98 STM{<cond>}<addressing_mode> <Rn>, <registers>^
+ AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B));
+ }
+ return;
+ }
+
+ // LDR/STR Address Mode 2
+ if ( ((OpCode & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000 ) == 0xf550f000) ) {
+ offset_12 = OpCode & 0xfff;
+ if ((OpCode & 0xfd70f000 ) == 0xf550f000) {
+ Index = AsciiSPrint (Buf, Size, "PLD");
+ } else {
+ Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", L ? "LDR" : "STR", COND (OpCode), BYTE (B), (!(P) && W) ? "T":"", gReg[Rd]);
+ }
+ if (P) {
+ if (!I) {
+ // A5.2.2 [<Rn>, #+/-<offset_12>]
+ // A5.2.5 [<Rn>, #+/-<offset_12>]
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x]%a", gReg[Rn], SIGN (U), offset_12, WRITE (W));
+ } else if ((OpCode & 0x03000ff0) == 0x03000000) {
+ // A5.2.3 [<Rn>, +/-<Rm>]
+ // A5.2.6 [<Rn>, +/-<Rm>]!
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a]%a", gReg[Rn], SIGN (U), WRITE (W));
+ } else {
+ // A5.2.4 [<Rn>, +/-<Rm>, LSL #<shift_imm>]
+ // A5.2.7 [<Rn>, +/-<Rm>, LSL #<shift_imm>]!
+ shift_imm = (OpCode >> 7) & 0x1f;
+ shift = (OpCode >> 5) & 0x3;
+ if (shift == 0x0) {
+ Type = "LSL";
+ } else if (shift == 0x1) {
+ Type = "LSR";
+ if (shift_imm == 0) {
+ shift_imm = 32;
+ }
+ } else if (shift == 0x12) {
+ Type = "ASR";
+ } else if (shift_imm == 0) {
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));
+ return;
+ } else {
+ Type = "ROR";
+ }
+
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm, WRITE (W));
+ }
+ } else { // !P
+ if (!I) {
+ // A5.2.8 [<Rn>], #+/-<offset_12>
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (U), offset_12);
+ } else if ((OpCode & 0x03000ff0) == 0x03000000) {
+ // A5.2.9 [<Rn>], +/-<Rm>
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]);
+ } else {
+ // A5.2.10 [<Rn>], +/-<Rm>, LSL #<shift_imm>
+ shift_imm = (OpCode >> 7) & 0x1f;
+ shift = (OpCode >> 5) & 0x3;
+
+ if (shift == 0x0) {
+ Type = "LSL";
+ } else if (shift == 0x1) {
+ Type = "LSR";
+ if (shift_imm == 0) {
+ shift_imm = 32;
+ }
+ } else if (shift == 0x12) {
+ Type = "ASR";
+ } else if (shift_imm == 0) {
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (U), gReg[Rm]);
+ // FIx me
+ return;
+ } else {
+ Type = "ROR";
+ }
+
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm);
+ }
+ }
+ return;
+ }
+
+ if ((OpCode & 0x0e000000) == 0x00000000) {
+ // LDR/STR address mode 3
+ // LDR|STR{<cond>}H|SH|SB|D <Rd>, <addressing_mode>
+ if (L) {
+ if (!S) {
+ Root = "LDR%aH %a, ";
+ } else if (!H) {
+ Root = "LDR%aSB %a, ";
+ } else {
+ Root = "LDR%aSH %a, ";
+ }
+ } else {
+ if (!S) {
+ Root = "STR%aH %a ";
+ } else if (!H) {
+ Root = "LDR%aD %a ";
+ } else {
+ Root = "STR%aD %a ";
+ }
+ }
+
+ Index = AsciiSPrint (Buf, Size, Root, COND (OpCode), gReg[Rd]);
+
+ S = (OpCode & BIT6) == BIT6;
+ H = (OpCode & BIT5) == BIT5;
+ offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff;
+ if (P & !W) {
+ // Immediate offset/index
+ if (B) {
+ // A5.3.2 [<Rn>, #+/-<offset_8>]
+ // A5.3.4 [<Rn>, #+/-<offset_8>]!
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (U), offset_8, WRITE (W));
+ } else {
+ // A5.3.3 [<Rn>, +/-<Rm>]
+ // A5.3.5 [<Rn>, +/-<Rm>]!
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));
+ }
+ } else {
+ // Register offset/index
+ if (B) {
+ // A5.3.6 [<Rn>], #+/-<offset_8>
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (U), offset_8);
+ } else {
+ // A5.3.7 [<Rn>], +/-<Rm>
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]);
+ }
+ }
+ return;
+ }
+
+ if ((OpCode & 0x0fb000f0) == 0x01000050) {
+ // A4.1.108 SWP SWP{<cond>}B <Rd>, <Rm>, [<Rn>]
+ // A4.1.109 SWPB SWP{<cond>}B <Rd>, <Rm>, [<Rn>]
+ AsciiSPrint (Buf, Size, "SWP%a%a %a, %a, [%a]", COND (OpCode), BYTE (B), gReg[Rd], gReg[Rm], gReg[Rn]);
+ return;
+ }
+
+ if ((OpCode & 0xfe5f0f00) == 0xf84d0500) {
+ // A4.1.90 SRS SRS<addressing_mode> #<mode>{!}
+ AsciiSPrint (Buf, Size, "SRS%a #0x%x%a", gLdmStack[(OpCode >> 23) & 3], OpCode & 0x1f, WRITE (W));
+ return;
+ }
+
+ if ((OpCode & 0xfe500f00) == 0xf8100500) {
+ // A4.1.59 RFE<addressing_mode> <Rn>{!}
+ AsciiSPrint (Buf, Size, "RFE%a %a", gLdmStack[(OpCode >> 23) & 3], gReg[Rn], WRITE (W));
+ return;
+ }
+
+ if ((OpCode & 0xfff000f0) == 0xe1200070) {
+ // A4.1.7 BKPT <immed_16>
+ AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff);
+ return;
+ }
+
+ if ((OpCode & 0xfff10020) == 0xf1000000) {
+ // A4.1.16 CPS<effect> <iflags> {, #<mode>}
+ if (((OpCode >> 6) & 0x7) == 0) {
+ AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f));
+ } else {
+ imode = (OpCode >> 18) & 0x3;
+ Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a", (imode == 3) ? "ID":"IE", (OpCode & BIT8) ? "A":"", (OpCode & BIT7) ? "I":"", (OpCode & BIT6) ? "F":"");
+ if ((OpCode & BIT17) != 0) {
+ AsciiSPrint (&Buf[Index], Size - Index, ", #0x%x", OpCode & 0x1f);
+ }
+ }
+ return;
+ }
+
+ if ((OpCode & 0x0f000000) == 0x0f000000) {
+ // A4.1.107 SWI{<cond>} <immed_24>
+ AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff);
+ return;
+ }
+
+ if ((OpCode & 0x0fb00000) == 0x01000000) {
+ // A4.1.38 MRS{<cond>} <Rd>, CPSR MRS{<cond>} <Rd>, SPSR
+ AsciiSPrint (Buf, Size, "MRS%a %a, %a", COND (OpCode), gReg[Rd], B ? "SPSR" : "CPSR");
+ return;
+ }
+
+
+ if ((OpCode & 0x0db00000) == 0x01200000) {
+ // A4.1.38 MSR{<cond>} CPSR_<fields>, #<immediate> MSR{<cond>} CPSR_<fields>, <Rm>
+ if (I) {
+ // MSR{<cond>} CPSR_<fields>, #<immediate>
+ AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2));
+ } else {
+ // MSR{<cond>} CPSR_<fields>, <Rm>
+ AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), B ? "SPSR" : "CPSR", gReg[Rd]);
+ }
+ return;
+ }
+
+ if ((OpCode & 0xff000010) == 0xfe000000) {
+ // A4.1.13 CDP{<cond>} <coproc>, <opcode_1>, <CRd>, <CRn>, <CRm>, <opcode_2>
+ AsciiSPrint (Buf, Size, "CDP%a 0x%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, Rd, Rm, (OpCode >> 5) &0x7);
+ return;
+ }
+
+ if ((OpCode & 0x0e000000) == 0x0c000000) {
+ // A4.1.19 LDC and A4.1.96 SDC
+ if ((OpCode & 0xf0000000) == 0xf0000000) {
+ Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", L ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd);
+ } else {
+ Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", L ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);
+ }
+
+ if (!P) {
+ if (!W) {
+ // A5.5.5.5 [<Rn>], <option>
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], {0x%x}", gReg[Rn], OpCode & 0xff);
+ } else {
+ // A.5.5.4 [<Rn>], #+/-<offset_8>*4
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x*4", gReg[Rn], SIGN (U), OpCode & 0xff);
+ }
+ } else {
+ // A5.5.5.2 [<Rn>, #+/-<offset_8>*4 ]!
+ AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (U), OpCode & 0xff, WRITE (W));
+ }
+
+ }
+
+ if ((OpCode & 0x0f000010) == 0x0e000010) {
+ // A4.1.32 MRC2, MCR2
+ AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", L ? "MRC":"MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);
+ return;
+ }
+
+ if ((OpCode & 0x0ff00000) == 0x0c400000) {
+ // A4.1.33 MRRC2, MCRR2
+ AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", L ? "MRRC":"MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);
+ return;
+ }
+
+ AsciiSPrint (Buf, Size, "Faulting OpCode 0x%08x", OpCode);
+
+ *OpCodePtr += 1;
+ return;
+}
+
diff --git a/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf b/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf new file mode 100644 index 000000000..2b8e8d207 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf @@ -0,0 +1,35 @@ +#/** @file
+# ARM Disassembler library
+#
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmDisassemblerLib
+ FILE_GUID = 7ACEC173-F15D-426C-8F2F-BD86B4183EF1
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmDisassemblerLib
+
+
+[Sources.ARM]
+ ArmDisassembler.c
+ ThumbDisassembler.c
+
+[Sources.AARCH64]
+ Aarch64Disassembler.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ PrintLib
+ DebugLib
+ PeCoffGetEntryPointLib
diff --git a/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c b/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c new file mode 100644 index 000000000..b665132d6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c @@ -0,0 +1,1056 @@ +/** @file
+ Thumb Disassembler. Still a work in progress.
+
+ Wrong output is a bug, so please fix it.
+ Hex output means there is not yet an entry or a decode bug.
+ gOpThumb[] are Thumb 16-bit, and gOpThumb2[] work on the 32-bit
+ 16-bit stream of Thumb2 instruction. Then there are big case
+ statements to print everything out. If you are adding instructions
+ try to reuse existing case entries if possible.
+
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PrintLib.h>
+
+extern CHAR8 *gCondition[];
+
+extern CHAR8 *gReg[];
+
+// Thumb address modes
+#define LOAD_STORE_FORMAT1 1
+#define LOAD_STORE_FORMAT1_H 101
+#define LOAD_STORE_FORMAT1_B 111
+#define LOAD_STORE_FORMAT2 2
+#define LOAD_STORE_FORMAT3 3
+#define LOAD_STORE_FORMAT4 4
+#define LOAD_STORE_MULTIPLE_FORMAT1 5
+#define PUSH_FORMAT 6
+#define POP_FORMAT 106
+#define IMMED_8 7
+#define CONDITIONAL_BRANCH 8
+#define UNCONDITIONAL_BRANCH 9
+#define UNCONDITIONAL_BRANCH_SHORT 109
+#define BRANCH_EXCHANGE 10
+#define DATA_FORMAT1 11
+#define DATA_FORMAT2 12
+#define DATA_FORMAT3 13
+#define DATA_FORMAT4 14
+#define DATA_FORMAT5 15
+#define DATA_FORMAT6_SP 16
+#define DATA_FORMAT6_PC 116
+#define DATA_FORMAT7 17
+#define DATA_FORMAT8 19
+#define CPS_FORMAT 20
+#define ENDIAN_FORMAT 21
+#define DATA_CBZ 22
+#define ADR_FORMAT 23
+#define IT_BLOCK 24
+
+// Thumb2 address modes
+#define B_T3 200
+#define B_T4 201
+#define BL_T2 202
+#define POP_T2 203
+#define POP_T3 204
+#define STM_FORMAT 205
+#define LDM_REG_IMM12_SIGNED 206
+#define LDM_REG_IMM12_LSL 207
+#define LDM_REG_IMM8 208
+#define LDM_REG_IMM12 209
+#define LDM_REG_INDIRECT_LSL 210
+#define LDM_REG_IMM8_SIGNED 211
+#define LDRD_REG_IMM8 212
+#define LDREXB 213
+#define LDREXD 214
+#define SRS_FORMAT 215
+#define RFE_FORMAT 216
+#define LDRD_REG_IMM8_SIGNED 217
+#define ADD_IMM12 218
+#define ADD_IMM5 219
+#define ADR_THUMB2 220
+#define CMN_THUMB2 221
+#define ASR_IMM5 222
+#define ASR_3REG 223
+#define BFC_THUMB2 224
+#define CDP_THUMB2 225
+#define THUMB2_NO_ARGS 226
+#define THUMB2_2REGS 227
+#define ADD_IMM5_2REG 228
+#define CPD_THUMB2 229
+#define THUMB2_4REGS 230
+#define ADD_IMM12_1REG 231
+#define THUMB2_IMM16 232
+#define MRC_THUMB2 233
+#define MRRC_THUMB2 234
+#define THUMB2_MRS 235
+#define THUMB2_MSR 236
+
+
+
+
+typedef struct {
+ CHAR8 *Start;
+ UINT32 OpCode;
+ UINT32 Mask;
+ UINT32 AddressMode;
+} THUMB_INSTRUCTIONS;
+
+THUMB_INSTRUCTIONS gOpThumb[] = {
+// Thumb 16-bit instructions
+// Op Mask Format
+ { "ADC" , 0x4140, 0xffc0, DATA_FORMAT5 }, // ADC <Rndn>, <Rm>
+ { "ADR", 0xa000, 0xf800, ADR_FORMAT }, // ADR <Rd>, <label>
+ { "ADD" , 0x1c00, 0xfe00, DATA_FORMAT2 },
+ { "ADD" , 0x3000, 0xf800, DATA_FORMAT3 },
+ { "ADD" , 0x1800, 0xfe00, DATA_FORMAT1 },
+ { "ADD" , 0x4400, 0xff00, DATA_FORMAT8 }, // A8.6.9
+ { "ADD" , 0xa000, 0xf100, DATA_FORMAT6_PC },
+ { "ADD" , 0xa800, 0xf800, DATA_FORMAT6_SP },
+ { "ADD" , 0xb000, 0xff80, DATA_FORMAT7 },
+
+ { "AND" , 0x4000, 0xffc0, DATA_FORMAT5 },
+
+ { "ASR" , 0x1000, 0xf800, DATA_FORMAT4 },
+ { "ASR" , 0x4100, 0xffc0, DATA_FORMAT5 },
+
+ { "B" , 0xd000, 0xf000, CONDITIONAL_BRANCH },
+ { "B" , 0xe000, 0xf800, UNCONDITIONAL_BRANCH_SHORT },
+ { "BLX" , 0x4780, 0xff80, BRANCH_EXCHANGE },
+ { "BX" , 0x4700, 0xff87, BRANCH_EXCHANGE },
+
+ { "BIC" , 0x4380, 0xffc0, DATA_FORMAT5 },
+ { "BKPT", 0xdf00, 0xff00, IMMED_8 },
+ { "CBZ", 0xb100, 0xfd00, DATA_CBZ },
+ { "CBNZ", 0xb900, 0xfd00, DATA_CBZ },
+ { "CMN" , 0x42c0, 0xffc0, DATA_FORMAT5 },
+
+ { "CMP" , 0x2800, 0xf800, DATA_FORMAT3 },
+ { "CMP" , 0x4280, 0xffc0, DATA_FORMAT5 },
+ { "CMP" , 0x4500, 0xff00, DATA_FORMAT8 },
+
+ { "CPS" , 0xb660, 0xffe8, CPS_FORMAT },
+ { "MOV" , 0x4600, 0xff00, DATA_FORMAT8 },
+ { "EOR" , 0x4040, 0xffc0, DATA_FORMAT5 },
+
+ { "LDMIA" , 0xc800, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
+ { "LDR" , 0x6800, 0xf800, LOAD_STORE_FORMAT1 }, // LDR <Rt>, [<Rn> {,#<imm>}]
+ { "LDR" , 0x5800, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
+ { "LDR" , 0x4800, 0xf800, LOAD_STORE_FORMAT3 },
+ { "LDR" , 0x9800, 0xf800, LOAD_STORE_FORMAT4 }, // LDR <Rt>, [SP, #<imm>]
+ { "LDRB" , 0x7800, 0xf800, LOAD_STORE_FORMAT1_B },
+ { "LDRB" , 0x5c00, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
+ { "LDRH" , 0x8800, 0xf800, LOAD_STORE_FORMAT1_H },
+ { "LDRH" , 0x7a00, 0xfe00, LOAD_STORE_FORMAT2 },
+ { "LDRSB" , 0x5600, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
+ { "LDRSH" , 0x5e00, 0xfe00, LOAD_STORE_FORMAT2 },
+
+ { "MOVS", 0x0000, 0xffc0, DATA_FORMAT5 }, // LSL with imm5 == 0 is a MOVS, so this must go before LSL
+ { "LSL" , 0x0000, 0xf800, DATA_FORMAT4 },
+ { "LSL" , 0x4080, 0xffc0, DATA_FORMAT5 },
+ { "LSR" , 0x0001, 0xf800, DATA_FORMAT4 },
+ { "LSR" , 0x40c0, 0xffc0, DATA_FORMAT5 },
+ { "LSRS", 0x0800, 0xf800, DATA_FORMAT4 }, // LSRS <Rd>, <Rm>, #<imm5>
+
+ { "MOVS", 0x2000, 0xf800, DATA_FORMAT3 },
+ { "MOV" , 0x1c00, 0xffc0, DATA_FORMAT3 },
+ { "MOV" , 0x4600, 0xff00, DATA_FORMAT8 },
+
+ { "MUL" , 0x4340, 0xffc0, DATA_FORMAT5 },
+ { "MVN" , 0x41c0, 0xffc0, DATA_FORMAT5 },
+ { "NEG" , 0x4240, 0xffc0, DATA_FORMAT5 },
+ { "ORR" , 0x4300, 0xffc0, DATA_FORMAT5 },
+ { "POP" , 0xbc00, 0xfe00, POP_FORMAT },
+ { "PUSH", 0xb400, 0xfe00, PUSH_FORMAT },
+
+ { "REV" , 0xba00, 0xffc0, DATA_FORMAT5 },
+ { "REV16" , 0xba40, 0xffc0, DATA_FORMAT5 },
+ { "REVSH" , 0xbac0, 0xffc0, DATA_FORMAT5 },
+
+ { "ROR" , 0x41c0, 0xffc0, DATA_FORMAT5 },
+ { "SBC" , 0x4180, 0xffc0, DATA_FORMAT5 },
+ { "SETEND" , 0xb650, 0xfff0, ENDIAN_FORMAT },
+
+ { "STMIA" , 0xc000, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
+ { "STR" , 0x6000, 0xf800, LOAD_STORE_FORMAT1 }, // STR <Rt>, [<Rn> {,#<imm>}]
+ { "STR" , 0x5000, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
+ { "STR" , 0x9000, 0xf800, LOAD_STORE_FORMAT4 }, // STR <Rt>, [SP, #<imm>]
+ { "STRB" , 0x7000, 0xf800, LOAD_STORE_FORMAT1_B }, // STRB <Rt>, [<Rn>, #<imm5>]
+ { "STRB" , 0x5400, 0xfe00, LOAD_STORE_FORMAT2 }, // STRB <Rt>, [<Rn>, <Rm>]
+ { "STRH" , 0x8000, 0xf800, LOAD_STORE_FORMAT1_H }, // STRH <Rt>, [<Rn>{,#<imm>}]
+ { "STRH" , 0x5200, 0xfe00, LOAD_STORE_FORMAT2 }, // STRH <Rt>, [<Rn>, <Rm>]
+
+ { "SUB" , 0x1e00, 0xfe00, DATA_FORMAT2 },
+ { "SUB" , 0x3800, 0xf800, DATA_FORMAT3 },
+ { "SUB" , 0x1a00, 0xfe00, DATA_FORMAT1 },
+ { "SUB" , 0xb080, 0xff80, DATA_FORMAT7 },
+
+ { "SBC" , 0x4180, 0xffc0, DATA_FORMAT5 },
+
+ { "SWI" , 0xdf00, 0xff00, IMMED_8 },
+ { "SXTB", 0xb240, 0xffc0, DATA_FORMAT5 },
+ { "SXTH", 0xb200, 0xffc0, DATA_FORMAT5 },
+ { "TST" , 0x4200, 0xffc0, DATA_FORMAT5 },
+ { "UXTB", 0xb2c0, 0xffc0, DATA_FORMAT5 },
+ { "UXTH", 0xb280, 0xffc0, DATA_FORMAT5 },
+
+ { "IT", 0xbf00, 0xff00, IT_BLOCK }
+
+};
+
+THUMB_INSTRUCTIONS gOpThumb2[] = {
+//Instruct OpCode OpCode Mask Addressig Mode
+
+ { "ADR", 0xf2af0000, 0xfbff8000, ADR_THUMB2 }, // ADDR <Rd>, <label> ;Needs to go before ADDW
+ { "CMN", 0xf1100f00, 0xfff08f00, CMN_THUMB2 }, // CMN <Rn>, #<const> ;Needs to go before ADD
+ { "CMN", 0xeb100f00, 0xfff08f00, ADD_IMM5_2REG }, // CMN <Rn>, <Rm> {,<shift> #<const>}
+ { "CMP", 0xf1a00f00, 0xfff08f00, CMN_THUMB2 }, // CMP <Rn>, #<const>
+ { "TEQ", 0xf0900f00, 0xfff08f00, CMN_THUMB2 }, // CMP <Rn>, #<const>
+ { "TEQ", 0xea900f00, 0xfff08f00, ADD_IMM5_2REG }, // CMN <Rn>, <Rm> {,<shift> #<const>}
+ { "TST", 0xf0100f00, 0xfff08f00, CMN_THUMB2 }, // CMP <Rn>, #<const>
+ { "TST", 0xea100f00, 0xfff08f00, ADD_IMM5_2REG }, // TST <Rn>, <Rm> {,<shift> #<const>}
+
+ { "MOV", 0xf04f0000, 0xfbef8000, ADD_IMM12_1REG }, // MOV <Rd>, #<const>
+ { "MOVW", 0xf2400000, 0xfbe08000, THUMB2_IMM16 }, // MOVW <Rd>, #<const>
+ { "MOVT", 0xf2c00000, 0xfbe08000, THUMB2_IMM16 }, // MOVT <Rd>, #<const>
+
+ { "ADC", 0xf1400000, 0xfbe08000, ADD_IMM12 }, // ADC{S} <Rd>, <Rn>, #<const>
+ { "ADC", 0xeb400000, 0xffe08000, ADD_IMM5 }, // ADC{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
+ { "ADD", 0xf1000000, 0xfbe08000, ADD_IMM12 }, // ADD{S} <Rd>, <Rn>, #<const>
+ { "ADD", 0xeb000000, 0xffe08000, ADD_IMM5 }, // ADD{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
+ { "ADDW", 0xf2000000, 0xfbe08000, ADD_IMM12 }, // ADDW{S} <Rd>, <Rn>, #<const>
+ { "AND", 0xf0000000, 0xfbe08000, ADD_IMM12 }, // AND{S} <Rd>, <Rn>, #<const>
+ { "AND", 0xea000000, 0xffe08000, ADD_IMM5 }, // AND{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
+ { "BIC", 0xf0200000, 0xfbe08000, ADD_IMM12 }, // BIC{S} <Rd>, <Rn>, #<const>
+ { "BIC", 0xea200000, 0xffe08000, ADD_IMM5 }, // BIC{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
+ { "EOR", 0xf0800000, 0xfbe08000, ADD_IMM12 }, // EOR{S} <Rd>, <Rn>, #<const>
+ { "EOR", 0xea800000, 0xffe08000, ADD_IMM5 }, // EOR{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
+ { "ORN", 0xf0600000, 0xfbe08000, ADD_IMM12 }, // ORN{S} <Rd>, <Rn>, #<const>
+ { "ORN", 0xea600000, 0xffe08000, ADD_IMM5 }, // ORN{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
+ { "ORR", 0xf0400000, 0xfbe08000, ADD_IMM12 }, // ORR{S} <Rd>, <Rn>, #<const>
+ { "ORR", 0xea400000, 0xffe08000, ADD_IMM5 }, // ORR{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
+ { "RSB", 0xf1c00000, 0xfbe08000, ADD_IMM12 }, // RSB{S} <Rd>, <Rn>, #<const>
+ { "RSB", 0xebc00000, 0xffe08000, ADD_IMM5 }, // RSB{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
+ { "SBC", 0xf1600000, 0xfbe08000, ADD_IMM12 }, // SBC{S} <Rd>, <Rn>, #<const>
+ { "SBC", 0xeb600000, 0xffe08000, ADD_IMM5 }, // SBC{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
+ { "SUB", 0xf1a00000, 0xfbe08000, ADD_IMM12 }, // SUB{S} <Rd>, <Rn>, #<const>
+ { "SUB", 0xeba00000, 0xffe08000, ADD_IMM5 }, // SUB{S} <Rd>, <Rn>, <Rm> {,<shift> #<const>}
+
+ { "ASR", 0xea4f0020, 0xffef8030, ASR_IMM5 }, // ARS <Rd>, <Rm> #<const>} imm3:imm2
+ { "ASR", 0xfa40f000, 0xffe0f0f0, ASR_3REG }, // ARS <Rd>, <Rn>, <Rm>
+ { "LSR", 0xea4f0010, 0xffef8030, ASR_IMM5 }, // LSR <Rd>, <Rm> #<const>} imm3:imm2
+ { "LSR", 0xfa20f000, 0xffe0f0f0, ASR_3REG }, // LSR <Rd>, <Rn>, <Rm>
+ { "ROR", 0xea4f0030, 0xffef8030, ASR_IMM5 }, // ROR <Rd>, <Rm> #<const>} imm3:imm2
+ { "ROR", 0xfa60f000, 0xffe0f0f0, ASR_3REG }, // ROR <Rd>, <Rn>, <Rm>
+
+ { "BFC", 0xf36f0000, 0xffff8010, BFC_THUMB2 }, // BFC <Rd>, #<lsb>, #<width>
+ { "BIC", 0xf3600000, 0xfff08010, BFC_THUMB2 }, // BIC <Rn>, <Rd>, #<lsb>, #<width>
+ { "SBFX", 0xf3400000, 0xfff08010, BFC_THUMB2 }, // SBFX <Rn>, <Rd>, #<lsb>, #<width>
+ { "UBFX", 0xf3c00000, 0xfff08010, BFC_THUMB2 }, // UBFX <Rn>, <Rd>, #<lsb>, #<width>
+
+ { "CPD", 0xee000000, 0xff000010, CPD_THUMB2 }, // CPD <coproc>,<opc1>,<CRd>,<CRn>,<CRm>,<opc2>
+ { "CPD2", 0xfe000000, 0xff000010, CPD_THUMB2 }, // CPD <coproc>,<opc1>,<CRd>,<CRn>,<CRm>,<opc2>
+
+ { "MRC", 0xee100000, 0xff100000, MRC_THUMB2 }, // MRC <coproc>,<opc1>,<Rt>,<CRn>,<CRm>,<opc2>
+ { "MRC2", 0xfe100000, 0xff100000, MRC_THUMB2 }, // MRC2 <coproc>,<opc1>,<Rt>,<CRn>,<CRm>,<opc2>
+ { "MRRC", 0xec500000, 0xfff00000, MRRC_THUMB2 }, // MRRC <coproc>,<opc1>,<Rt>,<Rt2>,<CRm>
+ { "MRRC2", 0xfc500000, 0xfff00000, MRRC_THUMB2 }, // MRR2 <coproc>,<opc1>,<Rt>,<Rt2>,<CRm>
+
+ { "MRS", 0xf3ef8000, 0xfffff0ff, THUMB2_MRS }, // MRS <Rd>, CPSR
+ { "MSR", 0xf3808000, 0xfff0fcff, THUMB2_MSR }, // MSR CPSR_fs, <Rn>
+
+ { "CLREX", 0xf3bf8f2f, 0xfffffff, THUMB2_NO_ARGS }, // CLREX
+
+ { "CLZ", 0xfab0f080, 0xfff0f0f0, THUMB2_2REGS }, // CLZ <Rd>,<Rm>
+ { "MOV", 0xec4f0000, 0xfff0f0f0, THUMB2_2REGS }, // MOV <Rd>,<Rm>
+ { "MOVS", 0xec5f0000, 0xfff0f0f0, THUMB2_2REGS }, // MOVS <Rd>,<Rm>
+ { "RBIT", 0xfb90f0a0, 0xfff0f0f0, THUMB2_2REGS }, // RBIT <Rd>,<Rm>
+ { "REV", 0xfb90f080, 0xfff0f0f0, THUMB2_2REGS }, // REV <Rd>,<Rm>
+ { "REV16", 0xfa90f090, 0xfff0f0f0, THUMB2_2REGS }, // REV16 <Rd>,<Rm>
+ { "REVSH", 0xfa90f0b0, 0xfff0f0f0, THUMB2_2REGS }, // REVSH <Rd>,<Rm>
+ { "RRX", 0xea4f0030, 0xfffff0f0, THUMB2_2REGS }, // RRX <Rd>,<Rm>
+ { "RRXS", 0xea5f0030, 0xfffff0f0, THUMB2_2REGS }, // RRXS <Rd>,<Rm>
+
+ { "MLA", 0xfb000000, 0xfff000f0, THUMB2_4REGS }, // MLA <Rd>, <Rn>, <Rm>, <Ra>
+ { "MLS", 0xfb000010, 0xfff000f0, THUMB2_4REGS }, // MLA <Rd>, <Rn>, <Rm>, <Ra>
+
+
+ { "SMLABB", 0xfb100000, 0xfff000f0, THUMB2_4REGS }, // SMLABB <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMLABT", 0xfb100010, 0xfff000f0, THUMB2_4REGS }, // SMLABT <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMLABB", 0xfb100020, 0xfff000f0, THUMB2_4REGS }, // SMLATB <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMLATT", 0xfb100030, 0xfff000f0, THUMB2_4REGS }, // SMLATT <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMLAWB", 0xfb300000, 0xfff000f0, THUMB2_4REGS }, // SMLAWB <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMLAWT", 0xfb300010, 0xfff000f0, THUMB2_4REGS }, // SMLAWT <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMLSD", 0xfb400000, 0xfff000f0, THUMB2_4REGS }, // SMLSD <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMLSDX", 0xfb400010, 0xfff000f0, THUMB2_4REGS }, // SMLSDX <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMMLA", 0xfb500000, 0xfff000f0, THUMB2_4REGS }, // SMMLA <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMMLAR", 0xfb500010, 0xfff000f0, THUMB2_4REGS }, // SMMLAR <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMMLS", 0xfb600000, 0xfff000f0, THUMB2_4REGS }, // SMMLS <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMMLSR", 0xfb600010, 0xfff000f0, THUMB2_4REGS }, // SMMLSR <Rd>, <Rn>, <Rm>, <Ra>
+ { "USADA8", 0xfb700000, 0xfff000f0, THUMB2_4REGS }, // USADA8 <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMLAD", 0xfb200000, 0xfff000f0, THUMB2_4REGS }, // SMLAD <Rd>, <Rn>, <Rm>, <Ra>
+ { "SMLADX", 0xfb200010, 0xfff000f0, THUMB2_4REGS }, // SMLADX <Rd>, <Rn>, <Rm>, <Ra>
+
+
+ { "B", 0xf0008000, 0xf800d000, B_T3 }, // B<c> <label>
+ { "B", 0xf0009000, 0xf800d000, B_T4 }, // B<c> <label>
+ { "BL", 0xf000d000, 0xf800d000, B_T4 }, // BL<c> <label>
+ { "BLX", 0xf000c000, 0xf800d000, BL_T2 }, // BLX<c> <label>
+
+ { "POP", 0xe8bd0000, 0xffff2000, POP_T2 }, // POP <registers>
+ { "POP", 0xf85d0b04, 0xffff0fff, POP_T3 }, // POP <register>
+ { "PUSH", 0xe8ad0000, 0xffffa000, POP_T2 }, // PUSH <registers>
+ { "PUSH", 0xf84d0d04, 0xffff0fff, POP_T3 }, // PUSH <register>
+ { "STM" , 0xe8800000, 0xffd0a000, STM_FORMAT }, // STM <Rn>{!},<registers>
+ { "STMDB", 0xe9800000, 0xffd0a000, STM_FORMAT }, // STMDB <Rn>{!},<registers>
+ { "LDM" , 0xe8900000, 0xffd02000, STM_FORMAT }, // LDM <Rn>{!},<registers>
+ { "LDMDB", 0xe9100000, 0xffd02000, STM_FORMAT }, // LDMDB <Rn>{!},<registers>
+
+ { "LDR", 0xf8d00000, 0xfff00000, LDM_REG_IMM12 }, // LDR <rt>, [<rn>, {, #<imm12>]}
+ { "LDRB", 0xf8900000, 0xfff00000, LDM_REG_IMM12 }, // LDRB <rt>, [<rn>, {, #<imm12>]}
+ { "LDRH", 0xf8b00000, 0xfff00000, LDM_REG_IMM12 }, // LDRH <rt>, [<rn>, {, #<imm12>]}
+ { "LDRSB", 0xf9900000, 0xfff00000, LDM_REG_IMM12 }, // LDRSB <rt>, [<rn>, {, #<imm12>]}
+ { "LDRSH", 0xf9b00000, 0xfff00000, LDM_REG_IMM12 }, // LDRSH <rt>, [<rn>, {, #<imm12>]}
+
+ { "LDR", 0xf85f0000, 0xff7f0000, LDM_REG_IMM12_SIGNED }, // LDR <Rt>, <label>
+ { "LDRB", 0xf81f0000, 0xff7f0000, LDM_REG_IMM12_SIGNED }, // LDRB <Rt>, <label>
+ { "LDRH", 0xf83f0000, 0xff7f0000, LDM_REG_IMM12_SIGNED }, // LDRH <Rt>, <label>
+ { "LDRSB", 0xf91f0000, 0xff7f0000, LDM_REG_IMM12_SIGNED }, // LDRSB <Rt>, <label>
+ { "LDRSH", 0xf93f0000, 0xff7f0000, LDM_REG_IMM12_SIGNED }, // LDRSB <Rt>, <label>
+
+ { "LDR", 0xf8500000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // LDR <rt>, [<rn>, <rm> {, LSL #<imm2>]}
+ { "LDRB", 0xf8100000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // LDRB <rt>, [<rn>, <rm> {, LSL #<imm2>]}
+ { "LDRH", 0xf8300000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // LDRH <rt>, [<rn>, <rm> {, LSL #<imm2>]}
+ { "LDRSB", 0xf9100000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // LDRSB <rt>, [<rn>, <rm> {, LSL #<imm2>]}
+ { "LDRSH", 0xf9300000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // LDRSH <rt>, [<rn>, <rm> {, LSL #<imm2>]}
+
+ { "LDR", 0xf8500800, 0xfff00800, LDM_REG_IMM8 }, // LDR <rt>, [<rn>, {, #<imm8>]}
+ { "LDRBT", 0xf8100e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRBT <rt>, [<rn>, {, #<imm8>]}
+ { "LDRHT", 0xf8300e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRHT <rt>, [<rn>, {, #<imm8>]}
+ { "LDRSB", 0xf9100800, 0xfff00800, LDM_REG_IMM8 }, // LDRHT <rt>, [<rn>, {, #<imm8>]} {!} form?
+ { "LDRSBT",0xf9100e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRHBT <rt>, [<rn>, {, #<imm8>]} {!} form?
+ { "LDRSH" ,0xf9300800, 0xfff00800, LDM_REG_IMM8 }, // LDRSH <rt>, [<rn>, {, #<imm8>]}
+ { "LDRSHT",0xf9300e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRSHT <rt>, [<rn>, {, #<imm8>]}
+ { "LDRT", 0xf8500e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRT <rt>, [<rn>, {, #<imm8>]}
+
+ { "LDRD", 0xe8500000, 0xfe500000, LDRD_REG_IMM8_SIGNED }, // LDRD <rt>, <rt2>, [<rn>, {, #<imm8>]}{!}
+ { "LDRD", 0xe8500000, 0xfe500000, LDRD_REG_IMM8 }, // LDRD <rt>, <rt2>, <label>
+
+ { "LDREX", 0xe8500f00, 0xfff00f00, LDM_REG_IMM8 }, // LDREX <Rt>, [Rn, {#imm8}]]
+ { "LDREXB", 0xe8d00f4f, 0xfff00fff, LDREXB }, // LDREXB <Rt>, [<Rn>]
+ { "LDREXH", 0xe8d00f5f, 0xfff00fff, LDREXB }, // LDREXH <Rt>, [<Rn>]
+
+ { "LDREXD", 0xe8d00f4f, 0xfff00fff, LDREXD }, // LDREXD <Rt>, <Rt2>, [<Rn>]
+
+ { "STR", 0xf8c00000, 0xfff00000, LDM_REG_IMM12 }, // STR <rt>, [<rn>, {, #<imm12>]}
+ { "STRB", 0xf8800000, 0xfff00000, LDM_REG_IMM12 }, // STRB <rt>, [<rn>, {, #<imm12>]}
+ { "STRH", 0xf8a00000, 0xfff00000, LDM_REG_IMM12 }, // STRH <rt>, [<rn>, {, #<imm12>]}
+
+ { "STR", 0xf8400000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // STR <rt>, [<rn>, <rm> {, LSL #<imm2>]}
+ { "STRB", 0xf8000000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // STRB <rt>, [<rn>, <rm> {, LSL #<imm2>]}
+ { "STRH", 0xf8200000, 0xfff00fc0, LDM_REG_INDIRECT_LSL }, // STRH <rt>, [<rn>, <rm> {, LSL #<imm2>]}
+
+ { "STR", 0xf8400800, 0xfff00800, LDM_REG_IMM8 }, // STR <rt>, [<rn>, {, #<imm8>]}
+ { "STRH", 0xf8200800, 0xfff00800, LDM_REG_IMM8 }, // STRH <rt>, [<rn>, {, #<imm8>]}
+ { "STRBT", 0xf8000e00, 0xfff00f00, LDM_REG_IMM8 }, // STRBT <rt>, [<rn>, {, #<imm8>]}
+ { "STRHT", 0xf8200e00, 0xfff00f00, LDM_REG_IMM8 }, // STRHT <rt>, [<rn>, {, #<imm8>]}
+ { "STRT", 0xf8400e00, 0xfff00f00, LDM_REG_IMM8 }, // STRT <rt>, [<rn>, {, #<imm8>]}
+
+ { "STRD", 0xe8400000, 0xfe500000, LDRD_REG_IMM8_SIGNED }, // STRD <rt>, <rt2>, [<rn>, {, #<imm8>]}{!}
+
+ { "STREX", 0xe8400f00, 0xfff00f00, LDM_REG_IMM8 }, // STREX <Rt>, [Rn, {#imm8}]]
+ { "STREXB", 0xe8c00f4f, 0xfff00fff, LDREXB }, // STREXB <Rd>, <Rt>, [<Rn>]
+ { "STREXH", 0xe8c00f5f, 0xfff00fff, LDREXB }, // STREXH <Rd>, <Rt>, [<Rn>]
+
+ { "STREXD", 0xe8d00f4f, 0xfff00fff, LDREXD }, // STREXD <Rd>, <Rt>, <Rt2>, [<Rn>]
+
+ { "SRSDB", 0xe80dc000, 0xffdffff0, SRS_FORMAT }, // SRSDB<c> SP{!},#<mode>
+ { "SRS" , 0xe98dc000, 0xffdffff0, SRS_FORMAT }, // SRS{IA}<c> SP{!},#<mode>
+ { "RFEDB", 0xe810c000, 0xffd0ffff, RFE_FORMAT }, // RFEDB<c> <Rn>{!}
+ { "RFE" , 0xe990c000, 0xffd0ffff, RFE_FORMAT } // RFE{IA}<c> <Rn>{!}
+};
+
+CHAR8 *gShiftType[] = {
+ "LSL",
+ "LSR",
+ "ASR",
+ "ROR"
+};
+
+CHAR8 mThumbMregListStr[4*15 + 1];
+
+CHAR8 *
+ThumbMRegList (
+ UINT32 RegBitMask
+ )
+{
+ UINTN Index, Start, End;
+ BOOLEAN First;
+
+ mThumbMregListStr[0] = '\0';
+ AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "{");
+
+ for (Index = 0, First = TRUE; Index <= 15; Index++) {
+ if ((RegBitMask & (1 << Index)) != 0) {
+ Start = End = Index;
+ for (Index++; ((RegBitMask & (1 << Index)) != 0) && (Index <= 9); Index++) {
+ End = Index;
+ }
+
+ if (!First) {
+ AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, ",");
+ } else {
+ First = FALSE;
+ }
+
+ if (Start == End) {
+ AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, gReg[Start]);
+ } else {
+ AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, gReg[Start]);
+ AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "-");
+ AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, gReg[End]);
+ }
+ }
+ }
+ if (First) {
+ AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "ERROR");
+ }
+ AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "}");
+
+ // BugBug: Make caller pass in buffer it is cleaner
+ return mThumbMregListStr;
+}
+
+UINT32
+SignExtend32 (
+ IN UINT32 Data,
+ IN UINT32 TopBit
+ )
+{
+ if (((Data & TopBit) == 0) || (TopBit == BIT31)) {
+ return Data;
+ }
+
+ do {
+ TopBit <<= 1;
+ Data |= TopBit;
+ } while ((TopBit & BIT31) != BIT31);
+
+ return Data;
+}
+
+//
+// Some instructions specify the PC is always considered aligned
+// The PC is after the instruction that is executing. So you pass
+// in the instruction address and you get back the aligned answer
+//
+UINT32
+PCAlign4 (
+ IN UINT32 Data
+ )
+{
+ return (Data + 4) & 0xfffffffc;
+}
+
+/**
+ Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+ point to next instruction.
+
+ We cheat and only decode instructions that access
+ memory. If the instruction is not found we dump the instruction in hex.
+
+ @param OpCodePtrPtr Pointer to pointer of ARM Thumb instruction to disassemble.
+ @param Buf Buffer to sprintf disassembly into.
+ @param Size Size of Buf in bytes.
+ @param Extended TRUE dump hex for instruction too.
+
+**/
+VOID
+DisassembleThumbInstruction (
+ IN UINT16 **OpCodePtrPtr,
+ OUT CHAR8 *Buf,
+ OUT UINTN Size,
+ OUT UINT32 *ItBlock,
+ IN BOOLEAN Extended
+ )
+{
+ UINT16 *OpCodePtr;
+ UINT16 OpCode;
+ UINT32 OpCode32;
+ UINT32 Index;
+ UINT32 Offset;
+ UINT16 Rd, Rn, Rm, Rt, Rt2;
+ BOOLEAN H1, H2, imod;
+ //BOOLEAN ItFlag;
+ UINT32 PC, Target, msbit, lsbit;
+ CHAR8 *Cond;
+ BOOLEAN S, J1, J2, P, U, W;
+ UINT32 coproc, opc1, opc2, CRd, CRn, CRm;
+ UINT32 Mask;
+
+ OpCodePtr = *OpCodePtrPtr;
+ OpCode = **OpCodePtrPtr;
+
+ // Thumb2 is a stream of 16-bit instructions not a 32-bit instruction.
+ OpCode32 = (((UINT32)OpCode) << 16) | *(OpCodePtr + 1);
+
+ // These register names match branch form, but not others
+ Rd = OpCode & 0x7;
+ Rn = (OpCode >> 3) & 0x7;
+ Rm = (OpCode >> 6) & 0x7;
+ H1 = (OpCode & BIT7) != 0;
+ H2 = (OpCode & BIT6) != 0;
+ imod = (OpCode & BIT4) != 0;
+ PC = (UINT32)(UINTN)OpCodePtr;
+
+ // Increment by the minimum instruction size, Thumb2 could be bigger
+ *OpCodePtrPtr += 1;
+
+ // Manage IT Block ItFlag TRUE means we are in an IT block
+ /*if (*ItBlock != 0) {
+ ItFlag = TRUE;
+ *ItBlock -= 1;
+ } else {
+ ItFlag = FALSE;
+ }*/
+
+ for (Index = 0; Index < sizeof (gOpThumb)/sizeof (THUMB_INSTRUCTIONS); Index++) {
+ if ((OpCode & gOpThumb[Index].Mask) == gOpThumb[Index].OpCode) {
+ if (Extended) {
+ Offset = AsciiSPrint (Buf, Size, "0x%04x %-6a", OpCode, gOpThumb[Index].Start);
+ } else {
+ Offset = AsciiSPrint (Buf, Size, "%-6a", gOpThumb[Index].Start);
+ }
+ switch (gOpThumb[Index].AddressMode) {
+ case LOAD_STORE_FORMAT1:
+ // A6.5.1 <Rd>, [<Rn>, #<5_bit_offset>]
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [r%d #0x%x]", Rd, Rn, (OpCode >> 4) & 0x7c);
+ return;
+ case LOAD_STORE_FORMAT1_H:
+ // A6.5.1 <Rd>, [<Rn>, #<5_bit_offset>]
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [r%d #0x%x]", Rd, Rn, (OpCode >> 5) & 0x3e);
+ return;
+ case LOAD_STORE_FORMAT1_B:
+ // A6.5.1 <Rd>, [<Rn>, #<5_bit_offset>]
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [r%d #0x%x]", Rd, Rn, (OpCode >> 6) & 0x1f);
+ return;
+
+ case LOAD_STORE_FORMAT2:
+ // A6.5.1 <Rd>, [<Rn>, <Rm>]
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [r%d, r%d]", Rd, Rn, Rm);
+ return;
+ case LOAD_STORE_FORMAT3:
+ // A6.5.1 <Rd>, [PC, #<8_bit_offset>]
+ Target = (OpCode & 0xff) << 2;
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [pc, #0x%x] ;0x%08x", (OpCode >> 8) & 7, Target, PCAlign4 (PC) + Target);
+ return;
+ case LOAD_STORE_FORMAT4:
+ // Rt, [SP, #imm8]
+ Target = (OpCode & 0xff) << 2;
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [sp, #0x%x]", (OpCode >> 8) & 7, Target);
+ return;
+
+ case LOAD_STORE_MULTIPLE_FORMAT1:
+ // <Rn>!, {r0-r7}
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d!, %a", (OpCode >> 8) & 7, ThumbMRegList (OpCode & 0xff));
+ return;
+
+ case POP_FORMAT:
+ // POP {r0-r7,pc}
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a", ThumbMRegList ((OpCode & 0xff) | ((OpCode & BIT8) == BIT8 ? BIT15 : 0)));
+ return;
+
+ case PUSH_FORMAT:
+ // PUSH {r0-r7,lr}
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a", ThumbMRegList ((OpCode & 0xff) | ((OpCode & BIT8) == BIT8 ? BIT14 : 0)));
+ return;
+
+
+ case IMMED_8:
+ // A6.7 <immed_8>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%x", OpCode & 0xff);
+ return;
+
+ case CONDITIONAL_BRANCH:
+ // A6.3.1 B<cond> <target_address>
+ // Patch in the condition code. A little hack but based on "%-6a"
+ Cond = gCondition[(OpCode >> 8) & 0xf];
+ Buf[Offset-5] = *Cond++;
+ Buf[Offset-4] = *Cond;
+ AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%04x", PC + 4 + SignExtend32 ((OpCode & 0xff) << 1, BIT8));
+ return;
+ case UNCONDITIONAL_BRANCH_SHORT:
+ // A6.3.2 B <target_address>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%04x", PC + 4 + SignExtend32 ((OpCode & 0x3ff) << 1, BIT11));
+ return;
+
+ case BRANCH_EXCHANGE:
+ // A6.3.3 BX|BLX <Rm>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gReg[Rn | (H2 ? 8:0)]);
+ return;
+
+ case DATA_FORMAT1:
+ // A6.4.3 <Rd>, <Rn>, <Rm>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, r%d, r%d", Rd, Rn, Rm);
+ return;
+ case DATA_FORMAT2:
+ // A6.4.3 <Rd>, <Rn>, #3_bit_immed
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, r%d, 0x%x", Rd, Rn, Rm);
+ return;
+ case DATA_FORMAT3:
+ // A6.4.3 <Rd>|<Rn>, #imm8
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, #0x%x", (OpCode >> 8) & 7, OpCode & 0xff);
+ return;
+ case DATA_FORMAT4:
+ // A6.4.3 <Rd>|<Rm>, #immed_5
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, r%d, 0x%x", Rn, Rd, (OpCode >> 6) & 0x1f);
+ return;
+ case DATA_FORMAT5:
+ // A6.4.3 <Rd>|<Rm>, <Rm>|<Rs>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, r%d", Rd, Rn);
+ return;
+ case DATA_FORMAT6_SP:
+ // A6.4.3 <Rd>, <reg>, #<8_Bit_immed>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, sp, 0x%x", (OpCode >> 8) & 7, (OpCode & 0xff) << 2);
+ return;
+ case DATA_FORMAT6_PC:
+ // A6.4.3 <Rd>, <reg>, #<8_Bit_immed>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, pc, 0x%x", (OpCode >> 8) & 7, (OpCode & 0xff) << 2);
+ return;
+ case DATA_FORMAT7:
+ // A6.4.3 SP, SP, #<7_Bit_immed>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " sp, sp, 0x%x", (OpCode & 0x7f)*4);
+ return;
+ case DATA_FORMAT8:
+ // A6.4.3 <Rd>|<Rn>, <Rm>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rd | (H1 ? 8:0)], gReg[Rn | (H2 ? 8:0)]);
+ return;
+
+ case CPS_FORMAT:
+ // A7.1.24
+ AsciiSPrint (&Buf[Offset], Size - Offset, "%a %a%a%a", imod ? "ID":"IE", ((OpCode & BIT2) == 0) ? "":"a", ((OpCode & BIT1) == 0) ? "":"i", ((OpCode & BIT0) == 0) ? "":"f");
+ return;
+
+ case ENDIAN_FORMAT:
+ // A7.1.24
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a", (OpCode & BIT3) == 0 ? "LE":"BE");
+ return;
+
+ case DATA_CBZ:
+ // CB{N}Z <Rn>, <Lable>
+ Target = ((OpCode >> 2) & 0x3e) | (((OpCode & BIT9) == BIT9) ? BIT6 : 0);
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %08x", gReg[Rd], PC + 4 + Target);
+ return;
+
+ case ADR_FORMAT:
+ // ADR <Rd>, <Label>
+ Target = (OpCode & 0xff) << 2;
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %08x", gReg[(OpCode >> 8) & 7], PCAlign4 (PC) + Target);
+ return;
+
+ case IT_BLOCK:
+ // ITSTATE = cond:mask OpCode[7:4]:OpCode[3:0]
+ // ITSTATE[7:5] == cond[3:1]
+ // ITSTATE[4] == 1st Instruction cond[0]
+ // ITSTATE[3] == 2st Instruction cond[0]
+ // ITSTATE[2] == 3st Instruction cond[0]
+ // ITSTATE[1] == 4st Instruction cond[0]
+ // ITSTATE[0] == 1 4 instruction IT block. 0 means 0,1,2 or 3 instructions
+ // 1st one in ITSTATE low bits defines the number of instructions
+ Mask = (OpCode & 0xf);
+ if ((Mask & 0x1) == 0x1) {
+ *ItBlock = 4;
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a%a", (Mask & BIT3)?"T":"E", (Mask & BIT2)?"T":"E", (Mask & BIT1)?"T":"E");
+ } else if ((OpCode & 0x3) == 0x2) {
+ *ItBlock = 3;
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a", (Mask & BIT3)?"T":"E", (Mask & BIT2)?"T":"E");
+ } else if ((OpCode & 0x7) == 0x4) {
+ *ItBlock = 2;
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a", (Mask & BIT3)?"T":"E");
+ } else if ((OpCode & 0xf) == 0x8) {
+ *ItBlock = 1;
+ }
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gCondition[(OpCode >> 4) & 0xf]);
+ return;
+ }
+ }
+ }
+
+
+ // Thumb2 are 32-bit instructions
+ *OpCodePtrPtr += 1;
+ Rt = (OpCode32 >> 12) & 0xf;
+ Rt2 = (OpCode32 >> 8) & 0xf;
+ Rd = (OpCode32 >> 8) & 0xf;
+ Rm = (OpCode32 & 0xf);
+ Rn = (OpCode32 >> 16) & 0xf;
+ for (Index = 0; Index < sizeof (gOpThumb2)/sizeof (THUMB_INSTRUCTIONS); Index++) {
+ if ((OpCode32 & gOpThumb2[Index].Mask) == gOpThumb2[Index].OpCode) {
+ if (Extended) {
+ Offset = AsciiSPrint (Buf, Size, "0x%04x %-6a", OpCode32, gOpThumb2[Index].Start);
+ } else {
+ Offset = AsciiSPrint (Buf, Size, " %-6a", gOpThumb2[Index].Start);
+ }
+ switch (gOpThumb2[Index].AddressMode) {
+ case B_T3:
+ Cond = gCondition[(OpCode32 >> 22) & 0xf];
+ Buf[Offset-5] = *Cond++;
+ Buf[Offset-4] = *Cond;
+ // S:J2:J1:imm6:imm11:0
+ Target = ((OpCode32 << 1) & 0xffe) + ((OpCode32 >> 4) & 0x3f000);
+ Target |= ((OpCode32 & BIT11) == BIT11)? BIT19 : 0; // J2
+ Target |= ((OpCode32 & BIT13) == BIT13)? BIT18 : 0; // J1
+ Target |= ((OpCode32 & BIT26) == BIT26)? BIT20 : 0; // S
+ Target = SignExtend32 (Target, BIT20);
+ AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PC + 4 + Target);
+ return;
+ case B_T4:
+ // S:I1:I2:imm10:imm11:0
+ Target = ((OpCode32 << 1) & 0xffe) + ((OpCode32 >> 4) & 0x3ff000);
+ S = (OpCode32 & BIT26) == BIT26;
+ J1 = (OpCode32 & BIT13) == BIT13;
+ J2 = (OpCode32 & BIT11) == BIT11;
+ Target |= (!(J2 ^ S) ? BIT22 : 0); // I2
+ Target |= (!(J1 ^ S) ? BIT23 : 0); // I1
+ Target |= (S ? BIT24 : 0); // S
+ Target = SignExtend32 (Target, BIT24);
+ AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PC + 4 + Target);
+ return;
+
+ case BL_T2:
+ // BLX S:I1:I2:imm10:imm11:0
+ Target = ((OpCode32 << 1) & 0xffc) + ((OpCode32 >> 4) & 0x3ff000);
+ S = (OpCode32 & BIT26) == BIT26;
+ J1 = (OpCode32 & BIT13) == BIT13;
+ J2 = (OpCode32 & BIT11) == BIT11;
+ Target |= (!(J2 ^ S) ? BIT23 : 0); // I2
+ Target |= (!(J1 ^ S) ? BIT24 : 0); // I1
+ Target |= (S ? BIT25 : 0); // S
+ Target = SignExtend32 (Target, BIT25);
+ AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PCAlign4 (PC) + Target);
+ return;
+
+ case POP_T2:
+ // <reglist> some must be zero, handled in table
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a", ThumbMRegList (OpCode32 & 0xffff));
+ return;
+
+ case POP_T3:
+ // <register>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gReg[(OpCode32 >> 12) & 0xf]);
+ return;
+
+ case STM_FORMAT:
+ // <Rn>{!}, <registers>
+ W = (OpCode32 & BIT21) == BIT21;
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, %a", gReg[(OpCode32 >> 16) & 0xf], W ? "!":"", ThumbMRegList (OpCode32 & 0xffff));
+ return;
+
+ case LDM_REG_IMM12_SIGNED:
+ // <rt>, <label>
+ Target = OpCode32 & 0xfff;
+ if ((OpCode32 & BIT23) == 0) {
+ // U == 0 means subtrack, U == 1 means add
+ Target = -Target;
+ }
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[(OpCode32 >> 12) & 0xf], PCAlign4 (PC) + Target);
+ return;
+
+ case LDM_REG_INDIRECT_LSL:
+ // <rt>, [<rn>, <rm> {, LSL #<imm2>]}
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, [%a, %a", gReg[Rt], gReg[Rn], gReg[Rm]);
+ if (((OpCode32 >> 4) & 3) == 0) {
+ AsciiSPrint (&Buf[Offset], Size - Offset, "]");
+ } else {
+ AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL #%d]", (OpCode32 >> 4) & 3);
+ }
+ return;
+
+ case LDM_REG_IMM12:
+ // <rt>, [<rn>, {, #<imm12>]}
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, [%a", gReg[Rt], gReg[Rn]);
+ if ((OpCode32 & 0xfff) == 0) {
+ AsciiSPrint (&Buf[Offset], Size - Offset, "]");
+ } else {
+ AsciiSPrint (&Buf[Offset], Size - Offset, ", #0x%x]", OpCode32 & 0xfff);
+ }
+ return;
+
+ case LDM_REG_IMM8:
+ // <rt>, [<rn>, {, #<imm8>}]{!}
+ W = (OpCode32 & BIT8) == BIT8;
+ U = (OpCode32 & BIT9) == BIT9;
+ P = (OpCode32 & BIT10) == BIT10;
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, [%a", gReg[Rt], gReg[Rn]);
+ if (P) {
+ if ((OpCode32 & 0xff) == 0) {
+ AsciiSPrint (&Buf[Offset], Size - Offset, "]%a", W?"!":"");
+ } else {
+ AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", U?"":"-" , OpCode32 & 0xff, W?"!":"");
+ }
+ } else {
+ AsciiSPrint (&Buf[Offset], Size - Offset, "], #%a0x%x", U?"":"-", OpCode32 & 0xff);
+ }
+ return;
+
+ case LDRD_REG_IMM8_SIGNED:
+ // LDRD <rt>, <rt2>, [<rn>, {, #<imm8>]}{!}
+ P = (OpCode32 & BIT24) == BIT24; // index = P
+ U = (OpCode32 & BIT23) == BIT23;
+ W = (OpCode32 & BIT21) == BIT21;
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, [%a", gReg[Rt], gReg[Rt2], gReg[Rn]);
+ if (P) {
+ if ((OpCode32 & 0xff) == 0) {
+ AsciiSPrint (&Buf[Offset], Size - Offset, "]");
+ } else {
+ AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", U?"":"-", (OpCode32 & 0xff) << 2, W?"!":"");
+ }
+ } else {
+ if ((OpCode32 & 0xff) != 0) {
+ AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x", U?"":"-", (OpCode32 & 0xff) << 2);
+ }
+ }
+ return;
+
+ case LDRD_REG_IMM8:
+ // LDRD <rt>, <rt2>, <label>
+ Target = (OpCode32 & 0xff) << 2;
+ if ((OpCode32 & BIT23) == 0) {
+ // U == 0 means subtrack, U == 1 means add
+ Target = -Target;
+ }
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rt], gReg[Rt2], PC + 4 + Target);
+ return;
+
+ case LDREXB:
+ // LDREXB <Rt>, [Rn]
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, [%a]", gReg[Rt], gReg[Rn]);
+ return;
+
+ case LDREXD:
+ // LDREXD <Rt>, <Rt2>, [<Rn>]
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, ,%a, [%a]", gReg[Rt], gReg[Rt2], gReg[Rn]);
+ return;
+
+ case SRS_FORMAT:
+ // SP{!}, #<mode>
+ W = (OpCode32 & BIT21) == BIT21;
+ AsciiSPrint (&Buf[Offset], Size - Offset, " SP%a, #0x%x", W?"!":"", OpCode32 & 0x1f);
+ return;
+
+ case RFE_FORMAT:
+ // <Rn>{!}
+ W = (OpCode32 & BIT21) == BIT21;
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, #0x%x", gReg[Rn], W?"!":"");
+ return;
+
+ case ADD_IMM12:
+ // ADD{S} <Rd>, <Rn>, #<const> i:imm3:imm8
+ if ((OpCode32 & BIT20) == BIT20) {
+ Buf[Offset - 3] = 'S'; // assume %-6a
+ }
+ Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #0x%x", gReg[Rd], gReg[Rn], Target);
+ return;
+
+ case ADD_IMM12_1REG:
+ // MOV{S} <Rd>, #<const> i:imm3:imm8
+ if ((OpCode32 & BIT20) == BIT20) {
+ Buf[Offset - 3] = 'S'; // assume %-6a
+ }
+ Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #0x%x", gReg[Rd], Target);
+ return;
+
+ case THUMB2_IMM16:
+ // MOVW <Rd>, #<const> i:imm3:imm8
+ Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
+ Target |= ((OpCode32 >> 4) & 0xf0000);
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #0x%x", gReg[Rd], Target);
+ return;
+
+ case ADD_IMM5:
+ // ADC{S} <Rd>, <Rn>, <Rm> {,LSL #<const>} imm3:imm2
+ if ((OpCode32 & BIT20) == BIT20) {
+ Buf[Offset - 3] = 'S'; // assume %-6a
+ }
+ Target = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rd], gReg[Rn], gReg[Rm]);
+ if (Target != 0) {
+ AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL %d", gShiftType[(OpCode >> 5) & 3], Target);
+ }
+ return;
+
+ case ADD_IMM5_2REG:
+ // CMP <Rn>, <Rm> {,LSL #<const>} imm3:imm2
+ Target = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rn], gReg[Rm]);
+ if (Target != 0) {
+ AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL %d", gShiftType[(OpCode >> 5) & 3], Target);
+ }
+
+
+ case ASR_IMM5:
+ // ARS <Rd>, <Rm> #<const>} imm3:imm2
+ if ((OpCode32 & BIT20) == BIT20) {
+ Buf[Offset - 3] = 'S'; // assume %-6a
+ }
+ Target = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a #%d", gReg[Rd], gReg[Rm], Target);
+ return;
+
+ case ASR_3REG:
+ // ARS <Rd>, <Rn>, <Rm>
+ if ((OpCode32 & BIT20) == BIT20) {
+ Buf[Offset - 3] = 'S'; // assume %-6a
+ }
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a %a", gReg[Rd], gReg[Rn], gReg[Rm]);
+ return;
+
+ case ADR_THUMB2:
+ // ADDR <Rd>, <label>
+ Target = (OpCode32 & 0xff) | ((OpCode32 >> 8) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
+ if ((OpCode & (BIT23 | BIT21)) == (BIT23 | BIT21)) {
+ Target = PCAlign4 (PC) - Target;
+ } else {
+ Target = PCAlign4 (PC) + Target;
+ }
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, 0x%08x", gReg[Rd], Target);
+ return;
+
+ case CMN_THUMB2:
+ // CMN <Rn>, #<const>}
+ Target = (OpCode32 & 0xff) | ((OpCode >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #0x%x", gReg[Rn], Target);
+ return;
+
+ case BFC_THUMB2:
+ // BFI <Rd>, <Rn>, #<lsb>, #<width>
+ msbit = OpCode32 & 0x1f;
+ lsbit = ((OpCode32 >> 6) & 3) | ((OpCode >> 10) & 0x1c);
+ if ((Rn == 0xf) & (AsciiStrCmp (gOpThumb2[Index].Start, "BFC") == 0)){
+ // BFC <Rd>, #<lsb>, #<width>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #%d, #%d", gReg[Rd], lsbit, msbit - lsbit + 1);
+ } else if (AsciiStrCmp (gOpThumb2[Index].Start, "BFI") == 0) {
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #%d, #%d", gReg[Rd], gReg[Rn], lsbit, msbit - lsbit + 1);
+ } else {
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #%d, #%d", gReg[Rd], gReg[Rn], lsbit, msbit + 1);
+ }
+ return;
+
+ case CPD_THUMB2:
+ // <coproc>,<opc1>,<CRd>,<CRn>,<CRm>,<opc2>
+ coproc = (OpCode32 >> 8) & 0xf;
+ opc1 = (OpCode32 >> 20) & 0xf;
+ opc2 = (OpCode32 >> 5) & 0x7;
+ CRd = (OpCode32 >> 12) & 0xf;
+ CRn = (OpCode32 >> 16) & 0xf;
+ CRm = OpCode32 & 0xf;
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,c%d,c%d,c%d", coproc, opc1, CRd, CRn, CRm);
+ if (opc2 != 0) {
+ AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", opc2);
+ }
+ return;
+
+ case MRC_THUMB2:
+ // MRC <coproc>,<opc1>,<Rt>,<CRn>,<CRm>,<opc2>
+ coproc = (OpCode32 >> 8) & 0xf;
+ opc1 = (OpCode32 >> 20) & 0xf;
+ opc2 = (OpCode32 >> 5) & 0x7;
+ CRn = (OpCode32 >> 16) & 0xf;
+ CRm = OpCode32 & 0xf;
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,%a,c%d,c%d", coproc, opc1, gReg[Rt], CRn, CRm);
+ if (opc2 != 0) {
+ AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", opc2);
+ }
+ return;
+
+ case MRRC_THUMB2:
+ // MRC <coproc>,<opc1>,<Rt>,<Rt2>,<CRm>,<opc2>
+ coproc = (OpCode32 >> 8) & 0xf;
+ opc1 = (OpCode32 >> 20) & 0xf;
+ CRn = (OpCode32 >> 16) & 0xf;
+ CRm = OpCode32 & 0xf;
+ Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,%a,%a,c%d", coproc, opc1, gReg[Rt], gReg[Rt2], CRm);
+ return;
+
+ case THUMB2_2REGS:
+ // <Rd>, <Rm>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rd], gReg[Rm]);
+ return;
+
+ case THUMB2_4REGS:
+ // <Rd>, <Rn>, <Rm>, <Ra>
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a, %a", gReg[Rd], gReg[Rn], gReg[Rm], gReg[Rt]);
+ return;
+
+ case THUMB2_MRS:
+ // MRS <Rd>, CPSR
+ AsciiSPrint (&Buf[Offset], Size - Offset, " %a, CPSR", gReg[Rd]);
+ return;
+
+ case THUMB2_MSR:
+ // MRS CPSR_<fields>, <Rd>
+ Target = (OpCode32 >> 10) & 3;
+ AsciiSPrint (&Buf[Offset], Size - Offset, " CPSR_%a%a, %a", (Target & 2) == 0 ? "":"f", (Target & 1) == 0 ? "":"s", gReg[Rd]);
+ return;
+
+ case THUMB2_NO_ARGS:
+ default:
+ break;
+ }
+ }
+ }
+
+ AsciiSPrint (Buf, Size, "0x%08x", OpCode32);
+}
+
+
+
+VOID
+DisassembleArmInstruction (
+ IN UINT32 **OpCodePtr,
+ OUT CHAR8 *Buf,
+ OUT UINTN Size,
+ IN BOOLEAN Extended
+ );
+
+
+/**
+ Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+ point to next instruction.
+
+ We cheat and only decode instructions that access
+ memory. If the instruction is not found we dump the instruction in hex.
+
+ @param OpCodePtrPtr Pointer to pointer of ARM Thumb instruction to disassemble.
+ @param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream
+ @param Extended TRUE dump hex for instruction too.
+ @param ItBlock Size of IT Block
+ @param Buf Buffer to sprintf disassembly into.
+ @param Size Size of Buf in bytes.
+
+**/
+VOID
+DisassembleInstruction (
+ IN UINT8 **OpCodePtr,
+ IN BOOLEAN Thumb,
+ IN BOOLEAN Extended,
+ IN OUT UINT32 *ItBlock,
+ OUT CHAR8 *Buf,
+ OUT UINTN Size
+ )
+{
+ if (Thumb) {
+ DisassembleThumbInstruction ((UINT16 **)OpCodePtr, Buf, Size, ItBlock, Extended);
+ } else {
+ DisassembleArmInstruction ((UINT32 **)OpCodePtr, Buf, Size, Extended);
+ }
+}
+
diff --git a/roms/edk2/ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c b/roms/edk2/ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c new file mode 100644 index 000000000..514f80a2d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c @@ -0,0 +1,51 @@ +/** @file
+* Exception Handling support specific for AArch64
+*
+* Copyright (c) 2016 HP Development Company, L.P.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+
+#include <Chipset/AArch64.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Protocol/DebugSupport.h> // for MAX_AARCH64_EXCEPTION
+
+UINTN gMaxExceptionNumber = MAX_AARCH64_EXCEPTION;
+EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_AARCH64_EXCEPTION + 1] = { 0 };
+EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[MAX_AARCH64_EXCEPTION + 1] = { 0 };
+PHYSICAL_ADDRESS gExceptionVectorAlignmentMask = ARM_VECTOR_TABLE_ALIGNMENT;
+UINTN gDebuggerNoHandlerValue = 0; // todo: define for AArch64
+
+#define EL0_STACK_SIZE EFI_PAGES_TO_SIZE(2)
+STATIC UINTN mNewStackBase[EL0_STACK_SIZE / sizeof (UINTN)];
+
+VOID
+RegisterEl0Stack (
+ IN VOID *Stack
+ );
+
+RETURN_STATUS ArchVectorConfig(
+ IN UINTN VectorBaseAddress
+ )
+{
+ UINTN HcrReg;
+
+ // Round down sp by 16 bytes alignment
+ RegisterEl0Stack (
+ (VOID *)(((UINTN)mNewStackBase + EL0_STACK_SIZE) & ~0xFUL)
+ );
+
+ if (ArmReadCurrentEL() == AARCH64_EL2) {
+ HcrReg = ArmReadHcr();
+
+ // Trap General Exceptions. All exceptions that would be routed to EL1 are routed to EL2
+ HcrReg |= ARM_HCR_TGE;
+
+ ArmWriteHcr(HcrReg);
+ }
+
+ return RETURN_SUCCESS;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S b/roms/edk2/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S new file mode 100644 index 000000000..5b10a1339 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S @@ -0,0 +1,392 @@ +//
+// Copyright (c) 2011 - 2014 ARM LTD. All rights reserved.<BR>
+// Portion of Copyright (c) 2014 NVIDIA Corporation. All rights reserved.<BR>
+// Copyright (c) 2016 HP Development Company, L.P.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+#include <Chipset/AArch64.h>
+#include <Library/PcdLib.h>
+#include <AsmMacroIoLibV8.h>
+#include <Protocol/DebugSupport.h> // for exception type definitions
+
+/*
+ This is the stack constructed by the exception handler (low address to high address).
+ X0 to FAR makes up the EFI_SYSTEM_CONTEXT for AArch64.
+
+ UINT64 X0; 0x000
+ UINT64 X1; 0x008
+ UINT64 X2; 0x010
+ UINT64 X3; 0x018
+ UINT64 X4; 0x020
+ UINT64 X5; 0x028
+ UINT64 X6; 0x030
+ UINT64 X7; 0x038
+ UINT64 X8; 0x040
+ UINT64 X9; 0x048
+ UINT64 X10; 0x050
+ UINT64 X11; 0x058
+ UINT64 X12; 0x060
+ UINT64 X13; 0x068
+ UINT64 X14; 0x070
+ UINT64 X15; 0x078
+ UINT64 X16; 0x080
+ UINT64 X17; 0x088
+ UINT64 X18; 0x090
+ UINT64 X19; 0x098
+ UINT64 X20; 0x0a0
+ UINT64 X21; 0x0a8
+ UINT64 X22; 0x0b0
+ UINT64 X23; 0x0b8
+ UINT64 X24; 0x0c0
+ UINT64 X25; 0x0c8
+ UINT64 X26; 0x0d0
+ UINT64 X27; 0x0d8
+ UINT64 X28; 0x0e0
+ UINT64 FP; 0x0e8 // x29 - Frame Pointer
+ UINT64 LR; 0x0f0 // x30 - Link Register
+ UINT64 SP; 0x0f8 // x31 - Stack Pointer
+
+ // FP/SIMD Registers. 128bit if used as Q-regs.
+ UINT64 V0[2]; 0x100
+ UINT64 V1[2]; 0x110
+ UINT64 V2[2]; 0x120
+ UINT64 V3[2]; 0x130
+ UINT64 V4[2]; 0x140
+ UINT64 V5[2]; 0x150
+ UINT64 V6[2]; 0x160
+ UINT64 V7[2]; 0x170
+ UINT64 V8[2]; 0x180
+ UINT64 V9[2]; 0x190
+ UINT64 V10[2]; 0x1a0
+ UINT64 V11[2]; 0x1b0
+ UINT64 V12[2]; 0x1c0
+ UINT64 V13[2]; 0x1d0
+ UINT64 V14[2]; 0x1e0
+ UINT64 V15[2]; 0x1f0
+ UINT64 V16[2]; 0x200
+ UINT64 V17[2]; 0x210
+ UINT64 V18[2]; 0x220
+ UINT64 V19[2]; 0x230
+ UINT64 V20[2]; 0x240
+ UINT64 V21[2]; 0x250
+ UINT64 V22[2]; 0x260
+ UINT64 V23[2]; 0x270
+ UINT64 V24[2]; 0x280
+ UINT64 V25[2]; 0x290
+ UINT64 V26[2]; 0x2a0
+ UINT64 V27[2]; 0x2b0
+ UINT64 V28[2]; 0x2c0
+ UINT64 V29[2]; 0x2d0
+ UINT64 V30[2]; 0x2e0
+ UINT64 V31[2]; 0x2f0
+
+ // System Context
+ UINT64 ELR; 0x300 // Exception Link Register
+ UINT64 SPSR; 0x308 // Saved Processor Status Register
+ UINT64 FPSR; 0x310 // Floating Point Status Register
+ UINT64 ESR; 0x318 // Exception syndrome register
+ UINT64 FAR; 0x320 // Fault Address Register
+ UINT64 Padding;0x328 // Required for stack alignment
+*/
+
+GCC_ASM_EXPORT(ExceptionHandlersEnd)
+GCC_ASM_EXPORT(CommonCExceptionHandler)
+GCC_ASM_EXPORT(RegisterEl0Stack)
+
+.text
+
+#define GP_CONTEXT_SIZE (32 * 8)
+#define FP_CONTEXT_SIZE (32 * 16)
+#define SYS_CONTEXT_SIZE ( 6 * 8) // 5 SYS regs + Alignment requirement (ie: the stack must be aligned on 0x10)
+
+//
+// There are two methods for installing AArch64 exception vectors:
+// 1. Install a copy of the vectors to a location specified by a PCD
+// 2. Write VBAR directly, requiring that vectors have proper alignment (2K)
+// The conditional below adjusts the alignment requirement based on which
+// exception vector initialization method is used.
+//
+
+#if defined(ARM_RELOCATE_VECTORS)
+GCC_ASM_EXPORT(ExceptionHandlersStart)
+ASM_PFX(ExceptionHandlersStart):
+#else
+VECTOR_BASE(ExceptionHandlersStart)
+#endif
+
+ .macro ExceptionEntry, val, sp=SPx
+ //
+ // Our backtrace and register dump code is written in C and so it requires
+ // a stack. This makes it difficult to produce meaningful diagnostics when
+ // the stack pointer has been corrupted. So in such cases (i.e., when taking
+ // synchronous exceptions), this macro is expanded with \sp set to SP0, in
+ // which case we switch to the SP_EL0 stack pointer, which has been
+ // initialized to point to a buffer that has been set aside for this purpose.
+ //
+ // Since 'sp' may no longer refer to the stack frame that was active when
+ // the exception was taken, we may have to switch back and forth between
+ // SP_EL0 and SP_ELx to record the correct value for SP in the context struct.
+ //
+ .ifnc \sp, SPx
+ msr SPsel, xzr
+ .endif
+
+ // Move the stackpointer so we can reach our structure with the str instruction.
+ sub sp, sp, #(FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE)
+
+ // Push the GP registers so we can record the exception context
+ stp x0, x1, [sp, #-GP_CONTEXT_SIZE]!
+ stp x2, x3, [sp, #0x10]
+ stp x4, x5, [sp, #0x20]
+ stp x6, x7, [sp, #0x30]
+ stp x8, x9, [sp, #0x40]
+ stp x10, x11, [sp, #0x50]
+ stp x12, x13, [sp, #0x60]
+ stp x14, x15, [sp, #0x70]
+ stp x16, x17, [sp, #0x80]
+ stp x18, x19, [sp, #0x90]
+ stp x20, x21, [sp, #0xa0]
+ stp x22, x23, [sp, #0xb0]
+ stp x24, x25, [sp, #0xc0]
+ stp x26, x27, [sp, #0xd0]
+ stp x28, x29, [sp, #0xe0]
+ add x28, sp, #(GP_CONTEXT_SIZE + FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE)
+
+ .ifnc \sp, SPx
+ msr SPsel, #1
+ mov x7, sp
+ msr SPsel, xzr
+ .else
+ mov x7, x28
+ .endif
+
+ stp x30, x7, [sp, #0xf0]
+
+ // Record the type of exception that occurred.
+ mov x0, #\val
+
+ // Jump to our general handler to deal with all the common parts and process the exception.
+#if defined(ARM_RELOCATE_VECTORS)
+ ldr x1, =ASM_PFX(CommonExceptionEntry)
+ br x1
+ .ltorg
+#else
+ b ASM_PFX(CommonExceptionEntry)
+#endif
+ .endm
+
+//
+// Current EL with SP0 : 0x0 - 0x180
+//
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_SYNC)
+ASM_PFX(SynchronousExceptionSP0):
+ ExceptionEntry EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_IRQ)
+ASM_PFX(IrqSP0):
+ ExceptionEntry EXCEPT_AARCH64_IRQ
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_FIQ)
+ASM_PFX(FiqSP0):
+ ExceptionEntry EXCEPT_AARCH64_FIQ
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_SERR)
+ASM_PFX(SErrorSP0):
+ ExceptionEntry EXCEPT_AARCH64_SERROR
+
+//
+// Current EL with SPx: 0x200 - 0x380
+//
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_SYNC)
+ASM_PFX(SynchronousExceptionSPx):
+ ExceptionEntry EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS, SP0
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_IRQ)
+ASM_PFX(IrqSPx):
+ ExceptionEntry EXCEPT_AARCH64_IRQ
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_FIQ)
+ASM_PFX(FiqSPx):
+ ExceptionEntry EXCEPT_AARCH64_FIQ
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_SERR)
+ASM_PFX(SErrorSPx):
+ ExceptionEntry EXCEPT_AARCH64_SERROR
+
+//
+// Lower EL using AArch64 : 0x400 - 0x580
+//
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_SYNC)
+ASM_PFX(SynchronousExceptionA64):
+ ExceptionEntry EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_IRQ)
+ASM_PFX(IrqA64):
+ ExceptionEntry EXCEPT_AARCH64_IRQ
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_FIQ)
+ASM_PFX(FiqA64):
+ ExceptionEntry EXCEPT_AARCH64_FIQ
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_SERR)
+ASM_PFX(SErrorA64):
+ ExceptionEntry EXCEPT_AARCH64_SERROR
+
+//
+// Lower EL using AArch32 : 0x600 - 0x780
+//
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_SYNC)
+ASM_PFX(SynchronousExceptionA32):
+ ExceptionEntry EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_IRQ)
+ASM_PFX(IrqA32):
+ ExceptionEntry EXCEPT_AARCH64_IRQ
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_FIQ)
+ASM_PFX(FiqA32):
+ ExceptionEntry EXCEPT_AARCH64_FIQ
+
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_SERR)
+ASM_PFX(SErrorA32):
+ ExceptionEntry EXCEPT_AARCH64_SERROR
+
+VECTOR_END(ExceptionHandlersStart)
+
+ASM_PFX(ExceptionHandlersEnd):
+
+
+ASM_PFX(CommonExceptionEntry):
+
+ EL1_OR_EL2_OR_EL3(x1)
+1:mrs x2, elr_el1 // Exception Link Register
+ mrs x3, spsr_el1 // Saved Processor Status Register 32bit
+ mrs x5, esr_el1 // EL1 Exception syndrome register 32bit
+ mrs x6, far_el1 // EL1 Fault Address Register
+ b 4f
+
+2:mrs x2, elr_el2 // Exception Link Register
+ mrs x3, spsr_el2 // Saved Processor Status Register 32bit
+ mrs x5, esr_el2 // EL2 Exception syndrome register 32bit
+ mrs x6, far_el2 // EL2 Fault Address Register
+ b 4f
+
+3:mrs x2, elr_el3 // Exception Link Register
+ mrs x3, spsr_el3 // Saved Processor Status Register 32bit
+ mrs x5, esr_el3 // EL3 Exception syndrome register 32bit
+ mrs x6, far_el3 // EL3 Fault Address Register
+
+4:mrs x4, fpsr // Floating point Status Register 32bit
+
+ // Save the SYS regs
+ stp x2, x3, [x28, #-SYS_CONTEXT_SIZE]!
+ stp x4, x5, [x28, #0x10]
+ str x6, [x28, #0x20]
+
+ // Push FP regs to Stack.
+ stp q0, q1, [x28, #-FP_CONTEXT_SIZE]!
+ stp q2, q3, [x28, #0x20]
+ stp q4, q5, [x28, #0x40]
+ stp q6, q7, [x28, #0x60]
+ stp q8, q9, [x28, #0x80]
+ stp q10, q11, [x28, #0xa0]
+ stp q12, q13, [x28, #0xc0]
+ stp q14, q15, [x28, #0xe0]
+ stp q16, q17, [x28, #0x100]
+ stp q18, q19, [x28, #0x120]
+ stp q20, q21, [x28, #0x140]
+ stp q22, q23, [x28, #0x160]
+ stp q24, q25, [x28, #0x180]
+ stp q26, q27, [x28, #0x1a0]
+ stp q28, q29, [x28, #0x1c0]
+ stp q30, q31, [x28, #0x1e0]
+
+ // x0 still holds the exception type.
+ // Set x1 to point to the top of our struct on the Stack
+ mov x1, sp
+
+// CommonCExceptionHandler (
+// IN EFI_EXCEPTION_TYPE ExceptionType, R0
+// IN OUT EFI_SYSTEM_CONTEXT SystemContext R1
+// )
+
+ // Call the handler as defined above
+
+ // For now we spin in the handler if we received an abort of some kind.
+ // We do not try to recover.
+ bl ASM_PFX(CommonCExceptionHandler) // Call exception handler
+
+ // Pop as many GP regs as we can before entering the critical section below
+ ldp x2, x3, [sp, #0x10]
+ ldp x4, x5, [sp, #0x20]
+ ldp x6, x7, [sp, #0x30]
+ ldp x8, x9, [sp, #0x40]
+ ldp x10, x11, [sp, #0x50]
+ ldp x12, x13, [sp, #0x60]
+ ldp x14, x15, [sp, #0x70]
+ ldp x16, x17, [sp, #0x80]
+ ldp x18, x19, [sp, #0x90]
+ ldp x20, x21, [sp, #0xa0]
+ ldp x22, x23, [sp, #0xb0]
+ ldp x24, x25, [sp, #0xc0]
+ ldp x26, x27, [sp, #0xd0]
+ ldp x0, x1, [sp], #0xe0
+
+ // Pop FP regs from Stack.
+ ldp q2, q3, [x28, #0x20]
+ ldp q4, q5, [x28, #0x40]
+ ldp q6, q7, [x28, #0x60]
+ ldp q8, q9, [x28, #0x80]
+ ldp q10, q11, [x28, #0xa0]
+ ldp q12, q13, [x28, #0xc0]
+ ldp q14, q15, [x28, #0xe0]
+ ldp q16, q17, [x28, #0x100]
+ ldp q18, q19, [x28, #0x120]
+ ldp q20, q21, [x28, #0x140]
+ ldp q22, q23, [x28, #0x160]
+ ldp q24, q25, [x28, #0x180]
+ ldp q26, q27, [x28, #0x1a0]
+ ldp q28, q29, [x28, #0x1c0]
+ ldp q30, q31, [x28, #0x1e0]
+ ldp q0, q1, [x28], #FP_CONTEXT_SIZE
+
+ // Pop the SYS regs we need
+ ldp x29, x30, [x28]
+ ldr x28, [x28, #0x10]
+ msr fpsr, x28
+
+ //
+ // Disable interrupt(IRQ and FIQ) before restoring context,
+ // or else the context will be corrupted by interrupt reentrance.
+ // Interrupt mask will be restored from spsr by hardware when we call eret
+ //
+ msr daifset, #3
+ isb
+
+ EL1_OR_EL2_OR_EL3(x28)
+1:msr elr_el1, x29 // Exception Link Register
+ msr spsr_el1, x30 // Saved Processor Status Register 32bit
+ b 4f
+2:msr elr_el2, x29 // Exception Link Register
+ msr spsr_el2, x30 // Saved Processor Status Register 32bit
+ b 4f
+3:msr elr_el3, x29 // Exception Link Register
+ msr spsr_el3, x30 // Saved Processor Status Register 32bit
+4:
+
+ // pop remaining GP regs and return from exception.
+ ldr x30, [sp, #0xf0 - 0xe0]
+ ldp x28, x29, [sp], #GP_CONTEXT_SIZE - 0xe0
+
+ // Adjust SP to be where we started from when we came into the handler.
+ // The handler can not change the SP.
+ add sp, sp, #FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE
+
+ eret
+
+ASM_PFX(RegisterEl0Stack):
+ msr sp_el0, x0
+ ret
diff --git a/roms/edk2/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c b/roms/edk2/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c new file mode 100644 index 000000000..36c9f3f92 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c @@ -0,0 +1,44 @@ +/** @file
+* Exception handling support specific for ARM
+*
+* Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+* Copyright (c) 2014, ARM Limited. All rights reserved.<BR>
+* Copyright (c) 2016 HP Development Company, L.P.<BR>
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+
+#include <Chipset/ArmV7.h>
+
+#include <Library/ArmLib.h>
+
+#include <Protocol/DebugSupport.h> // for MAX_ARM_EXCEPTION
+
+UINTN gMaxExceptionNumber = MAX_ARM_EXCEPTION;
+EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_ARM_EXCEPTION + 1] = { 0 };
+EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[MAX_ARM_EXCEPTION + 1] = { 0 };
+PHYSICAL_ADDRESS gExceptionVectorAlignmentMask = ARM_VECTOR_TABLE_ALIGNMENT;
+
+// Exception handler contains branch to vector location (jmp $) so no handler
+// NOTE: This code assumes vectors are ARM and not Thumb code
+UINTN gDebuggerNoHandlerValue = 0xEAFFFFFE;
+
+RETURN_STATUS ArchVectorConfig(
+ IN UINTN VectorBaseAddress
+ )
+{
+ // if the vector address corresponds to high vectors
+ if (VectorBaseAddress == 0xFFFF0000) {
+ // set SCTLR.V to enable high vectors
+ ArmSetHighVectors();
+ }
+ else {
+ // Set SCTLR.V to 0 to enable VBAR to be used
+ ArmSetLowVectors();
+ }
+
+ return RETURN_SUCCESS;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S b/roms/edk2/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S new file mode 100644 index 000000000..d9ad77593 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S @@ -0,0 +1,299 @@ +#------------------------------------------------------------------------------
+#
+# Use ARMv6 instruction to operate on a single stack
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2014, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2016 HP Development Company, L.P.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <Library/PcdLib.h>
+
+/*
+
+This is the stack constructed by the exception handler (low address to high address)
+ # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM
+ Reg Offset
+ === ======
+ R0 0x00 # stmfd SP!,{R0-R12}
+ R1 0x04
+ R2 0x08
+ R3 0x0c
+ R4 0x10
+ R5 0x14
+ R6 0x18
+ R7 0x1c
+ R8 0x20
+ R9 0x24
+ R10 0x28
+ R11 0x2c
+ R12 0x30
+ SP 0x34 # reserved via subtraction 0x20 (32) from SP
+ LR 0x38
+ PC 0x3c
+ CPSR 0x40
+ DFSR 0x44
+ DFAR 0x48
+ IFSR 0x4c
+ IFAR 0x50
+
+ LR 0x54 # SVC Link register (we need to restore it)
+
+ LR 0x58 # pushed by srsfd
+ CPSR 0x5c
+
+ */
+
+
+GCC_ASM_EXPORT(ExceptionHandlersStart)
+GCC_ASM_EXPORT(ExceptionHandlersEnd)
+GCC_ASM_EXPORT(CommonExceptionEntry)
+GCC_ASM_EXPORT(AsmCommonExceptionEntry)
+GCC_ASM_EXPORT(CommonCExceptionHandler)
+
+.text
+.syntax unified
+#if !defined(__APPLE__)
+.fpu neon @ makes vpush/vpop assemble
+#endif
+.align 5
+
+
+//
+// This code gets copied to the ARM vector table
+// ExceptionHandlersStart - ExceptionHandlersEnd gets copied
+//
+ASM_PFX(ExceptionHandlersStart):
+
+ASM_PFX(Reset):
+ b ASM_PFX(ResetEntry)
+
+ASM_PFX(UndefinedInstruction):
+ b ASM_PFX(UndefinedInstructionEntry)
+
+ASM_PFX(SoftwareInterrupt):
+ b ASM_PFX(SoftwareInterruptEntry)
+
+ASM_PFX(PrefetchAbort):
+ b ASM_PFX(PrefetchAbortEntry)
+
+ASM_PFX(DataAbort):
+ b ASM_PFX(DataAbortEntry)
+
+ASM_PFX(ReservedException):
+ b ASM_PFX(ReservedExceptionEntry)
+
+ASM_PFX(Irq):
+ b ASM_PFX(IrqEntry)
+
+ASM_PFX(Fiq):
+ b ASM_PFX(FiqEntry)
+
+ASM_PFX(ResetEntry):
+ srsdb #0x13! @ Store return state on SVC stack
+ @ We are already in SVC mode
+
+ stmfd SP!,{LR} @ Store the link register for the current mode
+ sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} @ Store the register state
+
+ mov R0,#0 @ ExceptionType
+ ldr R1,ASM_PFX(CommonExceptionEntry)
+ bx R1
+
+ASM_PFX(UndefinedInstructionEntry):
+ sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry
+ srsdb #0x13! @ Store return state on SVC stack
+ cps #0x13 @ Switch to SVC for common stack
+ stmfd SP!,{LR} @ Store the link register for the current mode
+ sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} @ Store the register state
+
+ mov R0,#1 @ ExceptionType
+ ldr R1,ASM_PFX(CommonExceptionEntry)
+ bx R1
+
+ASM_PFX(SoftwareInterruptEntry):
+ srsdb #0x13! @ Store return state on SVC stack
+ @ We are already in SVC mode
+ stmfd SP!,{LR} @ Store the link register for the current mode
+ sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} @ Store the register state
+
+ mov R0,#2 @ ExceptionType
+ ldr R1,ASM_PFX(CommonExceptionEntry)
+ bx R1
+
+ASM_PFX(PrefetchAbortEntry):
+ sub LR,LR,#4
+ srsdb #0x13! @ Store return state on SVC stack
+ cps #0x13 @ Switch to SVC for common stack
+ stmfd SP!,{LR} @ Store the link register for the current mode
+ sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} @ Store the register state
+
+ mov R0,#3 @ ExceptionType
+ ldr R1,ASM_PFX(CommonExceptionEntry)
+ bx R1
+
+ASM_PFX(DataAbortEntry):
+ sub LR,LR,#8
+ srsdb #0x13! @ Store return state on SVC stack
+ cps #0x13 @ Switch to SVC for common stack
+ stmfd SP!,{LR} @ Store the link register for the current mode
+ sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} @ Store the register state
+
+ mov R0,#4
+ ldr R1,ASM_PFX(CommonExceptionEntry)
+ bx R1
+
+ASM_PFX(ReservedExceptionEntry):
+ srsdb #0x13! @ Store return state on SVC stack
+ cps #0x13 @ Switch to SVC for common stack
+ stmfd SP!,{LR} @ Store the link register for the current mode
+ sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} @ Store the register state
+
+ mov R0,#5
+ ldr R1,ASM_PFX(CommonExceptionEntry)
+ bx R1
+
+ASM_PFX(IrqEntry):
+ sub LR,LR,#4
+ srsdb #0x13! @ Store return state on SVC stack
+ cps #0x13 @ Switch to SVC for common stack
+ stmfd SP!,{LR} @ Store the link register for the current mode
+ sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} @ Store the register state
+
+ mov R0,#6 @ ExceptionType
+ ldr R1,ASM_PFX(CommonExceptionEntry)
+ bx R1
+
+ASM_PFX(FiqEntry):
+ sub LR,LR,#4
+ srsdb #0x13! @ Store return state on SVC stack
+ cps #0x13 @ Switch to SVC for common stack
+ stmfd SP!,{LR} @ Store the link register for the current mode
+ sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} @ Store the register state
+ @ Since we have already switch to SVC R8_fiq - R12_fiq
+ @ never get used or saved
+ mov R0,#7 @ ExceptionType
+ ldr R1,ASM_PFX(CommonExceptionEntry)
+ bx R1
+
+//
+// This gets patched by the C code that patches in the vector table
+//
+ASM_PFX(CommonExceptionEntry):
+ .word ASM_PFX(AsmCommonExceptionEntry)
+
+ASM_PFX(ExceptionHandlersEnd):
+
+//
+// This code runs from CpuDxe driver loaded address. It is patched into
+// CommonExceptionEntry.
+//
+ASM_PFX(AsmCommonExceptionEntry):
+ mrc p15, 0, R1, c6, c0, 2 @ Read IFAR
+ str R1, [SP, #0x50] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR
+
+ mrc p15, 0, R1, c5, c0, 1 @ Read IFSR
+ str R1, [SP, #0x4c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR
+
+ mrc p15, 0, R1, c6, c0, 0 @ Read DFAR
+ str R1, [SP, #0x48] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR
+
+ mrc p15, 0, R1, c5, c0, 0 @ Read DFSR
+ str R1, [SP, #0x44] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR
+
+ ldr R1, [SP, #0x5c] @ srsdb saved pre-exception CPSR on the stack
+ str R1, [SP, #0x40] @ Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR
+
+ add R2, SP, #0x38 @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
+ and R3, R1, #0x1f @ Check CPSR to see if User or System Mode
+ cmp R3, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1f))
+ cmpne R3, #0x10 @
+ stmdaeq R2, {lr}^ @ save unbanked lr
+ @ else
+ stmdane R2, {lr} @ save SVC lr
+
+
+ ldr R5, [SP, #0x58] @ PC is the LR pushed by srsfd
+ @ Check to see if we have to adjust for Thumb entry
+ sub r4, r0, #1 @ if (ExceptionType == 1 || ExceptionType == 2)) {
+ cmp r4, #1 @ // UND & SVC have different LR adjust for Thumb
+ bhi NoAdjustNeeded
+
+ tst r1, #0x20 @ if ((CPSR & T)) == T) { // Thumb Mode on entry
+ addne R5, R5, #2 @ PC += 2;
+ strne R5,[SP,#0x58] @ Update LR value pushed by srsfd
+
+NoAdjustNeeded:
+
+ str R5, [SP, #0x3c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.PC
+
+ add R1, SP, #0x60 @ We pushed 0x60 bytes on the stack
+ str R1, [SP, #0x34] @ Store it in EFI_SYSTEM_CONTEXT_ARM.SP
+
+ @ R0 is ExceptionType
+ mov R1,SP @ R1 is SystemContext
+
+#if (FixedPcdGet32(PcdVFPEnabled))
+ vpush {d0-d15} @ save vstm registers in case they are used in optimizations
+#endif
+
+ mov R4, SP @ Save current SP
+ tst R4, #4
+ subne SP, SP, #4 @ Adjust SP if not 8-byte aligned
+
+/*
+VOID
+EFIAPI
+CommonCExceptionHandler (
+ IN EFI_EXCEPTION_TYPE ExceptionType, R0
+ IN OUT EFI_SYSTEM_CONTEXT SystemContext R1
+ )
+
+*/
+ blx ASM_PFX(CommonCExceptionHandler) @ Call exception handler
+
+ mov SP, R4 @ Restore SP
+
+#if (FixedPcdGet32(PcdVFPEnabled))
+ vpop {d0-d15}
+#endif
+
+ ldr R1, [SP, #0x4c] @ Restore EFI_SYSTEM_CONTEXT_ARM.IFSR
+ mcr p15, 0, R1, c5, c0, 1 @ Write IFSR
+
+ ldr R1, [SP, #0x44] @ Restore EFI_SYSTEM_CONTEXT_ARM.DFSR
+ mcr p15, 0, R1, c5, c0, 0 @ Write DFSR
+
+ ldr R1,[SP,#0x3c] @ EFI_SYSTEM_CONTEXT_ARM.PC
+ str R1,[SP,#0x58] @ Store it back to srsfd stack slot so it can be restored
+
+ ldr R1,[SP,#0x40] @ EFI_SYSTEM_CONTEXT_ARM.CPSR
+ str R1,[SP,#0x5c] @ Store it back to srsfd stack slot so it can be restored
+
+ add R3, SP, #0x54 @ Make R3 point to SVC LR saved on entry
+ add R2, SP, #0x38 @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
+ and R1, R1, #0x1f @ Check to see if User or System Mode
+ cmp R1, #0x1f @ if ((CPSR == 0x10) || (CPSR == 0x1f))
+ cmpne R1, #0x10 @
+ ldmibeq R2, {lr}^ @ restore unbanked lr
+ @ else
+ ldmibne R3, {lr} @ restore SVC lr, via ldmfd SP!, {LR}
+
+ ldmfd SP!,{R0-R12} @ Restore general purpose registers
+ @ Exception handler can not change SP
+
+ add SP,SP,#0x20 @ Clear out the remaining stack space
+ ldmfd SP!,{LR} @ restore the link register for this context
+ rfefd SP! @ return from exception via srsfd stack slot
+
diff --git a/roms/edk2/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.asm b/roms/edk2/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.asm new file mode 100644 index 000000000..aa0229d2e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.asm @@ -0,0 +1,296 @@ +//------------------------------------------------------------------------------
+//
+// Use ARMv6 instruction to operate on a single stack
+//
+// Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+// Copyright (c) 2014, ARM Limited. All rights reserved.<BR>
+// Copyright (c) 2016 HP Development Company, L.P.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+#include <Library/PcdLib.h>
+
+/*
+
+This is the stack constructed by the exception handler (low address to high address)
+ # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM
+ Reg Offset
+ === ======
+ R0 0x00 # stmfd SP!,{R0-R12}
+ R1 0x04
+ R2 0x08
+ R3 0x0c
+ R4 0x10
+ R5 0x14
+ R6 0x18
+ R7 0x1c
+ R8 0x20
+ R9 0x24
+ R10 0x28
+ R11 0x2c
+ R12 0x30
+ SP 0x34 # reserved via subtraction 0x20 (32) from SP
+ LR 0x38
+ PC 0x3c
+ CPSR 0x40
+ DFSR 0x44
+ DFAR 0x48
+ IFSR 0x4c
+ IFAR 0x50
+
+ LR 0x54 # SVC Link register (we need to restore it)
+
+ LR 0x58 # pushed by srsfd
+ CPSR 0x5c
+
+ */
+
+
+ EXPORT ExceptionHandlersStart
+ EXPORT ExceptionHandlersEnd
+ EXPORT CommonExceptionEntry
+ EXPORT AsmCommonExceptionEntry
+ IMPORT CommonCExceptionHandler
+
+ PRESERVE8
+ AREA DxeExceptionHandlers, CODE, READONLY, CODEALIGN, ALIGN=5
+
+//
+// This code gets copied to the ARM vector table
+// ExceptionHandlersStart - ExceptionHandlersEnd gets copied
+//
+ExceptionHandlersStart
+
+Reset
+ b ResetEntry
+
+UndefinedInstruction
+ b UndefinedInstructionEntry
+
+SoftwareInterrupt
+ b SoftwareInterruptEntry
+
+PrefetchAbort
+ b PrefetchAbortEntry
+
+DataAbort
+ b DataAbortEntry
+
+ReservedException
+ b ReservedExceptionEntry
+
+Irq
+ b IrqEntry
+
+Fiq
+ b FiqEntry
+
+ResetEntry
+ srsfd #0x13! ; Store return state on SVC stack
+ ; We are already in SVC mode
+ stmfd SP!,{LR} ; Store the link register for the current mode
+ sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} ; Store the register state
+
+ mov R0,#0 ; ExceptionType
+ ldr R1,CommonExceptionEntry
+ bx R1
+
+UndefinedInstructionEntry
+ sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry
+ srsfd #0x13! ; Store return state on SVC stack
+ cps #0x13 ; Switch to SVC for common stack
+ stmfd SP!,{LR} ; Store the link register for the current mode
+ sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} ; Store the register state
+
+ mov R0,#1 ; ExceptionType
+ ldr R1,CommonExceptionEntry;
+ bx R1
+
+SoftwareInterruptEntry
+ srsfd #0x13! ; Store return state on SVC stack
+ ; We are already in SVC mode
+ stmfd SP!,{LR} ; Store the link register for the current mode
+ sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} ; Store the register state
+
+ mov R0,#2 ; ExceptionType
+ ldr R1,CommonExceptionEntry
+ bx R1
+
+PrefetchAbortEntry
+ sub LR,LR,#4
+ srsfd #0x13! ; Store return state on SVC stack
+ cps #0x13 ; Switch to SVC for common stack
+ stmfd SP!,{LR} ; Store the link register for the current mode
+ sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} ; Store the register state
+
+ mov R0,#3 ; ExceptionType
+ ldr R1,CommonExceptionEntry
+ bx R1
+
+DataAbortEntry
+ sub LR,LR,#8
+ srsfd #0x13! ; Store return state on SVC stack
+ cps #0x13 ; Switch to SVC for common stack
+ stmfd SP!,{LR} ; Store the link register for the current mode
+ sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} ; Store the register state
+
+ mov R0,#4 ; ExceptionType
+ ldr R1,CommonExceptionEntry
+ bx R1
+
+ReservedExceptionEntry
+ srsfd #0x13! ; Store return state on SVC stack
+ cps #0x13 ; Switch to SVC for common stack
+ stmfd SP!,{LR} ; Store the link register for the current mode
+ sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} ; Store the register state
+
+ mov R0,#5 ; ExceptionType
+ ldr R1,CommonExceptionEntry
+ bx R1
+
+IrqEntry
+ sub LR,LR,#4
+ srsfd #0x13! ; Store return state on SVC stack
+ cps #0x13 ; Switch to SVC for common stack
+ stmfd SP!,{LR} ; Store the link register for the current mode
+ sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} ; Store the register state
+
+ mov R0,#6 ; ExceptionType
+ ldr R1,CommonExceptionEntry
+ bx R1
+
+FiqEntry
+ sub LR,LR,#4
+ srsfd #0x13! ; Store return state on SVC stack
+ cps #0x13 ; Switch to SVC for common stack
+ stmfd SP!,{LR} ; Store the link register for the current mode
+ sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
+ stmfd SP!,{R0-R12} ; Store the register state
+ ; Since we have already switch to SVC R8_fiq - R12_fiq
+ ; never get used or saved
+ mov R0,#7 ; ExceptionType
+ ldr R1,CommonExceptionEntry
+ bx R1
+
+//
+// This gets patched by the C code that patches in the vector table
+//
+CommonExceptionEntry
+ dcd AsmCommonExceptionEntry
+
+ExceptionHandlersEnd
+
+//
+// This code runs from CpuDxe driver loaded address. It is patched into
+// CommonExceptionEntry.
+//
+AsmCommonExceptionEntry
+ mrc p15, 0, R1, c6, c0, 2 ; Read IFAR
+ str R1, [SP, #0x50] ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR
+
+ mrc p15, 0, R1, c5, c0, 1 ; Read IFSR
+ str R1, [SP, #0x4c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR
+
+ mrc p15, 0, R1, c6, c0, 0 ; Read DFAR
+ str R1, [SP, #0x48] ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR
+
+ mrc p15, 0, R1, c5, c0, 0 ; Read DFSR
+ str R1, [SP, #0x44] ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR
+
+ ldr R1, [SP, #0x5c] ; srsfd saved pre-exception CPSR on the stack
+ str R1, [SP, #0x40] ; Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR
+
+ add R2, SP, #0x38 ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
+ and R3, R1, #0x1f ; Check CPSR to see if User or System Mode
+ cmp R3, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1f))
+ cmpne R3, #0x10 ;
+ stmeqed R2, {lr}^ ; save unbanked lr
+ ; else
+ stmneed R2, {lr} ; save SVC lr
+
+
+ ldr R5, [SP, #0x58] ; PC is the LR pushed by srsfd
+ ; Check to see if we have to adjust for Thumb entry
+ sub r4, r0, #1 ; if (ExceptionType == 1 || ExceptionType == 2)) {
+ cmp r4, #1 ; // UND & SVC have different LR adjust for Thumb
+ bhi NoAdjustNeeded
+
+ tst r1, #0x20 ; if ((CPSR & T)) == T) { // Thumb Mode on entry
+ addne R5, R5, #2 ; PC += 2;
+ strne R5,[SP,#0x58] ; Update LR value pushed by srsfd
+
+NoAdjustNeeded
+
+ str R5, [SP, #0x3c] ; Store it in EFI_SYSTEM_CONTEXT_ARM.PC
+
+ add R1, SP, #0x60 ; We pushed 0x60 bytes on the stack
+ str R1, [SP, #0x34] ; Store it in EFI_SYSTEM_CONTEXT_ARM.SP
+
+ ; R0 is ExceptionType
+ mov R1,SP ; R1 is SystemContext
+
+#if (FixedPcdGet32(PcdVFPEnabled))
+ vpush {d0-d15} ; save vstm registers in case they are used in optimizations
+#endif
+
+ mov R4, SP ; Save current SP
+ tst R4, #4
+ subne SP, SP, #4 ; Adjust SP if not 8-byte aligned
+
+/*
+VOID
+EFIAPI
+CommonCExceptionHandler (
+ IN EFI_EXCEPTION_TYPE ExceptionType, R0
+ IN OUT EFI_SYSTEM_CONTEXT SystemContext R1
+ )
+
+*/
+ blx CommonCExceptionHandler ; Call exception handler
+
+ mov SP, R4 ; Restore SP
+
+#if (FixedPcdGet32(PcdVFPEnabled))
+ vpop {d0-d15}
+#endif
+
+ ldr R1, [SP, #0x4c] ; Restore EFI_SYSTEM_CONTEXT_ARM.IFSR
+ mcr p15, 0, R1, c5, c0, 1 ; Write IFSR
+
+ ldr R1, [SP, #0x44] ; Restore EFI_SYSTEM_CONTEXT_ARM.DFSR
+ mcr p15, 0, R1, c5, c0, 0 ; Write DFSR
+
+ ldr R1,[SP,#0x3c] ; EFI_SYSTEM_CONTEXT_ARM.PC
+ str R1,[SP,#0x58] ; Store it back to srsfd stack slot so it can be restored
+
+ ldr R1,[SP,#0x40] ; EFI_SYSTEM_CONTEXT_ARM.CPSR
+ str R1,[SP,#0x5c] ; Store it back to srsfd stack slot so it can be restored
+
+ add R3, SP, #0x54 ; Make R3 point to SVC LR saved on entry
+ add R2, SP, #0x38 ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
+ and R1, R1, #0x1f ; Check to see if User or System Mode
+ cmp R1, #0x1f ; if ((CPSR == 0x10) || (CPSR == 0x1f))
+ cmpne R1, #0x10 ;
+ ldmeqed R2, {lr}^ ; restore unbanked lr
+ ; else
+ ldmneed R3, {lr} ; restore SVC lr, via ldmfd SP!, {LR}
+
+ ldmfd SP!,{R0-R12} ; Restore general purpose registers
+ ; Exception handler can not change SP
+
+ add SP,SP,#0x20 ; Clear out the remaining stack space
+ ldmfd SP!,{LR} ; restore the link register for this context
+ rfefd SP! ; return from exception via srsfd stack slot
+
+ END
+
+
diff --git a/roms/edk2/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c b/roms/edk2/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c new file mode 100644 index 000000000..1ff90dede --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c @@ -0,0 +1,349 @@ +/* @file
+* Main file supporting the SEC Phase for Versatile Express
+*
+* Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+* Copyright (c) 2016 HP Development Company, L.P.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+#include <Library/CpuExceptionHandlerLib.h>
+
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DefaultExceptionHandlerLib.h>
+
+STATIC
+RETURN_STATUS
+CopyExceptionHandlers(
+ IN PHYSICAL_ADDRESS BaseAddress
+ );
+
+EFI_STATUS
+EFIAPI
+RegisterExceptionHandler(
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
+ );
+
+VOID
+ExceptionHandlersStart(
+ VOID
+ );
+
+VOID
+ExceptionHandlersEnd(
+ VOID
+ );
+
+RETURN_STATUS ArchVectorConfig(
+ IN UINTN VectorBaseAddress
+ );
+
+// these globals are provided by the architecture specific source (Arm or AArch64)
+extern UINTN gMaxExceptionNumber;
+extern EFI_EXCEPTION_CALLBACK gExceptionHandlers[];
+extern EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[];
+extern PHYSICAL_ADDRESS gExceptionVectorAlignmentMask;
+extern UINTN gDebuggerNoHandlerValue;
+
+// A compiler flag adjusts the compilation of this library to a variant where
+// the vectors are relocated (copied) to another location versus using the
+// vectors in-place. Since this effects an assembly .align directive we must
+// address this at library build time. Since this affects the build of the
+// library we cannot represent this in a PCD since PCDs are evaluated on
+// a per-module basis.
+#if defined(ARM_RELOCATE_VECTORS)
+STATIC CONST BOOLEAN gArmRelocateVectorTable = TRUE;
+#else
+STATIC CONST BOOLEAN gArmRelocateVectorTable = FALSE;
+#endif
+
+
+/**
+Initializes all CPU exceptions entries and provides the default exception handlers.
+
+Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
+persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
+If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
+If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
+
+@param[in] VectorInfo Pointer to reserved vector list.
+
+@retval EFI_SUCCESS CPU Exception Entries have been successfully initialized
+with default exception handlers.
+@retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
+@retval EFI_UNSUPPORTED This function is not supported.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeCpuExceptionHandlers(
+ IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
+ )
+{
+ RETURN_STATUS Status;
+ UINTN VectorBase;
+
+ Status = EFI_SUCCESS;
+
+ // if we are requested to copy exception handlers to another location
+ if (gArmRelocateVectorTable) {
+
+ VectorBase = PcdGet64(PcdCpuVectorBaseAddress);
+ Status = CopyExceptionHandlers(VectorBase);
+
+ }
+ else { // use VBAR to point to where our exception handlers are
+
+ // The vector table must be aligned for the architecture. If this
+ // assertion fails ensure the appropriate FFS alignment is in effect,
+ // which can be accomplished by ensuring the proper Align=X statement
+ // in the platform packaging rules. For ARM Align=32 is required and
+ // for AArch64 Align=4K is required. Align=Auto can be used but this
+ // is known to cause an issue with populating the reset vector area
+ // for encapsulated FVs.
+ ASSERT(((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0);
+
+ // We do not copy the Exception Table at PcdGet64(PcdCpuVectorBaseAddress). We just set Vector
+ // Base Address to point into CpuDxe code.
+ VectorBase = (UINTN)ExceptionHandlersStart;
+
+ Status = RETURN_SUCCESS;
+ }
+
+ if (!RETURN_ERROR(Status)) {
+ // call the architecture-specific routine to prepare for the new vector
+ // configuration to take effect
+ ArchVectorConfig(VectorBase);
+
+ ArmWriteVBar(VectorBase);
+ }
+
+ return RETURN_SUCCESS;
+}
+
+/**
+Copies exception handlers to the specified address.
+
+Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
+persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
+If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
+If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
+
+@param[in] VectorInfo Pointer to reserved vector list.
+
+@retval EFI_SUCCESS CPU Exception Entries have been successfully initialized
+with default exception handlers.
+@retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
+@retval EFI_UNSUPPORTED This function is not supported.
+
+**/
+STATIC
+RETURN_STATUS
+CopyExceptionHandlers(
+ IN PHYSICAL_ADDRESS BaseAddress
+ )
+{
+ RETURN_STATUS Status;
+ UINTN Length;
+ UINTN Index;
+ UINT32 *VectorBase;
+
+ // ensure that the destination value specifies an address meeting the vector alignment requirements
+ ASSERT ((BaseAddress & gExceptionVectorAlignmentMask) == 0);
+
+ //
+ // Copy an implementation of the exception vectors to PcdCpuVectorBaseAddress.
+ //
+ Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart;
+
+ VectorBase = (UINT32 *)(UINTN)BaseAddress;
+
+ if (FeaturePcdGet(PcdDebuggerExceptionSupport) == TRUE) {
+ // Save existing vector table, in case debugger is already hooked in
+ CopyMem((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (EFI_EXCEPTION_CALLBACK)* (gMaxExceptionNumber+1));
+ }
+
+ // Copy our assembly code into the page that contains the exception vectors.
+ CopyMem((VOID *)VectorBase, (VOID *)ExceptionHandlersStart, Length);
+
+ //
+ // Initialize the C entry points for interrupts
+ //
+ for (Index = 0; Index <= gMaxExceptionNumber; Index++) {
+ if (!FeaturePcdGet(PcdDebuggerExceptionSupport) ||
+ (gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)gDebuggerNoHandlerValue)) {
+
+ Status = RegisterExceptionHandler(Index, NULL);
+ ASSERT_EFI_ERROR(Status);
+ }
+ else {
+ // If the debugger has already hooked put its vector back
+ VectorBase[Index] = (UINT32)(UINTN)gDebuggerExceptionHandlers[Index];
+ }
+ }
+
+ // Flush Caches since we updated executable stuff
+ InvalidateInstructionCacheRange((VOID *)(UINTN)BaseAddress, Length);
+
+ return RETURN_SUCCESS;
+}
+
+
+/**
+Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
+
+Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
+persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
+If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
+If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
+
+@param[in] VectorInfo Pointer to reserved vector list.
+
+@retval EFI_SUCCESS All CPU interrupt/exception entries have been successfully initialized
+with default interrupt/exception handlers.
+@retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
+@retval EFI_UNSUPPORTED This function is not supported.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeCpuInterruptHandlers(
+IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
+)
+{
+ // not needed, this is what the CPU driver is for
+ return EFI_UNSUPPORTED;
+}
+
+/**
+Registers a function to be called from the processor exception handler. (On ARM/AArch64 this only
+provides exception handlers, not interrupt handling which is provided through the Hardware Interrupt
+Protocol.)
+
+This function registers and enables the handler specified by ExceptionHandler for a processor
+interrupt or exception type specified by ExceptionType. If ExceptionHandler is NULL, then the
+handler for the processor interrupt or exception type specified by ExceptionType is uninstalled.
+The installed handler is called once for each processor interrupt or exception.
+NOTE: This function should be invoked after InitializeCpuExceptionHandlers() or
+InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED returned.
+
+@param[in] ExceptionType Defines which interrupt or exception to hook.
+@param[in] ExceptionHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
+when a processor interrupt occurs. If this parameter is NULL, then the handler
+will be uninstalled.
+
+@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
+@retval EFI_ALREADY_STARTED ExceptionHandler is not NULL, and a handler for ExceptionType was
+previously installed.
+@retval EFI_INVALID_PARAMETER ExceptionHandler is NULL, and a handler for ExceptionType was not
+previously installed.
+@retval EFI_UNSUPPORTED The interrupt specified by ExceptionType is not supported,
+or this function is not supported.
+**/
+RETURN_STATUS
+RegisterCpuInterruptHandler(
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN EFI_CPU_INTERRUPT_HANDLER ExceptionHandler
+ ) {
+ if (ExceptionType > gMaxExceptionNumber) {
+ return RETURN_UNSUPPORTED;
+ }
+
+ if ((ExceptionHandler != NULL) && (gExceptionHandlers[ExceptionType] != NULL)) {
+ return RETURN_ALREADY_STARTED;
+ }
+
+ gExceptionHandlers[ExceptionType] = ExceptionHandler;
+
+ return RETURN_SUCCESS;
+}
+
+/**
+Register exception handler.
+
+@param This A pointer to the SMM_CPU_SERVICE_PROTOCOL instance.
+@param ExceptionType Defines which interrupt or exception to hook. Type EFI_EXCEPTION_TYPE and
+the valid values for this parameter are defined in EFI_DEBUG_SUPPORT_PROTOCOL
+of the UEFI 2.0 specification.
+@param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER
+that is called when a processor interrupt occurs.
+If this parameter is NULL, then the handler will be uninstalled.
+
+@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
+@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was previously installed.
+@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not previously installed.
+@retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
+
+**/
+EFI_STATUS
+EFIAPI
+RegisterExceptionHandler(
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
+ )
+{
+ return RegisterCpuInterruptHandler(ExceptionType, InterruptHandler);
+}
+
+VOID
+EFIAPI
+CommonCExceptionHandler(
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN OUT EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ if (ExceptionType <= gMaxExceptionNumber) {
+ if (gExceptionHandlers[ExceptionType]) {
+ gExceptionHandlers[ExceptionType](ExceptionType, SystemContext);
+ return;
+ }
+ }
+ else {
+ DEBUG((EFI_D_ERROR, "Unknown exception type %d\n", ExceptionType));
+ ASSERT(FALSE);
+ }
+
+ DefaultExceptionHandler(ExceptionType, SystemContext);
+}
+
+/**
+ Initializes all CPU exceptions entries with optional extra initializations.
+
+ By default, this method should include all functionalities implemented by
+ InitializeCpuExceptionHandlers(), plus extra initialization works, if any.
+ This could be done by calling InitializeCpuExceptionHandlers() directly
+ in this method besides the extra works.
+
+ InitData is optional and its use and content are processor arch dependent.
+ The typical usage of it is to convey resources which have to be reserved
+ elsewhere and are necessary for the extra initializations of exception.
+
+ @param[in] VectorInfo Pointer to reserved vector list.
+ @param[in] InitData Pointer to data optional for extra initializations
+ of exception.
+
+ @retval EFI_SUCCESS The exceptions have been successfully
+ initialized.
+ @retval EFI_INVALID_PARAMETER VectorInfo or InitData contains invalid
+ content.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeCpuExceptionHandlersEx (
+ IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL,
+ IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL
+ )
+{
+ return InitializeCpuExceptionHandlers (VectorInfo);
+}
+
diff --git a/roms/edk2/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf b/roms/edk2/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf new file mode 100644 index 000000000..fdb9c24d2 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf @@ -0,0 +1,58 @@ +## @file
+# Instance of CpuExceptionHandlerLib Library for ARM/AArch64 architectures
+#
+# This library instance is used for modules that will implement exception
+# handlers in-place (by programming VBAR). The exception handlers will be
+# generated with alignment as required by the processor architecture. The
+# alignment must be propagated into the parent FFS/FV through FDF build rules
+# for the relevant module types (i.e. Align=Auto).
+#
+# Note that using this library instance can cause growth to the size of the FV
+# due to the padding added by the build tools to meet the vector alignment
+# requirements and may not be desirable for space-sensitive FVs (uncompressed /
+# XIP components). The alternative library instance, ArmRelocateExceptionLib
+# should be considered for these applications.
+#
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+# Copyright (c) 2016 HP Development Company, L.P.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmExceptionLib
+ FILE_GUID = A9796991-4E88-47F0-87C5-D96A1D270539
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = CpuExceptionHandlerLib
+
+[Sources.common]
+ ArmExceptionLib.c
+
+[Sources.Arm]
+ Arm/ArmException.c
+ Arm/ExceptionSupport.asm | RVCT
+ Arm/ExceptionSupport.S | GCC
+
+[Sources.AARCH64]
+ AArch64/AArch64Exception.c
+ AArch64/ExceptionSupport.S
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ ArmLib
+ BaseMemoryLib
+ CacheMaintenanceLib
+ DebugLib
+ DefaultExceptionHandlerLib
+ MemoryAllocationLib
+
+[Pcd]
+ gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
+ gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
diff --git a/roms/edk2/ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf b/roms/edk2/ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf new file mode 100644 index 000000000..ef1a43a27 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf @@ -0,0 +1,59 @@ +## @file
+# Instance of CpuExceptionHandlerLib Library for ARM/AArch64 architectures
+#
+# This library instance is used when exception vectors must be relocated to
+# a specific address. The address is specified by PcdCpuVectorBaseAddress.
+# Since the alignment requirement for in-place exception handlers causes
+# image size to increase, this instance is useful for modules that need to
+# minimize space used in their FV (like XIP modules). See ArmExceptionLib.inf
+# for the in-place exception handler alternative.
+#
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+# Copyright (c) 2016 HP Development Company, L.P.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmRelocateExceptionLib
+ FILE_GUID = 62AA447A-1FBA-429E-9E0D-CE0D2D8DCF58
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = CpuExceptionHandlerLib
+
+[Sources.common]
+ ArmExceptionLib.c
+
+[Sources.Arm]
+ Arm/ArmException.c
+ Arm/ExceptionSupport.asm | RVCT
+ Arm/ExceptionSupport.S | GCC
+
+[Sources.AARCH64]
+ AArch64/AArch64Exception.c
+ AArch64/ExceptionSupport.S
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ ArmLib
+ DebugLib
+ DefaultExceptionHandlerLib
+ BaseMemoryLib
+ CacheMaintenanceLib
+
+[Pcd]
+ gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
+ gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
+
+[BuildOptions]
+ # We must pass a define to specify that we are relocating vectors so the
+ # vector alignment is relaxed (space savings); note that this must be done
+ # as a define and not a PCD since it affects assembly directives.
+ *_*_*_PP_FLAGS = -DARM_RELOCATE_VECTORS
+ *_*_*_CC_FLAGS = -DARM_RELOCATE_VECTORS
diff --git a/roms/edk2/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.c b/roms/edk2/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.c new file mode 100644 index 000000000..a65113fad --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.c @@ -0,0 +1,127 @@ +/** @file
+
+ Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/ArmGenericTimerCounterLib.h>
+#include <Library/ArmLib.h>
+
+VOID
+EFIAPI
+ArmGenericTimerEnableTimer (
+ VOID
+ )
+{
+ UINTN TimerCtrlReg;
+
+ TimerCtrlReg = ArmReadCntpCtl ();
+ TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE;
+ ArmWriteCntpCtl (TimerCtrlReg);
+}
+
+VOID
+EFIAPI
+ArmGenericTimerReenableTimer (
+ VOID
+ )
+{
+}
+
+VOID
+EFIAPI
+ArmGenericTimerDisableTimer (
+ VOID
+ )
+{
+ UINTN TimerCtrlReg;
+
+ TimerCtrlReg = ArmReadCntpCtl ();
+ TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;
+ ArmWriteCntpCtl (TimerCtrlReg);
+}
+
+VOID
+EFIAPI
+ArmGenericTimerSetTimerFreq (
+ IN UINTN FreqInHz
+ )
+{
+ ArmWriteCntFrq (FreqInHz);
+}
+
+UINTN
+EFIAPI
+ArmGenericTimerGetTimerFreq (
+ VOID
+ )
+{
+ return ArmReadCntFrq ();
+}
+
+UINTN
+EFIAPI
+ArmGenericTimerGetTimerVal (
+ VOID
+ )
+{
+ return ArmReadCntpTval ();
+}
+
+
+VOID
+EFIAPI
+ArmGenericTimerSetTimerVal (
+ IN UINTN Value
+ )
+{
+ ArmWriteCntpTval (Value);
+}
+
+UINT64
+EFIAPI
+ArmGenericTimerGetSystemCount (
+ VOID
+ )
+{
+ return ArmReadCntPct ();
+}
+
+UINTN
+EFIAPI
+ArmGenericTimerGetTimerCtrlReg (
+ VOID
+ )
+{
+ return ArmReadCntpCtl ();
+}
+
+VOID
+EFIAPI
+ArmGenericTimerSetTimerCtrlReg (
+ UINTN Value
+ )
+{
+ ArmWriteCntpCtl (Value);
+}
+
+UINT64
+EFIAPI
+ArmGenericTimerGetCompareVal (
+ VOID
+ )
+{
+ return ArmReadCntpCval ();
+}
+
+VOID
+EFIAPI
+ArmGenericTimerSetCompareVal (
+ IN UINT64 Value
+ )
+{
+ ArmWriteCntpCval (Value);
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf b/roms/edk2/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf new file mode 100644 index 000000000..c37f2729b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf @@ -0,0 +1,28 @@ +#/** @file
+# Implement ArmGenericTimerCounterLib using the physical timer
+#
+# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmGenericTimerPhyCounterLib
+ FILE_GUID = 7A07E61D-9967-407F-AE85-2EB0B50BEF2C
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmGenericTimerCounterLib
+
+[Sources]
+ ArmGenericTimerPhyCounterLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ ArmLib
+ BaseLib
diff --git a/roms/edk2/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c b/roms/edk2/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c new file mode 100644 index 000000000..74c85dd75 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c @@ -0,0 +1,127 @@ +/** @file
+
+ Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/ArmGenericTimerCounterLib.h>
+#include <Library/ArmLib.h>
+
+VOID
+EFIAPI
+ArmGenericTimerEnableTimer (
+ VOID
+ )
+{
+ UINTN TimerCtrlReg;
+
+ TimerCtrlReg = ArmReadCntvCtl ();
+ TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE;
+ ArmWriteCntvCtl (TimerCtrlReg);
+}
+
+VOID
+EFIAPI
+ArmGenericTimerReenableTimer (
+ VOID
+ )
+{
+}
+
+VOID
+EFIAPI
+ArmGenericTimerDisableTimer (
+ VOID
+ )
+{
+ UINTN TimerCtrlReg;
+
+ TimerCtrlReg = ArmReadCntvCtl ();
+ TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;
+ ArmWriteCntvCtl (TimerCtrlReg);
+}
+
+VOID
+EFIAPI
+ArmGenericTimerSetTimerFreq (
+ IN UINTN FreqInHz
+ )
+{
+ ArmWriteCntFrq (FreqInHz);
+}
+
+UINTN
+EFIAPI
+ArmGenericTimerGetTimerFreq (
+ VOID
+ )
+{
+ return ArmReadCntFrq ();
+}
+
+UINTN
+EFIAPI
+ArmGenericTimerGetTimerVal (
+ VOID
+ )
+{
+ return ArmReadCntvTval ();
+}
+
+
+VOID
+EFIAPI
+ArmGenericTimerSetTimerVal (
+ IN UINTN Value
+ )
+{
+ ArmWriteCntvTval (Value);
+}
+
+UINT64
+EFIAPI
+ArmGenericTimerGetSystemCount (
+ VOID
+ )
+{
+ return ArmReadCntvCt ();
+}
+
+UINTN
+EFIAPI
+ArmGenericTimerGetTimerCtrlReg (
+ VOID
+ )
+{
+ return ArmReadCntvCtl ();
+}
+
+VOID
+EFIAPI
+ArmGenericTimerSetTimerCtrlReg (
+ UINTN Value
+ )
+{
+ ArmWriteCntvCtl (Value);
+}
+
+UINT64
+EFIAPI
+ArmGenericTimerGetCompareVal (
+ VOID
+ )
+{
+ return ArmReadCntvCval ();
+}
+
+VOID
+EFIAPI
+ArmGenericTimerSetCompareVal (
+ IN UINT64 Value
+ )
+{
+ ArmWriteCntvCval (Value);
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.inf b/roms/edk2/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.inf new file mode 100644 index 000000000..89fcb71c5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.inf @@ -0,0 +1,28 @@ +#/** @file
+# Implement ArmGenericTimerCounterLib using the virtual timer
+#
+# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmGenericTimerVirtCounterLib
+ FILE_GUID = 3C0D77CC-4F27-49C8-B25C-2D01D81ED4D8
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmGenericTimerCounterLib
+
+[Sources]
+ ArmGenericTimerVirtCounterLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ ArmLib
+ BaseLib
diff --git a/roms/edk2/ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c b/roms/edk2/ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c new file mode 100644 index 000000000..4086a294d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c @@ -0,0 +1,60 @@ +/** @file
+*
+* Copyright (c) 2014, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmGicLib.h>
+
+STATIC ARM_GIC_ARCH_REVISION mGicArchRevision;
+
+RETURN_STATUS
+EFIAPI
+ArmGicArchLibInitialize (
+ VOID
+ )
+{
+ UINT32 IccSre;
+
+ // Ideally we would like to use the GICC IIDR Architecture version here, but
+ // this does not seem to be very reliable as the implementation could easily
+ // get it wrong. It is more reliable to check if the GICv3 System Register
+ // feature is implemented on the CPU. This is also convenient as our GICv3
+ // driver requires SRE. If only Memory mapped access is available we try to
+ // drive the GIC as a v2.
+ if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
+ // Make sure System Register access is enabled (SRE). This depends on the
+ // higher privilege level giving us permission, otherwise we will either
+ // cause an exception here, or the write doesn't stick in which case we need
+ // to fall back to the GICv2 MMIO interface.
+ // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
+ // at the same exception level.
+ // It is the OS responsibility to set this bit.
+ IccSre = ArmGicV3GetControlSystemRegisterEnable ();
+ if (!(IccSre & ICC_SRE_EL2_SRE)) {
+ ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
+ IccSre = ArmGicV3GetControlSystemRegisterEnable ();
+ }
+ if (IccSre & ICC_SRE_EL2_SRE) {
+ mGicArchRevision = ARM_GIC_ARCH_REVISION_3;
+ goto Done;
+ }
+ }
+
+ mGicArchRevision = ARM_GIC_ARCH_REVISION_2;
+
+Done:
+ return RETURN_SUCCESS;
+}
+
+ARM_GIC_ARCH_REVISION
+EFIAPI
+ArmGicGetSupportedArchRevision (
+ VOID
+ )
+{
+ return mGicArchRevision;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c b/roms/edk2/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c new file mode 100644 index 000000000..222d80598 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c @@ -0,0 +1,60 @@ +/** @file
+*
+* Copyright (c) 2014, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmGicLib.h>
+
+STATIC ARM_GIC_ARCH_REVISION mGicArchRevision;
+
+RETURN_STATUS
+EFIAPI
+ArmGicArchLibInitialize (
+ VOID
+ )
+{
+ UINT32 IccSre;
+
+ // Ideally we would like to use the GICC IIDR Architecture version here, but
+ // this does not seem to be very reliable as the implementation could easily
+ // get it wrong. It is more reliable to check if the GICv3 System Register
+ // feature is implemented on the CPU. This is also convenient as our GICv3
+ // driver requires SRE. If only Memory mapped access is available we try to
+ // drive the GIC as a v2.
+ if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
+ // Make sure System Register access is enabled (SRE). This depends on the
+ // higher privilege level giving us permission, otherwise we will either
+ // cause an exception here, or the write doesn't stick in which case we need
+ // to fall back to the GICv2 MMIO interface.
+ // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
+ // at the same exception level.
+ // It is the OS responsibility to set this bit.
+ IccSre = ArmGicV3GetControlSystemRegisterEnable ();
+ if (!(IccSre & ICC_SRE_EL2_SRE)) {
+ ArmGicV3SetControlSystemRegisterEnable (IccSre| ICC_SRE_EL2_SRE);
+ IccSre = ArmGicV3GetControlSystemRegisterEnable ();
+ }
+ if (IccSre & ICC_SRE_EL2_SRE) {
+ mGicArchRevision = ARM_GIC_ARCH_REVISION_3;
+ goto Done;
+ }
+ }
+
+ mGicArchRevision = ARM_GIC_ARCH_REVISION_2;
+
+Done:
+ return RETURN_SUCCESS;
+}
+
+ARM_GIC_ARCH_REVISION
+EFIAPI
+ArmGicGetSupportedArchRevision (
+ VOID
+ )
+{
+ return mGicArchRevision;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf b/roms/edk2/ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf new file mode 100644 index 000000000..92ac11c2f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf @@ -0,0 +1,28 @@ +#/* @file
+# Copyright (c) 2015, Linaro Ltd. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmGicArchLib
+ FILE_GUID = cd67f41a-26e9-4482-90c9-a9aff803382a
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmGicArchLib|DXE_DRIVER UEFI_DRIVER UEFI_APPLICATION
+ CONSTRUCTOR = ArmGicArchLibInitialize
+
+[Sources.ARM]
+ Arm/ArmGicArchLib.c
+
+[Sources.AARCH64]
+ AArch64/ArmGicArchLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ ArmGicLib
diff --git a/roms/edk2/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c b/roms/edk2/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c new file mode 100644 index 000000000..4f2479e70 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c @@ -0,0 +1,45 @@ +/** @file
+*
+* Copyright (c) 2014, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmGicLib.h>
+
+ARM_GIC_ARCH_REVISION
+EFIAPI
+ArmGicGetSupportedArchRevision (
+ VOID
+ )
+{
+ UINT32 IccSre;
+
+ // Ideally we would like to use the GICC IIDR Architecture version here, but
+ // this does not seem to be very reliable as the implementation could easily
+ // get it wrong. It is more reliable to check if the GICv3 System Register
+ // feature is implemented on the CPU. This is also convenient as our GICv3
+ // driver requires SRE. If only Memory mapped access is available we try to
+ // drive the GIC as a v2.
+ if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
+ // Make sure System Register access is enabled (SRE). This depends on the
+ // higher privilege level giving us permission, otherwise we will either
+ // cause an exception here, or the write doesn't stick in which case we need
+ // to fall back to the GICv2 MMIO interface.
+ // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
+ // at the same exception level.
+ // It is the OS responsibility to set this bit.
+ IccSre = ArmGicV3GetControlSystemRegisterEnable ();
+ if (!(IccSre & ICC_SRE_EL2_SRE)) {
+ ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
+ IccSre = ArmGicV3GetControlSystemRegisterEnable ();
+ }
+ if (IccSre & ICC_SRE_EL2_SRE) {
+ return ARM_GIC_ARCH_REVISION_3;
+ }
+ }
+
+ return ARM_GIC_ARCH_REVISION_2;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c b/roms/edk2/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c new file mode 100644 index 000000000..8e1baeee2 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c @@ -0,0 +1,45 @@ +/** @file
+*
+* Copyright (c) 2014, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmGicLib.h>
+
+ARM_GIC_ARCH_REVISION
+EFIAPI
+ArmGicGetSupportedArchRevision (
+ VOID
+ )
+{
+ UINT32 IccSre;
+
+ // Ideally we would like to use the GICC IIDR Architecture version here, but
+ // this does not seem to be very reliable as the implementation could easily
+ // get it wrong. It is more reliable to check if the GICv3 System Register
+ // feature is implemented on the CPU. This is also convenient as our GICv3
+ // driver requires SRE. If only Memory mapped access is available we try to
+ // drive the GIC as a v2.
+ if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
+ // Make sure System Register access is enabled (SRE). This depends on the
+ // higher privilege level giving us permission, otherwise we will either
+ // cause an exception here, or the write doesn't stick in which case we need
+ // to fall back to the GICv2 MMIO interface.
+ // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
+ // at the same exception level.
+ // It is the OS responsibility to set this bit.
+ IccSre = ArmGicV3GetControlSystemRegisterEnable ();
+ if (!(IccSre & ICC_SRE_EL2_SRE)) {
+ ArmGicV3SetControlSystemRegisterEnable (IccSre| ICC_SRE_EL2_SRE);
+ IccSre = ArmGicV3GetControlSystemRegisterEnable ();
+ }
+ if (IccSre & ICC_SRE_EL2_SRE) {
+ return ARM_GIC_ARCH_REVISION_3;
+ }
+ }
+
+ return ARM_GIC_ARCH_REVISION_2;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf b/roms/edk2/ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf new file mode 100644 index 000000000..1a1179a98 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf @@ -0,0 +1,27 @@ +#/* @file
+# Copyright (c) 2015, Linaro Ltd. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmGicArchSecLib
+ FILE_GUID = c1dd9745-9459-4e9a-9f5b-99cbd233c27d
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmGicArchLib|SEC
+
+[Sources.ARM]
+ Arm/ArmGicArchLib.c
+
+[Sources.AARCH64]
+ AArch64/ArmGicArchLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ ArmGicLib
diff --git a/roms/edk2/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S b/roms/edk2/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S new file mode 100644 index 000000000..39d956a02 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S @@ -0,0 +1,33 @@ +//
+// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+// Copyright (c) 2014-2016, Linaro Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+#include <AsmMacroIoLibV8.h>
+
+ASM_FUNC(ArmCallHvc)
+ // Push x0 on the stack - The stack must always be quad-word aligned
+ str x0, [sp, #-16]!
+
+ // Load the HVC arguments values into the appropriate registers
+ ldp x6, x7, [x0, #48]
+ ldp x4, x5, [x0, #32]
+ ldp x2, x3, [x0, #16]
+ ldp x0, x1, [x0, #0]
+
+ hvc #0
+
+ // Pop the ARM_HVC_ARGS structure address from the stack into x9
+ ldr x9, [sp], #16
+
+ // Store the HVC returned values into the ARM_HVC_ARGS structure.
+ // A HVC call can return up to 4 values
+ stp x2, x3, [x9, #16]
+ stp x0, x1, [x9, #0]
+
+ mov x0, x9
+
+ ret
diff --git a/roms/edk2/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S b/roms/edk2/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S new file mode 100644 index 000000000..0a5a95919 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S @@ -0,0 +1,45 @@ +//
+// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+// Copyright (c) 2014-2016, Linaro Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+#include <AsmMacroIoLib.h>
+
+.arch_extension virt
+
+ASM_FUNC(ArmCallHvc)
+ push {r4-r8}
+ // r0 will be popped just after the HVC call
+ push {r0}
+
+ // Load the HVC arguments values into the appropriate registers
+ ldr r7, [r0, #28]
+ ldr r6, [r0, #24]
+ ldr r5, [r0, #20]
+ ldr r4, [r0, #16]
+ ldr r3, [r0, #12]
+ ldr r2, [r0, #8]
+ ldr r1, [r0, #4]
+ ldr r0, [r0, #0]
+
+ hvc #0
+
+ // Pop the ARM_HVC_ARGS structure address from the stack into r8
+ pop {r8}
+
+ // Load the HVC returned values into the appropriate registers
+ // A HVC call can return up to 4 values - we do not need to store back r4-r7.
+ str r3, [r8, #12]
+ str r2, [r8, #8]
+ str r1, [r8, #4]
+ str r0, [r8, #0]
+
+ mov r0, r8
+
+ // Restore the registers r4-r8
+ pop {r4-r8}
+
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.asm b/roms/edk2/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.asm new file mode 100644 index 000000000..01e4d3f9c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.asm @@ -0,0 +1,46 @@ +//
+// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+// Copyright (c) 2014, Linaro Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+
+ INCLUDE AsmMacroExport.inc
+
+ RVCT_ASM_EXPORT ArmCallHvc
+ push {r4-r8}
+ // r0 will be popped just after the HVC call
+ push {r0}
+
+ // Load the HVC arguments values into the appropriate registers
+ ldr r7, [r0, #28]
+ ldr r6, [r0, #24]
+ ldr r5, [r0, #20]
+ ldr r4, [r0, #16]
+ ldr r3, [r0, #12]
+ ldr r2, [r0, #8]
+ ldr r1, [r0, #4]
+ ldr r0, [r0, #0]
+
+ hvc #0
+
+ // Pop the ARM_HVC_ARGS structure address from the stack into r8
+ pop {r8}
+
+ // Load the HVC returned values into the appropriate registers
+ // A HVC call can return up to 4 values - we do not need to store back r4-r7.
+ str r3, [r8, #12]
+ str r2, [r8, #8]
+ str r1, [r8, #4]
+ str r0, [r8, #0]
+
+ mov r0, r8
+
+ // Restore the registers r4-r8
+ pop {r4-r8}
+
+ bx lr
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf b/roms/edk2/ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf new file mode 100644 index 000000000..69f68f63d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf @@ -0,0 +1,29 @@ +#/** @file
+#
+# Copyright (c) 2012-2013, ARM Ltd. All rights reserved.<BR>
+# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmHvcLib
+ FILE_GUID = E594959A-D150-44D3-963B-BA90329D3D9A
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmHvcLib
+
+[Sources.ARM]
+ Arm/ArmHvc.asm | RVCT
+ Arm/ArmHvc.S | GCC
+
+[Sources.AARCH64]
+ AArch64/ArmHvc.S
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[BuildOptions]
+ RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S new file mode 100644 index 000000000..574e0d593 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S @@ -0,0 +1,113 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLibV8.h>
+
+ASM_FUNC(ArmReadCntFrq)
+ mrs x0, cntfrq_el0 // Read CNTFRQ
+ ret
+
+
+# NOTE - Can only write while at highest implemented EL level (EL3 on model). Else ReadOnly (EL2, EL1, EL0)
+ASM_FUNC(ArmWriteCntFrq)
+ msr cntfrq_el0, x0 // Write to CNTFRQ
+ ret
+
+
+ASM_FUNC(ArmReadCntPct)
+ mrs x0, cntpct_el0 // Read CNTPCT (Physical counter register)
+ ret
+
+
+ASM_FUNC(ArmReadCntkCtl)
+ mrs x0, cntkctl_el1 // Read CNTK_CTL (Timer PL1 Control Register)
+ ret
+
+
+ASM_FUNC(ArmWriteCntkCtl)
+ msr cntkctl_el1, x0 // Write to CNTK_CTL (Timer PL1 Control Register)
+ ret
+
+
+ASM_FUNC(ArmReadCntpTval)
+ mrs x0, cntp_tval_el0 // Read CNTP_TVAL (PL1 physical timer value register)
+ ret
+
+
+ASM_FUNC(ArmWriteCntpTval)
+ msr cntp_tval_el0, x0 // Write to CNTP_TVAL (PL1 physical timer value register)
+ ret
+
+
+ASM_FUNC(ArmReadCntpCtl)
+ mrs x0, cntp_ctl_el0 // Read CNTP_CTL (PL1 Physical Timer Control Register)
+ ret
+
+
+ASM_FUNC(ArmWriteCntpCtl)
+ msr cntp_ctl_el0, x0 // Write to CNTP_CTL (PL1 Physical Timer Control Register)
+ ret
+
+
+ASM_FUNC(ArmReadCntvTval)
+ mrs x0, cntv_tval_el0 // Read CNTV_TVAL (Virtual Timer Value register)
+ ret
+
+
+ASM_FUNC(ArmWriteCntvTval)
+ msr cntv_tval_el0, x0 // Write to CNTV_TVAL (Virtual Timer Value register)
+ ret
+
+
+ASM_FUNC(ArmReadCntvCtl)
+ mrs x0, cntv_ctl_el0 // Read CNTV_CTL (Virtual Timer Control Register)
+ ret
+
+
+ASM_FUNC(ArmWriteCntvCtl)
+ msr cntv_ctl_el0, x0 // Write to CNTV_CTL (Virtual Timer Control Register)
+ ret
+
+
+ASM_FUNC(ArmReadCntvCt)
+ mrs x0, cntvct_el0 // Read CNTVCT (Virtual Count Register)
+ ret
+
+
+ASM_FUNC(ArmReadCntpCval)
+ mrs x0, cntp_cval_el0 // Read CNTP_CTVAL (Physical Timer Compare Value Register)
+ ret
+
+
+ASM_FUNC(ArmWriteCntpCval)
+ msr cntp_cval_el0, x0 // Write to CNTP_CTVAL (Physical Timer Compare Value Register)
+ ret
+
+
+ASM_FUNC(ArmReadCntvCval)
+ mrs x0, cntv_cval_el0 // Read CNTV_CTVAL (Virtual Timer Compare Value Register)
+ ret
+
+
+ASM_FUNC(ArmWriteCntvCval)
+ msr cntv_cval_el0, x0 // write to CNTV_CTVAL (Virtual Timer Compare Value Register)
+ ret
+
+
+ASM_FUNC(ArmReadCntvOff)
+ mrs x0, cntvoff_el2 // Read CNTVOFF (virtual Offset register)
+ ret
+
+
+ASM_FUNC(ArmWriteCntvOff)
+ msr cntvoff_el2, x0 // Write to CNTVOFF (Virtual Offset register)
+ ret
+
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c new file mode 100644 index 000000000..3fbd59119 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c @@ -0,0 +1,73 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h>
+
+#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
+
+#include <Chipset/AArch64.h>
+
+#include "AArch64Lib.h"
+#include "ArmLibPrivate.h"
+
+VOID
+AArch64DataCacheOperation (
+ IN AARCH64_CACHE_OPERATION DataCacheOperation
+ )
+{
+ UINTN SavedInterruptState;
+
+ SavedInterruptState = ArmGetInterruptState ();
+ ArmDisableInterrupts();
+
+ AArch64AllDataCachesOperation (DataCacheOperation);
+
+ ArmDataSynchronizationBarrier ();
+
+ if (SavedInterruptState) {
+ ArmEnableInterrupts ();
+ }
+}
+
+VOID
+EFIAPI
+ArmInvalidateDataCache (
+ VOID
+ )
+{
+ ASSERT (!ArmMmuEnabled ());
+
+ ArmDataSynchronizationBarrier ();
+ AArch64DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
+}
+
+VOID
+EFIAPI
+ArmCleanInvalidateDataCache (
+ VOID
+ )
+{
+ ASSERT (!ArmMmuEnabled ());
+
+ ArmDataSynchronizationBarrier ();
+ AArch64DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
+}
+
+VOID
+EFIAPI
+ArmCleanDataCache (
+ VOID
+ )
+{
+ ASSERT (!ArmMmuEnabled ());
+
+ ArmDataSynchronizationBarrier ();
+ AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h new file mode 100644 index 000000000..b2c8a8ea0 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h @@ -0,0 +1,39 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __AARCH64_LIB_H__
+#define __AARCH64_LIB_H__
+
+typedef VOID (*AARCH64_CACHE_OPERATION)(UINTN);
+
+VOID
+AArch64AllDataCachesOperation (
+ IN AARCH64_CACHE_OPERATION DataCacheOperation
+ );
+
+VOID
+EFIAPI
+ArmInvalidateDataCacheEntryBySetWay (
+ IN UINTN SetWayFormat
+ );
+
+VOID
+EFIAPI
+ArmCleanDataCacheEntryBySetWay (
+ IN UINTN SetWayFormat
+ );
+
+VOID
+EFIAPI
+ArmCleanInvalidateDataCacheEntryBySetWay (
+ IN UINTN SetWayFormat
+ );
+
+#endif // __AARCH64_LIB_H__
+
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S new file mode 100644 index 000000000..199374ff5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -0,0 +1,489 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011 - 2017, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <Chipset/AArch64.h>
+#include <AsmMacroIoLibV8.h>
+
+.set CTRL_M_BIT, (1 << 0)
+.set CTRL_A_BIT, (1 << 1)
+.set CTRL_C_BIT, (1 << 2)
+.set CTRL_SA_BIT, (1 << 3)
+.set CTRL_I_BIT, (1 << 12)
+.set CTRL_V_BIT, (1 << 12)
+.set CPACR_VFP_BITS, (3 << 20)
+
+ASM_FUNC(ArmInvalidateDataCacheEntryByMVA)
+ dc ivac, x0 // Invalidate single data cache line
+ ret
+
+
+ASM_FUNC(ArmCleanDataCacheEntryByMVA)
+ dc cvac, x0 // Clean single data cache line
+ ret
+
+
+ASM_FUNC(ArmCleanDataCacheEntryToPoUByMVA)
+ dc cvau, x0 // Clean single data cache line to PoU
+ ret
+
+ASM_FUNC(ArmInvalidateInstructionCacheEntryToPoUByMVA)
+ ic ivau, x0 // Invalidate single instruction cache line to PoU
+ ret
+
+
+ASM_FUNC(ArmCleanInvalidateDataCacheEntryByMVA)
+ dc civac, x0 // Clean and invalidate single data cache line
+ ret
+
+
+ASM_FUNC(ArmInvalidateDataCacheEntryBySetWay)
+ dc isw, x0 // Invalidate this line
+ ret
+
+
+ASM_FUNC(ArmCleanInvalidateDataCacheEntryBySetWay)
+ dc cisw, x0 // Clean and Invalidate this line
+ ret
+
+
+ASM_FUNC(ArmCleanDataCacheEntryBySetWay)
+ dc csw, x0 // Clean this line
+ ret
+
+
+ASM_FUNC(ArmInvalidateInstructionCache)
+ ic iallu // Invalidate entire instruction cache
+ dsb sy
+ isb
+ ret
+
+
+ASM_FUNC(ArmEnableMmu)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, sctlr_el1 // Read System control register EL1
+ b 4f
+2: mrs x0, sctlr_el2 // Read System control register EL2
+ b 4f
+3: mrs x0, sctlr_el3 // Read System control register EL3
+4: orr x0, x0, #CTRL_M_BIT // Set MMU enable bit
+ EL1_OR_EL2_OR_EL3(x1)
+1: tlbi vmalle1
+ dsb nsh
+ isb
+ msr sctlr_el1, x0 // Write back
+ b 4f
+2: tlbi alle2
+ dsb nsh
+ isb
+ msr sctlr_el2, x0 // Write back
+ b 4f
+3: tlbi alle3
+ dsb nsh
+ isb
+ msr sctlr_el3, x0 // Write back
+4: isb
+ ret
+
+
+ASM_FUNC(ArmDisableMmu)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, sctlr_el1 // Read System Control Register EL1
+ b 4f
+2: mrs x0, sctlr_el2 // Read System Control Register EL2
+ b 4f
+3: mrs x0, sctlr_el3 // Read System Control Register EL3
+4: and x0, x0, #~CTRL_M_BIT // Clear MMU enable bit
+ EL1_OR_EL2_OR_EL3(x1)
+1: msr sctlr_el1, x0 // Write back
+ tlbi vmalle1
+ b 4f
+2: msr sctlr_el2, x0 // Write back
+ tlbi alle2
+ b 4f
+3: msr sctlr_el3, x0 // Write back
+ tlbi alle3
+4: dsb sy
+ isb
+ ret
+
+
+ASM_FUNC(ArmDisableCachesAndMmu)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, sctlr_el1 // Get control register EL1
+ b 4f
+2: mrs x0, sctlr_el2 // Get control register EL2
+ b 4f
+3: mrs x0, sctlr_el3 // Get control register EL3
+4: mov x1, #~(CTRL_M_BIT | CTRL_C_BIT | CTRL_I_BIT) // Disable MMU, D & I caches
+ and x0, x0, x1
+ EL1_OR_EL2_OR_EL3(x1)
+1: msr sctlr_el1, x0 // Write back control register
+ b 4f
+2: msr sctlr_el2, x0 // Write back control register
+ b 4f
+3: msr sctlr_el3, x0 // Write back control register
+4: dsb sy
+ isb
+ ret
+
+
+ASM_FUNC(ArmMmuEnabled)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, sctlr_el1 // Get control register EL1
+ b 4f
+2: mrs x0, sctlr_el2 // Get control register EL2
+ b 4f
+3: mrs x0, sctlr_el3 // Get control register EL3
+4: and x0, x0, #CTRL_M_BIT
+ ret
+
+
+ASM_FUNC(ArmEnableDataCache)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, sctlr_el1 // Get control register EL1
+ b 4f
+2: mrs x0, sctlr_el2 // Get control register EL2
+ b 4f
+3: mrs x0, sctlr_el3 // Get control register EL3
+4: orr x0, x0, #CTRL_C_BIT // Set C bit
+ EL1_OR_EL2_OR_EL3(x1)
+1: msr sctlr_el1, x0 // Write back control register
+ b 4f
+2: msr sctlr_el2, x0 // Write back control register
+ b 4f
+3: msr sctlr_el3, x0 // Write back control register
+4: dsb sy
+ isb
+ ret
+
+
+ASM_FUNC(ArmDisableDataCache)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, sctlr_el1 // Get control register EL1
+ b 4f
+2: mrs x0, sctlr_el2 // Get control register EL2
+ b 4f
+3: mrs x0, sctlr_el3 // Get control register EL3
+4: and x0, x0, #~CTRL_C_BIT // Clear C bit
+ EL1_OR_EL2_OR_EL3(x1)
+1: msr sctlr_el1, x0 // Write back control register
+ b 4f
+2: msr sctlr_el2, x0 // Write back control register
+ b 4f
+3: msr sctlr_el3, x0 // Write back control register
+4: dsb sy
+ isb
+ ret
+
+
+ASM_FUNC(ArmEnableInstructionCache)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, sctlr_el1 // Get control register EL1
+ b 4f
+2: mrs x0, sctlr_el2 // Get control register EL2
+ b 4f
+3: mrs x0, sctlr_el3 // Get control register EL3
+4: orr x0, x0, #CTRL_I_BIT // Set I bit
+ EL1_OR_EL2_OR_EL3(x1)
+1: msr sctlr_el1, x0 // Write back control register
+ b 4f
+2: msr sctlr_el2, x0 // Write back control register
+ b 4f
+3: msr sctlr_el3, x0 // Write back control register
+4: dsb sy
+ isb
+ ret
+
+
+ASM_FUNC(ArmDisableInstructionCache)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, sctlr_el1 // Get control register EL1
+ b 4f
+2: mrs x0, sctlr_el2 // Get control register EL2
+ b 4f
+3: mrs x0, sctlr_el3 // Get control register EL3
+4: and x0, x0, #~CTRL_I_BIT // Clear I bit
+ EL1_OR_EL2_OR_EL3(x1)
+1: msr sctlr_el1, x0 // Write back control register
+ b 4f
+2: msr sctlr_el2, x0 // Write back control register
+ b 4f
+3: msr sctlr_el3, x0 // Write back control register
+4: dsb sy
+ isb
+ ret
+
+
+ASM_FUNC(ArmEnableAlignmentCheck)
+ EL1_OR_EL2(x1)
+1: mrs x0, sctlr_el1 // Get control register EL1
+ b 3f
+2: mrs x0, sctlr_el2 // Get control register EL2
+3: orr x0, x0, #CTRL_A_BIT // Set A (alignment check) bit
+ EL1_OR_EL2(x1)
+1: msr sctlr_el1, x0 // Write back control register
+ b 3f
+2: msr sctlr_el2, x0 // Write back control register
+3: dsb sy
+ isb
+ ret
+
+
+ASM_FUNC(ArmDisableAlignmentCheck)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, sctlr_el1 // Get control register EL1
+ b 4f
+2: mrs x0, sctlr_el2 // Get control register EL2
+ b 4f
+3: mrs x0, sctlr_el3 // Get control register EL3
+4: and x0, x0, #~CTRL_A_BIT // Clear A (alignment check) bit
+ EL1_OR_EL2_OR_EL3(x1)
+1: msr sctlr_el1, x0 // Write back control register
+ b 4f
+2: msr sctlr_el2, x0 // Write back control register
+ b 4f
+3: msr sctlr_el3, x0 // Write back control register
+4: dsb sy
+ isb
+ ret
+
+ASM_FUNC(ArmEnableStackAlignmentCheck)
+ EL1_OR_EL2(x1)
+1: mrs x0, sctlr_el1 // Get control register EL1
+ b 3f
+2: mrs x0, sctlr_el2 // Get control register EL2
+3: orr x0, x0, #CTRL_SA_BIT // Set SA (stack alignment check) bit
+ EL1_OR_EL2(x1)
+1: msr sctlr_el1, x0 // Write back control register
+ b 3f
+2: msr sctlr_el2, x0 // Write back control register
+3: dsb sy
+ isb
+ ret
+
+
+ASM_FUNC(ArmDisableStackAlignmentCheck)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, sctlr_el1 // Get control register EL1
+ b 4f
+2: mrs x0, sctlr_el2 // Get control register EL2
+ b 4f
+3: mrs x0, sctlr_el3 // Get control register EL3
+4: bic x0, x0, #CTRL_SA_BIT // Clear SA (stack alignment check) bit
+ EL1_OR_EL2_OR_EL3(x1)
+1: msr sctlr_el1, x0 // Write back control register
+ b 4f
+2: msr sctlr_el2, x0 // Write back control register
+ b 4f
+3: msr sctlr_el3, x0 // Write back control register
+4: dsb sy
+ isb
+ ret
+
+
+// Always turned on in AArch64. Else implementation specific. Leave in for C compatibility for now
+ASM_FUNC(ArmEnableBranchPrediction)
+ ret
+
+
+// Always turned on in AArch64. Else implementation specific. Leave in for C compatibility for now.
+ASM_FUNC(ArmDisableBranchPrediction)
+ ret
+
+
+ASM_FUNC(AArch64AllDataCachesOperation)
+// We can use regs 0-7 and 9-15 without having to save/restore.
+// Save our link register on the stack. - The stack must always be quad-word aligned
+ stp x29, x30, [sp, #-16]!
+ mov x29, sp
+ mov x1, x0 // Save Function call in x1
+ mrs x6, clidr_el1 // Read EL1 CLIDR
+ and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC)
+ lsr x3, x3, #23 // Left align cache level value - the level is shifted by 1 to the
+ // right to ease the access to CSSELR and the Set/Way operation.
+ cbz x3, L_Finished // No need to clean if LoC is 0
+ mov x10, #0 // Start clean at cache level 0
+
+Loop1:
+ add x2, x10, x10, lsr #1 // Work out 3x cachelevel for cache info
+ lsr x12, x6, x2 // bottom 3 bits are the Cache type for this level
+ and x12, x12, #7 // get those 3 bits alone
+ cmp x12, #2 // what cache at this level?
+ b.lt L_Skip // no cache or only instruction cache at this level
+ msr csselr_el1, x10 // write the Cache Size selection register with current level (CSSELR)
+ isb // isb to sync the change to the CacheSizeID reg
+ mrs x12, ccsidr_el1 // reads current Cache Size ID register (CCSIDR)
+ and x2, x12, #0x7 // extract the line length field
+ add x2, x2, #4 // add 4 for the line length offset (log2 16 bytes)
+ mov x4, #0x400
+ sub x4, x4, #1
+ and x4, x4, x12, lsr #3 // x4 is the max number on the way size (right aligned)
+ clz w5, w4 // w5 is the bit position of the way size increment
+ mov x7, #0x00008000
+ sub x7, x7, #1
+ and x7, x7, x12, lsr #13 // x7 is the max number of the index size (right aligned)
+
+Loop2:
+ mov x9, x4 // x9 working copy of the max way size (right aligned)
+
+Loop3:
+ lsl x11, x9, x5
+ orr x0, x10, x11 // factor in the way number and cache number
+ lsl x11, x7, x2
+ orr x0, x0, x11 // factor in the index number
+
+ blr x1 // Goto requested cache operation
+
+ subs x9, x9, #1 // decrement the way number
+ b.ge Loop3
+ subs x7, x7, #1 // decrement the index
+ b.ge Loop2
+L_Skip:
+ add x10, x10, #2 // increment the cache number
+ cmp x3, x10
+ b.gt Loop1
+
+L_Finished:
+ dsb sy
+ isb
+ ldp x29, x30, [sp], #0x10
+ ret
+
+
+ASM_FUNC(ArmDataMemoryBarrier)
+ dmb sy
+ ret
+
+
+ASM_FUNC(ArmDataSynchronizationBarrier)
+ dsb sy
+ ret
+
+
+ASM_FUNC(ArmInstructionSynchronizationBarrier)
+ isb
+ ret
+
+
+ASM_FUNC(ArmWriteVBar)
+ EL1_OR_EL2_OR_EL3(x1)
+1: msr vbar_el1, x0 // Set the Address of the EL1 Vector Table in the VBAR register
+ b 4f
+2: msr vbar_el2, x0 // Set the Address of the EL2 Vector Table in the VBAR register
+ b 4f
+3: msr vbar_el3, x0 // Set the Address of the EL3 Vector Table in the VBAR register
+4: isb
+ ret
+
+ASM_FUNC(ArmReadVBar)
+ EL1_OR_EL2_OR_EL3(x1)
+1: mrs x0, vbar_el1 // Set the Address of the EL1 Vector Table in the VBAR register
+ ret
+2: mrs x0, vbar_el2 // Set the Address of the EL2 Vector Table in the VBAR register
+ ret
+3: mrs x0, vbar_el3 // Set the Address of the EL3 Vector Table in the VBAR register
+ ret
+
+
+ASM_FUNC(ArmEnableVFP)
+ // Check whether floating-point is implemented in the processor.
+ mov x1, x30 // Save LR
+ bl ArmReadIdPfr0 // Read EL1 Processor Feature Register (PFR0)
+ mov x30, x1 // Restore LR
+ ubfx x0, x0, #16, #4 // Extract the FP bits 16:19
+ cmp x0, #0xF // Check if FP bits are '1111b',
+ // i.e. Floating Point not implemented
+ b.eq 4f // Exit when VFP is not implemented.
+
+ // FVP is implemented.
+ // Make sure VFP exceptions are not trapped (to any exception level).
+ mrs x0, cpacr_el1 // Read EL1 Coprocessor Access Control Register (CPACR)
+ orr x0, x0, #CPACR_VFP_BITS // Disable FVP traps to EL1
+ msr cpacr_el1, x0 // Write back EL1 Coprocessor Access Control Register (CPACR)
+ mov x1, #AARCH64_CPTR_TFP // TFP Bit for trapping VFP Exceptions
+ EL1_OR_EL2_OR_EL3(x2)
+1:ret // Not configurable in EL1
+2:mrs x0, cptr_el2 // Disable VFP traps to EL2
+ bic x0, x0, x1
+ msr cptr_el2, x0
+ ret
+3:mrs x0, cptr_el3 // Disable VFP traps to EL3
+ bic x0, x0, x1
+ msr cptr_el3, x0
+4:ret
+
+
+ASM_FUNC(ArmCallWFI)
+ wfi
+ ret
+
+
+ASM_FUNC(ArmReadMpidr)
+ mrs x0, mpidr_el1 // read EL1 MPIDR
+ ret
+
+
+// Keep old function names for C compatibility for now. Change later?
+ASM_FUNC(ArmReadTpidrurw)
+ mrs x0, tpidr_el0 // read tpidr_el0 (v7 TPIDRURW) -> (v8 TPIDR_EL0)
+ ret
+
+
+// Keep old function names for C compatibility for now. Change later?
+ASM_FUNC(ArmWriteTpidrurw)
+ msr tpidr_el0, x0 // write tpidr_el0 (v7 TPIDRURW) -> (v8 TPIDR_EL0)
+ ret
+
+
+// Arch timers are mandatory on AArch64
+ASM_FUNC(ArmIsArchTimerImplemented)
+ mov x0, #1
+ ret
+
+
+ASM_FUNC(ArmReadIdPfr0)
+ mrs x0, id_aa64pfr0_el1 // Read ID_AA64PFR0 Register
+ ret
+
+
+// Q: id_aa64pfr1_el1 not defined yet. What does this function want to access?
+// A: used to setup arch timer. Check if we have security extensions, permissions to set stuff.
+// See: ArmPkg/Library/ArmArchTimerLib/AArch64/ArmArchTimerLib.c
+// Not defined yet, but stick in here for now, should read all zeros.
+ASM_FUNC(ArmReadIdPfr1)
+ mrs x0, id_aa64pfr1_el1 // Read ID_PFR1 Register
+ ret
+
+// VOID ArmWriteHcr(UINTN Hcr)
+ASM_FUNC(ArmWriteHcr)
+ msr hcr_el2, x0 // Write the passed HCR value
+ ret
+
+// UINTN ArmReadHcr(VOID)
+ASM_FUNC(ArmReadHcr)
+ mrs x0, hcr_el2
+ ret
+
+// UINTN ArmReadCurrentEL(VOID)
+ASM_FUNC(ArmReadCurrentEL)
+ mrs x0, CurrentEL
+ ret
+
+// UINT32 ArmReadCntHctl(VOID)
+ASM_FUNC(ArmReadCntHctl)
+ mrs x0, cnthctl_el2
+ ret
+
+// VOID ArmWriteCntHctl(UINT32 CntHctl)
+ASM_FUNC(ArmWriteCntHctl)
+ msr cnthctl_el2, x0
+ ret
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S new file mode 100644 index 000000000..ba0ec5682 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S @@ -0,0 +1,217 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLibV8.h>
+
+.set DAIF_RD_FIQ_BIT, (1 << 6)
+.set DAIF_RD_IRQ_BIT, (1 << 7)
+
+.set SCTLR_ELx_M_BIT_POS, (0)
+
+ASM_FUNC(ArmReadMidr)
+ mrs x0, midr_el1 // Read from Main ID Register (MIDR)
+ ret
+
+ASM_FUNC(ArmCacheInfo)
+ mrs x0, ctr_el0 // Read from Cache Type Regiter (CTR)
+ ret
+
+ASM_FUNC(ArmGetInterruptState)
+ mrs x0, daif
+ tst w0, #DAIF_RD_IRQ_BIT // Check if IRQ is enabled. Enabled if 0 (Z=1)
+ cset w0, eq // if Z=1 return 1, else 0
+ ret
+
+ASM_FUNC(ArmGetFiqState)
+ mrs x0, daif
+ tst w0, #DAIF_RD_FIQ_BIT // Check if FIQ is enabled. Enabled if 0 (Z=1)
+ cset w0, eq // if Z=1 return 1, else 0
+ ret
+
+ASM_FUNC(ArmWriteCpacr)
+ msr cpacr_el1, x0 // Coprocessor Access Control Reg (CPACR)
+ ret
+
+ASM_FUNC(ArmWriteAuxCr)
+ EL1_OR_EL2(x1)
+1:msr actlr_el1, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
+ ret
+2:msr actlr_el2, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
+ ret
+
+ASM_FUNC(ArmReadAuxCr)
+ EL1_OR_EL2(x1)
+1:mrs x0, actlr_el1 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
+ ret
+2:mrs x0, actlr_el2 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
+ ret
+
+ASM_FUNC(ArmSetTTBR0)
+ EL1_OR_EL2_OR_EL3(x1)
+1:msr ttbr0_el1, x0 // Translation Table Base Reg 0 (TTBR0)
+ b 4f
+2:msr ttbr0_el2, x0 // Translation Table Base Reg 0 (TTBR0)
+ b 4f
+3:msr ttbr0_el3, x0 // Translation Table Base Reg 0 (TTBR0)
+4:isb
+ ret
+
+ASM_FUNC(ArmGetTTBR0BaseAddress)
+ EL1_OR_EL2(x1)
+1:mrs x0, ttbr0_el1
+ b 3f
+2:mrs x0, ttbr0_el2
+3:and x0, x0, 0xFFFFFFFFFFFF /* Look at bottom 48 bits */
+ isb
+ ret
+
+ASM_FUNC(ArmGetTCR)
+ EL1_OR_EL2_OR_EL3(x1)
+1:mrs x0, tcr_el1
+ b 4f
+2:mrs x0, tcr_el2
+ b 4f
+3:mrs x0, tcr_el3
+4:isb
+ ret
+
+ASM_FUNC(ArmSetTCR)
+ EL1_OR_EL2_OR_EL3(x1)
+1:msr tcr_el1, x0
+ b 4f
+2:msr tcr_el2, x0
+ b 4f
+3:msr tcr_el3, x0
+4:isb
+ ret
+
+ASM_FUNC(ArmGetMAIR)
+ EL1_OR_EL2_OR_EL3(x1)
+1:mrs x0, mair_el1
+ b 4f
+2:mrs x0, mair_el2
+ b 4f
+3:mrs x0, mair_el3
+4:isb
+ ret
+
+ASM_FUNC(ArmSetMAIR)
+ EL1_OR_EL2_OR_EL3(x1)
+1:msr mair_el1, x0
+ b 4f
+2:msr mair_el2, x0
+ b 4f
+3:msr mair_el3, x0
+4:isb
+ ret
+
+
+//
+//VOID
+//ArmUpdateTranslationTableEntry (
+// IN VOID *TranslationTableEntry // X0
+// IN VOID *MVA // X1
+// );
+ASM_FUNC(ArmUpdateTranslationTableEntry)
+ dsb nshst
+ lsr x1, x1, #12
+ EL1_OR_EL2_OR_EL3(x2)
+1: tlbi vaae1, x1 // TLB Invalidate VA , EL1
+ mrs x2, sctlr_el1
+ b 4f
+2: tlbi vae2, x1 // TLB Invalidate VA , EL2
+ mrs x2, sctlr_el2
+ b 4f
+3: tlbi vae3, x1 // TLB Invalidate VA , EL3
+ mrs x2, sctlr_el3
+4: tbnz x2, SCTLR_ELx_M_BIT_POS, 5f
+ dc ivac, x0 // invalidate in Dcache if MMU is still off
+5: dsb nsh
+ isb
+ ret
+
+ASM_FUNC(ArmInvalidateTlb)
+ EL1_OR_EL2_OR_EL3(x0)
+1: tlbi vmalle1
+ b 4f
+2: tlbi alle2
+ b 4f
+3: tlbi alle3
+4: dsb sy
+ isb
+ ret
+
+ASM_FUNC(ArmWriteCptr)
+ msr cptr_el3, x0 // EL3 Coprocessor Trap Reg (CPTR)
+ ret
+
+ASM_FUNC(ArmWriteScr)
+ msr scr_el3, x0 // Secure configuration register EL3
+ isb
+ ret
+
+ASM_FUNC(ArmWriteMVBar)
+ msr vbar_el3, x0 // Exception Vector Base address for Monitor on EL3
+ ret
+
+ASM_FUNC(ArmCallWFE)
+ wfe
+ ret
+
+ASM_FUNC(ArmCallSEV)
+ sev
+ ret
+
+ASM_FUNC(ArmReadCpuActlr)
+ mrs x0, S3_1_c15_c2_0
+ ret
+
+ASM_FUNC(ArmWriteCpuActlr)
+ msr S3_1_c15_c2_0, x0
+ dsb sy
+ isb
+ ret
+
+ASM_FUNC(ArmReadSctlr)
+ EL1_OR_EL2_OR_EL3(x1)
+1:mrs x0, sctlr_el1
+ ret
+2:mrs x0, sctlr_el2
+ ret
+3:mrs x0, sctlr_el3
+4:ret
+
+ASM_FUNC(ArmWriteSctlr)
+ EL1_OR_EL2_OR_EL3(x1)
+1:msr sctlr_el1, x0
+ ret
+2:msr sctlr_el2, x0
+ ret
+3:msr sctlr_el3, x0
+4:ret
+
+ASM_FUNC(ArmGetPhysicalAddressBits)
+ mrs x0, id_aa64mmfr0_el1
+ adr x1, .LPARanges
+ and x0, x0, #0xf
+ ldrb w0, [x1, x0]
+ ret
+
+//
+// Bits 0..3 of the AA64MFR0_EL1 system register encode the size of the
+// physical address space support on this CPU:
+// 0 == 32 bits, 1 == 36 bits, etc etc
+// 7 and up are reserved
+//
+.LPARanges:
+ .byte 32, 36, 40, 42, 44, 48, 52, 0
+ .byte 0, 0, 0, 0, 0, 0, 0, 0
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S new file mode 100644 index 000000000..0e8d21e22 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S @@ -0,0 +1,106 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLibV8.h>
+
+.set MPIDR_U_BIT, (30)
+.set MPIDR_U_MASK, (1 << MPIDR_U_BIT)
+
+// DAIF bit definitions for writing through msr daifclr/sr daifset
+.set DAIF_WR_FIQ_BIT, (1 << 0)
+.set DAIF_WR_IRQ_BIT, (1 << 1)
+.set DAIF_WR_ABORT_BIT, (1 << 2)
+.set DAIF_WR_DEBUG_BIT, (1 << 3)
+.set DAIF_WR_INT_BITS, (DAIF_WR_FIQ_BIT | DAIF_WR_IRQ_BIT)
+.set DAIF_WR_ALL, (DAIF_WR_DEBUG_BIT | DAIF_WR_ABORT_BIT | DAIF_WR_INT_BITS)
+
+
+ASM_FUNC(ArmIsMpCore)
+ mrs x0, mpidr_el1 // Read EL1 Multiprocessor Affinty Reg (MPIDR)
+ and x0, x0, #MPIDR_U_MASK // U Bit clear, the processor is part of a multiprocessor system
+ lsr x0, x0, #MPIDR_U_BIT
+ eor x0, x0, #1
+ ret
+
+
+ASM_FUNC(ArmEnableAsynchronousAbort)
+ msr daifclr, #DAIF_WR_ABORT_BIT
+ isb
+ ret
+
+
+ASM_FUNC(ArmDisableAsynchronousAbort)
+ msr daifset, #DAIF_WR_ABORT_BIT
+ isb
+ ret
+
+
+ASM_FUNC(ArmEnableIrq)
+ msr daifclr, #DAIF_WR_IRQ_BIT
+ isb
+ ret
+
+
+ASM_FUNC(ArmDisableIrq)
+ msr daifset, #DAIF_WR_IRQ_BIT
+ isb
+ ret
+
+
+ASM_FUNC(ArmEnableFiq)
+ msr daifclr, #DAIF_WR_FIQ_BIT
+ isb
+ ret
+
+
+ASM_FUNC(ArmDisableFiq)
+ msr daifset, #DAIF_WR_FIQ_BIT
+ isb
+ ret
+
+
+ASM_FUNC(ArmEnableInterrupts)
+ msr daifclr, #DAIF_WR_INT_BITS
+ isb
+ ret
+
+
+ASM_FUNC(ArmDisableInterrupts)
+ msr daifset, #DAIF_WR_INT_BITS
+ isb
+ ret
+
+
+ASM_FUNC(ArmDisableAllExceptions)
+ msr daifset, #DAIF_WR_ALL
+ isb
+ ret
+
+
+// UINT32
+// ReadCCSIDR (
+// IN UINT32 CSSELR
+// )
+ASM_FUNC(ReadCCSIDR)
+ msr csselr_el1, x0 // Write Cache Size Selection Register (CSSELR)
+ isb
+ mrs x0, ccsidr_el1 // Read current Cache Size ID Register (CCSIDR)
+ ret
+
+
+// UINT32
+// ReadCLIDR (
+// IN UINT32 CSSELR
+// )
+ASM_FUNC(ReadCLIDR)
+ mrs x0, clidr_el1 // Read Cache Level ID Register
+ ret
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S new file mode 100644 index 000000000..0856740e3 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S @@ -0,0 +1,170 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(ArmReadMidr)
+ mrc p15,0,R0,c0,c0,0
+ bx LR
+
+ASM_FUNC(ArmCacheInfo)
+ mrc p15,0,R0,c0,c0,1
+ bx LR
+
+ASM_FUNC(ArmGetInterruptState)
+ mrs R0,CPSR
+ tst R0,#0x80 @Check if IRQ is enabled.
+ moveq R0,#1
+ movne R0,#0
+ bx LR
+
+ASM_FUNC(ArmGetFiqState)
+ mrs R0,CPSR
+ tst R0,#0x40 @Check if FIQ is enabled.
+ moveq R0,#1
+ movne R0,#0
+ bx LR
+
+ASM_FUNC(ArmSetDomainAccessControl)
+ mcr p15,0,r0,c3,c0,0
+ bx lr
+
+ASM_FUNC(CPSRMaskInsert) @ on entry, r0 is the mask and r1 is the field to insert
+ stmfd sp!, {r4-r12, lr} @ save all the banked registers
+ mov r3, sp @ copy the stack pointer into a non-banked register
+ mrs r2, cpsr @ read the cpsr
+ bic r2, r2, r0 @ clear mask in the cpsr
+ and r1, r1, r0 @ clear bits outside the mask in the input
+ orr r2, r2, r1 @ set field
+ msr cpsr_cxsf, r2 @ write back cpsr (may have caused a mode switch)
+ isb
+ mov sp, r3 @ restore stack pointer
+ ldmfd sp!, {r4-r12, lr} @ restore registers
+ bx lr @ return (hopefully thumb-safe!)
+
+ASM_FUNC(CPSRRead)
+ mrs r0, cpsr
+ bx lr
+
+ASM_FUNC(ArmReadCpacr)
+ mrc p15, 0, r0, c1, c0, 2
+ bx lr
+
+ASM_FUNC(ArmWriteCpacr)
+ mcr p15, 0, r0, c1, c0, 2
+ isb
+ bx lr
+
+ASM_FUNC(ArmWriteAuxCr)
+ mcr p15, 0, r0, c1, c0, 1
+ bx lr
+
+ASM_FUNC(ArmReadAuxCr)
+ mrc p15, 0, r0, c1, c0, 1
+ bx lr
+
+ASM_FUNC(ArmSetTTBR0)
+ mcr p15,0,r0,c2,c0,0
+ isb
+ bx lr
+
+ASM_FUNC(ArmSetTTBCR)
+ mcr p15, 0, r0, c2, c0, 2
+ isb
+ bx lr
+
+ASM_FUNC(ArmGetTTBR0BaseAddress)
+ mrc p15,0,r0,c2,c0,0
+ MOV32 (r1, 0xFFFFC000)
+ and r0, r0, r1
+ isb
+ bx lr
+
+//
+//VOID
+//ArmUpdateTranslationTableEntry (
+// IN VOID *TranslationTableEntry // R0
+// IN VOID *MVA // R1
+// );
+ASM_FUNC(ArmUpdateTranslationTableEntry)
+ mcr p15,0,R1,c8,c7,1 @ TLBIMVA TLB Invalidate MVA
+ mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp
+ dsb
+ isb
+ bx lr
+
+ASM_FUNC(ArmInvalidateTlb)
+ mov r0,#0
+ mcr p15,0,r0,c8,c7,0
+ mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp
+ dsb
+ isb
+ bx lr
+
+ASM_FUNC(ArmReadScr)
+ mrc p15, 0, r0, c1, c1, 0
+ bx lr
+
+ASM_FUNC(ArmWriteScr)
+ mcr p15, 0, r0, c1, c1, 0
+ isb
+ bx lr
+
+ASM_FUNC(ArmReadHVBar)
+ mrc p15, 4, r0, c12, c0, 0
+ bx lr
+
+ASM_FUNC(ArmWriteHVBar)
+ mcr p15, 4, r0, c12, c0, 0
+ bx lr
+
+ASM_FUNC(ArmReadMVBar)
+ mrc p15, 0, r0, c12, c0, 1
+ bx lr
+
+ASM_FUNC(ArmWriteMVBar)
+ mcr p15, 0, r0, c12, c0, 1
+ bx lr
+
+ASM_FUNC(ArmCallWFE)
+ wfe
+ bx lr
+
+ASM_FUNC(ArmCallSEV)
+ sev
+ bx lr
+
+ASM_FUNC(ArmReadSctlr)
+ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
+ bx lr
+
+ASM_FUNC(ArmWriteSctlr)
+ mcr p15, 0, r0, c1, c0, 0
+ bx lr
+
+ASM_FUNC(ArmReadCpuActlr)
+ mrc p15, 0, r0, c1, c0, 1
+ bx lr
+
+ASM_FUNC(ArmWriteCpuActlr)
+ mcr p15, 0, r0, c1, c0, 1
+ dsb
+ isb
+ bx lr
+
+ASM_FUNC (ArmGetPhysicalAddressBits)
+ mrc p15, 0, r0, c0, c1, 4 // MMFR0
+ and r0, r0, #0xf // VMSA [3:0]
+ cmp r0, #5 // >= 5 implies LPAE support
+ movlt r0, #32 // 32 bits if no LPAE
+ movge r0, #40 // 40 bits if LPAE
+ bx lr
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm new file mode 100644 index 000000000..1265dddea --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm @@ -0,0 +1,174 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+// Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+ INCLUDE AsmMacroIoLib.inc
+
+
+ INCLUDE AsmMacroExport.inc
+
+ RVCT_ASM_EXPORT ArmReadMidr
+ mrc p15,0,R0,c0,c0,0
+ bx LR
+
+ RVCT_ASM_EXPORT ArmCacheInfo
+ mrc p15,0,R0,c0,c0,1
+ bx LR
+
+ RVCT_ASM_EXPORT ArmGetInterruptState
+ mrs R0,CPSR
+ tst R0,#0x80 // Check if IRQ is enabled.
+ moveq R0,#1
+ movne R0,#0
+ bx LR
+
+ RVCT_ASM_EXPORT ArmGetFiqState
+ mrs R0,CPSR
+ tst R0,#0x40 // Check if FIQ is enabled.
+ moveq R0,#1
+ movne R0,#0
+ bx LR
+
+ RVCT_ASM_EXPORT ArmSetDomainAccessControl
+ mcr p15,0,r0,c3,c0,0
+ bx lr
+
+ RVCT_ASM_EXPORT CPSRMaskInsert
+ stmfd sp!, {r4-r12, lr} // save all the banked registers
+ mov r3, sp // copy the stack pointer into a non-banked register
+ mrs r2, cpsr // read the cpsr
+ bic r2, r2, r0 // clear mask in the cpsr
+ and r1, r1, r0 // clear bits outside the mask in the input
+ orr r2, r2, r1 // set field
+ msr cpsr_cxsf, r2 // write back cpsr (may have caused a mode switch)
+ isb
+ mov sp, r3 // restore stack pointer
+ ldmfd sp!, {r4-r12, lr} // restore registers
+ bx lr // return (hopefully thumb-safe!) // return (hopefully thumb-safe!)
+
+ RVCT_ASM_EXPORT CPSRRead
+ mrs r0, cpsr
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCpacr
+ mrc p15, 0, r0, c1, c0, 2
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteCpacr
+ mcr p15, 0, r0, c1, c0, 2
+ isb
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteAuxCr
+ mcr p15, 0, r0, c1, c0, 1
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadAuxCr
+ mrc p15, 0, r0, c1, c0, 1
+ bx lr
+
+ RVCT_ASM_EXPORT ArmSetTTBR0
+ mcr p15,0,r0,c2,c0,0
+ isb
+ bx lr
+
+ RVCT_ASM_EXPORT ArmSetTTBCR
+ mcr p15, 0, r0, c2, c0, 2
+ isb
+ bx lr
+
+ RVCT_ASM_EXPORT ArmGetTTBR0BaseAddress
+ mrc p15,0,r0,c2,c0,0
+ MOV32 r1, 0xFFFFC000
+ and r0, r0, r1
+ isb
+ bx lr
+
+//
+//VOID
+//ArmUpdateTranslationTableEntry (
+// IN VOID *TranslationTableEntry // R0
+// IN VOID *MVA // R1
+// );
+ RVCT_ASM_EXPORT ArmUpdateTranslationTableEntry
+ mcr p15,0,R0,c7,c14,1 // DCCIMVAC Clean data cache by MVA
+ dsb
+ mcr p15,0,R1,c8,c7,1 // TLBIMVA TLB Invalidate MVA
+ mcr p15,0,R9,c7,c5,6 // BPIALL Invalidate Branch predictor array. R9 == NoOp
+ dsb
+ isb
+ bx lr
+
+ RVCT_ASM_EXPORT ArmInvalidateTlb
+ mov r0,#0
+ mcr p15,0,r0,c8,c7,0
+ mcr p15,0,R9,c7,c5,6 // BPIALL Invalidate Branch predictor array. R9 == NoOp
+ dsb
+ isb
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadScr
+ mrc p15, 0, r0, c1, c1, 0
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteScr
+ mcr p15, 0, r0, c1, c1, 0
+ isb
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadHVBar
+ mrc p15, 4, r0, c12, c0, 0
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteHVBar
+ mcr p15, 4, r0, c12, c0, 0
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadMVBar
+ mrc p15, 0, r0, c12, c0, 1
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteMVBar
+ mcr p15, 0, r0, c12, c0, 1
+ bx lr
+
+ RVCT_ASM_EXPORT ArmCallWFE
+ wfe
+ bx lr
+
+ RVCT_ASM_EXPORT ArmCallSEV
+ sev
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadSctlr
+ mrc p15, 0, r0, c1, c0, 0 // Read SCTLR into R0 (Read control register configuration data)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteSctlr
+ mcr p15, 0, r0, c1, c0, 0
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCpuActlr
+ mrc p15, 0, r0, c1, c0, 1
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteCpuActlr
+ mcr p15, 0, r0, c1, c0, 1
+ dsb
+ isb
+ bx lr
+
+ RVCT_ASM_EXPORT ArmGetPhysicalAddressBits
+ mrc p15, 0, r0, c0, c1, 4 ; MMFR0
+ and r0, r0, #0xf ; VMSA [3:0]
+ cmp r0, #5 ; >= 5 implies LPAE support
+ movlt r0, #32 ; 32 bits if no LPAE
+ movge r0, #40 ; 40 bits if LPAE
+ bx lr
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S new file mode 100644 index 000000000..01c91b10f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S @@ -0,0 +1,89 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(ArmIsMpCore)
+ mrc p15,0,R0,c0,c0,5
+ // Get Multiprocessing extension (bit31) & U bit (bit30)
+ and R0, R0, #0xC0000000
+ // if (bit31 == 1) && (bit30 == 0) then the processor is part of a multiprocessor system
+ cmp R0, #0x80000000
+ moveq R0, #1
+ movne R0, #0
+ bx LR
+
+ASM_FUNC(ArmEnableAsynchronousAbort)
+ cpsie a
+ isb
+ bx LR
+
+ASM_FUNC(ArmDisableAsynchronousAbort)
+ cpsid a
+ isb
+ bx LR
+
+ASM_FUNC(ArmEnableIrq)
+ cpsie i
+ isb
+ bx LR
+
+ASM_FUNC(ArmDisableIrq)
+ cpsid i
+ isb
+ bx LR
+
+ASM_FUNC(ArmEnableFiq)
+ cpsie f
+ isb
+ bx LR
+
+ASM_FUNC(ArmDisableFiq)
+ cpsid f
+ isb
+ bx LR
+
+ASM_FUNC(ArmEnableInterrupts)
+ cpsie if
+ isb
+ bx LR
+
+ASM_FUNC(ArmDisableInterrupts)
+ cpsid if
+ isb
+ bx LR
+
+// UINT32
+// ReadCCSIDR (
+// IN UINT32 CSSELR
+// )
+ASM_FUNC(ReadCCSIDR)
+ mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
+ isb
+ mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
+ bx lr
+
+// UINT32
+// ReadCLIDR (
+// IN UINT32 CSSELR
+// )
+ASM_FUNC(ReadCLIDR)
+ mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register
+ bx lr
+
+ASM_FUNC(ArmReadNsacr)
+ mrc p15, 0, r0, c1, c1, 2
+ bx lr
+
+ASM_FUNC(ArmWriteNsacr)
+ mcr p15, 0, r0, c1, c1, 2
+ bx lr
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm new file mode 100644 index 000000000..26ffa331b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm @@ -0,0 +1,93 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+
+ INCLUDE AsmMacroExport.inc
+
+
+//------------------------------------------------------------------------------
+
+ RVCT_ASM_EXPORT ArmIsMpCore
+ mrc p15,0,R0,c0,c0,5
+ // Get Multiprocessing extension (bit31) & U bit (bit30)
+ and R0, R0, #0xC0000000
+ // if (bit31 == 1) && (bit30 == 0) then the processor is part of a multiprocessor system
+ cmp R0, #0x80000000
+ moveq R0, #1
+ movne R0, #0
+ bx LR
+
+ RVCT_ASM_EXPORT ArmEnableAsynchronousAbort
+ cpsie a
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmDisableAsynchronousAbort
+ cpsid a
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmEnableIrq
+ cpsie i
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmDisableIrq
+ cpsid i
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmEnableFiq
+ cpsie f
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmDisableFiq
+ cpsid f
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmEnableInterrupts
+ cpsie if
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmDisableInterrupts
+ cpsid if
+ isb
+ bx LR
+
+// UINT32
+// ReadCCSIDR (
+// IN UINT32 CSSELR
+// )
+ RVCT_ASM_EXPORT ReadCCSIDR
+ mcr p15,2,r0,c0,c0,0 ; Write Cache Size Selection Register (CSSELR)
+ isb
+ mrc p15,1,r0,c0,c0,0 ; Read current CP15 Cache Size ID Register (CCSIDR)
+ bx lr
+
+// UINT32
+// ReadCLIDR (
+// IN UINT32 CSSELR
+// )
+ RVCT_ASM_EXPORT ReadCLIDR
+ mrc p15,1,r0,c0,c0,1 ; Read CP15 Cache Level ID Register
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadNsacr
+ mrc p15, 0, r0, c1, c1, 2
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteNsacr
+ mcr p15, 0, r0, c1, c1, 2
+ bx lr
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.S b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.S new file mode 100644 index 000000000..7abaa7963 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.S @@ -0,0 +1,92 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2011, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(ArmReadCntFrq)
+ mrc p15, 0, r0, c14, c0, 0 @ Read CNTFRQ
+ bx lr
+
+ASM_FUNC(ArmWriteCntFrq)
+ mcr p15, 0, r0, c14, c0, 0 @ Write to CNTFRQ
+ bx lr
+
+ASM_FUNC(ArmReadCntPct)
+ mrrc p15, 0, r0, r1, c14 @ Read CNTPT (Physical counter register)
+ bx lr
+
+ASM_FUNC(ArmReadCntkCtl)
+ mrc p15, 0, r0, c14, c1, 0 @ Read CNTK_CTL (Timer PL1 Control Register)
+ bx lr
+
+ASM_FUNC(ArmWriteCntkCtl)
+ mcr p15, 0, r0, c14, c1, 0 @ Write to CNTK_CTL (Timer PL1 Control Register)
+ bx lr
+
+ASM_FUNC(ArmReadCntpTval)
+ mrc p15, 0, r0, c14, c2, 0 @ Read CNTP_TVAL (PL1 physical timer value register)
+ bx lr
+
+ASM_FUNC(ArmWriteCntpTval)
+ mcr p15, 0, r0, c14, c2, 0 @ Write to CNTP_TVAL (PL1 physical timer value register)
+ bx lr
+
+ASM_FUNC(ArmReadCntpCtl)
+ mrc p15, 0, r0, c14, c2, 1 @ Read CNTP_CTL (PL1 Physical Timer Control Register)
+ bx lr
+
+ASM_FUNC(ArmWriteCntpCtl)
+ mcr p15, 0, r0, c14, c2, 1 @ Write to CNTP_CTL (PL1 Physical Timer Control Register)
+ bx lr
+
+ASM_FUNC(ArmReadCntvTval)
+ mrc p15, 0, r0, c14, c3, 0 @ Read CNTV_TVAL (Virtual Timer Value register)
+ bx lr
+
+ASM_FUNC(ArmWriteCntvTval)
+ mcr p15, 0, r0, c14, c3, 0 @ Write to CNTV_TVAL (Virtual Timer Value register)
+ bx lr
+
+ASM_FUNC(ArmReadCntvCtl)
+ mrc p15, 0, r0, c14, c3, 1 @ Read CNTV_CTL (Virtual Timer Control Register)
+ bx lr
+
+ASM_FUNC(ArmWriteCntvCtl)
+ mcr p15, 0, r0, c14, c3, 1 @ Write to CNTV_CTL (Virtual Timer Control Register)
+ bx lr
+
+ASM_FUNC(ArmReadCntvCt)
+ mrrc p15, 1, r0, r1, c14 @ Read CNTVCT (Virtual Count Register)
+ bx lr
+
+ASM_FUNC(ArmReadCntpCval)
+ mrrc p15, 2, r0, r1, c14 @ Read CNTP_CTVAL (Physical Timer Compare Value Register)
+ bx lr
+
+ASM_FUNC(ArmWriteCntpCval)
+ mcrr p15, 2, r0, r1, c14 @ Write to CNTP_CTVAL (Physical Timer Compare Value Register)
+ bx lr
+
+ASM_FUNC(ArmReadCntvCval)
+ mrrc p15, 3, r0, r1, c14 @ Read CNTV_CTVAL (Virtual Timer Compare Value Register)
+ bx lr
+
+ASM_FUNC(ArmWriteCntvCval)
+ mcrr p15, 3, r0, r1, c14 @ write to CNTV_CTVAL (Virtual Timer Compare Value Register)
+ bx lr
+
+ASM_FUNC(ArmReadCntvOff)
+ mrrc p15, 4, r0, r1, c14 @ Read CNTVOFF (virtual Offset register)
+ bx lr
+
+ASM_FUNC(ArmWriteCntvOff)
+ mcrr p15, 4, r0, r1, c14 @ Write to CNTVOFF (Virtual Offset register)
+ bx lr
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.asm b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.asm new file mode 100644 index 000000000..6896c1be2 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.asm @@ -0,0 +1,93 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2011, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+ INCLUDE AsmMacroExport.inc
+ PRESERVE8
+
+ RVCT_ASM_EXPORT ArmReadCntFrq
+ mrc p15, 0, r0, c14, c0, 0 ; Read CNTFRQ
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteCntFrq
+ mcr p15, 0, r0, c14, c0, 0 ; Write to CNTFRQ
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCntPct
+ mrrc p15, 0, r0, r1, c14 ; Read CNTPT (Physical counter register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCntkCtl
+ mrc p15, 0, r0, c14, c1, 0 ; Read CNTK_CTL (Timer PL1 Control Register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteCntkCtl
+ mcr p15, 0, r0, c14, c1, 0 ; Write to CNTK_CTL (Timer PL1 Control Register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCntpTval
+ mrc p15, 0, r0, c14, c2, 0 ; Read CNTP_TVAL (PL1 physical timer value register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteCntpTval
+ mcr p15, 0, r0, c14, c2, 0 ; Write to CNTP_TVAL (PL1 physical timer value register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCntpCtl
+ mrc p15, 0, r0, c14, c2, 1 ; Read CNTP_CTL (PL1 Physical Timer Control Register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteCntpCtl
+ mcr p15, 0, r0, c14, c2, 1 ; Write to CNTP_CTL (PL1 Physical Timer Control Register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCntvTval
+ mrc p15, 0, r0, c14, c3, 0 ; Read CNTV_TVAL (Virtual Timer Value register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteCntvTval
+ mcr p15, 0, r0, c14, c3, 0 ; Write to CNTV_TVAL (Virtual Timer Value register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCntvCtl
+ mrc p15, 0, r0, c14, c3, 1 ; Read CNTV_CTL (Virtual Timer Control Register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteCntvCtl
+ mcr p15, 0, r0, c14, c3, 1 ; Write to CNTV_CTL (Virtual Timer Control Register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCntvCt
+ mrrc p15, 1, r0, r1, c14 ; Read CNTVCT (Virtual Count Register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCntpCval
+ mrrc p15, 2, r0, r1, c14 ; Read CNTP_CTVAL (Physical Timer Compare Value Register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteCntpCval
+ mcrr p15, 2, r0, r1, c14 ; Write to CNTP_CTVAL (Physical Timer Compare Value Register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCntvCval
+ mrrc p15, 3, r0, r1, c14 ; Read CNTV_CTVAL (Virtual Timer Compare Value Register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteCntvCval
+ mcrr p15, 3, r0, r1, c14 ; write to CNTV_CTVAL (Virtual Timer Compare Value Register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadCntvOff
+ mrrc p15, 4, r0, r1, c14 ; Read CNTVOFF (virtual Offset register)
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteCntvOff
+ mcrr p15, 4, r0, r1, c14 ; Write to CNTVOFF (Virtual Offset register)
+ bx lr
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c new file mode 100644 index 000000000..2c4a23e1a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c @@ -0,0 +1,73 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h>
+
+#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
+
+#include <Chipset/ArmV7.h>
+
+#include "ArmV7Lib.h"
+#include "ArmLibPrivate.h"
+
+VOID
+ArmV7DataCacheOperation (
+ IN ARM_V7_CACHE_OPERATION DataCacheOperation
+ )
+{
+ UINTN SavedInterruptState;
+
+ SavedInterruptState = ArmGetInterruptState ();
+ ArmDisableInterrupts ();
+
+ ArmV7AllDataCachesOperation (DataCacheOperation);
+
+ ArmDataSynchronizationBarrier ();
+
+ if (SavedInterruptState) {
+ ArmEnableInterrupts ();
+ }
+}
+
+VOID
+EFIAPI
+ArmInvalidateDataCache (
+ VOID
+ )
+{
+ ASSERT (!ArmMmuEnabled ());
+
+ ArmDataSynchronizationBarrier ();
+ ArmV7DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
+}
+
+VOID
+EFIAPI
+ArmCleanInvalidateDataCache (
+ VOID
+ )
+{
+ ASSERT (!ArmMmuEnabled ());
+
+ ArmDataSynchronizationBarrier ();
+ ArmV7DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
+}
+
+VOID
+EFIAPI
+ArmCleanDataCache (
+ VOID
+ )
+{
+ ASSERT (!ArmMmuEnabled ());
+
+ ArmDataSynchronizationBarrier ();
+ ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h new file mode 100644 index 000000000..93183e672 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h @@ -0,0 +1,52 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __ARM_V7_LIB_H__
+#define __ARM_V7_LIB_H__
+
+#define ID_MMFR0_SHARELVL_SHIFT 12
+#define ID_MMFR0_SHARELVL_MASK 0xf
+#define ID_MMFR0_SHARELVL_ONE 0
+#define ID_MMFR0_SHARELVL_TWO 1
+
+#define ID_MMFR0_INNERSHR_SHIFT 28
+#define ID_MMFR0_INNERSHR_MASK 0xf
+#define ID_MMFR0_OUTERSHR_SHIFT 8
+#define ID_MMFR0_OUTERSHR_MASK 0xf
+
+#define ID_MMFR0_SHR_IMP_UNCACHED 0
+#define ID_MMFR0_SHR_IMP_HW_COHERENT 1
+#define ID_MMFR0_SHR_IGNORED 0xf
+
+typedef VOID (*ARM_V7_CACHE_OPERATION)(UINT32);
+
+VOID
+ArmV7AllDataCachesOperation (
+ IN ARM_V7_CACHE_OPERATION DataCacheOperation
+ );
+
+VOID
+EFIAPI
+ArmInvalidateDataCacheEntryBySetWay (
+ IN UINTN SetWayFormat
+ );
+
+VOID
+EFIAPI
+ArmCleanDataCacheEntryBySetWay (
+ IN UINTN SetWayFormat
+ );
+
+VOID
+EFIAPI
+ArmCleanInvalidateDataCacheEntryBySetWay (
+ IN UINTN SetWayFormat
+ );
+
+#endif // __ARM_V7_LIB_H__
+
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Support.S b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Support.S new file mode 100644 index 000000000..4925f6628 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Support.S @@ -0,0 +1,301 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+.set DC_ON, (0x1<<2)
+.set IC_ON, (0x1<<12)
+.set CTRL_M_BIT, (1 << 0)
+.set CTRL_C_BIT, (1 << 2)
+.set CTRL_B_BIT, (1 << 7)
+.set CTRL_I_BIT, (1 << 12)
+
+
+ASM_FUNC(ArmInvalidateDataCacheEntryByMVA)
+ mcr p15, 0, r0, c7, c6, 1 @invalidate single data cache line
+ bx lr
+
+ASM_FUNC(ArmCleanDataCacheEntryByMVA)
+ mcr p15, 0, r0, c7, c10, 1 @clean single data cache line
+ bx lr
+
+
+ASM_FUNC(ArmCleanDataCacheEntryToPoUByMVA)
+ mcr p15, 0, r0, c7, c11, 1 @clean single data cache line to PoU
+ bx lr
+
+ASM_FUNC(ArmInvalidateInstructionCacheEntryToPoUByMVA)
+ mcr p15, 0, r0, c7, c5, 1 @Invalidate single instruction cache line to PoU
+ mcr p15, 0, r0, c7, c5, 7 @Invalidate branch predictor
+ bx lr
+
+ASM_FUNC(ArmCleanInvalidateDataCacheEntryByMVA)
+ mcr p15, 0, r0, c7, c14, 1 @clean and invalidate single data cache line
+ bx lr
+
+
+ASM_FUNC(ArmInvalidateDataCacheEntryBySetWay)
+ mcr p15, 0, r0, c7, c6, 2 @ Invalidate this line
+ bx lr
+
+
+ASM_FUNC(ArmCleanInvalidateDataCacheEntryBySetWay)
+ mcr p15, 0, r0, c7, c14, 2 @ Clean and Invalidate this line
+ bx lr
+
+
+ASM_FUNC(ArmCleanDataCacheEntryBySetWay)
+ mcr p15, 0, r0, c7, c10, 2 @ Clean this line
+ bx lr
+
+ASM_FUNC(ArmInvalidateInstructionCache)
+ mcr p15,0,R0,c7,c5,0 @Invalidate entire instruction cache
+ dsb
+ isb
+ bx LR
+
+ASM_FUNC(ArmEnableMmu)
+ mrc p15,0,R0,c1,c0,0
+ orr R0,R0,#1
+ mcr p15,0,R0,c1,c0,0
+ dsb
+ isb
+ bx LR
+
+
+ASM_FUNC(ArmDisableMmu)
+ mrc p15,0,R0,c1,c0,0
+ bic R0,R0,#1
+ mcr p15,0,R0,c1,c0,0 @Disable MMU
+
+ mcr p15,0,R0,c8,c7,0 @Invalidate TLB
+ mcr p15,0,R0,c7,c5,6 @Invalidate Branch predictor array
+ dsb
+ isb
+ bx LR
+
+ASM_FUNC(ArmDisableCachesAndMmu)
+ mrc p15, 0, r0, c1, c0, 0 @ Get control register
+ bic r0, r0, #CTRL_M_BIT @ Disable MMU
+ bic r0, r0, #CTRL_C_BIT @ Disable D Cache
+ bic r0, r0, #CTRL_I_BIT @ Disable I Cache
+ mcr p15, 0, r0, c1, c0, 0 @ Write control register
+ dsb
+ isb
+ bx LR
+
+ASM_FUNC(ArmMmuEnabled)
+ mrc p15,0,R0,c1,c0,0
+ and R0,R0,#1
+ bx LR
+
+ASM_FUNC(ArmEnableDataCache)
+ ldr R1,=DC_ON
+ mrc p15,0,R0,c1,c0,0 @Read control register configuration data
+ orr R0,R0,R1 @Set C bit
+ mcr p15,0,r0,c1,c0,0 @Write control register configuration data
+ dsb
+ isb
+ bx LR
+
+ASM_FUNC(ArmDisableDataCache)
+ ldr R1,=DC_ON
+ mrc p15,0,R0,c1,c0,0 @Read control register configuration data
+ bic R0,R0,R1 @Clear C bit
+ mcr p15,0,r0,c1,c0,0 @Write control register configuration data
+ dsb
+ isb
+ bx LR
+
+ASM_FUNC(ArmEnableInstructionCache)
+ ldr R1,=IC_ON
+ mrc p15,0,R0,c1,c0,0 @Read control register configuration data
+ orr R0,R0,R1 @Set I bit
+ mcr p15,0,r0,c1,c0,0 @Write control register configuration data
+ dsb
+ isb
+ bx LR
+
+ASM_FUNC(ArmDisableInstructionCache)
+ ldr R1,=IC_ON
+ mrc p15,0,R0,c1,c0,0 @Read control register configuration data
+ bic R0,R0,R1 @Clear I bit.
+ mcr p15,0,r0,c1,c0,0 @Write control register configuration data
+ dsb
+ isb
+ bx LR
+
+ASM_FUNC(ArmEnableSWPInstruction)
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #0x00000400
+ mcr p15, 0, r0, c1, c0, 0
+ isb
+ bx LR
+
+ASM_FUNC(ArmEnableBranchPrediction)
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #0x00000800
+ mcr p15, 0, r0, c1, c0, 0
+ dsb
+ isb
+ bx LR
+
+ASM_FUNC(ArmDisableBranchPrediction)
+ mrc p15, 0, r0, c1, c0, 0
+ bic r0, r0, #0x00000800
+ mcr p15, 0, r0, c1, c0, 0
+ dsb
+ isb
+ bx LR
+
+ASM_FUNC(ArmSetLowVectors)
+ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
+ bic r0, r0, #0x00002000 @ clear V bit
+ mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)
+ isb
+ bx LR
+
+ASM_FUNC(ArmSetHighVectors)
+ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
+ orr r0, r0, #0x00002000 @ Set V bit
+ mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)
+ isb
+ bx LR
+
+ASM_FUNC(ArmV7AllDataCachesOperation)
+ stmfd SP!,{r4-r12, LR}
+ mov R1, R0 @ Save Function call in R1
+ mrc p15, 1, R6, c0, c0, 1 @ Read CLIDR
+ ands R3, R6, #0x7000000 @ Mask out all but Level of Coherency (LoC)
+ mov R3, R3, LSR #23 @ Cache level value (naturally aligned)
+ beq L_Finished
+ mov R10, #0
+
+Loop1:
+ add R2, R10, R10, LSR #1 @ Work out 3xcachelevel
+ mov R12, R6, LSR R2 @ bottom 3 bits are the Cache type for this level
+ and R12, R12, #7 @ get those 3 bits alone
+ cmp R12, #2
+ blt L_Skip @ no cache or only instruction cache at this level
+ mcr p15, 2, R10, c0, c0, 0 @ write the Cache Size selection register (CSSELR) // OR in 1 for Instruction
+ isb @ isb to sync the change to the CacheSizeID reg
+ mrc p15, 1, R12, c0, c0, 0 @ reads current Cache Size ID register (CCSIDR)
+ and R2, R12, #0x7 @ extract the line length field
+ add R2, R2, #4 @ add 4 for the line length offset (log2 16 bytes)
+@ ldr R4, =0x3FF
+ mov R4, #0x400
+ sub R4, R4, #1
+ ands R4, R4, R12, LSR #3 @ R4 is the max number on the way size (right aligned)
+ clz R5, R4 @ R5 is the bit position of the way size increment
+@ ldr R7, =0x00007FFF
+ mov R7, #0x00008000
+ sub R7, R7, #1
+ ands R7, R7, R12, LSR #13 @ R7 is the max number of the index size (right aligned)
+
+Loop2:
+ mov R9, R4 @ R9 working copy of the max way size (right aligned)
+
+Loop3:
+ orr R0, R10, R9, LSL R5 @ factor in the way number and cache number into R11
+ orr R0, R0, R7, LSL R2 @ factor in the index number
+
+ blx R1
+
+ subs R9, R9, #1 @ decrement the way number
+ bge Loop3
+ subs R7, R7, #1 @ decrement the index
+ bge Loop2
+L_Skip:
+ add R10, R10, #2 @ increment the cache number
+ cmp R3, R10
+ bgt Loop1
+
+L_Finished:
+ dsb
+ ldmfd SP!, {r4-r12, lr}
+ bx LR
+
+ASM_FUNC(ArmDataMemoryBarrier)
+ dmb
+ bx LR
+
+ASM_FUNC(ArmDataSynchronizationBarrier)
+ dsb
+ bx LR
+
+ASM_FUNC(ArmInstructionSynchronizationBarrier)
+ isb
+ bx LR
+
+ASM_FUNC(ArmReadVBar)
+ # Set the Address of the Vector Table in the VBAR register
+ mrc p15, 0, r0, c12, c0, 0
+ bx lr
+
+ASM_FUNC(ArmWriteVBar)
+ # Set the Address of the Vector Table in the VBAR register
+ mcr p15, 0, r0, c12, c0, 0
+ # Ensure the SCTLR.V bit is clear
+ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
+ bic r0, r0, #0x00002000 @ clear V bit
+ mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)
+ isb
+ bx lr
+
+ASM_FUNC(ArmEnableVFP)
+ # Read CPACR (Coprocessor Access Control Register)
+ mrc p15, 0, r0, c1, c0, 2
+ # Enable VPF access (Full Access to CP10, CP11) (V* instructions)
+ orr r0, r0, #0x00f00000
+ # Write back CPACR (Coprocessor Access Control Register)
+ mcr p15, 0, r0, c1, c0, 2
+ isb
+ # Set EN bit in FPEXC. The Advanced SIMD and VFP extensions are enabled and operate normally.
+ mov r0, #0x40000000
+#ifndef __clang__
+ mcr p10,#0x7,r0,c8,c0,#0
+#else
+ # Set the FPU model so Clang does not choke on the next instruction
+ .fpu neon
+ vmsr fpexc, r0
+#endif
+ bx lr
+
+ASM_FUNC(ArmCallWFI)
+ wfi
+ bx lr
+
+#Note: Return 0 in Uniprocessor implementation
+ASM_FUNC(ArmReadCbar)
+ mrc p15, 4, r0, c15, c0, 0 @ Read Configuration Base Address Register
+ bx lr
+
+ASM_FUNC(ArmReadMpidr)
+ mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
+ bx lr
+
+ASM_FUNC(ArmReadTpidrurw)
+ mrc p15, 0, r0, c13, c0, 2 @ read TPIDRURW
+ bx lr
+
+ASM_FUNC(ArmWriteTpidrurw)
+ mcr p15, 0, r0, c13, c0, 2 @ write TPIDRURW
+ bx lr
+
+ASM_FUNC(ArmIsArchTimerImplemented)
+ mrc p15, 0, r0, c0, c1, 1 @ Read ID_PFR1
+ and r0, r0, #0x000F0000
+ bx lr
+
+ASM_FUNC(ArmReadIdPfr1)
+ mrc p15, 0, r0, c0, c1, 1 @ Read ID_PFR1 Register
+ bx lr
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Support.asm b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Support.asm new file mode 100644 index 000000000..3146c2b52 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/Arm/ArmV7Support.asm @@ -0,0 +1,292 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+// Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+ INCLUDE AsmMacroExport.inc
+ PRESERVE8
+
+DC_ON EQU ( 0x1:SHL:2 )
+IC_ON EQU ( 0x1:SHL:12 )
+CTRL_M_BIT EQU (1 << 0)
+CTRL_C_BIT EQU (1 << 2)
+CTRL_B_BIT EQU (1 << 7)
+CTRL_I_BIT EQU (1 << 12)
+
+
+ RVCT_ASM_EXPORT ArmInvalidateDataCacheEntryByMVA
+ mcr p15, 0, r0, c7, c6, 1 ; invalidate single data cache line
+ bx lr
+
+ RVCT_ASM_EXPORT ArmCleanDataCacheEntryByMVA
+ mcr p15, 0, r0, c7, c10, 1 ; clean single data cache line
+ bx lr
+
+
+ RVCT_ASM_EXPORT ArmInvalidateInstructionCacheEntryToPoUByMVA
+ mcr p15, 0, r0, c7, c5, 1 ; invalidate single instruction cache line to PoU
+ mcr p15, 0, r0, c7, c5, 7 ; invalidate branch predictor
+ bx lr
+
+
+ RVCT_ASM_EXPORT ArmCleanDataCacheEntryToPoUByMVA
+ mcr p15, 0, r0, c7, c11, 1 ; clean single data cache line to PoU
+ bx lr
+
+
+ RVCT_ASM_EXPORT ArmCleanInvalidateDataCacheEntryByMVA
+ mcr p15, 0, r0, c7, c14, 1 ; clean and invalidate single data cache line
+ bx lr
+
+
+ RVCT_ASM_EXPORT ArmInvalidateDataCacheEntryBySetWay
+ mcr p15, 0, r0, c7, c6, 2 ; Invalidate this line
+ bx lr
+
+
+ RVCT_ASM_EXPORT ArmCleanInvalidateDataCacheEntryBySetWay
+ mcr p15, 0, r0, c7, c14, 2 ; Clean and Invalidate this line
+ bx lr
+
+
+ RVCT_ASM_EXPORT ArmCleanDataCacheEntryBySetWay
+ mcr p15, 0, r0, c7, c10, 2 ; Clean this line
+ bx lr
+
+
+ RVCT_ASM_EXPORT ArmInvalidateInstructionCache
+ mcr p15,0,R0,c7,c5,0 ;Invalidate entire instruction cache
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmEnableMmu
+ mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
+ orr R0,R0,#1 ; Set SCTLR.M bit : Enable MMU
+ mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
+ dsb
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmDisableMmu
+ mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
+ bic R0,R0,#1 ; Clear SCTLR.M bit : Disable MMU
+ mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
+
+ mcr p15,0,R0,c8,c7,0 ; TLBIALL : Invalidate unified TLB
+ mcr p15,0,R0,c7,c5,6 ; BPIALL : Invalidate entire branch predictor array
+ dsb
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmDisableCachesAndMmu
+ mrc p15, 0, r0, c1, c0, 0 ; Get control register
+ bic r0, r0, #CTRL_M_BIT ; Disable MMU
+ bic r0, r0, #CTRL_C_BIT ; Disable D Cache
+ bic r0, r0, #CTRL_I_BIT ; Disable I Cache
+ mcr p15, 0, r0, c1, c0, 0 ; Write control register
+ dsb
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmMmuEnabled
+ mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
+ and R0,R0,#1
+ bx LR
+
+ RVCT_ASM_EXPORT ArmEnableDataCache
+ ldr R1,=DC_ON ; Specify SCTLR.C bit : (Data) Cache enable bit
+ mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
+ orr R0,R0,R1 ; Set SCTLR.C bit : Data and unified caches enabled
+ mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
+ dsb
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmDisableDataCache
+ ldr R1,=DC_ON ; Specify SCTLR.C bit : (Data) Cache enable bit
+ mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
+ bic R0,R0,R1 ; Clear SCTLR.C bit : Data and unified caches disabled
+ mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
+ dsb
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmEnableInstructionCache
+ ldr R1,=IC_ON ; Specify SCTLR.I bit : Instruction cache enable bit
+ mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
+ orr R0,R0,R1 ; Set SCTLR.I bit : Instruction caches enabled
+ mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
+ dsb
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmDisableInstructionCache
+ ldr R1,=IC_ON ; Specify SCTLR.I bit : Instruction cache enable bit
+ mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
+ BIC R0,R0,R1 ; Clear SCTLR.I bit : Instruction caches disabled
+ mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmEnableSWPInstruction
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #0x00000400
+ mcr p15, 0, r0, c1, c0, 0
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmEnableBranchPrediction
+ mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)
+ orr r0, r0, #0x00000800 ;
+ mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
+ dsb
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmDisableBranchPrediction
+ mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)
+ bic r0, r0, #0x00000800 ;
+ mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
+ dsb
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmSetLowVectors
+ mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)
+ bic r0, r0, #0x00002000 ; clear V bit
+ mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmSetHighVectors
+ mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)
+ orr r0, r0, #0x00002000 ; Set V bit
+ mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmV7AllDataCachesOperation
+ stmfd SP!,{r4-r12, LR}
+ mov R1, R0 ; Save Function call in R1
+ mrc p15, 1, R6, c0, c0, 1 ; Read CLIDR
+ ands R3, R6, #&7000000 ; Mask out all but Level of Coherency (LoC)
+ mov R3, R3, LSR #23 ; Cache level value (naturally aligned)
+ beq Finished
+ mov R10, #0
+
+Loop1
+ add R2, R10, R10, LSR #1 ; Work out 3xcachelevel
+ mov R12, R6, LSR R2 ; bottom 3 bits are the Cache type for this level
+ and R12, R12, #7 ; get those 3 bits alone
+ cmp R12, #2
+ blt Skip ; no cache or only instruction cache at this level
+ mcr p15, 2, R10, c0, c0, 0 ; write the Cache Size selection register (CSSELR) // OR in 1 for Instruction
+ isb ; isb to sync the change to the CacheSizeID reg
+ mrc p15, 1, R12, c0, c0, 0 ; reads current Cache Size ID register (CCSIDR)
+ and R2, R12, #&7 ; extract the line length field
+ add R2, R2, #4 ; add 4 for the line length offset (log2 16 bytes)
+ ldr R4, =0x3FF
+ ands R4, R4, R12, LSR #3 ; R4 is the max number on the way size (right aligned)
+ clz R5, R4 ; R5 is the bit position of the way size increment
+ ldr R7, =0x00007FFF
+ ands R7, R7, R12, LSR #13 ; R7 is the max number of the index size (right aligned)
+
+Loop2
+ mov R9, R4 ; R9 working copy of the max way size (right aligned)
+
+Loop3
+ orr R0, R10, R9, LSL R5 ; factor in the way number and cache number into R11
+ orr R0, R0, R7, LSL R2 ; factor in the index number
+
+ blx R1
+
+ subs R9, R9, #1 ; decrement the way number
+ bge Loop3
+ subs R7, R7, #1 ; decrement the index
+ bge Loop2
+Skip
+ add R10, R10, #2 ; increment the cache number
+ cmp R3, R10
+ bgt Loop1
+
+Finished
+ dsb
+ ldmfd SP!, {r4-r12, lr}
+ bx LR
+
+ RVCT_ASM_EXPORT ArmDataMemoryBarrier
+ dmb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmDataSynchronizationBarrier
+ dsb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmInstructionSynchronizationBarrier
+ isb
+ bx LR
+
+ RVCT_ASM_EXPORT ArmReadVBar
+ // Set the Address of the Vector Table in the VBAR register
+ mrc p15, 0, r0, c12, c0, 0
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteVBar
+ // Set the Address of the Vector Table in the VBAR register
+ mcr p15, 0, r0, c12, c0, 0
+ // Ensure the SCTLR.V bit is clear
+ mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)
+ bic r0, r0, #0x00002000 ; clear V bit
+ mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
+ isb
+ bx lr
+
+ RVCT_ASM_EXPORT ArmEnableVFP
+ // Read CPACR (Coprocessor Access Control Register)
+ mrc p15, 0, r0, c1, c0, 2
+ // Enable VPF access (Full Access to CP10, CP11) (V* instructions)
+ orr r0, r0, #0x00f00000
+ // Write back CPACR (Coprocessor Access Control Register)
+ mcr p15, 0, r0, c1, c0, 2
+ isb
+ // Set EN bit in FPEXC. The Advanced SIMD and VFP extensions are enabled and operate normally.
+ mov r0, #0x40000000
+ mcr p10,#0x7,r0,c8,c0,#0
+ bx lr
+
+ RVCT_ASM_EXPORT ArmCallWFI
+ wfi
+ bx lr
+
+//Note: Return 0 in Uniprocessor implementation
+ RVCT_ASM_EXPORT ArmReadCbar
+ mrc p15, 4, r0, c15, c0, 0 //Read Configuration Base Address Register
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadMpidr
+ mrc p15, 0, r0, c0, c0, 5 ; read MPIDR
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadTpidrurw
+ mrc p15, 0, r0, c13, c0, 2 ; read TPIDRURW
+ bx lr
+
+ RVCT_ASM_EXPORT ArmWriteTpidrurw
+ mcr p15, 0, r0, c13, c0, 2 ; write TPIDRURW
+ bx lr
+
+ RVCT_ASM_EXPORT ArmIsArchTimerImplemented
+ mrc p15, 0, r0, c0, c1, 1 ; Read ID_PFR1
+ and r0, r0, #0x000F0000
+ bx lr
+
+ RVCT_ASM_EXPORT ArmReadIdPfr1
+ mrc p15, 0, r0, c0, c1, 1 ; Read ID_PFR1 Register
+ bx lr
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/ArmBaseLib.inf b/roms/edk2/ArmPkg/Library/ArmLib/ArmBaseLib.inf new file mode 100644 index 000000000..f61c71b67 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/ArmBaseLib.inf @@ -0,0 +1,55 @@ +#/** @file
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+# Portions copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Ltd. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmBaseLib
+ FILE_GUID = f1d943b6-99c5-46d5-af5a-66ec67662700
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmLib
+
+[Sources]
+ ArmLibPrivate.h
+ ArmLib.c
+
+[Sources.ARM]
+ Arm/ArmV7Lib.h
+ Arm/ArmV7Lib.c
+
+ Arm/ArmLibSupport.S | GCC
+ Arm/ArmLibSupportV7.S | GCC
+ Arm/ArmV7Support.S | GCC
+ Arm/ArmV7ArchTimerSupport.S | GCC
+
+ Arm/ArmLibSupport.asm | RVCT
+ Arm/ArmLibSupportV7.asm | RVCT
+ Arm/ArmV7Support.asm | RVCT
+ Arm/ArmV7ArchTimerSupport.asm | RVCT
+
+[Sources.AARCH64]
+ AArch64/AArch64Lib.h
+ AArch64/AArch64Lib.c
+
+ AArch64/ArmLibSupport.S
+ AArch64/ArmLibSupportV8.S
+ AArch64/AArch64Support.S
+ AArch64/AArch64ArchTimerSupport.S
+
+[LibraryClasses]
+ DebugLib
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+
+[FeaturePcd.ARM]
+ gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/ArmLib.c b/roms/edk2/ArmPkg/Library/ArmLib/ArmLib.c new file mode 100644 index 000000000..3905d02c5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/ArmLib.c @@ -0,0 +1,99 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h>
+
+#include <Library/ArmLib.h>
+
+#include "ArmLibPrivate.h"
+
+VOID
+EFIAPI
+ArmSetAuxCrBit (
+ IN UINT32 Bits
+ )
+{
+ UINT32 val = ArmReadAuxCr();
+ val |= Bits;
+ ArmWriteAuxCr(val);
+}
+
+VOID
+EFIAPI
+ArmUnsetAuxCrBit (
+ IN UINT32 Bits
+ )
+{
+ UINT32 val = ArmReadAuxCr();
+ val &= ~Bits;
+ ArmWriteAuxCr(val);
+}
+
+//
+// Helper functions for accessing CPUACTLR
+//
+
+VOID
+EFIAPI
+ArmSetCpuActlrBit (
+ IN UINTN Bits
+ )
+{
+ UINTN Value;
+ Value = ArmReadCpuActlr ();
+ Value |= Bits;
+ ArmWriteCpuActlr (Value);
+}
+
+VOID
+EFIAPI
+ArmUnsetCpuActlrBit (
+ IN UINTN Bits
+ )
+{
+ UINTN Value;
+ Value = ArmReadCpuActlr ();
+ Value &= ~Bits;
+ ArmWriteCpuActlr (Value);
+}
+
+UINTN
+EFIAPI
+ArmDataCacheLineLength (
+ VOID
+ )
+{
+ return 4 << ((ArmCacheInfo () >> 16) & 0xf); // CTR_EL0.DminLine
+}
+
+UINTN
+EFIAPI
+ArmInstructionCacheLineLength (
+ VOID
+ )
+{
+ return 4 << (ArmCacheInfo () & 0xf); // CTR_EL0.IminLine
+}
+
+UINTN
+EFIAPI
+ArmCacheWritebackGranule (
+ VOID
+ )
+{
+ UINTN CWG;
+
+ CWG = (ArmCacheInfo () >> 24) & 0xf; // CTR_EL0.CWG
+
+ if (CWG == 0) {
+ return SIZE_2KB;
+ }
+
+ return 4 << CWG;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmLib/ArmLibPrivate.h b/roms/edk2/ArmPkg/Library/ArmLib/ArmLibPrivate.h new file mode 100644 index 000000000..2e90739eb --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmLib/ArmLibPrivate.h @@ -0,0 +1,74 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __ARM_LIB_PRIVATE_H__
+#define __ARM_LIB_PRIVATE_H__
+
+#define CACHE_SIZE_4_KB (3UL)
+#define CACHE_SIZE_8_KB (4UL)
+#define CACHE_SIZE_16_KB (5UL)
+#define CACHE_SIZE_32_KB (6UL)
+#define CACHE_SIZE_64_KB (7UL)
+#define CACHE_SIZE_128_KB (8UL)
+
+#define CACHE_ASSOCIATIVITY_DIRECT (0UL)
+#define CACHE_ASSOCIATIVITY_4_WAY (2UL)
+#define CACHE_ASSOCIATIVITY_8_WAY (3UL)
+
+#define CACHE_PRESENT (0UL)
+#define CACHE_NOT_PRESENT (1UL)
+
+#define CACHE_LINE_LENGTH_32_BYTES (2UL)
+
+#define SIZE_FIELD_TO_CACHE_SIZE(x) (((x) >> 6) & 0x0F)
+#define SIZE_FIELD_TO_CACHE_ASSOCIATIVITY(x) (((x) >> 3) & 0x07)
+#define SIZE_FIELD_TO_CACHE_PRESENCE(x) (((x) >> 2) & 0x01)
+#define SIZE_FIELD_TO_CACHE_LINE_LENGTH(x) (((x) >> 0) & 0x03)
+
+#define DATA_CACHE_SIZE_FIELD(x) (((x) >> 12) & 0x0FFF)
+#define INSTRUCTION_CACHE_SIZE_FIELD(x) (((x) >> 0) & 0x0FFF)
+
+#define DATA_CACHE_SIZE(x) (SIZE_FIELD_TO_CACHE_SIZE(DATA_CACHE_SIZE_FIELD(x)))
+#define DATA_CACHE_ASSOCIATIVITY(x) (SIZE_FIELD_TO_CACHE_ASSOCIATIVITY(DATA_CACHE_SIZE_FIELD(x)))
+#define DATA_CACHE_PRESENT(x) (SIZE_FIELD_TO_CACHE_PRESENCE(DATA_CACHE_SIZE_FIELD(x)))
+#define DATA_CACHE_LINE_LENGTH(x) (SIZE_FIELD_TO_CACHE_LINE_LENGTH(DATA_CACHE_SIZE_FIELD(x)))
+
+#define INSTRUCTION_CACHE_SIZE(x) (SIZE_FIELD_TO_CACHE_SIZE(INSTRUCTION_CACHE_SIZE_FIELD(x)))
+#define INSTRUCTION_CACHE_ASSOCIATIVITY(x) (SIZE_FIELD_TO_CACHE_ASSOCIATIVITY(INSTRUCTION_CACHE_SIZE_FIELD(x)))
+#define INSTRUCTION_CACHE_PRESENT(x) (SIZE_FIELD_TO_CACHE_PRESENCE(INSTRUCTION_CACHE_SIZE_FIELD(x)))
+#define INSTRUCTION_CACHE_LINE_LENGTH(x) (SIZE_FIELD_TO_CACHE_LINE_LENGTH(INSTRUCTION_CACHE_SIZE_FIELD(x)))
+
+#define CACHE_TYPE(x) (((x) >> 25) & 0x0F)
+#define CACHE_TYPE_WRITE_BACK (0x0EUL)
+
+#define CACHE_ARCHITECTURE(x) (((x) >> 24) & 0x01)
+#define CACHE_ARCHITECTURE_UNIFIED (0UL)
+#define CACHE_ARCHITECTURE_SEPARATE (1UL)
+
+VOID
+CPSRMaskInsert (
+ IN UINT32 Mask,
+ IN UINT32 Value
+ );
+
+UINT32
+CPSRRead (
+ VOID
+ );
+
+UINT32
+ReadCCSIDR (
+ IN UINT32 CSSELR
+ );
+
+UINT32
+ReadCLIDR (
+ VOID
+ );
+
+#endif // __ARM_LIB_PRIVATE_H__
diff --git a/roms/edk2/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/roms/edk2/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c new file mode 100644 index 000000000..513a763e6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -0,0 +1,656 @@ +/** @file
+* File managing the MMU for ARMv8 architecture
+*
+* Copyright (c) 2011-2020, ARM Limited. All rights reserved.
+* Copyright (c) 2016, Linaro Limited. All rights reserved.
+* Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+#include <Chipset/AArch64.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/ArmLib.h>
+#include <Library/ArmMmuLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+
+STATIC
+UINT64
+ArmMemoryAttributeToPageAttribute (
+ IN ARM_MEMORY_REGION_ATTRIBUTES Attributes
+ )
+{
+ switch (Attributes) {
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:
+ return TT_ATTR_INDX_MEMORY_WRITE_BACK;
+
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
+ return TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
+
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
+ return TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
+
+ // Uncached and device mappings are treated as outer shareable by default,
+ case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED:
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED:
+ return TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
+
+ default:
+ ASSERT (0);
+ case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
+ if (ArmReadCurrentEL () == AARCH64_EL2)
+ return TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
+ else
+ return TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
+ }
+}
+
+#define MIN_T0SZ 16
+#define BITS_PER_LEVEL 9
+#define MAX_VA_BITS 48
+
+STATIC
+UINTN
+GetRootTableEntryCount (
+ IN UINTN T0SZ
+ )
+{
+ return TT_ENTRY_COUNT >> (T0SZ - MIN_T0SZ) % BITS_PER_LEVEL;
+}
+
+STATIC
+UINTN
+GetRootTableLevel (
+ IN UINTN T0SZ
+ )
+{
+ return (T0SZ - MIN_T0SZ) / BITS_PER_LEVEL;
+}
+
+STATIC
+VOID
+ReplaceTableEntry (
+ IN UINT64 *Entry,
+ IN UINT64 Value,
+ IN UINT64 RegionStart,
+ IN BOOLEAN IsLiveBlockMapping
+ )
+{
+ if (!ArmMmuEnabled () || !IsLiveBlockMapping) {
+ *Entry = Value;
+ ArmUpdateTranslationTableEntry (Entry, (VOID *)(UINTN)RegionStart);
+ } else {
+ ArmReplaceLiveTranslationEntry (Entry, Value, RegionStart);
+ }
+}
+
+STATIC
+VOID
+FreePageTablesRecursive (
+ IN UINT64 *TranslationTable,
+ IN UINTN Level
+ )
+{
+ UINTN Index;
+
+ ASSERT (Level <= 3);
+
+ if (Level < 3) {
+ for (Index = 0; Index < TT_ENTRY_COUNT; Index++) {
+ if ((TranslationTable[Index] & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
+ FreePageTablesRecursive ((VOID *)(UINTN)(TranslationTable[Index] &
+ TT_ADDRESS_MASK_BLOCK_ENTRY),
+ Level + 1);
+ }
+ }
+ }
+ FreePages (TranslationTable, 1);
+}
+
+STATIC
+BOOLEAN
+IsBlockEntry (
+ IN UINT64 Entry,
+ IN UINTN Level
+ )
+{
+ if (Level == 3) {
+ return (Entry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3;
+ }
+ return (Entry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY;
+}
+
+STATIC
+BOOLEAN
+IsTableEntry (
+ IN UINT64 Entry,
+ IN UINTN Level
+ )
+{
+ if (Level == 3) {
+ //
+ // TT_TYPE_TABLE_ENTRY aliases TT_TYPE_BLOCK_ENTRY_LEVEL3
+ // so we need to take the level into account as well.
+ //
+ return FALSE;
+ }
+ return (Entry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY;
+}
+
+STATIC
+EFI_STATUS
+UpdateRegionMappingRecursive (
+ IN UINT64 RegionStart,
+ IN UINT64 RegionEnd,
+ IN UINT64 AttributeSetMask,
+ IN UINT64 AttributeClearMask,
+ IN UINT64 *PageTable,
+ IN UINTN Level
+ )
+{
+ UINTN BlockShift;
+ UINT64 BlockMask;
+ UINT64 BlockEnd;
+ UINT64 *Entry;
+ UINT64 EntryValue;
+ VOID *TranslationTable;
+ EFI_STATUS Status;
+
+ ASSERT (((RegionStart | RegionEnd) & EFI_PAGE_MASK) == 0);
+
+ BlockShift = (Level + 1) * BITS_PER_LEVEL + MIN_T0SZ;
+ BlockMask = MAX_UINT64 >> BlockShift;
+
+ DEBUG ((DEBUG_VERBOSE, "%a(%d): %llx - %llx set %lx clr %lx\n", __FUNCTION__,
+ Level, RegionStart, RegionEnd, AttributeSetMask, AttributeClearMask));
+
+ for (; RegionStart < RegionEnd; RegionStart = BlockEnd) {
+ BlockEnd = MIN (RegionEnd, (RegionStart | BlockMask) + 1);
+ Entry = &PageTable[(RegionStart >> (64 - BlockShift)) & (TT_ENTRY_COUNT - 1)];
+
+ //
+ // If RegionStart or BlockEnd is not aligned to the block size at this
+ // level, we will have to create a table mapping in order to map less
+ // than a block, and recurse to create the block or page entries at
+ // the next level. No block mappings are allowed at all at level 0,
+ // so in that case, we have to recurse unconditionally.
+ // If we are changing a table entry and the AttributeClearMask is non-zero,
+ // we cannot replace it with a block entry without potentially losing
+ // attribute information, so keep the table entry in that case.
+ //
+ if (Level == 0 || ((RegionStart | BlockEnd) & BlockMask) != 0 ||
+ (IsTableEntry (*Entry, Level) && AttributeClearMask != 0)) {
+ ASSERT (Level < 3);
+
+ if (!IsTableEntry (*Entry, Level)) {
+ //
+ // No table entry exists yet, so we need to allocate a page table
+ // for the next level.
+ //
+ TranslationTable = AllocatePages (1);
+ if (TranslationTable == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ if (!ArmMmuEnabled ()) {
+ //
+ // Make sure we are not inadvertently hitting in the caches
+ // when populating the page tables.
+ //
+ InvalidateDataCacheRange (TranslationTable, EFI_PAGE_SIZE);
+ }
+
+ ZeroMem (TranslationTable, EFI_PAGE_SIZE);
+
+ if (IsBlockEntry (*Entry, Level)) {
+ //
+ // We are splitting an existing block entry, so we have to populate
+ // the new table with the attributes of the block entry it replaces.
+ //
+ Status = UpdateRegionMappingRecursive (RegionStart & ~BlockMask,
+ (RegionStart | BlockMask) + 1, *Entry & TT_ATTRIBUTES_MASK,
+ 0, TranslationTable, Level + 1);
+ if (EFI_ERROR (Status)) {
+ //
+ // The range we passed to UpdateRegionMappingRecursive () is block
+ // aligned, so it is guaranteed that no further pages were allocated
+ // by it, and so we only have to free the page we allocated here.
+ //
+ FreePages (TranslationTable, 1);
+ return Status;
+ }
+ }
+ } else {
+ TranslationTable = (VOID *)(UINTN)(*Entry & TT_ADDRESS_MASK_BLOCK_ENTRY);
+ }
+
+ //
+ // Recurse to the next level
+ //
+ Status = UpdateRegionMappingRecursive (RegionStart, BlockEnd,
+ AttributeSetMask, AttributeClearMask, TranslationTable,
+ Level + 1);
+ if (EFI_ERROR (Status)) {
+ if (!IsTableEntry (*Entry, Level)) {
+ //
+ // We are creating a new table entry, so on failure, we can free all
+ // allocations we made recursively, given that the whole subhierarchy
+ // has not been wired into the live page tables yet. (This is not
+ // possible for existing table entries, since we cannot revert the
+ // modifications we made to the subhierarchy it represents.)
+ //
+ FreePageTablesRecursive (TranslationTable, Level + 1);
+ }
+ return Status;
+ }
+
+ if (!IsTableEntry (*Entry, Level)) {
+ EntryValue = (UINTN)TranslationTable | TT_TYPE_TABLE_ENTRY;
+ ReplaceTableEntry (Entry, EntryValue, RegionStart,
+ IsBlockEntry (*Entry, Level));
+ }
+ } else {
+ EntryValue = (*Entry & AttributeClearMask) | AttributeSetMask;
+ EntryValue |= RegionStart;
+ EntryValue |= (Level == 3) ? TT_TYPE_BLOCK_ENTRY_LEVEL3
+ : TT_TYPE_BLOCK_ENTRY;
+
+ if (IsTableEntry (*Entry, Level)) {
+ //
+ // We are replacing a table entry with a block entry. This is only
+ // possible if we are keeping none of the original attributes.
+ // We can free the table entry's page table, and all the ones below
+ // it, since we are dropping the only possible reference to it.
+ //
+ ASSERT (AttributeClearMask == 0);
+ TranslationTable = (VOID *)(UINTN)(*Entry & TT_ADDRESS_MASK_BLOCK_ENTRY);
+ ReplaceTableEntry (Entry, EntryValue, RegionStart, TRUE);
+ FreePageTablesRecursive (TranslationTable, Level + 1);
+ } else {
+ ReplaceTableEntry (Entry, EntryValue, RegionStart, FALSE);
+ }
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+UpdateRegionMapping (
+ IN UINT64 RegionStart,
+ IN UINT64 RegionLength,
+ IN UINT64 AttributeSetMask,
+ IN UINT64 AttributeClearMask
+ )
+{
+ UINTN T0SZ;
+
+ if (((RegionStart | RegionLength) & EFI_PAGE_MASK)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;
+
+ return UpdateRegionMappingRecursive (RegionStart, RegionStart + RegionLength,
+ AttributeSetMask, AttributeClearMask, ArmGetTTBR0BaseAddress (),
+ GetRootTableLevel (T0SZ));
+}
+
+STATIC
+EFI_STATUS
+FillTranslationTable (
+ IN UINT64 *RootTable,
+ IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryRegion
+ )
+{
+ return UpdateRegionMapping (
+ MemoryRegion->VirtualBase,
+ MemoryRegion->Length,
+ ArmMemoryAttributeToPageAttribute (MemoryRegion->Attributes) | TT_AF,
+ 0
+ );
+}
+
+STATIC
+UINT64
+GcdAttributeToPageAttribute (
+ IN UINT64 GcdAttributes
+ )
+{
+ UINT64 PageAttributes;
+
+ switch (GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) {
+ case EFI_MEMORY_UC:
+ PageAttributes = TT_ATTR_INDX_DEVICE_MEMORY;
+ break;
+ case EFI_MEMORY_WC:
+ PageAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
+ break;
+ case EFI_MEMORY_WT:
+ PageAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
+ break;
+ case EFI_MEMORY_WB:
+ PageAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
+ break;
+ default:
+ PageAttributes = TT_ATTR_INDX_MASK;
+ break;
+ }
+
+ if ((GcdAttributes & EFI_MEMORY_XP) != 0 ||
+ (GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) == EFI_MEMORY_UC) {
+ if (ArmReadCurrentEL () == AARCH64_EL2) {
+ PageAttributes |= TT_XN_MASK;
+ } else {
+ PageAttributes |= TT_UXN_MASK | TT_PXN_MASK;
+ }
+ }
+
+ if ((GcdAttributes & EFI_MEMORY_RO) != 0) {
+ PageAttributes |= TT_AP_RO_RO;
+ }
+
+ return PageAttributes | TT_AF;
+}
+
+EFI_STATUS
+ArmSetMemoryAttributes (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Attributes
+ )
+{
+ UINT64 PageAttributes;
+ UINT64 PageAttributeMask;
+
+ PageAttributes = GcdAttributeToPageAttribute (Attributes);
+ PageAttributeMask = 0;
+
+ if ((Attributes & EFI_MEMORY_CACHETYPE_MASK) == 0) {
+ //
+ // No memory type was set in Attributes, so we are going to update the
+ // permissions only.
+ //
+ PageAttributes &= TT_AP_MASK | TT_UXN_MASK | TT_PXN_MASK;
+ PageAttributeMask = ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK |
+ TT_PXN_MASK | TT_XN_MASK);
+ }
+
+ return UpdateRegionMapping (BaseAddress, Length, PageAttributes,
+ PageAttributeMask);
+}
+
+STATIC
+EFI_STATUS
+SetMemoryRegionAttribute (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Attributes,
+ IN UINT64 BlockEntryMask
+ )
+{
+ return UpdateRegionMapping (BaseAddress, Length, Attributes, BlockEntryMask);
+}
+
+EFI_STATUS
+ArmSetMemoryRegionNoExec (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ UINT64 Val;
+
+ if (ArmReadCurrentEL () == AARCH64_EL1) {
+ Val = TT_PXN_MASK | TT_UXN_MASK;
+ } else {
+ Val = TT_XN_MASK;
+ }
+
+ return SetMemoryRegionAttribute (
+ BaseAddress,
+ Length,
+ Val,
+ ~TT_ADDRESS_MASK_BLOCK_ENTRY);
+}
+
+EFI_STATUS
+ArmClearMemoryRegionNoExec (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ UINT64 Mask;
+
+ // XN maps to UXN in the EL1&0 translation regime
+ Mask = ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_PXN_MASK | TT_XN_MASK);
+
+ return SetMemoryRegionAttribute (
+ BaseAddress,
+ Length,
+ 0,
+ Mask);
+}
+
+EFI_STATUS
+ArmSetMemoryRegionReadOnly (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ return SetMemoryRegionAttribute (
+ BaseAddress,
+ Length,
+ TT_AP_RO_RO,
+ ~TT_ADDRESS_MASK_BLOCK_ENTRY);
+}
+
+EFI_STATUS
+ArmClearMemoryRegionReadOnly (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ return SetMemoryRegionAttribute (
+ BaseAddress,
+ Length,
+ TT_AP_RW_RW,
+ ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK));
+}
+
+EFI_STATUS
+EFIAPI
+ArmConfigureMmu (
+ IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
+ OUT VOID **TranslationTableBase OPTIONAL,
+ OUT UINTN *TranslationTableSize OPTIONAL
+ )
+{
+ VOID* TranslationTable;
+ UINTN MaxAddressBits;
+ UINT64 MaxAddress;
+ UINTN T0SZ;
+ UINTN RootTableEntryCount;
+ UINT64 TCR;
+ EFI_STATUS Status;
+
+ if (MemoryTable == NULL) {
+ ASSERT (MemoryTable != NULL);
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Limit the virtual address space to what we can actually use: UEFI
+ // mandates a 1:1 mapping, so no point in making the virtual address
+ // space larger than the physical address space. We also have to take
+ // into account the architectural limitations that result from UEFI's
+ // use of 4 KB pages.
+ //
+ MaxAddressBits = MIN (ArmGetPhysicalAddressBits (), MAX_VA_BITS);
+ MaxAddress = LShiftU64 (1ULL, MaxAddressBits) - 1;
+
+ T0SZ = 64 - MaxAddressBits;
+ RootTableEntryCount = GetRootTableEntryCount (T0SZ);
+
+ //
+ // Set TCR that allows us to retrieve T0SZ in the subsequent functions
+ //
+ // Ideally we will be running at EL2, but should support EL1 as well.
+ // UEFI should not run at EL3.
+ if (ArmReadCurrentEL () == AARCH64_EL2) {
+ //Note: Bits 23 and 31 are reserved(RES1) bits in TCR_EL2
+ TCR = T0SZ | (1UL << 31) | (1UL << 23) | TCR_TG0_4KB;
+
+ // Set the Physical Address Size using MaxAddress
+ if (MaxAddress < SIZE_4GB) {
+ TCR |= TCR_PS_4GB;
+ } else if (MaxAddress < SIZE_64GB) {
+ TCR |= TCR_PS_64GB;
+ } else if (MaxAddress < SIZE_1TB) {
+ TCR |= TCR_PS_1TB;
+ } else if (MaxAddress < SIZE_4TB) {
+ TCR |= TCR_PS_4TB;
+ } else if (MaxAddress < SIZE_16TB) {
+ TCR |= TCR_PS_16TB;
+ } else if (MaxAddress < SIZE_256TB) {
+ TCR |= TCR_PS_256TB;
+ } else {
+ DEBUG ((DEBUG_ERROR,
+ "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n",
+ MaxAddress));
+ ASSERT (0); // Bigger than 48-bit memory space are not supported
+ return EFI_UNSUPPORTED;
+ }
+ } else if (ArmReadCurrentEL () == AARCH64_EL1) {
+ // Due to Cortex-A57 erratum #822227 we must set TG1[1] == 1, regardless of EPD1.
+ TCR = T0SZ | TCR_TG0_4KB | TCR_TG1_4KB | TCR_EPD1;
+
+ // Set the Physical Address Size using MaxAddress
+ if (MaxAddress < SIZE_4GB) {
+ TCR |= TCR_IPS_4GB;
+ } else if (MaxAddress < SIZE_64GB) {
+ TCR |= TCR_IPS_64GB;
+ } else if (MaxAddress < SIZE_1TB) {
+ TCR |= TCR_IPS_1TB;
+ } else if (MaxAddress < SIZE_4TB) {
+ TCR |= TCR_IPS_4TB;
+ } else if (MaxAddress < SIZE_16TB) {
+ TCR |= TCR_IPS_16TB;
+ } else if (MaxAddress < SIZE_256TB) {
+ TCR |= TCR_IPS_256TB;
+ } else {
+ DEBUG ((DEBUG_ERROR,
+ "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n",
+ MaxAddress));
+ ASSERT (0); // Bigger than 48-bit memory space are not supported
+ return EFI_UNSUPPORTED;
+ }
+ } else {
+ ASSERT (0); // UEFI is only expected to run at EL2 and EL1, not EL3.
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Translation table walks are always cache coherent on ARMv8-A, so cache
+ // maintenance on page tables is never needed. Since there is a risk of
+ // loss of coherency when using mismatched attributes, and given that memory
+ // is mapped cacheable except for extraordinary cases (such as non-coherent
+ // DMA), have the page table walker perform cached accesses as well, and
+ // assert below that that matches the attributes we use for CPU accesses to
+ // the region.
+ //
+ TCR |= TCR_SH_INNER_SHAREABLE |
+ TCR_RGN_OUTER_WRITE_BACK_ALLOC |
+ TCR_RGN_INNER_WRITE_BACK_ALLOC;
+
+ // Set TCR
+ ArmSetTCR (TCR);
+
+ // Allocate pages for translation table
+ TranslationTable = AllocatePages (1);
+ if (TranslationTable == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ //
+ // We set TTBR0 just after allocating the table to retrieve its location from
+ // the subsequent functions without needing to pass this value across the
+ // functions. The MMU is only enabled after the translation tables are
+ // populated.
+ //
+ ArmSetTTBR0 (TranslationTable);
+
+ if (TranslationTableBase != NULL) {
+ *TranslationTableBase = TranslationTable;
+ }
+
+ if (TranslationTableSize != NULL) {
+ *TranslationTableSize = RootTableEntryCount * sizeof (UINT64);
+ }
+
+ //
+ // Make sure we are not inadvertently hitting in the caches
+ // when populating the page tables.
+ //
+ InvalidateDataCacheRange (TranslationTable,
+ RootTableEntryCount * sizeof (UINT64));
+ ZeroMem (TranslationTable, RootTableEntryCount * sizeof (UINT64));
+
+ while (MemoryTable->Length != 0) {
+ Status = FillTranslationTable (TranslationTable, MemoryTable);
+ if (EFI_ERROR (Status)) {
+ goto FreeTranslationTable;
+ }
+ MemoryTable++;
+ }
+
+ //
+ // EFI_MEMORY_UC ==> MAIR_ATTR_DEVICE_MEMORY
+ // EFI_MEMORY_WC ==> MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE
+ // EFI_MEMORY_WT ==> MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH
+ // EFI_MEMORY_WB ==> MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK
+ //
+ ArmSetMAIR (
+ MAIR_ATTR (TT_ATTR_INDX_DEVICE_MEMORY, MAIR_ATTR_DEVICE_MEMORY) |
+ MAIR_ATTR (TT_ATTR_INDX_MEMORY_NON_CACHEABLE, MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE) |
+ MAIR_ATTR (TT_ATTR_INDX_MEMORY_WRITE_THROUGH, MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH) |
+ MAIR_ATTR (TT_ATTR_INDX_MEMORY_WRITE_BACK, MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK)
+ );
+
+ ArmDisableAlignmentCheck ();
+ ArmEnableStackAlignmentCheck ();
+ ArmEnableInstructionCache ();
+ ArmEnableDataCache ();
+
+ ArmEnableMmu ();
+ return EFI_SUCCESS;
+
+FreeTranslationTable:
+ FreePages (TranslationTable, 1);
+ return Status;
+}
+
+RETURN_STATUS
+EFIAPI
+ArmMmuBaseLibConstructor (
+ VOID
+ )
+{
+ extern UINT32 ArmReplaceLiveTranslationEntrySize;
+
+ //
+ // The ArmReplaceLiveTranslationEntry () helper function may be invoked
+ // with the MMU off so we have to ensure that it gets cleaned to the PoC
+ //
+ WriteBackDataCacheRange ((VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
+ ArmReplaceLiveTranslationEntrySize);
+
+ return RETURN_SUCCESS;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S b/roms/edk2/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S new file mode 100644 index 000000000..66ebca571 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S @@ -0,0 +1,74 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLibV8.h>
+
+ .set CTRL_M_BIT, (1 << 0)
+
+ .macro __replace_entry, el
+
+ // disable the MMU
+ mrs x8, sctlr_el\el
+ bic x9, x8, #CTRL_M_BIT
+ msr sctlr_el\el, x9
+ isb
+
+ // write updated entry
+ str x1, [x0]
+
+ // invalidate again to get rid of stale clean cachelines that may
+ // have been filled speculatively since the last invalidate
+ dmb sy
+ dc ivac, x0
+
+ // flush translations for the target address from the TLBs
+ lsr x2, x2, #12
+ .if \el == 1
+ tlbi vaae1, x2
+ .else
+ tlbi vae\el, x2
+ .endif
+ dsb nsh
+
+ // re-enable the MMU
+ msr sctlr_el\el, x8
+ isb
+ .endm
+
+//VOID
+//ArmReplaceLiveTranslationEntry (
+// IN UINT64 *Entry,
+// IN UINT64 Value,
+// IN UINT64 Address
+// )
+ASM_FUNC(ArmReplaceLiveTranslationEntry)
+
+ // disable interrupts
+ mrs x4, daif
+ msr daifset, #0xf
+ isb
+
+ // clean and invalidate first so that we don't clobber
+ // adjacent entries that are dirty in the caches
+ dc civac, x0
+ dsb nsh
+
+ EL1_OR_EL2_OR_EL3(x3)
+1:__replace_entry 1
+ b 4f
+2:__replace_entry 2
+ b 4f
+3:__replace_entry 3
+
+4:msr daif, x4
+ ret
+
+ASM_GLOBAL ASM_PFX(ArmReplaceLiveTranslationEntrySize)
+
+ASM_PFX(ArmReplaceLiveTranslationEntrySize):
+ .long . - ArmReplaceLiveTranslationEntry
diff --git a/roms/edk2/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c b/roms/edk2/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c new file mode 100644 index 000000000..80317923c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c @@ -0,0 +1,55 @@ +#/* @file
+#
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#*/
+
+#include <Base.h>
+
+#include <Library/ArmLib.h>
+#include <Library/ArmMmuLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/DebugLib.h>
+
+EFI_STATUS
+EFIAPI
+ArmMmuPeiLibConstructor (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ extern UINT32 ArmReplaceLiveTranslationEntrySize;
+
+ EFI_FV_FILE_INFO FileInfo;
+ EFI_STATUS Status;
+
+ ASSERT (FileHandle != NULL);
+
+ Status = (*PeiServices)->FfsGetFileInfo (FileHandle, &FileInfo);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Some platforms do not cope very well with cache maintenance being
+ // performed on regions backed by NOR flash. Since the firmware image
+ // can be assumed to be clean to the PoC when running XIP, even when PEI
+ // is executing from DRAM, we only need to perform the cache maintenance
+ // when not executing in place.
+ //
+ if ((UINTN)FileInfo.Buffer <= (UINTN)ArmReplaceLiveTranslationEntry &&
+ ((UINTN)FileInfo.Buffer + FileInfo.BufferSize >=
+ (UINTN)ArmReplaceLiveTranslationEntry + ArmReplaceLiveTranslationEntrySize)) {
+ DEBUG ((EFI_D_INFO, "ArmMmuLib: skipping cache maintenance on XIP PEIM\n"));
+ } else {
+ DEBUG ((EFI_D_INFO, "ArmMmuLib: performing cache maintenance on shadowed PEIM\n"));
+ //
+ // The ArmReplaceLiveTranslationEntry () helper function may be invoked
+ // with the MMU off so we have to ensure that it gets cleaned to the PoC
+ //
+ WriteBackDataCacheRange (ArmReplaceLiveTranslationEntry,
+ ArmReplaceLiveTranslationEntrySize);
+ }
+
+ return RETURN_SUCCESS;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibConvert.c b/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibConvert.c new file mode 100644 index 000000000..e3b02a9fb --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibConvert.c @@ -0,0 +1,32 @@ +/** @file
+* File managing the MMU for ARMv7 architecture
+*
+* Copyright (c) 2011-2016, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+
+#include <Library/ArmLib.h>
+
+#include <Chipset/ArmV7.h>
+
+UINT32
+ConvertSectionAttributesToPageAttributes (
+ IN UINT32 SectionAttributes,
+ IN BOOLEAN IsLargePage
+ )
+{
+ UINT32 PageAttributes;
+
+ PageAttributes = 0;
+ PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY (SectionAttributes, IsLargePage);
+ PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_AP (SectionAttributes);
+ PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_XN (SectionAttributes, IsLargePage);
+ PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_NG (SectionAttributes);
+ PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_S (SectionAttributes);
+
+ return PageAttributes;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c b/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c new file mode 100644 index 000000000..15e836e75 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c @@ -0,0 +1,413 @@ +/** @file
+* File managing the MMU for ARMv7 architecture
+*
+* Copyright (c) 2011-2016, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+#include <Chipset/ArmV7.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/ArmLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#define ID_MMFR0_SHARELVL_SHIFT 12
+#define ID_MMFR0_SHARELVL_MASK 0xf
+#define ID_MMFR0_SHARELVL_ONE 0
+#define ID_MMFR0_SHARELVL_TWO 1
+
+#define ID_MMFR0_INNERSHR_SHIFT 28
+#define ID_MMFR0_INNERSHR_MASK 0xf
+#define ID_MMFR0_OUTERSHR_SHIFT 8
+#define ID_MMFR0_OUTERSHR_MASK 0xf
+
+#define ID_MMFR0_SHR_IMP_UNCACHED 0
+#define ID_MMFR0_SHR_IMP_HW_COHERENT 1
+#define ID_MMFR0_SHR_IGNORED 0xf
+
+UINTN
+EFIAPI
+ArmReadIdMmfr0 (
+ VOID
+ );
+
+BOOLEAN
+EFIAPI
+ArmHasMpExtensions (
+ VOID
+ );
+
+STATIC
+BOOLEAN
+PreferNonshareableMemory (
+ VOID
+ )
+{
+ UINTN Mmfr;
+ UINTN Val;
+
+ if (FeaturePcdGet (PcdNormalMemoryNonshareableOverride)) {
+ return TRUE;
+ }
+
+ //
+ // Check whether the innermost level of shareability (the level we will use
+ // by default to map normal memory) is implemented with hardware coherency
+ // support. Otherwise, revert to mapping as non-shareable.
+ //
+ Mmfr = ArmReadIdMmfr0 ();
+ switch ((Mmfr >> ID_MMFR0_SHARELVL_SHIFT) & ID_MMFR0_SHARELVL_MASK) {
+ case ID_MMFR0_SHARELVL_ONE:
+ // one level of shareability
+ Val = (Mmfr >> ID_MMFR0_OUTERSHR_SHIFT) & ID_MMFR0_OUTERSHR_MASK;
+ break;
+ case ID_MMFR0_SHARELVL_TWO:
+ // two levels of shareability
+ Val = (Mmfr >> ID_MMFR0_INNERSHR_SHIFT) & ID_MMFR0_INNERSHR_MASK;
+ break;
+ default:
+ // unexpected value -> shareable is the safe option
+ ASSERT (FALSE);
+ return FALSE;
+ }
+ return Val != ID_MMFR0_SHR_IMP_HW_COHERENT;
+}
+
+STATIC
+VOID
+PopulateLevel2PageTable (
+ IN UINT32 *SectionEntry,
+ IN UINT32 PhysicalBase,
+ IN UINT32 RemainLength,
+ IN ARM_MEMORY_REGION_ATTRIBUTES Attributes
+ )
+{
+ UINT32* PageEntry;
+ UINT32 Pages;
+ UINT32 Index;
+ UINT32 PageAttributes;
+ UINT32 SectionDescriptor;
+ UINT32 TranslationTable;
+ UINT32 BaseSectionAddress;
+ UINT32 FirstPageOffset;
+
+ switch (Attributes) {
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
+ PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_BACK;
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:
+ PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_BACK;
+ PageAttributes &= ~TT_DESCRIPTOR_PAGE_S_SHARED;
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
+ PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_THROUGH;
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
+ PageAttributes = TT_DESCRIPTOR_PAGE_DEVICE;
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED:
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED:
+ PageAttributes = TT_DESCRIPTOR_PAGE_UNCACHED;
+ break;
+ default:
+ PageAttributes = TT_DESCRIPTOR_PAGE_UNCACHED;
+ break;
+ }
+
+ if (PreferNonshareableMemory ()) {
+ PageAttributes &= ~TT_DESCRIPTOR_PAGE_S_SHARED;
+ }
+
+ // Check if the Section Entry has already been populated. Otherwise attach a
+ // Level 2 Translation Table to it
+ if (*SectionEntry != 0) {
+ // The entry must be a page table. Otherwise it exists an overlapping in the memory map
+ if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(*SectionEntry)) {
+ TranslationTable = *SectionEntry & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK;
+ } else if ((*SectionEntry & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {
+ // Case where a virtual memory map descriptor overlapped a section entry
+
+ // Allocate a Level2 Page Table for this Section
+ TranslationTable = (UINTN)AllocateAlignedPages (
+ EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_PAGE_SIZE),
+ TRANSLATION_TABLE_PAGE_ALIGNMENT);
+
+ // Translate the Section Descriptor into Page Descriptor
+ SectionDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE | ConvertSectionAttributesToPageAttributes (*SectionEntry, FALSE);
+
+ BaseSectionAddress = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(*SectionEntry);
+
+ //
+ // Make sure we are not inadvertently hitting in the caches
+ // when populating the page tables
+ //
+ InvalidateDataCacheRange ((VOID *)TranslationTable,
+ TRANSLATION_TABLE_PAGE_SIZE);
+
+ // Populate the new Level2 Page Table for the section
+ PageEntry = (UINT32*)TranslationTable;
+ for (Index = 0; Index < TRANSLATION_TABLE_PAGE_COUNT; Index++) {
+ PageEntry[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseSectionAddress + (Index << 12)) | SectionDescriptor;
+ }
+
+ // Overwrite the section entry to point to the new Level2 Translation Table
+ *SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
+ (IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(Attributes) ? (1 << 3) : 0) |
+ TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
+ } else {
+ // We do not support the other section type (16MB Section)
+ ASSERT(0);
+ return;
+ }
+ } else {
+ TranslationTable = (UINTN)AllocateAlignedPages (
+ EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_PAGE_SIZE),
+ TRANSLATION_TABLE_PAGE_ALIGNMENT);
+ //
+ // Make sure we are not inadvertently hitting in the caches
+ // when populating the page tables
+ //
+ InvalidateDataCacheRange ((VOID *)TranslationTable,
+ TRANSLATION_TABLE_PAGE_SIZE);
+ ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_PAGE_SIZE);
+
+ *SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
+ (IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(Attributes) ? (1 << 3) : 0) |
+ TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
+ }
+
+ FirstPageOffset = (PhysicalBase & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
+ PageEntry = (UINT32 *)TranslationTable + FirstPageOffset;
+ Pages = RemainLength / TT_DESCRIPTOR_PAGE_SIZE;
+
+ ASSERT (FirstPageOffset + Pages <= TRANSLATION_TABLE_PAGE_COUNT);
+
+ for (Index = 0; Index < Pages; Index++) {
+ *PageEntry++ = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(PhysicalBase) | PageAttributes;
+ PhysicalBase += TT_DESCRIPTOR_PAGE_SIZE;
+ }
+
+ //
+ // Invalidate again to ensure that any line fetches that may have occurred
+ // [speculatively] since the previous invalidate are evicted again.
+ //
+ ArmDataMemoryBarrier ();
+ InvalidateDataCacheRange ((UINT32 *)TranslationTable + FirstPageOffset,
+ RemainLength / TT_DESCRIPTOR_PAGE_SIZE * sizeof (*PageEntry));
+}
+
+STATIC
+VOID
+FillTranslationTable (
+ IN UINT32 *TranslationTable,
+ IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryRegion
+ )
+{
+ UINT32 *SectionEntry;
+ UINT32 Attributes;
+ UINT32 PhysicalBase;
+ UINT64 RemainLength;
+ UINT32 PageMapLength;
+
+ ASSERT(MemoryRegion->Length > 0);
+
+ if (MemoryRegion->PhysicalBase >= SIZE_4GB) {
+ return;
+ }
+
+ PhysicalBase = MemoryRegion->PhysicalBase;
+ RemainLength = MIN(MemoryRegion->Length, SIZE_4GB - PhysicalBase);
+
+ switch (MemoryRegion->Attributes) {
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:
+ Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:
+ Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
+ Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
+ Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
+ Attributes = TT_DESCRIPTOR_SECTION_DEVICE(0);
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED:
+ Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(0);
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
+ Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1);
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:
+ Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1);
+ Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
+ Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(1);
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
+ Attributes = TT_DESCRIPTOR_SECTION_DEVICE(1);
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED:
+ Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(1);
+ break;
+ default:
+ Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(0);
+ break;
+ }
+
+ if (PreferNonshareableMemory ()) {
+ Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
+ }
+
+ // Get the first section entry for this mapping
+ SectionEntry = TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(TranslationTable, MemoryRegion->VirtualBase);
+
+ while (RemainLength != 0) {
+ if (PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE == 0 &&
+ RemainLength >= TT_DESCRIPTOR_SECTION_SIZE) {
+ // Case: Physical address aligned on the Section Size (1MB) && the length
+ // is greater than the Section Size
+ *SectionEntry = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(PhysicalBase) | Attributes;
+
+ //
+ // Issue a DMB to ensure that the page table entry update made it to
+ // memory before we issue the invalidate, otherwise, a subsequent
+ // speculative fetch could observe the old value.
+ //
+ ArmDataMemoryBarrier ();
+ ArmInvalidateDataCacheEntryByMVA ((UINTN)SectionEntry++);
+
+ PhysicalBase += TT_DESCRIPTOR_SECTION_SIZE;
+ RemainLength -= TT_DESCRIPTOR_SECTION_SIZE;
+ } else {
+ PageMapLength = MIN (RemainLength, TT_DESCRIPTOR_SECTION_SIZE -
+ (PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE));
+
+ // Case: Physical address aligned on the Section Size (1MB) && the length
+ // does not fill a section
+ // Case: Physical address NOT aligned on the Section Size (1MB)
+ PopulateLevel2PageTable (SectionEntry, PhysicalBase, PageMapLength,
+ MemoryRegion->Attributes);
+
+ //
+ // Issue a DMB to ensure that the page table entry update made it to
+ // memory before we issue the invalidate, otherwise, a subsequent
+ // speculative fetch could observe the old value.
+ //
+ ArmDataMemoryBarrier ();
+ ArmInvalidateDataCacheEntryByMVA ((UINTN)SectionEntry++);
+
+ // If it is the last entry
+ if (RemainLength < TT_DESCRIPTOR_SECTION_SIZE) {
+ break;
+ }
+
+ PhysicalBase += PageMapLength;
+ RemainLength -= PageMapLength;
+ }
+ }
+}
+
+RETURN_STATUS
+EFIAPI
+ArmConfigureMmu (
+ IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
+ OUT VOID **TranslationTableBase OPTIONAL,
+ OUT UINTN *TranslationTableSize OPTIONAL
+ )
+{
+ VOID *TranslationTable;
+ UINT32 TTBRAttributes;
+
+ TranslationTable = AllocateAlignedPages (
+ EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SECTION_SIZE),
+ TRANSLATION_TABLE_SECTION_ALIGNMENT);
+ if (TranslationTable == NULL) {
+ return RETURN_OUT_OF_RESOURCES;
+ }
+
+ if (TranslationTableBase != NULL) {
+ *TranslationTableBase = TranslationTable;
+ }
+
+ if (TranslationTableSize != NULL) {
+ *TranslationTableSize = TRANSLATION_TABLE_SECTION_SIZE;
+ }
+
+ //
+ // Make sure we are not inadvertently hitting in the caches
+ // when populating the page tables
+ //
+ InvalidateDataCacheRange (TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);
+ ZeroMem (TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);
+
+ while (MemoryTable->Length != 0) {
+ FillTranslationTable (TranslationTable, MemoryTable);
+ MemoryTable++;
+ }
+
+ TTBRAttributes = ArmHasMpExtensions () ? TTBR_MP_WRITE_BACK_ALLOC
+ : TTBR_WRITE_BACK_ALLOC;
+ if (TTBRAttributes & TTBR_SHAREABLE) {
+ if (PreferNonshareableMemory ()) {
+ TTBRAttributes ^= TTBR_SHAREABLE;
+ } else {
+ //
+ // Unlike the S bit in the short descriptors, which implies inner shareable
+ // on an implementation that supports two levels, the meaning of the S bit
+ // in the TTBR depends on the NOS bit, which defaults to Outer Shareable.
+ // However, we should only set this bit after we have confirmed that the
+ // implementation supports multiple levels, or else the NOS bit is UNK/SBZP
+ //
+ if (((ArmReadIdMmfr0 () >> 12) & 0xf) != 0) {
+ TTBRAttributes |= TTBR_NOT_OUTER_SHAREABLE;
+ }
+ }
+ }
+
+ ArmSetTTBR0 ((VOID *)((UINTN)TranslationTable | TTBRAttributes));
+
+ //
+ // The TTBCR register value is undefined at reset in the Non-Secure world.
+ // Writing 0 has the effect of:
+ // Clearing EAE: Use short descriptors, as mandated by specification.
+ // Clearing PD0 and PD1: Translation Table Walk Disable is off.
+ // Clearing N: Perform all translation table walks through TTBR0.
+ // (0 is the default reset value in systems not implementing
+ // the Security Extensions.)
+ //
+ ArmSetTTBCR (0);
+
+ ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |
+ DOMAIN_ACCESS_CONTROL_NONE(14) |
+ DOMAIN_ACCESS_CONTROL_NONE(13) |
+ DOMAIN_ACCESS_CONTROL_NONE(12) |
+ DOMAIN_ACCESS_CONTROL_NONE(11) |
+ DOMAIN_ACCESS_CONTROL_NONE(10) |
+ DOMAIN_ACCESS_CONTROL_NONE( 9) |
+ DOMAIN_ACCESS_CONTROL_NONE( 8) |
+ DOMAIN_ACCESS_CONTROL_NONE( 7) |
+ DOMAIN_ACCESS_CONTROL_NONE( 6) |
+ DOMAIN_ACCESS_CONTROL_NONE( 5) |
+ DOMAIN_ACCESS_CONTROL_NONE( 4) |
+ DOMAIN_ACCESS_CONTROL_NONE( 3) |
+ DOMAIN_ACCESS_CONTROL_NONE( 2) |
+ DOMAIN_ACCESS_CONTROL_NONE( 1) |
+ DOMAIN_ACCESS_CONTROL_CLIENT(0));
+
+ ArmEnableInstructionCache();
+ ArmEnableDataCache();
+ ArmEnableMmu();
+ return RETURN_SUCCESS;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c b/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c new file mode 100644 index 000000000..1ec734dea --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c @@ -0,0 +1,435 @@ +/** @file
+* File managing the MMU for ARMv7 architecture
+*
+* Copyright (c) 2011-2016, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+
+#include <Library/ArmLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/MemoryAllocationLib.h>
+
+#include <Chipset/ArmV7.h>
+
+#define __EFI_MEMORY_RWX 0 // no restrictions
+
+#define CACHE_ATTRIBUTE_MASK (EFI_MEMORY_UC | \
+ EFI_MEMORY_WC | \
+ EFI_MEMORY_WT | \
+ EFI_MEMORY_WB | \
+ EFI_MEMORY_UCE | \
+ EFI_MEMORY_WP)
+
+STATIC
+EFI_STATUS
+ConvertSectionToPages (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress
+ )
+{
+ UINT32 FirstLevelIdx;
+ UINT32 SectionDescriptor;
+ UINT32 PageTableDescriptor;
+ UINT32 PageDescriptor;
+ UINT32 Index;
+
+ volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
+ volatile ARM_PAGE_TABLE_ENTRY *PageTable;
+
+ DEBUG ((DEBUG_PAGE, "Converting section at 0x%x to pages\n", (UINTN)BaseAddress));
+
+ // Obtain page table base
+ FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
+
+ // Calculate index into first level translation table for start of modification
+ FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
+ ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
+
+ // Get section attributes and convert to page attributes
+ SectionDescriptor = FirstLevelTable[FirstLevelIdx];
+ PageDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE | ConvertSectionAttributesToPageAttributes (SectionDescriptor, FALSE);
+
+ // Allocate a page table for the 4KB entries (we use up a full page even though we only need 1KB)
+ PageTable = (volatile ARM_PAGE_TABLE_ENTRY *)AllocatePages (1);
+ if (PageTable == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ // Write the page table entries out
+ for (Index = 0; Index < TRANSLATION_TABLE_PAGE_COUNT; Index++) {
+ PageTable[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseAddress + (Index << 12)) | PageDescriptor;
+ }
+
+ // Formulate page table entry, Domain=0, NS=0
+ PageTableDescriptor = (((UINTN)PageTable) & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) | TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
+
+ // Write the page table entry out, replacing section entry
+ FirstLevelTable[FirstLevelIdx] = PageTableDescriptor;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+UpdatePageEntries (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Attributes,
+ OUT BOOLEAN *FlushTlbs OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ UINT32 EntryValue;
+ UINT32 EntryMask;
+ UINT32 FirstLevelIdx;
+ UINT32 Offset;
+ UINT32 NumPageEntries;
+ UINT32 Descriptor;
+ UINT32 p;
+ UINT32 PageTableIndex;
+ UINT32 PageTableEntry;
+ UINT32 CurrentPageTableEntry;
+ VOID *Mva;
+
+ volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
+ volatile ARM_PAGE_TABLE_ENTRY *PageTable;
+
+ Status = EFI_SUCCESS;
+
+ // EntryMask: bitmask of values to change (1 = change this value, 0 = leave alone)
+ // EntryValue: values at bit positions specified by EntryMask
+ EntryMask = TT_DESCRIPTOR_PAGE_TYPE_MASK | TT_DESCRIPTOR_PAGE_AP_MASK;
+ if (Attributes & EFI_MEMORY_XP) {
+ EntryValue = TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN;
+ } else {
+ EntryValue = TT_DESCRIPTOR_PAGE_TYPE_PAGE;
+ }
+
+ // Although the PI spec is unclear on this, the GCD guarantees that only
+ // one Attribute bit is set at a time, so the order of the conditionals below
+ // is irrelevant. If no memory attribute is specified, we preserve whatever
+ // memory type is set in the page tables, and update the permission attributes
+ // only.
+ if (Attributes & EFI_MEMORY_UC) {
+ // modify cacheability attributes
+ EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
+ // map to strongly ordered
+ EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
+ } else if (Attributes & EFI_MEMORY_WC) {
+ // modify cacheability attributes
+ EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
+ // map to normal non-cachable
+ EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
+ } else if (Attributes & EFI_MEMORY_WT) {
+ // modify cacheability attributes
+ EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
+ // write through with no-allocate
+ EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0
+ } else if (Attributes & EFI_MEMORY_WB) {
+ // modify cacheability attributes
+ EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
+ // write back (with allocate)
+ EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1
+ } else if (Attributes & CACHE_ATTRIBUTE_MASK) {
+ // catch unsupported memory type attributes
+ ASSERT (FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ if (Attributes & EFI_MEMORY_RO) {
+ EntryValue |= TT_DESCRIPTOR_PAGE_AP_RO_RO;
+ } else {
+ EntryValue |= TT_DESCRIPTOR_PAGE_AP_RW_RW;
+ }
+
+ // Obtain page table base
+ FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
+
+ // Calculate number of 4KB page table entries to change
+ NumPageEntries = Length / TT_DESCRIPTOR_PAGE_SIZE;
+
+ // Iterate for the number of 4KB pages to change
+ Offset = 0;
+ for(p = 0; p < NumPageEntries; p++) {
+ // Calculate index into first level translation table for page table value
+
+ FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress + Offset) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
+ ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
+
+ // Read the descriptor from the first level page table
+ Descriptor = FirstLevelTable[FirstLevelIdx];
+
+ // Does this descriptor need to be converted from section entry to 4K pages?
+ if (!TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Descriptor)) {
+ Status = ConvertSectionToPages (FirstLevelIdx << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
+ if (EFI_ERROR(Status)) {
+ // Exit for loop
+ break;
+ }
+
+ // Re-read descriptor
+ Descriptor = FirstLevelTable[FirstLevelIdx];
+ if (FlushTlbs != NULL) {
+ *FlushTlbs = TRUE;
+ }
+ }
+
+ // Obtain page table base address
+ PageTable = (ARM_PAGE_TABLE_ENTRY *)TT_DESCRIPTOR_PAGE_BASE_ADDRESS(Descriptor);
+
+ // Calculate index into the page table
+ PageTableIndex = ((BaseAddress + Offset) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
+ ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT);
+
+ // Get the entry
+ CurrentPageTableEntry = PageTable[PageTableIndex];
+
+ // Mask off appropriate fields
+ PageTableEntry = CurrentPageTableEntry & ~EntryMask;
+
+ // Mask in new attributes and/or permissions
+ PageTableEntry |= EntryValue;
+
+ if (CurrentPageTableEntry != PageTableEntry) {
+ Mva = (VOID *)(UINTN)((((UINTN)FirstLevelIdx) << TT_DESCRIPTOR_SECTION_BASE_SHIFT) + (PageTableIndex << TT_DESCRIPTOR_PAGE_BASE_SHIFT));
+
+ // Only need to update if we are changing the entry
+ PageTable[PageTableIndex] = PageTableEntry;
+ ArmUpdateTranslationTableEntry ((VOID *)&PageTable[PageTableIndex], Mva);
+ }
+
+ Status = EFI_SUCCESS;
+ Offset += TT_DESCRIPTOR_PAGE_SIZE;
+
+ } // End first level translation table loop
+
+ return Status;
+}
+
+STATIC
+EFI_STATUS
+UpdateSectionEntries (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Attributes
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ UINT32 EntryMask;
+ UINT32 EntryValue;
+ UINT32 FirstLevelIdx;
+ UINT32 NumSections;
+ UINT32 i;
+ UINT32 CurrentDescriptor;
+ UINT32 Descriptor;
+ VOID *Mva;
+ volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
+
+ // EntryMask: bitmask of values to change (1 = change this value, 0 = leave alone)
+ // EntryValue: values at bit positions specified by EntryMask
+
+ // Make sure we handle a section range that is unmapped
+ EntryMask = TT_DESCRIPTOR_SECTION_TYPE_MASK | TT_DESCRIPTOR_SECTION_XN_MASK |
+ TT_DESCRIPTOR_SECTION_AP_MASK;
+ EntryValue = TT_DESCRIPTOR_SECTION_TYPE_SECTION;
+
+ // Although the PI spec is unclear on this, the GCD guarantees that only
+ // one Attribute bit is set at a time, so the order of the conditionals below
+ // is irrelevant. If no memory attribute is specified, we preserve whatever
+ // memory type is set in the page tables, and update the permission attributes
+ // only.
+ if (Attributes & EFI_MEMORY_UC) {
+ // modify cacheability attributes
+ EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
+ // map to strongly ordered
+ EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
+ } else if (Attributes & EFI_MEMORY_WC) {
+ // modify cacheability attributes
+ EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
+ // map to normal non-cachable
+ EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
+ } else if (Attributes & EFI_MEMORY_WT) {
+ // modify cacheability attributes
+ EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
+ // write through with no-allocate
+ EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0
+ } else if (Attributes & EFI_MEMORY_WB) {
+ // modify cacheability attributes
+ EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
+ // write back (with allocate)
+ EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1
+ } else if (Attributes & CACHE_ATTRIBUTE_MASK) {
+ // catch unsupported memory type attributes
+ ASSERT (FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ if (Attributes & EFI_MEMORY_RO) {
+ EntryValue |= TT_DESCRIPTOR_SECTION_AP_RO_RO;
+ } else {
+ EntryValue |= TT_DESCRIPTOR_SECTION_AP_RW_RW;
+ }
+
+ if (Attributes & EFI_MEMORY_XP) {
+ EntryValue |= TT_DESCRIPTOR_SECTION_XN_MASK;
+ }
+
+ // obtain page table base
+ FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
+
+ // calculate index into first level translation table for start of modification
+ FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
+ ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
+
+ // calculate number of 1MB first level entries this applies to
+ NumSections = Length / TT_DESCRIPTOR_SECTION_SIZE;
+
+ // iterate through each descriptor
+ for(i=0; i<NumSections; i++) {
+ CurrentDescriptor = FirstLevelTable[FirstLevelIdx + i];
+
+ // has this descriptor already been converted to pages?
+ if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(CurrentDescriptor)) {
+ // forward this 1MB range to page table function instead
+ Status = UpdatePageEntries (
+ (FirstLevelIdx + i) << TT_DESCRIPTOR_SECTION_BASE_SHIFT,
+ TT_DESCRIPTOR_SECTION_SIZE,
+ Attributes,
+ NULL);
+ } else {
+ // still a section entry
+
+ if (CurrentDescriptor != 0) {
+ // mask off appropriate fields
+ Descriptor = CurrentDescriptor & ~EntryMask;
+ } else {
+ Descriptor = ((UINTN)FirstLevelIdx + i) << TT_DESCRIPTOR_SECTION_BASE_SHIFT;
+ }
+
+ // mask in new attributes and/or permissions
+ Descriptor |= EntryValue;
+
+ if (CurrentDescriptor != Descriptor) {
+ Mva = (VOID *)(UINTN)(((UINTN)FirstLevelIdx + i) << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
+
+ // Only need to update if we are changing the descriptor
+ FirstLevelTable[FirstLevelIdx + i] = Descriptor;
+ ArmUpdateTranslationTableEntry ((VOID *)&FirstLevelTable[FirstLevelIdx + i], Mva);
+ }
+
+ Status = EFI_SUCCESS;
+ }
+ }
+
+ return Status;
+}
+
+EFI_STATUS
+ArmSetMemoryAttributes (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Attributes
+ )
+{
+ EFI_STATUS Status;
+ UINT64 ChunkLength;
+ BOOLEAN FlushTlbs;
+
+ if (BaseAddress > (UINT64)MAX_ADDRESS) {
+ return EFI_UNSUPPORTED;
+ }
+
+ Length = MIN (Length, (UINT64)MAX_ADDRESS - BaseAddress + 1);
+ if (Length == 0) {
+ return EFI_SUCCESS;
+ }
+
+ FlushTlbs = FALSE;
+ while (Length > 0) {
+ if ((BaseAddress % TT_DESCRIPTOR_SECTION_SIZE == 0) &&
+ Length >= TT_DESCRIPTOR_SECTION_SIZE) {
+
+ ChunkLength = Length - Length % TT_DESCRIPTOR_SECTION_SIZE;
+
+ DEBUG ((DEBUG_PAGE,
+ "SetMemoryAttributes(): MMU section 0x%lx length 0x%lx to %lx\n",
+ BaseAddress, ChunkLength, Attributes));
+
+ Status = UpdateSectionEntries (BaseAddress, ChunkLength, Attributes);
+
+ FlushTlbs = TRUE;
+ } else {
+
+ //
+ // Process page by page until the next section boundary, but only if
+ // we have more than a section's worth of area to deal with after that.
+ //
+ ChunkLength = TT_DESCRIPTOR_SECTION_SIZE -
+ (BaseAddress % TT_DESCRIPTOR_SECTION_SIZE);
+ if (ChunkLength + TT_DESCRIPTOR_SECTION_SIZE > Length) {
+ ChunkLength = Length;
+ }
+
+ DEBUG ((DEBUG_PAGE,
+ "SetMemoryAttributes(): MMU page 0x%lx length 0x%lx to %lx\n",
+ BaseAddress, ChunkLength, Attributes));
+
+ Status = UpdatePageEntries (BaseAddress, ChunkLength, Attributes,
+ &FlushTlbs);
+ }
+
+ if (EFI_ERROR (Status)) {
+ break;
+ }
+
+ BaseAddress += ChunkLength;
+ Length -= ChunkLength;
+ }
+
+ if (FlushTlbs) {
+ ArmInvalidateTlb ();
+ }
+ return Status;
+}
+
+EFI_STATUS
+ArmSetMemoryRegionNoExec (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ return ArmSetMemoryAttributes (BaseAddress, Length, EFI_MEMORY_XP);
+}
+
+EFI_STATUS
+ArmClearMemoryRegionNoExec (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ return ArmSetMemoryAttributes (BaseAddress, Length, __EFI_MEMORY_RWX);
+}
+
+EFI_STATUS
+ArmSetMemoryRegionReadOnly (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ return ArmSetMemoryAttributes (BaseAddress, Length, EFI_MEMORY_RO);
+}
+
+EFI_STATUS
+ArmClearMemoryRegionReadOnly (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ return ArmSetMemoryAttributes (BaseAddress, Length, __EFI_MEMORY_RWX);
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.S b/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.S new file mode 100644 index 000000000..a97e3fabb --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.S @@ -0,0 +1,29 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+.text
+.align 2
+
+GCC_ASM_EXPORT (ArmReadIdMmfr0)
+GCC_ASM_EXPORT (ArmHasMpExtensions)
+
+#------------------------------------------------------------------------------
+
+ASM_PFX (ArmHasMpExtensions):
+ mrc p15,0,R0,c0,c0,5
+ // Get Multiprocessing extension (bit31)
+ lsr R0, R0, #31
+ bx LR
+
+ASM_PFX(ArmReadIdMmfr0):
+ mrc p15, 0, r0, c0, c1, 4 @ Read ID_MMFR0 Register
+ bx lr
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.asm b/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.asm new file mode 100644 index 000000000..a65e95db5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.asm @@ -0,0 +1,26 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2016, Linaro Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+
+ INCLUDE AsmMacroExport.inc
+
+
+//------------------------------------------------------------------------------
+
+ RVCT_ASM_EXPORT ArmHasMpExtensions
+ mrc p15,0,R0,c0,c0,5
+ // Get Multiprocessing extension (bit31)
+ lsr R0, R0, #31
+ bx LR
+
+ RVCT_ASM_EXPORT ArmReadIdMmfr0
+ mrc p15, 0, r0, c0, c1, 4 ; Read ID_MMFR0 Register
+ bx lr
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf b/roms/edk2/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf new file mode 100644 index 000000000..2a7e71479 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf @@ -0,0 +1,43 @@ +#/** @file
+#
+# Copyright (c) 2016 Linaro Ltd. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmMmuBaseLib
+ FILE_GUID = da8f0232-fb14-42f0-922c-63104d2c70bd
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmMmuLib
+
+[Defines.AARCH64]
+ CONSTRUCTOR = ArmMmuBaseLibConstructor
+
+[Sources.AARCH64]
+ AArch64/ArmMmuLibCore.c
+ AArch64/ArmMmuLibReplaceEntry.S
+
+[Sources.ARM]
+ Arm/ArmMmuLibConvert.c
+ Arm/ArmMmuLibCore.c
+ Arm/ArmMmuLibUpdate.c
+ Arm/ArmMmuLibV7Support.S |GCC
+ Arm/ArmMmuLibV7Support.asm |RVCT
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ ArmLib
+ CacheMaintenanceLib
+ MemoryAllocationLib
+
+[Pcd.ARM]
+ gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride
diff --git a/roms/edk2/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf b/roms/edk2/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf new file mode 100644 index 000000000..ce9674ea9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf @@ -0,0 +1,32 @@ +#/** @file
+#
+# Copyright (c) 2016 Linaro Ltd. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmMmuPeiLib
+ FILE_GUID = b50d8d53-1ad1-44ea-9e69-8c89d4a6d08b
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmMmuLib|PEIM
+ CONSTRUCTOR = ArmMmuPeiLibConstructor
+
+[Sources.AARCH64]
+ AArch64/ArmMmuLibCore.c
+ AArch64/ArmMmuPeiLibConstructor.c
+ AArch64/ArmMmuLibReplaceEntry.S
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ ArmLib
+ CacheMaintenanceLib
+ MemoryAllocationLib
diff --git a/roms/edk2/ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.c b/roms/edk2/ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.c new file mode 100644 index 000000000..8dc2d07e3 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.c @@ -0,0 +1,102 @@ +/** @file
+
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ System Control and Management Interface V1.0
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+ DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#include <Library/ArmMtlLib.h>
+#include <Library/DebugLib.h>
+
+/** Wait until channel is free.
+
+ @param[in] Channel Pointer to a channel.
+ @param[in] TimeOutInMicroSeconds Timeout in micro seconds.
+
+ @retval EFI_UNSUPPORTED Interface not implemented.
+**/
+EFI_STATUS
+MtlWaitUntilChannelFree (
+ IN MTL_CHANNEL *Channel,
+ IN UINTN TimeOutInMicroSeconds
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/** Return the address of the message payload.
+
+ @param[in] Channel Pointer to a channel.
+
+ @retval UINT32* Pointer to the payload.
+**/
+UINT32*
+MtlGetChannelPayload (
+ IN MTL_CHANNEL *Channel
+ )
+{
+ ASSERT (FALSE);
+ return NULL;
+}
+
+/** Return pointer to a channel for the requested channel type.
+
+ @param[in] ChannelType ChannelType, Low or High priority channel.
+ MTL_CHANNEL_TYPE_LOW or
+ MTL_CHANNEL_TYPE_HIGH
+
+ @param[out] Channel Holds pointer to the channel.
+
+ @retval EFI_UNSUPPORTED Requested channel type not supported or
+ interface not implemented.
+**/
+EFI_STATUS
+MtlGetChannel (
+ IN MTL_CHANNEL_TYPE ChannelType,
+ OUT MTL_CHANNEL **Channel
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/** Mark the channel busy and ring the doorbell.
+
+ @param[in] Channel Pointer to a channel.
+ @param[in] MessageHeader Message header.
+
+ @param[out] PayloadLength Message length.
+
+ @retval EFI_UNSUPPORTED Interface not implemented.
+**/
+EFI_STATUS
+MtlSendMessage (
+ IN MTL_CHANNEL *Channel,
+ IN UINT32 MessageHeader,
+ OUT UINT32 PayloadLength
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/** Wait for a response on a channel.
+
+ If channel is free after sending message, it implies SCP responded
+ with a response on the channel.
+
+ @param[in] Channel Pointer to a channel.
+
+ @retval EFI_UNSUPPORTED Interface not implemented.
+**/
+EFI_STATUS
+MtlReceiveMessage (
+ IN MTL_CHANNEL *Channel,
+ OUT UINT32 *MessageHeader,
+ OUT UINT32 *PayloadLength
+ )
+{
+ return EFI_UNSUPPORTED;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf b/roms/edk2/ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf new file mode 100644 index 000000000..605c27208 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf @@ -0,0 +1,20 @@ +#/** @file
+# Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = ArmMtlNullLib
+ FILE_GUID = 05810525-FDEC-4006-9F1F-37609B3675FA
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmMtlLib
+
+[Sources.common]
+ ArmMtlNullLib.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
diff --git a/roms/edk2/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.c b/roms/edk2/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.c new file mode 100644 index 000000000..0a7c0c4c5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.c @@ -0,0 +1,90 @@ +/** @file
+ Support ResetSystem Runtime call using PSCI calls
+
+ Note: A similar library is implemented in
+ ArmVirtPkg/Library/ArmVirtualizationPsciResetSystemLib
+ So similar issues might exist in this implementation too.
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2013-2015, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/EfiResetSystemLib.h>
+#include <Library/ArmSmcLib.h>
+
+#include <IndustryStandard/ArmStdSmc.h>
+
+/**
+ Resets the entire platform.
+
+ @param ResetType The type of reset to perform.
+ @param ResetStatus The status code for the reset.
+ @param DataSize The size, in bytes, of WatchdogData.
+ @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or
+ EfiResetShutdown the data buffer starts with a Null-terminated
+ Unicode string, optionally followed by additional binary data.
+
+**/
+EFI_STATUS
+EFIAPI
+LibResetSystem (
+ IN EFI_RESET_TYPE ResetType,
+ IN EFI_STATUS ResetStatus,
+ IN UINTN DataSize,
+ IN CHAR16 *ResetData OPTIONAL
+ )
+{
+ ARM_SMC_ARGS ArmSmcArgs;
+
+ switch (ResetType) {
+ case EfiResetPlatformSpecific:
+ // Map the platform specific reset as reboot
+ case EfiResetWarm:
+ // Map a warm reset into a cold reset
+ case EfiResetCold:
+ // Send a PSCI 0.2 SYSTEM_RESET command
+ ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_RESET;
+ break;
+ case EfiResetShutdown:
+ // Send a PSCI 0.2 SYSTEM_OFF command
+ ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_OFF;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_UNSUPPORTED;
+ }
+
+ ArmCallSmc (&ArmSmcArgs);
+
+ // We should never be here
+ DEBUG ((EFI_D_ERROR, "%a: PSCI Reset failed\n", __FUNCTION__));
+ CpuDeadLoop ();
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ Initialize any infrastructure required for LibResetSystem () to function.
+
+ @param ImageHandle The firmware allocated handle for the EFI image.
+ @param SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+LibInitializeResetSystem (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ return EFI_SUCCESS;
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf b/roms/edk2/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf new file mode 100644 index 000000000..3d05de4fd --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf @@ -0,0 +1,32 @@ +#/** @file
+# Reset System lib using PSCI hypervisor or secure monitor calls
+#
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
+# Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmPsciResetSystemLib
+ FILE_GUID = A8F59B69-A105-41C7-8F5A-2C60DD7FD7AA
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = EfiResetSystemLib
+
+[Sources]
+ ArmPsciResetSystemLib.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
+ ArmSmcLib
diff --git a/roms/edk2/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S b/roms/edk2/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S new file mode 100644 index 000000000..4a8c2a8f5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S @@ -0,0 +1,32 @@ +//
+// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+#include <AsmMacroIoLibV8.h>
+
+ASM_FUNC(ArmCallSmc)
+ // Push x0 on the stack - The stack must always be quad-word aligned
+ str x0, [sp, #-16]!
+
+ // Load the SMC arguments values into the appropriate registers
+ ldp x6, x7, [x0, #48]
+ ldp x4, x5, [x0, #32]
+ ldp x2, x3, [x0, #16]
+ ldp x0, x1, [x0, #0]
+
+ smc #0
+
+ // Pop the ARM_SMC_ARGS structure address from the stack into x9
+ ldr x9, [sp], #16
+
+ // Store the SMC returned values into the ARM_SMC_ARGS structure.
+ // A SMC call can return up to 4 values - we do not need to store back x4-x7.
+ stp x2, x3, [x9, #16]
+ stp x0, x1, [x9, #0]
+
+ mov x0, x9
+
+ ret
diff --git a/roms/edk2/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S b/roms/edk2/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S new file mode 100644 index 000000000..d218e7e70 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S @@ -0,0 +1,44 @@ +//
+// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+#include <AsmMacroIoLib.h>
+
+.arch_extension sec
+
+ASM_FUNC(ArmCallSmc)
+ push {r4-r8}
+ // r0 will be popped just after the SMC call
+ push {r0}
+
+ // Load the SMC arguments values into the appropriate registers
+ ldr r7, [r0, #28]
+ ldr r6, [r0, #24]
+ ldr r5, [r0, #20]
+ ldr r4, [r0, #16]
+ ldr r3, [r0, #12]
+ ldr r2, [r0, #8]
+ ldr r1, [r0, #4]
+ ldr r0, [r0, #0]
+
+ smc #0
+
+ // Pop the ARM_SMC_ARGS structure address from the stack into r8
+ pop {r8}
+
+ // Load the SMC returned values into the appropriate registers
+ // A SMC call can return up to 4 values - we do not need to store back r4-r7.
+ str r3, [r8, #12]
+ str r2, [r8, #8]
+ str r1, [r8, #4]
+ str r0, [r8, #0]
+
+ mov r0, r8
+
+ // Restore the registers r4-r8
+ pop {r4-r8}
+
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.asm b/roms/edk2/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.asm new file mode 100644 index 000000000..d14573c9c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.asm @@ -0,0 +1,45 @@ +//
+// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+
+ INCLUDE AsmMacroExport.inc
+
+ RVCT_ASM_EXPORT ArmCallSmc
+ push {r4-r8}
+ // r0 will be popped just after the SMC call
+ push {r0}
+
+ // Load the SMC arguments values into the appropriate registers
+ ldr r7, [r0, #28]
+ ldr r6, [r0, #24]
+ ldr r5, [r0, #20]
+ ldr r4, [r0, #16]
+ ldr r3, [r0, #12]
+ ldr r2, [r0, #8]
+ ldr r1, [r0, #4]
+ ldr r0, [r0, #0]
+
+ smc #0
+
+ // Pop the ARM_SMC_ARGS structure address from the stack into r8
+ pop {r8}
+
+ // Load the SMC returned values into the appropriate registers
+ // A SMC call can return up to 4 values - we do not need to store back r4-r7.
+ str r3, [r8, #12]
+ str r2, [r8, #8]
+ str r1, [r8, #4]
+ str r0, [r8, #0]
+
+ mov r0, r8
+
+ // Restore the registers r4-r8
+ pop {r4-r8}
+
+ bx lr
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf b/roms/edk2/ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf new file mode 100644 index 000000000..4f4b09f45 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf @@ -0,0 +1,28 @@ +#/** @file
+#
+# Copyright (c) 2012-2013, ARM Ltd. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmSmcLib
+ FILE_GUID = eb3f17d5-a3cc-4eac-8912-84162d0f79da
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmSmcLib
+
+[Sources.ARM]
+ Arm/ArmSmc.asm | RVCT
+ Arm/ArmSmc.S | GCC
+
+[Sources.AARCH64]
+ AArch64/ArmSmc.S
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[BuildOptions]
+ RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu 7-A.security
diff --git a/roms/edk2/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.c b/roms/edk2/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.c new file mode 100644 index 000000000..2d79aadaf --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.c @@ -0,0 +1,16 @@ +//
+// Copyright (c) 2016, Linaro Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+#include <Base.h>
+#include <Library/ArmSmcLib.h>
+
+VOID
+ArmCallSmc (
+ IN OUT ARM_SMC_ARGS *Args
+ )
+{
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf b/roms/edk2/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf new file mode 100644 index 000000000..9ce7c9b47 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf @@ -0,0 +1,24 @@ +#/** @file
+#
+# ArmSmcLib when no SMC support is desired (might be the case for CPU without the
+# Trustzone support / ARM Security Extension)
+#
+# Copyright (c) 2012-2013, ARM Ltd. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmSmcLibNull
+ FILE_GUID = 140e8004-16e1-4de1-a352-c6ef51110ecf
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmSmcLib
+
+[Sources]
+ ArmSmcLibNull.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
diff --git a/roms/edk2/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c b/roms/edk2/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c new file mode 100644 index 000000000..8b5ff5c27 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c @@ -0,0 +1,139 @@ +/** @file
+ ResetSystemLib implementation using PSCI calls
+
+ Copyright (c) 2017 - 2018, Linaro Ltd. All rights reserved.<BR>
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiDxe.h>
+
+#include <Library/ArmSmcLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/ResetSystemLib.h>
+
+#include <IndustryStandard/ArmStdSmc.h>
+
+/**
+ This function causes a system-wide reset (cold reset), in which
+ all circuitry within the system returns to its initial state. This type of reset
+ is asynchronous to system operation and operates without regard to
+ cycle boundaries.
+
+ If this function returns, it means that the system does not support cold reset.
+**/
+VOID
+EFIAPI
+ResetCold (
+ VOID
+ )
+{
+ ARM_SMC_ARGS ArmSmcArgs;
+
+ // Send a PSCI 0.2 SYSTEM_RESET command
+ ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_RESET;
+ ArmCallSmc (&ArmSmcArgs);
+}
+
+/**
+ This function causes a system-wide initialization (warm reset), in which all processors
+ are set to their initial state. Pending cycles are not corrupted.
+
+ If this function returns, it means that the system does not support warm reset.
+**/
+VOID
+EFIAPI
+ResetWarm (
+ VOID
+ )
+{
+ // Map a warm reset into a cold reset
+ ResetCold ();
+}
+
+/**
+ This function causes the system to enter a power state equivalent
+ to the ACPI G2/S5 or G3 states.
+
+ If this function returns, it means that the system does not support shutdown reset.
+**/
+VOID
+EFIAPI
+ResetShutdown (
+ VOID
+ )
+{
+ ARM_SMC_ARGS ArmSmcArgs;
+
+ // Send a PSCI 0.2 SYSTEM_OFF command
+ ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_OFF;
+ ArmCallSmc (&ArmSmcArgs);
+}
+
+/**
+ This function causes a systemwide reset. The exact type of the reset is
+ defined by the EFI_GUID that follows the Null-terminated Unicode string passed
+ into ResetData. If the platform does not recognize the EFI_GUID in ResetData
+ the platform must pick a supported reset type to perform.The platform may
+ optionally log the parameters from any non-normal reset that occurs.
+
+ @param[in] DataSize The size, in bytes, of ResetData.
+ @param[in] ResetData The data buffer starts with a Null-terminated string,
+ followed by the EFI_GUID.
+**/
+VOID
+EFIAPI
+ResetPlatformSpecific (
+ IN UINTN DataSize,
+ IN VOID *ResetData
+ )
+{
+ // Map the platform specific reset as reboot
+ ResetCold ();
+}
+
+/**
+ The ResetSystem function resets the entire platform.
+
+ @param[in] ResetType The type of reset to perform.
+ @param[in] ResetStatus The status code for the reset.
+ @param[in] DataSize The size, in bytes, of ResetData.
+ @param[in] ResetData For a ResetType of EfiResetCold, EfiResetWarm, or EfiResetShutdown
+ the data buffer starts with a Null-terminated string, optionally
+ followed by additional binary data. The string is a description
+ that the caller may use to further indicate the reason for the
+ system reset.
+**/
+VOID
+EFIAPI
+ResetSystem (
+ IN EFI_RESET_TYPE ResetType,
+ IN EFI_STATUS ResetStatus,
+ IN UINTN DataSize,
+ IN VOID *ResetData OPTIONAL
+ )
+{
+ switch (ResetType) {
+ case EfiResetWarm:
+ ResetWarm ();
+ break;
+
+ case EfiResetCold:
+ ResetCold ();
+ break;
+
+ case EfiResetShutdown:
+ ResetShutdown ();
+ return;
+
+ case EfiResetPlatformSpecific:
+ ResetPlatformSpecific (DataSize, ResetData);
+ return;
+
+ default:
+ return;
+ }
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf b/roms/edk2/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf new file mode 100644 index 000000000..c17b28cfa --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf @@ -0,0 +1,29 @@ +#/** @file
+# ResetSystemLib implementation using PSCI calls
+#
+# Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = ArmSmcPsciResetSystemLib
+ FILE_GUID = 18B12C83-7718-4D83-ADA4-87F2FE698DD4
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ResetSystemLib
+
+[Sources]
+ ArmSmcPsciResetSystemLib.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ ArmSmcLib
+ BaseLib
+ DebugLib
diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.c new file mode 100644 index 000000000..77e247367 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.c @@ -0,0 +1,283 @@ +/*
+ * Copyright (c) 2015 - 2019, Linaro Limited
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ */
+
+#include "platform.h"
+#include <softfloat.h>
+
+/*
+ * On ARM32 EABI defines both a soft-float ABI and a hard-float ABI,
+ * hard-float is basically a super set of soft-float. Hard-float requires
+ * all the support routines provided for soft-float, but the compiler may
+ * choose to optimize to not use some of them.
+ *
+ * The AEABI functions uses soft-float calling convention even if the
+ * functions are compiled for hard-float. So where float and double would
+ * have been expected we use aeabi_float_t and aeabi_double_t respectively
+ * instead.
+ */
+typedef uint32_t aeabi_float_t;
+typedef uint64_t aeabi_double_t;
+
+/*
+ * Helpers to convert between float32 and aeabi_float_t, and float64 and
+ * aeabi_double_t used by the AEABI functions below.
+ */
+static aeabi_float_t f32_to_f(float32_t val)
+{
+ return val.v;
+}
+
+static float32_t f32_from_f(aeabi_float_t val)
+{
+ float32_t res;
+
+ res.v = val;
+
+ return res;
+}
+
+static aeabi_double_t f64_to_d(float64_t val)
+{
+ return val.v;
+}
+
+static float64_t f64_from_d(aeabi_double_t val)
+{
+ float64_t res;
+
+ res.v = val;
+
+ return res;
+}
+
+/*
+ * From ARM Run-time ABI for ARM Architecture
+ * ARM IHI 0043D, current through ABI release 2.09
+ *
+ * 4.1.2 The floating-point helper functions
+ */
+
+/*
+ * Table 2, Standard aeabi_double_t precision floating-point arithmetic helper
+ * functions
+ */
+
+aeabi_double_t __aeabi_dadd(aeabi_double_t a, aeabi_double_t b)
+{
+ return f64_to_d(f64_add(f64_from_d(a), f64_from_d(b)));
+}
+
+aeabi_double_t __aeabi_ddiv(aeabi_double_t a, aeabi_double_t b)
+{
+ return f64_to_d(f64_div(f64_from_d(a), f64_from_d(b)));
+}
+
+aeabi_double_t __aeabi_dmul(aeabi_double_t a, aeabi_double_t b)
+{
+ return f64_to_d(f64_mul(f64_from_d(a), f64_from_d(b)));
+}
+
+
+aeabi_double_t __aeabi_drsub(aeabi_double_t a, aeabi_double_t b)
+{
+ return f64_to_d(f64_sub(f64_from_d(b), f64_from_d(a)));
+}
+
+aeabi_double_t __aeabi_dsub(aeabi_double_t a, aeabi_double_t b)
+{
+ return f64_to_d(f64_sub(f64_from_d(a), f64_from_d(b)));
+}
+
+/*
+ * Table 3, double precision floating-point comparison helper functions
+ */
+
+int __aeabi_dcmpeq(aeabi_double_t a, aeabi_double_t b)
+{
+ return f64_eq(f64_from_d(a), f64_from_d(b));
+}
+
+int __aeabi_dcmplt(aeabi_double_t a, aeabi_double_t b)
+{
+ return f64_lt(f64_from_d(a), f64_from_d(b));
+}
+
+int __aeabi_dcmple(aeabi_double_t a, aeabi_double_t b)
+{
+ return f64_le(f64_from_d(a), f64_from_d(b));
+}
+
+int __aeabi_dcmpge(aeabi_double_t a, aeabi_double_t b)
+{
+ return f64_le(f64_from_d(b), f64_from_d(a));
+}
+
+int __aeabi_dcmpgt(aeabi_double_t a, aeabi_double_t b)
+{
+ return f64_lt(f64_from_d(b), f64_from_d(a));
+}
+
+/*
+ * Table 4, Standard single precision floating-point arithmetic helper
+ * functions
+ */
+
+aeabi_float_t __aeabi_fadd(aeabi_float_t a, aeabi_float_t b)
+{
+ return f32_to_f(f32_add(f32_from_f(a), f32_from_f(b)));
+}
+
+aeabi_float_t __aeabi_fdiv(aeabi_float_t a, aeabi_float_t b)
+{
+ return f32_to_f(f32_div(f32_from_f(a), f32_from_f(b)));
+}
+
+aeabi_float_t __aeabi_fmul(aeabi_float_t a, aeabi_float_t b)
+{
+ return f32_to_f(f32_mul(f32_from_f(a), f32_from_f(b)));
+}
+
+aeabi_float_t __aeabi_frsub(aeabi_float_t a, aeabi_float_t b)
+{
+ return f32_to_f(f32_sub(f32_from_f(b), f32_from_f(a)));
+}
+
+aeabi_float_t __aeabi_fsub(aeabi_float_t a, aeabi_float_t b)
+{
+ return f32_to_f(f32_sub(f32_from_f(a), f32_from_f(b)));
+}
+
+/*
+ * Table 5, Standard single precision floating-point comparison helper
+ * functions
+ */
+
+int __aeabi_fcmpeq(aeabi_float_t a, aeabi_float_t b)
+{
+ return f32_eq(f32_from_f(a), f32_from_f(b));
+}
+
+int __aeabi_fcmplt(aeabi_float_t a, aeabi_float_t b)
+{
+ return f32_lt(f32_from_f(a), f32_from_f(b));
+}
+
+int __aeabi_fcmple(aeabi_float_t a, aeabi_float_t b)
+{
+ return f32_le(f32_from_f(a), f32_from_f(b));
+}
+
+int __aeabi_fcmpge(aeabi_float_t a, aeabi_float_t b)
+{
+ return f32_le(f32_from_f(b), f32_from_f(a));
+}
+
+int __aeabi_fcmpgt(aeabi_float_t a, aeabi_float_t b)
+{
+ return f32_lt(f32_from_f(b), f32_from_f(a));
+}
+
+/*
+ * Table 6, Standard floating-point to integer conversions
+ */
+
+int __aeabi_d2iz(aeabi_double_t a)
+{
+ return f64_to_i32_r_minMag(f64_from_d(a), false);
+}
+
+unsigned __aeabi_d2uiz(aeabi_double_t a)
+{
+ return f64_to_ui32_r_minMag(f64_from_d(a), false);
+}
+
+long long __aeabi_d2lz(aeabi_double_t a)
+{
+ return f64_to_i64_r_minMag(f64_from_d(a), false);
+}
+
+unsigned long long __aeabi_d2ulz(aeabi_double_t a)
+{
+ return f64_to_ui64_r_minMag(f64_from_d(a), false);
+}
+
+int __aeabi_f2iz(aeabi_float_t a)
+{
+ return f32_to_i32_r_minMag(f32_from_f(a), false);
+}
+
+unsigned __aeabi_f2uiz(aeabi_float_t a)
+{
+ return f32_to_ui32_r_minMag(f32_from_f(a), false);
+}
+
+long long __aeabi_f2lz(aeabi_float_t a)
+{
+ return f32_to_i64_r_minMag(f32_from_f(a), false);
+}
+
+unsigned long long __aeabi_f2ulz(aeabi_float_t a)
+{
+ return f32_to_ui64_r_minMag(f32_from_f(a), false);
+}
+
+/*
+ * Table 7, Standard conversions between floating types
+ */
+
+aeabi_float_t __aeabi_d2f(aeabi_double_t a)
+{
+ return f32_to_f(f64_to_f32(f64_from_d(a)));
+}
+
+aeabi_double_t __aeabi_f2d(aeabi_float_t a)
+{
+ return f64_to_d(f32_to_f64(f32_from_f(a)));
+}
+
+/*
+ * Table 8, Standard integer to floating-point conversions
+ */
+
+aeabi_double_t __aeabi_i2d(int a)
+{
+ return f64_to_d(i32_to_f64(a));
+}
+
+aeabi_double_t __aeabi_ui2d(unsigned a)
+{
+ return f64_to_d(ui32_to_f64(a));
+}
+
+aeabi_double_t __aeabi_l2d(long long a)
+{
+ return f64_to_d(i64_to_f64(a));
+}
+
+aeabi_double_t __aeabi_ul2d(unsigned long long a)
+{
+ return f64_to_d(ui64_to_f64(a));
+}
+
+aeabi_float_t __aeabi_i2f(int a)
+{
+ return f32_to_f(i32_to_f32(a));
+}
+
+aeabi_float_t __aeabi_ui2f(unsigned a)
+{
+ return f32_to_f(ui32_to_f32(a));
+}
+
+aeabi_float_t __aeabi_l2f(long long a)
+{
+ return f32_to_f(i64_to_f32(a));
+}
+
+aeabi_float_t __aeabi_ul2f(unsigned long long a)
+{
+ return f32_to_f(ui64_to_f32(a));
+}
diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf new file mode 100644 index 000000000..4d0c94df8 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf @@ -0,0 +1,92 @@ +## @file
+# ARM Software floating point Library.
+#
+# Copyright (c) 2014, ARM Ltd. All rights reserved.
+# Copyright (c) 2015 - 2019, Linaro Ltd. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = ArmSoftFloatLib
+ FILE_GUID = a485f921-749e-41a0-9f91-62f09a38721c
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmSoftFloatLib
+
+#
+# VALID_ARCHITECTURES = ARM
+#
+
+[Sources]
+ berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF64UI.c
+ berkeley-softfloat-3/source/ARM-VFPv2/softfloat_raiseFlags.c
+ berkeley-softfloat-3/source/ARM-VFPv2/specialize.h
+ berkeley-softfloat-3/source/f32_add.c
+ berkeley-softfloat-3/source/f32_div.c
+ berkeley-softfloat-3/source/f32_eq.c
+ berkeley-softfloat-3/source/f32_le.c
+ berkeley-softfloat-3/source/f32_lt.c
+ berkeley-softfloat-3/source/f32_mul.c
+ berkeley-softfloat-3/source/f32_sub.c
+ berkeley-softfloat-3/source/f32_to_f64.c
+ berkeley-softfloat-3/source/f32_to_i32_r_minMag.c
+ berkeley-softfloat-3/source/f32_to_i64_r_minMag.c
+ berkeley-softfloat-3/source/f32_to_ui32_r_minMag.c
+ berkeley-softfloat-3/source/f32_to_ui64_r_minMag.c
+ berkeley-softfloat-3/source/f64_add.c
+ berkeley-softfloat-3/source/f64_div.c
+ berkeley-softfloat-3/source/f64_eq.c
+ berkeley-softfloat-3/source/f64_le.c
+ berkeley-softfloat-3/source/f64_lt.c
+ berkeley-softfloat-3/source/f64_mul.c
+ berkeley-softfloat-3/source/f64_sub.c
+ berkeley-softfloat-3/source/f64_to_f32.c
+ berkeley-softfloat-3/source/f64_to_i32_r_minMag.c
+ berkeley-softfloat-3/source/f64_to_i64_r_minMag.c
+ berkeley-softfloat-3/source/f64_to_ui32_r_minMag.c
+ berkeley-softfloat-3/source/f64_to_ui64_r_minMag.c
+ berkeley-softfloat-3/source/i32_to_f32.c
+ berkeley-softfloat-3/source/i32_to_f64.c
+ berkeley-softfloat-3/source/i64_to_f32.c
+ berkeley-softfloat-3/source/i64_to_f64.c
+ berkeley-softfloat-3/source/include/internals.h
+ berkeley-softfloat-3/source/include/opts-GCC.h
+ berkeley-softfloat-3/source/include/primitiveTypes.h
+ berkeley-softfloat-3/source/include/primitives.h
+ berkeley-softfloat-3/source/include/softfloat.h
+ berkeley-softfloat-3/source/include/softfloat_types.h
+ berkeley-softfloat-3/source/s_addMagsF32.c
+ berkeley-softfloat-3/source/s_addMagsF64.c
+ berkeley-softfloat-3/source/s_countLeadingZeros32.c
+ berkeley-softfloat-3/source/s_countLeadingZeros64.c
+ berkeley-softfloat-3/source/s_countLeadingZeros8.c
+ berkeley-softfloat-3/source/s_mul64To128.c
+ berkeley-softfloat-3/source/s_normRoundPackToF32.c
+ berkeley-softfloat-3/source/s_normRoundPackToF64.c
+ berkeley-softfloat-3/source/s_normSubnormalF32Sig.c
+ berkeley-softfloat-3/source/s_normSubnormalF64Sig.c
+ berkeley-softfloat-3/source/s_roundPackToF32.c
+ berkeley-softfloat-3/source/s_roundPackToF64.c
+ berkeley-softfloat-3/source/s_shiftRightJam32.c
+ berkeley-softfloat-3/source/s_shiftRightJam64.c
+ berkeley-softfloat-3/source/s_shortShiftRightJam64.c
+ berkeley-softfloat-3/source/s_subMagsF32.c
+ berkeley-softfloat-3/source/s_subMagsF64.c
+ berkeley-softfloat-3/source/softfloat_state.c
+ berkeley-softfloat-3/source/ui32_to_f32.c
+ berkeley-softfloat-3/source/ui32_to_f64.c
+ berkeley-softfloat-3/source/ui64_to_f32.c
+ berkeley-softfloat-3/source/ui64_to_f64.c
+
+ ArmSoftFloatLib.c
+ platform.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+[BuildOptions]
+ GCC:*_*_*_CC_FLAGS = -fno-lto -ffreestanding -Wno-unused-label
diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/.gitignore b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/.gitignore new file mode 100644 index 000000000..bfdb59292 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/.gitignore @@ -0,0 +1,2 @@ +build/*/*.o +build/*/*.a diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/COPYING.txt b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/COPYING.txt new file mode 100644 index 000000000..b5690face --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/COPYING.txt @@ -0,0 +1,37 @@ + +License for Berkeley SoftFloat Release 3e + +John R. Hauser +2018 January 20 + +The following applies to the whole of SoftFloat Release 3e as well as to +each source file individually. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions, and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/README.html b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/README.html new file mode 100644 index 000000000..e695c2bd8 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/README.html @@ -0,0 +1,49 @@ + +<HTML> + +<HEAD> +<TITLE>Berkeley SoftFloat Package Overview</TITLE> +</HEAD> + +<BODY> + +<H1>Package Overview for Berkeley SoftFloat Release 3e</H1> + +<P> +John R. Hauser<BR> +2018 January 20<BR> +</P> + +<P> +Berkeley SoftFloat is a software implementation of binary floating-point that +conforms to the IEEE Standard for Floating-Point Arithmetic. +SoftFloat is distributed in the form of C source code. +Building the SoftFloat sources generates a library file (typically +<CODE>softfloat.a</CODE> or <CODE>libsoftfloat.a</CODE>) containing the +floating-point subroutines. +</P> + +<P> +The SoftFloat package is documented in the following files in the +<CODE>doc</CODE> subdirectory: +<BLOCKQUOTE> +<TABLE> +<TR> +<TD><A HREF="doc/SoftFloat.html"><NOBR><CODE>SoftFloat.html</CODE></NOBR></A></TD> +<TD>Documentation for using the SoftFloat functions.</TD> +</TR> +<TR> +<TD><A HREF="doc/SoftFloat-source.html"><NOBR><CODE>SoftFloat-source.html</CODE></NOBR></A></TD> +<TD>Documentation for building SoftFloat.</TD> +</TR> +<TR> +<TD><A HREF="doc/SoftFloat-history.html"><NOBR><CODE>SoftFloat-history.html</CODE></A><CODE> </CODE></NOBR></TD> +<TD>History of the major changes to SoftFloat.</TD> +</TR> +</TABLE> +</BLOCKQUOTE> +Other files in the package comprise the source code for SoftFloat. +</P> + +</BODY> + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/README.md b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/README.md new file mode 100644 index 000000000..d46802049 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/README.md @@ -0,0 +1,24 @@ + +Package Overview for Berkeley SoftFloat Release 3e +================================================== + +John R. Hauser<br> +2018 January 20 + + +Berkeley SoftFloat is a software implementation of binary floating-point +that conforms to the IEEE Standard for Floating-Point Arithmetic. SoftFloat +is distributed in the form of C source code. Building the SoftFloat sources +generates a library file (typically `softfloat.a` or `libsoftfloat.a`) +containing the floating-point subroutines. + + +The SoftFloat package is documented in the following files in the `doc` +subdirectory: + +* [SoftFloat.html](http://www.jhauser.us/arithmetic/SoftFloat-3/doc/SoftFloat.html) Documentation for using the SoftFloat functions. +* [SoftFloat-source.html](http://www.jhauser.us/arithmetic/SoftFloat-3/doc/SoftFloat-source.html) Documentation for building SoftFloat. +* [SoftFloat-history.html](http://www.jhauser.us/arithmetic/SoftFloat-3/doc/SoftFloat-history.html) History of the major changes to SoftFloat. + +Other files in the package comprise the source code for SoftFloat. + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/README.txt b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/README.txt new file mode 100644 index 000000000..1613c7671 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/README.txt @@ -0,0 +1,21 @@ + +Package Overview for Berkeley SoftFloat Release 3e + +John R. Hauser +2018 January 20 + +Berkeley SoftFloat is a software implementation of binary floating-point +that conforms to the IEEE Standard for Floating-Point Arithmetic. SoftFloat +is distributed in the form of C source code. Building the SoftFloat sources +generates a library file (typically "softfloat.a" or "libsoftfloat.a") +containing the floating-point subroutines. + +The SoftFloat package is documented in the following files in the "doc" +subdirectory: + + SoftFloat.html Documentation for using the SoftFloat functions. + SoftFloat-source.html Documentation for building SoftFloat. + SoftFloat-history.html History of the major changes to SoftFloat. + +Other files in the package comprise the source code for SoftFloat. + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-GCC/Makefile b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-GCC/Makefile new file mode 100644 index 000000000..faeb39728 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-GCC/Makefile @@ -0,0 +1,325 @@ + +#============================================================================= +# +# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic +# Package, Release 3e, by John R. Hauser. +# +# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +# University of California. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions, and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions, and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the University nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#============================================================================= + +SOURCE_DIR ?= ../../source +SPECIALIZE_TYPE ?= 8086 + +SOFTFLOAT_OPTS ?= \ + -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \ + -DSOFTFLOAT_FAST_DIV64TO32 + +DELETE = rm -f +C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include +COMPILE_C = \ + gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \ + $(C_INCLUDES) -O2 -o $@ +MAKELIB = ar crs $@ + +OBJ = .o +LIB = .a + +OTHER_HEADERS = + +.PHONY: all +all: softfloat$(LIB) + +OBJS_PRIMITIVES = \ + s_compare96M$(OBJ) \ + s_compare128M$(OBJ) \ + s_shortShiftLeft64To96M$(OBJ) \ + s_shortShiftLeftM$(OBJ) \ + s_shiftLeftM$(OBJ) \ + s_shortShiftRightM$(OBJ) \ + s_shortShiftRightJam64$(OBJ) \ + s_shortShiftRightJamM$(OBJ) \ + s_shiftRightJam32$(OBJ) \ + s_shiftRightJam64$(OBJ) \ + s_shiftRightJamM$(OBJ) \ + s_shiftRightM$(OBJ) \ + s_countLeadingZeros8$(OBJ) \ + s_countLeadingZeros16$(OBJ) \ + s_countLeadingZeros32$(OBJ) \ + s_countLeadingZeros64$(OBJ) \ + s_addM$(OBJ) \ + s_addCarryM$(OBJ) \ + s_addComplCarryM$(OBJ) \ + s_negXM$(OBJ) \ + s_sub1XM$(OBJ) \ + s_subM$(OBJ) \ + s_mul64To128M$(OBJ) \ + s_mul128MTo256M$(OBJ) \ + s_approxRecip_1Ks$(OBJ) \ + s_approxRecip32_1$(OBJ) \ + s_approxRecipSqrt_1Ks$(OBJ) \ + s_approxRecipSqrt32_1$(OBJ) \ + s_remStepMBy32$(OBJ) \ + +OBJS_SPECIALIZE = \ + softfloat_raiseFlags$(OBJ) \ + s_f16UIToCommonNaN$(OBJ) \ + s_commonNaNToF16UI$(OBJ) \ + s_propagateNaNF16UI$(OBJ) \ + s_f32UIToCommonNaN$(OBJ) \ + s_commonNaNToF32UI$(OBJ) \ + s_propagateNaNF32UI$(OBJ) \ + s_f64UIToCommonNaN$(OBJ) \ + s_commonNaNToF64UI$(OBJ) \ + s_propagateNaNF64UI$(OBJ) \ + extF80M_isSignalingNaN$(OBJ) \ + s_extF80MToCommonNaN$(OBJ) \ + s_commonNaNToExtF80M$(OBJ) \ + s_propagateNaNExtF80M$(OBJ) \ + f128M_isSignalingNaN$(OBJ) \ + s_f128MToCommonNaN$(OBJ) \ + s_commonNaNToF128M$(OBJ) \ + s_propagateNaNF128M$(OBJ) \ + +OBJS_OTHERS = \ + s_roundToUI32$(OBJ) \ + s_roundMToUI64$(OBJ) \ + s_roundToI32$(OBJ) \ + s_roundMToI64$(OBJ) \ + s_normSubnormalF16Sig$(OBJ) \ + s_roundPackToF16$(OBJ) \ + s_normRoundPackToF16$(OBJ) \ + s_addMagsF16$(OBJ) \ + s_subMagsF16$(OBJ) \ + s_mulAddF16$(OBJ) \ + s_normSubnormalF32Sig$(OBJ) \ + s_roundPackToF32$(OBJ) \ + s_normRoundPackToF32$(OBJ) \ + s_addMagsF32$(OBJ) \ + s_subMagsF32$(OBJ) \ + s_mulAddF32$(OBJ) \ + s_normSubnormalF64Sig$(OBJ) \ + s_roundPackToF64$(OBJ) \ + s_normRoundPackToF64$(OBJ) \ + s_addMagsF64$(OBJ) \ + s_subMagsF64$(OBJ) \ + s_mulAddF64$(OBJ) \ + s_tryPropagateNaNExtF80M$(OBJ) \ + s_invalidExtF80M$(OBJ) \ + s_normExtF80SigM$(OBJ) \ + s_roundPackMToExtF80M$(OBJ) \ + s_normRoundPackMToExtF80M$(OBJ) \ + s_addExtF80M$(OBJ) \ + s_compareNonnormExtF80M$(OBJ) \ + s_isNaNF128M$(OBJ) \ + s_tryPropagateNaNF128M$(OBJ) \ + s_invalidF128M$(OBJ) \ + s_shiftNormSigF128M$(OBJ) \ + s_roundPackMToF128M$(OBJ) \ + s_normRoundPackMToF128M$(OBJ) \ + s_addF128M$(OBJ) \ + s_mulAddF128M$(OBJ) \ + softfloat_state$(OBJ) \ + ui32_to_f16$(OBJ) \ + ui32_to_f32$(OBJ) \ + ui32_to_f64$(OBJ) \ + ui32_to_extF80M$(OBJ) \ + ui32_to_f128M$(OBJ) \ + ui64_to_f16$(OBJ) \ + ui64_to_f32$(OBJ) \ + ui64_to_f64$(OBJ) \ + ui64_to_extF80M$(OBJ) \ + ui64_to_f128M$(OBJ) \ + i32_to_f16$(OBJ) \ + i32_to_f32$(OBJ) \ + i32_to_f64$(OBJ) \ + i32_to_extF80M$(OBJ) \ + i32_to_f128M$(OBJ) \ + i64_to_f16$(OBJ) \ + i64_to_f32$(OBJ) \ + i64_to_f64$(OBJ) \ + i64_to_extF80M$(OBJ) \ + i64_to_f128M$(OBJ) \ + f16_to_ui32$(OBJ) \ + f16_to_ui64$(OBJ) \ + f16_to_i32$(OBJ) \ + f16_to_i64$(OBJ) \ + f16_to_ui32_r_minMag$(OBJ) \ + f16_to_ui64_r_minMag$(OBJ) \ + f16_to_i32_r_minMag$(OBJ) \ + f16_to_i64_r_minMag$(OBJ) \ + f16_to_f32$(OBJ) \ + f16_to_f64$(OBJ) \ + f16_to_extF80M$(OBJ) \ + f16_to_f128M$(OBJ) \ + f16_roundToInt$(OBJ) \ + f16_add$(OBJ) \ + f16_sub$(OBJ) \ + f16_mul$(OBJ) \ + f16_mulAdd$(OBJ) \ + f16_div$(OBJ) \ + f16_rem$(OBJ) \ + f16_sqrt$(OBJ) \ + f16_eq$(OBJ) \ + f16_le$(OBJ) \ + f16_lt$(OBJ) \ + f16_eq_signaling$(OBJ) \ + f16_le_quiet$(OBJ) \ + f16_lt_quiet$(OBJ) \ + f16_isSignalingNaN$(OBJ) \ + f32_to_ui32$(OBJ) \ + f32_to_ui64$(OBJ) \ + f32_to_i32$(OBJ) \ + f32_to_i64$(OBJ) \ + f32_to_ui32_r_minMag$(OBJ) \ + f32_to_ui64_r_minMag$(OBJ) \ + f32_to_i32_r_minMag$(OBJ) \ + f32_to_i64_r_minMag$(OBJ) \ + f32_to_f16$(OBJ) \ + f32_to_f64$(OBJ) \ + f32_to_extF80M$(OBJ) \ + f32_to_f128M$(OBJ) \ + f32_roundToInt$(OBJ) \ + f32_add$(OBJ) \ + f32_sub$(OBJ) \ + f32_mul$(OBJ) \ + f32_mulAdd$(OBJ) \ + f32_div$(OBJ) \ + f32_rem$(OBJ) \ + f32_sqrt$(OBJ) \ + f32_eq$(OBJ) \ + f32_le$(OBJ) \ + f32_lt$(OBJ) \ + f32_eq_signaling$(OBJ) \ + f32_le_quiet$(OBJ) \ + f32_lt_quiet$(OBJ) \ + f32_isSignalingNaN$(OBJ) \ + f64_to_ui32$(OBJ) \ + f64_to_ui64$(OBJ) \ + f64_to_i32$(OBJ) \ + f64_to_i64$(OBJ) \ + f64_to_ui32_r_minMag$(OBJ) \ + f64_to_ui64_r_minMag$(OBJ) \ + f64_to_i32_r_minMag$(OBJ) \ + f64_to_i64_r_minMag$(OBJ) \ + f64_to_f16$(OBJ) \ + f64_to_f32$(OBJ) \ + f64_to_extF80M$(OBJ) \ + f64_to_f128M$(OBJ) \ + f64_roundToInt$(OBJ) \ + f64_add$(OBJ) \ + f64_sub$(OBJ) \ + f64_mul$(OBJ) \ + f64_mulAdd$(OBJ) \ + f64_div$(OBJ) \ + f64_rem$(OBJ) \ + f64_sqrt$(OBJ) \ + f64_eq$(OBJ) \ + f64_le$(OBJ) \ + f64_lt$(OBJ) \ + f64_eq_signaling$(OBJ) \ + f64_le_quiet$(OBJ) \ + f64_lt_quiet$(OBJ) \ + f64_isSignalingNaN$(OBJ) \ + extF80M_to_ui32$(OBJ) \ + extF80M_to_ui64$(OBJ) \ + extF80M_to_i32$(OBJ) \ + extF80M_to_i64$(OBJ) \ + extF80M_to_ui32_r_minMag$(OBJ) \ + extF80M_to_ui64_r_minMag$(OBJ) \ + extF80M_to_i32_r_minMag$(OBJ) \ + extF80M_to_i64_r_minMag$(OBJ) \ + extF80M_to_f16$(OBJ) \ + extF80M_to_f32$(OBJ) \ + extF80M_to_f64$(OBJ) \ + extF80M_to_f128M$(OBJ) \ + extF80M_roundToInt$(OBJ) \ + extF80M_add$(OBJ) \ + extF80M_sub$(OBJ) \ + extF80M_mul$(OBJ) \ + extF80M_div$(OBJ) \ + extF80M_rem$(OBJ) \ + extF80M_sqrt$(OBJ) \ + extF80M_eq$(OBJ) \ + extF80M_le$(OBJ) \ + extF80M_lt$(OBJ) \ + extF80M_eq_signaling$(OBJ) \ + extF80M_le_quiet$(OBJ) \ + extF80M_lt_quiet$(OBJ) \ + f128M_to_ui32$(OBJ) \ + f128M_to_ui64$(OBJ) \ + f128M_to_i32$(OBJ) \ + f128M_to_i64$(OBJ) \ + f128M_to_ui32_r_minMag$(OBJ) \ + f128M_to_ui64_r_minMag$(OBJ) \ + f128M_to_i32_r_minMag$(OBJ) \ + f128M_to_i64_r_minMag$(OBJ) \ + f128M_to_f16$(OBJ) \ + f128M_to_f32$(OBJ) \ + f128M_to_f64$(OBJ) \ + f128M_to_extF80M$(OBJ) \ + f128M_roundToInt$(OBJ) \ + f128M_add$(OBJ) \ + f128M_sub$(OBJ) \ + f128M_mul$(OBJ) \ + f128M_mulAdd$(OBJ) \ + f128M_div$(OBJ) \ + f128M_rem$(OBJ) \ + f128M_sqrt$(OBJ) \ + f128M_eq$(OBJ) \ + f128M_le$(OBJ) \ + f128M_lt$(OBJ) \ + f128M_eq_signaling$(OBJ) \ + f128M_le_quiet$(OBJ) \ + f128M_lt_quiet$(OBJ) \ + +OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS) + +$(OBJS_ALL): \ + $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \ + $(SOURCE_DIR)/include/primitives.h +$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \ + $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \ + $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \ + $(SOURCE_DIR)/include/softfloat.h + +$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$*.c + +$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c + +softfloat$(LIB): $(OBJS_ALL) + $(DELETE) $@ + $(MAKELIB) $^ + +.PHONY: clean +clean: + $(DELETE) $(OBJS_ALL) softfloat$(LIB) + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-GCC/platform.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-GCC/platform.h new file mode 100644 index 000000000..d514dbc40 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-GCC/platform.h @@ -0,0 +1,53 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define LITTLEENDIAN 1 + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#ifdef __GNUC_STDC_INLINE__ +#define INLINE inline +#else +#define INLINE extern inline +#endif + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define SOFTFLOAT_BUILTIN_CLZ 1 +#include "opts-GCC.h" + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-SSE2-GCC/Makefile b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-SSE2-GCC/Makefile new file mode 100644 index 000000000..ced977b69 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-SSE2-GCC/Makefile @@ -0,0 +1,325 @@ + +#============================================================================= +# +# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic +# Package, Release 3e, by John R. Hauser. +# +# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +# University of California. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions, and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions, and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the University nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#============================================================================= + +SOURCE_DIR ?= ../../source +SPECIALIZE_TYPE ?= 8086-SSE + +SOFTFLOAT_OPTS ?= \ + -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \ + -DSOFTFLOAT_FAST_DIV64TO32 + +DELETE = rm -f +C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include +COMPILE_C = \ + gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \ + $(C_INCLUDES) -O2 -o $@ +MAKELIB = ar crs $@ + +OBJ = .o +LIB = .a + +OTHER_HEADERS = + +.PHONY: all +all: softfloat$(LIB) + +OBJS_PRIMITIVES = \ + s_compare96M$(OBJ) \ + s_compare128M$(OBJ) \ + s_shortShiftLeft64To96M$(OBJ) \ + s_shortShiftLeftM$(OBJ) \ + s_shiftLeftM$(OBJ) \ + s_shortShiftRightM$(OBJ) \ + s_shortShiftRightJam64$(OBJ) \ + s_shortShiftRightJamM$(OBJ) \ + s_shiftRightJam32$(OBJ) \ + s_shiftRightJam64$(OBJ) \ + s_shiftRightJamM$(OBJ) \ + s_shiftRightM$(OBJ) \ + s_countLeadingZeros8$(OBJ) \ + s_countLeadingZeros16$(OBJ) \ + s_countLeadingZeros32$(OBJ) \ + s_countLeadingZeros64$(OBJ) \ + s_addM$(OBJ) \ + s_addCarryM$(OBJ) \ + s_addComplCarryM$(OBJ) \ + s_negXM$(OBJ) \ + s_sub1XM$(OBJ) \ + s_subM$(OBJ) \ + s_mul64To128M$(OBJ) \ + s_mul128MTo256M$(OBJ) \ + s_approxRecip_1Ks$(OBJ) \ + s_approxRecip32_1$(OBJ) \ + s_approxRecipSqrt_1Ks$(OBJ) \ + s_approxRecipSqrt32_1$(OBJ) \ + s_remStepMBy32$(OBJ) \ + +OBJS_SPECIALIZE = \ + softfloat_raiseFlags$(OBJ) \ + s_f16UIToCommonNaN$(OBJ) \ + s_commonNaNToF16UI$(OBJ) \ + s_propagateNaNF16UI$(OBJ) \ + s_f32UIToCommonNaN$(OBJ) \ + s_commonNaNToF32UI$(OBJ) \ + s_propagateNaNF32UI$(OBJ) \ + s_f64UIToCommonNaN$(OBJ) \ + s_commonNaNToF64UI$(OBJ) \ + s_propagateNaNF64UI$(OBJ) \ + extF80M_isSignalingNaN$(OBJ) \ + s_extF80MToCommonNaN$(OBJ) \ + s_commonNaNToExtF80M$(OBJ) \ + s_propagateNaNExtF80M$(OBJ) \ + f128M_isSignalingNaN$(OBJ) \ + s_f128MToCommonNaN$(OBJ) \ + s_commonNaNToF128M$(OBJ) \ + s_propagateNaNF128M$(OBJ) \ + +OBJS_OTHERS = \ + s_roundToUI32$(OBJ) \ + s_roundMToUI64$(OBJ) \ + s_roundToI32$(OBJ) \ + s_roundMToI64$(OBJ) \ + s_normSubnormalF16Sig$(OBJ) \ + s_roundPackToF16$(OBJ) \ + s_normRoundPackToF16$(OBJ) \ + s_addMagsF16$(OBJ) \ + s_subMagsF16$(OBJ) \ + s_mulAddF16$(OBJ) \ + s_normSubnormalF32Sig$(OBJ) \ + s_roundPackToF32$(OBJ) \ + s_normRoundPackToF32$(OBJ) \ + s_addMagsF32$(OBJ) \ + s_subMagsF32$(OBJ) \ + s_mulAddF32$(OBJ) \ + s_normSubnormalF64Sig$(OBJ) \ + s_roundPackToF64$(OBJ) \ + s_normRoundPackToF64$(OBJ) \ + s_addMagsF64$(OBJ) \ + s_subMagsF64$(OBJ) \ + s_mulAddF64$(OBJ) \ + s_tryPropagateNaNExtF80M$(OBJ) \ + s_invalidExtF80M$(OBJ) \ + s_normExtF80SigM$(OBJ) \ + s_roundPackMToExtF80M$(OBJ) \ + s_normRoundPackMToExtF80M$(OBJ) \ + s_addExtF80M$(OBJ) \ + s_compareNonnormExtF80M$(OBJ) \ + s_isNaNF128M$(OBJ) \ + s_tryPropagateNaNF128M$(OBJ) \ + s_invalidF128M$(OBJ) \ + s_shiftNormSigF128M$(OBJ) \ + s_roundPackMToF128M$(OBJ) \ + s_normRoundPackMToF128M$(OBJ) \ + s_addF128M$(OBJ) \ + s_mulAddF128M$(OBJ) \ + softfloat_state$(OBJ) \ + ui32_to_f16$(OBJ) \ + ui32_to_f32$(OBJ) \ + ui32_to_f64$(OBJ) \ + ui32_to_extF80M$(OBJ) \ + ui32_to_f128M$(OBJ) \ + ui64_to_f16$(OBJ) \ + ui64_to_f32$(OBJ) \ + ui64_to_f64$(OBJ) \ + ui64_to_extF80M$(OBJ) \ + ui64_to_f128M$(OBJ) \ + i32_to_f16$(OBJ) \ + i32_to_f32$(OBJ) \ + i32_to_f64$(OBJ) \ + i32_to_extF80M$(OBJ) \ + i32_to_f128M$(OBJ) \ + i64_to_f16$(OBJ) \ + i64_to_f32$(OBJ) \ + i64_to_f64$(OBJ) \ + i64_to_extF80M$(OBJ) \ + i64_to_f128M$(OBJ) \ + f16_to_ui32$(OBJ) \ + f16_to_ui64$(OBJ) \ + f16_to_i32$(OBJ) \ + f16_to_i64$(OBJ) \ + f16_to_ui32_r_minMag$(OBJ) \ + f16_to_ui64_r_minMag$(OBJ) \ + f16_to_i32_r_minMag$(OBJ) \ + f16_to_i64_r_minMag$(OBJ) \ + f16_to_f32$(OBJ) \ + f16_to_f64$(OBJ) \ + f16_to_extF80M$(OBJ) \ + f16_to_f128M$(OBJ) \ + f16_roundToInt$(OBJ) \ + f16_add$(OBJ) \ + f16_sub$(OBJ) \ + f16_mul$(OBJ) \ + f16_mulAdd$(OBJ) \ + f16_div$(OBJ) \ + f16_rem$(OBJ) \ + f16_sqrt$(OBJ) \ + f16_eq$(OBJ) \ + f16_le$(OBJ) \ + f16_lt$(OBJ) \ + f16_eq_signaling$(OBJ) \ + f16_le_quiet$(OBJ) \ + f16_lt_quiet$(OBJ) \ + f16_isSignalingNaN$(OBJ) \ + f32_to_ui32$(OBJ) \ + f32_to_ui64$(OBJ) \ + f32_to_i32$(OBJ) \ + f32_to_i64$(OBJ) \ + f32_to_ui32_r_minMag$(OBJ) \ + f32_to_ui64_r_minMag$(OBJ) \ + f32_to_i32_r_minMag$(OBJ) \ + f32_to_i64_r_minMag$(OBJ) \ + f32_to_f16$(OBJ) \ + f32_to_f64$(OBJ) \ + f32_to_extF80M$(OBJ) \ + f32_to_f128M$(OBJ) \ + f32_roundToInt$(OBJ) \ + f32_add$(OBJ) \ + f32_sub$(OBJ) \ + f32_mul$(OBJ) \ + f32_mulAdd$(OBJ) \ + f32_div$(OBJ) \ + f32_rem$(OBJ) \ + f32_sqrt$(OBJ) \ + f32_eq$(OBJ) \ + f32_le$(OBJ) \ + f32_lt$(OBJ) \ + f32_eq_signaling$(OBJ) \ + f32_le_quiet$(OBJ) \ + f32_lt_quiet$(OBJ) \ + f32_isSignalingNaN$(OBJ) \ + f64_to_ui32$(OBJ) \ + f64_to_ui64$(OBJ) \ + f64_to_i32$(OBJ) \ + f64_to_i64$(OBJ) \ + f64_to_ui32_r_minMag$(OBJ) \ + f64_to_ui64_r_minMag$(OBJ) \ + f64_to_i32_r_minMag$(OBJ) \ + f64_to_i64_r_minMag$(OBJ) \ + f64_to_f16$(OBJ) \ + f64_to_f32$(OBJ) \ + f64_to_extF80M$(OBJ) \ + f64_to_f128M$(OBJ) \ + f64_roundToInt$(OBJ) \ + f64_add$(OBJ) \ + f64_sub$(OBJ) \ + f64_mul$(OBJ) \ + f64_mulAdd$(OBJ) \ + f64_div$(OBJ) \ + f64_rem$(OBJ) \ + f64_sqrt$(OBJ) \ + f64_eq$(OBJ) \ + f64_le$(OBJ) \ + f64_lt$(OBJ) \ + f64_eq_signaling$(OBJ) \ + f64_le_quiet$(OBJ) \ + f64_lt_quiet$(OBJ) \ + f64_isSignalingNaN$(OBJ) \ + extF80M_to_ui32$(OBJ) \ + extF80M_to_ui64$(OBJ) \ + extF80M_to_i32$(OBJ) \ + extF80M_to_i64$(OBJ) \ + extF80M_to_ui32_r_minMag$(OBJ) \ + extF80M_to_ui64_r_minMag$(OBJ) \ + extF80M_to_i32_r_minMag$(OBJ) \ + extF80M_to_i64_r_minMag$(OBJ) \ + extF80M_to_f16$(OBJ) \ + extF80M_to_f32$(OBJ) \ + extF80M_to_f64$(OBJ) \ + extF80M_to_f128M$(OBJ) \ + extF80M_roundToInt$(OBJ) \ + extF80M_add$(OBJ) \ + extF80M_sub$(OBJ) \ + extF80M_mul$(OBJ) \ + extF80M_div$(OBJ) \ + extF80M_rem$(OBJ) \ + extF80M_sqrt$(OBJ) \ + extF80M_eq$(OBJ) \ + extF80M_le$(OBJ) \ + extF80M_lt$(OBJ) \ + extF80M_eq_signaling$(OBJ) \ + extF80M_le_quiet$(OBJ) \ + extF80M_lt_quiet$(OBJ) \ + f128M_to_ui32$(OBJ) \ + f128M_to_ui64$(OBJ) \ + f128M_to_i32$(OBJ) \ + f128M_to_i64$(OBJ) \ + f128M_to_ui32_r_minMag$(OBJ) \ + f128M_to_ui64_r_minMag$(OBJ) \ + f128M_to_i32_r_minMag$(OBJ) \ + f128M_to_i64_r_minMag$(OBJ) \ + f128M_to_f16$(OBJ) \ + f128M_to_f32$(OBJ) \ + f128M_to_f64$(OBJ) \ + f128M_to_extF80M$(OBJ) \ + f128M_roundToInt$(OBJ) \ + f128M_add$(OBJ) \ + f128M_sub$(OBJ) \ + f128M_mul$(OBJ) \ + f128M_mulAdd$(OBJ) \ + f128M_div$(OBJ) \ + f128M_rem$(OBJ) \ + f128M_sqrt$(OBJ) \ + f128M_eq$(OBJ) \ + f128M_le$(OBJ) \ + f128M_lt$(OBJ) \ + f128M_eq_signaling$(OBJ) \ + f128M_le_quiet$(OBJ) \ + f128M_lt_quiet$(OBJ) \ + +OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS) + +$(OBJS_ALL): \ + $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \ + $(SOURCE_DIR)/include/primitives.h +$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \ + $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \ + $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \ + $(SOURCE_DIR)/include/softfloat.h + +$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$*.c + +$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c + +softfloat$(LIB): $(OBJS_ALL) + $(DELETE) $@ + $(MAKELIB) $^ + +.PHONY: clean +clean: + $(DELETE) $(OBJS_ALL) softfloat$(LIB) + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-SSE2-GCC/platform.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-SSE2-GCC/platform.h new file mode 100644 index 000000000..d514dbc40 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-386-SSE2-GCC/platform.h @@ -0,0 +1,53 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define LITTLEENDIAN 1 + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#ifdef __GNUC_STDC_INLINE__ +#define INLINE inline +#else +#define INLINE extern inline +#endif + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define SOFTFLOAT_BUILTIN_CLZ 1 +#include "opts-GCC.h" + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-ARM-VFPv2-GCC/Makefile b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-ARM-VFPv2-GCC/Makefile new file mode 100644 index 000000000..a1e7c8303 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-ARM-VFPv2-GCC/Makefile @@ -0,0 +1,323 @@ + +#============================================================================= +# +# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic +# Package, Release 3e, by John R. Hauser. +# +# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +# University of California. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions, and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions, and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the University nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#============================================================================= + +SOURCE_DIR ?= ../../source +SPECIALIZE_TYPE ?= ARM-VFPv2 + +SOFTFLOAT_OPTS ?= -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 + +DELETE = rm -f +C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include +COMPILE_C = \ + gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \ + $(C_INCLUDES) -O2 -o $@ +MAKELIB = ar crs $@ + +OBJ = .o +LIB = .a + +OTHER_HEADERS = + +.PHONY: all +all: softfloat$(LIB) + +OBJS_PRIMITIVES = \ + s_compare96M$(OBJ) \ + s_compare128M$(OBJ) \ + s_shortShiftLeft64To96M$(OBJ) \ + s_shortShiftLeftM$(OBJ) \ + s_shiftLeftM$(OBJ) \ + s_shortShiftRightM$(OBJ) \ + s_shortShiftRightJam64$(OBJ) \ + s_shortShiftRightJamM$(OBJ) \ + s_shiftRightJam32$(OBJ) \ + s_shiftRightJam64$(OBJ) \ + s_shiftRightJamM$(OBJ) \ + s_shiftRightM$(OBJ) \ + s_countLeadingZeros8$(OBJ) \ + s_countLeadingZeros16$(OBJ) \ + s_countLeadingZeros32$(OBJ) \ + s_countLeadingZeros64$(OBJ) \ + s_addM$(OBJ) \ + s_addCarryM$(OBJ) \ + s_addComplCarryM$(OBJ) \ + s_negXM$(OBJ) \ + s_sub1XM$(OBJ) \ + s_subM$(OBJ) \ + s_mul64To128M$(OBJ) \ + s_mul128MTo256M$(OBJ) \ + s_approxRecip_1Ks$(OBJ) \ + s_approxRecip32_1$(OBJ) \ + s_approxRecipSqrt_1Ks$(OBJ) \ + s_approxRecipSqrt32_1$(OBJ) \ + s_remStepMBy32$(OBJ) \ + +OBJS_SPECIALIZE = \ + softfloat_raiseFlags$(OBJ) \ + s_f16UIToCommonNaN$(OBJ) \ + s_commonNaNToF16UI$(OBJ) \ + s_propagateNaNF16UI$(OBJ) \ + s_f32UIToCommonNaN$(OBJ) \ + s_commonNaNToF32UI$(OBJ) \ + s_propagateNaNF32UI$(OBJ) \ + s_f64UIToCommonNaN$(OBJ) \ + s_commonNaNToF64UI$(OBJ) \ + s_propagateNaNF64UI$(OBJ) \ + extF80M_isSignalingNaN$(OBJ) \ + s_extF80MToCommonNaN$(OBJ) \ + s_commonNaNToExtF80M$(OBJ) \ + s_propagateNaNExtF80M$(OBJ) \ + f128M_isSignalingNaN$(OBJ) \ + s_f128MToCommonNaN$(OBJ) \ + s_commonNaNToF128M$(OBJ) \ + s_propagateNaNF128M$(OBJ) \ + +OBJS_OTHERS = \ + s_roundToUI32$(OBJ) \ + s_roundMToUI64$(OBJ) \ + s_roundToI32$(OBJ) \ + s_roundMToI64$(OBJ) \ + s_normSubnormalF16Sig$(OBJ) \ + s_roundPackToF16$(OBJ) \ + s_normRoundPackToF16$(OBJ) \ + s_addMagsF16$(OBJ) \ + s_subMagsF16$(OBJ) \ + s_mulAddF16$(OBJ) \ + s_normSubnormalF32Sig$(OBJ) \ + s_roundPackToF32$(OBJ) \ + s_normRoundPackToF32$(OBJ) \ + s_addMagsF32$(OBJ) \ + s_subMagsF32$(OBJ) \ + s_mulAddF32$(OBJ) \ + s_normSubnormalF64Sig$(OBJ) \ + s_roundPackToF64$(OBJ) \ + s_normRoundPackToF64$(OBJ) \ + s_addMagsF64$(OBJ) \ + s_subMagsF64$(OBJ) \ + s_mulAddF64$(OBJ) \ + s_tryPropagateNaNExtF80M$(OBJ) \ + s_invalidExtF80M$(OBJ) \ + s_normExtF80SigM$(OBJ) \ + s_roundPackMToExtF80M$(OBJ) \ + s_normRoundPackMToExtF80M$(OBJ) \ + s_addExtF80M$(OBJ) \ + s_compareNonnormExtF80M$(OBJ) \ + s_isNaNF128M$(OBJ) \ + s_tryPropagateNaNF128M$(OBJ) \ + s_invalidF128M$(OBJ) \ + s_shiftNormSigF128M$(OBJ) \ + s_roundPackMToF128M$(OBJ) \ + s_normRoundPackMToF128M$(OBJ) \ + s_addF128M$(OBJ) \ + s_mulAddF128M$(OBJ) \ + softfloat_state$(OBJ) \ + ui32_to_f16$(OBJ) \ + ui32_to_f32$(OBJ) \ + ui32_to_f64$(OBJ) \ + ui32_to_extF80M$(OBJ) \ + ui32_to_f128M$(OBJ) \ + ui64_to_f16$(OBJ) \ + ui64_to_f32$(OBJ) \ + ui64_to_f64$(OBJ) \ + ui64_to_extF80M$(OBJ) \ + ui64_to_f128M$(OBJ) \ + i32_to_f16$(OBJ) \ + i32_to_f32$(OBJ) \ + i32_to_f64$(OBJ) \ + i32_to_extF80M$(OBJ) \ + i32_to_f128M$(OBJ) \ + i64_to_f16$(OBJ) \ + i64_to_f32$(OBJ) \ + i64_to_f64$(OBJ) \ + i64_to_extF80M$(OBJ) \ + i64_to_f128M$(OBJ) \ + f16_to_ui32$(OBJ) \ + f16_to_ui64$(OBJ) \ + f16_to_i32$(OBJ) \ + f16_to_i64$(OBJ) \ + f16_to_ui32_r_minMag$(OBJ) \ + f16_to_ui64_r_minMag$(OBJ) \ + f16_to_i32_r_minMag$(OBJ) \ + f16_to_i64_r_minMag$(OBJ) \ + f16_to_f32$(OBJ) \ + f16_to_f64$(OBJ) \ + f16_to_extF80M$(OBJ) \ + f16_to_f128M$(OBJ) \ + f16_roundToInt$(OBJ) \ + f16_add$(OBJ) \ + f16_sub$(OBJ) \ + f16_mul$(OBJ) \ + f16_mulAdd$(OBJ) \ + f16_div$(OBJ) \ + f16_rem$(OBJ) \ + f16_sqrt$(OBJ) \ + f16_eq$(OBJ) \ + f16_le$(OBJ) \ + f16_lt$(OBJ) \ + f16_eq_signaling$(OBJ) \ + f16_le_quiet$(OBJ) \ + f16_lt_quiet$(OBJ) \ + f16_isSignalingNaN$(OBJ) \ + f32_to_ui32$(OBJ) \ + f32_to_ui64$(OBJ) \ + f32_to_i32$(OBJ) \ + f32_to_i64$(OBJ) \ + f32_to_ui32_r_minMag$(OBJ) \ + f32_to_ui64_r_minMag$(OBJ) \ + f32_to_i32_r_minMag$(OBJ) \ + f32_to_i64_r_minMag$(OBJ) \ + f32_to_f16$(OBJ) \ + f32_to_f64$(OBJ) \ + f32_to_extF80M$(OBJ) \ + f32_to_f128M$(OBJ) \ + f32_roundToInt$(OBJ) \ + f32_add$(OBJ) \ + f32_sub$(OBJ) \ + f32_mul$(OBJ) \ + f32_mulAdd$(OBJ) \ + f32_div$(OBJ) \ + f32_rem$(OBJ) \ + f32_sqrt$(OBJ) \ + f32_eq$(OBJ) \ + f32_le$(OBJ) \ + f32_lt$(OBJ) \ + f32_eq_signaling$(OBJ) \ + f32_le_quiet$(OBJ) \ + f32_lt_quiet$(OBJ) \ + f32_isSignalingNaN$(OBJ) \ + f64_to_ui32$(OBJ) \ + f64_to_ui64$(OBJ) \ + f64_to_i32$(OBJ) \ + f64_to_i64$(OBJ) \ + f64_to_ui32_r_minMag$(OBJ) \ + f64_to_ui64_r_minMag$(OBJ) \ + f64_to_i32_r_minMag$(OBJ) \ + f64_to_i64_r_minMag$(OBJ) \ + f64_to_f16$(OBJ) \ + f64_to_f32$(OBJ) \ + f64_to_extF80M$(OBJ) \ + f64_to_f128M$(OBJ) \ + f64_roundToInt$(OBJ) \ + f64_add$(OBJ) \ + f64_sub$(OBJ) \ + f64_mul$(OBJ) \ + f64_mulAdd$(OBJ) \ + f64_div$(OBJ) \ + f64_rem$(OBJ) \ + f64_sqrt$(OBJ) \ + f64_eq$(OBJ) \ + f64_le$(OBJ) \ + f64_lt$(OBJ) \ + f64_eq_signaling$(OBJ) \ + f64_le_quiet$(OBJ) \ + f64_lt_quiet$(OBJ) \ + f64_isSignalingNaN$(OBJ) \ + extF80M_to_ui32$(OBJ) \ + extF80M_to_ui64$(OBJ) \ + extF80M_to_i32$(OBJ) \ + extF80M_to_i64$(OBJ) \ + extF80M_to_ui32_r_minMag$(OBJ) \ + extF80M_to_ui64_r_minMag$(OBJ) \ + extF80M_to_i32_r_minMag$(OBJ) \ + extF80M_to_i64_r_minMag$(OBJ) \ + extF80M_to_f16$(OBJ) \ + extF80M_to_f32$(OBJ) \ + extF80M_to_f64$(OBJ) \ + extF80M_to_f128M$(OBJ) \ + extF80M_roundToInt$(OBJ) \ + extF80M_add$(OBJ) \ + extF80M_sub$(OBJ) \ + extF80M_mul$(OBJ) \ + extF80M_div$(OBJ) \ + extF80M_rem$(OBJ) \ + extF80M_sqrt$(OBJ) \ + extF80M_eq$(OBJ) \ + extF80M_le$(OBJ) \ + extF80M_lt$(OBJ) \ + extF80M_eq_signaling$(OBJ) \ + extF80M_le_quiet$(OBJ) \ + extF80M_lt_quiet$(OBJ) \ + f128M_to_ui32$(OBJ) \ + f128M_to_ui64$(OBJ) \ + f128M_to_i32$(OBJ) \ + f128M_to_i64$(OBJ) \ + f128M_to_ui32_r_minMag$(OBJ) \ + f128M_to_ui64_r_minMag$(OBJ) \ + f128M_to_i32_r_minMag$(OBJ) \ + f128M_to_i64_r_minMag$(OBJ) \ + f128M_to_f16$(OBJ) \ + f128M_to_f32$(OBJ) \ + f128M_to_f64$(OBJ) \ + f128M_to_extF80M$(OBJ) \ + f128M_roundToInt$(OBJ) \ + f128M_add$(OBJ) \ + f128M_sub$(OBJ) \ + f128M_mul$(OBJ) \ + f128M_mulAdd$(OBJ) \ + f128M_div$(OBJ) \ + f128M_rem$(OBJ) \ + f128M_sqrt$(OBJ) \ + f128M_eq$(OBJ) \ + f128M_le$(OBJ) \ + f128M_lt$(OBJ) \ + f128M_eq_signaling$(OBJ) \ + f128M_le_quiet$(OBJ) \ + f128M_lt_quiet$(OBJ) \ + +OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS) + +$(OBJS_ALL): \ + $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \ + $(SOURCE_DIR)/include/primitives.h +$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \ + $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \ + $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \ + $(SOURCE_DIR)/include/softfloat.h + +$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$*.c + +$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c + +softfloat$(LIB): $(OBJS_ALL) + $(DELETE) $@ + $(MAKELIB) $^ + +.PHONY: clean +clean: + $(DELETE) $(OBJS_ALL) softfloat$(LIB) + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-ARM-VFPv2-GCC/platform.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-ARM-VFPv2-GCC/platform.h new file mode 100644 index 000000000..d514dbc40 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-ARM-VFPv2-GCC/platform.h @@ -0,0 +1,53 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define LITTLEENDIAN 1 + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#ifdef __GNUC_STDC_INLINE__ +#define INLINE inline +#else +#define INLINE extern inline +#endif + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define SOFTFLOAT_BUILTIN_CLZ 1 +#include "opts-GCC.h" + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-x86_64-GCC/Makefile b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-x86_64-GCC/Makefile new file mode 100644 index 000000000..2ee5dad84 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-x86_64-GCC/Makefile @@ -0,0 +1,390 @@ + +#============================================================================= +# +# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic +# Package, Release 3e, by John R. Hauser. +# +# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +# University of California. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions, and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions, and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the University nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#============================================================================= + +SOURCE_DIR ?= ../../source +SPECIALIZE_TYPE ?= 8086-SSE + +SOFTFLOAT_OPTS ?= \ + -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \ + -DSOFTFLOAT_FAST_DIV64TO32 + +DELETE = rm -f +C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include +COMPILE_C = \ + gcc -c -Werror-implicit-function-declaration -DSOFTFLOAT_FAST_INT64 \ + $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@ +MAKELIB = ar crs $@ + +OBJ = .o +LIB = .a + +OTHER_HEADERS = $(SOURCE_DIR)/include/opts-GCC.h + +.PHONY: all +all: softfloat$(LIB) + +OBJS_PRIMITIVES = \ + s_eq128$(OBJ) \ + s_le128$(OBJ) \ + s_lt128$(OBJ) \ + s_shortShiftLeft128$(OBJ) \ + s_shortShiftRight128$(OBJ) \ + s_shortShiftRightJam64$(OBJ) \ + s_shortShiftRightJam64Extra$(OBJ) \ + s_shortShiftRightJam128$(OBJ) \ + s_shortShiftRightJam128Extra$(OBJ) \ + s_shiftRightJam32$(OBJ) \ + s_shiftRightJam64$(OBJ) \ + s_shiftRightJam64Extra$(OBJ) \ + s_shiftRightJam128$(OBJ) \ + s_shiftRightJam128Extra$(OBJ) \ + s_shiftRightJam256M$(OBJ) \ + s_countLeadingZeros8$(OBJ) \ + s_countLeadingZeros16$(OBJ) \ + s_countLeadingZeros32$(OBJ) \ + s_countLeadingZeros64$(OBJ) \ + s_add128$(OBJ) \ + s_add256M$(OBJ) \ + s_sub128$(OBJ) \ + s_sub256M$(OBJ) \ + s_mul64ByShifted32To128$(OBJ) \ + s_mul64To128$(OBJ) \ + s_mul128By32$(OBJ) \ + s_mul128To256M$(OBJ) \ + s_approxRecip_1Ks$(OBJ) \ + s_approxRecip32_1$(OBJ) \ + s_approxRecipSqrt_1Ks$(OBJ) \ + s_approxRecipSqrt32_1$(OBJ) \ + +OBJS_SPECIALIZE = \ + softfloat_raiseFlags$(OBJ) \ + s_f16UIToCommonNaN$(OBJ) \ + s_commonNaNToF16UI$(OBJ) \ + s_propagateNaNF16UI$(OBJ) \ + s_f32UIToCommonNaN$(OBJ) \ + s_commonNaNToF32UI$(OBJ) \ + s_propagateNaNF32UI$(OBJ) \ + s_f64UIToCommonNaN$(OBJ) \ + s_commonNaNToF64UI$(OBJ) \ + s_propagateNaNF64UI$(OBJ) \ + extF80M_isSignalingNaN$(OBJ) \ + s_extF80UIToCommonNaN$(OBJ) \ + s_commonNaNToExtF80UI$(OBJ) \ + s_propagateNaNExtF80UI$(OBJ) \ + f128M_isSignalingNaN$(OBJ) \ + s_f128UIToCommonNaN$(OBJ) \ + s_commonNaNToF128UI$(OBJ) \ + s_propagateNaNF128UI$(OBJ) \ + +OBJS_OTHERS = \ + s_roundToUI32$(OBJ) \ + s_roundToUI64$(OBJ) \ + s_roundToI32$(OBJ) \ + s_roundToI64$(OBJ) \ + s_normSubnormalF16Sig$(OBJ) \ + s_roundPackToF16$(OBJ) \ + s_normRoundPackToF16$(OBJ) \ + s_addMagsF16$(OBJ) \ + s_subMagsF16$(OBJ) \ + s_mulAddF16$(OBJ) \ + s_normSubnormalF32Sig$(OBJ) \ + s_roundPackToF32$(OBJ) \ + s_normRoundPackToF32$(OBJ) \ + s_addMagsF32$(OBJ) \ + s_subMagsF32$(OBJ) \ + s_mulAddF32$(OBJ) \ + s_normSubnormalF64Sig$(OBJ) \ + s_roundPackToF64$(OBJ) \ + s_normRoundPackToF64$(OBJ) \ + s_addMagsF64$(OBJ) \ + s_subMagsF64$(OBJ) \ + s_mulAddF64$(OBJ) \ + s_normSubnormalExtF80Sig$(OBJ) \ + s_roundPackToExtF80$(OBJ) \ + s_normRoundPackToExtF80$(OBJ) \ + s_addMagsExtF80$(OBJ) \ + s_subMagsExtF80$(OBJ) \ + s_normSubnormalF128Sig$(OBJ) \ + s_roundPackToF128$(OBJ) \ + s_normRoundPackToF128$(OBJ) \ + s_addMagsF128$(OBJ) \ + s_subMagsF128$(OBJ) \ + s_mulAddF128$(OBJ) \ + softfloat_state$(OBJ) \ + ui32_to_f16$(OBJ) \ + ui32_to_f32$(OBJ) \ + ui32_to_f64$(OBJ) \ + ui32_to_extF80$(OBJ) \ + ui32_to_extF80M$(OBJ) \ + ui32_to_f128$(OBJ) \ + ui32_to_f128M$(OBJ) \ + ui64_to_f16$(OBJ) \ + ui64_to_f32$(OBJ) \ + ui64_to_f64$(OBJ) \ + ui64_to_extF80$(OBJ) \ + ui64_to_extF80M$(OBJ) \ + ui64_to_f128$(OBJ) \ + ui64_to_f128M$(OBJ) \ + i32_to_f16$(OBJ) \ + i32_to_f32$(OBJ) \ + i32_to_f64$(OBJ) \ + i32_to_extF80$(OBJ) \ + i32_to_extF80M$(OBJ) \ + i32_to_f128$(OBJ) \ + i32_to_f128M$(OBJ) \ + i64_to_f16$(OBJ) \ + i64_to_f32$(OBJ) \ + i64_to_f64$(OBJ) \ + i64_to_extF80$(OBJ) \ + i64_to_extF80M$(OBJ) \ + i64_to_f128$(OBJ) \ + i64_to_f128M$(OBJ) \ + f16_to_ui32$(OBJ) \ + f16_to_ui64$(OBJ) \ + f16_to_i32$(OBJ) \ + f16_to_i64$(OBJ) \ + f16_to_ui32_r_minMag$(OBJ) \ + f16_to_ui64_r_minMag$(OBJ) \ + f16_to_i32_r_minMag$(OBJ) \ + f16_to_i64_r_minMag$(OBJ) \ + f16_to_f32$(OBJ) \ + f16_to_f64$(OBJ) \ + f16_to_extF80$(OBJ) \ + f16_to_extF80M$(OBJ) \ + f16_to_f128$(OBJ) \ + f16_to_f128M$(OBJ) \ + f16_roundToInt$(OBJ) \ + f16_add$(OBJ) \ + f16_sub$(OBJ) \ + f16_mul$(OBJ) \ + f16_mulAdd$(OBJ) \ + f16_div$(OBJ) \ + f16_rem$(OBJ) \ + f16_sqrt$(OBJ) \ + f16_eq$(OBJ) \ + f16_le$(OBJ) \ + f16_lt$(OBJ) \ + f16_eq_signaling$(OBJ) \ + f16_le_quiet$(OBJ) \ + f16_lt_quiet$(OBJ) \ + f16_isSignalingNaN$(OBJ) \ + f32_to_ui32$(OBJ) \ + f32_to_ui64$(OBJ) \ + f32_to_i32$(OBJ) \ + f32_to_i64$(OBJ) \ + f32_to_ui32_r_minMag$(OBJ) \ + f32_to_ui64_r_minMag$(OBJ) \ + f32_to_i32_r_minMag$(OBJ) \ + f32_to_i64_r_minMag$(OBJ) \ + f32_to_f16$(OBJ) \ + f32_to_f64$(OBJ) \ + f32_to_extF80$(OBJ) \ + f32_to_extF80M$(OBJ) \ + f32_to_f128$(OBJ) \ + f32_to_f128M$(OBJ) \ + f32_roundToInt$(OBJ) \ + f32_add$(OBJ) \ + f32_sub$(OBJ) \ + f32_mul$(OBJ) \ + f32_mulAdd$(OBJ) \ + f32_div$(OBJ) \ + f32_rem$(OBJ) \ + f32_sqrt$(OBJ) \ + f32_eq$(OBJ) \ + f32_le$(OBJ) \ + f32_lt$(OBJ) \ + f32_eq_signaling$(OBJ) \ + f32_le_quiet$(OBJ) \ + f32_lt_quiet$(OBJ) \ + f32_isSignalingNaN$(OBJ) \ + f64_to_ui32$(OBJ) \ + f64_to_ui64$(OBJ) \ + f64_to_i32$(OBJ) \ + f64_to_i64$(OBJ) \ + f64_to_ui32_r_minMag$(OBJ) \ + f64_to_ui64_r_minMag$(OBJ) \ + f64_to_i32_r_minMag$(OBJ) \ + f64_to_i64_r_minMag$(OBJ) \ + f64_to_f16$(OBJ) \ + f64_to_f32$(OBJ) \ + f64_to_extF80$(OBJ) \ + f64_to_extF80M$(OBJ) \ + f64_to_f128$(OBJ) \ + f64_to_f128M$(OBJ) \ + f64_roundToInt$(OBJ) \ + f64_add$(OBJ) \ + f64_sub$(OBJ) \ + f64_mul$(OBJ) \ + f64_mulAdd$(OBJ) \ + f64_div$(OBJ) \ + f64_rem$(OBJ) \ + f64_sqrt$(OBJ) \ + f64_eq$(OBJ) \ + f64_le$(OBJ) \ + f64_lt$(OBJ) \ + f64_eq_signaling$(OBJ) \ + f64_le_quiet$(OBJ) \ + f64_lt_quiet$(OBJ) \ + f64_isSignalingNaN$(OBJ) \ + extF80_to_ui32$(OBJ) \ + extF80_to_ui64$(OBJ) \ + extF80_to_i32$(OBJ) \ + extF80_to_i64$(OBJ) \ + extF80_to_ui32_r_minMag$(OBJ) \ + extF80_to_ui64_r_minMag$(OBJ) \ + extF80_to_i32_r_minMag$(OBJ) \ + extF80_to_i64_r_minMag$(OBJ) \ + extF80_to_f16$(OBJ) \ + extF80_to_f32$(OBJ) \ + extF80_to_f64$(OBJ) \ + extF80_to_f128$(OBJ) \ + extF80_roundToInt$(OBJ) \ + extF80_add$(OBJ) \ + extF80_sub$(OBJ) \ + extF80_mul$(OBJ) \ + extF80_div$(OBJ) \ + extF80_rem$(OBJ) \ + extF80_sqrt$(OBJ) \ + extF80_eq$(OBJ) \ + extF80_le$(OBJ) \ + extF80_lt$(OBJ) \ + extF80_eq_signaling$(OBJ) \ + extF80_le_quiet$(OBJ) \ + extF80_lt_quiet$(OBJ) \ + extF80_isSignalingNaN$(OBJ) \ + extF80M_to_ui32$(OBJ) \ + extF80M_to_ui64$(OBJ) \ + extF80M_to_i32$(OBJ) \ + extF80M_to_i64$(OBJ) \ + extF80M_to_ui32_r_minMag$(OBJ) \ + extF80M_to_ui64_r_minMag$(OBJ) \ + extF80M_to_i32_r_minMag$(OBJ) \ + extF80M_to_i64_r_minMag$(OBJ) \ + extF80M_to_f16$(OBJ) \ + extF80M_to_f32$(OBJ) \ + extF80M_to_f64$(OBJ) \ + extF80M_to_f128M$(OBJ) \ + extF80M_roundToInt$(OBJ) \ + extF80M_add$(OBJ) \ + extF80M_sub$(OBJ) \ + extF80M_mul$(OBJ) \ + extF80M_div$(OBJ) \ + extF80M_rem$(OBJ) \ + extF80M_sqrt$(OBJ) \ + extF80M_eq$(OBJ) \ + extF80M_le$(OBJ) \ + extF80M_lt$(OBJ) \ + extF80M_eq_signaling$(OBJ) \ + extF80M_le_quiet$(OBJ) \ + extF80M_lt_quiet$(OBJ) \ + f128_to_ui32$(OBJ) \ + f128_to_ui64$(OBJ) \ + f128_to_i32$(OBJ) \ + f128_to_i64$(OBJ) \ + f128_to_ui32_r_minMag$(OBJ) \ + f128_to_ui64_r_minMag$(OBJ) \ + f128_to_i32_r_minMag$(OBJ) \ + f128_to_i64_r_minMag$(OBJ) \ + f128_to_f16$(OBJ) \ + f128_to_f32$(OBJ) \ + f128_to_extF80$(OBJ) \ + f128_to_f64$(OBJ) \ + f128_roundToInt$(OBJ) \ + f128_add$(OBJ) \ + f128_sub$(OBJ) \ + f128_mul$(OBJ) \ + f128_mulAdd$(OBJ) \ + f128_div$(OBJ) \ + f128_rem$(OBJ) \ + f128_sqrt$(OBJ) \ + f128_eq$(OBJ) \ + f128_le$(OBJ) \ + f128_lt$(OBJ) \ + f128_eq_signaling$(OBJ) \ + f128_le_quiet$(OBJ) \ + f128_lt_quiet$(OBJ) \ + f128_isSignalingNaN$(OBJ) \ + f128M_to_ui32$(OBJ) \ + f128M_to_ui64$(OBJ) \ + f128M_to_i32$(OBJ) \ + f128M_to_i64$(OBJ) \ + f128M_to_ui32_r_minMag$(OBJ) \ + f128M_to_ui64_r_minMag$(OBJ) \ + f128M_to_i32_r_minMag$(OBJ) \ + f128M_to_i64_r_minMag$(OBJ) \ + f128M_to_f16$(OBJ) \ + f128M_to_f32$(OBJ) \ + f128M_to_extF80M$(OBJ) \ + f128M_to_f64$(OBJ) \ + f128M_roundToInt$(OBJ) \ + f128M_add$(OBJ) \ + f128M_sub$(OBJ) \ + f128M_mul$(OBJ) \ + f128M_mulAdd$(OBJ) \ + f128M_div$(OBJ) \ + f128M_rem$(OBJ) \ + f128M_sqrt$(OBJ) \ + f128M_eq$(OBJ) \ + f128M_le$(OBJ) \ + f128M_lt$(OBJ) \ + f128M_eq_signaling$(OBJ) \ + f128M_le_quiet$(OBJ) \ + f128M_lt_quiet$(OBJ) \ + +OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS) + +$(OBJS_ALL): \ + $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \ + $(SOURCE_DIR)/include/primitives.h +$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \ + $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \ + $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \ + $(SOURCE_DIR)/include/softfloat.h + +$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$*.c + +$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c + +softfloat$(LIB): $(OBJS_ALL) + $(DELETE) $@ + $(MAKELIB) $^ + +.PHONY: clean +clean: + $(DELETE) $(OBJS_ALL) softfloat$(LIB) + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-x86_64-GCC/platform.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-x86_64-GCC/platform.h new file mode 100644 index 000000000..c5e06f8e9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Linux-x86_64-GCC/platform.h @@ -0,0 +1,54 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define LITTLEENDIAN 1 + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#ifdef __GNUC_STDC_INLINE__ +#define INLINE inline +#else +#define INLINE extern inline +#endif + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define SOFTFLOAT_BUILTIN_CLZ 1 +#define SOFTFLOAT_INTRINSIC_INT128 1 +#include "opts-GCC.h" + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-MinGW/Makefile b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-MinGW/Makefile new file mode 100644 index 000000000..faeb39728 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-MinGW/Makefile @@ -0,0 +1,325 @@ + +#============================================================================= +# +# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic +# Package, Release 3e, by John R. Hauser. +# +# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +# University of California. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions, and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions, and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the University nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#============================================================================= + +SOURCE_DIR ?= ../../source +SPECIALIZE_TYPE ?= 8086 + +SOFTFLOAT_OPTS ?= \ + -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \ + -DSOFTFLOAT_FAST_DIV64TO32 + +DELETE = rm -f +C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include +COMPILE_C = \ + gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \ + $(C_INCLUDES) -O2 -o $@ +MAKELIB = ar crs $@ + +OBJ = .o +LIB = .a + +OTHER_HEADERS = + +.PHONY: all +all: softfloat$(LIB) + +OBJS_PRIMITIVES = \ + s_compare96M$(OBJ) \ + s_compare128M$(OBJ) \ + s_shortShiftLeft64To96M$(OBJ) \ + s_shortShiftLeftM$(OBJ) \ + s_shiftLeftM$(OBJ) \ + s_shortShiftRightM$(OBJ) \ + s_shortShiftRightJam64$(OBJ) \ + s_shortShiftRightJamM$(OBJ) \ + s_shiftRightJam32$(OBJ) \ + s_shiftRightJam64$(OBJ) \ + s_shiftRightJamM$(OBJ) \ + s_shiftRightM$(OBJ) \ + s_countLeadingZeros8$(OBJ) \ + s_countLeadingZeros16$(OBJ) \ + s_countLeadingZeros32$(OBJ) \ + s_countLeadingZeros64$(OBJ) \ + s_addM$(OBJ) \ + s_addCarryM$(OBJ) \ + s_addComplCarryM$(OBJ) \ + s_negXM$(OBJ) \ + s_sub1XM$(OBJ) \ + s_subM$(OBJ) \ + s_mul64To128M$(OBJ) \ + s_mul128MTo256M$(OBJ) \ + s_approxRecip_1Ks$(OBJ) \ + s_approxRecip32_1$(OBJ) \ + s_approxRecipSqrt_1Ks$(OBJ) \ + s_approxRecipSqrt32_1$(OBJ) \ + s_remStepMBy32$(OBJ) \ + +OBJS_SPECIALIZE = \ + softfloat_raiseFlags$(OBJ) \ + s_f16UIToCommonNaN$(OBJ) \ + s_commonNaNToF16UI$(OBJ) \ + s_propagateNaNF16UI$(OBJ) \ + s_f32UIToCommonNaN$(OBJ) \ + s_commonNaNToF32UI$(OBJ) \ + s_propagateNaNF32UI$(OBJ) \ + s_f64UIToCommonNaN$(OBJ) \ + s_commonNaNToF64UI$(OBJ) \ + s_propagateNaNF64UI$(OBJ) \ + extF80M_isSignalingNaN$(OBJ) \ + s_extF80MToCommonNaN$(OBJ) \ + s_commonNaNToExtF80M$(OBJ) \ + s_propagateNaNExtF80M$(OBJ) \ + f128M_isSignalingNaN$(OBJ) \ + s_f128MToCommonNaN$(OBJ) \ + s_commonNaNToF128M$(OBJ) \ + s_propagateNaNF128M$(OBJ) \ + +OBJS_OTHERS = \ + s_roundToUI32$(OBJ) \ + s_roundMToUI64$(OBJ) \ + s_roundToI32$(OBJ) \ + s_roundMToI64$(OBJ) \ + s_normSubnormalF16Sig$(OBJ) \ + s_roundPackToF16$(OBJ) \ + s_normRoundPackToF16$(OBJ) \ + s_addMagsF16$(OBJ) \ + s_subMagsF16$(OBJ) \ + s_mulAddF16$(OBJ) \ + s_normSubnormalF32Sig$(OBJ) \ + s_roundPackToF32$(OBJ) \ + s_normRoundPackToF32$(OBJ) \ + s_addMagsF32$(OBJ) \ + s_subMagsF32$(OBJ) \ + s_mulAddF32$(OBJ) \ + s_normSubnormalF64Sig$(OBJ) \ + s_roundPackToF64$(OBJ) \ + s_normRoundPackToF64$(OBJ) \ + s_addMagsF64$(OBJ) \ + s_subMagsF64$(OBJ) \ + s_mulAddF64$(OBJ) \ + s_tryPropagateNaNExtF80M$(OBJ) \ + s_invalidExtF80M$(OBJ) \ + s_normExtF80SigM$(OBJ) \ + s_roundPackMToExtF80M$(OBJ) \ + s_normRoundPackMToExtF80M$(OBJ) \ + s_addExtF80M$(OBJ) \ + s_compareNonnormExtF80M$(OBJ) \ + s_isNaNF128M$(OBJ) \ + s_tryPropagateNaNF128M$(OBJ) \ + s_invalidF128M$(OBJ) \ + s_shiftNormSigF128M$(OBJ) \ + s_roundPackMToF128M$(OBJ) \ + s_normRoundPackMToF128M$(OBJ) \ + s_addF128M$(OBJ) \ + s_mulAddF128M$(OBJ) \ + softfloat_state$(OBJ) \ + ui32_to_f16$(OBJ) \ + ui32_to_f32$(OBJ) \ + ui32_to_f64$(OBJ) \ + ui32_to_extF80M$(OBJ) \ + ui32_to_f128M$(OBJ) \ + ui64_to_f16$(OBJ) \ + ui64_to_f32$(OBJ) \ + ui64_to_f64$(OBJ) \ + ui64_to_extF80M$(OBJ) \ + ui64_to_f128M$(OBJ) \ + i32_to_f16$(OBJ) \ + i32_to_f32$(OBJ) \ + i32_to_f64$(OBJ) \ + i32_to_extF80M$(OBJ) \ + i32_to_f128M$(OBJ) \ + i64_to_f16$(OBJ) \ + i64_to_f32$(OBJ) \ + i64_to_f64$(OBJ) \ + i64_to_extF80M$(OBJ) \ + i64_to_f128M$(OBJ) \ + f16_to_ui32$(OBJ) \ + f16_to_ui64$(OBJ) \ + f16_to_i32$(OBJ) \ + f16_to_i64$(OBJ) \ + f16_to_ui32_r_minMag$(OBJ) \ + f16_to_ui64_r_minMag$(OBJ) \ + f16_to_i32_r_minMag$(OBJ) \ + f16_to_i64_r_minMag$(OBJ) \ + f16_to_f32$(OBJ) \ + f16_to_f64$(OBJ) \ + f16_to_extF80M$(OBJ) \ + f16_to_f128M$(OBJ) \ + f16_roundToInt$(OBJ) \ + f16_add$(OBJ) \ + f16_sub$(OBJ) \ + f16_mul$(OBJ) \ + f16_mulAdd$(OBJ) \ + f16_div$(OBJ) \ + f16_rem$(OBJ) \ + f16_sqrt$(OBJ) \ + f16_eq$(OBJ) \ + f16_le$(OBJ) \ + f16_lt$(OBJ) \ + f16_eq_signaling$(OBJ) \ + f16_le_quiet$(OBJ) \ + f16_lt_quiet$(OBJ) \ + f16_isSignalingNaN$(OBJ) \ + f32_to_ui32$(OBJ) \ + f32_to_ui64$(OBJ) \ + f32_to_i32$(OBJ) \ + f32_to_i64$(OBJ) \ + f32_to_ui32_r_minMag$(OBJ) \ + f32_to_ui64_r_minMag$(OBJ) \ + f32_to_i32_r_minMag$(OBJ) \ + f32_to_i64_r_minMag$(OBJ) \ + f32_to_f16$(OBJ) \ + f32_to_f64$(OBJ) \ + f32_to_extF80M$(OBJ) \ + f32_to_f128M$(OBJ) \ + f32_roundToInt$(OBJ) \ + f32_add$(OBJ) \ + f32_sub$(OBJ) \ + f32_mul$(OBJ) \ + f32_mulAdd$(OBJ) \ + f32_div$(OBJ) \ + f32_rem$(OBJ) \ + f32_sqrt$(OBJ) \ + f32_eq$(OBJ) \ + f32_le$(OBJ) \ + f32_lt$(OBJ) \ + f32_eq_signaling$(OBJ) \ + f32_le_quiet$(OBJ) \ + f32_lt_quiet$(OBJ) \ + f32_isSignalingNaN$(OBJ) \ + f64_to_ui32$(OBJ) \ + f64_to_ui64$(OBJ) \ + f64_to_i32$(OBJ) \ + f64_to_i64$(OBJ) \ + f64_to_ui32_r_minMag$(OBJ) \ + f64_to_ui64_r_minMag$(OBJ) \ + f64_to_i32_r_minMag$(OBJ) \ + f64_to_i64_r_minMag$(OBJ) \ + f64_to_f16$(OBJ) \ + f64_to_f32$(OBJ) \ + f64_to_extF80M$(OBJ) \ + f64_to_f128M$(OBJ) \ + f64_roundToInt$(OBJ) \ + f64_add$(OBJ) \ + f64_sub$(OBJ) \ + f64_mul$(OBJ) \ + f64_mulAdd$(OBJ) \ + f64_div$(OBJ) \ + f64_rem$(OBJ) \ + f64_sqrt$(OBJ) \ + f64_eq$(OBJ) \ + f64_le$(OBJ) \ + f64_lt$(OBJ) \ + f64_eq_signaling$(OBJ) \ + f64_le_quiet$(OBJ) \ + f64_lt_quiet$(OBJ) \ + f64_isSignalingNaN$(OBJ) \ + extF80M_to_ui32$(OBJ) \ + extF80M_to_ui64$(OBJ) \ + extF80M_to_i32$(OBJ) \ + extF80M_to_i64$(OBJ) \ + extF80M_to_ui32_r_minMag$(OBJ) \ + extF80M_to_ui64_r_minMag$(OBJ) \ + extF80M_to_i32_r_minMag$(OBJ) \ + extF80M_to_i64_r_minMag$(OBJ) \ + extF80M_to_f16$(OBJ) \ + extF80M_to_f32$(OBJ) \ + extF80M_to_f64$(OBJ) \ + extF80M_to_f128M$(OBJ) \ + extF80M_roundToInt$(OBJ) \ + extF80M_add$(OBJ) \ + extF80M_sub$(OBJ) \ + extF80M_mul$(OBJ) \ + extF80M_div$(OBJ) \ + extF80M_rem$(OBJ) \ + extF80M_sqrt$(OBJ) \ + extF80M_eq$(OBJ) \ + extF80M_le$(OBJ) \ + extF80M_lt$(OBJ) \ + extF80M_eq_signaling$(OBJ) \ + extF80M_le_quiet$(OBJ) \ + extF80M_lt_quiet$(OBJ) \ + f128M_to_ui32$(OBJ) \ + f128M_to_ui64$(OBJ) \ + f128M_to_i32$(OBJ) \ + f128M_to_i64$(OBJ) \ + f128M_to_ui32_r_minMag$(OBJ) \ + f128M_to_ui64_r_minMag$(OBJ) \ + f128M_to_i32_r_minMag$(OBJ) \ + f128M_to_i64_r_minMag$(OBJ) \ + f128M_to_f16$(OBJ) \ + f128M_to_f32$(OBJ) \ + f128M_to_f64$(OBJ) \ + f128M_to_extF80M$(OBJ) \ + f128M_roundToInt$(OBJ) \ + f128M_add$(OBJ) \ + f128M_sub$(OBJ) \ + f128M_mul$(OBJ) \ + f128M_mulAdd$(OBJ) \ + f128M_div$(OBJ) \ + f128M_rem$(OBJ) \ + f128M_sqrt$(OBJ) \ + f128M_eq$(OBJ) \ + f128M_le$(OBJ) \ + f128M_lt$(OBJ) \ + f128M_eq_signaling$(OBJ) \ + f128M_le_quiet$(OBJ) \ + f128M_lt_quiet$(OBJ) \ + +OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS) + +$(OBJS_ALL): \ + $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \ + $(SOURCE_DIR)/include/primitives.h +$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \ + $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \ + $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \ + $(SOURCE_DIR)/include/softfloat.h + +$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$*.c + +$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c + +softfloat$(LIB): $(OBJS_ALL) + $(DELETE) $@ + $(MAKELIB) $^ + +.PHONY: clean +clean: + $(DELETE) $(OBJS_ALL) softfloat$(LIB) + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-MinGW/platform.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-MinGW/platform.h new file mode 100644 index 000000000..d514dbc40 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-MinGW/platform.h @@ -0,0 +1,53 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define LITTLEENDIAN 1 + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#ifdef __GNUC_STDC_INLINE__ +#define INLINE inline +#else +#define INLINE extern inline +#endif + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define SOFTFLOAT_BUILTIN_CLZ 1 +#include "opts-GCC.h" + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-SSE2-MinGW/Makefile b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-SSE2-MinGW/Makefile new file mode 100644 index 000000000..ced977b69 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-SSE2-MinGW/Makefile @@ -0,0 +1,325 @@ + +#============================================================================= +# +# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic +# Package, Release 3e, by John R. Hauser. +# +# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +# University of California. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions, and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions, and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the University nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#============================================================================= + +SOURCE_DIR ?= ../../source +SPECIALIZE_TYPE ?= 8086-SSE + +SOFTFLOAT_OPTS ?= \ + -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \ + -DSOFTFLOAT_FAST_DIV64TO32 + +DELETE = rm -f +C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include +COMPILE_C = \ + gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \ + $(C_INCLUDES) -O2 -o $@ +MAKELIB = ar crs $@ + +OBJ = .o +LIB = .a + +OTHER_HEADERS = + +.PHONY: all +all: softfloat$(LIB) + +OBJS_PRIMITIVES = \ + s_compare96M$(OBJ) \ + s_compare128M$(OBJ) \ + s_shortShiftLeft64To96M$(OBJ) \ + s_shortShiftLeftM$(OBJ) \ + s_shiftLeftM$(OBJ) \ + s_shortShiftRightM$(OBJ) \ + s_shortShiftRightJam64$(OBJ) \ + s_shortShiftRightJamM$(OBJ) \ + s_shiftRightJam32$(OBJ) \ + s_shiftRightJam64$(OBJ) \ + s_shiftRightJamM$(OBJ) \ + s_shiftRightM$(OBJ) \ + s_countLeadingZeros8$(OBJ) \ + s_countLeadingZeros16$(OBJ) \ + s_countLeadingZeros32$(OBJ) \ + s_countLeadingZeros64$(OBJ) \ + s_addM$(OBJ) \ + s_addCarryM$(OBJ) \ + s_addComplCarryM$(OBJ) \ + s_negXM$(OBJ) \ + s_sub1XM$(OBJ) \ + s_subM$(OBJ) \ + s_mul64To128M$(OBJ) \ + s_mul128MTo256M$(OBJ) \ + s_approxRecip_1Ks$(OBJ) \ + s_approxRecip32_1$(OBJ) \ + s_approxRecipSqrt_1Ks$(OBJ) \ + s_approxRecipSqrt32_1$(OBJ) \ + s_remStepMBy32$(OBJ) \ + +OBJS_SPECIALIZE = \ + softfloat_raiseFlags$(OBJ) \ + s_f16UIToCommonNaN$(OBJ) \ + s_commonNaNToF16UI$(OBJ) \ + s_propagateNaNF16UI$(OBJ) \ + s_f32UIToCommonNaN$(OBJ) \ + s_commonNaNToF32UI$(OBJ) \ + s_propagateNaNF32UI$(OBJ) \ + s_f64UIToCommonNaN$(OBJ) \ + s_commonNaNToF64UI$(OBJ) \ + s_propagateNaNF64UI$(OBJ) \ + extF80M_isSignalingNaN$(OBJ) \ + s_extF80MToCommonNaN$(OBJ) \ + s_commonNaNToExtF80M$(OBJ) \ + s_propagateNaNExtF80M$(OBJ) \ + f128M_isSignalingNaN$(OBJ) \ + s_f128MToCommonNaN$(OBJ) \ + s_commonNaNToF128M$(OBJ) \ + s_propagateNaNF128M$(OBJ) \ + +OBJS_OTHERS = \ + s_roundToUI32$(OBJ) \ + s_roundMToUI64$(OBJ) \ + s_roundToI32$(OBJ) \ + s_roundMToI64$(OBJ) \ + s_normSubnormalF16Sig$(OBJ) \ + s_roundPackToF16$(OBJ) \ + s_normRoundPackToF16$(OBJ) \ + s_addMagsF16$(OBJ) \ + s_subMagsF16$(OBJ) \ + s_mulAddF16$(OBJ) \ + s_normSubnormalF32Sig$(OBJ) \ + s_roundPackToF32$(OBJ) \ + s_normRoundPackToF32$(OBJ) \ + s_addMagsF32$(OBJ) \ + s_subMagsF32$(OBJ) \ + s_mulAddF32$(OBJ) \ + s_normSubnormalF64Sig$(OBJ) \ + s_roundPackToF64$(OBJ) \ + s_normRoundPackToF64$(OBJ) \ + s_addMagsF64$(OBJ) \ + s_subMagsF64$(OBJ) \ + s_mulAddF64$(OBJ) \ + s_tryPropagateNaNExtF80M$(OBJ) \ + s_invalidExtF80M$(OBJ) \ + s_normExtF80SigM$(OBJ) \ + s_roundPackMToExtF80M$(OBJ) \ + s_normRoundPackMToExtF80M$(OBJ) \ + s_addExtF80M$(OBJ) \ + s_compareNonnormExtF80M$(OBJ) \ + s_isNaNF128M$(OBJ) \ + s_tryPropagateNaNF128M$(OBJ) \ + s_invalidF128M$(OBJ) \ + s_shiftNormSigF128M$(OBJ) \ + s_roundPackMToF128M$(OBJ) \ + s_normRoundPackMToF128M$(OBJ) \ + s_addF128M$(OBJ) \ + s_mulAddF128M$(OBJ) \ + softfloat_state$(OBJ) \ + ui32_to_f16$(OBJ) \ + ui32_to_f32$(OBJ) \ + ui32_to_f64$(OBJ) \ + ui32_to_extF80M$(OBJ) \ + ui32_to_f128M$(OBJ) \ + ui64_to_f16$(OBJ) \ + ui64_to_f32$(OBJ) \ + ui64_to_f64$(OBJ) \ + ui64_to_extF80M$(OBJ) \ + ui64_to_f128M$(OBJ) \ + i32_to_f16$(OBJ) \ + i32_to_f32$(OBJ) \ + i32_to_f64$(OBJ) \ + i32_to_extF80M$(OBJ) \ + i32_to_f128M$(OBJ) \ + i64_to_f16$(OBJ) \ + i64_to_f32$(OBJ) \ + i64_to_f64$(OBJ) \ + i64_to_extF80M$(OBJ) \ + i64_to_f128M$(OBJ) \ + f16_to_ui32$(OBJ) \ + f16_to_ui64$(OBJ) \ + f16_to_i32$(OBJ) \ + f16_to_i64$(OBJ) \ + f16_to_ui32_r_minMag$(OBJ) \ + f16_to_ui64_r_minMag$(OBJ) \ + f16_to_i32_r_minMag$(OBJ) \ + f16_to_i64_r_minMag$(OBJ) \ + f16_to_f32$(OBJ) \ + f16_to_f64$(OBJ) \ + f16_to_extF80M$(OBJ) \ + f16_to_f128M$(OBJ) \ + f16_roundToInt$(OBJ) \ + f16_add$(OBJ) \ + f16_sub$(OBJ) \ + f16_mul$(OBJ) \ + f16_mulAdd$(OBJ) \ + f16_div$(OBJ) \ + f16_rem$(OBJ) \ + f16_sqrt$(OBJ) \ + f16_eq$(OBJ) \ + f16_le$(OBJ) \ + f16_lt$(OBJ) \ + f16_eq_signaling$(OBJ) \ + f16_le_quiet$(OBJ) \ + f16_lt_quiet$(OBJ) \ + f16_isSignalingNaN$(OBJ) \ + f32_to_ui32$(OBJ) \ + f32_to_ui64$(OBJ) \ + f32_to_i32$(OBJ) \ + f32_to_i64$(OBJ) \ + f32_to_ui32_r_minMag$(OBJ) \ + f32_to_ui64_r_minMag$(OBJ) \ + f32_to_i32_r_minMag$(OBJ) \ + f32_to_i64_r_minMag$(OBJ) \ + f32_to_f16$(OBJ) \ + f32_to_f64$(OBJ) \ + f32_to_extF80M$(OBJ) \ + f32_to_f128M$(OBJ) \ + f32_roundToInt$(OBJ) \ + f32_add$(OBJ) \ + f32_sub$(OBJ) \ + f32_mul$(OBJ) \ + f32_mulAdd$(OBJ) \ + f32_div$(OBJ) \ + f32_rem$(OBJ) \ + f32_sqrt$(OBJ) \ + f32_eq$(OBJ) \ + f32_le$(OBJ) \ + f32_lt$(OBJ) \ + f32_eq_signaling$(OBJ) \ + f32_le_quiet$(OBJ) \ + f32_lt_quiet$(OBJ) \ + f32_isSignalingNaN$(OBJ) \ + f64_to_ui32$(OBJ) \ + f64_to_ui64$(OBJ) \ + f64_to_i32$(OBJ) \ + f64_to_i64$(OBJ) \ + f64_to_ui32_r_minMag$(OBJ) \ + f64_to_ui64_r_minMag$(OBJ) \ + f64_to_i32_r_minMag$(OBJ) \ + f64_to_i64_r_minMag$(OBJ) \ + f64_to_f16$(OBJ) \ + f64_to_f32$(OBJ) \ + f64_to_extF80M$(OBJ) \ + f64_to_f128M$(OBJ) \ + f64_roundToInt$(OBJ) \ + f64_add$(OBJ) \ + f64_sub$(OBJ) \ + f64_mul$(OBJ) \ + f64_mulAdd$(OBJ) \ + f64_div$(OBJ) \ + f64_rem$(OBJ) \ + f64_sqrt$(OBJ) \ + f64_eq$(OBJ) \ + f64_le$(OBJ) \ + f64_lt$(OBJ) \ + f64_eq_signaling$(OBJ) \ + f64_le_quiet$(OBJ) \ + f64_lt_quiet$(OBJ) \ + f64_isSignalingNaN$(OBJ) \ + extF80M_to_ui32$(OBJ) \ + extF80M_to_ui64$(OBJ) \ + extF80M_to_i32$(OBJ) \ + extF80M_to_i64$(OBJ) \ + extF80M_to_ui32_r_minMag$(OBJ) \ + extF80M_to_ui64_r_minMag$(OBJ) \ + extF80M_to_i32_r_minMag$(OBJ) \ + extF80M_to_i64_r_minMag$(OBJ) \ + extF80M_to_f16$(OBJ) \ + extF80M_to_f32$(OBJ) \ + extF80M_to_f64$(OBJ) \ + extF80M_to_f128M$(OBJ) \ + extF80M_roundToInt$(OBJ) \ + extF80M_add$(OBJ) \ + extF80M_sub$(OBJ) \ + extF80M_mul$(OBJ) \ + extF80M_div$(OBJ) \ + extF80M_rem$(OBJ) \ + extF80M_sqrt$(OBJ) \ + extF80M_eq$(OBJ) \ + extF80M_le$(OBJ) \ + extF80M_lt$(OBJ) \ + extF80M_eq_signaling$(OBJ) \ + extF80M_le_quiet$(OBJ) \ + extF80M_lt_quiet$(OBJ) \ + f128M_to_ui32$(OBJ) \ + f128M_to_ui64$(OBJ) \ + f128M_to_i32$(OBJ) \ + f128M_to_i64$(OBJ) \ + f128M_to_ui32_r_minMag$(OBJ) \ + f128M_to_ui64_r_minMag$(OBJ) \ + f128M_to_i32_r_minMag$(OBJ) \ + f128M_to_i64_r_minMag$(OBJ) \ + f128M_to_f16$(OBJ) \ + f128M_to_f32$(OBJ) \ + f128M_to_f64$(OBJ) \ + f128M_to_extF80M$(OBJ) \ + f128M_roundToInt$(OBJ) \ + f128M_add$(OBJ) \ + f128M_sub$(OBJ) \ + f128M_mul$(OBJ) \ + f128M_mulAdd$(OBJ) \ + f128M_div$(OBJ) \ + f128M_rem$(OBJ) \ + f128M_sqrt$(OBJ) \ + f128M_eq$(OBJ) \ + f128M_le$(OBJ) \ + f128M_lt$(OBJ) \ + f128M_eq_signaling$(OBJ) \ + f128M_le_quiet$(OBJ) \ + f128M_lt_quiet$(OBJ) \ + +OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS) + +$(OBJS_ALL): \ + $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \ + $(SOURCE_DIR)/include/primitives.h +$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \ + $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \ + $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \ + $(SOURCE_DIR)/include/softfloat.h + +$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$*.c + +$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c + +softfloat$(LIB): $(OBJS_ALL) + $(DELETE) $@ + $(MAKELIB) $^ + +.PHONY: clean +clean: + $(DELETE) $(OBJS_ALL) softfloat$(LIB) + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-SSE2-MinGW/platform.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-SSE2-MinGW/platform.h new file mode 100644 index 000000000..d514dbc40 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win32-SSE2-MinGW/platform.h @@ -0,0 +1,53 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define LITTLEENDIAN 1 + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#ifdef __GNUC_STDC_INLINE__ +#define INLINE inline +#else +#define INLINE extern inline +#endif + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define SOFTFLOAT_BUILTIN_CLZ 1 +#include "opts-GCC.h" + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win64-MinGW-w64/Makefile b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win64-MinGW-w64/Makefile new file mode 100644 index 000000000..cc5bc0c5b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win64-MinGW-w64/Makefile @@ -0,0 +1,390 @@ + +#============================================================================= +# +# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic +# Package, Release 3e, by John R. Hauser. +# +# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +# University of California. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions, and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions, and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the University nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#============================================================================= + +SOURCE_DIR ?= ../../source +SPECIALIZE_TYPE ?= 8086-SSE + +SOFTFLOAT_OPTS ?= \ + -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \ + -DSOFTFLOAT_FAST_DIV64TO32 + +DELETE = rm -f +C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include +COMPILE_C = \ + x86_64-w64-mingw32-gcc -c -Werror-implicit-function-declaration \ + -DSOFTFLOAT_FAST_INT64 $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@ +MAKELIB = x86_64-w64-mingw32-ar crs $@ + +OBJ = .o +LIB = .a + +OTHER_HEADERS = $(SOURCE_DIR)/include/opts-GCC.h + +.PHONY: all +all: softfloat$(LIB) + +OBJS_PRIMITIVES = \ + s_eq128$(OBJ) \ + s_le128$(OBJ) \ + s_lt128$(OBJ) \ + s_shortShiftLeft128$(OBJ) \ + s_shortShiftRight128$(OBJ) \ + s_shortShiftRightJam64$(OBJ) \ + s_shortShiftRightJam64Extra$(OBJ) \ + s_shortShiftRightJam128$(OBJ) \ + s_shortShiftRightJam128Extra$(OBJ) \ + s_shiftRightJam32$(OBJ) \ + s_shiftRightJam64$(OBJ) \ + s_shiftRightJam64Extra$(OBJ) \ + s_shiftRightJam128$(OBJ) \ + s_shiftRightJam128Extra$(OBJ) \ + s_shiftRightJam256M$(OBJ) \ + s_countLeadingZeros8$(OBJ) \ + s_countLeadingZeros16$(OBJ) \ + s_countLeadingZeros32$(OBJ) \ + s_countLeadingZeros64$(OBJ) \ + s_add128$(OBJ) \ + s_add256M$(OBJ) \ + s_sub128$(OBJ) \ + s_sub256M$(OBJ) \ + s_mul64ByShifted32To128$(OBJ) \ + s_mul64To128$(OBJ) \ + s_mul128By32$(OBJ) \ + s_mul128To256M$(OBJ) \ + s_approxRecip_1Ks$(OBJ) \ + s_approxRecip32_1$(OBJ) \ + s_approxRecipSqrt_1Ks$(OBJ) \ + s_approxRecipSqrt32_1$(OBJ) \ + +OBJS_SPECIALIZE = \ + softfloat_raiseFlags$(OBJ) \ + s_f16UIToCommonNaN$(OBJ) \ + s_commonNaNToF16UI$(OBJ) \ + s_propagateNaNF16UI$(OBJ) \ + s_f32UIToCommonNaN$(OBJ) \ + s_commonNaNToF32UI$(OBJ) \ + s_propagateNaNF32UI$(OBJ) \ + s_f64UIToCommonNaN$(OBJ) \ + s_commonNaNToF64UI$(OBJ) \ + s_propagateNaNF64UI$(OBJ) \ + extF80M_isSignalingNaN$(OBJ) \ + s_extF80UIToCommonNaN$(OBJ) \ + s_commonNaNToExtF80UI$(OBJ) \ + s_propagateNaNExtF80UI$(OBJ) \ + f128M_isSignalingNaN$(OBJ) \ + s_f128UIToCommonNaN$(OBJ) \ + s_commonNaNToF128UI$(OBJ) \ + s_propagateNaNF128UI$(OBJ) \ + +OBJS_OTHERS = \ + s_roundToUI32$(OBJ) \ + s_roundToUI64$(OBJ) \ + s_roundToI32$(OBJ) \ + s_roundToI64$(OBJ) \ + s_normSubnormalF16Sig$(OBJ) \ + s_roundPackToF16$(OBJ) \ + s_normRoundPackToF16$(OBJ) \ + s_addMagsF16$(OBJ) \ + s_subMagsF16$(OBJ) \ + s_mulAddF16$(OBJ) \ + s_normSubnormalF32Sig$(OBJ) \ + s_roundPackToF32$(OBJ) \ + s_normRoundPackToF32$(OBJ) \ + s_addMagsF32$(OBJ) \ + s_subMagsF32$(OBJ) \ + s_mulAddF32$(OBJ) \ + s_normSubnormalF64Sig$(OBJ) \ + s_roundPackToF64$(OBJ) \ + s_normRoundPackToF64$(OBJ) \ + s_addMagsF64$(OBJ) \ + s_subMagsF64$(OBJ) \ + s_mulAddF64$(OBJ) \ + s_normSubnormalExtF80Sig$(OBJ) \ + s_roundPackToExtF80$(OBJ) \ + s_normRoundPackToExtF80$(OBJ) \ + s_addMagsExtF80$(OBJ) \ + s_subMagsExtF80$(OBJ) \ + s_normSubnormalF128Sig$(OBJ) \ + s_roundPackToF128$(OBJ) \ + s_normRoundPackToF128$(OBJ) \ + s_addMagsF128$(OBJ) \ + s_subMagsF128$(OBJ) \ + s_mulAddF128$(OBJ) \ + softfloat_state$(OBJ) \ + ui32_to_f16$(OBJ) \ + ui32_to_f32$(OBJ) \ + ui32_to_f64$(OBJ) \ + ui32_to_extF80$(OBJ) \ + ui32_to_extF80M$(OBJ) \ + ui32_to_f128$(OBJ) \ + ui32_to_f128M$(OBJ) \ + ui64_to_f16$(OBJ) \ + ui64_to_f32$(OBJ) \ + ui64_to_f64$(OBJ) \ + ui64_to_extF80$(OBJ) \ + ui64_to_extF80M$(OBJ) \ + ui64_to_f128$(OBJ) \ + ui64_to_f128M$(OBJ) \ + i32_to_f16$(OBJ) \ + i32_to_f32$(OBJ) \ + i32_to_f64$(OBJ) \ + i32_to_extF80$(OBJ) \ + i32_to_extF80M$(OBJ) \ + i32_to_f128$(OBJ) \ + i32_to_f128M$(OBJ) \ + i64_to_f16$(OBJ) \ + i64_to_f32$(OBJ) \ + i64_to_f64$(OBJ) \ + i64_to_extF80$(OBJ) \ + i64_to_extF80M$(OBJ) \ + i64_to_f128$(OBJ) \ + i64_to_f128M$(OBJ) \ + f16_to_ui32$(OBJ) \ + f16_to_ui64$(OBJ) \ + f16_to_i32$(OBJ) \ + f16_to_i64$(OBJ) \ + f16_to_ui32_r_minMag$(OBJ) \ + f16_to_ui64_r_minMag$(OBJ) \ + f16_to_i32_r_minMag$(OBJ) \ + f16_to_i64_r_minMag$(OBJ) \ + f16_to_f32$(OBJ) \ + f16_to_f64$(OBJ) \ + f16_to_extF80$(OBJ) \ + f16_to_extF80M$(OBJ) \ + f16_to_f128$(OBJ) \ + f16_to_f128M$(OBJ) \ + f16_roundToInt$(OBJ) \ + f16_add$(OBJ) \ + f16_sub$(OBJ) \ + f16_mul$(OBJ) \ + f16_mulAdd$(OBJ) \ + f16_div$(OBJ) \ + f16_rem$(OBJ) \ + f16_sqrt$(OBJ) \ + f16_eq$(OBJ) \ + f16_le$(OBJ) \ + f16_lt$(OBJ) \ + f16_eq_signaling$(OBJ) \ + f16_le_quiet$(OBJ) \ + f16_lt_quiet$(OBJ) \ + f16_isSignalingNaN$(OBJ) \ + f32_to_ui32$(OBJ) \ + f32_to_ui64$(OBJ) \ + f32_to_i32$(OBJ) \ + f32_to_i64$(OBJ) \ + f32_to_ui32_r_minMag$(OBJ) \ + f32_to_ui64_r_minMag$(OBJ) \ + f32_to_i32_r_minMag$(OBJ) \ + f32_to_i64_r_minMag$(OBJ) \ + f32_to_f16$(OBJ) \ + f32_to_f64$(OBJ) \ + f32_to_extF80$(OBJ) \ + f32_to_extF80M$(OBJ) \ + f32_to_f128$(OBJ) \ + f32_to_f128M$(OBJ) \ + f32_roundToInt$(OBJ) \ + f32_add$(OBJ) \ + f32_sub$(OBJ) \ + f32_mul$(OBJ) \ + f32_mulAdd$(OBJ) \ + f32_div$(OBJ) \ + f32_rem$(OBJ) \ + f32_sqrt$(OBJ) \ + f32_eq$(OBJ) \ + f32_le$(OBJ) \ + f32_lt$(OBJ) \ + f32_eq_signaling$(OBJ) \ + f32_le_quiet$(OBJ) \ + f32_lt_quiet$(OBJ) \ + f32_isSignalingNaN$(OBJ) \ + f64_to_ui32$(OBJ) \ + f64_to_ui64$(OBJ) \ + f64_to_i32$(OBJ) \ + f64_to_i64$(OBJ) \ + f64_to_ui32_r_minMag$(OBJ) \ + f64_to_ui64_r_minMag$(OBJ) \ + f64_to_i32_r_minMag$(OBJ) \ + f64_to_i64_r_minMag$(OBJ) \ + f64_to_f16$(OBJ) \ + f64_to_f32$(OBJ) \ + f64_to_extF80$(OBJ) \ + f64_to_extF80M$(OBJ) \ + f64_to_f128$(OBJ) \ + f64_to_f128M$(OBJ) \ + f64_roundToInt$(OBJ) \ + f64_add$(OBJ) \ + f64_sub$(OBJ) \ + f64_mul$(OBJ) \ + f64_mulAdd$(OBJ) \ + f64_div$(OBJ) \ + f64_rem$(OBJ) \ + f64_sqrt$(OBJ) \ + f64_eq$(OBJ) \ + f64_le$(OBJ) \ + f64_lt$(OBJ) \ + f64_eq_signaling$(OBJ) \ + f64_le_quiet$(OBJ) \ + f64_lt_quiet$(OBJ) \ + f64_isSignalingNaN$(OBJ) \ + extF80_to_ui32$(OBJ) \ + extF80_to_ui64$(OBJ) \ + extF80_to_i32$(OBJ) \ + extF80_to_i64$(OBJ) \ + extF80_to_ui32_r_minMag$(OBJ) \ + extF80_to_ui64_r_minMag$(OBJ) \ + extF80_to_i32_r_minMag$(OBJ) \ + extF80_to_i64_r_minMag$(OBJ) \ + extF80_to_f16$(OBJ) \ + extF80_to_f32$(OBJ) \ + extF80_to_f64$(OBJ) \ + extF80_to_f128$(OBJ) \ + extF80_roundToInt$(OBJ) \ + extF80_add$(OBJ) \ + extF80_sub$(OBJ) \ + extF80_mul$(OBJ) \ + extF80_div$(OBJ) \ + extF80_rem$(OBJ) \ + extF80_sqrt$(OBJ) \ + extF80_eq$(OBJ) \ + extF80_le$(OBJ) \ + extF80_lt$(OBJ) \ + extF80_eq_signaling$(OBJ) \ + extF80_le_quiet$(OBJ) \ + extF80_lt_quiet$(OBJ) \ + extF80_isSignalingNaN$(OBJ) \ + extF80M_to_ui32$(OBJ) \ + extF80M_to_ui64$(OBJ) \ + extF80M_to_i32$(OBJ) \ + extF80M_to_i64$(OBJ) \ + extF80M_to_ui32_r_minMag$(OBJ) \ + extF80M_to_ui64_r_minMag$(OBJ) \ + extF80M_to_i32_r_minMag$(OBJ) \ + extF80M_to_i64_r_minMag$(OBJ) \ + extF80M_to_f16$(OBJ) \ + extF80M_to_f32$(OBJ) \ + extF80M_to_f64$(OBJ) \ + extF80M_to_f128M$(OBJ) \ + extF80M_roundToInt$(OBJ) \ + extF80M_add$(OBJ) \ + extF80M_sub$(OBJ) \ + extF80M_mul$(OBJ) \ + extF80M_div$(OBJ) \ + extF80M_rem$(OBJ) \ + extF80M_sqrt$(OBJ) \ + extF80M_eq$(OBJ) \ + extF80M_le$(OBJ) \ + extF80M_lt$(OBJ) \ + extF80M_eq_signaling$(OBJ) \ + extF80M_le_quiet$(OBJ) \ + extF80M_lt_quiet$(OBJ) \ + f128_to_ui32$(OBJ) \ + f128_to_ui64$(OBJ) \ + f128_to_i32$(OBJ) \ + f128_to_i64$(OBJ) \ + f128_to_ui32_r_minMag$(OBJ) \ + f128_to_ui64_r_minMag$(OBJ) \ + f128_to_i32_r_minMag$(OBJ) \ + f128_to_i64_r_minMag$(OBJ) \ + f128_to_f16$(OBJ) \ + f128_to_f32$(OBJ) \ + f128_to_extF80$(OBJ) \ + f128_to_f64$(OBJ) \ + f128_roundToInt$(OBJ) \ + f128_add$(OBJ) \ + f128_sub$(OBJ) \ + f128_mul$(OBJ) \ + f128_mulAdd$(OBJ) \ + f128_div$(OBJ) \ + f128_rem$(OBJ) \ + f128_sqrt$(OBJ) \ + f128_eq$(OBJ) \ + f128_le$(OBJ) \ + f128_lt$(OBJ) \ + f128_eq_signaling$(OBJ) \ + f128_le_quiet$(OBJ) \ + f128_lt_quiet$(OBJ) \ + f128_isSignalingNaN$(OBJ) \ + f128M_to_ui32$(OBJ) \ + f128M_to_ui64$(OBJ) \ + f128M_to_i32$(OBJ) \ + f128M_to_i64$(OBJ) \ + f128M_to_ui32_r_minMag$(OBJ) \ + f128M_to_ui64_r_minMag$(OBJ) \ + f128M_to_i32_r_minMag$(OBJ) \ + f128M_to_i64_r_minMag$(OBJ) \ + f128M_to_f16$(OBJ) \ + f128M_to_f32$(OBJ) \ + f128M_to_extF80M$(OBJ) \ + f128M_to_f64$(OBJ) \ + f128M_roundToInt$(OBJ) \ + f128M_add$(OBJ) \ + f128M_sub$(OBJ) \ + f128M_mul$(OBJ) \ + f128M_mulAdd$(OBJ) \ + f128M_div$(OBJ) \ + f128M_rem$(OBJ) \ + f128M_sqrt$(OBJ) \ + f128M_eq$(OBJ) \ + f128M_le$(OBJ) \ + f128M_lt$(OBJ) \ + f128M_eq_signaling$(OBJ) \ + f128M_le_quiet$(OBJ) \ + f128M_lt_quiet$(OBJ) \ + +OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS) + +$(OBJS_ALL): \ + $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \ + $(SOURCE_DIR)/include/primitives.h +$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \ + $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \ + $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \ + $(SOURCE_DIR)/include/softfloat.h + +$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$*.c + +$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c + +softfloat$(LIB): $(OBJS_ALL) + $(DELETE) $@ + $(MAKELIB) $^ + +.PHONY: clean +clean: + $(DELETE) $(OBJS_ALL) softfloat$(LIB) + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win64-MinGW-w64/platform.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win64-MinGW-w64/platform.h new file mode 100644 index 000000000..c5e06f8e9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/Win64-MinGW-w64/platform.h @@ -0,0 +1,54 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define LITTLEENDIAN 1 + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#ifdef __GNUC_STDC_INLINE__ +#define INLINE inline +#else +#define INLINE extern inline +#endif + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define SOFTFLOAT_BUILTIN_CLZ 1 +#define SOFTFLOAT_INTRINSIC_INT128 1 +#include "opts-GCC.h" + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-FAST_INT64/Makefile b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-FAST_INT64/Makefile new file mode 100644 index 000000000..78e7ff5aa --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-FAST_INT64/Makefile @@ -0,0 +1,391 @@ + +#============================================================================= +# +# This Makefile template is part of the SoftFloat IEEE Floating-Point +# Arithmetic Package, Release 3e, by John R. Hauser. +# +# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +# University of California. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions, and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions, and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the University nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#============================================================================= + +# Edit lines marked with `==>'. See "SoftFloat-source.html". + +==> SOURCE_DIR ?= ../../source +==> SPECIALIZE_TYPE ?= 8086 + +==> SOFTFLOAT_OPTS ?= \ +==> -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \ +==> -DSOFTFLOAT_FAST_DIV64TO32 + +==> DELETE = rm -f +==> C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include +==> COMPILE_C = \ +==> cc -c -DSOFTFLOAT_FAST_INT64 $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@ +==> MAKELIB = ar crs $@ + +==> OBJ = .o +==> LIB = .a + +==> OTHER_HEADERS = + +.PHONY: all +all: softfloat$(LIB) + +OBJS_PRIMITIVES = \ + s_eq128$(OBJ) \ + s_le128$(OBJ) \ + s_lt128$(OBJ) \ + s_shortShiftLeft128$(OBJ) \ + s_shortShiftRight128$(OBJ) \ + s_shortShiftRightJam64$(OBJ) \ + s_shortShiftRightJam64Extra$(OBJ) \ + s_shortShiftRightJam128$(OBJ) \ + s_shortShiftRightJam128Extra$(OBJ) \ + s_shiftRightJam32$(OBJ) \ + s_shiftRightJam64$(OBJ) \ + s_shiftRightJam64Extra$(OBJ) \ + s_shiftRightJam128$(OBJ) \ + s_shiftRightJam128Extra$(OBJ) \ + s_shiftRightJam256M$(OBJ) \ + s_countLeadingZeros8$(OBJ) \ + s_countLeadingZeros16$(OBJ) \ + s_countLeadingZeros32$(OBJ) \ + s_countLeadingZeros64$(OBJ) \ + s_add128$(OBJ) \ + s_add256M$(OBJ) \ + s_sub128$(OBJ) \ + s_sub256M$(OBJ) \ + s_mul64ByShifted32To128$(OBJ) \ + s_mul64To128$(OBJ) \ + s_mul128By32$(OBJ) \ + s_mul128To256M$(OBJ) \ + s_approxRecip_1Ks$(OBJ) \ + s_approxRecip32_1$(OBJ) \ + s_approxRecipSqrt_1Ks$(OBJ) \ + s_approxRecipSqrt32_1$(OBJ) \ + +OBJS_SPECIALIZE = \ + softfloat_raiseFlags$(OBJ) \ + s_f16UIToCommonNaN$(OBJ) \ + s_commonNaNToF16UI$(OBJ) \ + s_propagateNaNF16UI$(OBJ) \ + s_f32UIToCommonNaN$(OBJ) \ + s_commonNaNToF32UI$(OBJ) \ + s_propagateNaNF32UI$(OBJ) \ + s_f64UIToCommonNaN$(OBJ) \ + s_commonNaNToF64UI$(OBJ) \ + s_propagateNaNF64UI$(OBJ) \ + extF80M_isSignalingNaN$(OBJ) \ + s_extF80UIToCommonNaN$(OBJ) \ + s_commonNaNToExtF80UI$(OBJ) \ + s_propagateNaNExtF80UI$(OBJ) \ + f128M_isSignalingNaN$(OBJ) \ + s_f128UIToCommonNaN$(OBJ) \ + s_commonNaNToF128UI$(OBJ) \ + s_propagateNaNF128UI$(OBJ) \ + +OBJS_OTHERS = \ + s_roundToUI32$(OBJ) \ + s_roundToUI64$(OBJ) \ + s_roundToI32$(OBJ) \ + s_roundToI64$(OBJ) \ + s_normSubnormalF16Sig$(OBJ) \ + s_roundPackToF16$(OBJ) \ + s_normRoundPackToF16$(OBJ) \ + s_addMagsF16$(OBJ) \ + s_subMagsF16$(OBJ) \ + s_mulAddF16$(OBJ) \ + s_normSubnormalF32Sig$(OBJ) \ + s_roundPackToF32$(OBJ) \ + s_normRoundPackToF32$(OBJ) \ + s_addMagsF32$(OBJ) \ + s_subMagsF32$(OBJ) \ + s_mulAddF32$(OBJ) \ + s_normSubnormalF64Sig$(OBJ) \ + s_roundPackToF64$(OBJ) \ + s_normRoundPackToF64$(OBJ) \ + s_addMagsF64$(OBJ) \ + s_subMagsF64$(OBJ) \ + s_mulAddF64$(OBJ) \ + s_normSubnormalExtF80Sig$(OBJ) \ + s_roundPackToExtF80$(OBJ) \ + s_normRoundPackToExtF80$(OBJ) \ + s_addMagsExtF80$(OBJ) \ + s_subMagsExtF80$(OBJ) \ + s_normSubnormalF128Sig$(OBJ) \ + s_roundPackToF128$(OBJ) \ + s_normRoundPackToF128$(OBJ) \ + s_addMagsF128$(OBJ) \ + s_subMagsF128$(OBJ) \ + s_mulAddF128$(OBJ) \ + softfloat_state$(OBJ) \ + ui32_to_f16$(OBJ) \ + ui32_to_f32$(OBJ) \ + ui32_to_f64$(OBJ) \ + ui32_to_extF80$(OBJ) \ + ui32_to_extF80M$(OBJ) \ + ui32_to_f128$(OBJ) \ + ui32_to_f128M$(OBJ) \ + ui64_to_f16$(OBJ) \ + ui64_to_f32$(OBJ) \ + ui64_to_f64$(OBJ) \ + ui64_to_extF80$(OBJ) \ + ui64_to_extF80M$(OBJ) \ + ui64_to_f128$(OBJ) \ + ui64_to_f128M$(OBJ) \ + i32_to_f16$(OBJ) \ + i32_to_f32$(OBJ) \ + i32_to_f64$(OBJ) \ + i32_to_extF80$(OBJ) \ + i32_to_extF80M$(OBJ) \ + i32_to_f128$(OBJ) \ + i32_to_f128M$(OBJ) \ + i64_to_f16$(OBJ) \ + i64_to_f32$(OBJ) \ + i64_to_f64$(OBJ) \ + i64_to_extF80$(OBJ) \ + i64_to_extF80M$(OBJ) \ + i64_to_f128$(OBJ) \ + i64_to_f128M$(OBJ) \ + f16_to_ui32$(OBJ) \ + f16_to_ui64$(OBJ) \ + f16_to_i32$(OBJ) \ + f16_to_i64$(OBJ) \ + f16_to_ui32_r_minMag$(OBJ) \ + f16_to_ui64_r_minMag$(OBJ) \ + f16_to_i32_r_minMag$(OBJ) \ + f16_to_i64_r_minMag$(OBJ) \ + f16_to_f32$(OBJ) \ + f16_to_f64$(OBJ) \ + f16_to_extF80$(OBJ) \ + f16_to_extF80M$(OBJ) \ + f16_to_f128$(OBJ) \ + f16_to_f128M$(OBJ) \ + f16_roundToInt$(OBJ) \ + f16_add$(OBJ) \ + f16_sub$(OBJ) \ + f16_mul$(OBJ) \ + f16_mulAdd$(OBJ) \ + f16_div$(OBJ) \ + f16_rem$(OBJ) \ + f16_sqrt$(OBJ) \ + f16_eq$(OBJ) \ + f16_le$(OBJ) \ + f16_lt$(OBJ) \ + f16_eq_signaling$(OBJ) \ + f16_le_quiet$(OBJ) \ + f16_lt_quiet$(OBJ) \ + f16_isSignalingNaN$(OBJ) \ + f32_to_ui32$(OBJ) \ + f32_to_ui64$(OBJ) \ + f32_to_i32$(OBJ) \ + f32_to_i64$(OBJ) \ + f32_to_ui32_r_minMag$(OBJ) \ + f32_to_ui64_r_minMag$(OBJ) \ + f32_to_i32_r_minMag$(OBJ) \ + f32_to_i64_r_minMag$(OBJ) \ + f32_to_f16$(OBJ) \ + f32_to_f64$(OBJ) \ + f32_to_extF80$(OBJ) \ + f32_to_extF80M$(OBJ) \ + f32_to_f128$(OBJ) \ + f32_to_f128M$(OBJ) \ + f32_roundToInt$(OBJ) \ + f32_add$(OBJ) \ + f32_sub$(OBJ) \ + f32_mul$(OBJ) \ + f32_mulAdd$(OBJ) \ + f32_div$(OBJ) \ + f32_rem$(OBJ) \ + f32_sqrt$(OBJ) \ + f32_eq$(OBJ) \ + f32_le$(OBJ) \ + f32_lt$(OBJ) \ + f32_eq_signaling$(OBJ) \ + f32_le_quiet$(OBJ) \ + f32_lt_quiet$(OBJ) \ + f32_isSignalingNaN$(OBJ) \ + f64_to_ui32$(OBJ) \ + f64_to_ui64$(OBJ) \ + f64_to_i32$(OBJ) \ + f64_to_i64$(OBJ) \ + f64_to_ui32_r_minMag$(OBJ) \ + f64_to_ui64_r_minMag$(OBJ) \ + f64_to_i32_r_minMag$(OBJ) \ + f64_to_i64_r_minMag$(OBJ) \ + f64_to_f16$(OBJ) \ + f64_to_f32$(OBJ) \ + f64_to_extF80$(OBJ) \ + f64_to_extF80M$(OBJ) \ + f64_to_f128$(OBJ) \ + f64_to_f128M$(OBJ) \ + f64_roundToInt$(OBJ) \ + f64_add$(OBJ) \ + f64_sub$(OBJ) \ + f64_mul$(OBJ) \ + f64_mulAdd$(OBJ) \ + f64_div$(OBJ) \ + f64_rem$(OBJ) \ + f64_sqrt$(OBJ) \ + f64_eq$(OBJ) \ + f64_le$(OBJ) \ + f64_lt$(OBJ) \ + f64_eq_signaling$(OBJ) \ + f64_le_quiet$(OBJ) \ + f64_lt_quiet$(OBJ) \ + f64_isSignalingNaN$(OBJ) \ + extF80_to_ui32$(OBJ) \ + extF80_to_ui64$(OBJ) \ + extF80_to_i32$(OBJ) \ + extF80_to_i64$(OBJ) \ + extF80_to_ui32_r_minMag$(OBJ) \ + extF80_to_ui64_r_minMag$(OBJ) \ + extF80_to_i32_r_minMag$(OBJ) \ + extF80_to_i64_r_minMag$(OBJ) \ + extF80_to_f16$(OBJ) \ + extF80_to_f32$(OBJ) \ + extF80_to_f64$(OBJ) \ + extF80_to_f128$(OBJ) \ + extF80_roundToInt$(OBJ) \ + extF80_add$(OBJ) \ + extF80_sub$(OBJ) \ + extF80_mul$(OBJ) \ + extF80_div$(OBJ) \ + extF80_rem$(OBJ) \ + extF80_sqrt$(OBJ) \ + extF80_eq$(OBJ) \ + extF80_le$(OBJ) \ + extF80_lt$(OBJ) \ + extF80_eq_signaling$(OBJ) \ + extF80_le_quiet$(OBJ) \ + extF80_lt_quiet$(OBJ) \ + extF80_isSignalingNaN$(OBJ) \ + extF80M_to_ui32$(OBJ) \ + extF80M_to_ui64$(OBJ) \ + extF80M_to_i32$(OBJ) \ + extF80M_to_i64$(OBJ) \ + extF80M_to_ui32_r_minMag$(OBJ) \ + extF80M_to_ui64_r_minMag$(OBJ) \ + extF80M_to_i32_r_minMag$(OBJ) \ + extF80M_to_i64_r_minMag$(OBJ) \ + extF80M_to_f16$(OBJ) \ + extF80M_to_f32$(OBJ) \ + extF80M_to_f64$(OBJ) \ + extF80M_to_f128M$(OBJ) \ + extF80M_roundToInt$(OBJ) \ + extF80M_add$(OBJ) \ + extF80M_sub$(OBJ) \ + extF80M_mul$(OBJ) \ + extF80M_div$(OBJ) \ + extF80M_rem$(OBJ) \ + extF80M_sqrt$(OBJ) \ + extF80M_eq$(OBJ) \ + extF80M_le$(OBJ) \ + extF80M_lt$(OBJ) \ + extF80M_eq_signaling$(OBJ) \ + extF80M_le_quiet$(OBJ) \ + extF80M_lt_quiet$(OBJ) \ + f128_to_ui32$(OBJ) \ + f128_to_ui64$(OBJ) \ + f128_to_i32$(OBJ) \ + f128_to_i64$(OBJ) \ + f128_to_ui32_r_minMag$(OBJ) \ + f128_to_ui64_r_minMag$(OBJ) \ + f128_to_i32_r_minMag$(OBJ) \ + f128_to_i64_r_minMag$(OBJ) \ + f128_to_f16$(OBJ) \ + f128_to_f32$(OBJ) \ + f128_to_extF80$(OBJ) \ + f128_to_f64$(OBJ) \ + f128_roundToInt$(OBJ) \ + f128_add$(OBJ) \ + f128_sub$(OBJ) \ + f128_mul$(OBJ) \ + f128_mulAdd$(OBJ) \ + f128_div$(OBJ) \ + f128_rem$(OBJ) \ + f128_sqrt$(OBJ) \ + f128_eq$(OBJ) \ + f128_le$(OBJ) \ + f128_lt$(OBJ) \ + f128_eq_signaling$(OBJ) \ + f128_le_quiet$(OBJ) \ + f128_lt_quiet$(OBJ) \ + f128_isSignalingNaN$(OBJ) \ + f128M_to_ui32$(OBJ) \ + f128M_to_ui64$(OBJ) \ + f128M_to_i32$(OBJ) \ + f128M_to_i64$(OBJ) \ + f128M_to_ui32_r_minMag$(OBJ) \ + f128M_to_ui64_r_minMag$(OBJ) \ + f128M_to_i32_r_minMag$(OBJ) \ + f128M_to_i64_r_minMag$(OBJ) \ + f128M_to_f16$(OBJ) \ + f128M_to_f32$(OBJ) \ + f128M_to_extF80M$(OBJ) \ + f128M_to_f64$(OBJ) \ + f128M_roundToInt$(OBJ) \ + f128M_add$(OBJ) \ + f128M_sub$(OBJ) \ + f128M_mul$(OBJ) \ + f128M_mulAdd$(OBJ) \ + f128M_div$(OBJ) \ + f128M_rem$(OBJ) \ + f128M_sqrt$(OBJ) \ + f128M_eq$(OBJ) \ + f128M_le$(OBJ) \ + f128M_lt$(OBJ) \ + f128M_eq_signaling$(OBJ) \ + f128M_le_quiet$(OBJ) \ + f128M_lt_quiet$(OBJ) \ + +OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS) + +$(OBJS_ALL): \ + $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \ + $(SOURCE_DIR)/include/primitives.h +$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \ + $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \ + $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \ + $(SOURCE_DIR)/include/softfloat.h + +$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$*.c + +$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c + +softfloat$(LIB): $(OBJS_ALL) + $(DELETE) $@ + $(MAKELIB) $^ + +.PHONY: clean +clean: + $(DELETE) $(OBJS_ALL) softfloat$(LIB) + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-FAST_INT64/platform.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-FAST_INT64/platform.h new file mode 100644 index 000000000..20946587b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-FAST_INT64/platform.h @@ -0,0 +1,50 @@ + +/*============================================================================ + +This C header template is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +// Edit lines marked with `==>'. See "SoftFloat-source.html". + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +==> #define LITTLEENDIAN 1 + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +==> #define INLINE inline + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +==> #define THREAD_LOCAL _Thread_local + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-not-FAST_INT64/Makefile b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-not-FAST_INT64/Makefile new file mode 100644 index 000000000..48b2cd6bf --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-not-FAST_INT64/Makefile @@ -0,0 +1,325 @@ + +#============================================================================= +# +# This Makefile template is part of the SoftFloat IEEE Floating-Point +# Arithmetic Package, Release 3e, by John R. Hauser. +# +# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +# University of California. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions, and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions, and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# 3. Neither the name of the University nor the names of its contributors +# may be used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#============================================================================= + +# Edit lines marked with `==>'. See "SoftFloat-source.html". + +==> SOURCE_DIR ?= ../../source +==> SPECIALIZE_TYPE ?= 8086 + +==> SOFTFLOAT_OPTS ?= \ +==> -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \ +==> -DSOFTFLOAT_FAST_DIV64TO32 + +==> DELETE = rm -f +==> C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include +==> COMPILE_C = cc -c $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@ +==> MAKELIB = ar crs $@ + +==> OBJ = .o +==> LIB = .a + +==> OTHER_HEADERS = + +.PHONY: all +all: softfloat$(LIB) + +OBJS_PRIMITIVES = \ + s_compare96M$(OBJ) \ + s_compare128M$(OBJ) \ + s_shortShiftLeft64To96M$(OBJ) \ + s_shortShiftLeftM$(OBJ) \ + s_shiftLeftM$(OBJ) \ + s_shortShiftRightM$(OBJ) \ + s_shortShiftRightJam64$(OBJ) \ + s_shortShiftRightJamM$(OBJ) \ + s_shiftRightJam32$(OBJ) \ + s_shiftRightJam64$(OBJ) \ + s_shiftRightJamM$(OBJ) \ + s_shiftRightM$(OBJ) \ + s_countLeadingZeros8$(OBJ) \ + s_countLeadingZeros16$(OBJ) \ + s_countLeadingZeros32$(OBJ) \ + s_countLeadingZeros64$(OBJ) \ + s_addM$(OBJ) \ + s_addCarryM$(OBJ) \ + s_addComplCarryM$(OBJ) \ + s_negXM$(OBJ) \ + s_sub1XM$(OBJ) \ + s_subM$(OBJ) \ + s_mul64To128M$(OBJ) \ + s_mul128MTo256M$(OBJ) \ + s_approxRecip_1Ks$(OBJ) \ + s_approxRecip32_1$(OBJ) \ + s_approxRecipSqrt_1Ks$(OBJ) \ + s_approxRecipSqrt32_1$(OBJ) \ + s_remStepMBy32$(OBJ) \ + +OBJS_SPECIALIZE = \ + softfloat_raiseFlags$(OBJ) \ + s_f16UIToCommonNaN$(OBJ) \ + s_commonNaNToF16UI$(OBJ) \ + s_propagateNaNF16UI$(OBJ) \ + s_f32UIToCommonNaN$(OBJ) \ + s_commonNaNToF32UI$(OBJ) \ + s_propagateNaNF32UI$(OBJ) \ + s_f64UIToCommonNaN$(OBJ) \ + s_commonNaNToF64UI$(OBJ) \ + s_propagateNaNF64UI$(OBJ) \ + extF80M_isSignalingNaN$(OBJ) \ + s_extF80MToCommonNaN$(OBJ) \ + s_commonNaNToExtF80M$(OBJ) \ + s_propagateNaNExtF80M$(OBJ) \ + f128M_isSignalingNaN$(OBJ) \ + s_f128MToCommonNaN$(OBJ) \ + s_commonNaNToF128M$(OBJ) \ + s_propagateNaNF128M$(OBJ) \ + +OBJS_OTHERS = \ + s_roundToUI32$(OBJ) \ + s_roundMToUI64$(OBJ) \ + s_roundToI32$(OBJ) \ + s_roundMToI64$(OBJ) \ + s_normSubnormalF16Sig$(OBJ) \ + s_roundPackToF16$(OBJ) \ + s_normRoundPackToF16$(OBJ) \ + s_addMagsF16$(OBJ) \ + s_subMagsF16$(OBJ) \ + s_mulAddF16$(OBJ) \ + s_normSubnormalF32Sig$(OBJ) \ + s_roundPackToF32$(OBJ) \ + s_normRoundPackToF32$(OBJ) \ + s_addMagsF32$(OBJ) \ + s_subMagsF32$(OBJ) \ + s_mulAddF32$(OBJ) \ + s_normSubnormalF64Sig$(OBJ) \ + s_roundPackToF64$(OBJ) \ + s_normRoundPackToF64$(OBJ) \ + s_addMagsF64$(OBJ) \ + s_subMagsF64$(OBJ) \ + s_mulAddF64$(OBJ) \ + s_tryPropagateNaNExtF80M$(OBJ) \ + s_invalidExtF80M$(OBJ) \ + s_normExtF80SigM$(OBJ) \ + s_roundPackMToExtF80M$(OBJ) \ + s_normRoundPackMToExtF80M$(OBJ) \ + s_addExtF80M$(OBJ) \ + s_compareNonnormExtF80M$(OBJ) \ + s_isNaNF128M$(OBJ) \ + s_tryPropagateNaNF128M$(OBJ) \ + s_invalidF128M$(OBJ) \ + s_shiftNormSigF128M$(OBJ) \ + s_roundPackMToF128M$(OBJ) \ + s_normRoundPackMToF128M$(OBJ) \ + s_addF128M$(OBJ) \ + s_mulAddF128M$(OBJ) \ + softfloat_state$(OBJ) \ + ui32_to_f16$(OBJ) \ + ui32_to_f32$(OBJ) \ + ui32_to_f64$(OBJ) \ + ui32_to_extF80M$(OBJ) \ + ui32_to_f128M$(OBJ) \ + ui64_to_f16$(OBJ) \ + ui64_to_f32$(OBJ) \ + ui64_to_f64$(OBJ) \ + ui64_to_extF80M$(OBJ) \ + ui64_to_f128M$(OBJ) \ + i32_to_f16$(OBJ) \ + i32_to_f32$(OBJ) \ + i32_to_f64$(OBJ) \ + i32_to_extF80M$(OBJ) \ + i32_to_f128M$(OBJ) \ + i64_to_f16$(OBJ) \ + i64_to_f32$(OBJ) \ + i64_to_f64$(OBJ) \ + i64_to_extF80M$(OBJ) \ + i64_to_f128M$(OBJ) \ + f16_to_ui32$(OBJ) \ + f16_to_ui64$(OBJ) \ + f16_to_i32$(OBJ) \ + f16_to_i64$(OBJ) \ + f16_to_ui32_r_minMag$(OBJ) \ + f16_to_ui64_r_minMag$(OBJ) \ + f16_to_i32_r_minMag$(OBJ) \ + f16_to_i64_r_minMag$(OBJ) \ + f16_to_f32$(OBJ) \ + f16_to_f64$(OBJ) \ + f16_to_extF80M$(OBJ) \ + f16_to_f128M$(OBJ) \ + f16_roundToInt$(OBJ) \ + f16_add$(OBJ) \ + f16_sub$(OBJ) \ + f16_mul$(OBJ) \ + f16_mulAdd$(OBJ) \ + f16_div$(OBJ) \ + f16_rem$(OBJ) \ + f16_sqrt$(OBJ) \ + f16_eq$(OBJ) \ + f16_le$(OBJ) \ + f16_lt$(OBJ) \ + f16_eq_signaling$(OBJ) \ + f16_le_quiet$(OBJ) \ + f16_lt_quiet$(OBJ) \ + f16_isSignalingNaN$(OBJ) \ + f32_to_ui32$(OBJ) \ + f32_to_ui64$(OBJ) \ + f32_to_i32$(OBJ) \ + f32_to_i64$(OBJ) \ + f32_to_ui32_r_minMag$(OBJ) \ + f32_to_ui64_r_minMag$(OBJ) \ + f32_to_i32_r_minMag$(OBJ) \ + f32_to_i64_r_minMag$(OBJ) \ + f32_to_f16$(OBJ) \ + f32_to_f64$(OBJ) \ + f32_to_extF80M$(OBJ) \ + f32_to_f128M$(OBJ) \ + f32_roundToInt$(OBJ) \ + f32_add$(OBJ) \ + f32_sub$(OBJ) \ + f32_mul$(OBJ) \ + f32_mulAdd$(OBJ) \ + f32_div$(OBJ) \ + f32_rem$(OBJ) \ + f32_sqrt$(OBJ) \ + f32_eq$(OBJ) \ + f32_le$(OBJ) \ + f32_lt$(OBJ) \ + f32_eq_signaling$(OBJ) \ + f32_le_quiet$(OBJ) \ + f32_lt_quiet$(OBJ) \ + f32_isSignalingNaN$(OBJ) \ + f64_to_ui32$(OBJ) \ + f64_to_ui64$(OBJ) \ + f64_to_i32$(OBJ) \ + f64_to_i64$(OBJ) \ + f64_to_ui32_r_minMag$(OBJ) \ + f64_to_ui64_r_minMag$(OBJ) \ + f64_to_i32_r_minMag$(OBJ) \ + f64_to_i64_r_minMag$(OBJ) \ + f64_to_f16$(OBJ) \ + f64_to_f32$(OBJ) \ + f64_to_extF80M$(OBJ) \ + f64_to_f128M$(OBJ) \ + f64_roundToInt$(OBJ) \ + f64_add$(OBJ) \ + f64_sub$(OBJ) \ + f64_mul$(OBJ) \ + f64_mulAdd$(OBJ) \ + f64_div$(OBJ) \ + f64_rem$(OBJ) \ + f64_sqrt$(OBJ) \ + f64_eq$(OBJ) \ + f64_le$(OBJ) \ + f64_lt$(OBJ) \ + f64_eq_signaling$(OBJ) \ + f64_le_quiet$(OBJ) \ + f64_lt_quiet$(OBJ) \ + f64_isSignalingNaN$(OBJ) \ + extF80M_to_ui32$(OBJ) \ + extF80M_to_ui64$(OBJ) \ + extF80M_to_i32$(OBJ) \ + extF80M_to_i64$(OBJ) \ + extF80M_to_ui32_r_minMag$(OBJ) \ + extF80M_to_ui64_r_minMag$(OBJ) \ + extF80M_to_i32_r_minMag$(OBJ) \ + extF80M_to_i64_r_minMag$(OBJ) \ + extF80M_to_f16$(OBJ) \ + extF80M_to_f32$(OBJ) \ + extF80M_to_f64$(OBJ) \ + extF80M_to_f128M$(OBJ) \ + extF80M_roundToInt$(OBJ) \ + extF80M_add$(OBJ) \ + extF80M_sub$(OBJ) \ + extF80M_mul$(OBJ) \ + extF80M_div$(OBJ) \ + extF80M_rem$(OBJ) \ + extF80M_sqrt$(OBJ) \ + extF80M_eq$(OBJ) \ + extF80M_le$(OBJ) \ + extF80M_lt$(OBJ) \ + extF80M_eq_signaling$(OBJ) \ + extF80M_le_quiet$(OBJ) \ + extF80M_lt_quiet$(OBJ) \ + f128M_to_ui32$(OBJ) \ + f128M_to_ui64$(OBJ) \ + f128M_to_i32$(OBJ) \ + f128M_to_i64$(OBJ) \ + f128M_to_ui32_r_minMag$(OBJ) \ + f128M_to_ui64_r_minMag$(OBJ) \ + f128M_to_i32_r_minMag$(OBJ) \ + f128M_to_i64_r_minMag$(OBJ) \ + f128M_to_f16$(OBJ) \ + f128M_to_f32$(OBJ) \ + f128M_to_f64$(OBJ) \ + f128M_to_extF80M$(OBJ) \ + f128M_roundToInt$(OBJ) \ + f128M_add$(OBJ) \ + f128M_sub$(OBJ) \ + f128M_mul$(OBJ) \ + f128M_mulAdd$(OBJ) \ + f128M_div$(OBJ) \ + f128M_rem$(OBJ) \ + f128M_sqrt$(OBJ) \ + f128M_eq$(OBJ) \ + f128M_le$(OBJ) \ + f128M_lt$(OBJ) \ + f128M_eq_signaling$(OBJ) \ + f128M_le_quiet$(OBJ) \ + f128M_lt_quiet$(OBJ) \ + +OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS) + +$(OBJS_ALL): \ + $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \ + $(SOURCE_DIR)/include/primitives.h +$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \ + $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \ + $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \ + $(SOURCE_DIR)/include/softfloat.h + +$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$*.c + +$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c + $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c + +softfloat$(LIB): $(OBJS_ALL) + $(DELETE) $@ + $(MAKELIB) $^ + +.PHONY: clean +clean: + $(DELETE) $(OBJS_ALL) softfloat$(LIB) + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-not-FAST_INT64/platform.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-not-FAST_INT64/platform.h new file mode 100644 index 000000000..20946587b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/build/template-not-FAST_INT64/platform.h @@ -0,0 +1,50 @@ + +/*============================================================================ + +This C header template is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +// Edit lines marked with `==>'. See "SoftFloat-source.html". + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +==> #define LITTLEENDIAN 1 + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +==> #define INLINE inline + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +==> #define THREAD_LOCAL _Thread_local + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/doc/SoftFloat-history.html b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/doc/SoftFloat-history.html new file mode 100644 index 000000000..d81c6bc5a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/doc/SoftFloat-history.html @@ -0,0 +1,258 @@ + +<HTML> + +<HEAD> +<TITLE>Berkeley SoftFloat History</TITLE> +</HEAD> + +<BODY> + +<H1>History of Berkeley SoftFloat, to Release 3e</H1> + +<P> +John R. Hauser<BR> +2018 January 20<BR> +</P> + + +<H3>Release 3e (2018 January)</H3> + +<UL> + +<LI> +Changed the default numeric code for optional rounding mode <CODE>odd</CODE> +(round to odd, also known as <EM>jamming</EM>) from 5 to 6. + +<LI> +Modified the behavior of rounding mode <CODE>odd</CODE> when rounding to an +integer value (either conversion to an integer format or a +‘<CODE>roundToInt</CODE>’ function). +Previously, for those cases only, rounding mode <CODE>odd</CODE> acted the same +as rounding to minimum magnitude. +Now all operations are rounded consistently. + +<LI> +Fixed some errors in the specialization code modeling Intel x86 floating-point, +specifically the integers returned on invalid operations and the propagation of +NaN payloads in a few rare cases. + +<LI> +Added specialization code modeling ARM floating-point, conforming to VFPv2 or +later. + +<LI> +Added an example target for ARM processors. + +<LI> +Fixed a minor bug whereby function <CODE>f16_to_ui64</CODE> might return a +different integer than expected in the case that the floating-point operand is +negative. + +<LI> +Added example target-specific optimization for GCC, employing GCC instrinsics +and support for <NOBR>128-bit</NOBR> integer arithmetic. + +<LI> +Made other minor improvements. + +</UL> + + +<H3>Release 3d (2017 August)</H3> + +<UL> + +<LI> +Fixed bugs in the square root functions for <NOBR>64-bit</NOBR> +double-precision, <NOBR>80-bit</NOBR> double-extended-precision, and +<NOBR>128-bit</NOBR> quadruple-precision. +For <NOBR>64-bit</NOBR> double-precision (<CODE>f64_sqrt</CODE>), the result +could sometimes be off by <NOBR>1 unit</NOBR> in the last place +(<NOBR>1 ulp</NOBR>) from what it should be. +For the larger formats, the square root could be wrong in a large portion of +the less-significant bits. +(A bug in <CODE>f128_sqrt</CODE> was first reported by Alexei Sibidanov.) + +</UL> + + +<H3>Release 3c (2017 February)</H3> + +<UL> + +<LI> +Added optional rounding mode <CODE>odd</CODE> (round to odd, also known as +<EM>jamming</EM>). + +<LI> +Corrected the documentation concerning non-canonical representations in +<NOBR>80-bit</NOBR> double-extended-precision. + +</UL> + + +<H3>Release 3b (2016 July)</H3> + +<UL> + +<LI> +Implemented the common <NOBR>16-bit</NOBR> “half-precision” +floating-point format (<CODE>float16_t</CODE>). + +<LI> +Made the integer values returned on invalid conversions to integer formats +be determined by the port-specific specialization instead of being the same for +all ports. + +<LI> +Added preprocessor macro <CODE>THREAD_LOCAL</CODE> to allow the floating-point +state (modes and exception flags) to be made per-thread. + +<LI> +Modified the provided Makefiles to allow some options to be overridden from the +<CODE>make</CODE> command. + +<LI> +Made other minor improvements. + +</UL> + + +<H3>Release 3a (2015 October)</H3> + +<UL> + +<LI> +Replaced the license text supplied by the University of California, Berkeley. + +</UL> + + +<H3>Release 3 (2015 February)</H3> + +<UL> + +<LI> +Complete rewrite, funded by the University of California, Berkeley, and +consequently having a different use license than earlier releases. +Major changes included renaming most types and functions, upgrading some +algorithms, restructuring the source files, and making SoftFloat into a true +library. + +<LI> +Added functions to convert between floating-point and unsigned integers, both +<NOBR>32-bit</NOBR> and <NOBR>64-bit</NOBR> (<CODE>uint32_t</CODE> and +<CODE>uint64_t</CODE>). + +<LI> +Added functions for fused multiply-add, for all supported floating-point +formats except <NOBR>80-bit</NOBR> double-extended-precision. + +<LI> +Added support for a fifth rounding mode, <CODE>near_maxMag</CODE> (round to +nearest, with ties to maximum magnitude, away from zero). + +<LI> +Dropped the <CODE>timesoftfloat</CODE> program (now part of the Berkeley +TestFloat package). + +</UL> + + +<H3>Release 2c (2015 January)</H3> + +<UL> + +<LI> +Fixed mistakes affecting some <NOBR>64-bit</NOBR> processors. + +<LI> +Further improved the documentation and the wording for the legal restrictions +on using SoftFloat releases <NOBR>through 2c</NOBR> (not applicable to +<NOBR>Release 3</NOBR> or later). + +</UL> + + +<H3>Release 2b (2002 May)</H3> + +<UL> + +<LI> +Made minor updates to the documentation, including improved wording for the +legal restrictions on using SoftFloat. + +</UL> + + +<H3>Release 2a (1998 December)</H3> + +<UL> + +<LI> +Added functions to convert between <NOBR>64-bit</NOBR> integers +(<CODE>int64</CODE>) and all supported floating-point formats. + +<LI> +Fixed a bug in all <NOBR>64-bit</NOBR>-version square root functions except +<CODE>float32_sqrt</CODE> that caused the result sometimes to be off by +<NOBR>1 unit</NOBR> in the last place (<NOBR>1 ulp</NOBR>) from what it should +be. +(Bug discovered by Paul Donahue.) + +<LI> +Improved the Makefiles. +</UL> + + +<H3>Release 2 (1997 June)</H3> + +<UL> + +<LI> +Created the <NOBR>64-bit</NOBR> (<CODE>bits64</CODE>) version, adding the +<CODE>floatx80</CODE> and <CODE>float128</CODE> formats. + +<LI> +Changed the source directory structure, splitting the sources into a +<CODE>bits32</CODE> and a <CODE>bits64</CODE> version. +Renamed <CODE>environment.h</CODE> to <CODE>milieu.h</CODE> to avoid confusion +with environment variables. + +<LI> +Fixed a small error that caused <CODE>float64_round_to_int</CODE> often to +round the wrong way in nearest/even mode when the operand was between +2<SUP>20</SUP> and 2<SUP>21</SUP> and halfway between two integers. + +</UL> + + +<H3>Release 1a (1996 July)</H3> + +<UL> + +<LI> +Corrected a mistake that caused borderline underflow cases not to raise the +underflow flag when they should have. +(Problem reported by Doug Priest.) + +<LI> +Added the <CODE>float_detect_tininess</CODE> variable to control whether +tininess is detected before or after rounding. + +</UL> + + +<H3>Release 1 (1996 July)</H3> + +<UL> + +<LI> +Original release, based on work done for the International Computer Science +Institute (ICSI) in Berkeley, California. + +</UL> + + +</BODY> + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/doc/SoftFloat-source.html b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/doc/SoftFloat-source.html new file mode 100644 index 000000000..4ff9d4c45 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/doc/SoftFloat-source.html @@ -0,0 +1,686 @@ + +<HTML> + +<HEAD> +<TITLE>Berkeley SoftFloat Source Documentation</TITLE> +</HEAD> + +<BODY> + +<H1>Berkeley SoftFloat Release 3e: Source Documentation</H1> + +<P> +John R. Hauser<BR> +2018 January 20<BR> +</P> + + +<H2>Contents</H2> + +<BLOCKQUOTE> +<TABLE BORDER=0 CELLSPACING=0 CELLPADDING=0> +<COL WIDTH=25> +<COL WIDTH=*> +<TR><TD COLSPAN=2>1. Introduction</TD></TR> +<TR><TD COLSPAN=2>2. Limitations</TD></TR> +<TR><TD COLSPAN=2>3. Acknowledgments and License</TD></TR> +<TR><TD COLSPAN=2>4. SoftFloat Package Directory Structure</TD></TR> +<TR><TD COLSPAN=2>5. Issues for Porting SoftFloat to a New Target</TD></TR> +<TR> + <TD></TD> + <TD>5.1. Standard Headers <CODE><stdbool.h></CODE> and + <CODE><stdint.h></CODE></TD> +</TR> +<TR><TD></TD><TD>5.2. Specializing Floating-Point Behavior</TD></TR> +<TR><TD></TD><TD>5.3. Macros for Build Options</TD></TR> +<TR><TD></TD><TD>5.4. Adapting a Template Target Directory</TD></TR> +<TR> + <TD></TD><TD>5.5. Target-Specific Optimization of Primitive Functions</TD> +</TR> +<TR><TD COLSPAN=2>6. Testing SoftFloat</TD></TR> +<TR> + <TD COLSPAN=2>7. Providing SoftFloat as a Common Library for Applications</TD> +</TR> +<TR><TD COLSPAN=2>8. Contact Information</TD></TR> +</TABLE> +</BLOCKQUOTE> + + +<H2>1. Introduction</H2> + +<P> +This document gives information needed for compiling and/or porting Berkeley +SoftFloat, a library of C functions implementing binary floating-point +conforming to the IEEE Standard for Floating-Point Arithmetic. +For basic documentation about SoftFloat refer to +<A HREF="SoftFloat.html"><NOBR><CODE>SoftFloat.html</CODE></NOBR></A>. +</P> + +<P> +The source code for SoftFloat is intended to be relatively machine-independent +and should be compilable with any ISO-Standard C compiler that also supports +<NOBR>64-bit</NOBR> integers. +SoftFloat has been successfully compiled with the GNU C Compiler +(<CODE>gcc</CODE>) for several platforms. +</P> + +<P> +<NOBR>Release 3</NOBR> of SoftFloat was a complete rewrite relative to +<NOBR>Release 2</NOBR> or earlier. +Changes to the interface of SoftFloat functions are documented in +<A HREF="SoftFloat.html"><NOBR><CODE>SoftFloat.html</CODE></NOBR></A>. +The current version of SoftFloat is <NOBR>Release 3e</NOBR>. +</P> + + +<H2>2. Limitations</H2> + +<P> +SoftFloat assumes the computer has an addressable byte size of either 8 or +<NOBR>16 bits</NOBR>. +(Nearly all computers in use today have <NOBR>8-bit</NOBR> bytes.) +</P> + +<P> +SoftFloat is written in C and is designed to work with other C code. +The C compiler used must conform at a minimum to the 1989 ANSI standard for the +C language (same as the 1990 ISO standard) and must in addition support basic +arithmetic on <NOBR>64-bit</NOBR> integers. +Earlier releases of SoftFloat included implementations of <NOBR>32-bit</NOBR> +single-precision and <NOBR>64-bit</NOBR> double-precision floating-point that +did not require <NOBR>64-bit</NOBR> integers, but this option is not supported +starting with <NOBR>Release 3</NOBR>. +Since 1999, ISO standards for C have mandated compiler support for +<NOBR>64-bit</NOBR> integers. +A compiler conforming to the 1999 C Standard or later is recommended but not +strictly required. +</P> + +<P> +<NOBR>C Standard</NOBR> header files <CODE><stdbool.h></CODE> and +<CODE><stdint.h></CODE> are required for defining standard Boolean and +integer types. +If these headers are not supplied with the C compiler, minimal substitutes must +be provided. +SoftFloat’s dependence on these headers is detailed later in +<NOBR>section 5.1</NOBR>, <I>Standard Headers <CODE><stdbool.h></CODE> +and <CODE><stdint.h></CODE></I>. +</P> + + +<H2>3. Acknowledgments and License</H2> + +<P> +The SoftFloat package was written by me, <NOBR>John R.</NOBR> Hauser. +<NOBR>Release 3</NOBR> of SoftFloat was a completely new implementation +supplanting earlier releases. +The project to create <NOBR>Release 3</NOBR> (now <NOBR>through 3e</NOBR>) was +done in the employ of the University of California, Berkeley, within the +Department of Electrical Engineering and Computer Sciences, first for the +Parallel Computing Laboratory (Par Lab) and then for the ASPIRE Lab. +The work was officially overseen by Prof. Krste Asanovic, with funding provided +by these sources: +<BLOCKQUOTE> +<TABLE> +<COL> +<COL WIDTH=10> +<COL> +<TR> +<TD VALIGN=TOP><NOBR>Par Lab:</NOBR></TD> +<TD></TD> +<TD> +Microsoft (Award #024263), Intel (Award #024894), and U.C. Discovery +(Award #DIG07-10227), with additional support from Par Lab affiliates Nokia, +NVIDIA, Oracle, and Samsung. +</TD> +</TR> +<TR> +<TD VALIGN=TOP><NOBR>ASPIRE Lab:</NOBR></TD> +<TD></TD> +<TD> +DARPA PERFECT program (Award #HR0011-12-2-0016), with additional support from +ASPIRE industrial sponsor Intel and ASPIRE affiliates Google, Nokia, NVIDIA, +Oracle, and Samsung. +</TD> +</TR> +</TABLE> +</BLOCKQUOTE> +</P> + +<P> +The following applies to the whole of SoftFloat <NOBR>Release 3e</NOBR> as well +as to each source file individually. +</P> + +<P> +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the +University of California. +All rights reserved. +</P> + +<P> +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: +<OL> + +<LI> +<P> +Redistributions of source code must retain the above copyright notice, this +list of conditions, and the following disclaimer. +</P> + +<LI> +<P> +Redistributions in binary form must reproduce the above copyright notice, this +list of conditions, and the following disclaimer in the documentation and/or +other materials provided with the distribution. +</P> + +<LI> +<P> +Neither the name of the University nor the names of its contributors may be +used to endorse or promote products derived from this software without specific +prior written permission. +</P> + +</OL> +</P> + +<P> +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS “AS IS”, +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. +IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +</P> + + +<H2>4. SoftFloat Package Directory Structure</H2> + +<P> +Because SoftFloat is targeted to multiple platforms, its source code is +slightly scattered between target-specific and target-independent directories +and files. +The supplied directory structure is as follows: +<BLOCKQUOTE> +<PRE> +doc +source + include + 8086 + 8086-SSE + ARM-VFPv2 + ARM-VFPv2-defaultNaN +build + template-FAST_INT64 + template-not-FAST_INT64 + Linux-386-GCC + Linux-386-SSE2-GCC + Linux-x86_64-GCC + Linux-ARM-VFPv2-GCC + Win32-MinGW + Win32-SSE2-MinGW + Win64-MinGW-w64 +</PRE> +</BLOCKQUOTE> +The majority of the SoftFloat sources are provided in the <CODE>source</CODE> +directory. +The <CODE>include</CODE> subdirectory contains several header files +(unsurprisingly), while the other subdirectories of <CODE>source</CODE> contain +source files that specialize the floating-point behavior to match particular +processor families: +<BLOCKQUOTE> +<DL> +<DT><CODE>8086</CODE></DT> +<DD> +Intel’s older, 8087-derived floating-point, extended to all supported +floating-point types +</DD> +<DT><CODE>8086-SSE</CODE></DT> +<DD> +Intel’s x86 processors with Streaming SIMD Extensions (SSE) and later +compatible extensions, having 8087 behavior for <NOBR>80-bit</NOBR> +double-extended-precision (<CODE>extFloat80_t</CODE>) and SSE behavior for +other floating-point types +</DD> +<DT><CODE>ARM-VFPv2</CODE></DT> +<DD> +ARM’s VFPv2 or later floating-point, with NaN payload propagation +</DD> +<DT><CODE>ARM-VFPv2-defaultNaN</CODE></DT> +<DD> +ARM’s VFPv2 or later floating-point, with the “default NaN” +option +</DD> +</DL> +</BLOCKQUOTE> +If other specializations are attempted, these would be expected to be other +subdirectories of <CODE>source</CODE> alongside the ones listed above. +Specialization is covered later, in <NOBR>section 5.2</NOBR>, <I>Specializing +Floating-Point Behavior</I>. +</P> + +<P> +The <CODE>build</CODE> directory is intended to contain a subdirectory for each +target platform for which a build of the SoftFloat library may be created. +For each build target, the target’s subdirectory is where all derived +object files and the completed SoftFloat library (typically +<CODE>softfloat.a</CODE> or <CODE>libsoftfloat.a</CODE>) are created. +The two <CODE>template</CODE> subdirectories are not actual build targets but +contain sample files for creating new target directories. +(The meaning of <CODE>FAST_INT64</CODE> will be explained later.) +</P> + +<P> +Ignoring the <CODE>template</CODE> directories, the supplied target directories +are intended to follow a naming system of +<NOBR><CODE><<I>execution-environment</I>>-<<I>compiler</I>></CODE></NOBR>. +For the example targets, +<NOBR><CODE><<I>execution-environment</I>></CODE></NOBR> is +<NOBR><CODE>Linux-386</CODE></NOBR>, <NOBR><CODE>Linux-386-SSE2</CODE></NOBR>, +<NOBR><CODE>Linux-x86_64</CODE></NOBR>, +<NOBR><CODE>Linux-ARM-VFPv2</CODE></NOBR>, <CODE>Win32</CODE>, +<NOBR><CODE>Win32-SSE2</CODE></NOBR>, or <CODE>Win64</CODE>, and +<NOBR><CODE><<I>compiler</I>></CODE></NOBR> is <CODE>GCC</CODE>, +<CODE>MinGW</CODE>, or <NOBR><CODE>MinGW-w64</CODE></NOBR>. +</P> + +<P> +All of the supplied target directories are merely examples that may or may not +be correct for compiling on any particular system. +Despite requests, there are currently no plans to include and maintain in the +SoftFloat package the build files needed for a great many users’ +compilation environments, which can span a huge range of operating systems, +compilers, and other tools. +</P> + +<P> +As supplied, each target directory contains two files: +<BLOCKQUOTE> +<PRE> +Makefile +platform.h +</PRE> +</BLOCKQUOTE> +The provided <CODE>Makefile</CODE> is written for GNU <CODE>make</CODE>. +A build of SoftFloat for the specific target is begun by executing the +<CODE>make</CODE> command with the target directory as the current directory. +A completely different build tool can be used if an appropriate +<CODE>Makefile</CODE> equivalent is created. +</P> + +<P> +The <CODE>platform.h</CODE> header file exists to provide a location for +additional C declarations specific to the build target. +Every C source file of SoftFloat contains a <CODE>#include</CODE> for +<CODE>platform.h</CODE>. +In many cases, the contents of <CODE>platform.h</CODE> can be as simple as one +or two lines of code. +At the other extreme, to get maximal performance from SoftFloat, it may be +desirable to include in header <CODE>platform.h</CODE> (directly or via +<CODE>#include</CODE>) declarations for numerous target-specific optimizations. +Such possibilities are discussed in the next section, <I>Issues for Porting +SoftFloat to a New Target</I>. +If the target’s compiler or library has bugs or other shortcomings, +workarounds for these issues may also be possible with target-specific +declarations in <CODE>platform.h</CODE>, avoiding the need to modify the main +SoftFloat sources. +</P> + + +<H2>5. Issues for Porting SoftFloat to a New Target</H2> + +<H3>5.1. Standard Headers <CODE><stdbool.h></CODE> and <CODE><stdint.h></CODE></H3> + +<P> +The SoftFloat sources make use of standard headers +<CODE><stdbool.h></CODE> and <CODE><stdint.h></CODE>, which have +been part of the ISO C Standard Library since 1999. +With any recent compiler, these standard headers are likely to be supported, +even if the compiler does not claim complete conformance to the latest ISO C +Standard. +For older or nonstandard compilers, substitutes for +<CODE><stdbool.h></CODE> and <CODE><stdint.h></CODE> may need to be +created. +SoftFloat depends on these names from <CODE><stdbool.h></CODE>: +<BLOCKQUOTE> +<PRE> +bool +true +false +</PRE> +</BLOCKQUOTE> +and on these names from <CODE><stdint.h></CODE>: +<BLOCKQUOTE> +<PRE> +uint16_t +uint32_t +uint64_t +int32_t +int64_t +UINT64_C +INT64_C +uint_least8_t +uint_fast8_t +uint_fast16_t +uint_fast32_t +uint_fast64_t +int_fast8_t +int_fast16_t +int_fast32_t +int_fast64_t +</PRE> +</BLOCKQUOTE> +</P> + + +<H3>5.2. Specializing Floating-Point Behavior</H3> + +<P> +The IEEE Floating-Point Standard allows for some flexibility in a conforming +implementation, particularly concerning NaNs. +The SoftFloat <CODE>source</CODE> directory is supplied with some +<I>specialization</I> subdirectories containing possible definitions for this +implementation-specific behavior. +For example, the <CODE>8086</CODE> and <NOBR><CODE>8086-SSE</CODE></NOBR> +subdirectories have source files that specialize SoftFloat’s behavior to +match that of Intel’s x86 line of processors. +The files in a specialization subdirectory must determine: +<UL> +<LI> +whether tininess for underflow is detected before or after rounding by default; +<LI> +how signaling NaNs are distinguished from quiet NaNs; +<LI> +what (if anything) special happens when exceptions are raised; +<LI> +the default generated quiet NaNs; +<LI> +how NaNs are propagated from function inputs to output; and +<LI> +the integer results returned when conversions to integer type raise the +<I>invalid</I> exception. +</UL> +</P> + +<P> +As provided, the build process for a target expects to involve exactly +<EM>one</EM> specialization directory that defines <EM>all</EM> of these +implementation-specific details for the target. +A specialization directory such as <CODE>8086</CODE> is expected to contain a +header file called <CODE>specialize.h</CODE>, together with whatever other +source files are needed to complete the specialization. +</P> + +<P> +A new build target may use an existing specialization, such as the ones +provided by the <CODE>8086</CODE> and <NOBR><CODE>8086-SSE</CODE></NOBR> +subdirectories. +If a build target needs a new specialization, different from any existing ones, +it is recommended that a new specialization directory be created for this +purpose. +The <CODE>specialize.h</CODE> header file from any of the provided +specialization subdirectories can be used as a model for what definitions are +needed. +</P> + + +<H3>5.3. Macros for Build Options</H3> + +<P> +The SoftFloat source files adapt the floating-point implementation according to +several C preprocessor macros: +<BLOCKQUOTE> +<DL> +<DT><CODE>LITTLEENDIAN</CODE> +<DD> +Must be defined for little-endian machines; must not be defined for big-endian +machines. +<DT><CODE>INLINE</CODE> +<DD> +Specifies the sequence of tokens used to indicate that a C function should be +inlined. +If macro <CODE>INLINE_LEVEL</CODE> is defined with a value of 1 or higher, this +macro must be defined; otherwise, this macro is ignored and need not be +defined. +For compilers that conform to the C Standard’s rules for inline +functions, this macro can be defined as the single keyword <CODE>inline</CODE>. +For other compilers that follow a convention pre-dating the standardization of +<CODE>inline</CODE>, this macro may need to be defined to <CODE>extern</CODE> +<CODE>inline</CODE>. +<DT><CODE>THREAD_LOCAL</CODE> +<DD> +Can be defined to a sequence of tokens that, when appearing at the start of a +variable declaration, indicates to the C compiler that the variable is +<I>per-thread</I>, meaning that each execution thread gets its own separate +instance of the variable. +This macro is used in header <CODE>softfloat.h</CODE> in the declarations of +variables <CODE>softfloat_roundingMode</CODE>, +<CODE>softfloat_detectTininess</CODE>, <CODE>extF80_roundingPrecision</CODE>, +and <CODE>softfloat_exceptionFlags</CODE>. +If macro <CODE>THREAD_LOCAL</CODE> is left undefined, these variables will +default to being ordinary global variables. +Depending on the compiler, possible valid definitions of this macro include +<CODE>_Thread_local</CODE> and <CODE>__thread</CODE>. +</DL> +<DL> +<DT><CODE>SOFTFLOAT_ROUND_ODD</CODE> +<DD> +Can be defined to enable support for optional rounding mode +<CODE>softfloat_round_odd</CODE>. +</DL> +<DL> +<DT><CODE>INLINE_LEVEL</CODE> +<DD> +Can be defined to an integer to determine the degree of inlining requested of +the compiler. +Larger numbers request that more inlining be done. +If this macro is not defined or is defined to a value less <NOBR>than 1</NOBR> +(zero or negative), no inlining is requested. +The maximum effective value is no higher <NOBR>than 5</NOBR>. +Defining this macro to a value greater than 5 is the same as defining it +<NOBR>to 5</NOBR>. +<DT><CODE>SOFTFLOAT_FAST_INT64</CODE> +<DD> +Can be defined to indicate that the build target’s implementation of +<NOBR>64-bit</NOBR> arithmetic is efficient. +For newer <NOBR>64-bit</NOBR> processors, this macro should usually be defined. +For very small microprocessors whose buses and registers are <NOBR>8-bit</NOBR> +or <NOBR>16-bit</NOBR> in size, this macro should usually not be defined. +Whether this macro should be defined for a <NOBR>32-bit</NOBR> processor may +depend on the target machine and the applications that will use SoftFloat. +<DT><CODE>SOFTFLOAT_FAST_DIV32TO16</CODE> +<DD> +Can be defined to indicate that the target’s division operator +<NOBR>in C</NOBR> (written as <CODE>/</CODE>) is reasonably efficient for +dividing a <NOBR>32-bit</NOBR> unsigned integer by a <NOBR>16-bit</NOBR> +unsigned integer. +Setting this macro may affect the performance of function <CODE>f16_div</CODE>. +<DT><CODE>SOFTFLOAT_FAST_DIV64TO32</CODE> +<DD> +Can be defined to indicate that the target’s division operator +<NOBR>in C</NOBR> (written as <CODE>/</CODE>) is reasonably efficient for +dividing a <NOBR>64-bit</NOBR> unsigned integer by a <NOBR>32-bit</NOBR> +unsigned integer. +Setting this macro may affect the performance of division, remainder, and +square root operations other than <CODE>f16_div</CODE>. +</DL> +</BLOCKQUOTE> +</P> + +<P> +Following the usual custom <NOBR>for C</NOBR>, for most of these macros (all +except <CODE>INLINE</CODE>, <CODE>THREAD_LOCAL</CODE>, and +<CODE>INLINE_LEVEL</CODE>), the content of any definition is irrelevant; +what matters is a macro’s effect on <CODE>#ifdef</CODE> directives. +</P> + +<P> +It is recommended that any definitions of macros <CODE>LITTLEENDIAN</CODE>, +<CODE>INLINE</CODE>, and <CODE>THREAD_LOCAL</CODE> be made in a build +target’s <CODE>platform.h</CODE> header file, because these macros are +expected to be determined inflexibly by the target machine and compiler. +The other five macros select options and control optimization, and thus might +be better located in the target’s Makefile (or its equivalent). +</P> + + +<H3>5.4. Adapting a Template Target Directory</H3> + +<P> +In the <CODE>build</CODE> directory, two <CODE>template</CODE> subdirectories +provide models for new target directories. +Two different templates exist because different functions are needed in the +SoftFloat library depending on whether macro <CODE>SOFTFLOAT_FAST_INT64</CODE> +is defined. +If macro <CODE>SOFTFLOAT_FAST_INT64</CODE> will be defined, +<NOBR><CODE>template-FAST_INT64</CODE></NOBR> is the template to use; +otherwise, <NOBR><CODE>template-not-FAST_INT64</CODE></NOBR> is the appropriate +template. +A new target directory can be created by copying the correct template directory +and editing the files inside. +To avoid confusion, it would be wise to refrain from editing the files within a +template directory directly. +</P> + + +<H3>5.5. Target-Specific Optimization of Primitive Functions</H3> + +<P> +Header file <CODE>primitives.h</CODE> (in directory +<CODE>source/include</CODE>) declares macros and functions for numerous +underlying arithmetic operations upon which many of SoftFloat’s +floating-point functions are ultimately built. +The SoftFloat sources include implementations of all of these functions/macros, +written as standard C code, so a complete and correct SoftFloat library can be +created using only the supplied code for all functions. +However, for many targets, SoftFloat’s performance can be improved by +substituting target-specific implementations of some of the functions/macros +declared in <CODE>primitives.h</CODE>. +</P> + +<P> +For example, <CODE>primitives.h</CODE> declares a function called +<CODE>softfloat_countLeadingZeros32</CODE> that takes an unsigned +<NOBR>32-bit</NOBR> integer as an argument and returns the number of the +integer’s most-significant bits that are zeros. +While the SoftFloat sources include an implementation of this function written +in <NOBR>standard C</NOBR>, many processors can perform this same function +directly in only one or two machine instructions. +An alternative, target-specific implementation that maps to those instructions +is likely to be more efficient than the generic C code from the SoftFloat +package. +</P> + +<P> +A build target can replace the supplied version of any function or macro of +<CODE>primitives.h</CODE> by defining a macro with the same name in the +target’s <CODE>platform.h</CODE> header file. +For this purpose, it may be helpful for <CODE>platform.h</CODE> to +<CODE>#include</CODE> header file <CODE>primitiveTypes.h</CODE>, which defines +types used for arguments and results of functions declared in +<CODE>primitives.h</CODE>. +When a desired replacement implementation is a function, not a macro, it is +sufficient for <CODE>platform.h</CODE> to include the line +<BLOCKQUOTE> +<PRE> +#define <<I>function-name</I>> <<I>function-name</I>> +</PRE> +</BLOCKQUOTE> +where <NOBR><CODE><<I>function-name</I>></CODE></NOBR> is the name of the +function. +This technically defines <NOBR><CODE><<I>function-name</I>></CODE></NOBR> +as a macro, but one that resolves to the same name, which may then be a +function. +(A preprocessor that conforms to the C Standard is required to limit recursive +macro expansion from being applied more than once.) +</P> + +<P> +The supplied header file <CODE>opts-GCC.h</CODE> (in directory +<CODE>source/include</CODE>) provides an example of target-specific +optimization for the GCC compiler. +Each GCC target example in the <CODE>build</CODE> directory has +<BLOCKQUOTE> +<CODE>#include "opts-GCC.h"</CODE> +</BLOCKQUOTE> +in its <CODE>platform.h</CODE> header file. +Before <CODE>opts-GCC.h</CODE> is included, the following macros must be +defined (or not) to control which features are invoked: +<BLOCKQUOTE> +<DL> +<DT><CODE>SOFTFLOAT_BUILTIN_CLZ</CODE></DT> +<DD> +If defined, SoftFloat’s internal +‘<CODE>countLeadingZeros</CODE>’ functions use intrinsics +<CODE>__builtin_clz</CODE> and <CODE>__builtin_clzll</CODE>. +</DD> +<DT><CODE>SOFTFLOAT_INTRINSIC_INT128</CODE></DT> +<DD> +If defined, SoftFloat makes use of GCC’s nonstandard <NOBR>128-bit</NOBR> +integer type <CODE>__int128</CODE>. +</DD> +</DL> +</BLOCKQUOTE> +On some machines, these improvements are observed to increase the speeds of +<CODE>f64_mul</CODE> and <CODE>f128_mul</CODE> by around 20 to 25%, although +other functions receive less dramatic boosts, or none at all. +Results can vary greatly across different platforms. +</P> + + +<H2>6. Testing SoftFloat</H2> + +<P> +SoftFloat can be tested using the <CODE>testsoftfloat</CODE> program by the +same author. +This program is part of the Berkeley TestFloat package available at the Web +page +<A HREF="http://www.jhauser.us/arithmetic/TestFloat.html"><NOBR><CODE>http://www.jhauser.us/arithmetic/TestFloat.html</CODE></NOBR></A>. +The TestFloat package also has a program called <CODE>timesoftfloat</CODE> that +measures the speed of SoftFloat’s floating-point functions. +</P> + + +<H2>7. Providing SoftFloat as a Common Library for Applications</H2> + +<P> +Header file <CODE>softfloat.h</CODE> defines the SoftFloat interface as seen by +clients. +If the SoftFloat library will be made a common library for programs on a +system, the supplied <CODE>softfloat.h</CODE> has a couple of deficiencies for +this purpose: +<UL> +<LI> +As supplied, <CODE>softfloat.h</CODE> depends on another header, +<CODE>softfloat_types.h</CODE>, that is not intended for public use but which +must also be visible to the programmer’s compiler. +<LI> +More troubling, at the time <CODE>softfloat.h</CODE> is included in a C source +file, macros <CODE>SOFTFLOAT_FAST_INT64</CODE> and <CODE>THREAD_LOCAL</CODE> +must be defined, or not defined, consistent with how these macro were defined +when the SoftFloat library was built. +</UL> +In the situation that new programs may regularly <CODE>#include</CODE> header +file <CODE>softfloat.h</CODE>, it is recommended that a custom, self-contained +version of this header file be created that eliminates these issues. +</P> + + +<H2>8. Contact Information</H2> + +<P> +At the time of this writing, the most up-to-date information about SoftFloat +and the latest release can be found at the Web page +<A HREF="http://www.jhauser.us/arithmetic/SoftFloat.html"><NOBR><CODE>http://www.jhauser.us/arithmetic/SoftFloat.html</CODE></NOBR></A>. +</P> + + +</BODY> + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/doc/SoftFloat.html b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/doc/SoftFloat.html new file mode 100644 index 000000000..b72b407f4 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/doc/SoftFloat.html @@ -0,0 +1,1527 @@ + +<HTML> + +<HEAD> +<TITLE>Berkeley SoftFloat Library Interface</TITLE> +</HEAD> + +<BODY> + +<H1>Berkeley SoftFloat Release 3e: Library Interface</H1> + +<P> +John R. Hauser<BR> +2018 January 20<BR> +</P> + + +<H2>Contents</H2> + +<BLOCKQUOTE> +<TABLE BORDER=0 CELLSPACING=0 CELLPADDING=0> +<COL WIDTH=25> +<COL WIDTH=*> +<TR><TD COLSPAN=2>1. Introduction</TD></TR> +<TR><TD COLSPAN=2>2. Limitations</TD></TR> +<TR><TD COLSPAN=2>3. Acknowledgments and License</TD></TR> +<TR><TD COLSPAN=2>4. Types and Functions</TD></TR> +<TR><TD></TD><TD>4.1. Boolean and Integer Types</TD></TR> +<TR><TD></TD><TD>4.2. Floating-Point Types</TD></TR> +<TR><TD></TD><TD>4.3. Supported Floating-Point Functions</TD></TR> +<TR> + <TD></TD> + <TD>4.4. Non-canonical Representations in <CODE>extFloat80_t</CODE></TD> +</TR> +<TR><TD></TD><TD>4.5. Conventions for Passing Arguments and Results</TD></TR> +<TR><TD COLSPAN=2>5. Reserved Names</TD></TR> +<TR><TD COLSPAN=2>6. Mode Variables</TD></TR> +<TR><TD></TD><TD>6.1. Rounding Mode</TD></TR> +<TR><TD></TD><TD>6.2. Underflow Detection</TD></TR> +<TR> + <TD></TD> + <TD>6.3. Rounding Precision for the <NOBR>80-Bit</NOBR> Extended Format</TD> +</TR> +<TR><TD COLSPAN=2>7. Exceptions and Exception Flags</TD></TR> +<TR><TD COLSPAN=2>8. Function Details</TD></TR> +<TR><TD></TD><TD>8.1. Conversions from Integer to Floating-Point</TD></TR> +<TR><TD></TD><TD>8.2. Conversions from Floating-Point to Integer</TD></TR> +<TR><TD></TD><TD>8.3. Conversions Among Floating-Point Types</TD></TR> +<TR><TD></TD><TD>8.4. Basic Arithmetic Functions</TD></TR> +<TR><TD></TD><TD>8.5. Fused Multiply-Add Functions</TD></TR> +<TR><TD></TD><TD>8.6. Remainder Functions</TD></TR> +<TR><TD></TD><TD>8.7. Round-to-Integer Functions</TD></TR> +<TR><TD></TD><TD>8.8. Comparison Functions</TD></TR> +<TR><TD></TD><TD>8.9. Signaling NaN Test Functions</TD></TR> +<TR><TD></TD><TD>8.10. Raise-Exception Function</TD></TR> +<TR><TD COLSPAN=2>9. Changes from SoftFloat <NOBR>Release 2</NOBR></TD></TR> +<TR><TD></TD><TD>9.1. Name Changes</TD></TR> +<TR><TD></TD><TD>9.2. Changes to Function Arguments</TD></TR> +<TR><TD></TD><TD>9.3. Added Capabilities</TD></TR> +<TR><TD></TD><TD>9.4. Better Compatibility with the C Language</TD></TR> +<TR><TD></TD><TD>9.5. New Organization as a Library</TD></TR> +<TR><TD></TD><TD>9.6. Optimization Gains (and Losses)</TD></TR> +<TR><TD COLSPAN=2>10. Future Directions</TD></TR> +<TR><TD COLSPAN=2>11. Contact Information</TD></TR> +</TABLE> +</BLOCKQUOTE> + + +<H2>1. Introduction</H2> + +<P> +Berkeley SoftFloat is a software implementation of binary floating-point that +conforms to the IEEE Standard for Floating-Point Arithmetic. +The current release supports five binary formats: <NOBR>16-bit</NOBR> +half-precision, <NOBR>32-bit</NOBR> single-precision, <NOBR>64-bit</NOBR> +double-precision, <NOBR>80-bit</NOBR> double-extended-precision, and +<NOBR>128-bit</NOBR> quadruple-precision. +The following functions are supported for each format: +<UL> +<LI> +addition, subtraction, multiplication, division, and square root; +<LI> +fused multiply-add as defined by the IEEE Standard, except for +<NOBR>80-bit</NOBR> double-extended-precision; +<LI> +remainder as defined by the IEEE Standard; +<LI> +round to integral value; +<LI> +comparisons; +<LI> +conversions to/from other supported formats; and +<LI> +conversions to/from <NOBR>32-bit</NOBR> and <NOBR>64-bit</NOBR> integers, +signed and unsigned. +</UL> +All operations required by the original 1985 version of the IEEE Floating-Point +Standard are implemented, except for conversions to and from decimal. +</P> + +<P> +This document gives information about the types defined and the routines +implemented by SoftFloat. +It does not attempt to define or explain the IEEE Floating-Point Standard. +Information about the standard is available elsewhere. +</P> + +<P> +The current version of SoftFloat is <NOBR>Release 3e</NOBR>. +This release modifies the behavior of the rarely used <I>odd</I> rounding mode +(<I>round to odd</I>, also known as <I>jamming</I>), and also adds some new +specialization and optimization examples for those compiling SoftFloat. +</P> + +<P> +The previous <NOBR>Release 3d</NOBR> fixed bugs that were found in the square +root functions for the <NOBR>64-bit</NOBR>, <NOBR>80-bit</NOBR>, and +<NOBR>128-bit</NOBR> floating-point formats. +(Thanks to Alexei Sibidanov at the University of Victoria for reporting an +incorrect result.) +The bugs affected all prior <NOBR>Release-3</NOBR> versions of SoftFloat +<NOBR>through 3c</NOBR>. +The flaw in the <NOBR>64-bit</NOBR> floating-point square root function was of +very minor impact, causing a <NOBR>1-ulp</NOBR> error (<NOBR>1 unit</NOBR> in +the last place) a few times out of a billion. +The bugs in the <NOBR>80-bit</NOBR> and <NOBR>128-bit</NOBR> square root +functions were more serious. +Although incorrect results again occurred only a few times out of a billion, +when they did occur a large portion of the less-significant bits could be +wrong. +</P> + +<P> +Among earlier releases, 3b was notable for adding support for the +<NOBR>16-bit</NOBR> half-precision format. +For more about the evolution of SoftFloat releases, see +<A HREF="SoftFloat-history.html"><NOBR><CODE>SoftFloat-history.html</CODE></NOBR></A>. +</P> + +<P> +The functional interface of SoftFloat <NOBR>Release 3</NOBR> and later differs +in many details from the releases that came before. +For specifics of these differences, see <NOBR>section 9</NOBR> below, +<I>Changes from SoftFloat <NOBR>Release 2</NOBR></I>. +</P> + + +<H2>2. Limitations</H2> + +<P> +SoftFloat assumes the computer has an addressable byte size of 8 or +<NOBR>16 bits</NOBR>. +(Nearly all computers in use today have <NOBR>8-bit</NOBR> bytes.) +</P> + +<P> +SoftFloat is written in C and is designed to work with other C code. +The C compiler used must conform at a minimum to the 1989 ANSI standard for the +C language (same as the 1990 ISO standard) and must in addition support basic +arithmetic on <NOBR>64-bit</NOBR> integers. +Earlier releases of SoftFloat included implementations of <NOBR>32-bit</NOBR> +single-precision and <NOBR>64-bit</NOBR> double-precision floating-point that +did not require <NOBR>64-bit</NOBR> integers, but this option is not supported +starting with <NOBR>Release 3</NOBR>. +Since 1999, ISO standards for C have mandated compiler support for +<NOBR>64-bit</NOBR> integers. +A compiler conforming to the 1999 C Standard or later is recommended but not +strictly required. +</P> + +<P> +Most operations not required by the original 1985 version of the IEEE +Floating-Point Standard but added in the 2008 version are not yet supported in +SoftFloat <NOBR>Release 3e</NOBR>. +</P> + + +<H2>3. Acknowledgments and License</H2> + +<P> +The SoftFloat package was written by me, <NOBR>John R.</NOBR> Hauser. +<NOBR>Release 3</NOBR> of SoftFloat was a completely new implementation +supplanting earlier releases. +The project to create <NOBR>Release 3</NOBR> (now <NOBR>through 3e</NOBR>) was +done in the employ of the University of California, Berkeley, within the +Department of Electrical Engineering and Computer Sciences, first for the +Parallel Computing Laboratory (Par Lab) and then for the ASPIRE Lab. +The work was officially overseen by Prof. Krste Asanovic, with funding provided +by these sources: +<BLOCKQUOTE> +<TABLE> +<COL> +<COL WIDTH=10> +<COL> +<TR> +<TD VALIGN=TOP><NOBR>Par Lab:</NOBR></TD> +<TD></TD> +<TD> +Microsoft (Award #024263), Intel (Award #024894), and U.C. Discovery +(Award #DIG07-10227), with additional support from Par Lab affiliates Nokia, +NVIDIA, Oracle, and Samsung. +</TD> +</TR> +<TR> +<TD VALIGN=TOP><NOBR>ASPIRE Lab:</NOBR></TD> +<TD></TD> +<TD> +DARPA PERFECT program (Award #HR0011-12-2-0016), with additional support from +ASPIRE industrial sponsor Intel and ASPIRE affiliates Google, Nokia, NVIDIA, +Oracle, and Samsung. +</TD> +</TR> +</TABLE> +</BLOCKQUOTE> +</P> + +<P> +The following applies to the whole of SoftFloat <NOBR>Release 3e</NOBR> as well +as to each source file individually. +</P> + +<P> +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the +University of California. +All rights reserved. +</P> + +<P> +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: +<OL> + +<LI> +<P> +Redistributions of source code must retain the above copyright notice, this +list of conditions, and the following disclaimer. +</P> + +<LI> +<P> +Redistributions in binary form must reproduce the above copyright notice, this +list of conditions, and the following disclaimer in the documentation and/or +other materials provided with the distribution. +</P> + +<LI> +<P> +Neither the name of the University nor the names of its contributors may be +used to endorse or promote products derived from this software without specific +prior written permission. +</P> + +</OL> +</P> + +<P> +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS “AS IS”, +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. +IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +</P> + + +<H2>4. Types and Functions</H2> + +<P> +The types and functions of SoftFloat are declared in header file +<CODE>softfloat.h</CODE>. +</P> + +<H3>4.1. Boolean and Integer Types</H3> + +<P> +Header file <CODE>softfloat.h</CODE> depends on standard headers +<CODE><stdbool.h></CODE> and <CODE><stdint.h></CODE> to define type +<CODE>bool</CODE> and several integer types. +These standard headers have been part of the ISO C Standard Library since 1999. +With any recent compiler, they are likely to be supported, even if the compiler +does not claim complete conformance to the latest ISO C Standard. +For older or nonstandard compilers, a port of SoftFloat may have substitutes +for these headers. +Header <CODE>softfloat.h</CODE> depends only on the name <CODE>bool</CODE> from +<CODE><stdbool.h></CODE> and on these type names from +<CODE><stdint.h></CODE>: +<BLOCKQUOTE> +<PRE> +uint16_t +uint32_t +uint64_t +int32_t +int64_t +uint_fast8_t +uint_fast32_t +uint_fast64_t +int_fast32_t +int_fast64_t +</PRE> +</BLOCKQUOTE> +</P> + + +<H3>4.2. Floating-Point Types</H3> + +<P> +The <CODE>softfloat.h</CODE> header defines five floating-point types: +<BLOCKQUOTE> +<TABLE CELLSPACING=0 CELLPADDING=0> +<TR> +<TD><CODE>float16_t</CODE></TD> +<TD><NOBR>16-bit</NOBR> half-precision binary format</TD> +</TR> +<TR> +<TD><CODE>float32_t</CODE></TD> +<TD><NOBR>32-bit</NOBR> single-precision binary format</TD> +</TR> +<TR> +<TD><CODE>float64_t</CODE></TD> +<TD><NOBR>64-bit</NOBR> double-precision binary format</TD> +</TR> +<TR> +<TD><CODE>extFloat80_t </CODE></TD> +<TD><NOBR>80-bit</NOBR> double-extended-precision binary format (old Intel or +Motorola format)</TD> +</TR> +<TR> +<TD><CODE>float128_t</CODE></TD> +<TD><NOBR>128-bit</NOBR> quadruple-precision binary format</TD> +</TR> +</TABLE> +</BLOCKQUOTE> +The non-extended types are each exactly the size specified: +<NOBR>16 bits</NOBR> for <CODE>float16_t</CODE>, <NOBR>32 bits</NOBR> for +<CODE>float32_t</CODE>, <NOBR>64 bits</NOBR> for <CODE>float64_t</CODE>, and +<NOBR>128 bits</NOBR> for <CODE>float128_t</CODE>. +Aside from these size requirements, the definitions of all these types may +differ for different ports of SoftFloat to specific systems. +A given port of SoftFloat may or may not define some of the floating-point +types as aliases for the C standard types <CODE>float</CODE>, +<CODE>double</CODE>, and <CODE>long</CODE> <CODE>double</CODE>. +</P> + +<P> +Header file <CODE>softfloat.h</CODE> also defines a structure, +<CODE>struct</CODE> <CODE>extFloat80M</CODE>, for the representation of +<NOBR>80-bit</NOBR> double-extended-precision floating-point values in memory. +This structure is the same size as type <CODE>extFloat80_t</CODE> and contains +at least these two fields (not necessarily in this order): +<BLOCKQUOTE> +<PRE> +uint16_t signExp; +uint64_t signif; +</PRE> +</BLOCKQUOTE> +Field <CODE>signExp</CODE> contains the sign and exponent of the floating-point +value, with the sign in the most significant bit (<NOBR>bit 15</NOBR>) and the +encoded exponent in the other <NOBR>15 bits</NOBR>. +Field <CODE>signif</CODE> is the complete <NOBR>64-bit</NOBR> significand of +the floating-point value. +(In the usual encoding for <NOBR>80-bit</NOBR> extended floating-point, the +leading <NOBR>1 bit</NOBR> of normalized numbers is not implicit but is stored +in the most significant bit of the significand.) +</P> + +<H3>4.3. Supported Floating-Point Functions</H3> + +<P> +SoftFloat implements these arithmetic operations for its floating-point types: +<UL> +<LI> +conversions between any two floating-point formats; +<LI> +for each floating-point format, conversions to and from signed and unsigned +<NOBR>32-bit</NOBR> and <NOBR>64-bit</NOBR> integers; +<LI> +for each format, the usual addition, subtraction, multiplication, division, and +square root operations; +<LI> +for each format except <CODE>extFloat80_t</CODE>, the fused multiply-add +operation defined by the IEEE Standard; +<LI> +for each format, the floating-point remainder operation defined by the IEEE +Standard; +<LI> +for each format, a “round to integer” operation that rounds to the +nearest integer value in the same format; and +<LI> +comparisons between two values in the same floating-point format. +</UL> +</P> + +<P> +The following operations required by the 2008 IEEE Floating-Point Standard are +not supported in SoftFloat <NOBR>Release 3e</NOBR>: +<UL> +<LI> +<B>nextUp</B>, <B>nextDown</B>, <B>minNum</B>, <B>maxNum</B>, <B>minNumMag</B>, +<B>maxNumMag</B>, <B>scaleB</B>, and <B>logB</B>; +<LI> +conversions between floating-point formats and decimal or hexadecimal character +sequences; +<LI> +all “quiet-computation” operations (<B>copy</B>, <B>negate</B>, +<B>abs</B>, and <B>copySign</B>, which all involve only simple copying and/or +manipulation of the floating-point sign bit); and +<LI> +all “non-computational” operations other than <B>isSignaling</B> +(which is supported). +</UL> +</P> + +<H3>4.4. Non-canonical Representations in <CODE>extFloat80_t</CODE></H3> + +<P> +Because the <NOBR>80-bit</NOBR> double-extended-precision format, +<CODE>extFloat80_t</CODE>, stores an explicit leading significand bit, many +finite floating-point numbers are encodable in this type in multiple equivalent +forms. +Of these multiple encodings, there is always a unique one with the least +encoded exponent value, and this encoding is considered the <I>canonical</I> +representation of the floating-point number. +Any other equivalent representations (having a higher encoded exponent value) +are <I>non-canonical</I>. +For a value in the subnormal range (including zero), the canonical +representation always has an encoded exponent of zero and a leading significand +bit <NOBR>of 0</NOBR>. +For finite values outside the subnormal range, the canonical representation +always has an encoded exponent that is nonzero and a leading significand bit +<NOBR>of 1</NOBR>. +</P> + +<P> +For an infinity or NaN, the leading significand bit is similarly expected to +<NOBR>be 1</NOBR>. +An infinity or NaN with a leading significand bit <NOBR>of 0</NOBR> is again +considered non-canonical. +Hence, altogether, to be canonical, a value of type <CODE>extFloat80_t</CODE> +must have a leading significand bit <NOBR>of 1</NOBR>, unless the value is +subnormal or zero, in which case the leading significand bit and the encoded +exponent must both be zero. +</P> + +<P> +SoftFloat’s functions are not guaranteed to operate as expected when +inputs of type <CODE>extFloat80_t</CODE> are non-canonical. +Assuming all of a function’s <CODE>extFloat80_t</CODE> inputs (if any) +are canonical, function outputs of type <CODE>extFloat80_t</CODE> will always +be canonical. +</P> + +<H3>4.5. Conventions for Passing Arguments and Results</H3> + +<P> +Values that are at most <NOBR>64 bits</NOBR> in size (i.e., not the +<NOBR>80-bit</NOBR> or <NOBR>128-bit</NOBR> floating-point formats) are in all +cases passed as function arguments by value. +Likewise, when an output of a function is no more than <NOBR>64 bits</NOBR>, it +is always returned directly as the function result. +Thus, for example, the SoftFloat function for adding two <NOBR>64-bit</NOBR> +floating-point values has this simple signature: +<BLOCKQUOTE> +<CODE>float64_t f64_add( float64_t, float64_t );</CODE> +</BLOCKQUOTE> +</P> + +<P> +The story is more complex when function inputs and outputs are +<NOBR>80-bit</NOBR> and <NOBR>128-bit</NOBR> floating-point. +For these types, SoftFloat always provides a function that passes these larger +values into or out of the function indirectly, via pointers. +For example, for adding two <NOBR>128-bit</NOBR> floating-point values, +SoftFloat supplies this function: +<BLOCKQUOTE> +<CODE>void f128M_add( const float128_t *, const float128_t *, float128_t * );</CODE> +</BLOCKQUOTE> +The first two arguments point to the values to be added, and the last argument +points to the location where the sum will be stored. +The <CODE>M</CODE> in the name <CODE>f128M_add</CODE> is mnemonic for the fact +that the <NOBR>128-bit</NOBR> inputs and outputs are “in memory”, +pointed to by pointer arguments. +</P> + +<P> +All ports of SoftFloat implement these <I>pass-by-pointer</I> functions for +types <CODE>extFloat80_t</CODE> and <CODE>float128_t</CODE>. +At the same time, SoftFloat ports may also implement alternate versions of +these same functions that pass <CODE>extFloat80_t</CODE> and +<CODE>float128_t</CODE> by value, like the smaller formats. +Thus, besides the function with name <CODE>f128M_add</CODE> shown above, a +SoftFloat port may also supply an equivalent function with this signature: +<BLOCKQUOTE> +<CODE>float128_t f128_add( float128_t, float128_t );</CODE> +</BLOCKQUOTE> +</P> + +<P> +As a general rule, on computers where the machine word size is +<NOBR>32 bits</NOBR> or smaller, only the pass-by-pointer versions of functions +(e.g., <CODE>f128M_add</CODE>) are provided for types <CODE>extFloat80_t</CODE> +and <CODE>float128_t</CODE>, because passing such large types directly can have +significant extra cost. +On computers where the word size is <NOBR>64 bits</NOBR> or larger, both +function versions (<CODE>f128M_add</CODE> and <CODE>f128_add</CODE>) are +provided, because the cost of passing by value is then more reasonable. +Applications that must be portable accross both classes of computers must use +the pointer-based functions, as these are always implemented. +However, if it is known that SoftFloat includes the by-value functions for all +platforms of interest, programmers can use whichever version they prefer. +</P> + + +<H2>5. Reserved Names</H2> + +<P> +In addition to the variables and functions documented here, SoftFloat defines +some symbol names for its own private use. +These private names always begin with the prefix +‘<CODE>softfloat_</CODE>’. +When a program includes header <CODE>softfloat.h</CODE> or links with the +SoftFloat library, all names with prefix ‘<CODE>softfloat_</CODE>’ +are reserved for possible use by SoftFloat. +Applications that use SoftFloat should not define their own names with this +prefix, and should reference only such names as are documented. +</P> + + +<H2>6. Mode Variables</H2> + +<P> +The following global variables control rounding mode, underflow detection, and +the <NOBR>80-bit</NOBR> extended format’s rounding precision: +<BLOCKQUOTE> +<CODE>softfloat_roundingMode</CODE><BR> +<CODE>softfloat_detectTininess</CODE><BR> +<CODE>extF80_roundingPrecision</CODE> +</BLOCKQUOTE> +These mode variables are covered in the next several subsections. +For some SoftFloat ports, these variables may be <I>per-thread</I> (declared +<CODE>thread_local</CODE>), meaning that different execution threads have their +own separate copies of the variables. +</P> + +<H3>6.1. Rounding Mode</H3> + +<P> +All five rounding modes defined by the 2008 IEEE Floating-Point Standard are +implemented for all operations that require rounding. +Some ports of SoftFloat may also implement the <I>round-to-odd</I> mode. +</P> + +<P> +The rounding mode is selected by the global variable +<BLOCKQUOTE> +<CODE>uint_fast8_t softfloat_roundingMode;</CODE> +</BLOCKQUOTE> +This variable may be set to one of the values +<BLOCKQUOTE> +<TABLE CELLSPACING=0 CELLPADDING=0> +<TR> +<TD><CODE>softfloat_round_near_even</CODE></TD> +<TD>round to nearest, with ties to even</TD> +</TR> +<TR> +<TD><CODE>softfloat_round_near_maxMag </CODE></TD> +<TD>round to nearest, with ties to maximum magnitude (away from zero)</TD> +</TR> +<TR> +<TD><CODE>softfloat_round_minMag</CODE></TD> +<TD>round to minimum magnitude (toward zero)</TD> +</TR> +<TR> +<TD><CODE>softfloat_round_min</CODE></TD> +<TD>round to minimum (down)</TD> +</TR> +<TR> +<TD><CODE>softfloat_round_max</CODE></TD> +<TD>round to maximum (up)</TD> +</TR> +<TR> +<TD><CODE>softfloat_round_odd</CODE></TD> +<TD>round to odd (jamming), if supported by the SoftFloat port</TD> +</TR> +</TABLE> +</BLOCKQUOTE> +Variable <CODE>softfloat_roundingMode</CODE> is initialized to +<CODE>softfloat_round_near_even</CODE>. +</P> + +<P> +When <CODE>softfloat_round_odd</CODE> is the rounding mode for a function that +rounds to an integer value (either conversion to an integer format or a +‘<CODE>roundToInt</CODE>’ function), if the input is not already an +integer, the rounded result is the closest <EM>odd</EM> integer. +For other operations, this rounding mode acts as though the floating-point +result is first rounded to minimum magnitude, the same as +<CODE>softfloat_round_minMag</CODE>, and then, if the result is inexact, the +least-significant bit of the result is set <NOBR>to 1</NOBR>. +Rounding to odd is also known as <EM>jamming</EM>. +</P> + +<H3>6.2. Underflow Detection</H3> + +<P> +In the terminology of the IEEE Standard, SoftFloat can detect tininess for +underflow either before or after rounding. +The choice is made by the global variable +<BLOCKQUOTE> +<CODE>uint_fast8_t softfloat_detectTininess;</CODE> +</BLOCKQUOTE> +which can be set to either +<BLOCKQUOTE> +<CODE>softfloat_tininess_beforeRounding</CODE><BR> +<CODE>softfloat_tininess_afterRounding</CODE> +</BLOCKQUOTE> +Detecting tininess after rounding is usually better because it results in fewer +spurious underflow signals. +The other option is provided for compatibility with some systems. +Like most systems (and as required by the newer 2008 IEEE Standard), SoftFloat +always detects loss of accuracy for underflow as an inexact result. +</P> + +<H3>6.3. Rounding Precision for the <NOBR>80-Bit</NOBR> Extended Format</H3> + +<P> +For <CODE>extFloat80_t</CODE> only, the rounding precision of the basic +arithmetic operations is controlled by the global variable +<BLOCKQUOTE> +<CODE>uint_fast8_t extF80_roundingPrecision;</CODE> +</BLOCKQUOTE> +The operations affected are: +<BLOCKQUOTE> +<CODE>extF80_add</CODE><BR> +<CODE>extF80_sub</CODE><BR> +<CODE>extF80_mul</CODE><BR> +<CODE>extF80_div</CODE><BR> +<CODE>extF80_sqrt</CODE> +</BLOCKQUOTE> +When <CODE>extF80_roundingPrecision</CODE> is set to its default value of 80, +these operations are rounded to the full precision of the <NOBR>80-bit</NOBR> +double-extended-precision format, like occurs for other formats. +Setting <CODE>extF80_roundingPrecision</CODE> to 32 or to 64 causes the +operations listed to be rounded to <NOBR>32-bit</NOBR> precision (equivalent to +<CODE>float32_t</CODE>) or to <NOBR>64-bit</NOBR> precision (equivalent to +<CODE>float64_t</CODE>), respectively. +When rounding to reduced precision, additional bits in the result significand +beyond the rounding point are set to zero. +The consequences of setting <CODE>extF80_roundingPrecision</CODE> to a value +other than 32, 64, or 80 is not specified. +Operations other than the ones listed above are not affected by +<CODE>extF80_roundingPrecision</CODE>. +</P> + + +<H2>7. Exceptions and Exception Flags</H2> + +<P> +All five exception flags required by the IEEE Floating-Point Standard are +implemented. +Each flag is stored as a separate bit in the global variable +<BLOCKQUOTE> +<CODE>uint_fast8_t softfloat_exceptionFlags;</CODE> +</BLOCKQUOTE> +The positions of the exception flag bits within this variable are determined by +the bit masks +<BLOCKQUOTE> +<CODE>softfloat_flag_inexact</CODE><BR> +<CODE>softfloat_flag_underflow</CODE><BR> +<CODE>softfloat_flag_overflow</CODE><BR> +<CODE>softfloat_flag_infinite</CODE><BR> +<CODE>softfloat_flag_invalid</CODE> +</BLOCKQUOTE> +Variable <CODE>softfloat_exceptionFlags</CODE> is initialized to all zeros, +meaning no exceptions. +</P> + +<P> +For some SoftFloat ports, <CODE>softfloat_exceptionFlags</CODE> may be +<I>per-thread</I> (declared <CODE>thread_local</CODE>), meaning that different +execution threads have their own separate instances of it. +</P> + +<P> +An individual exception flag can be cleared with the statement +<BLOCKQUOTE> +<CODE>softfloat_exceptionFlags &= ~softfloat_flag_<<I>exception</I>>;</CODE> +</BLOCKQUOTE> +where <CODE><<I>exception</I>></CODE> is the appropriate name. +To raise a floating-point exception, function <CODE>softfloat_raiseFlags</CODE> +should normally be used. +</P> + +<P> +When SoftFloat detects an exception other than <I>inexact</I>, it calls +<CODE>softfloat_raiseFlags</CODE>. +The default version of this function simply raises the corresponding exception +flags. +Particular ports of SoftFloat may support alternate behavior, such as exception +traps, by modifying the default <CODE>softfloat_raiseFlags</CODE>. +A program may also supply its own <CODE>softfloat_raiseFlags</CODE> function to +override the one from the SoftFloat library. +</P> + +<P> +Because inexact results occur frequently under most circumstances (and thus are +hardly exceptional), SoftFloat does not ordinarily call +<CODE>softfloat_raiseFlags</CODE> for <I>inexact</I> exceptions. +It does always raise the <I>inexact</I> exception flag as required. +</P> + + +<H2>8. Function Details</H2> + +<P> +In this section, <CODE><<I>float</I>></CODE> appears in function names as +a substitute for one of these abbreviations: +<BLOCKQUOTE> +<TABLE CELLSPACING=0 CELLPADDING=0> +<TR> +<TD><CODE>f16</CODE></TD> +<TD>indicates <CODE>float16_t</CODE>, passed by value</TD> +</TR> +<TR> +<TD><CODE>f32</CODE></TD> +<TD>indicates <CODE>float32_t</CODE>, passed by value</TD> +</TR> +<TR> +<TD><CODE>f64</CODE></TD> +<TD>indicates <CODE>float64_t</CODE>, passed by value</TD> +</TR> +<TR> +<TD><CODE>extF80M </CODE></TD> +<TD>indicates <CODE>extFloat80_t</CODE>, passed indirectly via pointers</TD> +</TR> +<TR> +<TD><CODE>extF80</CODE></TD> +<TD>indicates <CODE>extFloat80_t</CODE>, passed by value</TD> +</TR> +<TR> +<TD><CODE>f128M</CODE></TD> +<TD>indicates <CODE>float128_t</CODE>, passed indirectly via pointers</TD> +</TR> +<TR> +<TD><CODE>f128</CODE></TD> +<TD>indicates <CODE>float128_t</CODE>, passed by value</TD> +</TR> +</TABLE> +</BLOCKQUOTE> +The circumstances under which values of floating-point types +<CODE>extFloat80_t</CODE> and <CODE>float128_t</CODE> may be passed either by +value or indirectly via pointers was discussed earlier in +<NOBR>section 4.5</NOBR>, <I>Conventions for Passing Arguments and Results</I>. +</P> + +<H3>8.1. Conversions from Integer to Floating-Point</H3> + +<P> +All conversions from a <NOBR>32-bit</NOBR> or <NOBR>64-bit</NOBR> integer, +signed or unsigned, to a floating-point format are supported. +Functions performing these conversions have these names: +<BLOCKQUOTE> +<CODE>ui32_to_<<I>float</I>></CODE><BR> +<CODE>ui64_to_<<I>float</I>></CODE><BR> +<CODE>i32_to_<<I>float</I>></CODE><BR> +<CODE>i64_to_<<I>float</I>></CODE> +</BLOCKQUOTE> +Conversions from <NOBR>32-bit</NOBR> integers to <NOBR>64-bit</NOBR> +double-precision and larger formats are always exact, and likewise conversions +from <NOBR>64-bit</NOBR> integers to <NOBR>80-bit</NOBR> +double-extended-precision and <NOBR>128-bit</NOBR> quadruple-precision are also +always exact. +</P> + +<P> +Each conversion function takes one input of the appropriate type and generates +one output. +The following illustrates the signatures of these functions in cases when the +floating-point result is passed either by value or via pointers: +<BLOCKQUOTE> +<PRE> +float64_t i32_to_f64( int32_t <I>a</I> ); +</PRE> +<PRE> +void i32_to_f128M( int32_t <I>a</I>, float128_t *<I>destPtr</I> ); +</PRE> +</BLOCKQUOTE> +</P> + +<H3>8.2. Conversions from Floating-Point to Integer</H3> + +<P> +Conversions from a floating-point format to a <NOBR>32-bit</NOBR> or +<NOBR>64-bit</NOBR> integer, signed or unsigned, are supported with these +functions: +<BLOCKQUOTE> +<CODE><<I>float</I>>_to_ui32</CODE><BR> +<CODE><<I>float</I>>_to_ui64</CODE><BR> +<CODE><<I>float</I>>_to_i32</CODE><BR> +<CODE><<I>float</I>>_to_i64</CODE> +</BLOCKQUOTE> +The functions have signatures as follows, depending on whether the +floating-point input is passed by value or via pointers: +<BLOCKQUOTE> +<PRE> +int_fast32_t f64_to_i32( float64_t <I>a</I>, uint_fast8_t <I>roundingMode</I>, bool <I>exact</I> ); +</PRE> +<PRE> +int_fast32_t + f128M_to_i32( const float128_t *<I>aPtr</I>, uint_fast8_t <I>roundingMode</I>, bool <I>exact</I> ); +</PRE> +</BLOCKQUOTE> +</P> + +<P> +The <CODE><I>roundingMode</I></CODE> argument specifies the rounding mode for +the conversion. +The variable that usually indicates rounding mode, +<CODE>softfloat_roundingMode</CODE>, is ignored. +Argument <CODE><I>exact</I></CODE> determines whether the <I>inexact</I> +exception flag is raised if the conversion is not exact. +If <CODE><I>exact</I></CODE> is <CODE>true</CODE>, the <I>inexact</I> flag may +be raised; +otherwise, it will not be, even if the conversion is inexact. +</P> + +<P> +A conversion from floating-point to integer format raises the <I>invalid</I> +exception if the source value cannot be rounded to a representable integer of +the desired size (32 or 64 bits). +In such circumstances, the integer result returned is determined by the +particular port of SoftFloat, although typically this value will be either the +maximum or minimum value of the integer format. +The functions that convert to integer types never raise the floating-point +<I>overflow</I> exception. +</P> + +<P> +Because languages such <NOBR>as C</NOBR> require that conversions to integers +be rounded toward zero, the following functions are provided for improved speed +and convenience: +<BLOCKQUOTE> +<CODE><<I>float</I>>_to_ui32_r_minMag</CODE><BR> +<CODE><<I>float</I>>_to_ui64_r_minMag</CODE><BR> +<CODE><<I>float</I>>_to_i32_r_minMag</CODE><BR> +<CODE><<I>float</I>>_to_i64_r_minMag</CODE> +</BLOCKQUOTE> +These functions round only toward zero (to minimum magnitude). +The signatures for these functions are the same as above without the redundant +<CODE><I>roundingMode</I></CODE> argument: +<BLOCKQUOTE> +<PRE> +int_fast32_t f64_to_i32_r_minMag( float64_t <I>a</I>, bool <I>exact</I> ); +</PRE> +<PRE> +int_fast32_t f128M_to_i32_r_minMag( const float128_t *<I>aPtr</I>, bool <I>exact</I> ); +</PRE> +</BLOCKQUOTE> +</P> + +<H3>8.3. Conversions Among Floating-Point Types</H3> + +<P> +Conversions between floating-point formats are done by functions with these +names: +<BLOCKQUOTE> +<CODE><<I>float</I>>_to_<<I>float</I>></CODE> +</BLOCKQUOTE> +All combinations of source and result type are supported where the source and +result are different formats. +There are four different styles of signature for these functions, depending on +whether the input and the output floating-point values are passed by value or +via pointers: +<BLOCKQUOTE> +<PRE> +float32_t f64_to_f32( float64_t <I>a</I> ); +</PRE> +<PRE> +float32_t f128M_to_f32( const float128_t *<I>aPtr</I> ); +</PRE> +<PRE> +void f32_to_f128M( float32_t <I>a</I>, float128_t *<I>destPtr</I> ); +</PRE> +<PRE> +void extF80M_to_f128M( const extFloat80_t *<I>aPtr</I>, float128_t *<I>destPtr</I> ); +</PRE> +</BLOCKQUOTE> +</P> + +<P> +Conversions from a smaller to a larger floating-point format are always exact +and so require no rounding. +</P> + +<H3>8.4. Basic Arithmetic Functions</H3> + +<P> +The following basic arithmetic functions are provided: +<BLOCKQUOTE> +<CODE><<I>float</I>>_add</CODE><BR> +<CODE><<I>float</I>>_sub</CODE><BR> +<CODE><<I>float</I>>_mul</CODE><BR> +<CODE><<I>float</I>>_div</CODE><BR> +<CODE><<I>float</I>>_sqrt</CODE> +</BLOCKQUOTE> +Each floating-point operation takes two operands, except for <CODE>sqrt</CODE> +(square root) which takes only one. +The operands and result are all of the same floating-point format. +Signatures for these functions take the following forms: +<BLOCKQUOTE> +<PRE> +float64_t f64_add( float64_t <I>a</I>, float64_t <I>b</I> ); +</PRE> +<PRE> +void + f128M_add( + const float128_t *<I>aPtr</I>, const float128_t *<I>bPtr</I>, float128_t *<I>destPtr</I> ); +</PRE> +<PRE> +float64_t f64_sqrt( float64_t <I>a</I> ); +</PRE> +<PRE> +void f128M_sqrt( const float128_t *<I>aPtr</I>, float128_t *<I>destPtr</I> ); +</PRE> +</BLOCKQUOTE> +When floating-point values are passed indirectly through pointers, arguments +<CODE><I>aPtr</I></CODE> and <CODE><I>bPtr</I></CODE> point to the input +operands, and the last argument, <CODE><I>destPtr</I></CODE>, points to the +location where the result is stored. +</P> + +<P> +Rounding of the <NOBR>80-bit</NOBR> double-extended-precision +(<CODE>extFloat80_t</CODE>) functions is affected by variable +<CODE>extF80_roundingPrecision</CODE>, as explained earlier in +<NOBR>section 6.3</NOBR>, +<I>Rounding Precision for the <NOBR>80-Bit</NOBR> Extended Format</I>. +</P> + +<H3>8.5. Fused Multiply-Add Functions</H3> + +<P> +The 2008 version of the IEEE Floating-Point Standard defines a <I>fused +multiply-add</I> operation that does a combined multiplication and addition +with only a single rounding. +SoftFloat implements fused multiply-add with functions +<BLOCKQUOTE> +<CODE><<I>float</I>>_mulAdd</CODE> +</BLOCKQUOTE> +Unlike other operations, fused multiple-add is not supported for the +<NOBR>80-bit</NOBR> double-extended-precision format, +<CODE>extFloat80_t</CODE>. +</P> + +<P> +Depending on whether floating-point values are passed by value or via pointers, +the fused multiply-add functions have signatures of these forms: +<BLOCKQUOTE> +<PRE> +float64_t f64_mulAdd( float64_t <I>a</I>, float64_t <I>b</I>, float64_t <I>c</I> ); +</PRE> +<PRE> +void + f128M_mulAdd( + const float128_t *<I>aPtr</I>, + const float128_t *<I>bPtr</I>, + const float128_t *<I>cPtr</I>, + float128_t *<I>destPtr</I> + ); +</PRE> +</BLOCKQUOTE> +The functions compute +<NOBR>(<CODE><I>a</I></CODE> × <CODE><I>b</I></CODE>) + + <CODE><I>c</I></CODE></NOBR> +with a single rounding. +When floating-point values are passed indirectly through pointers, arguments +<CODE><I>aPtr</I></CODE>, <CODE><I>bPtr</I></CODE>, and +<CODE><I>cPtr</I></CODE> point to operands <CODE><I>a</I></CODE>, +<CODE><I>b</I></CODE>, and <CODE><I>c</I></CODE> respectively, and +<CODE><I>destPtr</I></CODE> points to the location where the result is stored. +</P> + +<P> +If one of the multiplication operands <CODE><I>a</I></CODE> and +<CODE><I>b</I></CODE> is infinite and the other is zero, these functions raise +the invalid exception even if operand <CODE><I>c</I></CODE> is a quiet NaN. +</P> + +<H3>8.6. Remainder Functions</H3> + +<P> +For each format, SoftFloat implements the remainder operation defined by the +IEEE Floating-Point Standard. +The remainder functions have names +<BLOCKQUOTE> +<CODE><<I>float</I>>_rem</CODE> +</BLOCKQUOTE> +Each remainder operation takes two floating-point operands of the same format +and returns a result in the same format. +Depending on whether floating-point values are passed by value or via pointers, +the remainder functions have signatures of these forms: +<BLOCKQUOTE> +<PRE> +float64_t f64_rem( float64_t <I>a</I>, float64_t <I>b</I> ); +</PRE> +<PRE> +void + f128M_rem( + const float128_t *<I>aPtr</I>, const float128_t *<I>bPtr</I>, float128_t *<I>destPtr</I> ); +</PRE> +</BLOCKQUOTE> +When floating-point values are passed indirectly through pointers, arguments +<CODE><I>aPtr</I></CODE> and <CODE><I>bPtr</I></CODE> point to operands +<CODE><I>a</I></CODE> and <CODE><I>b</I></CODE> respectively, and +<CODE><I>destPtr</I></CODE> points to the location where the result is stored. +</P> + +<P> +The IEEE Standard remainder operation computes the value +<NOBR><CODE><I>a</I></CODE> + − <I>n</I> × <CODE><I>b</I></CODE></NOBR>, +where <I>n</I> is the integer closest to +<NOBR><CODE><I>a</I></CODE> ÷ <CODE><I>b</I></CODE></NOBR>. +If <NOBR><CODE><I>a</I></CODE> ÷ <CODE><I>b</I></CODE></NOBR> is exactly +halfway between two integers, <I>n</I> is the <EM>even</EM> integer closest to +<NOBR><CODE><I>a</I></CODE> ÷ <CODE><I>b</I></CODE></NOBR>. +The IEEE Standard’s remainder operation is always exact and so requires +no rounding. +</P> + +<P> +Depending on the relative magnitudes of the operands, the remainder +functions can take considerably longer to execute than the other SoftFloat +functions. +This is an inherent characteristic of the remainder operation itself and is not +a flaw in the SoftFloat implementation. +</P> + +<H3>8.7. Round-to-Integer Functions</H3> + +<P> +For each format, SoftFloat implements the round-to-integer operation specified +by the IEEE Floating-Point Standard. +These functions are named +<BLOCKQUOTE> +<CODE><<I>float</I>>_roundToInt</CODE> +</BLOCKQUOTE> +Each round-to-integer operation takes a single floating-point operand. +This operand is rounded to an integer according to a specified rounding mode, +and the resulting integer value is returned in the same floating-point format. +(Note that the result is not an integer type.) +</P> + +<P> +The signatures of the round-to-integer functions are similar to those for +conversions to an integer type: +<BLOCKQUOTE> +<PRE> +float64_t f64_roundToInt( float64_t <I>a</I>, uint_fast8_t <I>roundingMode</I>, bool <I>exact</I> ); +</PRE> +<PRE> +void + f128M_roundToInt( + const float128_t *<I>aPtr</I>, + uint_fast8_t <I>roundingMode</I>, + bool <I>exact</I>, + float128_t *<I>destPtr</I> + ); +</PRE> +</BLOCKQUOTE> +When floating-point values are passed indirectly through pointers, +<CODE><I>aPtr</I></CODE> points to the input operand and +<CODE><I>destPtr</I></CODE> points to the location where the result is stored. +</P> + +<P> +The <CODE><I>roundingMode</I></CODE> argument specifies the rounding mode to +apply. +The variable that usually indicates rounding mode, +<CODE>softfloat_roundingMode</CODE>, is ignored. +Argument <CODE><I>exact</I></CODE> determines whether the <I>inexact</I> +exception flag is raised if the conversion is not exact. +If <CODE><I>exact</I></CODE> is <CODE>true</CODE>, the <I>inexact</I> flag may +be raised; +otherwise, it will not be, even if the conversion is inexact. +</P> + +<H3>8.8. Comparison Functions</H3> + +<P> +For each format, the following floating-point comparison functions are +provided: +<BLOCKQUOTE> +<CODE><<I>float</I>>_eq</CODE><BR> +<CODE><<I>float</I>>_le</CODE><BR> +<CODE><<I>float</I>>_lt</CODE> +</BLOCKQUOTE> +Each comparison takes two operands of the same type and returns a Boolean. +The abbreviation <CODE>eq</CODE> stands for “equal” (=); +<CODE>le</CODE> stands for “less than or equal” (≤); +and <CODE>lt</CODE> stands for “less than” (<). +Depending on whether the floating-point operands are passed by value or via +pointers, the comparison functions have signatures of these forms: +<BLOCKQUOTE> +<PRE> +bool f64_eq( float64_t <I>a</I>, float64_t <I>b</I> ); +</PRE> +<PRE> +bool f128M_eq( const float128_t *<I>aPtr</I>, const float128_t *<I>bPtr</I> ); +</PRE> +</BLOCKQUOTE> +</P> + +<P> +The usual greater-than (>), greater-than-or-equal (≥), and not-equal +(≠) comparisons are easily obtained from the functions provided. +The not-equal function is just the logical complement of the equal function. +The greater-than-or-equal function is identical to the less-than-or-equal +function with the arguments in reverse order, and likewise the greater-than +function is identical to the less-than function with the arguments reversed. +</P> + +<P> +The IEEE Floating-Point Standard specifies that the less-than-or-equal and +less-than comparisons by default raise the <I>invalid</I> exception if either +operand is any kind of NaN. +Equality comparisons, on the other hand, are defined by default to raise the +<I>invalid</I> exception only for signaling NaNs, not quiet NaNs. +For completeness, SoftFloat provides these complementary functions: +<BLOCKQUOTE> +<CODE><<I>float</I>>_eq_signaling</CODE><BR> +<CODE><<I>float</I>>_le_quiet</CODE><BR> +<CODE><<I>float</I>>_lt_quiet</CODE> +</BLOCKQUOTE> +The <CODE>signaling</CODE> equality comparisons are identical to the default +equality comparisons except that the <I>invalid</I> exception is raised for any +NaN input, not just for signaling NaNs. +Similarly, the <CODE>quiet</CODE> comparison functions are identical to their +default counterparts except that the <I>invalid</I> exception is not raised for +quiet NaNs. +</P> + +<H3>8.9. Signaling NaN Test Functions</H3> + +<P> +Functions for testing whether a floating-point value is a signaling NaN are +provided with these names: +<BLOCKQUOTE> +<CODE><<I>float</I>>_isSignalingNaN</CODE> +</BLOCKQUOTE> +The functions take one floating-point operand and return a Boolean indicating +whether the operand is a signaling NaN. +Accordingly, the functions have the forms +<BLOCKQUOTE> +<PRE> +bool f64_isSignalingNaN( float64_t <I>a</I> ); +</PRE> +<PRE> +bool f128M_isSignalingNaN( const float128_t *<I>aPtr</I> ); +</PRE> +</BLOCKQUOTE> +</P> + +<H3>8.10. Raise-Exception Function</H3> + +<P> +SoftFloat provides a single function for raising floating-point exceptions: +<BLOCKQUOTE> +<PRE> +void softfloat_raiseFlags( uint_fast8_t <I>exceptions</I> ); +</PRE> +</BLOCKQUOTE> +The <CODE><I>exceptions</I></CODE> argument is a mask indicating the set of +exceptions to raise. +(See earlier section 7, <I>Exceptions and Exception Flags</I>.) +In addition to setting the specified exception flags in variable +<CODE>softfloat_exceptionFlags</CODE>, the <CODE>softfloat_raiseFlags</CODE> +function may cause a trap or abort appropriate for the current system. +</P> + + +<H2>9. Changes from SoftFloat <NOBR>Release 2</NOBR></H2> + +<P> +Apart from a change in the legal use license, <NOBR>Release 3</NOBR> of +SoftFloat introduced numerous technical differences compared to earlier +releases. +</P> + +<H3>9.1. Name Changes</H3> + +<P> +The most obvious and pervasive difference compared to <NOBR>Release 2</NOBR> +is that the names of most functions and variables have changed, even when the +behavior has not. +First, the floating-point types, the mode variables, the exception flags +variable, the function to raise exceptions, and various associated constants +have been renamed as follows: +<BLOCKQUOTE> +<TABLE> +<TR> +<TD>old name, Release 2:</TD> +<TD>new name, Release 3:</TD> +</TR> +<TR> +<TD><CODE>float32</CODE></TD> +<TD><CODE>float32_t</CODE></TD> +</TR> +<TR> +<TD><CODE>float64</CODE></TD> +<TD><CODE>float64_t</CODE></TD> +</TR> +<TR> +<TD><CODE>floatx80</CODE></TD> +<TD><CODE>extFloat80_t</CODE></TD> +</TR> +<TR> +<TD><CODE>float128</CODE></TD> +<TD><CODE>float128_t</CODE></TD> +</TR> +<TR> +<TD><CODE>float_rounding_mode</CODE></TD> +<TD><CODE>softfloat_roundingMode</CODE></TD> +</TR> +<TR> +<TD><CODE>float_round_nearest_even</CODE></TD> +<TD><CODE>softfloat_round_near_even</CODE></TD> +</TR> +<TR> +<TD><CODE>float_round_to_zero</CODE></TD> +<TD><CODE>softfloat_round_minMag</CODE></TD> +</TR> +<TR> +<TD><CODE>float_round_down</CODE></TD> +<TD><CODE>softfloat_round_min</CODE></TD> +</TR> +<TR> +<TD><CODE>float_round_up</CODE></TD> +<TD><CODE>softfloat_round_max</CODE></TD> +</TR> +<TR> +<TD><CODE>float_detect_tininess</CODE></TD> +<TD><CODE>softfloat_detectTininess</CODE></TD> +</TR> +<TR> +<TD><CODE>float_tininess_before_rounding </CODE></TD> +<TD><CODE>softfloat_tininess_beforeRounding</CODE></TD> +</TR> +<TR> +<TD><CODE>float_tininess_after_rounding</CODE></TD> +<TD><CODE>softfloat_tininess_afterRounding</CODE></TD> +</TR> +<TR> +<TD><CODE>floatx80_rounding_precision</CODE></TD> +<TD><CODE>extF80_roundingPrecision</CODE></TD> +</TR> +<TR> +<TD><CODE>float_exception_flags</CODE></TD> +<TD><CODE>softfloat_exceptionFlags</CODE></TD> +</TR> +<TR> +<TD><CODE>float_flag_inexact</CODE></TD> +<TD><CODE>softfloat_flag_inexact</CODE></TD> +</TR> +<TR> +<TD><CODE>float_flag_underflow</CODE></TD> +<TD><CODE>softfloat_flag_underflow</CODE></TD> +</TR> +<TR> +<TD><CODE>float_flag_overflow</CODE></TD> +<TD><CODE>softfloat_flag_overflow</CODE></TD> +</TR> +<TR> +<TD><CODE>float_flag_divbyzero</CODE></TD> +<TD><CODE>softfloat_flag_infinite</CODE></TD> +</TR> +<TR> +<TD><CODE>float_flag_invalid</CODE></TD> +<TD><CODE>softfloat_flag_invalid</CODE></TD> +</TR> +<TR> +<TD><CODE>float_raise</CODE></TD> +<TD><CODE>softfloat_raiseFlags</CODE></TD> +</TR> +</TABLE> +</BLOCKQUOTE> +</P> + +<P> +Furthermore, <NOBR>Release 3</NOBR> adopted the following new abbreviations for +function names: +<BLOCKQUOTE> +<TABLE> +<TR> +<TD>used in names in Release 2:<CODE> </CODE></TD> +<TD>used in names in Release 3:</TD> +</TR> +<TR> <TD><CODE>int32</CODE></TD> <TD><CODE>i32</CODE></TD> </TR> +<TR> <TD><CODE>int64</CODE></TD> <TD><CODE>i64</CODE></TD> </TR> +<TR> <TD><CODE>float32</CODE></TD> <TD><CODE>f32</CODE></TD> </TR> +<TR> <TD><CODE>float64</CODE></TD> <TD><CODE>f64</CODE></TD> </TR> +<TR> <TD><CODE>floatx80</CODE></TD> <TD><CODE>extF80</CODE></TD> </TR> +<TR> <TD><CODE>float128</CODE></TD> <TD><CODE>f128</CODE></TD> </TR> +</TABLE> +</BLOCKQUOTE> +Thus, for example, the function to add two <NOBR>32-bit</NOBR> floating-point +numbers, previously called <CODE>float32_add</CODE> in <NOBR>Release 2</NOBR>, +is now <CODE>f32_add</CODE>. +Lastly, there have been a few other changes to function names: +<BLOCKQUOTE> +<TABLE> +<TR> +<TD>used in names in Release 2:<CODE> </CODE></TD> +<TD>used in names in Release 3:<CODE> </CODE></TD> +<TD>relevant functions:</TD> +</TR> +<TR> +<TD><CODE>_round_to_zero</CODE></TD> +<TD><CODE>_r_minMag</CODE></TD> +<TD>conversions from floating-point to integer (<NOBR>section 8.2</NOBR>)</TD> +</TR> +<TR> +<TD><CODE>round_to_int</CODE></TD> +<TD><CODE>roundToInt</CODE></TD> +<TD>round-to-integer functions (<NOBR>section 8.7</NOBR>)</TD> +</TR> +<TR> +<TD><CODE>is_signaling_nan </CODE></TD> +<TD><CODE>isSignalingNaN</CODE></TD> +<TD>signaling NaN test functions (<NOBR>section 8.9</NOBR>)</TD> +</TR> +</TABLE> +</BLOCKQUOTE> +</P> + +<H3>9.2. Changes to Function Arguments</H3> + +<P> +Besides simple name changes, some operations were given a different interface +in <NOBR>Release 3</NOBR> than they had in <NOBR>Release 2</NOBR>: +<UL> + +<LI> +<P> +Since <NOBR>Release 3</NOBR>, integer arguments and results of functions have +standard types from header <CODE><stdint.h></CODE>, such as +<CODE>uint32_t</CODE>, whereas previously their types could be defined +differently for each port of SoftFloat, usually using traditional C types such +as <CODE>unsigned</CODE> <CODE>int</CODE>. +Likewise, functions in <NOBR>Release 3</NOBR> and later pass Booleans as +standard type <CODE>bool</CODE> from <CODE><stdbool.h></CODE>, whereas +previously these were again passed as a port-specific type (usually +<CODE>int</CODE>). +</P> + +<LI> +<P> +As explained earlier in <NOBR>section 4.5</NOBR>, <I>Conventions for Passing +Arguments and Results</I>, SoftFloat functions in <NOBR>Release 3</NOBR> and +later may pass <NOBR>80-bit</NOBR> and <NOBR>128-bit</NOBR> floating-point +values through pointers, meaning that functions take pointer arguments and then +read or write floating-point values at the locations indicated by the pointers. +In <NOBR>Release 2</NOBR>, floating-point arguments and results were always +passed by value, regardless of their size. +</P> + +<LI> +<P> +Functions that round to an integer have additional +<CODE><I>roundingMode</I></CODE> and <CODE><I>exact</I></CODE> arguments that +they did not have in <NOBR>Release 2</NOBR>. +Refer to sections 8.2 <NOBR>and 8.7</NOBR> for descriptions of these functions +since <NOBR>Release 3</NOBR>. +For <NOBR>Release 2</NOBR>, the rounding mode, when needed, was taken from the +same global variable that affects the basic arithmetic operations (now called +<CODE>softfloat_roundingMode</CODE> but previously known as +<CODE>float_rounding_mode</CODE>). +Also, for <NOBR>Release 2</NOBR>, if the original floating-point input was not +an exact integer value, and if the <I>invalid</I> exception was not raised by +the function, the <I>inexact</I> exception was always raised. +<NOBR>Release 2</NOBR> had no option to suppress raising <I>inexact</I> in this +case. +Applications using SoftFloat <NOBR>Release 3</NOBR> or later can get the same +effect as <NOBR>Release 2</NOBR> by passing variable +<CODE>softfloat_roundingMode</CODE> for argument +<CODE><I>roundingMode</I></CODE> and <CODE>true</CODE> for argument +<CODE><I>exact</I></CODE>. +</P> + +</UL> +</P> + +<H3>9.3. Added Capabilities</H3> + +<P> +With <NOBR>Release 3</NOBR>, some new features have been added that were not +present in <NOBR>Release 2</NOBR>: +<UL> + +<LI> +<P> +A port of SoftFloat can now define any of the floating-point types +<CODE>float32_t</CODE>, <CODE>float64_t</CODE>, <CODE>extFloat80_t</CODE>, and +<CODE>float128_t</CODE> as aliases for C’s standard floating-point types +<CODE>float</CODE>, <CODE>double</CODE>, and <CODE>long</CODE> +<CODE>double</CODE>, using either <CODE>#define</CODE> or <CODE>typedef</CODE>. +This potential convenience was not supported under <NOBR>Release 2</NOBR>. +</P> + +<P> +(Note, however, that there may be a performance cost to defining +SoftFloat’s floating-point types this way, depending on the platform and +the applications using SoftFloat. +Ports of SoftFloat may choose to forgo the convenience in favor of better +speed.) +</P> + +<P> +<LI> +As of <NOBR>Release 3b</NOBR>, <NOBR>16-bit</NOBR> half-precision, +<CODE>float16_t</CODE>, is supported. +</P> + +<P> +<LI> +Functions have been added for converting between the floating-point types and +unsigned integers. +<NOBR>Release 2</NOBR> supported only signed integers, not unsigned. +</P> + +<P> +<LI> +Fused multiply-add functions have been added for all floating-point formats +except <NOBR>80-bit</NOBR> double-extended-precision, +<CODE>extFloat80_t</CODE>. +</P> + +<P> +<LI> +New rounding modes are supported: +<CODE>softfloat_round_near_maxMag</CODE> (round to nearest, with ties to +maximum magnitude, away from zero), and, as of <NOBR>Release 3c</NOBR>, +optional <CODE>softfloat_round_odd</CODE> (round to odd, also known as +jamming). +</P> + +</UL> +</P> + +<H3>9.4. Better Compatibility with the C Language</H3> + +<P> +<NOBR>Release 3</NOBR> of SoftFloat was written to conform better to the ISO C +Standard’s rules for portability. +For example, older releases of SoftFloat employed type conversions in ways +that, while commonly practiced, are not fully defined by the C Standard. +Such problematic type conversions have generally been replaced by the use of +unions, the behavior around which is more strictly regulated these days. +</P> + +<H3>9.5. New Organization as a Library</H3> + +<P> +Starting with <NOBR>Release 3</NOBR>, SoftFloat now builds as a library. +Previously, SoftFloat compiled into a single, monolithic object file containing +all the SoftFloat functions, with the consequence that a program linking with +SoftFloat would get every SoftFloat function in its binary file even if only a +few functions were actually used. +With SoftFloat in the form of a library, a program that is linked by a standard +linker will include only those functions of SoftFloat that it needs and no +others. +</P> + +<H3>9.6. Optimization Gains (and Losses)</H3> + +<P> +Individual SoftFloat functions have been variously improved in +<NOBR>Release 3</NOBR> compared to earlier releases. +In particular, better, faster algorithms have been deployed for the operations +of division, square root, and remainder. +For functions operating on the larger <NOBR>80-bit</NOBR> and +<NOBR>128-bit</NOBR> formats, <CODE>extFloat80_t</CODE> and +<CODE>float128_t</CODE>, code size has also generally been reduced. +</P> + +<P> +However, because <NOBR>Release 2</NOBR> compiled all of SoftFloat together as a +single object file, compilers could make optimizations across function calls +when one SoftFloat function calls another. +Now that the functions of SoftFloat are compiled separately and only afterward +linked together into a program, there is not usually the same opportunity to +optimize across function calls. +Some loss of speed has been observed due to this change. +</P> + + +<H2>10. Future Directions</H2> + +<P> +The following improvements are anticipated for future releases of SoftFloat: +<UL> +<LI> +more functions from the 2008 version of the IEEE Floating-Point Standard; +<LI> +consistent, defined behavior for non-canonical representations of extended +format <CODE>extFloat80_t</CODE> (discussed in <NOBR>section 4.4</NOBR>, +<I>Non-canonical Representations in <CODE>extFloat80_t</CODE></I>). + +</UL> +</P> + + +<H2>11. Contact Information</H2> + +<P> +At the time of this writing, the most up-to-date information about SoftFloat +and the latest release can be found at the Web page +<A HREF="http://www.jhauser.us/arithmetic/SoftFloat.html"><NOBR><CODE>http://www.jhauser.us/arithmetic/SoftFloat.html</CODE></NOBR></A>. +</P> + + +</BODY> + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/extF80M_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/extF80M_isSignalingNaN.c new file mode 100644 index 000000000..c2cca65c9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/extF80M_isSignalingNaN.c @@ -0,0 +1,57 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +bool extF80M_isSignalingNaN( const extFloat80_t *aPtr ) +{ + const struct extFloat80M *aSPtr; + uint64_t uiA0; + + aSPtr = (const struct extFloat80M *) aPtr; + if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false; + uiA0 = aSPtr->signif; + return + ! (uiA0 & UINT64_C( 0x4000000000000000 )) + && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/f128M_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/f128M_isSignalingNaN.c new file mode 100644 index 000000000..9ff83d726 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/f128M_isSignalingNaN.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +bool f128M_isSignalingNaN( const float128_t *aPtr ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false; + return + ((uiA96 & 0x00007FFF) != 0) + || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )]) + != 0); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToExtF80M.c new file mode 100644 index 000000000..06302aa15 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToExtF80M.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into an 80-bit extended +| floating-point NaN, and stores this NaN at the location pointed to by +| `zSPtr'. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ) +{ + + zSPtr->signExp = packToExtF80UI64( aPtr->sign, 0x7FFF ); + zSPtr->signif = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToExtF80UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToExtF80UI.c new file mode 100644 index 000000000..7325468ff --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToExtF80UI.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into an 80-bit extended +| floating-point NaN, and returns the bit pattern of this value as an unsigned +| integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + + uiZ.v64 = (uint_fast16_t) aPtr->sign<<15 | 0x7FFF; + uiZ.v0 = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF128M.c new file mode 100644 index 000000000..e2940bb77 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF128M.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point +| NaN, and stores this NaN at the location pointed to by `zWPtr'. Argument +| `zWPtr' points to an array of four 32-bit elements that concatenate in the +| platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ) +{ + + softfloat_shortShiftRight128M( (const uint32_t *) &aPtr->v0, 16, zWPtr ); + zWPtr[indexWordHi( 4 )] |= (uint32_t) aPtr->sign<<31 | 0x7FFF8000; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF128UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF128UI.c new file mode 100644 index 000000000..ac8ea7b70 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF128UI.c @@ -0,0 +1,55 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + + uiZ = softfloat_shortShiftRight128( aPtr->v64, aPtr->v0, 16 ); + uiZ.v64 |= (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FFF800000000000 ); + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF16UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF16UI.c new file mode 100644 index 000000000..07679d717 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF16UI.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 16-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr ) +{ + + return (uint_fast16_t) aPtr->sign<<15 | 0x7E00 | aPtr->v64>>54; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF32UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF32UI.c new file mode 100644 index 000000000..982c1edf6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF32UI.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 32-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr ) +{ + + return (uint_fast32_t) aPtr->sign<<31 | 0x7FC00000 | aPtr->v64>>41; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF64UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF64UI.c new file mode 100644 index 000000000..d88c68ade --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_commonNaNToF64UI.c @@ -0,0 +1,53 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 64-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr ) +{ + + return + (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FF8000000000000 ) + | aPtr->v64>>12; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_extF80MToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_extF80MToCommonNaN.c new file mode 100644 index 000000000..6bf45cf86 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_extF80MToCommonNaN.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the 80-bit extended floating-point value pointed to by `aSPtr' is +| a NaN, converts this NaN to the common NaN form, and stores the resulting +| common NaN at the location pointed to by `zPtr'. If the NaN is a signaling +| NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80MToCommonNaN( + const struct extFloat80M *aSPtr, struct commonNaN *zPtr ) +{ + + if ( extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = signExtF80UI64( aSPtr->signExp ); + zPtr->v64 = aSPtr->signif<<1; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_extF80UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_extF80UIToCommonNaN.c new file mode 100644 index 000000000..8b8c92780 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_extF80UIToCommonNaN.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0' +| has the bit pattern of an 80-bit extended floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80UIToCommonNaN( + uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA64>>15; + zPtr->v64 = uiA0<<1; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f128MToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f128MToCommonNaN.c new file mode 100644 index 000000000..22152145a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f128MToCommonNaN.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the 128-bit floating-point value pointed to by `aWPtr' is a NaN, +| converts this NaN to the common NaN form, and stores the resulting common +| NaN at the location pointed to by `zPtr'. If the NaN is a signaling NaN, +| the invalid exception is raised. Argument `aWPtr' points to an array of +| four 32-bit elements that concatenate in the platform's normal endian order +| to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr ) +{ + + if ( f128M_isSignalingNaN( (const float128_t *) aWPtr ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = aWPtr[indexWordHi( 4 )]>>31; + softfloat_shortShiftLeft128M( aWPtr, 16, (uint32_t *) &zPtr->v0 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f128UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f128UIToCommonNaN.c new file mode 100644 index 000000000..2510c0707 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f128UIToCommonNaN.c @@ -0,0 +1,65 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0' +| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to +| the common NaN form, and stores the resulting common NaN at the location +| pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid exception +| is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_f128UIToCommonNaN( + uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ) +{ + struct uint128 NaNSig; + + if ( softfloat_isSigNaNF128UI( uiA64, uiA0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + NaNSig = softfloat_shortShiftLeft128( uiA64, uiA0, 16 ); + zPtr->sign = uiA64>>63; + zPtr->v64 = NaNSig.v64; + zPtr->v0 = NaNSig.v0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f16UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f16UIToCommonNaN.c new file mode 100644 index 000000000..4d5003f6a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f16UIToCommonNaN.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming `uiA' has the bit pattern of a 16-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNF16UI( uiA ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA>>15; + zPtr->v64 = (uint_fast64_t) uiA<<54; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f32UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f32UIToCommonNaN.c new file mode 100644 index 000000000..f4734db7a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f32UIToCommonNaN.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming `uiA' has the bit pattern of a 32-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNF32UI( uiA ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA>>31; + zPtr->v64 = (uint_fast64_t) uiA<<41; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f64UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f64UIToCommonNaN.c new file mode 100644 index 000000000..9a481a74f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_f64UIToCommonNaN.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming `uiA' has the bit pattern of a 64-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNF64UI( uiA ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA>>63; + zPtr->v64 = uiA<<12; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNExtF80M.c new file mode 100644 index 000000000..f35e06654 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNExtF80M.c @@ -0,0 +1,107 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 80-bit extended floating-point values +| pointed to by `aSPtr' and `bSPtr' is a NaN, stores the combined NaN result +| at the location pointed to by `zSPtr'. If either original floating-point +| value is a signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr + ) +{ + bool isSigNaNA; + const struct extFloat80M *sPtr; + bool isSigNaNB; + uint_fast16_t uiB64; + uint64_t uiB0; + uint_fast16_t uiA64; + uint64_t uiA0; + uint_fast16_t uiMagA64, uiMagB64; + + isSigNaNA = extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ); + sPtr = aSPtr; + if ( ! bSPtr ) { + if ( isSigNaNA ) softfloat_raiseFlags( softfloat_flag_invalid ); + goto copy; + } + isSigNaNB = extF80M_isSignalingNaN( (const extFloat80_t *) bSPtr ); + if ( isSigNaNA | isSigNaNB ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) { + uiB64 = bSPtr->signExp; + if ( isSigNaNB ) goto returnLargerUIMag; + uiB0 = bSPtr->signif; + if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto copyB; + goto copy; + } else { + uiA64 = aSPtr->signExp; + uiA0 = aSPtr->signif; + if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto copy; + goto copyB; + } + } + uiB64 = bSPtr->signExp; + returnLargerUIMag: + uiA64 = aSPtr->signExp; + uiMagA64 = uiA64 & 0x7FFF; + uiMagB64 = uiB64 & 0x7FFF; + if ( uiMagA64 < uiMagB64 ) goto copyB; + if ( uiMagB64 < uiMagA64 ) goto copy; + uiA0 = aSPtr->signif; + uiB0 = bSPtr->signif; + if ( uiA0 < uiB0 ) goto copyB; + if ( uiB0 < uiA0 ) goto copy; + if ( uiA64 < uiB64 ) goto copy; + copyB: + sPtr = bSPtr; + copy: + zSPtr->signExp = sPtr->signExp; + zSPtr->signif = sPtr->signif | UINT64_C( 0xC000000000000000 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNExtF80UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNExtF80UI.c new file mode 100644 index 000000000..fa2daae2e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNExtF80UI.c @@ -0,0 +1,106 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting +| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 80-bit extended floating-point value, and assuming at least on of these +| floating-point values is a NaN, returns the bit pattern of the combined NaN +| result. If either original floating-point value is a signaling NaN, the +| invalid exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNExtF80UI( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0 + ) +{ + bool isSigNaNA, isSigNaNB; + uint_fast64_t uiNonsigA0, uiNonsigB0; + uint_fast16_t uiMagA64, uiMagB64; + struct uint128 uiZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + isSigNaNA = softfloat_isSigNaNExtF80UI( uiA64, uiA0 ); + isSigNaNB = softfloat_isSigNaNExtF80UI( uiB64, uiB0 ); + /*------------------------------------------------------------------------ + | Make NaNs non-signaling. + *------------------------------------------------------------------------*/ + uiNonsigA0 = uiA0 | UINT64_C( 0xC000000000000000 ); + uiNonsigB0 = uiB0 | UINT64_C( 0xC000000000000000 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isSigNaNA | isSigNaNB ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) { + if ( isSigNaNB ) goto returnLargerMag; + if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto returnB; + goto returnA; + } else { + if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto returnA; + goto returnB; + } + } + returnLargerMag: + uiMagA64 = uiA64 & 0x7FFF; + uiMagB64 = uiB64 & 0x7FFF; + if ( uiMagA64 < uiMagB64 ) goto returnB; + if ( uiMagB64 < uiMagA64 ) goto returnA; + if ( uiA0 < uiB0 ) goto returnB; + if ( uiB0 < uiA0 ) goto returnA; + if ( uiA64 < uiB64 ) goto returnA; + returnB: + uiZ.v64 = uiB64; + uiZ.v0 = uiNonsigB0; + return uiZ; + returnA: + uiZ.v64 = uiA64; + uiZ.v0 = uiNonsigA0; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF128M.c new file mode 100644 index 000000000..e8872742c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF128M.c @@ -0,0 +1,76 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 128-bit floating-point values pointed to by +| `aWPtr' and `bWPtr' is a NaN, stores the combined NaN result at the location +| pointed to by `zWPtr'. If either original floating-point value is a +| signaling NaN, the invalid exception is raised. Each of `aWPtr', `bWPtr', +| and `zWPtr' points to an array of four 32-bit elements that concatenate in +| the platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNF128M( + const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr ) +{ + bool isSigNaNA; + const uint32_t *ptr; + + ptr = aWPtr; + isSigNaNA = f128M_isSignalingNaN( (const float128_t *) aWPtr ); + if ( + isSigNaNA + || (bWPtr && f128M_isSignalingNaN( (const float128_t *) bWPtr )) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) goto copy; + } + if ( ! softfloat_isNaNF128M( aWPtr ) ) ptr = bWPtr; + copy: + zWPtr[indexWordHi( 4 )] = ptr[indexWordHi( 4 )] | 0x00008000; + zWPtr[indexWord( 4, 2 )] = ptr[indexWord( 4, 2 )]; + zWPtr[indexWord( 4, 1 )] = ptr[indexWord( 4, 1 )]; + zWPtr[indexWord( 4, 0 )] = ptr[indexWord( 4, 0 )]; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF128UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF128UI.c new file mode 100644 index 000000000..fb0e862dc --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF128UI.c @@ -0,0 +1,81 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating `uiA64' and +| `uiA0' as a 128-bit floating-point value, and likewise interpreting the +| unsigned integer formed from concatenating `uiB64' and `uiB0' as another +| 128-bit floating-point value, and assuming at least on of these floating- +| point values is a NaN, returns the bit pattern of the combined NaN result. +| If either original floating-point value is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNF128UI( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0 + ) +{ + bool isSigNaNA; + struct uint128 uiZ; + + isSigNaNA = softfloat_isSigNaNF128UI( uiA64, uiA0 ); + if ( isSigNaNA || softfloat_isSigNaNF128UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) goto returnNonsigA; + } + if ( isNaNF128UI( uiA64, uiA0 ) ) { + returnNonsigA: + uiZ.v64 = uiA64; + uiZ.v0 = uiA0; + } else { + uiZ.v64 = uiB64; + uiZ.v0 = uiB0; + } + uiZ.v64 |= UINT64_C( 0x0000800000000000 ); + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF16UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF16UI.c new file mode 100644 index 000000000..8e19e4301 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF16UI.c @@ -0,0 +1,63 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting `uiA' and `uiB' as the bit patterns of two 16-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either `uiA' or `uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast16_t + softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB ) +{ + bool isSigNaNA; + + isSigNaNA = softfloat_isSigNaNF16UI( uiA ); + if ( isSigNaNA || softfloat_isSigNaNF16UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) return uiA | 0x0200; + } + return (isNaNF16UI( uiA ) ? uiA : uiB) | 0x0200; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF32UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF32UI.c new file mode 100644 index 000000000..6e423cac6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF32UI.c @@ -0,0 +1,63 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting `uiA' and `uiB' as the bit patterns of two 32-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either `uiA' or `uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast32_t + softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB ) +{ + bool isSigNaNA; + + isSigNaNA = softfloat_isSigNaNF32UI( uiA ); + if ( isSigNaNA || softfloat_isSigNaNF32UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) return uiA | 0x00400000; + } + return (isNaNF32UI( uiA ) ? uiA : uiB) | 0x00400000; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF64UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF64UI.c new file mode 100644 index 000000000..474c1967d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/s_propagateNaNF64UI.c @@ -0,0 +1,63 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting `uiA' and `uiB' as the bit patterns of two 64-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either `uiA' or `uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast64_t + softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB ) +{ + bool isSigNaNA; + + isSigNaNA = softfloat_isSigNaNF64UI( uiA ); + if ( isSigNaNA || softfloat_isSigNaNF64UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) return uiA | UINT64_C( 0x0008000000000000 ); + } + return (isNaNF64UI( uiA ) ? uiA : uiB) | UINT64_C( 0x0008000000000000 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/softfloat_raiseFlags.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/softfloat_raiseFlags.c new file mode 100644 index 000000000..7a1aee930 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/softfloat_raiseFlags.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Raises the exceptions specified by `flags'. Floating-point traps can be +| defined here if desired. It is currently not possible for such a trap +| to substitute a result value. If traps are not implemented, this routine +| should be simply `softfloat_exceptionFlags |= flags;'. +*----------------------------------------------------------------------------*/ +void softfloat_raiseFlags( uint_fast8_t flags ) +{ + + softfloat_exceptionFlags |= flags; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/specialize.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/specialize.h new file mode 100644 index 000000000..a9166e170 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086-SSE/specialize.h @@ -0,0 +1,376 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef specialize_h +#define specialize_h 1 + +#include <stdbool.h> +#include <stdint.h> +#include "primitiveTypes.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Default value for 'softfloat_detectTininess'. +*----------------------------------------------------------------------------*/ +#define init_detectTininess softfloat_tininess_afterRounding + +/*---------------------------------------------------------------------------- +| The values to return on conversions to 32-bit integer formats that raise an +| invalid exception. +*----------------------------------------------------------------------------*/ +#define ui32_fromPosOverflow 0xFFFFFFFF +#define ui32_fromNegOverflow 0xFFFFFFFF +#define ui32_fromNaN 0xFFFFFFFF +#define i32_fromPosOverflow (-0x7FFFFFFF - 1) +#define i32_fromNegOverflow (-0x7FFFFFFF - 1) +#define i32_fromNaN (-0x7FFFFFFF - 1) + +/*---------------------------------------------------------------------------- +| The values to return on conversions to 64-bit integer formats that raise an +| invalid exception. +*----------------------------------------------------------------------------*/ +#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF ) +#define ui64_fromNegOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF ) +#define ui64_fromNaN UINT64_C( 0xFFFFFFFFFFFFFFFF ) +#define i64_fromPosOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) +#define i64_fromNegOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) +#define i64_fromNaN (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) + +/*---------------------------------------------------------------------------- +| "Common NaN" structure, used to transfer NaN representations from one format +| to another. +*----------------------------------------------------------------------------*/ +struct commonNaN { + bool sign; +#ifdef LITTLEENDIAN + uint64_t v0, v64; +#else + uint64_t v64, v0; +#endif +}; + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 16-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF16UI 0xFE00 + +/*---------------------------------------------------------------------------- +| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a +| 16-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF)) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast16_t + softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 32-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF32UI 0xFFC00000 + +/*---------------------------------------------------------------------------- +| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a +| 32-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF)) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast32_t + softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 64-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF64UI UINT64_C( 0xFFF8000000000000 ) + +/*---------------------------------------------------------------------------- +| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a +| 64-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF ))) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast64_t + softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 80-bit extended floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNExtF80UI64 0xFFFF +#define defaultNaNExtF80UI0 UINT64_C( 0xC000000000000000 ) + +/*---------------------------------------------------------------------------- +| Returns true when the 80-bit unsigned integer formed from concatenating +| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended +| floating-point signaling NaN. +| Note: This macro evaluates its arguments more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF ))) + +#ifdef SOFTFLOAT_FAST_INT64 + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is +| defined. +*----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of an 80-bit extended floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80UIToCommonNaN( + uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and returns the bit pattern of this value as an unsigned +| integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting +| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 80-bit extended floating-point value, and assuming at least on of these +| floating-point values is a NaN, returns the bit pattern of the combined NaN +| result. If either original floating-point value is a signaling NaN, the +| invalid exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNExtF80UI( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0 + ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 128-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF128UI64 UINT64_C( 0xFFFF800000000000 ) +#define defaultNaNF128UI0 UINT64_C( 0 ) + +/*---------------------------------------------------------------------------- +| Returns true when the 128-bit unsigned integer formed from concatenating +| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating- +| point signaling NaN. +| Note: This macro evaluates its arguments more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF )))) + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to +| the common NaN form, and stores the resulting common NaN at the location +| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception +| is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_f128UIToCommonNaN( + uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * ); + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the +| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 128-bit floating-point value, and assuming at least on of these floating- +| point values is a NaN, returns the bit pattern of the combined NaN result. +| If either original floating-point value is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNF128UI( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0 + ); + +#else + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not +| defined. +*----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- +| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is +| a NaN, converts this NaN to the common NaN form, and stores the resulting +| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling +| NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80MToCommonNaN( + const struct extFloat80M *aSPtr, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and stores this NaN at the location pointed to by +| 'zSPtr'. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ); + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 80-bit extended floating-point values +| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result +| at the location pointed to by 'zSPtr'. If either original floating-point +| value is a signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr + ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 128-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF128UI96 0xFFFF8000 +#define defaultNaNF128UI64 0 +#define defaultNaNF128UI32 0 +#define defaultNaNF128UI0 0 + +/*---------------------------------------------------------------------------- +| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN, +| converts this NaN to the common NaN form, and stores the resulting common +| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN, +| the invalid exception is raised. Argument 'aWPtr' points to an array of +| four 32-bit elements that concatenate in the platform's normal endian order +| to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument +| 'zWPtr' points to an array of four 32-bit elements that concatenate in the +| platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ); + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 128-bit floating-point values pointed to by +| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location +| pointed to by 'zWPtr'. If either original floating-point value is a +| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr', +| and 'zWPtr' points to an array of four 32-bit elements that concatenate in +| the platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNF128M( + const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr ); + +#endif + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/extF80M_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/extF80M_isSignalingNaN.c new file mode 100644 index 000000000..c2cca65c9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/extF80M_isSignalingNaN.c @@ -0,0 +1,57 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +bool extF80M_isSignalingNaN( const extFloat80_t *aPtr ) +{ + const struct extFloat80M *aSPtr; + uint64_t uiA0; + + aSPtr = (const struct extFloat80M *) aPtr; + if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false; + uiA0 = aSPtr->signif; + return + ! (uiA0 & UINT64_C( 0x4000000000000000 )) + && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/f128M_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/f128M_isSignalingNaN.c new file mode 100644 index 000000000..9ff83d726 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/f128M_isSignalingNaN.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +bool f128M_isSignalingNaN( const float128_t *aPtr ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false; + return + ((uiA96 & 0x00007FFF) != 0) + || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )]) + != 0); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToExtF80M.c new file mode 100644 index 000000000..06302aa15 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToExtF80M.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into an 80-bit extended +| floating-point NaN, and stores this NaN at the location pointed to by +| `zSPtr'. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ) +{ + + zSPtr->signExp = packToExtF80UI64( aPtr->sign, 0x7FFF ); + zSPtr->signif = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToExtF80UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToExtF80UI.c new file mode 100644 index 000000000..7325468ff --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToExtF80UI.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into an 80-bit extended +| floating-point NaN, and returns the bit pattern of this value as an unsigned +| integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + + uiZ.v64 = (uint_fast16_t) aPtr->sign<<15 | 0x7FFF; + uiZ.v0 = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF128M.c new file mode 100644 index 000000000..e2940bb77 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF128M.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point +| NaN, and stores this NaN at the location pointed to by `zWPtr'. Argument +| `zWPtr' points to an array of four 32-bit elements that concatenate in the +| platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ) +{ + + softfloat_shortShiftRight128M( (const uint32_t *) &aPtr->v0, 16, zWPtr ); + zWPtr[indexWordHi( 4 )] |= (uint32_t) aPtr->sign<<31 | 0x7FFF8000; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF128UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF128UI.c new file mode 100644 index 000000000..ac8ea7b70 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF128UI.c @@ -0,0 +1,55 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + + uiZ = softfloat_shortShiftRight128( aPtr->v64, aPtr->v0, 16 ); + uiZ.v64 |= (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FFF800000000000 ); + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF16UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF16UI.c new file mode 100644 index 000000000..07679d717 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF16UI.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 16-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr ) +{ + + return (uint_fast16_t) aPtr->sign<<15 | 0x7E00 | aPtr->v64>>54; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF32UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF32UI.c new file mode 100644 index 000000000..982c1edf6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF32UI.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 32-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr ) +{ + + return (uint_fast32_t) aPtr->sign<<31 | 0x7FC00000 | aPtr->v64>>41; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF64UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF64UI.c new file mode 100644 index 000000000..d88c68ade --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_commonNaNToF64UI.c @@ -0,0 +1,53 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 64-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr ) +{ + + return + (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FF8000000000000 ) + | aPtr->v64>>12; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_extF80MToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_extF80MToCommonNaN.c new file mode 100644 index 000000000..6bf45cf86 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_extF80MToCommonNaN.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the 80-bit extended floating-point value pointed to by `aSPtr' is +| a NaN, converts this NaN to the common NaN form, and stores the resulting +| common NaN at the location pointed to by `zPtr'. If the NaN is a signaling +| NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80MToCommonNaN( + const struct extFloat80M *aSPtr, struct commonNaN *zPtr ) +{ + + if ( extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = signExtF80UI64( aSPtr->signExp ); + zPtr->v64 = aSPtr->signif<<1; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_extF80UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_extF80UIToCommonNaN.c new file mode 100644 index 000000000..8b8c92780 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_extF80UIToCommonNaN.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0' +| has the bit pattern of an 80-bit extended floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80UIToCommonNaN( + uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA64>>15; + zPtr->v64 = uiA0<<1; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f128MToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f128MToCommonNaN.c new file mode 100644 index 000000000..22152145a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f128MToCommonNaN.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the 128-bit floating-point value pointed to by `aWPtr' is a NaN, +| converts this NaN to the common NaN form, and stores the resulting common +| NaN at the location pointed to by `zPtr'. If the NaN is a signaling NaN, +| the invalid exception is raised. Argument `aWPtr' points to an array of +| four 32-bit elements that concatenate in the platform's normal endian order +| to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr ) +{ + + if ( f128M_isSignalingNaN( (const float128_t *) aWPtr ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = aWPtr[indexWordHi( 4 )]>>31; + softfloat_shortShiftLeft128M( aWPtr, 16, (uint32_t *) &zPtr->v0 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f128UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f128UIToCommonNaN.c new file mode 100644 index 000000000..2510c0707 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f128UIToCommonNaN.c @@ -0,0 +1,65 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0' +| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to +| the common NaN form, and stores the resulting common NaN at the location +| pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid exception +| is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_f128UIToCommonNaN( + uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ) +{ + struct uint128 NaNSig; + + if ( softfloat_isSigNaNF128UI( uiA64, uiA0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + NaNSig = softfloat_shortShiftLeft128( uiA64, uiA0, 16 ); + zPtr->sign = uiA64>>63; + zPtr->v64 = NaNSig.v64; + zPtr->v0 = NaNSig.v0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f16UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f16UIToCommonNaN.c new file mode 100644 index 000000000..4d5003f6a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f16UIToCommonNaN.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming `uiA' has the bit pattern of a 16-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNF16UI( uiA ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA>>15; + zPtr->v64 = (uint_fast64_t) uiA<<54; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f32UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f32UIToCommonNaN.c new file mode 100644 index 000000000..f4734db7a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f32UIToCommonNaN.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming `uiA' has the bit pattern of a 32-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNF32UI( uiA ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA>>31; + zPtr->v64 = (uint_fast64_t) uiA<<41; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f64UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f64UIToCommonNaN.c new file mode 100644 index 000000000..9a481a74f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_f64UIToCommonNaN.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming `uiA' has the bit pattern of a 64-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNF64UI( uiA ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA>>63; + zPtr->v64 = uiA<<12; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNExtF80M.c new file mode 100644 index 000000000..f35e06654 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNExtF80M.c @@ -0,0 +1,107 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 80-bit extended floating-point values +| pointed to by `aSPtr' and `bSPtr' is a NaN, stores the combined NaN result +| at the location pointed to by `zSPtr'. If either original floating-point +| value is a signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr + ) +{ + bool isSigNaNA; + const struct extFloat80M *sPtr; + bool isSigNaNB; + uint_fast16_t uiB64; + uint64_t uiB0; + uint_fast16_t uiA64; + uint64_t uiA0; + uint_fast16_t uiMagA64, uiMagB64; + + isSigNaNA = extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ); + sPtr = aSPtr; + if ( ! bSPtr ) { + if ( isSigNaNA ) softfloat_raiseFlags( softfloat_flag_invalid ); + goto copy; + } + isSigNaNB = extF80M_isSignalingNaN( (const extFloat80_t *) bSPtr ); + if ( isSigNaNA | isSigNaNB ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) { + uiB64 = bSPtr->signExp; + if ( isSigNaNB ) goto returnLargerUIMag; + uiB0 = bSPtr->signif; + if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto copyB; + goto copy; + } else { + uiA64 = aSPtr->signExp; + uiA0 = aSPtr->signif; + if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto copy; + goto copyB; + } + } + uiB64 = bSPtr->signExp; + returnLargerUIMag: + uiA64 = aSPtr->signExp; + uiMagA64 = uiA64 & 0x7FFF; + uiMagB64 = uiB64 & 0x7FFF; + if ( uiMagA64 < uiMagB64 ) goto copyB; + if ( uiMagB64 < uiMagA64 ) goto copy; + uiA0 = aSPtr->signif; + uiB0 = bSPtr->signif; + if ( uiA0 < uiB0 ) goto copyB; + if ( uiB0 < uiA0 ) goto copy; + if ( uiA64 < uiB64 ) goto copy; + copyB: + sPtr = bSPtr; + copy: + zSPtr->signExp = sPtr->signExp; + zSPtr->signif = sPtr->signif | UINT64_C( 0xC000000000000000 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNExtF80UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNExtF80UI.c new file mode 100644 index 000000000..fa2daae2e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNExtF80UI.c @@ -0,0 +1,106 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting +| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 80-bit extended floating-point value, and assuming at least on of these +| floating-point values is a NaN, returns the bit pattern of the combined NaN +| result. If either original floating-point value is a signaling NaN, the +| invalid exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNExtF80UI( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0 + ) +{ + bool isSigNaNA, isSigNaNB; + uint_fast64_t uiNonsigA0, uiNonsigB0; + uint_fast16_t uiMagA64, uiMagB64; + struct uint128 uiZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + isSigNaNA = softfloat_isSigNaNExtF80UI( uiA64, uiA0 ); + isSigNaNB = softfloat_isSigNaNExtF80UI( uiB64, uiB0 ); + /*------------------------------------------------------------------------ + | Make NaNs non-signaling. + *------------------------------------------------------------------------*/ + uiNonsigA0 = uiA0 | UINT64_C( 0xC000000000000000 ); + uiNonsigB0 = uiB0 | UINT64_C( 0xC000000000000000 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isSigNaNA | isSigNaNB ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) { + if ( isSigNaNB ) goto returnLargerMag; + if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto returnB; + goto returnA; + } else { + if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto returnA; + goto returnB; + } + } + returnLargerMag: + uiMagA64 = uiA64 & 0x7FFF; + uiMagB64 = uiB64 & 0x7FFF; + if ( uiMagA64 < uiMagB64 ) goto returnB; + if ( uiMagB64 < uiMagA64 ) goto returnA; + if ( uiA0 < uiB0 ) goto returnB; + if ( uiB0 < uiA0 ) goto returnA; + if ( uiA64 < uiB64 ) goto returnA; + returnB: + uiZ.v64 = uiB64; + uiZ.v0 = uiNonsigB0; + return uiZ; + returnA: + uiZ.v64 = uiA64; + uiZ.v0 = uiNonsigA0; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF128M.c new file mode 100644 index 000000000..7ac2e5f63 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF128M.c @@ -0,0 +1,108 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 128-bit floating-point values pointed to by +| `aWPtr' and `bWPtr' is a NaN, stores the combined NaN result at the location +| pointed to by `zWPtr'. If either original floating-point value is a +| signaling NaN, the invalid exception is raised. Each of `aWPtr', `bWPtr', +| and `zWPtr' points to an array of four 32-bit elements that concatenate in +| the platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNF128M( + const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr ) +{ + bool isSigNaNA; + const uint32_t *ptr; + bool isSigNaNB; + uint32_t uiA96, uiB96, wordMagA, wordMagB; + + isSigNaNA = f128M_isSignalingNaN( (const float128_t *) aWPtr ); + ptr = aWPtr; + if ( ! bWPtr ) { + if ( isSigNaNA ) softfloat_raiseFlags( softfloat_flag_invalid ); + goto copy; + } + isSigNaNB = f128M_isSignalingNaN( (const float128_t *) bWPtr ); + if ( isSigNaNA | isSigNaNB ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) { + if ( isSigNaNB ) goto returnLargerUIMag; + if ( softfloat_isNaNF128M( bWPtr ) ) goto copyB; + goto copy; + } else { + if ( softfloat_isNaNF128M( aWPtr ) ) goto copy; + goto copyB; + } + } + returnLargerUIMag: + uiA96 = aWPtr[indexWordHi( 4 )]; + uiB96 = bWPtr[indexWordHi( 4 )]; + wordMagA = uiA96 & 0x7FFFFFFF; + wordMagB = uiB96 & 0x7FFFFFFF; + if ( wordMagA < wordMagB ) goto copyB; + if ( wordMagB < wordMagA ) goto copy; + wordMagA = aWPtr[indexWord( 4, 2 )]; + wordMagB = bWPtr[indexWord( 4, 2 )]; + if ( wordMagA < wordMagB ) goto copyB; + if ( wordMagB < wordMagA ) goto copy; + wordMagA = aWPtr[indexWord( 4, 1 )]; + wordMagB = bWPtr[indexWord( 4, 1 )]; + if ( wordMagA < wordMagB ) goto copyB; + if ( wordMagB < wordMagA ) goto copy; + wordMagA = aWPtr[indexWord( 4, 0 )]; + wordMagB = bWPtr[indexWord( 4, 0 )]; + if ( wordMagA < wordMagB ) goto copyB; + if ( wordMagB < wordMagA ) goto copy; + if ( uiA96 < uiB96 ) goto copy; + copyB: + ptr = bWPtr; + copy: + zWPtr[indexWordHi( 4 )] = ptr[indexWordHi( 4 )] | 0x00008000; + zWPtr[indexWord( 4, 2 )] = ptr[indexWord( 4, 2 )]; + zWPtr[indexWord( 4, 1 )] = ptr[indexWord( 4, 1 )]; + zWPtr[indexWord( 4, 0 )] = ptr[indexWord( 4, 0 )]; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF128UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF128UI.c new file mode 100644 index 000000000..6caecd205 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF128UI.c @@ -0,0 +1,105 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the +| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 128-bit floating-point value, and assuming at least on of these floating- +| point values is a NaN, returns the bit pattern of the combined NaN result. +| If either original floating-point value is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNF128UI( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0 + ) +{ + bool isSigNaNA, isSigNaNB; + uint_fast64_t uiNonsigA64, uiNonsigB64, uiMagA64, uiMagB64; + struct uint128 uiZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + isSigNaNA = softfloat_isSigNaNF128UI( uiA64, uiA0 ); + isSigNaNB = softfloat_isSigNaNF128UI( uiB64, uiB0 ); + /*------------------------------------------------------------------------ + | Make NaNs non-signaling. + *------------------------------------------------------------------------*/ + uiNonsigA64 = uiA64 | UINT64_C( 0x0000800000000000 ); + uiNonsigB64 = uiB64 | UINT64_C( 0x0000800000000000 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isSigNaNA | isSigNaNB ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) { + if ( isSigNaNB ) goto returnLargerMag; + if ( isNaNF128UI( uiB64, uiB0 ) ) goto returnB; + goto returnA; + } else { + if ( isNaNF128UI( uiA64, uiA0 ) ) goto returnA; + goto returnB; + } + } + returnLargerMag: + uiMagA64 = uiA64 & UINT64_C( 0x7FFFFFFFFFFFFFFF ); + uiMagB64 = uiB64 & UINT64_C( 0x7FFFFFFFFFFFFFFF ); + if ( uiMagA64 < uiMagB64 ) goto returnB; + if ( uiMagB64 < uiMagA64 ) goto returnA; + if ( uiA0 < uiB0 ) goto returnB; + if ( uiB0 < uiA0 ) goto returnA; + if ( uiNonsigA64 < uiNonsigB64 ) goto returnA; + returnB: + uiZ.v64 = uiNonsigB64; + uiZ.v0 = uiB0; + return uiZ; + returnA: + uiZ.v64 = uiNonsigA64; + uiZ.v0 = uiA0; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF16UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF16UI.c new file mode 100644 index 000000000..f9d80d6ac --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF16UI.c @@ -0,0 +1,84 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast16_t + softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB ) +{ + bool isSigNaNA, isSigNaNB; + uint_fast16_t uiNonsigA, uiNonsigB, uiMagA, uiMagB; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + isSigNaNA = softfloat_isSigNaNF16UI( uiA ); + isSigNaNB = softfloat_isSigNaNF16UI( uiB ); + /*------------------------------------------------------------------------ + | Make NaNs non-signaling. + *------------------------------------------------------------------------*/ + uiNonsigA = uiA | 0x0200; + uiNonsigB = uiB | 0x0200; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isSigNaNA | isSigNaNB ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) { + if ( isSigNaNB ) goto returnLargerMag; + return isNaNF16UI( uiB ) ? uiNonsigB : uiNonsigA; + } else { + return isNaNF16UI( uiA ) ? uiNonsigA : uiNonsigB; + } + } + returnLargerMag: + uiMagA = uiA & 0x7FFF; + uiMagB = uiB & 0x7FFF; + if ( uiMagA < uiMagB ) return uiNonsigB; + if ( uiMagB < uiMagA ) return uiNonsigA; + return (uiNonsigA < uiNonsigB) ? uiNonsigA : uiNonsigB; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF32UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF32UI.c new file mode 100644 index 000000000..2350ad7c0 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF32UI.c @@ -0,0 +1,84 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast32_t + softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB ) +{ + bool isSigNaNA, isSigNaNB; + uint_fast32_t uiNonsigA, uiNonsigB, uiMagA, uiMagB; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + isSigNaNA = softfloat_isSigNaNF32UI( uiA ); + isSigNaNB = softfloat_isSigNaNF32UI( uiB ); + /*------------------------------------------------------------------------ + | Make NaNs non-signaling. + *------------------------------------------------------------------------*/ + uiNonsigA = uiA | 0x00400000; + uiNonsigB = uiB | 0x00400000; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isSigNaNA | isSigNaNB ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) { + if ( isSigNaNB ) goto returnLargerMag; + return isNaNF32UI( uiB ) ? uiNonsigB : uiNonsigA; + } else { + return isNaNF32UI( uiA ) ? uiNonsigA : uiNonsigB; + } + } + returnLargerMag: + uiMagA = uiA & 0x7FFFFFFF; + uiMagB = uiB & 0x7FFFFFFF; + if ( uiMagA < uiMagB ) return uiNonsigB; + if ( uiMagB < uiMagA ) return uiNonsigA; + return (uiNonsigA < uiNonsigB) ? uiNonsigA : uiNonsigB; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF64UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF64UI.c new file mode 100644 index 000000000..a4013d489 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/s_propagateNaNF64UI.c @@ -0,0 +1,84 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast64_t + softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB ) +{ + bool isSigNaNA, isSigNaNB; + uint_fast64_t uiNonsigA, uiNonsigB, uiMagA, uiMagB; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + isSigNaNA = softfloat_isSigNaNF64UI( uiA ); + isSigNaNB = softfloat_isSigNaNF64UI( uiB ); + /*------------------------------------------------------------------------ + | Make NaNs non-signaling. + *------------------------------------------------------------------------*/ + uiNonsigA = uiA | UINT64_C( 0x0008000000000000 ); + uiNonsigB = uiB | UINT64_C( 0x0008000000000000 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isSigNaNA | isSigNaNB ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) { + if ( isSigNaNB ) goto returnLargerMag; + return isNaNF64UI( uiB ) ? uiNonsigB : uiNonsigA; + } else { + return isNaNF64UI( uiA ) ? uiNonsigA : uiNonsigB; + } + } + returnLargerMag: + uiMagA = uiA & UINT64_C( 0x7FFFFFFFFFFFFFFF ); + uiMagB = uiB & UINT64_C( 0x7FFFFFFFFFFFFFFF ); + if ( uiMagA < uiMagB ) return uiNonsigB; + if ( uiMagB < uiMagA ) return uiNonsigA; + return (uiNonsigA < uiNonsigB) ? uiNonsigA : uiNonsigB; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/softfloat_raiseFlags.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/softfloat_raiseFlags.c new file mode 100644 index 000000000..7a1aee930 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/softfloat_raiseFlags.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Raises the exceptions specified by `flags'. Floating-point traps can be +| defined here if desired. It is currently not possible for such a trap +| to substitute a result value. If traps are not implemented, this routine +| should be simply `softfloat_exceptionFlags |= flags;'. +*----------------------------------------------------------------------------*/ +void softfloat_raiseFlags( uint_fast8_t flags ) +{ + + softfloat_exceptionFlags |= flags; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/specialize.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/specialize.h new file mode 100644 index 000000000..a9166e170 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/8086/specialize.h @@ -0,0 +1,376 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef specialize_h +#define specialize_h 1 + +#include <stdbool.h> +#include <stdint.h> +#include "primitiveTypes.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Default value for 'softfloat_detectTininess'. +*----------------------------------------------------------------------------*/ +#define init_detectTininess softfloat_tininess_afterRounding + +/*---------------------------------------------------------------------------- +| The values to return on conversions to 32-bit integer formats that raise an +| invalid exception. +*----------------------------------------------------------------------------*/ +#define ui32_fromPosOverflow 0xFFFFFFFF +#define ui32_fromNegOverflow 0xFFFFFFFF +#define ui32_fromNaN 0xFFFFFFFF +#define i32_fromPosOverflow (-0x7FFFFFFF - 1) +#define i32_fromNegOverflow (-0x7FFFFFFF - 1) +#define i32_fromNaN (-0x7FFFFFFF - 1) + +/*---------------------------------------------------------------------------- +| The values to return on conversions to 64-bit integer formats that raise an +| invalid exception. +*----------------------------------------------------------------------------*/ +#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF ) +#define ui64_fromNegOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF ) +#define ui64_fromNaN UINT64_C( 0xFFFFFFFFFFFFFFFF ) +#define i64_fromPosOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) +#define i64_fromNegOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) +#define i64_fromNaN (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) + +/*---------------------------------------------------------------------------- +| "Common NaN" structure, used to transfer NaN representations from one format +| to another. +*----------------------------------------------------------------------------*/ +struct commonNaN { + bool sign; +#ifdef LITTLEENDIAN + uint64_t v0, v64; +#else + uint64_t v64, v0; +#endif +}; + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 16-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF16UI 0xFE00 + +/*---------------------------------------------------------------------------- +| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a +| 16-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF)) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast16_t + softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 32-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF32UI 0xFFC00000 + +/*---------------------------------------------------------------------------- +| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a +| 32-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF)) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast32_t + softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 64-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF64UI UINT64_C( 0xFFF8000000000000 ) + +/*---------------------------------------------------------------------------- +| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a +| 64-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF ))) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast64_t + softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 80-bit extended floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNExtF80UI64 0xFFFF +#define defaultNaNExtF80UI0 UINT64_C( 0xC000000000000000 ) + +/*---------------------------------------------------------------------------- +| Returns true when the 80-bit unsigned integer formed from concatenating +| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended +| floating-point signaling NaN. +| Note: This macro evaluates its arguments more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF ))) + +#ifdef SOFTFLOAT_FAST_INT64 + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is +| defined. +*----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of an 80-bit extended floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80UIToCommonNaN( + uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and returns the bit pattern of this value as an unsigned +| integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting +| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 80-bit extended floating-point value, and assuming at least on of these +| floating-point values is a NaN, returns the bit pattern of the combined NaN +| result. If either original floating-point value is a signaling NaN, the +| invalid exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNExtF80UI( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0 + ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 128-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF128UI64 UINT64_C( 0xFFFF800000000000 ) +#define defaultNaNF128UI0 UINT64_C( 0 ) + +/*---------------------------------------------------------------------------- +| Returns true when the 128-bit unsigned integer formed from concatenating +| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating- +| point signaling NaN. +| Note: This macro evaluates its arguments more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF )))) + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to +| the common NaN form, and stores the resulting common NaN at the location +| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception +| is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_f128UIToCommonNaN( + uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * ); + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the +| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 128-bit floating-point value, and assuming at least on of these floating- +| point values is a NaN, returns the bit pattern of the combined NaN result. +| If either original floating-point value is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNF128UI( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0 + ); + +#else + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not +| defined. +*----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- +| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is +| a NaN, converts this NaN to the common NaN form, and stores the resulting +| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling +| NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80MToCommonNaN( + const struct extFloat80M *aSPtr, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and stores this NaN at the location pointed to by +| 'zSPtr'. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ); + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 80-bit extended floating-point values +| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result +| at the location pointed to by 'zSPtr'. If either original floating-point +| value is a signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr + ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 128-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF128UI96 0xFFFF8000 +#define defaultNaNF128UI64 0 +#define defaultNaNF128UI32 0 +#define defaultNaNF128UI0 0 + +/*---------------------------------------------------------------------------- +| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN, +| converts this NaN to the common NaN form, and stores the resulting common +| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN, +| the invalid exception is raised. Argument 'aWPtr' points to an array of +| four 32-bit elements that concatenate in the platform's normal endian order +| to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument +| 'zWPtr' points to an array of four 32-bit elements that concatenate in the +| platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ); + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 128-bit floating-point values pointed to by +| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location +| pointed to by 'zWPtr'. If either original floating-point value is a +| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr', +| and 'zWPtr' points to an array of four 32-bit elements that concatenate in +| the platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNF128M( + const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr ); + +#endif + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/extF80M_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/extF80M_isSignalingNaN.c new file mode 100644 index 000000000..c2cca65c9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/extF80M_isSignalingNaN.c @@ -0,0 +1,57 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +bool extF80M_isSignalingNaN( const extFloat80_t *aPtr ) +{ + const struct extFloat80M *aSPtr; + uint64_t uiA0; + + aSPtr = (const struct extFloat80M *) aPtr; + if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false; + uiA0 = aSPtr->signif; + return + ! (uiA0 & UINT64_C( 0x4000000000000000 )) + && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/f128M_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/f128M_isSignalingNaN.c new file mode 100644 index 000000000..9ff83d726 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/f128M_isSignalingNaN.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +bool f128M_isSignalingNaN( const float128_t *aPtr ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false; + return + ((uiA96 & 0x00007FFF) != 0) + || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )]) + != 0); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80M.c new file mode 100644 index 000000000..2e6bf7c75 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80M.c @@ -0,0 +1,57 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "softfloat_types.h" + +#define softfloat_commonNaNToExtF80M softfloat_commonNaNToExtF80M +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and stores this NaN at the location pointed to by +| 'zSPtr'. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ) +{ + + zSPtr->signExp = defaultNaNExtF80UI64; + zSPtr->signif = defaultNaNExtF80UI0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80UI.c new file mode 100644 index 000000000..e37004f7f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80UI.c @@ -0,0 +1,57 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "primitiveTypes.h" + +#define softfloat_commonNaNToExtF80UI softfloat_commonNaNToExtF80UI +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and returns the bit pattern of this value as an unsigned +| integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + + uiZ.v64 = defaultNaNExtF80UI64; + uiZ.v0 = defaultNaNExtF80UI0; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128M.c new file mode 100644 index 000000000..2ff4c1631 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128M.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#define softfloat_commonNaNToF128M softfloat_commonNaNToF128M +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument +| 'zWPtr' points to an array of four 32-bit elements that concatenate in the +| platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ) +{ + + zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96; + zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64; + zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32; + zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128UI.c new file mode 100644 index 000000000..05dfb5f14 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128UI.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "primitiveTypes.h" + +#define softfloat_commonNaNToF128UI softfloat_commonNaNToF128UI +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF16UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF16UI.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF16UI.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF32UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF32UI.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF32UI.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF64UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF64UI.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_commonNaNToF64UI.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_extF80MToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_extF80MToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_extF80MToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_extF80UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_extF80UIToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_extF80UIToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f128MToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f128MToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f128MToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f128UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f128UIToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f128UIToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f16UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f16UIToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f16UIToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f32UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f32UIToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f32UIToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f64UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f64UIToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_f64UIToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80M.c new file mode 100644 index 000000000..827ed5e3a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80M.c @@ -0,0 +1,74 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 80-bit extended floating-point values +| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result +| at the location pointed to by 'zSPtr'. If either original floating-point +| value is a signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr + ) +{ + uint_fast16_t ui64; + uint_fast64_t ui0; + + ui64 = aSPtr->signExp; + ui0 = aSPtr->signif; + if ( + softfloat_isSigNaNExtF80UI( ui64, ui0 ) + || (bSPtr + && (ui64 = bSPtr->signExp, + ui0 = bSPtr->signif, + softfloat_isSigNaNExtF80UI( ui64, ui0 ))) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zSPtr->signExp = defaultNaNExtF80UI64; + zSPtr->signif = defaultNaNExtF80UI0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80UI.c new file mode 100644 index 000000000..e2ddd937e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80UI.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting +| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 80-bit extended floating-point value, and assuming at least on of these +| floating-point values is a NaN, returns the bit pattern of the combined NaN +| result. If either original floating-point value is a signaling NaN, the +| invalid exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNExtF80UI( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0 + ) +{ + struct uint128 uiZ; + + if ( + softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) + || softfloat_isSigNaNExtF80UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + uiZ.v64 = defaultNaNExtF80UI64; + uiZ.v0 = defaultNaNExtF80UI0; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128M.c new file mode 100644 index 000000000..b876ae1f1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128M.c @@ -0,0 +1,68 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 128-bit floating-point values pointed to by +| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location +| pointed to by 'zWPtr'. If either original floating-point value is a +| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr', +| and 'zWPtr' points to an array of four 32-bit elements that concatenate in +| the platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNF128M( + const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr ) +{ + + if ( + f128M_isSignalingNaN( (const float128_t *) aWPtr ); + || (bWPtr && f128M_isSignalingNaN( (const float128_t *) bWPtr )) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96; + zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64; + zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32; + zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128UI.c new file mode 100644 index 000000000..31b788e0c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128UI.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the +| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 128-bit floating-point value, and assuming at least on of these floating- +| point values is a NaN, returns the bit pattern of the combined NaN result. +| If either original floating-point value is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNF128UI( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0 + ) +{ + struct uint128 uiZ; + + if ( + softfloat_isSigNaNF128UI( uiA64, uiA0 ) + || softfloat_isSigNaNF128UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF16UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF16UI.c new file mode 100644 index 000000000..17618fc2e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF16UI.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast16_t + softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB ) +{ + + if ( softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return defaultNaNF16UI; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF32UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF32UI.c new file mode 100644 index 000000000..e4c3fc1a8 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF32UI.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast32_t + softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB ) +{ + + if ( softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return defaultNaNF32UI; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF64UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF64UI.c new file mode 100644 index 000000000..75361b8e2 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/s_propagateNaNF64UI.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast64_t + softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB ) +{ + + if ( softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return defaultNaNF64UI; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/softfloat_raiseFlags.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/softfloat_raiseFlags.c new file mode 100644 index 000000000..f8f106570 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/softfloat_raiseFlags.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Raises the exceptions specified by 'flags'. Floating-point traps can be +| defined here if desired. It is currently not possible for such a trap +| to substitute a result value. If traps are not implemented, this routine +| should be simply 'softfloat_exceptionFlags |= flags;'. +*----------------------------------------------------------------------------*/ +void softfloat_raiseFlags( uint_fast8_t flags ) +{ + + softfloat_exceptionFlags |= flags; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/specialize.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/specialize.h new file mode 100644 index 000000000..e4ea15d14 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2-defaultNaN/specialize.h @@ -0,0 +1,407 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef specialize_h +#define specialize_h 1 + +#include <stdbool.h> +#include <stdint.h> +#include "primitiveTypes.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Default value for 'softfloat_detectTininess'. +*----------------------------------------------------------------------------*/ +#define init_detectTininess softfloat_tininess_beforeRounding + +/*---------------------------------------------------------------------------- +| The values to return on conversions to 32-bit integer formats that raise an +| invalid exception. +*----------------------------------------------------------------------------*/ +#define ui32_fromPosOverflow 0xFFFFFFFF +#define ui32_fromNegOverflow 0 +#define ui32_fromNaN 0 +#define i32_fromPosOverflow 0x7FFFFFFF +#define i32_fromNegOverflow (-0x7FFFFFFF - 1) +#define i32_fromNaN 0 + +/*---------------------------------------------------------------------------- +| The values to return on conversions to 64-bit integer formats that raise an +| invalid exception. +*----------------------------------------------------------------------------*/ +#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF ) +#define ui64_fromNegOverflow 0 +#define ui64_fromNaN 0 +#define i64_fromPosOverflow INT64_C( 0x7FFFFFFFFFFFFFFF ) +#define i64_fromNegOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) +#define i64_fromNaN 0 + +/*---------------------------------------------------------------------------- +| "Common NaN" structure, used to transfer NaN representations from one format +| to another. +*----------------------------------------------------------------------------*/ +struct commonNaN { char _unused; }; + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 16-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF16UI 0x7E00 + +/*---------------------------------------------------------------------------- +| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a +| 16-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF)) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_f16UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x0200) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +#define softfloat_commonNaNToF16UI( aPtr ) ((uint_fast16_t) defaultNaNF16UI) + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast16_t + softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 32-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF32UI 0x7FC00000 + +/*---------------------------------------------------------------------------- +| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a +| 32-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF)) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_f32UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x00400000) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +#define softfloat_commonNaNToF32UI( aPtr ) ((uint_fast32_t) defaultNaNF32UI) + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast32_t + softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 64-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF64UI UINT64_C( 0x7FF8000000000000 ) + +/*---------------------------------------------------------------------------- +| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a +| 64-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF ))) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_f64UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & UINT64_C( 0x0008000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +#define softfloat_commonNaNToF64UI( aPtr ) ((uint_fast64_t) defaultNaNF64UI) + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast64_t + softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 80-bit extended floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNExtF80UI64 0x7FFF +#define defaultNaNExtF80UI0 UINT64_C( 0xC000000000000000 ) + +/*---------------------------------------------------------------------------- +| Returns true when the 80-bit unsigned integer formed from concatenating +| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended +| floating-point signaling NaN. +| Note: This macro evaluates its arguments more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF ))) + +#ifdef SOFTFLOAT_FAST_INT64 + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is +| defined. +*----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of an 80-bit extended floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_extF80UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA0) & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and returns the bit pattern of this value as an unsigned +| integer. +*----------------------------------------------------------------------------*/ +#if defined INLINE && ! defined softfloat_commonNaNToExtF80UI +INLINE +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + uiZ.v64 = defaultNaNExtF80UI64; + uiZ.v0 = defaultNaNExtF80UI0; + return uiZ; +} +#else +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ); +#endif + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting +| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 80-bit extended floating-point value, and assuming at least on of these +| floating-point values is a NaN, returns the bit pattern of the combined NaN +| result. If either original floating-point value is a signaling NaN, the +| invalid exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNExtF80UI( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0 + ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 128-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF128UI64 UINT64_C( 0x7FFF800000000000 ) +#define defaultNaNF128UI0 UINT64_C( 0 ) + +/*---------------------------------------------------------------------------- +| Returns true when the 128-bit unsigned integer formed from concatenating +| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating- +| point signaling NaN. +| Note: This macro evaluates its arguments more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF )))) + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to +| the common NaN form, and stores the resulting common NaN at the location +| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception +| is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_f128UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA64) & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +#if defined INLINE && ! defined softfloat_commonNaNToF128UI +INLINE +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + return uiZ; +} +#else +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * ); +#endif + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the +| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 128-bit floating-point value, and assuming at least on of these floating- +| point values is a NaN, returns the bit pattern of the combined NaN result. +| If either original floating-point value is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNF128UI( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0 + ); + +#else + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not +| defined. +*----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- +| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is +| a NaN, converts this NaN to the common NaN form, and stores the resulting +| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling +| NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_extF80MToCommonNaN( aSPtr, zPtr ) if ( ! ((aSPtr)->signif & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and stores this NaN at the location pointed to by +| 'zSPtr'. +*----------------------------------------------------------------------------*/ +#if defined INLINE && ! defined softfloat_commonNaNToExtF80M +INLINE +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ) +{ + zSPtr->signExp = defaultNaNExtF80UI64; + zSPtr->signif = defaultNaNExtF80UI0; +} +#else +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ); +#endif + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 80-bit extended floating-point values +| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result +| at the location pointed to by 'zSPtr'. If either original floating-point +| value is a signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr + ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 128-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF128UI96 0x7FFF8000 +#define defaultNaNF128UI64 0 +#define defaultNaNF128UI32 0 +#define defaultNaNF128UI0 0 + +/*---------------------------------------------------------------------------- +| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN, +| converts this NaN to the common NaN form, and stores the resulting common +| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN, +| the invalid exception is raised. Argument 'aWPtr' points to an array of +| four 32-bit elements that concatenate in the platform's normal endian order +| to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +#define softfloat_f128MToCommonNaN( aWPtr, zPtr ) if ( ! ((aWPtr)[indexWordHi( 4 )] & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument +| 'zWPtr' points to an array of four 32-bit elements that concatenate in the +| platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +#if defined INLINE && ! defined softfloat_commonNaNToF128M +INLINE +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ) +{ + zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96; + zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64; + zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32; + zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0; +} +#else +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ); +#endif + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 128-bit floating-point values pointed to by +| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location +| pointed to by 'zWPtr'. If either original floating-point value is a +| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr', +| and 'zWPtr' points to an array of four 32-bit elements that concatenate in +| the platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNF128M( + const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr ); + +#endif + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/extF80M_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/extF80M_isSignalingNaN.c new file mode 100644 index 000000000..c2cca65c9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/extF80M_isSignalingNaN.c @@ -0,0 +1,57 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +bool extF80M_isSignalingNaN( const extFloat80_t *aPtr ) +{ + const struct extFloat80M *aSPtr; + uint64_t uiA0; + + aSPtr = (const struct extFloat80M *) aPtr; + if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false; + uiA0 = aSPtr->signif; + return + ! (uiA0 & UINT64_C( 0x4000000000000000 )) + && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/f128M_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/f128M_isSignalingNaN.c new file mode 100644 index 000000000..9ff83d726 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/f128M_isSignalingNaN.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +bool f128M_isSignalingNaN( const float128_t *aPtr ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false; + return + ((uiA96 & 0x00007FFF) != 0) + || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )]) + != 0); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToExtF80M.c new file mode 100644 index 000000000..6bb922a1d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToExtF80M.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and stores this NaN at the location pointed to by +| 'zSPtr'. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ) +{ + + zSPtr->signExp = packToExtF80UI64( aPtr->sign, 0x7FFF ); + zSPtr->signif = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToExtF80UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToExtF80UI.c new file mode 100644 index 000000000..5e841b253 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToExtF80UI.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and returns the bit pattern of this value as an unsigned +| integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + + uiZ.v64 = (uint_fast16_t) aPtr->sign<<15 | 0x7FFF; + uiZ.v0 = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF128M.c new file mode 100644 index 000000000..02e234853 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF128M.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument +| 'zWPtr' points to an array of four 32-bit elements that concatenate in the +| platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ) +{ + + softfloat_shortShiftRight128M( (const uint32_t *) &aPtr->v0, 16, zWPtr ); + zWPtr[indexWordHi( 4 )] |= (uint32_t) aPtr->sign<<31 | 0x7FFF8000; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF128UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF128UI.c new file mode 100644 index 000000000..fa87d75fa --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF128UI.c @@ -0,0 +1,55 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + + uiZ = softfloat_shortShiftRight128( aPtr->v64, aPtr->v0, 16 ); + uiZ.v64 |= (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FFF800000000000 ); + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF16UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF16UI.c new file mode 100644 index 000000000..6d5bf9ab3 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF16UI.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr ) +{ + + return (uint_fast16_t) aPtr->sign<<15 | 0x7E00 | aPtr->v64>>54; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF32UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF32UI.c new file mode 100644 index 000000000..e45d63b3b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF32UI.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr ) +{ + + return (uint_fast32_t) aPtr->sign<<31 | 0x7FC00000 | aPtr->v64>>41; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF64UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF64UI.c new file mode 100644 index 000000000..bfde88bbc --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_commonNaNToF64UI.c @@ -0,0 +1,53 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr ) +{ + + return + (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FF8000000000000 ) + | aPtr->v64>>12; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_extF80MToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_extF80MToCommonNaN.c new file mode 100644 index 000000000..5fd54dbbd --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_extF80MToCommonNaN.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is +| a NaN, converts this NaN to the common NaN form, and stores the resulting +| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling +| NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80MToCommonNaN( + const struct extFloat80M *aSPtr, struct commonNaN *zPtr ) +{ + + if ( extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = signExtF80UI64( aSPtr->signExp ); + zPtr->v64 = aSPtr->signif<<1; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_extF80UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_extF80UIToCommonNaN.c new file mode 100644 index 000000000..9c0f0ca08 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_extF80UIToCommonNaN.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of an 80-bit extended floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80UIToCommonNaN( + uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA64>>15; + zPtr->v64 = uiA0<<1; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f128MToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f128MToCommonNaN.c new file mode 100644 index 000000000..e54756b10 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f128MToCommonNaN.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN, +| converts this NaN to the common NaN form, and stores the resulting common +| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN, +| the invalid exception is raised. Argument 'aWPtr' points to an array of +| four 32-bit elements that concatenate in the platform's normal endian order +| to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr ) +{ + + if ( f128M_isSignalingNaN( (const float128_t *) aWPtr ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = aWPtr[indexWordHi( 4 )]>>31; + softfloat_shortShiftLeft128M( aWPtr, 16, (uint32_t *) &zPtr->v0 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f128UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f128UIToCommonNaN.c new file mode 100644 index 000000000..27952a775 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f128UIToCommonNaN.c @@ -0,0 +1,65 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to +| the common NaN form, and stores the resulting common NaN at the location +| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception +| is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_f128UIToCommonNaN( + uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ) +{ + struct uint128 NaNSig; + + if ( softfloat_isSigNaNF128UI( uiA64, uiA0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + NaNSig = softfloat_shortShiftLeft128( uiA64, uiA0, 16 ); + zPtr->sign = uiA64>>63; + zPtr->v64 = NaNSig.v64; + zPtr->v0 = NaNSig.v0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f16UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f16UIToCommonNaN.c new file mode 100644 index 000000000..ee1928eb3 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f16UIToCommonNaN.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNF16UI( uiA ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA>>15; + zPtr->v64 = (uint_fast64_t) uiA<<54; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f32UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f32UIToCommonNaN.c new file mode 100644 index 000000000..249e47825 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f32UIToCommonNaN.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNF32UI( uiA ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA>>31; + zPtr->v64 = (uint_fast64_t) uiA<<41; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f64UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f64UIToCommonNaN.c new file mode 100644 index 000000000..adca2d047 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_f64UIToCommonNaN.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNF64UI( uiA ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA>>63; + zPtr->v64 = uiA<<12; + zPtr->v0 = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNExtF80M.c new file mode 100644 index 000000000..1c142562e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNExtF80M.c @@ -0,0 +1,86 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 80-bit extended floating-point values +| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result +| at the location pointed to by 'zSPtr'. If either original floating-point +| value is a signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr + ) +{ + const struct extFloat80M *sPtr; + bool isSigNaNA; + uint_fast16_t uiZ64; + uint_fast64_t uiZ0; + + sPtr = aSPtr; + isSigNaNA = extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ); + if ( + isSigNaNA + || (bSPtr + && extF80M_isSignalingNaN( (const extFloat80_t *) bSPtr )) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) goto copyNonsig; + goto copyNonsigB; + } + uiZ64 = sPtr->signExp; + uiZ0 = sPtr->signif; + if ( isNaNExtF80UI( uiZ64, uiZ0 ) ) goto returnNonsig; + copyNonsigB: + sPtr = bSPtr; + copyNonsig: + uiZ64 = sPtr->signExp; + uiZ0 = sPtr->signif; + returnNonsig: + zSPtr->signExp = uiZ64; + zSPtr->signif = uiZ0 | UINT64_C( 0xC000000000000000 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNExtF80UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNExtF80UI.c new file mode 100644 index 000000000..be95414ac --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNExtF80UI.c @@ -0,0 +1,83 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting +| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 80-bit extended floating-point value, and assuming at least on of these +| floating-point values is a NaN, returns the bit pattern of the combined NaN +| result. If either original floating-point value is a signaling NaN, the +| invalid exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNExtF80UI( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0 + ) +{ + bool isSigNaNA; + struct uint128 uiZ; + + isSigNaNA = softfloat_isSigNaNExtF80UI( uiA64, uiA0 ); + if ( isSigNaNA || softfloat_isSigNaNExtF80UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) goto returnNonsigA; + goto returnNonsigB; + } + if ( isNaNExtF80UI( uiA64, uiA0 ) ) { + returnNonsigA: + uiZ.v64 = uiA64; + uiZ.v0 = uiA0; + } else { + returnNonsigB: + uiZ.v64 = uiB64; + uiZ.v0 = uiB0; + } + uiZ.v0 | UINT64_C( 0xC000000000000000 ); + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF128M.c new file mode 100644 index 000000000..6a30052cb --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF128M.c @@ -0,0 +1,77 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 128-bit floating-point values pointed to by +| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location +| pointed to by 'zWPtr'. If either original floating-point value is a +| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr', +| and 'zWPtr' points to an array of four 32-bit elements that concatenate in +| the platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNF128M( + const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr ) +{ + const uint32_t *ptr; + bool isSigNaNA; + + ptr = aWPtr; + isSigNaNA = f128M_isSignalingNaN( (const float128_t *) aWPtr ); + if ( + isSigNaNA + || (bWPtr && f128M_isSignalingNaN( (const float128_t *) bWPtr )) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( ! isSigNaNA ) ptr = bWPtr; + goto copyNonsig; + } + if ( ! softfloat_isNaNF128M( aWPtr ) ) ptr = bWPtr; + copyNonsig: + zWPtr[indexWordHi( 4 )] = ptr[indexWordHi( 4 )] | 0x00008000; + zWPtr[indexWord( 4, 2 )] = ptr[indexWord( 4, 2 )]; + zWPtr[indexWord( 4, 1 )] = ptr[indexWord( 4, 1 )]; + zWPtr[indexWord( 4, 0 )] = ptr[indexWord( 4, 0 )]; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF128UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF128UI.c new file mode 100644 index 000000000..5aece622e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF128UI.c @@ -0,0 +1,83 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the +| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 128-bit floating-point value, and assuming at least on of these floating- +| point values is a NaN, returns the bit pattern of the combined NaN result. +| If either original floating-point value is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNF128UI( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0 + ) +{ + bool isSigNaNA; + struct uint128 uiZ; + + isSigNaNA = softfloat_isSigNaNF128UI( uiA64, uiA0 ); + if ( isSigNaNA || softfloat_isSigNaNF128UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + if ( isSigNaNA ) goto returnNonsigA; + goto returnNonsigB; + } + if ( isNaNF128UI( uiA64, uiA0 ) ) { + returnNonsigA: + uiZ.v64 = uiA64; + uiZ.v0 = uiA0; + } else { + returnNonsigB: + uiZ.v64 = uiB64; + uiZ.v0 = uiB0; + } + uiZ.v64 |= UINT64_C( 0x0000800000000000 ); + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF16UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF16UI.c new file mode 100644 index 000000000..880146033 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF16UI.c @@ -0,0 +1,63 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast16_t + softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB ) +{ + bool isSigNaNA; + + isSigNaNA = softfloat_isSigNaNF16UI( uiA ); + if ( isSigNaNA || softfloat_isSigNaNF16UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return (isSigNaNA ? uiA : uiB) | 0x0200; + } + return isNaNF16UI( uiA ) ? uiA : uiB; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF32UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF32UI.c new file mode 100644 index 000000000..31b289e9d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF32UI.c @@ -0,0 +1,63 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast32_t + softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB ) +{ + bool isSigNaNA; + + isSigNaNA = softfloat_isSigNaNF32UI( uiA ); + if ( isSigNaNA || softfloat_isSigNaNF32UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return (isSigNaNA ? uiA : uiB) | 0x00400000; + } + return isNaNF32UI( uiA ) ? uiA : uiB; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF64UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF64UI.c new file mode 100644 index 000000000..224049ab1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/s_propagateNaNF64UI.c @@ -0,0 +1,63 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast64_t + softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB ) +{ + bool isSigNaNA; + + isSigNaNA = softfloat_isSigNaNF64UI( uiA ); + if ( isSigNaNA || softfloat_isSigNaNF64UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return (isSigNaNA ? uiA : uiB) | UINT64_C( 0x0008000000000000 ); + } + return isNaNF64UI( uiA ) ? uiA : uiB; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/softfloat_raiseFlags.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/softfloat_raiseFlags.c new file mode 100644 index 000000000..f8f106570 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/softfloat_raiseFlags.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Raises the exceptions specified by 'flags'. Floating-point traps can be +| defined here if desired. It is currently not possible for such a trap +| to substitute a result value. If traps are not implemented, this routine +| should be simply 'softfloat_exceptionFlags |= flags;'. +*----------------------------------------------------------------------------*/ +void softfloat_raiseFlags( uint_fast8_t flags ) +{ + + softfloat_exceptionFlags |= flags; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/specialize.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/specialize.h new file mode 100644 index 000000000..10b0b357f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ARM-VFPv2/specialize.h @@ -0,0 +1,376 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef specialize_h +#define specialize_h 1 + +#include <stdbool.h> +#include <stdint.h> +#include "primitiveTypes.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Default value for 'softfloat_detectTininess'. +*----------------------------------------------------------------------------*/ +#define init_detectTininess softfloat_tininess_beforeRounding + +/*---------------------------------------------------------------------------- +| The values to return on conversions to 32-bit integer formats that raise an +| invalid exception. +*----------------------------------------------------------------------------*/ +#define ui32_fromPosOverflow 0xFFFFFFFF +#define ui32_fromNegOverflow 0 +#define ui32_fromNaN 0 +#define i32_fromPosOverflow 0x7FFFFFFF +#define i32_fromNegOverflow (-0x7FFFFFFF - 1) +#define i32_fromNaN 0 + +/*---------------------------------------------------------------------------- +| The values to return on conversions to 64-bit integer formats that raise an +| invalid exception. +*----------------------------------------------------------------------------*/ +#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF ) +#define ui64_fromNegOverflow 0 +#define ui64_fromNaN 0 +#define i64_fromPosOverflow INT64_C( 0x7FFFFFFFFFFFFFFF ) +#define i64_fromNegOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) +#define i64_fromNaN 0 + +/*---------------------------------------------------------------------------- +| "Common NaN" structure, used to transfer NaN representations from one format +| to another. +*----------------------------------------------------------------------------*/ +struct commonNaN { + bool sign; +#ifdef LITTLEENDIAN + uint64_t v0, v64; +#else + uint64_t v64, v0; +#endif +}; + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 16-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF16UI 0x7E00 + +/*---------------------------------------------------------------------------- +| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a +| 16-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF)) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast16_t + softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 32-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF32UI 0x7FC00000 + +/*---------------------------------------------------------------------------- +| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a +| 32-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF)) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast32_t + softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 64-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF64UI UINT64_C( 0x7FF8000000000000 ) + +/*---------------------------------------------------------------------------- +| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a +| 64-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF ))) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast64_t + softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 80-bit extended floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNExtF80UI64 0x7FFF +#define defaultNaNExtF80UI0 UINT64_C( 0xC000000000000000 ) + +/*---------------------------------------------------------------------------- +| Returns true when the 80-bit unsigned integer formed from concatenating +| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended +| floating-point signaling NaN. +| Note: This macro evaluates its arguments more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF ))) + +#ifdef SOFTFLOAT_FAST_INT64 + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is +| defined. +*----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of an 80-bit extended floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80UIToCommonNaN( + uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and returns the bit pattern of this value as an unsigned +| integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ); + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting +| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 80-bit extended floating-point value, and assuming at least on of these +| floating-point values is a NaN, returns the bit pattern of the combined NaN +| result. If either original floating-point value is a signaling NaN, the +| invalid exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNExtF80UI( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0 + ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 128-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF128UI64 UINT64_C( 0x7FFF800000000000 ) +#define defaultNaNF128UI0 UINT64_C( 0 ) + +/*---------------------------------------------------------------------------- +| Returns true when the 128-bit unsigned integer formed from concatenating +| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating- +| point signaling NaN. +| Note: This macro evaluates its arguments more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF )))) + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to +| the common NaN form, and stores the resulting common NaN at the location +| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception +| is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_f128UIToCommonNaN( + uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * ); + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the +| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 128-bit floating-point value, and assuming at least on of these floating- +| point values is a NaN, returns the bit pattern of the combined NaN result. +| If either original floating-point value is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNF128UI( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0 + ); + +#else + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not +| defined. +*----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- +| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is +| a NaN, converts this NaN to the common NaN form, and stores the resulting +| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling +| NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_extF80MToCommonNaN( + const struct extFloat80M *aSPtr, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and stores this NaN at the location pointed to by +| 'zSPtr'. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ); + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 80-bit extended floating-point values +| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result +| at the location pointed to by 'zSPtr'. If either original floating-point +| value is a signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr + ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 128-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF128UI96 0x7FFF8000 +#define defaultNaNF128UI64 0 +#define defaultNaNF128UI32 0 +#define defaultNaNF128UI0 0 + +/*---------------------------------------------------------------------------- +| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN, +| converts this NaN to the common NaN form, and stores the resulting common +| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN, +| the invalid exception is raised. Argument 'aWPtr' points to an array of +| four 32-bit elements that concatenate in the platform's normal endian order +| to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr ); + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument +| 'zWPtr' points to an array of four 32-bit elements that concatenate in the +| platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ); + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 128-bit floating-point values pointed to by +| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location +| pointed to by 'zWPtr'. If either original floating-point value is a +| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr', +| and 'zWPtr' points to an array of four 32-bit elements that concatenate in +| the platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNF128M( + const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr ); + +#endif + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/extF80M_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/extF80M_isSignalingNaN.c new file mode 100644 index 000000000..c2cca65c9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/extF80M_isSignalingNaN.c @@ -0,0 +1,57 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +bool extF80M_isSignalingNaN( const extFloat80_t *aPtr ) +{ + const struct extFloat80M *aSPtr; + uint64_t uiA0; + + aSPtr = (const struct extFloat80M *) aPtr; + if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false; + uiA0 = aSPtr->signif; + return + ! (uiA0 & UINT64_C( 0x4000000000000000 )) + && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/f128M_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/f128M_isSignalingNaN.c new file mode 100644 index 000000000..9ff83d726 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/f128M_isSignalingNaN.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +bool f128M_isSignalingNaN( const float128_t *aPtr ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false; + return + ((uiA96 & 0x00007FFF) != 0) + || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )]) + != 0); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToExtF80M.c new file mode 100644 index 000000000..6d1e67e5f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToExtF80M.c @@ -0,0 +1,57 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "softfloat_types.h" + +#define softfloat_commonNaNToExtF80M softfloat_commonNaNToExtF80M +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into an 80-bit extended +| floating-point NaN, and stores this NaN at the location pointed to by +| `zSPtr'. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ) +{ + + zSPtr->signExp = defaultNaNExtF80UI64; + zSPtr->signif = defaultNaNExtF80UI0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToExtF80UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToExtF80UI.c new file mode 100644 index 000000000..953b97a78 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToExtF80UI.c @@ -0,0 +1,57 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "primitiveTypes.h" + +#define softfloat_commonNaNToExtF80UI softfloat_commonNaNToExtF80UI +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into an 80-bit extended +| floating-point NaN, and returns the bit pattern of this value as an unsigned +| integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + + uiZ.v64 = defaultNaNExtF80UI64; + uiZ.v0 = defaultNaNExtF80UI0; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF128M.c new file mode 100644 index 000000000..d91b62e17 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF128M.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#define softfloat_commonNaNToF128M softfloat_commonNaNToF128M +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point +| NaN, and stores this NaN at the location pointed to by `zWPtr'. Argument +| `zWPtr' points to an array of four 32-bit elements that concatenate in the +| platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ) +{ + + zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96; + zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64; + zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32; + zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF128UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF128UI.c new file mode 100644 index 000000000..b4c578dc7 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF128UI.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "primitiveTypes.h" + +#define softfloat_commonNaNToF128UI softfloat_commonNaNToF128UI +#include "specialize.h" + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF16UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF16UI.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF16UI.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF32UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF32UI.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF32UI.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF64UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF64UI.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_commonNaNToF64UI.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_extF80MToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_extF80MToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_extF80MToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_extF80UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_extF80UIToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_extF80UIToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f128MToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f128MToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f128MToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f128UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f128UIToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f128UIToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f16UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f16UIToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f16UIToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f32UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f32UIToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f32UIToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f64UIToCommonNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f64UIToCommonNaN.c new file mode 100644 index 000000000..861b26965 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_f64UIToCommonNaN.c @@ -0,0 +1,5 @@ + +/*---------------------------------------------------------------------------- +| This file intentionally contains no code. +*----------------------------------------------------------------------------*/ + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNExtF80M.c new file mode 100644 index 000000000..8adc62e9b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNExtF80M.c @@ -0,0 +1,74 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 80-bit extended floating-point values +| pointed to by `aSPtr' and `bSPtr' is a NaN, stores the combined NaN result +| at the location pointed to by `zSPtr'. If either original floating-point +| value is a signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr + ) +{ + uint_fast16_t ui64; + uint_fast64_t ui0; + + ui64 = aSPtr->signExp; + ui0 = aSPtr->signif; + if ( + softfloat_isSigNaNExtF80UI( ui64, ui0 ) + || (bSPtr + && (ui64 = bSPtr->signExp, + ui0 = bSPtr->signif, + softfloat_isSigNaNExtF80UI( ui64, ui0 ))) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zSPtr->signExp = defaultNaNExtF80UI64; + zSPtr->signif = defaultNaNExtF80UI0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNExtF80UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNExtF80UI.c new file mode 100644 index 000000000..88bfee5ff --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNExtF80UI.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating `uiA64' and +| `uiA0' as an 80-bit extended floating-point value, and likewise interpreting +| the unsigned integer formed from concatenating `uiB64' and `uiB0' as another +| 80-bit extended floating-point value, and assuming at least on of these +| floating-point values is a NaN, returns the bit pattern of the combined NaN +| result. If either original floating-point value is a signaling NaN, the +| invalid exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNExtF80UI( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0 + ) +{ + struct uint128 uiZ; + + if ( + softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) + || softfloat_isSigNaNExtF80UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + uiZ.v64 = defaultNaNExtF80UI64; + uiZ.v0 = defaultNaNExtF80UI0; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF128M.c new file mode 100644 index 000000000..df76ab235 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF128M.c @@ -0,0 +1,68 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2018 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 128-bit floating-point values pointed to by +| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location +| pointed to by 'zWPtr'. If either original floating-point value is a +| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr', +| and 'zWPtr' points to an array of four 32-bit elements that concatenate in +| the platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNF128M( + const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr ) +{ + + if ( + f128M_isSignalingNaN( (const float128_t *) aWPtr ) + || (bWPtr && f128M_isSignalingNaN( (const float128_t *) bWPtr )) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96; + zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64; + zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32; + zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF128UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF128UI.c new file mode 100644 index 000000000..49e253539 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF128UI.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating `uiA64' and +| `uiA0' as a 128-bit floating-point value, and likewise interpreting the +| unsigned integer formed from concatenating `uiB64' and `uiB0' as another +| 128-bit floating-point value, and assuming at least on of these floating- +| point values is a NaN, returns the bit pattern of the combined NaN result. +| If either original floating-point value is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNF128UI( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0 + ) +{ + struct uint128 uiZ; + + if ( + softfloat_isSigNaNF128UI( uiA64, uiA0 ) + || softfloat_isSigNaNF128UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + return uiZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF16UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF16UI.c new file mode 100644 index 000000000..228dcd8de --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF16UI.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting `uiA' and `uiB' as the bit patterns of two 16-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either `uiA' or `uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast16_t + softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB ) +{ + + if ( softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return defaultNaNF16UI; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF32UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF32UI.c new file mode 100644 index 000000000..c6308cc32 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF32UI.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting `uiA' and `uiB' as the bit patterns of two 32-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either `uiA' or `uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast32_t + softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB ) +{ + + if ( softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return defaultNaNF32UI; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF64UI.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF64UI.c new file mode 100644 index 000000000..220366553 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/s_propagateNaNF64UI.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting `uiA' and `uiB' as the bit patterns of two 64-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either `uiA' or `uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast64_t + softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB ) +{ + + if ( softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return defaultNaNF64UI; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/softfloat_raiseFlags.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/softfloat_raiseFlags.c new file mode 100644 index 000000000..7a1aee930 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/softfloat_raiseFlags.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Raises the exceptions specified by `flags'. Floating-point traps can be +| defined here if desired. It is currently not possible for such a trap +| to substitute a result value. If traps are not implemented, this routine +| should be simply `softfloat_exceptionFlags |= flags;'. +*----------------------------------------------------------------------------*/ +void softfloat_raiseFlags( uint_fast8_t flags ) +{ + + softfloat_exceptionFlags |= flags; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/specialize.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/specialize.h new file mode 100644 index 000000000..c6382646f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/RISCV/specialize.h @@ -0,0 +1,407 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef specialize_h +#define specialize_h 1 + +#include <stdbool.h> +#include <stdint.h> +#include "primitiveTypes.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Default value for 'softfloat_detectTininess'. +*----------------------------------------------------------------------------*/ +#define init_detectTininess softfloat_tininess_afterRounding + +/*---------------------------------------------------------------------------- +| The values to return on conversions to 32-bit integer formats that raise an +| invalid exception. +*----------------------------------------------------------------------------*/ +#define ui32_fromPosOverflow 0xFFFFFFFF +#define ui32_fromNegOverflow 0 +#define ui32_fromNaN 0xFFFFFFFF +#define i32_fromPosOverflow 0x7FFFFFFF +#define i32_fromNegOverflow (-0x7FFFFFFF - 1) +#define i32_fromNaN 0x7FFFFFFF + +/*---------------------------------------------------------------------------- +| The values to return on conversions to 64-bit integer formats that raise an +| invalid exception. +*----------------------------------------------------------------------------*/ +#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF ) +#define ui64_fromNegOverflow 0 +#define ui64_fromNaN UINT64_C( 0xFFFFFFFFFFFFFFFF ) +#define i64_fromPosOverflow INT64_C( 0x7FFFFFFFFFFFFFFF ) +#define i64_fromNegOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) +#define i64_fromNaN INT64_C( 0x7FFFFFFFFFFFFFFF ) + +/*---------------------------------------------------------------------------- +| "Common NaN" structure, used to transfer NaN representations from one format +| to another. +*----------------------------------------------------------------------------*/ +struct commonNaN { char _unused; }; + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 16-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF16UI 0x7E00 + +/*---------------------------------------------------------------------------- +| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a +| 16-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF)) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_f16UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x0200) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +#define softfloat_commonNaNToF16UI( aPtr ) ((uint_fast16_t) defaultNaNF16UI) + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast16_t + softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 32-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF32UI 0x7FC00000 + +/*---------------------------------------------------------------------------- +| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a +| 32-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF)) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_f32UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x00400000) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +#define softfloat_commonNaNToF32UI( aPtr ) ((uint_fast32_t) defaultNaNF32UI) + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast32_t + softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 64-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF64UI UINT64_C( 0x7FF8000000000000 ) + +/*---------------------------------------------------------------------------- +| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a +| 64-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF ))) + +/*---------------------------------------------------------------------------- +| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_f64UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & UINT64_C( 0x0008000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +#define softfloat_commonNaNToF64UI( aPtr ) ((uint_fast64_t) defaultNaNF64UI) + +/*---------------------------------------------------------------------------- +| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast64_t + softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 80-bit extended floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNExtF80UI64 0x7FFF +#define defaultNaNExtF80UI0 UINT64_C( 0xC000000000000000 ) + +/*---------------------------------------------------------------------------- +| Returns true when the 80-bit unsigned integer formed from concatenating +| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended +| floating-point signaling NaN. +| Note: This macro evaluates its arguments more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF ))) + +#ifdef SOFTFLOAT_FAST_INT64 + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is +| defined. +*----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of an 80-bit extended floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_extF80UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA0) & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and returns the bit pattern of this value as an unsigned +| integer. +*----------------------------------------------------------------------------*/ +#if defined INLINE && ! defined softfloat_commonNaNToExtF80UI +INLINE +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + uiZ.v64 = defaultNaNExtF80UI64; + uiZ.v0 = defaultNaNExtF80UI0; + return uiZ; +} +#else +struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ); +#endif + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting +| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 80-bit extended floating-point value, and assuming at least on of these +| floating-point values is a NaN, returns the bit pattern of the combined NaN +| result. If either original floating-point value is a signaling NaN, the +| invalid exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNExtF80UI( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0 + ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 128-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF128UI64 UINT64_C( 0x7FFF800000000000 ) +#define defaultNaNF128UI0 UINT64_C( 0 ) + +/*---------------------------------------------------------------------------- +| Returns true when the 128-bit unsigned integer formed from concatenating +| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating- +| point signaling NaN. +| Note: This macro evaluates its arguments more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF )))) + +/*---------------------------------------------------------------------------- +| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' +| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to +| the common NaN form, and stores the resulting common NaN at the location +| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception +| is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_f128UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA64) & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +#if defined INLINE && ! defined softfloat_commonNaNToF128UI +INLINE +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr ) +{ + struct uint128 uiZ; + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + return uiZ; +} +#else +struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * ); +#endif + +/*---------------------------------------------------------------------------- +| Interpreting the unsigned integer formed from concatenating 'uiA64' and +| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the +| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another +| 128-bit floating-point value, and assuming at least on of these floating- +| point values is a NaN, returns the bit pattern of the combined NaN result. +| If either original floating-point value is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_propagateNaNF128UI( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0 + ); + +#else + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not +| defined. +*----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- +| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is +| a NaN, converts this NaN to the common NaN form, and stores the resulting +| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling +| NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_extF80MToCommonNaN( aSPtr, zPtr ) if ( ! ((aSPtr)->signif & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended +| floating-point NaN, and stores this NaN at the location pointed to by +| 'zSPtr'. +*----------------------------------------------------------------------------*/ +#if defined INLINE && ! defined softfloat_commonNaNToExtF80M +INLINE +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ) +{ + zSPtr->signExp = defaultNaNExtF80UI64; + zSPtr->signif = defaultNaNExtF80UI0; +} +#else +void + softfloat_commonNaNToExtF80M( + const struct commonNaN *aPtr, struct extFloat80M *zSPtr ); +#endif + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 80-bit extended floating-point values +| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result +| at the location pointed to by 'zSPtr'. If either original floating-point +| value is a signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr + ); + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 128-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF128UI96 0x7FFF8000 +#define defaultNaNF128UI64 0 +#define defaultNaNF128UI32 0 +#define defaultNaNF128UI0 0 + +/*---------------------------------------------------------------------------- +| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN, +| converts this NaN to the common NaN form, and stores the resulting common +| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN, +| the invalid exception is raised. Argument 'aWPtr' points to an array of +| four 32-bit elements that concatenate in the platform's normal endian order +| to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +#define softfloat_f128MToCommonNaN( aWPtr, zPtr ) if ( ! ((aWPtr)[indexWordHi( 4 )] & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point +| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument +| 'zWPtr' points to an array of four 32-bit elements that concatenate in the +| platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +#if defined INLINE && ! defined softfloat_commonNaNToF128M +INLINE +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ) +{ + zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96; + zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64; + zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32; + zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0; +} +#else +void + softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr ); +#endif + +/*---------------------------------------------------------------------------- +| Assuming at least one of the two 128-bit floating-point values pointed to by +| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location +| pointed to by 'zWPtr'. If either original floating-point value is a +| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr', +| and 'zWPtr' points to an array of four 32-bit elements that concatenate in +| the platform's normal endian order to form a 128-bit floating-point value. +*----------------------------------------------------------------------------*/ +void + softfloat_propagateNaNF128M( + const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr ); + +#endif + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_add.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_add.c new file mode 100644 index 000000000..4ba6a311c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_add.c @@ -0,0 +1,100 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + extF80M_add( + const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr ) +{ + const struct extFloat80M *aSPtr, *bSPtr; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + bool signA; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + bool signB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2) + extFloat80_t + (*magsFuncPtr)( + uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool ); +#endif + + aSPtr = (const struct extFloat80M *) aPtr; + bSPtr = (const struct extFloat80M *) bPtr; + uiA64 = aSPtr->signExp; + uiA0 = aSPtr->signif; + signA = signExtF80UI64( uiA64 ); + uiB64 = bSPtr->signExp; + uiB0 = bSPtr->signif; + signB = signExtF80UI64( uiB64 ); +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) + if ( signA == signB ) { + *zPtr = softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA ); + } else { + *zPtr = softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA ); + } +#else + magsFuncPtr = + (signA == signB) ? softfloat_addMagsExtF80 : softfloat_subMagsExtF80; + *zPtr = (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA ); +#endif + +} + +#else + +void + extF80M_add( + const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr ) +{ + + softfloat_addExtF80M( + (const struct extFloat80M *) aPtr, + (const struct extFloat80M *) bPtr, + (struct extFloat80M *) zPtr, + false + ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_div.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_div.c new file mode 100644 index 000000000..24c069a98 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_div.c @@ -0,0 +1,194 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + extF80M_div( + const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr ) +{ + + *zPtr = extF80_div( *aPtr, *bPtr ); + +} + +#else + +void + extF80M_div( + const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr ) +{ + const struct extFloat80M *aSPtr, *bSPtr; + struct extFloat80M *zSPtr; + uint_fast16_t uiA64; + int32_t expA; + uint_fast16_t uiB64; + int32_t expB; + bool signZ; + uint64_t sigA, x64; + int32_t expZ; + int shiftDist; + uint32_t y[3], recip32, sigB[3]; + int ix; + uint32_t q, qs[2]; + uint_fast16_t uiZ64; + uint64_t uiZ0; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + bSPtr = (const struct extFloat80M *) bPtr; + zSPtr = (struct extFloat80M *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + expA = expExtF80UI64( uiA64 ); + uiB64 = bSPtr->signExp; + expB = expExtF80UI64( uiB64 ); + signZ = signExtF80UI64( uiA64 ) ^ signExtF80UI64( uiB64 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) { + if ( softfloat_tryPropagateNaNExtF80M( aSPtr, bSPtr, zSPtr ) ) return; + if ( expA == 0x7FFF ) { + if ( expB == 0x7FFF ) goto invalid; + goto infinity; + } + goto zero; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sigA = aSPtr->signif; + x64 = bSPtr->signif; + if ( ! expB ) expB = 1; + if ( ! (x64 & UINT64_C( 0x8000000000000000 )) ) { + if ( ! x64 ) { + if ( ! sigA ) goto invalid; + softfloat_raiseFlags( softfloat_flag_infinite ); + goto infinity; + } + expB += softfloat_normExtF80SigM( &x64 ); + } + if ( ! expA ) expA = 1; + if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sigA ) goto zero; + expA += softfloat_normExtF80SigM( &sigA ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA - expB + 0x3FFF; + shiftDist = 29; + if ( sigA < x64 ) { + --expZ; + shiftDist = 30; + } + softfloat_shortShiftLeft64To96M( sigA, shiftDist, y ); + recip32 = softfloat_approxRecip32_1( x64>>32 ); + sigB[indexWord( 3, 0 )] = (uint32_t) x64<<30; + x64 >>= 2; + sigB[indexWord( 3, 2 )] = x64>>32; + sigB[indexWord( 3, 1 )] = x64; + ix = 2; + for (;;) { + x64 = (uint64_t) y[indexWordHi( 3 )] * recip32; + q = (x64 + 0x80000000)>>32; + --ix; + if ( ix < 0 ) break; + softfloat_remStep96MBy32( y, 29, sigB, q, y ); + if ( y[indexWordHi( 3 )] & 0x80000000 ) { + --q; + softfloat_add96M( y, sigB, y ); + } + qs[ix] = q; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ((q + 1) & 0x3FFFFF) < 2 ) { + softfloat_remStep96MBy32( y, 29, sigB, q, y ); + if ( y[indexWordHi( 3 )] & 0x80000000 ) { + --q; + softfloat_add96M( y, sigB, y ); + } else if ( softfloat_compare96M( sigB, y ) <= 0 ) { + ++q; + softfloat_sub96M( y, sigB, y ); + } + if ( + y[indexWordLo( 3 )] || y[indexWord( 3, 1 )] || y[indexWord( 3, 2 )] + ) { + q |= 1; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + x64 = (uint64_t) q<<9; + y[indexWord( 3, 0 )] = x64; + x64 = ((uint64_t) qs[0]<<6) + (x64>>32); + y[indexWord( 3, 1 )] = x64; + y[indexWord( 3, 2 )] = (qs[1]<<3) + (x64>>32); + softfloat_roundPackMToExtF80M( + signZ, expZ, y, extF80_roundingPrecision, zSPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_invalidExtF80M( zSPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infinity: + uiZ64 = packToExtF80UI64( signZ, 0x7FFF ); + uiZ0 = UINT64_C( 0x8000000000000000 ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ64 = packToExtF80UI64( signZ, 0 ); + uiZ0 = 0; + uiZ: + zSPtr->signExp = uiZ64; + zSPtr->signif = uiZ0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_eq.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_eq.c new file mode 100644 index 000000000..248003710 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_eq.c @@ -0,0 +1,98 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool extF80M_eq( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + + return extF80_eq( *aPtr, *bPtr ); + +} + +#else + +bool extF80M_eq( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + const struct extFloat80M *aSPtr, *bSPtr; + uint_fast16_t uiA64; + uint64_t uiA0; + uint_fast16_t uiB64; + uint64_t uiB0; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + bSPtr = (const struct extFloat80M *) bPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + uiA0 = aSPtr->signif; + uiB64 = bSPtr->signExp; + uiB0 = bSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + if ( + softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) + || softfloat_isSigNaNExtF80UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( uiA0 == uiB0 ) { + return (uiA64 == uiB64) || ! uiA0; + } else { + if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) { + return ! softfloat_compareNonnormExtF80M( aSPtr, bSPtr ); + } + return false; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_eq_signaling.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_eq_signaling.c new file mode 100644 index 000000000..785eba1eb --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_eq_signaling.c @@ -0,0 +1,92 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool extF80M_eq_signaling( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + + return extF80_eq_signaling( *aPtr, *bPtr ); + +} + +#else + +bool extF80M_eq_signaling( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + const struct extFloat80M *aSPtr, *bSPtr; + uint_fast16_t uiA64; + uint64_t uiA0; + uint_fast16_t uiB64; + uint64_t uiB0; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + bSPtr = (const struct extFloat80M *) bPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + uiA0 = aSPtr->signif; + uiB64 = bSPtr->signExp; + uiB0 = bSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( uiA0 == uiB0 ) { + return (uiA64 == uiB64) || ! uiA0; + } else { + if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) { + return ! softfloat_compareNonnormExtF80M( aSPtr, bSPtr ); + } + return false; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_le.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_le.c new file mode 100644 index 000000000..24edae877 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_le.c @@ -0,0 +1,106 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool extF80M_le( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + + return extF80_le( *aPtr, *bPtr ); + +} + +#else + +bool extF80M_le( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + const struct extFloat80M *aSPtr, *bSPtr; + uint_fast16_t uiA64; + uint64_t uiA0; + uint_fast16_t uiB64; + uint64_t uiB0; + bool signA, ltMags; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + bSPtr = (const struct extFloat80M *) bPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + uiA0 = aSPtr->signif; + uiB64 = bSPtr->signExp; + uiB0 = bSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signA = signExtF80UI64( uiA64 ); + if ( (uiA64 ^ uiB64) & 0x8000 ) { + /*-------------------------------------------------------------------- + | Signs are different. + *--------------------------------------------------------------------*/ + return signA || ! (uiA0 | uiB0); + } else { + /*-------------------------------------------------------------------- + | Signs are the same. + *--------------------------------------------------------------------*/ + if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) { + return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) <= 0); + } + if ( uiA64 == uiB64 ) { + if ( uiA0 == uiB0 ) return true; + ltMags = (uiA0 < uiB0); + } else { + ltMags = (uiA64 < uiB64); + } + return signA ^ ltMags; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_le_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_le_quiet.c new file mode 100644 index 000000000..3880e36d5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_le_quiet.c @@ -0,0 +1,112 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool extF80M_le_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + + return extF80_le_quiet( *aPtr, *bPtr ); + +} + +#else + +bool extF80M_le_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + const struct extFloat80M *aSPtr, *bSPtr; + uint_fast16_t uiA64; + uint64_t uiA0; + uint_fast16_t uiB64; + uint64_t uiB0; + bool signA, ltMags; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + bSPtr = (const struct extFloat80M *) bPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + uiA0 = aSPtr->signif; + uiB64 = bSPtr->signExp; + uiB0 = bSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + if ( + softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) + || softfloat_isSigNaNExtF80UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signA = signExtF80UI64( uiA64 ); + if ( (uiA64 ^ uiB64) & 0x8000 ) { + /*-------------------------------------------------------------------- + | Signs are different. + *--------------------------------------------------------------------*/ + return signA || ! (uiA0 | uiB0); + } else { + /*-------------------------------------------------------------------- + | Signs are the same. + *--------------------------------------------------------------------*/ + if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) { + return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) <= 0); + } + if ( uiA64 == uiB64 ) { + if ( uiA0 == uiB0 ) return true; + ltMags = (uiA0 < uiB0); + } else { + ltMags = (uiA64 < uiB64); + } + return signA ^ ltMags; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_lt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_lt.c new file mode 100644 index 000000000..70fa8f05d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_lt.c @@ -0,0 +1,106 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool extF80M_lt( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + + return extF80_lt( *aPtr, *bPtr ); + +} + +#else + +bool extF80M_lt( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + const struct extFloat80M *aSPtr, *bSPtr; + uint_fast16_t uiA64; + uint64_t uiA0; + uint_fast16_t uiB64; + uint64_t uiB0; + bool signA, ltMags; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + bSPtr = (const struct extFloat80M *) bPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + uiA0 = aSPtr->signif; + uiB64 = bSPtr->signExp; + uiB0 = bSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signA = signExtF80UI64( uiA64 ); + if ( (uiA64 ^ uiB64) & 0x8000 ) { + /*-------------------------------------------------------------------- + | Signs are different. + *--------------------------------------------------------------------*/ + return signA && ((uiA0 | uiB0) != 0); + } else { + /*-------------------------------------------------------------------- + | Signs are the same. + *--------------------------------------------------------------------*/ + if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) { + return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) < 0); + } + if ( uiA64 == uiB64 ) { + if ( uiA0 == uiB0 ) return false; + ltMags = (uiA0 < uiB0); + } else { + ltMags = (uiA64 < uiB64); + } + return signA ^ ltMags; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_lt_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_lt_quiet.c new file mode 100644 index 000000000..b119af308 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_lt_quiet.c @@ -0,0 +1,112 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool extF80M_lt_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + + return extF80_lt_quiet( *aPtr, *bPtr ); + +} + +#else + +bool extF80M_lt_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr ) +{ + const struct extFloat80M *aSPtr, *bSPtr; + uint_fast16_t uiA64; + uint64_t uiA0; + uint_fast16_t uiB64; + uint64_t uiB0; + bool signA, ltMags; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + bSPtr = (const struct extFloat80M *) bPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + uiA0 = aSPtr->signif; + uiB64 = bSPtr->signExp; + uiB0 = bSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + if ( + softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) + || softfloat_isSigNaNExtF80UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signA = signExtF80UI64( uiA64 ); + if ( (uiA64 ^ uiB64) & 0x8000 ) { + /*-------------------------------------------------------------------- + | Signs are different. + *--------------------------------------------------------------------*/ + return signA && ((uiA0 | uiB0) != 0); + } else { + /*-------------------------------------------------------------------- + | Signs are the same. + *--------------------------------------------------------------------*/ + if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) { + return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) < 0); + } + if ( uiA64 == uiB64 ) { + if ( uiA0 == uiB0 ) return false; + ltMags = (uiA0 < uiB0); + } else { + ltMags = (uiA64 < uiB64); + } + return signA ^ ltMags; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_mul.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_mul.c new file mode 100644 index 000000000..273444900 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_mul.c @@ -0,0 +1,139 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + extF80M_mul( + const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr ) +{ + + *zPtr = extF80_mul( *aPtr, *bPtr ); + +} + +#else + +void + extF80M_mul( + const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr ) +{ + const struct extFloat80M *aSPtr, *bSPtr; + struct extFloat80M *zSPtr; + uint_fast16_t uiA64; + int32_t expA; + uint_fast16_t uiB64; + int32_t expB; + bool signZ; + uint_fast16_t exp, uiZ64; + uint64_t uiZ0, sigA, sigB; + int32_t expZ; + uint32_t sigProd[4], *extSigZPtr; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + bSPtr = (const struct extFloat80M *) bPtr; + zSPtr = (struct extFloat80M *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + expA = expExtF80UI64( uiA64 ); + uiB64 = bSPtr->signExp; + expB = expExtF80UI64( uiB64 ); + signZ = signExtF80UI64( uiA64 ) ^ signExtF80UI64( uiB64 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) { + if ( softfloat_tryPropagateNaNExtF80M( aSPtr, bSPtr, zSPtr ) ) return; + if ( + (! aSPtr->signif && (expA != 0x7FFF)) + || (! bSPtr->signif && (expB != 0x7FFF)) + ) { + softfloat_invalidExtF80M( zSPtr ); + return; + } + uiZ64 = packToExtF80UI64( signZ, 0x7FFF ); + uiZ0 = UINT64_C( 0x8000000000000000 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) expA = 1; + sigA = aSPtr->signif; + if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sigA ) goto zero; + expA += softfloat_normExtF80SigM( &sigA ); + } + if ( ! expB ) expB = 1; + sigB = bSPtr->signif; + if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sigB ) goto zero; + expB += softfloat_normExtF80SigM( &sigB ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0x3FFE; + softfloat_mul64To128M( sigA, sigB, sigProd ); + if ( sigProd[indexWordLo( 4 )] ) sigProd[indexWord( 4, 1 )] |= 1; + extSigZPtr = &sigProd[indexMultiwordHi( 4, 3 )]; + if ( sigProd[indexWordHi( 4 )] < 0x80000000 ) { + --expZ; + softfloat_add96M( extSigZPtr, extSigZPtr, extSigZPtr ); + } + softfloat_roundPackMToExtF80M( + signZ, expZ, extSigZPtr, extF80_roundingPrecision, zSPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ64 = packToExtF80UI64( signZ, 0 ); + uiZ0 = 0; + uiZ: + zSPtr->signExp = uiZ64; + zSPtr->signif = uiZ0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_rem.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_rem.c new file mode 100644 index 000000000..065e271a7 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_rem.c @@ -0,0 +1,204 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + extF80M_rem( + const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr ) +{ + + *zPtr = extF80_rem( *aPtr, *bPtr ); + +} + +#else + +void + extF80M_rem( + const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr ) +{ + const struct extFloat80M *aSPtr, *bSPtr; + struct extFloat80M *zSPtr; + uint_fast16_t uiA64; + int32_t expA, expB; + uint64_t x64; + bool signRem; + uint64_t sigA; + int32_t expDiff; + uint32_t rem[3], x[3], sig32B, q, recip32, rem2[3], *remPtr, *altRemPtr; + uint32_t *newRemPtr, wordMeanRem; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + bSPtr = (const struct extFloat80M *) bPtr; + zSPtr = (struct extFloat80M *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + expA = expExtF80UI64( uiA64 ); + expB = expExtF80UI64( bSPtr->signExp ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) { + if ( softfloat_tryPropagateNaNExtF80M( aSPtr, bSPtr, zSPtr ) ) return; + if ( expA == 0x7FFF ) goto invalid; + /*-------------------------------------------------------------------- + | If we get here, then argument b is an infinity and `expB' is 0x7FFF; + | Doubling `expB' is an easy way to ensure that `expDiff' later is + | less than -1, which will result in returning a canonicalized version + | of argument a. + *--------------------------------------------------------------------*/ + expB += expB; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) expB = 1; + x64 = bSPtr->signif; + if ( ! (x64 & UINT64_C( 0x8000000000000000 )) ) { + if ( ! x64 ) goto invalid; + expB += softfloat_normExtF80SigM( &x64 ); + } + signRem = signExtF80UI64( uiA64 ); + if ( ! expA ) expA = 1; + sigA = aSPtr->signif; + if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sigA ) { + expA = 0; + goto copyA; + } + expA += softfloat_normExtF80SigM( &sigA ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( expDiff < -1 ) goto copyA; + rem[indexWord( 3, 2 )] = sigA>>34; + rem[indexWord( 3, 1 )] = sigA>>2; + rem[indexWord( 3, 0 )] = (uint32_t) sigA<<30; + x[indexWord( 3, 0 )] = (uint32_t) x64<<30; + sig32B = x64>>32; + x64 >>= 2; + x[indexWord( 3, 2 )] = x64>>32; + x[indexWord( 3, 1 )] = x64; + if ( expDiff < 1 ) { + if ( expDiff ) { + --expB; + softfloat_add96M( x, x, x ); + q = 0; + } else { + q = (softfloat_compare96M( x, rem ) <= 0); + if ( q ) softfloat_sub96M( rem, x, rem ); + } + } else { + recip32 = softfloat_approxRecip32_1( sig32B ); + expDiff -= 30; + for (;;) { + x64 = (uint64_t) rem[indexWordHi( 3 )] * recip32; + if ( expDiff < 0 ) break; + q = (x64 + 0x80000000)>>32; + softfloat_remStep96MBy32( rem, 29, x, q, rem ); + if ( rem[indexWordHi( 3 )] & 0x80000000 ) { + softfloat_add96M( rem, x, rem ); + } + expDiff -= 29; + } + /*-------------------------------------------------------------------- + | (`expDiff' cannot be less than -29 here.) + *--------------------------------------------------------------------*/ + q = (uint32_t) (x64>>32)>>(~expDiff & 31); + softfloat_remStep96MBy32( rem, expDiff + 30, x, q, rem ); + if ( rem[indexWordHi( 3 )] & 0x80000000 ) { + remPtr = rem; + altRemPtr = rem2; + softfloat_add96M( remPtr, x, altRemPtr ); + goto selectRem; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + remPtr = rem; + altRemPtr = rem2; + do { + ++q; + newRemPtr = altRemPtr; + softfloat_sub96M( remPtr, x, newRemPtr ); + altRemPtr = remPtr; + remPtr = newRemPtr; + } while ( ! (remPtr[indexWordHi( 3 )] & 0x80000000) ); + selectRem: + softfloat_add96M( remPtr, altRemPtr, x ); + wordMeanRem = x[indexWordHi( 3 )]; + if ( + (wordMeanRem & 0x80000000) + || (! wordMeanRem && (q & 1) && ! x[indexWord( 3, 0 )] + && ! x[indexWord( 3, 1 )]) + ) { + remPtr = altRemPtr; + } + if ( remPtr[indexWordHi( 3 )] & 0x80000000 ) { + signRem = ! signRem; + softfloat_negX96M( remPtr ); + } + softfloat_normRoundPackMToExtF80M( signRem, expB + 2, remPtr, 80, zSPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_invalidExtF80M( zSPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + copyA: + if ( expA < 1 ) { + sigA >>= 1 - expA; + expA = 0; + } + zSPtr->signExp = packToExtF80UI64( signRem, expA ); + zSPtr->signif = sigA; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_roundToInt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_roundToInt.c new file mode 100644 index 000000000..ff4ae876a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_roundToInt.c @@ -0,0 +1,176 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + extF80M_roundToInt( + const extFloat80_t *aPtr, + uint_fast8_t roundingMode, + bool exact, + extFloat80_t *zPtr + ) +{ + + *zPtr = extF80_roundToInt( *aPtr, roundingMode, exact ); + +} + +#else + +void + extF80M_roundToInt( + const extFloat80_t *aPtr, + uint_fast8_t roundingMode, + bool exact, + extFloat80_t *zPtr + ) +{ + const struct extFloat80M *aSPtr; + struct extFloat80M *zSPtr; + uint_fast16_t uiA64, signUI64; + int32_t exp; + uint64_t sigA; + uint_fast16_t uiZ64; + uint64_t sigZ, lastBitMask, roundBitsMask; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + zSPtr = (struct extFloat80M *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + signUI64 = uiA64 & packToExtF80UI64( 1, 0 ); + exp = expExtF80UI64( uiA64 ); + sigA = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( !(sigA & UINT64_C( 0x8000000000000000 )) && (exp != 0x7FFF) ) { + if ( !sigA ) { + uiZ64 = signUI64; + sigZ = 0; + goto uiZ; + } + exp += softfloat_normExtF80SigM( &sigA ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp <= 0x3FFE ) { + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + switch ( roundingMode ) { + case softfloat_round_near_even: + if ( !(sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) break; + case softfloat_round_near_maxMag: + if ( exp == 0x3FFE ) goto mag1; + break; + case softfloat_round_min: + if ( signUI64 ) goto mag1; + break; + case softfloat_round_max: + if ( !signUI64 ) goto mag1; + break; +#ifdef SOFTFLOAT_ROUND_ODD + case softfloat_round_odd: + goto mag1; +#endif + } + uiZ64 = signUI64; + sigZ = 0; + goto uiZ; + mag1: + uiZ64 = signUI64 | 0x3FFF; + sigZ = UINT64_C( 0x8000000000000000 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x403E <= exp ) { + if ( exp == 0x7FFF ) { + if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + softfloat_propagateNaNExtF80M( aSPtr, 0, zSPtr ); + return; + } + sigZ = UINT64_C( 0x8000000000000000 ); + } else { + sigZ = sigA; + } + uiZ64 = signUI64 | exp; + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ64 = signUI64 | exp; + lastBitMask = (uint64_t) 1<<(0x403E - exp); + roundBitsMask = lastBitMask - 1; + sigZ = sigA; + if ( roundingMode == softfloat_round_near_maxMag ) { + sigZ += lastBitMask>>1; + } else if ( roundingMode == softfloat_round_near_even ) { + sigZ += lastBitMask>>1; + if ( !(sigZ & roundBitsMask) ) sigZ &= ~lastBitMask; + } else if ( + roundingMode == (signUI64 ? softfloat_round_min : softfloat_round_max) + ) { + sigZ += roundBitsMask; + } + sigZ &= ~roundBitsMask; + if ( !sigZ ) { + ++uiZ64; + sigZ = UINT64_C( 0x8000000000000000 ); + } + if ( sigZ != sigA ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) sigZ |= lastBitMask; +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + uiZ: + zSPtr->signExp = uiZ64; + zSPtr->signif = sigZ; + return; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_sqrt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_sqrt.c new file mode 100644 index 000000000..21c15da07 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_sqrt.c @@ -0,0 +1,180 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void extF80M_sqrt( const extFloat80_t *aPtr, extFloat80_t *zPtr ) +{ + + *zPtr = extF80_sqrt( *aPtr ); + +} + +#else + +void extF80M_sqrt( const extFloat80_t *aPtr, extFloat80_t *zPtr ) +{ + const struct extFloat80M *aSPtr; + struct extFloat80M *zSPtr; + uint_fast16_t uiA64, signUI64; + int32_t expA; + uint64_t rem64; + int32_t expZ; + uint32_t rem96[3], sig32A, recipSqrt32, sig32Z, q; + uint64_t sig64Z, x64; + uint32_t rem32, term[4], rem[4], extSigZ[3]; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + zSPtr = (struct extFloat80M *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + signUI64 = uiA64 & packToExtF80UI64( 1, 0 ); + expA = expExtF80UI64( uiA64 ); + rem64 = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FFF ) { + if ( rem64 & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + softfloat_propagateNaNExtF80M( aSPtr, 0, zSPtr ); + return; + } + if ( signUI64 ) goto invalid; + rem64 = UINT64_C( 0x8000000000000000 ); + goto copyA; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) expA = 1; + if ( ! (rem64 & UINT64_C( 0x8000000000000000 )) ) { + if ( ! rem64 ) { + uiA64 = signUI64; + goto copyA; + } + expA += softfloat_normExtF80SigM( &rem64 ); + } + if ( signUI64 ) goto invalid; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = ((expA - 0x3FFF)>>1) + 0x3FFF; + expA &= 1; + softfloat_shortShiftLeft64To96M( rem64, 30 - expA, rem96 ); + sig32A = rem64>>32; + recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A ); + sig32Z = ((uint64_t) sig32A * recipSqrt32)>>32; + if ( expA ) sig32Z >>= 1; + rem64 = + ((uint64_t) rem96[indexWord( 3, 2 )]<<32 | rem96[indexWord( 3, 1 )]) + - (uint64_t) sig32Z * sig32Z; + rem96[indexWord( 3, 2 )] = rem64>>32; + rem96[indexWord( 3, 1 )] = rem64; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + q = ((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32; + sig64Z = ((uint64_t) sig32Z<<32) + ((uint64_t) q<<3); + term[indexWord( 3, 2 )] = 0; + /*------------------------------------------------------------------------ + | (Repeating this loop is a rare occurrence.) + *------------------------------------------------------------------------*/ + for (;;) { + x64 = ((uint64_t) sig32Z<<32) + sig64Z; + term[indexWord( 3, 1 )] = x64>>32; + term[indexWord( 3, 0 )] = x64; + softfloat_remStep96MBy32( + rem96, 29, term, q, &rem[indexMultiwordHi( 4, 3 )] ); + rem32 = rem[indexWord( 4, 3 )]; + if ( ! (rem32 & 0x80000000) ) break; + --q; + sig64Z -= 1<<3; + } + rem64 = (uint64_t) rem32<<32 | rem[indexWord( 4, 2 )]; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + q = (((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32) + 2; + if ( rem64>>34 ) q += recipSqrt32; + x64 = (uint64_t) q<<7; + extSigZ[indexWord( 3, 0 )] = x64; + x64 = (sig64Z<<1) + (x64>>32); + extSigZ[indexWord( 3, 2 )] = x64>>32; + extSigZ[indexWord( 3, 1 )] = x64; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (q & 0xFFFFFF) <= 2 ) { + q &= ~(uint32_t) 0xFFFF; + extSigZ[indexWordLo( 3 )] = q<<7; + x64 = sig64Z + (q>>27); + term[indexWord( 4, 3 )] = 0; + term[indexWord( 4, 2 )] = x64>>32; + term[indexWord( 4, 1 )] = x64; + term[indexWord( 4, 0 )] = q<<5; + rem[indexWord( 4, 0 )] = 0; + softfloat_remStep128MBy32( rem, 28, term, q, rem ); + q = rem[indexWordHi( 4 )]; + if ( q & 0x80000000 ) { + softfloat_sub1X96M( extSigZ ); + } else { + if ( q || rem[indexWord( 4, 1 )] || rem[indexWord( 4, 2 )] ) { + extSigZ[indexWordLo( 3 )] |= 1; + } + } + } + softfloat_roundPackMToExtF80M( + 0, expZ, extSigZ, extF80_roundingPrecision, zSPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_invalidExtF80M( zSPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + copyA: + zSPtr->signExp = uiA64; + zSPtr->signif = rem64; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_sub.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_sub.c new file mode 100644 index 000000000..4f9f1a623 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_sub.c @@ -0,0 +1,100 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + extF80M_sub( + const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr ) +{ + const struct extFloat80M *aSPtr, *bSPtr; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + bool signA; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + bool signB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2) + extFloat80_t + (*magsFuncPtr)( + uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool ); +#endif + + aSPtr = (const struct extFloat80M *) aPtr; + bSPtr = (const struct extFloat80M *) bPtr; + uiA64 = aSPtr->signExp; + uiA0 = aSPtr->signif; + signA = signExtF80UI64( uiA64 ); + uiB64 = bSPtr->signExp; + uiB0 = bSPtr->signif; + signB = signExtF80UI64( uiB64 ); +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) + if ( signA == signB ) { + *zPtr = softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA ); + } else { + *zPtr = softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA ); + } +#else + magsFuncPtr = + (signA == signB) ? softfloat_subMagsExtF80 : softfloat_addMagsExtF80; + *zPtr = (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA ); +#endif + +} + +#else + +void + extF80M_sub( + const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr ) +{ + + softfloat_addExtF80M( + (const struct extFloat80M *) aPtr, + (const struct extFloat80M *) bPtr, + (struct extFloat80M *) zPtr, + true + ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f128M.c new file mode 100644 index 000000000..c0306af82 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f128M.c @@ -0,0 +1,125 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void extF80M_to_f128M( const extFloat80_t *aPtr, float128_t *zPtr ) +{ + + *zPtr = extF80_to_f128( *aPtr ); + +} + +#else + +void extF80M_to_f128M( const extFloat80_t *aPtr, float128_t *zPtr ) +{ + const struct extFloat80M *aSPtr; + uint32_t *zWPtr; + uint_fast16_t uiA64; + bool sign; + int32_t exp; + uint64_t sig; + struct commonNaN commonNaN; + uint32_t uiZ96; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + zWPtr = (uint32_t *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zWPtr[indexWord( 4, 0 )] = 0; + if ( exp == 0x7FFF ) { + if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + softfloat_extF80MToCommonNaN( aSPtr, &commonNaN ); + softfloat_commonNaNToF128M( &commonNaN, zWPtr ); + return; + } + uiZ96 = packToF128UI96( sign, 0x7FFF, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) --exp; + if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sig ) { + uiZ96 = packToF128UI96( sign, 0, 0 ); + goto uiZ; + } + exp += softfloat_normExtF80SigM( &sig ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zWPtr[indexWord( 4, 1 )] = (uint32_t) sig<<17; + sig >>= 15; + zWPtr[indexWord( 4, 2 )] = sig; + if ( exp < 0 ) { + zWPtr[indexWordHi( 4 )] = sig>>32; + softfloat_shiftRight96M( + &zWPtr[indexMultiwordHi( 4, 3 )], + -exp, + &zWPtr[indexMultiwordHi( 4, 3 )] + ); + exp = 0; + sig = (uint64_t) zWPtr[indexWordHi( 4 )]<<32; + } + zWPtr[indexWordHi( 4 )] = packToF128UI96( sign, exp, sig>>32 ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + zWPtr[indexWord( 4, 3 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = 0; + zWPtr[indexWord( 4, 1 )] = 0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f16.c new file mode 100644 index 000000000..7ff56de2d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f16.c @@ -0,0 +1,112 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +float16_t extF80M_to_f16( const extFloat80_t *aPtr ) +{ + + return extF80_to_f16( *aPtr ); + +} + +#else + +float16_t extF80M_to_f16( const extFloat80_t *aPtr ) +{ + const struct extFloat80M *aSPtr; + uint_fast16_t uiA64; + bool sign; + int32_t exp; + uint64_t sig; + struct commonNaN commonNaN; + uint16_t uiZ, sig16; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + softfloat_extF80MToCommonNaN( aSPtr, &commonNaN ); + uiZ = softfloat_commonNaNToF16UI( &commonNaN ); + } else { + uiZ = packToF16UI( sign, 0x1F, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sig ) { + uiZ = packToF16UI( sign, 0, 0 ); + goto uiZ; + } + exp += softfloat_normExtF80SigM( &sig ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig16 = softfloat_shortShiftRightJam64( sig, 49 ); + exp -= 0x3FF1; + if ( sizeof (int_fast16_t) < sizeof (int32_t) ) { + if ( exp < -0x40 ) exp = -0x40; + } + return softfloat_roundPackToF16( sign, exp, sig16 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f32.c new file mode 100644 index 000000000..bb1166f97 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f32.c @@ -0,0 +1,112 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +float32_t extF80M_to_f32( const extFloat80_t *aPtr ) +{ + + return extF80_to_f32( *aPtr ); + +} + +#else + +float32_t extF80M_to_f32( const extFloat80_t *aPtr ) +{ + const struct extFloat80M *aSPtr; + uint_fast16_t uiA64; + bool sign; + int32_t exp; + uint64_t sig; + struct commonNaN commonNaN; + uint32_t uiZ, sig32; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + softfloat_extF80MToCommonNaN( aSPtr, &commonNaN ); + uiZ = softfloat_commonNaNToF32UI( &commonNaN ); + } else { + uiZ = packToF32UI( sign, 0xFF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sig ) { + uiZ = packToF32UI( sign, 0, 0 ); + goto uiZ; + } + exp += softfloat_normExtF80SigM( &sig ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig32 = softfloat_shortShiftRightJam64( sig, 33 ); + exp -= 0x3F81; + if ( sizeof (int_fast16_t) < sizeof (int32_t) ) { + if ( exp < -0x1000 ) exp = -0x1000; + } + return softfloat_roundPackToF32( sign, exp, sig32 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f64.c new file mode 100644 index 000000000..696255f87 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_f64.c @@ -0,0 +1,112 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +float64_t extF80M_to_f64( const extFloat80_t *aPtr ) +{ + + return extF80_to_f64( *aPtr ); + +} + +#else + +float64_t extF80M_to_f64( const extFloat80_t *aPtr ) +{ + const struct extFloat80M *aSPtr; + uint_fast16_t uiA64; + bool sign; + int32_t exp; + uint64_t sig; + struct commonNaN commonNaN; + uint64_t uiZ; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + softfloat_extF80MToCommonNaN( aSPtr, &commonNaN ); + uiZ = softfloat_commonNaNToF64UI( &commonNaN ); + } else { + uiZ = packToF64UI( sign, 0x7FF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sig ) { + uiZ = packToF64UI( sign, 0, 0 ); + goto uiZ; + } + exp += softfloat_normExtF80SigM( &sig ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig = softfloat_shortShiftRightJam64( sig, 1 ); + exp -= 0x3C01; + if ( sizeof (int_fast16_t) < sizeof (int32_t) ) { + if ( exp < -0x1000 ) exp = -0x1000; + } + return softfloat_roundPackToF64( sign, exp, sig ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i32.c new file mode 100644 index 000000000..c0464b138 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i32.c @@ -0,0 +1,100 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +int_fast32_t + extF80M_to_i32( + const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + + return extF80_to_i32( *aPtr, roundingMode, exact ); + +} + +#else + +int_fast32_t + extF80M_to_i32( + const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + const struct extFloat80M *aSPtr; + uint_fast16_t uiA64; + bool sign; + int32_t exp; + uint64_t sig; + int32_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + uiA64 = aSPtr->signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x4032 - exp; + if ( shiftDist <= 0 ) { + if ( sig>>32 ) goto invalid; + if ( -32 < shiftDist ) { + sig <<= -shiftDist; + } else { + if ( (uint32_t) sig ) goto invalid; + } + } else { + sig = softfloat_shiftRightJam64( sig, shiftDist ); + } + return softfloat_roundToI32( sign, sig, roundingMode, exact ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i32_r_minMag.c new file mode 100644 index 000000000..9a803cc23 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i32_r_minMag.c @@ -0,0 +1,120 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +int_fast32_t extF80M_to_i32_r_minMag( const extFloat80_t *aPtr, bool exact ) +{ + + return extF80_to_i32_r_minMag( *aPtr, exact ); + +} + +#else + +int_fast32_t extF80M_to_i32_r_minMag( const extFloat80_t *aPtr, bool exact ) +{ + const struct extFloat80M *aSPtr; + uint_fast16_t uiA64; + int32_t exp; + uint64_t sig; + int32_t shiftDist; + bool sign, raiseInexact; + int32_t z; + uint64_t shiftedSig; + uint32_t absZ; + union { uint32_t ui; int32_t i; } u; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + uiA64 = aSPtr->signExp; + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! sig && (exp != 0x7FFF) ) return 0; + shiftDist = 0x403E - exp; + if ( 64 <= shiftDist ) { + raiseInexact = exact; + z = 0; + } else { + sign = signExtF80UI64( uiA64 ); + raiseInexact = false; + if ( shiftDist < 0 ) { + if ( sig>>32 || (shiftDist <= -31) ) goto invalid; + shiftedSig = (uint64_t) (uint32_t) sig<<-shiftDist; + if ( shiftedSig>>32 ) goto invalid; + absZ = shiftedSig; + } else { + shiftedSig = sig; + if ( shiftDist ) shiftedSig >>= shiftDist; + if ( shiftedSig>>32 ) goto invalid; + absZ = shiftedSig; + if ( exact && shiftDist ) { + raiseInexact = ((uint64_t) absZ<<shiftDist != sig); + } + } + if ( sign ) { + if ( 0x80000000 < absZ ) goto invalid; + u.ui = -absZ; + z = u.i; + } else { + if ( 0x80000000 <= absZ ) goto invalid; + z = absZ; + } + } + if ( raiseInexact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + return z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i64.c new file mode 100644 index 000000000..2e07207a4 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i64.c @@ -0,0 +1,97 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +int_fast64_t + extF80M_to_i64( + const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + + return extF80_to_i64( *aPtr, roundingMode, exact ); + +} + +#else + +int_fast64_t + extF80M_to_i64( + const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + const struct extFloat80M *aSPtr; + uint_fast16_t uiA64; + bool sign; + int32_t exp; + uint64_t sig; + int32_t shiftDist; + uint32_t extSig[3]; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + uiA64 = aSPtr->signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x403E - exp; + if ( shiftDist < 0 ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + extSig[indexWord( 3, 2 )] = sig>>32; + extSig[indexWord( 3, 1 )] = sig; + extSig[indexWord( 3, 0 )] = 0; + if ( shiftDist ) softfloat_shiftRightJam96M( extSig, shiftDist, extSig ); + return softfloat_roundMToI64( sign, extSig, roundingMode, exact ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i64_r_minMag.c new file mode 100644 index 000000000..07282cd42 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_i64_r_minMag.c @@ -0,0 +1,115 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +int_fast64_t extF80M_to_i64_r_minMag( const extFloat80_t *aPtr, bool exact ) +{ + + return extF80_to_i64_r_minMag( *aPtr, exact ); + +} + +#else + +int_fast64_t extF80M_to_i64_r_minMag( const extFloat80_t *aPtr, bool exact ) +{ + const struct extFloat80M *aSPtr; + uint_fast16_t uiA64; + int32_t exp; + uint64_t sig; + int32_t shiftDist; + bool sign, raiseInexact; + int64_t z; + uint64_t absZ; + union { uint64_t ui; int64_t i; } u; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + uiA64 = aSPtr->signExp; + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! sig && (exp != 0x7FFF) ) return 0; + shiftDist = 0x403E - exp; + if ( 64 <= shiftDist ) { + raiseInexact = exact; + z = 0; + } else { + sign = signExtF80UI64( uiA64 ); + raiseInexact = false; + if ( shiftDist < 0 ) { + if ( shiftDist <= -63 ) goto invalid; + shiftDist = -shiftDist; + absZ = sig<<shiftDist; + if ( absZ>>shiftDist != sig ) goto invalid; + } else { + absZ = sig; + if ( shiftDist ) absZ >>= shiftDist; + if ( exact && shiftDist ) raiseInexact = (absZ<<shiftDist != sig); + } + if ( sign ) { + if ( UINT64_C( 0x8000000000000000 ) < absZ ) goto invalid; + u.ui = -absZ; + z = u.i; + } else { + if ( UINT64_C( 0x8000000000000000 ) <= absZ ) goto invalid; + z = absZ; + } + } + if ( raiseInexact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + return z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui32.c new file mode 100644 index 000000000..72579e41e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui32.c @@ -0,0 +1,101 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +uint_fast32_t + extF80M_to_ui32( + const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + + return extF80_to_ui32( *aPtr, roundingMode, exact ); + +} + +#else + +uint_fast32_t + extF80M_to_ui32( + const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + const struct extFloat80M *aSPtr; + uint_fast16_t uiA64; + bool sign; + int32_t exp; + uint64_t sig; + int32_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + uiA64 = aSPtr->signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x4032 - exp; + if ( shiftDist <= 0 ) { + if ( sig>>32 ) goto invalid; + if ( -32 < shiftDist ) { + sig <<= -shiftDist; + } else { + if ( (uint32_t) sig ) goto invalid; + } + } else { + sig = softfloat_shiftRightJam64( sig, shiftDist ); + } + return softfloat_roundToUI32( sign, sig, roundingMode, exact ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + ? ui32_fromNaN + : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui32_r_minMag.c new file mode 100644 index 000000000..c09e48341 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui32_r_minMag.c @@ -0,0 +1,111 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +uint_fast32_t extF80M_to_ui32_r_minMag( const extFloat80_t *aPtr, bool exact ) +{ + + return extF80_to_ui32_r_minMag( *aPtr, exact ); + +} + +#else + +uint_fast32_t extF80M_to_ui32_r_minMag( const extFloat80_t *aPtr, bool exact ) +{ + const struct extFloat80M *aSPtr; + uint_fast16_t uiA64; + int32_t exp; + uint64_t sig; + int32_t shiftDist; + bool sign; + uint64_t shiftedSig; + uint32_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + uiA64 = aSPtr->signExp; + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! sig && (exp != 0x7FFF) ) return 0; + shiftDist = 0x403E - exp; + if ( 64 <= shiftDist ) { + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signExtF80UI64( uiA64 ); + if ( shiftDist < 0 ) { + if ( sign || sig>>32 || (shiftDist <= -31) ) goto invalid; + shiftedSig = (uint64_t) (uint32_t) sig<<-shiftDist; + if ( shiftedSig>>32 ) goto invalid; + z = shiftedSig; + } else { + shiftedSig = sig; + if ( shiftDist ) shiftedSig >>= shiftDist; + if ( shiftedSig>>32 ) goto invalid; + z = shiftedSig; + if ( sign && z ) goto invalid; + if ( exact && shiftDist && ((uint64_t) z<<shiftDist != sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + } + return z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + ? ui32_fromNaN + : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui64.c new file mode 100644 index 000000000..a7ee39fb0 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui64.c @@ -0,0 +1,97 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +uint_fast64_t + extF80M_to_ui64( + const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + + return extF80_to_ui64( *aPtr, roundingMode, exact ); + +} + +#else + +uint_fast64_t + extF80M_to_ui64( + const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + const struct extFloat80M *aSPtr; + uint_fast16_t uiA64; + bool sign; + int32_t exp; + uint64_t sig; + int32_t shiftDist; + uint32_t extSig[3]; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + uiA64 = aSPtr->signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x403E - exp; + if ( shiftDist < 0 ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + extSig[indexWord( 3, 2 )] = sig>>32; + extSig[indexWord( 3, 1 )] = sig; + extSig[indexWord( 3, 0 )] = 0; + if ( shiftDist ) softfloat_shiftRightJam96M( extSig, shiftDist, extSig ); + return softfloat_roundMToUI64( sign, extSig, roundingMode, exact ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui64_r_minMag.c new file mode 100644 index 000000000..bf4839032 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80M_to_ui64_r_minMag.c @@ -0,0 +1,108 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +uint_fast64_t extF80M_to_ui64_r_minMag( const extFloat80_t *aPtr, bool exact ) +{ + + return extF80_to_ui64_r_minMag( *aPtr, exact ); + +} + +#else + +uint_fast64_t extF80M_to_ui64_r_minMag( const extFloat80_t *aPtr, bool exact ) +{ + const struct extFloat80M *aSPtr; + uint_fast16_t uiA64; + int32_t exp; + uint64_t sig; + int32_t shiftDist; + bool sign; + uint64_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aSPtr = (const struct extFloat80M *) aPtr; + uiA64 = aSPtr->signExp; + exp = expExtF80UI64( uiA64 ); + sig = aSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! sig && (exp != 0x7FFF) ) return 0; + shiftDist = 0x403E - exp; + if ( 64 <= shiftDist ) { + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signExtF80UI64( uiA64 ); + if ( shiftDist < 0 ) { + if ( sign || (shiftDist <= -63) ) goto invalid; + shiftDist = -shiftDist; + z = sig<<shiftDist; + if ( z>>shiftDist != sig ) goto invalid; + } else { + z = sig; + if ( shiftDist ) z >>= shiftDist; + if ( sign && z ) goto invalid; + if ( exact && shiftDist && (z<<shiftDist != sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + } + return z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_add.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_add.c new file mode 100644 index 000000000..c19d25c1c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_add.c @@ -0,0 +1,80 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +extFloat80_t extF80_add( extFloat80_t a, extFloat80_t b ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + bool signA; + union { struct extFloat80M s; extFloat80_t f; } uB; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + bool signB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2) + extFloat80_t + (*magsFuncPtr)( + uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool ); +#endif + + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + signA = signExtF80UI64( uiA64 ); + uB.f = b; + uiB64 = uB.s.signExp; + uiB0 = uB.s.signif; + signB = signExtF80UI64( uiB64 ); +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) + if ( signA == signB ) { + return softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA ); + } else { + return softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA ); + } +#else + magsFuncPtr = + (signA == signB) ? softfloat_addMagsExtF80 : softfloat_subMagsExtF80; + return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_div.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_div.c new file mode 100644 index 000000000..7d649c549 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_div.c @@ -0,0 +1,203 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extFloat80_t extF80_div( extFloat80_t a, extFloat80_t b ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + bool signA; + int_fast32_t expA; + uint_fast64_t sigA; + union { struct extFloat80M s; extFloat80_t f; } uB; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + bool signB; + int_fast32_t expB; + uint_fast64_t sigB; + bool signZ; + struct exp32_sig64 normExpSig; + int_fast32_t expZ; + struct uint128 rem; + uint_fast32_t recip32; + uint_fast64_t sigZ; + int ix; + uint_fast64_t q64; + uint_fast32_t q; + struct uint128 term; + uint_fast64_t sigZExtra; + struct uint128 uiZ; + uint_fast16_t uiZ64; + uint_fast64_t uiZ0; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + signA = signExtF80UI64( uiA64 ); + expA = expExtF80UI64( uiA64 ); + sigA = uiA0; + uB.f = b; + uiB64 = uB.s.signExp; + uiB0 = uB.s.signif; + signB = signExtF80UI64( uiB64 ); + expB = expExtF80UI64( uiB64 ); + sigB = uiB0; + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FFF ) { + if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN; + if ( expB == 0x7FFF ) { + if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN; + goto invalid; + } + goto infinity; + } + if ( expB == 0x7FFF ) { + if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN; + goto zero; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) expB = 1; + if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sigB ) { + if ( ! sigA ) goto invalid; + softfloat_raiseFlags( softfloat_flag_infinite ); + goto infinity; + } + normExpSig = softfloat_normSubnormalExtF80Sig( sigB ); + expB += normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) expA = 1; + if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalExtF80Sig( sigA ); + expA += normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA - expB + 0x3FFF; + if ( sigA < sigB ) { + --expZ; + rem = softfloat_shortShiftLeft128( 0, sigA, 32 ); + } else { + rem = softfloat_shortShiftLeft128( 0, sigA, 31 ); + } + recip32 = softfloat_approxRecip32_1( sigB>>32 ); + sigZ = 0; + ix = 2; + for (;;) { + q64 = (uint_fast64_t) (uint32_t) (rem.v64>>2) * recip32; + q = (q64 + 0x80000000)>>32; + --ix; + if ( ix < 0 ) break; + rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 ); + term = softfloat_mul64ByShifted32To128( sigB, q ); + rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 ); + if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) { + --q; + rem = softfloat_add128( rem.v64, rem.v0, sigB>>32, sigB<<32 ); + } + sigZ = (sigZ<<29) + q; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ((q + 1) & 0x3FFFFF) < 2 ) { + rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 ); + term = softfloat_mul64ByShifted32To128( sigB, q ); + rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 ); + term = softfloat_shortShiftLeft128( 0, sigB, 32 ); + if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) { + --q; + rem = softfloat_add128( rem.v64, rem.v0, term.v64, term.v0 ); + } else if ( softfloat_le128( term.v64, term.v0, rem.v64, rem.v0 ) ) { + ++q; + rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 ); + } + if ( rem.v64 | rem.v0 ) q |= 1; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sigZ = (sigZ<<6) + (q>>23); + sigZExtra = (uint64_t) ((uint_fast64_t) q<<41); + return + softfloat_roundPackToExtF80( + signZ, expZ, sigZ, sigZExtra, extF80_roundingPrecision ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 ); + uiZ64 = uiZ.v64; + uiZ0 = uiZ.v0; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ64 = defaultNaNExtF80UI64; + uiZ0 = defaultNaNExtF80UI0; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infinity: + uiZ64 = packToExtF80UI64( signZ, 0x7FFF ); + uiZ0 = UINT64_C( 0x8000000000000000 ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ64 = packToExtF80UI64( signZ, 0 ); + uiZ0 = 0; + uiZ: + uZ.s.signExp = uiZ64; + uZ.s.signif = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_eq.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_eq.c new file mode 100644 index 000000000..60f29dafa --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_eq.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool extF80_eq( extFloat80_t a, extFloat80_t b ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + union { struct extFloat80M s; extFloat80_t f; } uB; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + uB.f = b; + uiB64 = uB.s.signExp; + uiB0 = uB.s.signif; + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + if ( + softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) + || softfloat_isSigNaNExtF80UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + return + (uiA0 == uiB0) + && ((uiA64 == uiB64) || (! uiA0 && ! ((uiA64 | uiB64) & 0x7FFF))); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_eq_signaling.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_eq_signaling.c new file mode 100644 index 000000000..5a0dfe4aa --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_eq_signaling.c @@ -0,0 +1,67 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool extF80_eq_signaling( extFloat80_t a, extFloat80_t b ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + union { struct extFloat80M s; extFloat80_t f; } uB; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + uB.f = b; + uiB64 = uB.s.signExp; + uiB0 = uB.s.signif; + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + return + (uiA0 == uiB0) + && ((uiA64 == uiB64) || (! uiA0 && ! ((uiA64 | uiB64) & 0x7FFF))); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_isSignalingNaN.c new file mode 100644 index 000000000..6086f4b70 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_isSignalingNaN.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool extF80_isSignalingNaN( extFloat80_t a ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + + uA.f = a; + return softfloat_isSigNaNExtF80UI( uA.s.signExp, uA.s.signif ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_le.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_le.c new file mode 100644 index 000000000..2a1ee60f6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_le.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool extF80_le( extFloat80_t a, extFloat80_t b ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + union { struct extFloat80M s; extFloat80_t f; } uB; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + bool signA, signB; + + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + uB.f = b; + uiB64 = uB.s.signExp; + uiB0 = uB.s.signif; + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signExtF80UI64( uiA64 ); + signB = signExtF80UI64( uiB64 ); + return + (signA != signB) + ? signA || ! (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0) + : ((uiA64 == uiB64) && (uiA0 == uiB0)) + || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 )); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_le_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_le_quiet.c new file mode 100644 index 000000000..5d0c3ae73 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_le_quiet.c @@ -0,0 +1,78 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool extF80_le_quiet( extFloat80_t a, extFloat80_t b ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + union { struct extFloat80M s; extFloat80_t f; } uB; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + bool signA, signB; + + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + uB.f = b; + uiB64 = uB.s.signExp; + uiB0 = uB.s.signif; + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + if ( + softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) + || softfloat_isSigNaNExtF80UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signExtF80UI64( uiA64 ); + signB = signExtF80UI64( uiB64 ); + return + (signA != signB) + ? signA || ! (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0) + : ((uiA64 == uiB64) && (uiA0 == uiB0)) + || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 )); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_lt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_lt.c new file mode 100644 index 000000000..9560d8ecc --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_lt.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool extF80_lt( extFloat80_t a, extFloat80_t b ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + union { struct extFloat80M s; extFloat80_t f; } uB; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + bool signA, signB; + + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + uB.f = b; + uiB64 = uB.s.signExp; + uiB0 = uB.s.signif; + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signExtF80UI64( uiA64 ); + signB = signExtF80UI64( uiB64 ); + return + (signA != signB) + ? signA && (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0) + : ((uiA64 != uiB64) || (uiA0 != uiB0)) + && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 )); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_lt_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_lt_quiet.c new file mode 100644 index 000000000..711652c7d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_lt_quiet.c @@ -0,0 +1,78 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool extF80_lt_quiet( extFloat80_t a, extFloat80_t b ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + union { struct extFloat80M s; extFloat80_t f; } uB; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + bool signA, signB; + + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + uB.f = b; + uiB64 = uB.s.signExp; + uiB0 = uB.s.signif; + if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) { + if ( + softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) + || softfloat_isSigNaNExtF80UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signExtF80UI64( uiA64 ); + signB = signExtF80UI64( uiB64 ); + return + (signA != signB) + ? signA && (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0) + : ((uiA64 != uiB64) || (uiA0 != uiB0)) + && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 )); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_mul.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_mul.c new file mode 100644 index 000000000..c0c50a6ca --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_mul.c @@ -0,0 +1,158 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extFloat80_t extF80_mul( extFloat80_t a, extFloat80_t b ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + bool signA; + int_fast32_t expA; + uint_fast64_t sigA; + union { struct extFloat80M s; extFloat80_t f; } uB; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + bool signB; + int_fast32_t expB; + uint_fast64_t sigB; + bool signZ; + uint_fast64_t magBits; + struct exp32_sig64 normExpSig; + int_fast32_t expZ; + struct uint128 sig128Z, uiZ; + uint_fast16_t uiZ64; + uint_fast64_t uiZ0; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + signA = signExtF80UI64( uiA64 ); + expA = expExtF80UI64( uiA64 ); + sigA = uiA0; + uB.f = b; + uiB64 = uB.s.signExp; + uiB0 = uB.s.signif; + signB = signExtF80UI64( uiB64 ); + expB = expExtF80UI64( uiB64 ); + sigB = uiB0; + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FFF ) { + if ( + (sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + || ((expB == 0x7FFF) && (sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ))) + ) { + goto propagateNaN; + } + magBits = expB | sigB; + goto infArg; + } + if ( expB == 0x7FFF ) { + if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN; + magBits = expA | sigA; + goto infArg; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) expA = 1; + if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalExtF80Sig( sigA ); + expA += normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) expB = 1; + if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sigB ) goto zero; + normExpSig = softfloat_normSubnormalExtF80Sig( sigB ); + expB += normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0x3FFE; + sig128Z = softfloat_mul64To128( sigA, sigB ); + if ( sig128Z.v64 < UINT64_C( 0x8000000000000000 ) ) { + --expZ; + sig128Z = + softfloat_add128( + sig128Z.v64, sig128Z.v0, sig128Z.v64, sig128Z.v0 ); + } + return + softfloat_roundPackToExtF80( + signZ, expZ, sig128Z.v64, sig128Z.v0, extF80_roundingPrecision ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 ); + uiZ64 = uiZ.v64; + uiZ0 = uiZ.v0; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infArg: + if ( ! magBits ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ64 = defaultNaNExtF80UI64; + uiZ0 = defaultNaNExtF80UI0; + } else { + uiZ64 = packToExtF80UI64( signZ, 0x7FFF ); + uiZ0 = UINT64_C( 0x8000000000000000 ); + } + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ64 = packToExtF80UI64( signZ, 0 ); + uiZ0 = 0; + uiZ: + uZ.s.signExp = uiZ64; + uZ.s.signif = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_rem.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_rem.c new file mode 100644 index 000000000..a2ebaad81 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_rem.c @@ -0,0 +1,225 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extFloat80_t extF80_rem( extFloat80_t a, extFloat80_t b ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + bool signA; + int_fast32_t expA; + uint_fast64_t sigA; + union { struct extFloat80M s; extFloat80_t f; } uB; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + int_fast32_t expB; + uint_fast64_t sigB; + struct exp32_sig64 normExpSig; + int_fast32_t expDiff; + struct uint128 rem, shiftedSigB; + uint_fast32_t q, recip32; + uint_fast64_t q64; + struct uint128 term, altRem, meanRem; + bool signRem; + struct uint128 uiZ; + uint_fast16_t uiZ64; + uint_fast64_t uiZ0; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + signA = signExtF80UI64( uiA64 ); + expA = expExtF80UI64( uiA64 ); + sigA = uiA0; + uB.f = b; + uiB64 = uB.s.signExp; + uiB0 = uB.s.signif; + expB = expExtF80UI64( uiB64 ); + sigB = uiB0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FFF ) { + if ( + (sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + || ((expB == 0x7FFF) && (sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ))) + ) { + goto propagateNaN; + } + goto invalid; + } + if ( expB == 0x7FFF ) { + if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN; + /*-------------------------------------------------------------------- + | Argument b is an infinity. Doubling `expB' is an easy way to ensure + | that `expDiff' later is less than -1, which will result in returning + | a canonicalized version of argument a. + *--------------------------------------------------------------------*/ + expB += expB; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) expB = 1; + if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sigB ) goto invalid; + normExpSig = softfloat_normSubnormalExtF80Sig( sigB ); + expB += normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) expA = 1; + if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sigA ) { + expA = 0; + goto copyA; + } + normExpSig = softfloat_normSubnormalExtF80Sig( sigA ); + expA += normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( expDiff < -1 ) goto copyA; + rem = softfloat_shortShiftLeft128( 0, sigA, 32 ); + shiftedSigB = softfloat_shortShiftLeft128( 0, sigB, 32 ); + if ( expDiff < 1 ) { + if ( expDiff ) { + --expB; + shiftedSigB = softfloat_shortShiftLeft128( 0, sigB, 33 ); + q = 0; + } else { + q = (sigB <= sigA); + if ( q ) { + rem = + softfloat_sub128( + rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 ); + } + } + } else { + recip32 = softfloat_approxRecip32_1( sigB>>32 ); + expDiff -= 30; + for (;;) { + q64 = (uint_fast64_t) (uint32_t) (rem.v64>>2) * recip32; + if ( expDiff < 0 ) break; + q = (q64 + 0x80000000)>>32; + rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 ); + term = softfloat_mul64ByShifted32To128( sigB, q ); + rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 ); + if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) { + rem = + softfloat_add128( + rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 ); + } + expDiff -= 29; + } + /*-------------------------------------------------------------------- + | (`expDiff' cannot be less than -29 here.) + *--------------------------------------------------------------------*/ + q = (uint32_t) (q64>>32)>>(~expDiff & 31); + rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, expDiff + 30 ); + term = softfloat_mul64ByShifted32To128( sigB, q ); + rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 ); + if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) { + altRem = + softfloat_add128( + rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 ); + goto selectRem; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + do { + altRem = rem; + ++q; + rem = + softfloat_sub128( + rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 ); + } while ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) ); + selectRem: + meanRem = softfloat_add128( rem.v64, rem.v0, altRem.v64, altRem.v0 ); + if ( + (meanRem.v64 & UINT64_C( 0x8000000000000000 )) + || (! (meanRem.v64 | meanRem.v0) && (q & 1)) + ) { + rem = altRem; + } + signRem = signA; + if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) { + signRem = ! signRem; + rem = softfloat_sub128( 0, 0, rem.v64, rem.v0 ); + } + return + softfloat_normRoundPackToExtF80( + signRem, rem.v64 | rem.v0 ? expB + 32 : 0, rem.v64, rem.v0, 80 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 ); + uiZ64 = uiZ.v64; + uiZ0 = uiZ.v0; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ64 = defaultNaNExtF80UI64; + uiZ0 = defaultNaNExtF80UI0; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + copyA: + if ( expA < 1 ) { + sigA >>= 1 - expA; + expA = 0; + } + uiZ64 = packToExtF80UI64( signA, expA ); + uiZ0 = sigA; + uiZ: + uZ.s.signExp = uiZ64; + uZ.s.signif = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_roundToInt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_roundToInt.c new file mode 100644 index 000000000..8103dae8f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_roundToInt.c @@ -0,0 +1,154 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extFloat80_t + extF80_roundToInt( extFloat80_t a, uint_fast8_t roundingMode, bool exact ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64, signUI64; + int_fast32_t exp; + uint_fast64_t sigA; + uint_fast16_t uiZ64; + uint_fast64_t sigZ; + struct exp32_sig64 normExpSig; + struct uint128 uiZ; + uint_fast64_t lastBitMask, roundBitsMask; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + signUI64 = uiA64 & packToExtF80UI64( 1, 0 ); + exp = expExtF80UI64( uiA64 ); + sigA = uA.s.signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( !(sigA & UINT64_C( 0x8000000000000000 )) && (exp != 0x7FFF) ) { + if ( !sigA ) { + uiZ64 = signUI64; + sigZ = 0; + goto uiZ; + } + normExpSig = softfloat_normSubnormalExtF80Sig( sigA ); + exp += normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x403E <= exp ) { + if ( exp == 0x7FFF ) { + if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + uiZ = softfloat_propagateNaNExtF80UI( uiA64, sigA, 0, 0 ); + uiZ64 = uiZ.v64; + sigZ = uiZ.v0; + goto uiZ; + } + sigZ = UINT64_C( 0x8000000000000000 ); + } else { + sigZ = sigA; + } + uiZ64 = signUI64 | exp; + goto uiZ; + } + if ( exp <= 0x3FFE ) { + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + switch ( roundingMode ) { + case softfloat_round_near_even: + if ( !(sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) break; + case softfloat_round_near_maxMag: + if ( exp == 0x3FFE ) goto mag1; + break; + case softfloat_round_min: + if ( signUI64 ) goto mag1; + break; + case softfloat_round_max: + if ( !signUI64 ) goto mag1; + break; +#ifdef SOFTFLOAT_ROUND_ODD + case softfloat_round_odd: + goto mag1; +#endif + } + uiZ64 = signUI64; + sigZ = 0; + goto uiZ; + mag1: + uiZ64 = signUI64 | 0x3FFF; + sigZ = UINT64_C( 0x8000000000000000 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ64 = signUI64 | exp; + lastBitMask = (uint_fast64_t) 1<<(0x403E - exp); + roundBitsMask = lastBitMask - 1; + sigZ = sigA; + if ( roundingMode == softfloat_round_near_maxMag ) { + sigZ += lastBitMask>>1; + } else if ( roundingMode == softfloat_round_near_even ) { + sigZ += lastBitMask>>1; + if ( !(sigZ & roundBitsMask) ) sigZ &= ~lastBitMask; + } else if ( + roundingMode == (signUI64 ? softfloat_round_min : softfloat_round_max) + ) { + sigZ += roundBitsMask; + } + sigZ &= ~roundBitsMask; + if ( !sigZ ) { + ++uiZ64; + sigZ = UINT64_C( 0x8000000000000000 ); + } + if ( sigZ != sigA ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) sigZ |= lastBitMask; +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + uiZ: + uZ.s.signExp = uiZ64; + uZ.s.signif = sigZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_sqrt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_sqrt.c new file mode 100644 index 000000000..5d328a0e4 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_sqrt.c @@ -0,0 +1,176 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extFloat80_t extF80_sqrt( extFloat80_t a ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + bool signA; + int_fast32_t expA; + uint_fast64_t sigA; + struct uint128 uiZ; + uint_fast16_t uiZ64; + uint_fast64_t uiZ0; + struct exp32_sig64 normExpSig; + int_fast32_t expZ; + uint_fast32_t sig32A, recipSqrt32, sig32Z; + struct uint128 rem; + uint_fast64_t q, x64, sigZ; + struct uint128 y, term; + uint_fast64_t sigZExtra; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + signA = signExtF80UI64( uiA64 ); + expA = expExtF80UI64( uiA64 ); + sigA = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FFF ) { + if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, 0, 0 ); + uiZ64 = uiZ.v64; + uiZ0 = uiZ.v0; + goto uiZ; + } + if ( ! signA ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( signA ) { + if ( ! sigA ) goto zero; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) expA = 1; + if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalExtF80Sig( sigA ); + expA += normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + | (`sig32Z' is guaranteed to be a lower bound on the square root of + | `sig32A', which makes `sig32Z' also a lower bound on the square root of + | `sigA'.) + *------------------------------------------------------------------------*/ + expZ = ((expA - 0x3FFF)>>1) + 0x3FFF; + expA &= 1; + sig32A = sigA>>32; + recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A ); + sig32Z = ((uint_fast64_t) sig32A * recipSqrt32)>>32; + if ( expA ) { + sig32Z >>= 1; + rem = softfloat_shortShiftLeft128( 0, sigA, 61 ); + } else { + rem = softfloat_shortShiftLeft128( 0, sigA, 62 ); + } + rem.v64 -= (uint_fast64_t) sig32Z * sig32Z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + q = ((uint32_t) (rem.v64>>2) * (uint_fast64_t) recipSqrt32)>>32; + x64 = (uint_fast64_t) sig32Z<<32; + sigZ = x64 + (q<<3); + y = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 ); + /*------------------------------------------------------------------------ + | (Repeating this loop is a rare occurrence.) + *------------------------------------------------------------------------*/ + for (;;) { + term = softfloat_mul64ByShifted32To128( x64 + sigZ, q ); + rem = softfloat_sub128( y.v64, y.v0, term.v64, term.v0 ); + if ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) ) break; + --q; + sigZ -= 1<<3; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + q = (((rem.v64>>2) * recipSqrt32)>>32) + 2; + x64 = sigZ; + sigZ = (sigZ<<1) + (q>>25); + sigZExtra = (uint64_t) (q<<39); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (q & 0xFFFFFF) <= 2 ) { + q &= ~(uint_fast64_t) 0xFFFF; + sigZExtra = (uint64_t) (q<<39); + term = softfloat_mul64ByShifted32To128( x64 + (q>>27), q ); + x64 = (uint32_t) (q<<5) * (uint_fast64_t) (uint32_t) q; + term = softfloat_add128( term.v64, term.v0, 0, x64 ); + rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 28 ); + rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 ); + if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) { + if ( ! sigZExtra ) --sigZ; + --sigZExtra; + } else { + if ( rem.v64 | rem.v0 ) sigZExtra |= 1; + } + } + return + softfloat_roundPackToExtF80( + 0, expZ, sigZ, sigZExtra, extF80_roundingPrecision ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ64 = defaultNaNExtF80UI64; + uiZ0 = defaultNaNExtF80UI0; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ64 = packToExtF80UI64( signA, 0 ); + uiZ0 = 0; + uiZ: + uZ.s.signExp = uiZ64; + uZ.s.signif = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_sub.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_sub.c new file mode 100644 index 000000000..494d3162c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_sub.c @@ -0,0 +1,80 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +extFloat80_t extF80_sub( extFloat80_t a, extFloat80_t b ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + bool signA; + union { struct extFloat80M s; extFloat80_t f; } uB; + uint_fast16_t uiB64; + uint_fast64_t uiB0; + bool signB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2) + extFloat80_t + (*magsFuncPtr)( + uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool ); +#endif + + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + signA = signExtF80UI64( uiA64 ); + uB.f = b; + uiB64 = uB.s.signExp; + uiB0 = uB.s.signif; + signB = signExtF80UI64( uiB64 ); +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) + if ( signA == signB ) { + return softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA ); + } else { + return softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA ); + } +#else + magsFuncPtr = + (signA == signB) ? softfloat_subMagsExtF80 : softfloat_addMagsExtF80; + return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f128.c new file mode 100644 index 000000000..7fbc9cb69 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f128.c @@ -0,0 +1,75 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float128_t extF80_to_f128( extFloat80_t a ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + uint_fast16_t exp; + uint_fast64_t frac; + struct commonNaN commonNaN; + struct uint128 uiZ; + bool sign; + struct uint128 frac128; + union ui128_f128 uZ; + + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + exp = expExtF80UI64( uiA64 ); + frac = uiA0 & UINT64_C( 0x7FFFFFFFFFFFFFFF ); + if ( (exp == 0x7FFF) && frac ) { + softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN ); + uiZ = softfloat_commonNaNToF128UI( &commonNaN ); + } else { + sign = signExtF80UI64( uiA64 ); + frac128 = softfloat_shortShiftLeft128( 0, frac, 49 ); + uiZ.v64 = packToF128UI64( sign, exp, frac128.v64 ); + uiZ.v0 = frac128.v0; + } + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f16.c new file mode 100644 index 000000000..ca5050f4c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f16.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t extF80_to_f16( extFloat80_t a ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t sig; + struct commonNaN commonNaN; + uint_fast16_t uiZ, sig16; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN ); + uiZ = softfloat_commonNaNToF16UI( &commonNaN ); + } else { + uiZ = packToF16UI( sign, 0x1F, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig16 = softfloat_shortShiftRightJam64( sig, 49 ); + if ( ! (exp | sig16) ) { + uiZ = packToF16UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + exp -= 0x3FF1; + if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) { + if ( exp < -0x40 ) exp = -0x40; + } + return softfloat_roundPackToF16( sign, exp, sig16 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f32.c new file mode 100644 index 000000000..357f56e9d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f32.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t extF80_to_f32( extFloat80_t a ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t sig; + struct commonNaN commonNaN; + uint_fast32_t uiZ, sig32; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN ); + uiZ = softfloat_commonNaNToF32UI( &commonNaN ); + } else { + uiZ = packToF32UI( sign, 0xFF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig32 = softfloat_shortShiftRightJam64( sig, 33 ); + if ( ! (exp | sig32) ) { + uiZ = packToF32UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + exp -= 0x3F81; + if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) { + if ( exp < -0x1000 ) exp = -0x1000; + } + return softfloat_roundPackToF32( sign, exp, sig32 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f64.c new file mode 100644 index 000000000..c38739925 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_f64.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float64_t extF80_to_f64( extFloat80_t a ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + uint_fast64_t uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t sig; + struct commonNaN commonNaN; + uint_fast64_t uiZ; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + uiA0 = uA.s.signif; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! (exp | sig) ) { + uiZ = packToF64UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN ); + uiZ = softfloat_commonNaNToF64UI( &commonNaN ); + } else { + uiZ = packToF64UI( sign, 0x7FF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig = softfloat_shortShiftRightJam64( sig, 1 ); + exp -= 0x3C01; + if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) { + if ( exp < -0x1000 ) exp = -0x1000; + } + return softfloat_roundPackToF64( sign, exp, sig ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i32.c new file mode 100644 index 000000000..549ca7659 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i32.c @@ -0,0 +1,83 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t + extF80_to_i32( extFloat80_t a, uint_fast8_t roundingMode, bool exact ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + bool sign; + int_fast32_t exp; + uint_fast64_t sig; + int_fast32_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = uA.s.signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ +#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow) + if ( (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) { +#if (i32_fromNaN == i32_fromPosOverflow) + sign = 0; +#elif (i32_fromNaN == i32_fromNegOverflow) + sign = 1; +#else + softfloat_raiseFlags( softfloat_flag_invalid ); + return i32_fromNaN; +#endif + } +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x4032 - exp; + if ( shiftDist <= 0 ) shiftDist = 1; + sig = softfloat_shiftRightJam64( sig, shiftDist ); + return softfloat_roundToI32( sign, sig, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i32_r_minMag.c new file mode 100644 index 000000000..2b7b9e2b2 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i32_r_minMag.c @@ -0,0 +1,97 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t extF80_to_i32_r_minMag( extFloat80_t a, bool exact ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + int_fast32_t exp; + uint_fast64_t sig; + int_fast32_t shiftDist; + bool sign; + int_fast32_t absZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + exp = expExtF80UI64( uiA64 ); + sig = uA.s.signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x403E - exp; + if ( 64 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signExtF80UI64( uiA64 ); + if ( shiftDist < 33 ) { + if ( + (uiA64 == packToExtF80UI64( 1, 0x401E )) + && (sig < UINT64_C( 0x8000000100000000 )) + ) { + if ( exact && (sig & UINT64_C( 0x00000000FFFFFFFF )) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return -0x7FFFFFFF - 1; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + absZ = sig>>shiftDist; + if ( exact && ((uint_fast64_t) (uint_fast32_t) absZ<<shiftDist != sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return sign ? -absZ : absZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i64.c new file mode 100644 index 000000000..35f55de85 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i64.c @@ -0,0 +1,89 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t + extF80_to_i64( extFloat80_t a, uint_fast8_t roundingMode, bool exact ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + bool sign; + int_fast32_t exp; + uint_fast64_t sig; + int_fast32_t shiftDist; + uint_fast64_t sigExtra; + struct uint64_extra sig64Extra; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = uA.s.signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x403E - exp; + if ( shiftDist <= 0 ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( shiftDist ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sigExtra = 0; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sig64Extra = softfloat_shiftRightJam64Extra( sig, 0, shiftDist ); + sig = sig64Extra.v; + sigExtra = sig64Extra.extra; + } + return softfloat_roundToI64( sign, sig, sigExtra, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i64_r_minMag.c new file mode 100644 index 000000000..215876da7 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_i64_r_minMag.c @@ -0,0 +1,94 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t extF80_to_i64_r_minMag( extFloat80_t a, bool exact ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + int_fast32_t exp; + uint_fast64_t sig; + int_fast32_t shiftDist; + bool sign; + int_fast64_t absZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + exp = expExtF80UI64( uiA64 ); + sig = uA.s.signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x403E - exp; + if ( 64 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signExtF80UI64( uiA64 ); + if ( shiftDist <= 0 ) { + if ( + (uiA64 == packToExtF80UI64( 1, 0x403E )) + && (sig == UINT64_C( 0x8000000000000000 )) + ) { + return -INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + absZ = sig>>shiftDist; + if ( exact && (uint64_t) (sig<<(-shiftDist & 63)) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return sign ? -absZ : absZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui32.c new file mode 100644 index 000000000..d121c4801 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui32.c @@ -0,0 +1,83 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t + extF80_to_ui32( extFloat80_t a, uint_fast8_t roundingMode, bool exact ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + bool sign; + int_fast32_t exp; + uint_fast64_t sig; + int_fast32_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = uA.s.signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ +#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow) + if ( (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) { +#if (ui32_fromNaN == ui32_fromPosOverflow) + sign = 0; +#elif (ui32_fromNaN == ui32_fromNegOverflow) + sign = 1; +#else + softfloat_raiseFlags( softfloat_flag_invalid ); + return ui32_fromNaN; +#endif + } +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x4032 - exp; + if ( shiftDist <= 0 ) shiftDist = 1; + sig = softfloat_shiftRightJam64( sig, shiftDist ); + return softfloat_roundToUI32( sign, sig, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui32_r_minMag.c new file mode 100644 index 000000000..ad3048340 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui32_r_minMag.c @@ -0,0 +1,88 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t extF80_to_ui32_r_minMag( extFloat80_t a, bool exact ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + int_fast32_t exp; + uint_fast64_t sig; + int_fast32_t shiftDist; + bool sign; + uint_fast32_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + exp = expExtF80UI64( uiA64 ); + sig = uA.s.signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x403E - exp; + if ( 64 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signExtF80UI64( uiA64 ); + if ( sign || (shiftDist < 32) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + ? ui32_fromNaN + : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + z = sig>>shiftDist; + if ( exact && ((uint_fast64_t) z<<shiftDist != sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return z; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui64.c new file mode 100644 index 000000000..a81bbd1b8 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui64.c @@ -0,0 +1,84 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t + extF80_to_ui64( extFloat80_t a, uint_fast8_t roundingMode, bool exact ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + bool sign; + int_fast32_t exp; + uint_fast64_t sig; + int_fast32_t shiftDist; + uint_fast64_t sigExtra; + struct uint64_extra sig64Extra; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + sign = signExtF80UI64( uiA64 ); + exp = expExtF80UI64( uiA64 ); + sig = uA.s.signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x403E - exp; + if ( shiftDist < 0 ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sigExtra = 0; + if ( shiftDist ) { + sig64Extra = softfloat_shiftRightJam64Extra( sig, 0, shiftDist ); + sig = sig64Extra.v; + sigExtra = sig64Extra.extra; + } + return softfloat_roundToUI64( sign, sig, sigExtra, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui64_r_minMag.c new file mode 100644 index 000000000..65adfe7e8 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/extF80_to_ui64_r_minMag.c @@ -0,0 +1,88 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t extF80_to_ui64_r_minMag( extFloat80_t a, bool exact ) +{ + union { struct extFloat80M s; extFloat80_t f; } uA; + uint_fast16_t uiA64; + int_fast32_t exp; + uint_fast64_t sig; + int_fast32_t shiftDist; + bool sign; + uint_fast64_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.s.signExp; + exp = expExtF80UI64( uiA64 ); + sig = uA.s.signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x403E - exp; + if ( 64 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signExtF80UI64( uiA64 ); + if ( sign || (shiftDist < 0) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + z = sig>>shiftDist; + if ( exact && (z<<shiftDist != sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return z; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_add.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_add.c new file mode 100644 index 000000000..f39b1ff70 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_add.c @@ -0,0 +1,97 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + f128M_add( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr ) +{ + const uint64_t *aWPtr, *bWPtr; + uint_fast64_t uiA64, uiA0; + bool signA; + uint_fast64_t uiB64, uiB0; + bool signB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2) + float128_t + (*magsFuncPtr)( + uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool ); +#endif + + aWPtr = (const uint64_t *) aPtr; + bWPtr = (const uint64_t *) bPtr; + uiA64 = aWPtr[indexWord( 2, 1 )]; + uiA0 = aWPtr[indexWord( 2, 0 )]; + signA = signF128UI64( uiA64 ); + uiB64 = bWPtr[indexWord( 2, 1 )]; + uiB0 = bWPtr[indexWord( 2, 0 )]; + signB = signF128UI64( uiB64 ); +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) + if ( signA == signB ) { + *zPtr = softfloat_addMagsF128( uiA64, uiA0, uiB64, uiB0, signA ); + } else { + *zPtr = softfloat_subMagsF128( uiA64, uiA0, uiB64, uiB0, signA ); + } +#else + magsFuncPtr = + (signA == signB) ? softfloat_addMagsF128 : softfloat_subMagsF128; + *zPtr = (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA ); +#endif + +} + +#else + +void + f128M_add( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr ) +{ + + softfloat_addF128M( + (const uint32_t *) aPtr, + (const uint32_t *) bPtr, + (uint32_t *) zPtr, + false + ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_div.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_div.c new file mode 100644 index 000000000..8355dc20a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_div.c @@ -0,0 +1,187 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + f128M_div( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr ) +{ + + *zPtr = f128_div( *aPtr, *bPtr ); + +} + +#else + +void + f128M_div( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr ) +{ + const uint32_t *aWPtr, *bWPtr; + uint32_t *zWPtr, uiA96; + bool signA; + int32_t expA; + uint32_t uiB96; + bool signB; + int32_t expB; + bool signZ; + uint32_t y[5], sigB[4]; + int32_t expZ; + uint32_t recip32; + int ix; + uint64_t q64; + uint32_t q, qs[3], uiZ96; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + bWPtr = (const uint32_t *) bPtr; + zWPtr = (uint32_t *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA96 = aWPtr[indexWordHi( 4 )]; + signA = signF128UI96( uiA96 ); + expA = expF128UI96( uiA96 ); + uiB96 = bWPtr[indexWordHi( 4 )]; + signB = signF128UI96( uiB96 ); + expB = expF128UI96( uiB96 ); + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) { + if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) return; + if ( expA == 0x7FFF ) { + if ( expB == 0x7FFF ) goto invalid; + goto infinity; + } + goto zero; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = softfloat_shiftNormSigF128M( aWPtr, 13, y ); + expB = softfloat_shiftNormSigF128M( bWPtr, 13, sigB ); + if ( expA == -128 ) { + if ( expB == -128 ) goto invalid; + goto zero; + } + if ( expB == -128 ) { + softfloat_raiseFlags( softfloat_flag_infinite ); + goto infinity; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA - expB + 0x3FFE; + if ( softfloat_compare128M( y, sigB ) < 0 ) { + --expZ; + softfloat_add128M( y, y, y ); + } + recip32 = + softfloat_approxRecip32_1( + ((uint64_t) sigB[indexWord( 4, 3 )]<<32 | sigB[indexWord( 4, 2 )]) + >>30 + ); + ix = 3; + for (;;) { + q64 = (uint64_t) y[indexWordHi( 4 )] * recip32; + q = (q64 + 0x80000000)>>32; + --ix; + if ( ix < 0 ) break; + softfloat_remStep128MBy32( y, 29, sigB, q, y ); + if ( y[indexWordHi( 4 )] & 0x80000000 ) { + --q; + softfloat_add128M( y, sigB, y ); + } + qs[ix] = q; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ((q + 1) & 7) < 2 ) { + softfloat_remStep128MBy32( y, 29, sigB, q, y ); + if ( y[indexWordHi( 4 )] & 0x80000000 ) { + --q; + softfloat_add128M( y, sigB, y ); + } else if ( softfloat_compare128M( sigB, y ) <= 0 ) { + ++q; + softfloat_sub128M( y, sigB, y ); + } + if ( + y[indexWordLo( 4 )] || y[indexWord( 4, 1 )] + || (y[indexWord( 4, 2 )] | y[indexWord( 4, 3 )]) + ) { + q |= 1; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + q64 = (uint64_t) q<<28; + y[indexWord( 5, 0 )] = q64; + q64 = ((uint64_t) qs[0]<<25) + (q64>>32); + y[indexWord( 5, 1 )] = q64; + q64 = ((uint64_t) qs[1]<<22) + (q64>>32); + y[indexWord( 5, 2 )] = q64; + q64 = ((uint64_t) qs[2]<<19) + (q64>>32); + y[indexWord( 5, 3 )] = q64; + y[indexWord( 5, 4 )] = q64>>32; + softfloat_roundPackMToF128M( signZ, expZ, y, zWPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_invalidF128M( zWPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infinity: + uiZ96 = packToF128UI96( signZ, 0x7FFF, 0 ); + goto uiZ96; + zero: + uiZ96 = packToF128UI96( signZ, 0, 0 ); + uiZ96: + zWPtr[indexWordHi( 4 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = 0; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_eq.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_eq.c new file mode 100644 index 000000000..4f28f5f31 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_eq.c @@ -0,0 +1,100 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool f128M_eq( const float128_t *aPtr, const float128_t *bPtr ) +{ + + return f128_eq( *aPtr, *bPtr ); + +} + +#else + +bool f128M_eq( const float128_t *aPtr, const float128_t *bPtr ) +{ + const uint32_t *aWPtr, *bWPtr; + uint32_t wordA, wordB, uiA96, uiB96; + bool possibleOppositeZeros; + uint32_t mashWord; + + aWPtr = (const uint32_t *) aPtr; + bWPtr = (const uint32_t *) bPtr; + wordA = aWPtr[indexWord( 4, 2 )]; + wordB = bWPtr[indexWord( 4, 2 )]; + if ( wordA != wordB ) goto false_checkSigNaNs; + uiA96 = aWPtr[indexWordHi( 4 )]; + uiB96 = bWPtr[indexWordHi( 4 )]; + possibleOppositeZeros = false; + if ( uiA96 != uiB96 ) { + possibleOppositeZeros = (((uiA96 | uiB96) & 0x7FFFFFFF) == 0); + if ( ! possibleOppositeZeros ) goto false_checkSigNaNs; + } + mashWord = wordA | wordB; + wordA = aWPtr[indexWord( 4, 1 )]; + wordB = bWPtr[indexWord( 4, 1 )]; + if ( wordA != wordB ) goto false_checkSigNaNs; + mashWord |= wordA | wordB; + wordA = aWPtr[indexWord( 4, 0 )]; + wordB = bWPtr[indexWord( 4, 0 )]; + if ( wordA != wordB ) goto false_checkSigNaNs; + if ( possibleOppositeZeros && ((mashWord | wordA | wordB) != 0) ) { + goto false_checkSigNaNs; + } + if ( ! softfloat_isNaNF128M( aWPtr ) && ! softfloat_isNaNF128M( bWPtr ) ) { + return true; + } + false_checkSigNaNs: + if ( + f128M_isSignalingNaN( (const float128_t *) aWPtr ) + || f128M_isSignalingNaN( (const float128_t *) bWPtr ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_eq_signaling.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_eq_signaling.c new file mode 100644 index 000000000..d2ea5f434 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_eq_signaling.c @@ -0,0 +1,92 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool f128M_eq_signaling( const float128_t *aPtr, const float128_t *bPtr ) +{ + + return f128_eq_signaling( *aPtr, *bPtr ); + +} + +#else + +bool f128M_eq_signaling( const float128_t *aPtr, const float128_t *bPtr ) +{ + const uint32_t *aWPtr, *bWPtr; + uint32_t wordA, wordB, uiA96, uiB96; + bool possibleOppositeZeros; + uint32_t mashWord; + + aWPtr = (const uint32_t *) aPtr; + bWPtr = (const uint32_t *) bPtr; + if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + wordA = aWPtr[indexWord( 4, 2 )]; + wordB = bWPtr[indexWord( 4, 2 )]; + if ( wordA != wordB ) return false; + uiA96 = aWPtr[indexWordHi( 4 )]; + uiB96 = bWPtr[indexWordHi( 4 )]; + possibleOppositeZeros = false; + if ( uiA96 != uiB96 ) { + possibleOppositeZeros = (((uiA96 | uiB96) & 0x7FFFFFFF) == 0); + if ( ! possibleOppositeZeros ) return false; + } + mashWord = wordA | wordB; + wordA = aWPtr[indexWord( 4, 1 )]; + wordB = bWPtr[indexWord( 4, 1 )]; + if ( wordA != wordB ) return false; + mashWord |= wordA | wordB; + wordA = aWPtr[indexWord( 4, 0 )]; + wordB = bWPtr[indexWord( 4, 0 )]; + return + (wordA == wordB) + && (! possibleOppositeZeros || ((mashWord | wordA | wordB) == 0)); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_le.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_le.c new file mode 100644 index 000000000..af1dcba74 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_le.c @@ -0,0 +1,93 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool f128M_le( const float128_t *aPtr, const float128_t *bPtr ) +{ + + return f128_le( *aPtr, *bPtr ); + +} + +#else + +bool f128M_le( const float128_t *aPtr, const float128_t *bPtr ) +{ + const uint32_t *aWPtr, *bWPtr; + uint32_t uiA96, uiB96; + bool signA, signB; + uint32_t wordA, wordB; + + aWPtr = (const uint32_t *) aPtr; + bWPtr = (const uint32_t *) bPtr; + if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + uiA96 = aWPtr[indexWordHi( 4 )]; + uiB96 = bWPtr[indexWordHi( 4 )]; + signA = signF128UI96( uiA96 ); + signB = signF128UI96( uiB96 ); + if ( signA != signB ) { + if ( signA ) return true; + if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return false; + wordA = aWPtr[indexWord( 4, 2 )]; + wordB = bWPtr[indexWord( 4, 2 )]; + if ( wordA | wordB ) return false; + wordA = aWPtr[indexWord( 4, 1 )]; + wordB = bWPtr[indexWord( 4, 1 )]; + if ( wordA | wordB ) return false; + wordA = aWPtr[indexWord( 4, 0 )]; + wordB = bWPtr[indexWord( 4, 0 )]; + return ((wordA | wordB) == 0); + } + if ( signA ) { + aWPtr = (const uint32_t *) bPtr; + bWPtr = (const uint32_t *) aPtr; + } + return (softfloat_compare128M( aWPtr, bWPtr ) <= 0); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_le_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_le_quiet.c new file mode 100644 index 000000000..0d051b656 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_le_quiet.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool f128M_le_quiet( const float128_t *aPtr, const float128_t *bPtr ) +{ + + return f128_le_quiet( *aPtr, *bPtr ); + +} + +#else + +bool f128M_le_quiet( const float128_t *aPtr, const float128_t *bPtr ) +{ + const uint32_t *aWPtr, *bWPtr; + uint32_t uiA96, uiB96; + bool signA, signB; + uint32_t wordA, wordB; + + aWPtr = (const uint32_t *) aPtr; + bWPtr = (const uint32_t *) bPtr; + if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) { + if ( f128M_isSignalingNaN( aPtr ) || f128M_isSignalingNaN( bPtr ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + uiA96 = aWPtr[indexWordHi( 4 )]; + uiB96 = bWPtr[indexWordHi( 4 )]; + signA = signF128UI96( uiA96 ); + signB = signF128UI96( uiB96 ); + if ( signA != signB ) { + if ( signA ) return true; + if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return false; + wordA = aWPtr[indexWord( 4, 2 )]; + wordB = bWPtr[indexWord( 4, 2 )]; + if ( wordA | wordB ) return false; + wordA = aWPtr[indexWord( 4, 1 )]; + wordB = bWPtr[indexWord( 4, 1 )]; + if ( wordA | wordB ) return false; + wordA = aWPtr[indexWord( 4, 0 )]; + wordB = bWPtr[indexWord( 4, 0 )]; + return ((wordA | wordB) == 0); + } + if ( signA ) { + aWPtr = (const uint32_t *) bPtr; + bWPtr = (const uint32_t *) aPtr; + } + return (softfloat_compare128M( aWPtr, bWPtr ) <= 0); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_lt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_lt.c new file mode 100644 index 000000000..64ff9b45d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_lt.c @@ -0,0 +1,93 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool f128M_lt( const float128_t *aPtr, const float128_t *bPtr ) +{ + + return f128_lt( *aPtr, *bPtr ); + +} + +#else + +bool f128M_lt( const float128_t *aPtr, const float128_t *bPtr ) +{ + const uint32_t *aWPtr, *bWPtr; + uint32_t uiA96, uiB96; + bool signA, signB; + uint32_t wordA, wordB; + + aWPtr = (const uint32_t *) aPtr; + bWPtr = (const uint32_t *) bPtr; + if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + uiA96 = aWPtr[indexWordHi( 4 )]; + uiB96 = bWPtr[indexWordHi( 4 )]; + signA = signF128UI96( uiA96 ); + signB = signF128UI96( uiB96 ); + if ( signA != signB ) { + if ( signB ) return false; + if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return true; + wordA = aWPtr[indexWord( 4, 2 )]; + wordB = bWPtr[indexWord( 4, 2 )]; + if ( wordA | wordB ) return true; + wordA = aWPtr[indexWord( 4, 1 )]; + wordB = bWPtr[indexWord( 4, 1 )]; + if ( wordA | wordB ) return true; + wordA = aWPtr[indexWord( 4, 0 )]; + wordB = bWPtr[indexWord( 4, 0 )]; + return ((wordA | wordB) != 0); + } + if ( signA ) { + aWPtr = (const uint32_t *) bPtr; + bWPtr = (const uint32_t *) aPtr; + } + return (softfloat_compare128M( aWPtr, bWPtr ) < 0); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_lt_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_lt_quiet.c new file mode 100644 index 000000000..6ccf3c861 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_lt_quiet.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +bool f128M_lt_quiet( const float128_t *aPtr, const float128_t *bPtr ) +{ + + return f128_lt_quiet( *aPtr, *bPtr ); + +} + +#else + +bool f128M_lt_quiet( const float128_t *aPtr, const float128_t *bPtr ) +{ + const uint32_t *aWPtr, *bWPtr; + uint32_t uiA96, uiB96; + bool signA, signB; + uint32_t wordA, wordB; + + aWPtr = (const uint32_t *) aPtr; + bWPtr = (const uint32_t *) bPtr; + if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) { + if ( f128M_isSignalingNaN( aPtr ) || f128M_isSignalingNaN( bPtr ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + uiA96 = aWPtr[indexWordHi( 4 )]; + uiB96 = bWPtr[indexWordHi( 4 )]; + signA = signF128UI96( uiA96 ); + signB = signF128UI96( uiB96 ); + if ( signA != signB ) { + if ( signB ) return false; + if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return true; + wordA = aWPtr[indexWord( 4, 2 )]; + wordB = bWPtr[indexWord( 4, 2 )]; + if ( wordA | wordB ) return true; + wordA = aWPtr[indexWord( 4, 1 )]; + wordB = bWPtr[indexWord( 4, 1 )]; + if ( wordA | wordB ) return true; + wordA = aWPtr[indexWord( 4, 0 )]; + wordB = bWPtr[indexWord( 4, 0 )]; + return ((wordA | wordB) != 0); + } + if ( signA ) { + aWPtr = (const uint32_t *) bPtr; + bWPtr = (const uint32_t *) aPtr; + } + return (softfloat_compare128M( aWPtr, bWPtr ) < 0); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_mul.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_mul.c new file mode 100644 index 000000000..f2d6051e0 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_mul.c @@ -0,0 +1,158 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + f128M_mul( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr ) +{ + + *zPtr = f128_mul( *aPtr, *bPtr ); + +} + +#else + +void + f128M_mul( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr ) +{ + const uint32_t *aWPtr, *bWPtr; + uint32_t *zWPtr; + uint32_t uiA96; + int32_t expA; + uint32_t uiB96; + int32_t expB; + bool signZ; + const uint32_t *ptr; + uint32_t uiZ96, sigA[4]; + uint_fast8_t shiftDist; + uint32_t sigB[4]; + int32_t expZ; + uint32_t sigProd[8], *extSigZPtr; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + bWPtr = (const uint32_t *) bPtr; + zWPtr = (uint32_t *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA96 = aWPtr[indexWordHi( 4 )]; + expA = expF128UI96( uiA96 ); + uiB96 = bWPtr[indexWordHi( 4 )]; + expB = expF128UI96( uiB96 ); + signZ = signF128UI96( uiA96 ) ^ signF128UI96( uiB96 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) { + if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) return; + ptr = aWPtr; + if ( ! expA ) goto possiblyInvalid; + if ( ! expB ) { + ptr = bWPtr; + possiblyInvalid: + if ( + ! fracF128UI96( ptr[indexWordHi( 4 )] ) + && ! (ptr[indexWord( 4, 2 )] | ptr[indexWord( 4, 1 )] + | ptr[indexWord( 4, 0 )]) + ) { + softfloat_invalidF128M( zWPtr ); + return; + } + } + uiZ96 = packToF128UI96( signZ, 0x7FFF, 0 ); + goto uiZ96; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA ) { + sigA[indexWordHi( 4 )] = fracF128UI96( uiA96 ) | 0x00010000; + sigA[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )]; + sigA[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )]; + sigA[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )]; + } else { + expA = softfloat_shiftNormSigF128M( aWPtr, 0, sigA ); + if ( expA == -128 ) goto zero; + } + if ( expB ) { + sigB[indexWordHi( 4 )] = fracF128UI96( uiB96 ) | 0x00010000; + sigB[indexWord( 4, 2 )] = bWPtr[indexWord( 4, 2 )]; + sigB[indexWord( 4, 1 )] = bWPtr[indexWord( 4, 1 )]; + sigB[indexWord( 4, 0 )] = bWPtr[indexWord( 4, 0 )]; + } else { + expB = softfloat_shiftNormSigF128M( bWPtr, 0, sigB ); + if ( expB == -128 ) goto zero; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0x4000; + softfloat_mul128MTo256M( sigA, sigB, sigProd ); + if ( + sigProd[indexWord( 8, 2 )] + || (sigProd[indexWord( 8, 1 )] | sigProd[indexWord( 8, 0 )]) + ) { + sigProd[indexWord( 8, 3 )] |= 1; + } + extSigZPtr = &sigProd[indexMultiwordHi( 8, 5 )]; + shiftDist = 16; + if ( extSigZPtr[indexWordHi( 5 )] & 2 ) { + ++expZ; + shiftDist = 15; + } + softfloat_shortShiftLeft160M( extSigZPtr, shiftDist, extSigZPtr ); + softfloat_roundPackMToF128M( signZ, expZ, extSigZPtr, zWPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ96 = packToF128UI96( signZ, 0, 0 ); + uiZ96: + zWPtr[indexWordHi( 4 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = 0; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_mulAdd.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_mulAdd.c new file mode 100644 index 000000000..e2f95df01 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_mulAdd.c @@ -0,0 +1,92 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + f128M_mulAdd( + const float128_t *aPtr, + const float128_t *bPtr, + const float128_t *cPtr, + float128_t *zPtr + ) +{ + const uint64_t *aWPtr, *bWPtr, *cWPtr; + uint_fast64_t uiA64, uiA0; + uint_fast64_t uiB64, uiB0; + uint_fast64_t uiC64, uiC0; + + aWPtr = (const uint64_t *) aPtr; + bWPtr = (const uint64_t *) bPtr; + cWPtr = (const uint64_t *) cPtr; + uiA64 = aWPtr[indexWord( 2, 1 )]; + uiA0 = aWPtr[indexWord( 2, 0 )]; + uiB64 = bWPtr[indexWord( 2, 1 )]; + uiB0 = bWPtr[indexWord( 2, 0 )]; + uiC64 = cWPtr[indexWord( 2, 1 )]; + uiC0 = cWPtr[indexWord( 2, 0 )]; + *zPtr = softfloat_mulAddF128( uiA64, uiA0, uiB64, uiB0, uiC64, uiC0, 0 ); + +} + +#else + +void + f128M_mulAdd( + const float128_t *aPtr, + const float128_t *bPtr, + const float128_t *cPtr, + float128_t *zPtr + ) +{ + + softfloat_mulAddF128M( + (const uint32_t *) aPtr, + (const uint32_t *) bPtr, + (const uint32_t *) cPtr, + (uint32_t *) zPtr, + 0 + ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_rem.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_rem.c new file mode 100644 index 000000000..645ec9938 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_rem.c @@ -0,0 +1,182 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + f128M_rem( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr ) +{ + + *zPtr = f128_rem( *aPtr, *bPtr ); + +} + +#else + +void + f128M_rem( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr ) +{ + const uint32_t *aWPtr, *bWPtr; + uint32_t *zWPtr, uiA96; + int32_t expA, expB; + uint32_t x[4], rem1[5], *remPtr; + bool signRem; + int32_t expDiff; + uint32_t q, recip32; + uint64_t q64; + uint32_t rem2[5], *altRemPtr, *newRemPtr, wordMeanRem; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + bWPtr = (const uint32_t *) bPtr; + zWPtr = (uint32_t *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA96 = aWPtr[indexWordHi( 4 )]; + expA = expF128UI96( uiA96 ); + expB = expF128UI96( bWPtr[indexWordHi( 4 )] ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) { + if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) return; + if ( expA == 0x7FFF ) goto invalid; + goto copyA; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA < expB - 1 ) goto copyA; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expB = softfloat_shiftNormSigF128M( bWPtr, 13, x ); + if ( expB == -128 ) goto invalid; + remPtr = &rem1[indexMultiwordLo( 5, 4 )]; + expA = softfloat_shiftNormSigF128M( aWPtr, 13, remPtr ); + if ( expA == -128 ) goto copyA; + signRem = signF128UI96( uiA96 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( expDiff < 1 ) { + if ( expDiff < -1 ) goto copyA; + if ( expDiff ) { + --expB; + softfloat_add128M( x, x, x ); + q = 0; + } else { + q = (softfloat_compare128M( x, remPtr ) <= 0); + if ( q ) softfloat_sub128M( remPtr, x, remPtr ); + } + } else { + recip32 = + softfloat_approxRecip32_1( + ((uint64_t) x[indexWord( 4, 3 )]<<32 | x[indexWord( 4, 2 )]) + >>30 + ); + expDiff -= 30; + for (;;) { + q64 = (uint64_t) remPtr[indexWordHi( 4 )] * recip32; + if ( expDiff < 0 ) break; + q = (q64 + 0x80000000)>>32; + softfloat_remStep128MBy32( remPtr, 29, x, q, remPtr ); + if ( remPtr[indexWordHi( 4 )] & 0x80000000 ) { + softfloat_add128M( remPtr, x, remPtr ); + } + expDiff -= 29; + } + /*-------------------------------------------------------------------- + | (`expDiff' cannot be less than -29 here.) + *--------------------------------------------------------------------*/ + q = (uint32_t) (q64>>32)>>(~expDiff & 31); + softfloat_remStep128MBy32( remPtr, expDiff + 30, x, q, remPtr ); + if ( remPtr[indexWordHi( 4 )] & 0x80000000 ) { + altRemPtr = &rem2[indexMultiwordLo( 5, 4 )]; + softfloat_add128M( remPtr, x, altRemPtr ); + goto selectRem; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + altRemPtr = &rem2[indexMultiwordLo( 5, 4 )]; + do { + ++q; + newRemPtr = altRemPtr; + softfloat_sub128M( remPtr, x, newRemPtr ); + altRemPtr = remPtr; + remPtr = newRemPtr; + } while ( ! (remPtr[indexWordHi( 4 )] & 0x80000000) ); + selectRem: + softfloat_add128M( remPtr, altRemPtr, x ); + wordMeanRem = x[indexWordHi( 4 )]; + if ( + (wordMeanRem & 0x80000000) + || (! wordMeanRem && (q & 1) && ! x[indexWord( 4, 0 )] + && ! (x[indexWord( 4, 2 )] | x[indexWord( 4, 1 )])) + ) { + remPtr = altRemPtr; + } + if ( remPtr[indexWordHi( 4 )] & 0x80000000 ) { + signRem = ! signRem; + softfloat_negX128M( remPtr ); + } + remPtr -= indexMultiwordLo( 5, 4 ); + remPtr[indexWordHi( 5 )] = 0; + softfloat_normRoundPackMToF128M( signRem, expB + 18, remPtr, zWPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_invalidF128M( zWPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + copyA: + zWPtr[indexWordHi( 4 )] = uiA96; + zWPtr[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )]; + zWPtr[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )]; + zWPtr[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )]; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_roundToInt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_roundToInt.c new file mode 100644 index 000000000..c46712656 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_roundToInt.c @@ -0,0 +1,223 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + f128M_roundToInt( + const float128_t *aPtr, + uint_fast8_t roundingMode, + bool exact, + float128_t *zPtr + ) +{ + + *zPtr = f128_roundToInt( *aPtr, roundingMode, exact ); + +} + +#else + +void + f128M_roundToInt( + const float128_t *aPtr, + uint_fast8_t roundingMode, + bool exact, + float128_t *zPtr + ) +{ + const uint32_t *aWPtr; + uint32_t *zWPtr; + uint32_t ui96; + int32_t exp; + uint32_t sigExtra; + bool sign; + uint_fast8_t bitPos; + bool roundNear; + unsigned int index, lastIndex; + bool extra; + uint32_t wordA, bit, wordZ; + uint_fast8_t carry; + uint32_t extrasMask; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + zWPtr = (uint32_t *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + ui96 = aWPtr[indexWordHi( 4 )]; + exp = expF128UI96( ui96 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp < 0x3FFF ) { + zWPtr[indexWord( 4, 2 )] = 0; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + sigExtra = aWPtr[indexWord( 4, 2 )]; + if ( !sigExtra ) { + sigExtra = aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )]; + } + if ( !sigExtra && !(ui96 & 0x7FFFFFFF) ) goto ui96; + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + sign = signF128UI96( ui96 ); + switch ( roundingMode ) { + case softfloat_round_near_even: + if ( !fracF128UI96( ui96 ) && !sigExtra ) break; + case softfloat_round_near_maxMag: + if ( exp == 0x3FFE ) goto mag1; + break; + case softfloat_round_min: + if ( sign ) goto mag1; + break; + case softfloat_round_max: + if ( !sign ) goto mag1; + break; +#ifdef SOFTFLOAT_ROUND_ODD + case softfloat_round_odd: + goto mag1; +#endif + } + ui96 = packToF128UI96( sign, 0, 0 ); + goto ui96; + mag1: + ui96 = packToF128UI96( sign, 0x3FFF, 0 ); + goto ui96; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x406F <= exp ) { + if ( + (exp == 0x7FFF) + && (fracF128UI96( ui96 ) + || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )])) + ) { + softfloat_propagateNaNF128M( aWPtr, 0, zWPtr ); + return; + } + zWPtr[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )]; + zWPtr[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )]; + zWPtr[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )]; + goto ui96; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + bitPos = 0x406F - exp; + roundNear = + (roundingMode == softfloat_round_near_maxMag) + || (roundingMode == softfloat_round_near_even); + bitPos -= roundNear; + index = indexWordLo( 4 ); + lastIndex = indexWordHi( 4 ); + extra = 0; + for (;;) { + wordA = aWPtr[index]; + if ( bitPos < 32 ) break; + if ( wordA ) extra = 1; + zWPtr[index] = 0; + index += wordIncr; + bitPos -= 32; + } + bit = (uint32_t) 1<<bitPos; + if ( roundNear ) { + wordZ = wordA + bit; + carry = (wordZ < wordA); + bit <<= 1; + extrasMask = bit - 1; + if ( exact && (extra || (wordA & extrasMask)) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + if ( + (roundingMode == softfloat_round_near_even) + && !extra && !(wordZ & extrasMask) + ) { + if ( !bit ) { + zWPtr[index] = wordZ; + index += wordIncr; + wordZ = aWPtr[index] + carry; + carry &= !wordZ; + zWPtr[index] = wordZ & ~1; + goto propagateCarry; + } + wordZ &= ~bit; + } + } else { + wordZ = wordA; + carry = 0; + extrasMask = bit - 1; + if ( extra || (wordA & extrasMask) ) { + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + if ( + roundingMode + == (signF128UI96( ui96 ) ? softfloat_round_min + : softfloat_round_max) + ) { + wordZ += bit; + carry = (wordZ < wordA); +#ifdef SOFTFLOAT_ROUND_ODD + } else if ( roundingMode == softfloat_round_odd ) { + wordZ |= bit; +#endif + } + } + } + wordZ &= ~extrasMask; + zWPtr[index] = wordZ; + propagateCarry: + while ( index != lastIndex ) { + index += wordIncr; + wordZ = aWPtr[index] + carry; + zWPtr[index] = wordZ; + carry &= !wordZ; + } + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + ui96: + zWPtr[indexWordHi( 4 )] = ui96; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_sqrt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_sqrt.c new file mode 100644 index 000000000..1ede5eff0 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_sqrt.c @@ -0,0 +1,228 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void f128M_sqrt( const float128_t *aPtr, float128_t *zPtr ) +{ + + *zPtr = f128_sqrt( *aPtr ); + +} + +#else + +void f128M_sqrt( const float128_t *aPtr, float128_t *zPtr ) +{ + const uint32_t *aWPtr; + uint32_t *zWPtr; + uint32_t uiA96; + bool signA; + int32_t rawExpA; + uint32_t rem[6]; + int32_t expA, expZ; + uint64_t rem64; + uint32_t sig32A, recipSqrt32, sig32Z, qs[3], q; + uint64_t sig64Z; + uint32_t term[5]; + uint64_t x64; + uint32_t y[5], rem32; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + zWPtr = (uint32_t *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA96 = aWPtr[indexWordHi( 4 )]; + signA = signF128UI96( uiA96 ); + rawExpA = expF128UI96( uiA96 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( rawExpA == 0x7FFF ) { + if ( + fracF128UI96( uiA96 ) + || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )]) + ) { + softfloat_propagateNaNF128M( aWPtr, 0, zWPtr ); + return; + } + if ( ! signA ) goto copyA; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = softfloat_shiftNormSigF128M( aWPtr, 13 - (rawExpA & 1), rem ); + if ( expA == -128 ) goto copyA; + if ( signA ) goto invalid; + /*------------------------------------------------------------------------ + | (`sig32Z' is guaranteed to be a lower bound on the square root of + | `sig32A', which makes `sig32Z' also a lower bound on the square root of + | `sigA'.) + *------------------------------------------------------------------------*/ + expZ = ((expA - 0x3FFF)>>1) + 0x3FFE; + expA &= 1; + rem64 = (uint64_t) rem[indexWord( 4, 3 )]<<32 | rem[indexWord( 4, 2 )]; + if ( expA ) { + if ( ! rawExpA ) { + softfloat_shortShiftRight128M( rem, 1, rem ); + rem64 >>= 1; + } + sig32A = rem64>>29; + } else { + sig32A = rem64>>30; + } + recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A ); + sig32Z = ((uint64_t) sig32A * recipSqrt32)>>32; + if ( expA ) sig32Z >>= 1; + qs[2] = sig32Z; + rem64 -= (uint64_t) sig32Z * sig32Z; + rem[indexWord( 4, 3 )] = rem64>>32; + rem[indexWord( 4, 2 )] = rem64; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + q = ((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32; + sig64Z = ((uint64_t) sig32Z<<32) + ((uint64_t) q<<3); + term[indexWord( 4, 3 )] = 0; + term[indexWord( 4, 0 )] = 0; + /*------------------------------------------------------------------------ + | (Repeating this loop is a rare occurrence.) + *------------------------------------------------------------------------*/ + for (;;) { + x64 = ((uint64_t) sig32Z<<32) + sig64Z; + term[indexWord( 4, 2 )] = x64>>32; + term[indexWord( 4, 1 )] = x64; + softfloat_remStep128MBy32( rem, 29, term, q, y ); + rem32 = y[indexWord( 4, 3 )]; + if ( ! (rem32 & 0x80000000) ) break; + --q; + sig64Z -= 1<<3; + } + qs[1] = q; + rem64 = (uint64_t) rem32<<32 | y[indexWord( 4, 2 )]; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + q = ((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32; + if ( rem64>>34 ) q += recipSqrt32; + sig64Z <<= 1; + /*------------------------------------------------------------------------ + | (Repeating this loop is a rare occurrence.) + *------------------------------------------------------------------------*/ + for (;;) { + x64 = sig64Z + (q>>26); + term[indexWord( 4, 2 )] = x64>>32; + term[indexWord( 4, 1 )] = x64; + term[indexWord( 4, 0 )] = q<<6; + softfloat_remStep128MBy32( + y, 29, term, q, &rem[indexMultiwordHi( 6, 4 )] ); + rem32 = rem[indexWordHi( 6 )]; + if ( ! (rem32 & 0x80000000) ) break; + --q; + } + qs[0] = q; + rem64 = (uint64_t) rem32<<32 | rem[indexWord( 6, 4 )]; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + q = (((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32) + 2; + if ( rem64>>34 ) q += recipSqrt32; + x64 = (uint64_t) q<<27; + y[indexWord( 5, 0 )] = x64; + x64 = ((uint64_t) qs[0]<<24) + (x64>>32); + y[indexWord( 5, 1 )] = x64; + x64 = ((uint64_t) qs[1]<<21) + (x64>>32); + y[indexWord( 5, 2 )] = x64; + x64 = ((uint64_t) qs[2]<<18) + (x64>>32); + y[indexWord( 5, 3 )] = x64; + y[indexWord( 5, 4 )] = x64>>32; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (q & 0xF) <= 2 ) { + q &= ~3; + y[indexWordLo( 5 )] = q<<27; + term[indexWord( 5, 4 )] = 0; + term[indexWord( 5, 3 )] = 0; + term[indexWord( 5, 2 )] = 0; + term[indexWord( 5, 1 )] = q>>6; + term[indexWord( 5, 0 )] = q<<26; + softfloat_sub160M( y, term, term ); + rem[indexWord( 6, 1 )] = 0; + rem[indexWord( 6, 0 )] = 0; + softfloat_remStep160MBy32( + &rem[indexMultiwordLo( 6, 5 )], + 14, + term, + q, + &rem[indexMultiwordLo( 6, 5 )] + ); + rem32 = rem[indexWord( 6, 4 )]; + if ( rem32 & 0x80000000 ) { + softfloat_sub1X160M( y ); + } else { + if ( + rem32 || rem[indexWord( 6, 0 )] || rem[indexWord( 6, 1 )] + || (rem[indexWord( 6, 3 )] | rem[indexWord( 6, 2 )]) + ) { + y[indexWordLo( 5 )] |= 1; + } + } + } + softfloat_roundPackMToF128M( 0, expZ, y, zWPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_invalidF128M( zWPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + copyA: + zWPtr[indexWordHi( 4 )] = uiA96; + zWPtr[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )]; + zWPtr[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )]; + zWPtr[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )]; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_sub.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_sub.c new file mode 100644 index 000000000..1b609fdab --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_sub.c @@ -0,0 +1,97 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void + f128M_sub( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr ) +{ + const uint64_t *aWPtr, *bWPtr; + uint_fast64_t uiA64, uiA0; + bool signA; + uint_fast64_t uiB64, uiB0; + bool signB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2) + float128_t + (*magsFuncPtr)( + uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool ); +#endif + + aWPtr = (const uint64_t *) aPtr; + bWPtr = (const uint64_t *) bPtr; + uiA64 = aWPtr[indexWord( 2, 1 )]; + uiA0 = aWPtr[indexWord( 2, 0 )]; + signA = signF128UI64( uiA64 ); + uiB64 = bWPtr[indexWord( 2, 1 )]; + uiB0 = bWPtr[indexWord( 2, 0 )]; + signB = signF128UI64( uiB64 ); +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) + if ( signA == signB ) { + *zPtr = softfloat_subMagsF128( uiA64, uiA0, uiB64, uiB0, signA ); + } else { + *zPtr = softfloat_addMagsF128( uiA64, uiA0, uiB64, uiB0, signA ); + } +#else + magsFuncPtr = + (signA == signB) ? softfloat_subMagsF128 : softfloat_addMagsF128; + *zPtr = (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA ); +#endif + +} + +#else + +void + f128M_sub( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr ) +{ + + softfloat_addF128M( + (const uint32_t *) aPtr, + (const uint32_t *) bPtr, + (uint32_t *) zPtr, + true + ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_extF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_extF80M.c new file mode 100644 index 000000000..fe8b0fc81 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_extF80M.c @@ -0,0 +1,101 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void f128M_to_extF80M( const float128_t *aPtr, extFloat80_t *zPtr ) +{ + + *zPtr = f128_to_extF80( *aPtr ); + +} + +#else + +void f128M_to_extF80M( const float128_t *aPtr, extFloat80_t *zPtr ) +{ + const uint32_t *aWPtr; + struct extFloat80M *zSPtr; + uint32_t uiA96; + bool sign; + int32_t exp; + struct commonNaN commonNaN; + uint32_t sig[4]; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + zSPtr = (struct extFloat80M *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA96 = aWPtr[indexWordHi( 4 )]; + sign = signF128UI96( uiA96 ); + exp = expF128UI96( uiA96 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( softfloat_isNaNF128M( aWPtr ) ) { + softfloat_f128MToCommonNaN( aWPtr, &commonNaN ); + softfloat_commonNaNToExtF80M( &commonNaN, zSPtr ); + return; + } + zSPtr->signExp = packToExtF80UI64( sign, 0x7FFF ); + zSPtr->signif = UINT64_C( 0x8000000000000000 ); + return; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + exp = softfloat_shiftNormSigF128M( aWPtr, 15, sig ); + if ( exp == -128 ) { + zSPtr->signExp = packToExtF80UI64( sign, 0 ); + zSPtr->signif = 0; + return; + } + if ( sig[indexWord( 4, 0 )] ) sig[indexWord( 4, 1 )] |= 1; + softfloat_roundPackMToExtF80M( + sign, exp, &sig[indexMultiwordHi( 4, 3 )], 80, zSPtr ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_f16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_f16.c new file mode 100644 index 000000000..4f0c5bb2a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_f16.c @@ -0,0 +1,113 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +float16_t f128M_to_f16( const float128_t *aPtr ) +{ + + return f128_to_f16( *aPtr ); + +} + +#else + +float16_t f128M_to_f16( const float128_t *aPtr ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + bool sign; + int32_t exp; + uint32_t frac32; + struct commonNaN commonNaN; + uint16_t uiZ, frac16; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA96 = aWPtr[indexWordHi( 4 )]; + sign = signF128UI96( uiA96 ); + exp = expF128UI96( uiA96 ); + frac32 = + fracF128UI96( uiA96 ) + | ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )]) + != 0); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( frac32 ) { + softfloat_f128MToCommonNaN( aWPtr, &commonNaN ); + uiZ = softfloat_commonNaNToF16UI( &commonNaN ); + } else { + uiZ = packToF16UI( sign, 0x1F, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac16 = frac32>>2 | (frac32 & 3); + if ( ! (exp | frac16) ) { + uiZ = packToF16UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + exp -= 0x3FF1; + if ( sizeof (int_fast16_t) < sizeof (int32_t) ) { + if ( exp < -0x40 ) exp = -0x40; + } + return softfloat_roundPackToF16( sign, exp, frac16 | 0x4000 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_f32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_f32.c new file mode 100644 index 000000000..8b73de08e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_f32.c @@ -0,0 +1,109 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +float32_t f128M_to_f32( const float128_t *aPtr ) +{ + + return f128_to_f32( *aPtr ); + +} + +#else + +float32_t f128M_to_f32( const float128_t *aPtr ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + bool sign; + int32_t exp; + uint64_t frac64; + struct commonNaN commonNaN; + uint32_t uiZ, frac32; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + sign = signF128UI96( uiA96 ); + exp = expF128UI96( uiA96 ); + frac64 = + (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )] + | ((aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )]) != 0); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( frac64 ) { + softfloat_f128MToCommonNaN( aWPtr, &commonNaN ); + uiZ = softfloat_commonNaNToF32UI( &commonNaN ); + } else { + uiZ = packToF32UI( sign, 0xFF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac32 = softfloat_shortShiftRightJam64( frac64, 18 ); + if ( ! (exp | frac32) ) { + uiZ = packToF32UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + exp -= 0x3F81; + if ( sizeof (int_fast16_t) < sizeof (int32_t) ) { + if ( exp < -0x1000 ) exp = -0x1000; + } + return softfloat_roundPackToF32( sign, exp, frac32 | 0x40000000 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_f64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_f64.c new file mode 100644 index 000000000..1cddd347a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_f64.c @@ -0,0 +1,112 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +float64_t f128M_to_f64( const float128_t *aPtr ) +{ + + return f128_to_f64( *aPtr ); + +} + +#else + +float64_t f128M_to_f64( const float128_t *aPtr ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + bool sign; + int32_t exp; + uint64_t frac64; + struct commonNaN commonNaN; + uint64_t uiZ; + uint32_t frac32; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + sign = signF128UI96( uiA96 ); + exp = expF128UI96( uiA96 ); + frac64 = (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )]; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( frac64 || aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )] ) { + softfloat_f128MToCommonNaN( aWPtr, &commonNaN ); + uiZ = softfloat_commonNaNToF64UI( &commonNaN ); + } else { + uiZ = packToF64UI( sign, 0x7FF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac32 = aWPtr[indexWord( 4, 1 )]; + frac64 = frac64<<14 | frac32>>18; + if ( (frac32 & 0x0003FFFF) || aWPtr[indexWord( 4, 0 )] ) frac64 |= 1; + if ( ! (exp | frac64) ) { + uiZ = packToF64UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + exp -= 0x3C01; + if ( sizeof (int_fast16_t) < sizeof (int32_t) ) { + if ( exp < -0x1000 ) exp = -0x1000; + } + return + softfloat_roundPackToF64( + sign, exp, frac64 | UINT64_C( 0x4000000000000000 ) ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i32.c new file mode 100644 index 000000000..1265c60ad --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i32.c @@ -0,0 +1,98 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +int_fast32_t + f128M_to_i32( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + + return f128_to_i32( *aPtr, roundingMode, exact ); + +} + +#else + +int_fast32_t + f128M_to_i32( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + bool sign; + int32_t exp; + uint64_t sig64; + int32_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + sign = signF128UI96( uiA96 ); + exp = expF128UI96( uiA96 ); + sig64 = (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )]; + if ( aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )] ) sig64 |= 1; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ +#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow) + if ( (exp == 0x7FFF) && sig64 ) { +#if (i32_fromNaN == i32_fromPosOverflow) + sign = 0; +#elif (i32_fromNaN == i32_fromNegOverflow) + sign = 1; +#else + softfloat_raiseFlags( softfloat_flag_invalid ); + return i32_fromNaN; +#endif + } +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 ); + shiftDist = 0x4023 - exp; + if ( 0 < shiftDist ) sig64 = softfloat_shiftRightJam64( sig64, shiftDist ); + return softfloat_roundToI32( sign, sig64, roundingMode, exact ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i32_r_minMag.c new file mode 100644 index 000000000..dde3dea2b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i32_r_minMag.c @@ -0,0 +1,106 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +int_fast32_t f128M_to_i32_r_minMag( const float128_t *aPtr, bool exact ) +{ + + return f128_to_i32_r_minMag( *aPtr, exact ); + +} + +#else + +int_fast32_t f128M_to_i32_r_minMag( const float128_t *aPtr, bool exact ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + bool sign; + int32_t exp; + uint64_t sig64; + int32_t shiftDist; + uint32_t absZ, uiZ; + union { uint32_t ui; int32_t i; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + sign = signF128UI96( uiA96 ); + exp = expF128UI96( uiA96 ); + sig64 = (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )]; + if ( aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )] ) sig64 |= 1; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp < 0x3FFF ) { + if ( exact && (exp | sig64) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x401F <= exp ) goto invalid; + shiftDist = 0x402F - exp; + sig64 |= UINT64_C( 0x0001000000000000 ); + absZ = sig64>>shiftDist; + uiZ = sign ? -absZ : absZ; + if ( uiZ>>31 != sign ) goto invalid; + if ( exact && ((uint64_t) absZ<<shiftDist != sig64) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + uZ.ui = uiZ; + return uZ.i; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && sig64 ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i64.c new file mode 100644 index 000000000..c30673f50 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i64.c @@ -0,0 +1,102 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +int_fast64_t + f128M_to_i64( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + + return f128_to_i64( *aPtr, roundingMode, exact ); + +} + +#else + +int_fast64_t + f128M_to_i64( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + bool sign; + int32_t exp; + uint32_t sig96; + int32_t shiftDist; + uint32_t sig[4]; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + sign = signF128UI96( uiA96 ); + exp = expF128UI96( uiA96 ); + sig96 = fracF128UI96( uiA96 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x404F - exp; + if ( shiftDist < 17 ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) + && (sig96 + || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )])) + ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig96 |= 0x00010000; + sig[indexWord( 4, 3 )] = sig96; + sig[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )]; + sig[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )]; + sig[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )]; + softfloat_shiftRightJam128M( sig, shiftDist, sig ); + return + softfloat_roundMToI64( + sign, sig + indexMultiwordLo( 4, 3 ), roundingMode, exact ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i64_r_minMag.c new file mode 100644 index 000000000..bcc79502f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_i64_r_minMag.c @@ -0,0 +1,124 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +int_fast64_t f128M_to_i64_r_minMag( const float128_t *aPtr, bool exact ) +{ + + return f128_to_i64_r_minMag( *aPtr, exact ); + +} + +#else + +int_fast64_t f128M_to_i64_r_minMag( const float128_t *aPtr, bool exact ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + bool sign; + int32_t exp; + uint32_t sig96; + int32_t shiftDist; + uint32_t sig[4]; + uint64_t uiZ; + union { uint64_t ui; int64_t i; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + sign = signF128UI96( uiA96 ); + exp = expF128UI96( uiA96 ); + sig96 = fracF128UI96( uiA96 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x403E - exp; + if ( shiftDist < 0 ) goto invalid; + if ( exact ) { + if ( exp ) sig96 |= 0x00010000; + sig[indexWord( 4, 3 )] = sig96; + sig[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )]; + sig[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )]; + sig[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )]; + softfloat_shiftRightJam128M( sig, shiftDist + 17, sig ); + uiZ = (uint64_t) sig[indexWord( 4, 2 )]<<32 | sig[indexWord( 4, 1 )]; + if ( uiZ>>63 && (! sign || (uiZ != UINT64_C( 0x8000000000000000 ))) ) { + goto invalid; + } + if ( sig[indexWordLo( 4 )] ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + } else { + if ( 64 <= shiftDist ) return 0; + uiZ = + (uint64_t) sig96<<47 + | (uint64_t) aWPtr[indexWord( 4, 2 )]<<15 + | aWPtr[indexWord( 4, 1 )]>>17; + if ( shiftDist ) { + uiZ |= UINT64_C( 0x8000000000000000 ); + uiZ >>= shiftDist; + } else { + if ( uiZ || ! sign ) goto invalid; + uiZ |= UINT64_C( 0x8000000000000000 ); + } + } + if ( sign ) uiZ = -uiZ; + uZ.ui = uiZ; + return uZ.i; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) + && (sig96 + || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )])) + ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui32.c new file mode 100644 index 000000000..33ed93a3f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui32.c @@ -0,0 +1,98 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +uint_fast32_t + f128M_to_ui32( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + + return f128_to_ui32( *aPtr, roundingMode, exact ); + +} + +#else + +uint_fast32_t + f128M_to_ui32( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + bool sign; + int32_t exp; + uint64_t sig64; + int32_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + sign = signF128UI96( uiA96 ); + exp = expF128UI96( uiA96 ); + sig64 = (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )]; + if ( aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )] ) sig64 |= 1; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ +#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow) + if ( (exp == 0x7FFF) && sig64 ) { +#if (ui32_fromNaN == ui32_fromPosOverflow) + sign = 0; +#elif (ui32_fromNaN == ui32_fromNegOverflow) + sign = 1; +#else + softfloat_raiseFlags( softfloat_flag_invalid ); + return ui32_fromNaN; +#endif + } +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 ); + shiftDist = 0x4023 - exp; + if ( 0 < shiftDist ) sig64 = softfloat_shiftRightJam64( sig64, shiftDist ); + return softfloat_roundToUI32( sign, sig64, roundingMode, exact ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui32_r_minMag.c new file mode 100644 index 000000000..87813c04a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui32_r_minMag.c @@ -0,0 +1,102 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +uint_fast32_t f128M_to_ui32_r_minMag( const float128_t *aPtr, bool exact ) +{ + + return f128_to_ui32_r_minMag( *aPtr, exact ); + +} + +#else + +uint_fast32_t f128M_to_ui32_r_minMag( const float128_t *aPtr, bool exact ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + int32_t exp; + uint64_t sig64; + int32_t shiftDist; + bool sign; + uint32_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + exp = expF128UI96( uiA96 ); + sig64 = (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )]; + if ( aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )] ) sig64 |= 1; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x402F - exp; + if ( 49 <= shiftDist ) { + if ( exact && (exp | sig64) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF128UI96( uiA96 ); + if ( sign || (shiftDist < 17) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && sig64 ? ui32_fromNaN + : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig64 |= UINT64_C( 0x0001000000000000 ); + z = sig64>>shiftDist; + if ( exact && ((uint64_t) z<<shiftDist != sig64) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui64.c new file mode 100644 index 000000000..86c80d343 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui64.c @@ -0,0 +1,102 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +uint_fast64_t + f128M_to_ui64( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + + return f128_to_ui64( *aPtr, roundingMode, exact ); + +} + +#else + +uint_fast64_t + f128M_to_ui64( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + bool sign; + int32_t exp; + uint32_t sig96; + int32_t shiftDist; + uint32_t sig[4]; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + sign = signF128UI96( uiA96 ); + exp = expF128UI96( uiA96 ); + sig96 = fracF128UI96( uiA96 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x404F - exp; + if ( shiftDist < 17 ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) + && (sig96 + || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )])) + ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig96 |= 0x00010000; + sig[indexWord( 4, 3 )] = sig96; + sig[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )]; + sig[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )]; + sig[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )]; + softfloat_shiftRightJam128M( sig, shiftDist, sig ); + return + softfloat_roundMToUI64( + sign, sig + indexMultiwordLo( 4, 3 ), roundingMode, exact ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui64_r_minMag.c new file mode 100644 index 000000000..503a6058c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128M_to_ui64_r_minMag.c @@ -0,0 +1,114 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +uint_fast64_t f128M_to_ui64_r_minMag( const float128_t *aPtr, bool exact ) +{ + + return f128_to_ui64_r_minMag( *aPtr, exact ); + +} + +#else + +uint_fast64_t f128M_to_ui64_r_minMag( const float128_t *aPtr, bool exact ) +{ + const uint32_t *aWPtr; + uint32_t uiA96; + bool sign; + int32_t exp; + uint32_t sig96; + int32_t shiftDist; + uint32_t sig[4]; + uint64_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + aWPtr = (const uint32_t *) aPtr; + uiA96 = aWPtr[indexWordHi( 4 )]; + sign = signF128UI96( uiA96 ); + exp = expF128UI96( uiA96 ); + sig96 = fracF128UI96( uiA96 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x403E - exp; + if ( shiftDist < 0 ) goto invalid; + if ( exact ) { + if ( exp ) sig96 |= 0x00010000; + sig[indexWord( 4, 3 )] = sig96; + sig[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )]; + sig[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )]; + sig[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )]; + softfloat_shiftRightJam128M( sig, shiftDist + 17, sig ); + z = (uint64_t) sig[indexWord( 4, 2 )]<<32 | sig[indexWord( 4, 1 )]; + if ( sign && z ) goto invalid; + if ( sig[indexWordLo( 4 )] ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + } else { + if ( 64 <= shiftDist ) return 0; + if ( sign ) goto invalid; + z = UINT64_C( 0x8000000000000000 ) + | (uint64_t) sig96<<47 + | (uint64_t) aWPtr[indexWord( 4, 2 )]<<15 + | aWPtr[indexWord( 4, 1 )]>>17; + z >>= shiftDist; + } + return z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) + && (sig96 + || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )])) + ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_add.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_add.c new file mode 100644 index 000000000..2f6c6b5ae --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_add.c @@ -0,0 +1,78 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float128_t f128_add( float128_t a, float128_t b ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool signA; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + bool signB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2) + float128_t + (*magsFuncPtr)( + uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool ); +#endif + + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + signA = signF128UI64( uiA64 ); + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + signB = signF128UI64( uiB64 ); +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) + if ( signA == signB ) { + return softfloat_addMagsF128( uiA64, uiA0, uiB64, uiB0, signA ); + } else { + return softfloat_subMagsF128( uiA64, uiA0, uiB64, uiB0, signA ); + } +#else + magsFuncPtr = + (signA == signB) ? softfloat_addMagsF128 : softfloat_subMagsF128; + return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_div.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_div.c new file mode 100644 index 000000000..dcd3ecbde --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_div.c @@ -0,0 +1,199 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float128_t f128_div( float128_t a, float128_t b ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool signA; + int_fast32_t expA; + struct uint128 sigA; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + bool signB; + int_fast32_t expB; + struct uint128 sigB; + bool signZ; + struct exp32_sig128 normExpSig; + int_fast32_t expZ; + struct uint128 rem; + uint_fast32_t recip32; + int ix; + uint_fast64_t q64; + uint_fast32_t q; + struct uint128 term; + uint_fast32_t qs[3]; + uint_fast64_t sigZExtra; + struct uint128 sigZ, uiZ; + union ui128_f128 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + signA = signF128UI64( uiA64 ); + expA = expF128UI64( uiA64 ); + sigA.v64 = fracF128UI64( uiA64 ); + sigA.v0 = uiA0; + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + signB = signF128UI64( uiB64 ); + expB = expF128UI64( uiB64 ); + sigB.v64 = fracF128UI64( uiB64 ); + sigB.v0 = uiB0; + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FFF ) { + if ( sigA.v64 | sigA.v0 ) goto propagateNaN; + if ( expB == 0x7FFF ) { + if ( sigB.v64 | sigB.v0 ) goto propagateNaN; + goto invalid; + } + goto infinity; + } + if ( expB == 0x7FFF ) { + if ( sigB.v64 | sigB.v0 ) goto propagateNaN; + goto zero; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) { + if ( ! (sigB.v64 | sigB.v0) ) { + if ( ! (expA | sigA.v64 | sigA.v0) ) goto invalid; + softfloat_raiseFlags( softfloat_flag_infinite ); + goto infinity; + } + normExpSig = softfloat_normSubnormalF128Sig( sigB.v64, sigB.v0 ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) { + if ( ! (sigA.v64 | sigA.v0) ) goto zero; + normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA - expB + 0x3FFE; + sigA.v64 |= UINT64_C( 0x0001000000000000 ); + sigB.v64 |= UINT64_C( 0x0001000000000000 ); + rem = sigA; + if ( softfloat_lt128( sigA.v64, sigA.v0, sigB.v64, sigB.v0 ) ) { + --expZ; + rem = softfloat_add128( sigA.v64, sigA.v0, sigA.v64, sigA.v0 ); + } + recip32 = softfloat_approxRecip32_1( sigB.v64>>17 ); + ix = 3; + for (;;) { + q64 = (uint_fast64_t) (uint32_t) (rem.v64>>19) * recip32; + q = (q64 + 0x80000000)>>32; + --ix; + if ( ix < 0 ) break; + rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 ); + term = softfloat_mul128By32( sigB.v64, sigB.v0, q ); + rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 ); + if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) { + --q; + rem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 ); + } + qs[ix] = q; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ((q + 1) & 7) < 2 ) { + rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 ); + term = softfloat_mul128By32( sigB.v64, sigB.v0, q ); + rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 ); + if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) { + --q; + rem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 ); + } else if ( softfloat_le128( sigB.v64, sigB.v0, rem.v64, rem.v0 ) ) { + ++q; + rem = softfloat_sub128( rem.v64, rem.v0, sigB.v64, sigB.v0 ); + } + if ( rem.v64 | rem.v0 ) q |= 1; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sigZExtra = (uint64_t) ((uint_fast64_t) q<<60); + term = softfloat_shortShiftLeft128( 0, qs[1], 54 ); + sigZ = + softfloat_add128( + (uint_fast64_t) qs[2]<<19, ((uint_fast64_t) qs[0]<<25) + (q>>4), + term.v64, term.v0 + ); + return + softfloat_roundPackToF128( signZ, expZ, sigZ.v64, sigZ.v0, sigZExtra ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infinity: + uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 ); + goto uiZ0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ.v64 = packToF128UI64( signZ, 0, 0 ); + uiZ0: + uiZ.v0 = 0; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_eq.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_eq.c new file mode 100644 index 000000000..65183daee --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_eq.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f128_eq( float128_t a, float128_t b ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) { + if ( + softfloat_isSigNaNF128UI( uiA64, uiA0 ) + || softfloat_isSigNaNF128UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + return + (uiA0 == uiB0) + && ( (uiA64 == uiB64) + || (! uiA0 && ! ((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))) + ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_eq_signaling.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_eq_signaling.c new file mode 100644 index 000000000..892b7da1e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_eq_signaling.c @@ -0,0 +1,67 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f128_eq_signaling( float128_t a, float128_t b ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + return + (uiA0 == uiB0) + && ( (uiA64 == uiB64) + || (! uiA0 && ! ((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))) + ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_isSignalingNaN.c new file mode 100644 index 000000000..f8e5d2368 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_isSignalingNaN.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f128_isSignalingNaN( float128_t a ) +{ + union ui128_f128 uA; + + uA.f = a; + return softfloat_isSigNaNF128UI( uA.ui.v64, uA.ui.v0 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_le.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_le.c new file mode 100644 index 000000000..28d452bd0 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_le.c @@ -0,0 +1,72 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f128_le( float128_t a, float128_t b ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + bool signA, signB; + + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF128UI64( uiA64 ); + signB = signF128UI64( uiB64 ); + return + (signA != signB) + ? signA + || ! (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + | uiA0 | uiB0) + : ((uiA64 == uiB64) && (uiA0 == uiB0)) + || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 )); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_le_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_le_quiet.c new file mode 100644 index 000000000..f3ea5a65d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_le_quiet.c @@ -0,0 +1,78 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f128_le_quiet( float128_t a, float128_t b ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + bool signA, signB; + + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) { + if ( + softfloat_isSigNaNF128UI( uiA64, uiA0 ) + || softfloat_isSigNaNF128UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signF128UI64( uiA64 ); + signB = signF128UI64( uiB64 ); + return + (signA != signB) + ? signA + || ! (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + | uiA0 | uiB0) + : ((uiA64 == uiB64) && (uiA0 == uiB0)) + || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 )); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_lt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_lt.c new file mode 100644 index 000000000..97589a47f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_lt.c @@ -0,0 +1,72 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f128_lt( float128_t a, float128_t b ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + bool signA, signB; + + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF128UI64( uiA64 ); + signB = signF128UI64( uiB64 ); + return + (signA != signB) + ? signA + && (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + | uiA0 | uiB0) + : ((uiA64 != uiB64) || (uiA0 != uiB0)) + && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 )); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_lt_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_lt_quiet.c new file mode 100644 index 000000000..0daf32958 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_lt_quiet.c @@ -0,0 +1,78 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f128_lt_quiet( float128_t a, float128_t b ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + bool signA, signB; + + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) { + if ( + softfloat_isSigNaNF128UI( uiA64, uiA0 ) + || softfloat_isSigNaNF128UI( uiB64, uiB0 ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signF128UI64( uiA64 ); + signB = signF128UI64( uiB64 ); + return + (signA != signB) + ? signA + && (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + | uiA0 | uiB0) + : ((uiA64 != uiB64) || (uiA0 != uiB0)) + && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 )); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_mul.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_mul.c new file mode 100644 index 000000000..7dff6edfe --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_mul.c @@ -0,0 +1,163 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float128_t f128_mul( float128_t a, float128_t b ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool signA; + int_fast32_t expA; + struct uint128 sigA; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + bool signB; + int_fast32_t expB; + struct uint128 sigB; + bool signZ; + uint_fast64_t magBits; + struct exp32_sig128 normExpSig; + int_fast32_t expZ; + uint64_t sig256Z[4]; + uint_fast64_t sigZExtra; + struct uint128 sigZ; + struct uint128_extra sig128Extra; + struct uint128 uiZ; + union ui128_f128 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + signA = signF128UI64( uiA64 ); + expA = expF128UI64( uiA64 ); + sigA.v64 = fracF128UI64( uiA64 ); + sigA.v0 = uiA0; + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + signB = signF128UI64( uiB64 ); + expB = expF128UI64( uiB64 ); + sigB.v64 = fracF128UI64( uiB64 ); + sigB.v0 = uiB0; + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FFF ) { + if ( + (sigA.v64 | sigA.v0) || ((expB == 0x7FFF) && (sigB.v64 | sigB.v0)) + ) { + goto propagateNaN; + } + magBits = expB | sigB.v64 | sigB.v0; + goto infArg; + } + if ( expB == 0x7FFF ) { + if ( sigB.v64 | sigB.v0 ) goto propagateNaN; + magBits = expA | sigA.v64 | sigA.v0; + goto infArg; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! (sigA.v64 | sigA.v0) ) goto zero; + normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! (sigB.v64 | sigB.v0) ) goto zero; + normExpSig = softfloat_normSubnormalF128Sig( sigB.v64, sigB.v0 ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0x4000; + sigA.v64 |= UINT64_C( 0x0001000000000000 ); + sigB = softfloat_shortShiftLeft128( sigB.v64, sigB.v0, 16 ); + softfloat_mul128To256M( sigA.v64, sigA.v0, sigB.v64, sigB.v0, sig256Z ); + sigZExtra = sig256Z[indexWord( 4, 1 )] | (sig256Z[indexWord( 4, 0 )] != 0); + sigZ = + softfloat_add128( + sig256Z[indexWord( 4, 3 )], sig256Z[indexWord( 4, 2 )], + sigA.v64, sigA.v0 + ); + if ( UINT64_C( 0x0002000000000000 ) <= sigZ.v64 ) { + ++expZ; + sig128Extra = + softfloat_shortShiftRightJam128Extra( + sigZ.v64, sigZ.v0, sigZExtra, 1 ); + sigZ = sig128Extra.v; + sigZExtra = sig128Extra.extra; + } + return + softfloat_roundPackToF128( signZ, expZ, sigZ.v64, sigZ.v0, sigZExtra ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infArg: + if ( ! magBits ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + goto uiZ; + } + uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 ); + goto uiZ0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ.v64 = packToF128UI64( signZ, 0, 0 ); + uiZ0: + uiZ.v0 = 0; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_mulAdd.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_mulAdd.c new file mode 100644 index 000000000..8d4850e6a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_mulAdd.c @@ -0,0 +1,63 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float128_t f128_mulAdd( float128_t a, float128_t b, float128_t c ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + union ui128_f128 uC; + uint_fast64_t uiC64, uiC0; + + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + uC.f = c; + uiC64 = uC.ui.v64; + uiC0 = uC.ui.v0; + return softfloat_mulAddF128( uiA64, uiA0, uiB64, uiB0, uiC64, uiC0, 0 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_rem.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_rem.c new file mode 100644 index 000000000..28d3df6cb --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_rem.c @@ -0,0 +1,190 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float128_t f128_rem( float128_t a, float128_t b ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool signA; + int_fast32_t expA; + struct uint128 sigA; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + int_fast32_t expB; + struct uint128 sigB; + struct exp32_sig128 normExpSig; + struct uint128 rem; + int_fast32_t expDiff; + uint_fast32_t q, recip32; + uint_fast64_t q64; + struct uint128 term, altRem, meanRem; + bool signRem; + struct uint128 uiZ; + union ui128_f128 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + signA = signF128UI64( uiA64 ); + expA = expF128UI64( uiA64 ); + sigA.v64 = fracF128UI64( uiA64 ); + sigA.v0 = uiA0; + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + expB = expF128UI64( uiB64 ); + sigB.v64 = fracF128UI64( uiB64 ); + sigB.v0 = uiB0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FFF ) { + if ( + (sigA.v64 | sigA.v0) || ((expB == 0x7FFF) && (sigB.v64 | sigB.v0)) + ) { + goto propagateNaN; + } + goto invalid; + } + if ( expB == 0x7FFF ) { + if ( sigB.v64 | sigB.v0 ) goto propagateNaN; + return a; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) { + if ( ! (sigB.v64 | sigB.v0) ) goto invalid; + normExpSig = softfloat_normSubnormalF128Sig( sigB.v64, sigB.v0 ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) { + if ( ! (sigA.v64 | sigA.v0) ) return a; + normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sigA.v64 |= UINT64_C( 0x0001000000000000 ); + sigB.v64 |= UINT64_C( 0x0001000000000000 ); + rem = sigA; + expDiff = expA - expB; + if ( expDiff < 1 ) { + if ( expDiff < -1 ) return a; + if ( expDiff ) { + --expB; + sigB = softfloat_add128( sigB.v64, sigB.v0, sigB.v64, sigB.v0 ); + q = 0; + } else { + q = softfloat_le128( sigB.v64, sigB.v0, rem.v64, rem.v0 ); + if ( q ) { + rem = softfloat_sub128( rem.v64, rem.v0, sigB.v64, sigB.v0 ); + } + } + } else { + recip32 = softfloat_approxRecip32_1( sigB.v64>>17 ); + expDiff -= 30; + for (;;) { + q64 = (uint_fast64_t) (uint32_t) (rem.v64>>19) * recip32; + if ( expDiff < 0 ) break; + q = (q64 + 0x80000000)>>32; + rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 ); + term = softfloat_mul128By32( sigB.v64, sigB.v0, q ); + rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 ); + if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) { + rem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 ); + } + expDiff -= 29; + } + /*-------------------------------------------------------------------- + | (`expDiff' cannot be less than -29 here.) + *--------------------------------------------------------------------*/ + q = (uint32_t) (q64>>32)>>(~expDiff & 31); + rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, expDiff + 30 ); + term = softfloat_mul128By32( sigB.v64, sigB.v0, q ); + rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 ); + if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) { + altRem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 ); + goto selectRem; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + do { + altRem = rem; + ++q; + rem = softfloat_sub128( rem.v64, rem.v0, sigB.v64, sigB.v0 ); + } while ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) ); + selectRem: + meanRem = softfloat_add128( rem.v64, rem.v0, altRem.v64, altRem.v0 ); + if ( + (meanRem.v64 & UINT64_C( 0x8000000000000000 )) + || (! (meanRem.v64 | meanRem.v0) && (q & 1)) + ) { + rem = altRem; + } + signRem = signA; + if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) { + signRem = ! signRem; + rem = softfloat_sub128( 0, 0, rem.v64, rem.v0 ); + } + return softfloat_normRoundPackToF128( signRem, expB - 1, rem.v64, rem.v0 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_roundToInt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_roundToInt.c new file mode 100644 index 000000000..96ae30e34 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_roundToInt.c @@ -0,0 +1,172 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float128_t + f128_roundToInt( float128_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + int_fast32_t exp; + struct uint128 uiZ; + uint_fast64_t lastBitMask0, roundBitsMask; + bool roundNearEven; + uint_fast64_t lastBitMask64; + union ui128_f128 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + exp = expF128UI64( uiA64 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x402F <= exp ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( 0x406F <= exp ) { + if ( (exp == 0x7FFF) && (fracF128UI64( uiA64 ) | uiA0) ) { + uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, 0, 0 ); + goto uiZ; + } + return a; + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + lastBitMask0 = (uint_fast64_t) 2<<(0x406E - exp); + roundBitsMask = lastBitMask0 - 1; + uiZ.v64 = uiA64; + uiZ.v0 = uiA0; + roundNearEven = (roundingMode == softfloat_round_near_even); + if ( roundNearEven || (roundingMode == softfloat_round_near_maxMag) ) { + if ( exp == 0x402F ) { + if ( UINT64_C( 0x8000000000000000 ) <= uiZ.v0 ) { + ++uiZ.v64; + if ( + roundNearEven + && (uiZ.v0 == UINT64_C( 0x8000000000000000 )) + ) { + uiZ.v64 &= ~1; + } + } + } else { + uiZ = softfloat_add128( uiZ.v64, uiZ.v0, 0, lastBitMask0>>1 ); + if ( roundNearEven && !(uiZ.v0 & roundBitsMask) ) { + uiZ.v0 &= ~lastBitMask0; + } + } + } else if ( + roundingMode + == (signF128UI64( uiZ.v64 ) ? softfloat_round_min + : softfloat_round_max) + ) { + uiZ = softfloat_add128( uiZ.v64, uiZ.v0, 0, roundBitsMask ); + } + uiZ.v0 &= ~roundBitsMask; + lastBitMask64 = !lastBitMask0; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( exp < 0x3FFF ) { + if ( !((uiA64 & UINT64_C( 0x7FFFFFFFFFFFFFFF )) | uiA0) ) return a; + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + uiZ.v64 = uiA64 & packToF128UI64( 1, 0, 0 ); + uiZ.v0 = 0; + switch ( roundingMode ) { + case softfloat_round_near_even: + if ( !(fracF128UI64( uiA64 ) | uiA0) ) break; + case softfloat_round_near_maxMag: + if ( exp == 0x3FFE ) uiZ.v64 |= packToF128UI64( 0, 0x3FFF, 0 ); + break; + case softfloat_round_min: + if ( uiZ.v64 ) uiZ.v64 = packToF128UI64( 1, 0x3FFF, 0 ); + break; + case softfloat_round_max: + if ( !uiZ.v64 ) uiZ.v64 = packToF128UI64( 0, 0x3FFF, 0 ); + break; +#ifdef SOFTFLOAT_ROUND_ODD + case softfloat_round_odd: + uiZ.v64 |= packToF128UI64( 0, 0x3FFF, 0 ); + break; +#endif + } + goto uiZ; + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + uiZ.v64 = uiA64; + uiZ.v0 = 0; + lastBitMask64 = (uint_fast64_t) 1<<(0x402F - exp); + roundBitsMask = lastBitMask64 - 1; + if ( roundingMode == softfloat_round_near_maxMag ) { + uiZ.v64 += lastBitMask64>>1; + } else if ( roundingMode == softfloat_round_near_even ) { + uiZ.v64 += lastBitMask64>>1; + if ( !((uiZ.v64 & roundBitsMask) | uiA0) ) { + uiZ.v64 &= ~lastBitMask64; + } + } else if ( + roundingMode + == (signF128UI64( uiZ.v64 ) ? softfloat_round_min + : softfloat_round_max) + ) { + uiZ.v64 = (uiZ.v64 | (uiA0 != 0)) + roundBitsMask; + } + uiZ.v64 &= ~roundBitsMask; + lastBitMask0 = 0; + } + if ( (uiZ.v64 != uiA64) || (uiZ.v0 != uiA0) ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + uiZ.v64 |= lastBitMask64; + uiZ.v0 |= lastBitMask0; + } +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_sqrt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_sqrt.c new file mode 100644 index 000000000..a32fe33f3 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_sqrt.c @@ -0,0 +1,201 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float128_t f128_sqrt( float128_t a ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool signA; + int_fast32_t expA; + struct uint128 sigA, uiZ; + struct exp32_sig128 normExpSig; + int_fast32_t expZ; + uint_fast32_t sig32A, recipSqrt32, sig32Z; + struct uint128 rem; + uint32_t qs[3]; + uint_fast32_t q; + uint_fast64_t x64, sig64Z; + struct uint128 y, term; + uint_fast64_t sigZExtra; + struct uint128 sigZ; + union ui128_f128 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + signA = signF128UI64( uiA64 ); + expA = expF128UI64( uiA64 ); + sigA.v64 = fracF128UI64( uiA64 ); + sigA.v0 = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FFF ) { + if ( sigA.v64 | sigA.v0 ) { + uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, 0, 0 ); + goto uiZ; + } + if ( ! signA ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( signA ) { + if ( ! (expA | sigA.v64 | sigA.v0) ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! (sigA.v64 | sigA.v0) ) return a; + normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + | (`sig32Z' is guaranteed to be a lower bound on the square root of + | `sig32A', which makes `sig32Z' also a lower bound on the square root of + | `sigA'.) + *------------------------------------------------------------------------*/ + expZ = ((expA - 0x3FFF)>>1) + 0x3FFE; + expA &= 1; + sigA.v64 |= UINT64_C( 0x0001000000000000 ); + sig32A = sigA.v64>>17; + recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A ); + sig32Z = ((uint_fast64_t) sig32A * recipSqrt32)>>32; + if ( expA ) { + sig32Z >>= 1; + rem = softfloat_shortShiftLeft128( sigA.v64, sigA.v0, 12 ); + } else { + rem = softfloat_shortShiftLeft128( sigA.v64, sigA.v0, 13 ); + } + qs[2] = sig32Z; + rem.v64 -= (uint_fast64_t) sig32Z * sig32Z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + q = ((uint32_t) (rem.v64>>2) * (uint_fast64_t) recipSqrt32)>>32; + x64 = (uint_fast64_t) sig32Z<<32; + sig64Z = x64 + ((uint_fast64_t) q<<3); + y = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 ); + /*------------------------------------------------------------------------ + | (Repeating this loop is a rare occurrence.) + *------------------------------------------------------------------------*/ + for (;;) { + term = softfloat_mul64ByShifted32To128( x64 + sig64Z, q ); + rem = softfloat_sub128( y.v64, y.v0, term.v64, term.v0 ); + if ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) ) break; + --q; + sig64Z -= 1<<3; + } + qs[1] = q; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + q = ((rem.v64>>2) * recipSqrt32)>>32; + y = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 ); + sig64Z <<= 1; + /*------------------------------------------------------------------------ + | (Repeating this loop is a rare occurrence.) + *------------------------------------------------------------------------*/ + for (;;) { + term = softfloat_shortShiftLeft128( 0, sig64Z, 32 ); + term = softfloat_add128( term.v64, term.v0, 0, (uint_fast64_t) q<<6 ); + term = softfloat_mul128By32( term.v64, term.v0, q ); + rem = softfloat_sub128( y.v64, y.v0, term.v64, term.v0 ); + if ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) ) break; + --q; + } + qs[0] = q; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + q = (((rem.v64>>2) * recipSqrt32)>>32) + 2; + sigZExtra = (uint64_t) ((uint_fast64_t) q<<59); + term = softfloat_shortShiftLeft128( 0, qs[1], 53 ); + sigZ = + softfloat_add128( + (uint_fast64_t) qs[2]<<18, ((uint_fast64_t) qs[0]<<24) + (q>>5), + term.v64, term.v0 + ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (q & 0xF) <= 2 ) { + q &= ~3; + sigZExtra = (uint64_t) ((uint_fast64_t) q<<59); + y = softfloat_shortShiftLeft128( sigZ.v64, sigZ.v0, 6 ); + y.v0 |= sigZExtra>>58; + term = softfloat_sub128( y.v64, y.v0, 0, q ); + y = softfloat_mul64ByShifted32To128( term.v0, q ); + term = softfloat_mul64ByShifted32To128( term.v64, q ); + term = softfloat_add128( term.v64, term.v0, 0, y.v64 ); + rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 20 ); + term = softfloat_sub128( term.v64, term.v0, rem.v64, rem.v0 ); + /*-------------------------------------------------------------------- + | The concatenation of `term' and `y.v0' is now the negative remainder + | (3 words altogether). + *--------------------------------------------------------------------*/ + if ( term.v64 & UINT64_C( 0x8000000000000000 ) ) { + sigZExtra |= 1; + } else { + if ( term.v64 | term.v0 | y.v0 ) { + if ( sigZExtra ) { + --sigZExtra; + } else { + sigZ = softfloat_sub128( sigZ.v64, sigZ.v0, 0, 1 ); + sigZExtra = ~0; + } + } + } + } + return softfloat_roundPackToF128( 0, expZ, sigZ.v64, sigZ.v0, sigZExtra ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_sub.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_sub.c new file mode 100644 index 000000000..ef76ac4e7 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_sub.c @@ -0,0 +1,78 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float128_t f128_sub( float128_t a, float128_t b ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool signA; + union ui128_f128 uB; + uint_fast64_t uiB64, uiB0; + bool signB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2) + float128_t + (*magsFuncPtr)( + uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool ); +#endif + + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + signA = signF128UI64( uiA64 ); + uB.f = b; + uiB64 = uB.ui.v64; + uiB0 = uB.ui.v0; + signB = signF128UI64( uiB64 ); +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) + if ( signA == signB ) { + return softfloat_subMagsF128( uiA64, uiA0, uiB64, uiB0, signA ); + } else { + return softfloat_addMagsF128( uiA64, uiA0, uiB64, uiB0, signA ); + } +#else + magsFuncPtr = + (signA == signB) ? softfloat_subMagsF128 : softfloat_addMagsF128; + return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_extF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_extF80.c new file mode 100644 index 000000000..cb0a6ce68 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_extF80.c @@ -0,0 +1,109 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extFloat80_t f128_to_extF80( float128_t a ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t frac64, frac0; + struct commonNaN commonNaN; + struct uint128 uiZ; + uint_fast16_t uiZ64; + uint_fast64_t uiZ0; + struct exp32_sig128 normExpSig; + struct uint128 sig128; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + sign = signF128UI64( uiA64 ); + exp = expF128UI64( uiA64 ); + frac64 = fracF128UI64( uiA64 ); + frac0 = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( frac64 | frac0 ) { + softfloat_f128UIToCommonNaN( uiA64, uiA0, &commonNaN ); + uiZ = softfloat_commonNaNToExtF80UI( &commonNaN ); + uiZ64 = uiZ.v64; + uiZ0 = uiZ.v0; + } else { + uiZ64 = packToExtF80UI64( sign, 0x7FFF ); + uiZ0 = UINT64_C( 0x8000000000000000 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! (frac64 | frac0) ) { + uiZ64 = packToExtF80UI64( sign, 0 ); + uiZ0 = 0; + goto uiZ; + } + normExpSig = softfloat_normSubnormalF128Sig( frac64, frac0 ); + exp = normExpSig.exp; + frac64 = normExpSig.sig.v64; + frac0 = normExpSig.sig.v0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig128 = + softfloat_shortShiftLeft128( + frac64 | UINT64_C( 0x0001000000000000 ), frac0, 15 ); + return softfloat_roundPackToExtF80( sign, exp, sig128.v64, sig128.v0, 80 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.s.signExp = uiZ64; + uZ.s.signif = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_f16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_f16.c new file mode 100644 index 000000000..62ed35b7c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_f16.c @@ -0,0 +1,95 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t f128_to_f16( float128_t a ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t frac64; + struct commonNaN commonNaN; + uint_fast16_t uiZ, frac16; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + sign = signF128UI64( uiA64 ); + exp = expF128UI64( uiA64 ); + frac64 = fracF128UI64( uiA64 ) | (uiA0 != 0); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( frac64 ) { + softfloat_f128UIToCommonNaN( uiA64, uiA0, &commonNaN ); + uiZ = softfloat_commonNaNToF16UI( &commonNaN ); + } else { + uiZ = packToF16UI( sign, 0x1F, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac16 = softfloat_shortShiftRightJam64( frac64, 34 ); + if ( ! (exp | frac16) ) { + uiZ = packToF16UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + exp -= 0x3FF1; + if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) { + if ( exp < -0x40 ) exp = -0x40; + } + return softfloat_roundPackToF16( sign, exp, frac16 | 0x4000 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_f32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_f32.c new file mode 100644 index 000000000..c10105f78 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_f32.c @@ -0,0 +1,95 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t f128_to_f32( float128_t a ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t frac64; + struct commonNaN commonNaN; + uint_fast32_t uiZ, frac32; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + sign = signF128UI64( uiA64 ); + exp = expF128UI64( uiA64 ); + frac64 = fracF128UI64( uiA64 ) | (uiA0 != 0); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( frac64 ) { + softfloat_f128UIToCommonNaN( uiA64, uiA0, &commonNaN ); + uiZ = softfloat_commonNaNToF32UI( &commonNaN ); + } else { + uiZ = packToF32UI( sign, 0xFF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac32 = softfloat_shortShiftRightJam64( frac64, 18 ); + if ( ! (exp | frac32) ) { + uiZ = packToF32UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + exp -= 0x3F81; + if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) { + if ( exp < -0x1000 ) exp = -0x1000; + } + return softfloat_roundPackToF32( sign, exp, frac32 | 0x40000000 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_f64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_f64.c new file mode 100644 index 000000000..76da76cd7 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_f64.c @@ -0,0 +1,100 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float64_t f128_to_f64( float128_t a ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t frac64, frac0; + struct commonNaN commonNaN; + uint_fast64_t uiZ; + struct uint128 frac128; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + sign = signF128UI64( uiA64 ); + exp = expF128UI64( uiA64 ); + frac64 = fracF128UI64( uiA64 ); + frac0 = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FFF ) { + if ( frac64 | frac0 ) { + softfloat_f128UIToCommonNaN( uiA64, uiA0, &commonNaN ); + uiZ = softfloat_commonNaNToF64UI( &commonNaN ); + } else { + uiZ = packToF64UI( sign, 0x7FF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac128 = softfloat_shortShiftLeft128( frac64, frac0, 14 ); + frac64 = frac128.v64 | (frac128.v0 != 0); + if ( ! (exp | frac64) ) { + uiZ = packToF64UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + exp -= 0x3C01; + if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) { + if ( exp < -0x1000 ) exp = -0x1000; + } + return + softfloat_roundPackToF64( + sign, exp, frac64 | UINT64_C( 0x4000000000000000 ) ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i32.c new file mode 100644 index 000000000..cfff04aeb --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i32.c @@ -0,0 +1,85 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t f128_to_i32( float128_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t sig64, sig0; + int_fast32_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + sign = signF128UI64( uiA64 ); + exp = expF128UI64( uiA64 ); + sig64 = fracF128UI64( uiA64 ); + sig0 = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ +#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow) + if ( (exp == 0x7FFF) && (sig64 | sig0) ) { +#if (i32_fromNaN == i32_fromPosOverflow) + sign = 0; +#elif (i32_fromNaN == i32_fromNegOverflow) + sign = 1; +#else + softfloat_raiseFlags( softfloat_flag_invalid ); + return i32_fromNaN; +#endif + } +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 ); + sig64 |= (sig0 != 0); + shiftDist = 0x4023 - exp; + if ( 0 < shiftDist ) sig64 = softfloat_shiftRightJam64( sig64, shiftDist ); + return softfloat_roundToI32( sign, sig64, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i32_r_minMag.c new file mode 100644 index 000000000..161b67569 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i32_r_minMag.c @@ -0,0 +1,100 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t f128_to_i32_r_minMag( float128_t a, bool exact ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + int_fast32_t exp; + uint_fast64_t sig64; + int_fast32_t shiftDist; + bool sign; + int_fast32_t absZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + exp = expF128UI64( uiA64 ); + sig64 = fracF128UI64( uiA64 ) | (uiA0 != 0); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x402F - exp; + if ( 49 <= shiftDist ) { + if ( exact && (exp | sig64) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF128UI64( uiA64 ); + if ( shiftDist < 18 ) { + if ( + sign && (shiftDist == 17) + && (sig64 < UINT64_C( 0x0000000000020000 )) + ) { + if ( exact && sig64 ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return -0x7FFFFFFF - 1; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && sig64 ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig64 |= UINT64_C( 0x0001000000000000 ); + absZ = sig64>>shiftDist; + if ( + exact && ((uint_fast64_t) (uint_fast32_t) absZ<<shiftDist != sig64) + ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return sign ? -absZ : absZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i64.c new file mode 100644 index 000000000..2ff474020 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i64.c @@ -0,0 +1,95 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t f128_to_i64( float128_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t sig64, sig0; + int_fast32_t shiftDist; + struct uint128 sig128; + struct uint64_extra sigExtra; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + sign = signF128UI64( uiA64 ); + exp = expF128UI64( uiA64 ); + sig64 = fracF128UI64( uiA64 ); + sig0 = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x402F - exp; + if ( shiftDist <= 0 ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( shiftDist < -15 ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig64 | sig0) ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sig64 |= UINT64_C( 0x0001000000000000 ); + if ( shiftDist ) { + sig128 = softfloat_shortShiftLeft128( sig64, sig0, -shiftDist ); + sig64 = sig128.v64; + sig0 = sig128.v0; + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 ); + sigExtra = softfloat_shiftRightJam64Extra( sig64, sig0, shiftDist ); + sig64 = sigExtra.v; + sig0 = sigExtra.extra; + } + return softfloat_roundToI64( sign, sig64, sig0, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i64_r_minMag.c new file mode 100644 index 000000000..dc44e7ae2 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_i64_r_minMag.c @@ -0,0 +1,113 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t f128_to_i64_r_minMag( float128_t a, bool exact ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t sig64, sig0; + int_fast32_t shiftDist; + int_fast8_t negShiftDist; + int_fast64_t absZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + sign = signF128UI64( uiA64 ); + exp = expF128UI64( uiA64 ); + sig64 = fracF128UI64( uiA64 ); + sig0 = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x402F - exp; + if ( shiftDist < 0 ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( shiftDist < -14 ) { + if ( + (uiA64 == UINT64_C( 0xC03E000000000000 )) + && (sig0 < UINT64_C( 0x0002000000000000 )) + ) { + if ( exact && sig0 ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return -INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig64 | sig0) ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sig64 |= UINT64_C( 0x0001000000000000 ); + negShiftDist = -shiftDist; + absZ = sig64<<negShiftDist | sig0>>(shiftDist & 63); + if ( exact && (uint64_t) (sig0<<negShiftDist) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( 49 <= shiftDist ) { + if ( exact && (exp | sig64 | sig0) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sig64 |= UINT64_C( 0x0001000000000000 ); + absZ = sig64>>shiftDist; + if ( exact && (sig0 || (absZ<<shiftDist != sig64)) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + } + return sign ? -absZ : absZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui32.c new file mode 100644 index 000000000..54b07d69c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui32.c @@ -0,0 +1,86 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t + f128_to_ui32( float128_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t sig64; + int_fast32_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + sign = signF128UI64( uiA64 ); + exp = expF128UI64( uiA64 ); + sig64 = fracF128UI64( uiA64 ) | (uiA0 != 0); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ +#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow) + if ( (exp == 0x7FFF) && sig64 ) { +#if (ui32_fromNaN == ui32_fromPosOverflow) + sign = 0; +#elif (ui32_fromNaN == ui32_fromNegOverflow) + sign = 1; +#else + softfloat_raiseFlags( softfloat_flag_invalid ); + return ui32_fromNaN; +#endif + } +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 ); + shiftDist = 0x4023 - exp; + if ( 0 < shiftDist ) { + sig64 = softfloat_shiftRightJam64( sig64, shiftDist ); + } + return softfloat_roundToUI32( sign, sig64, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui32_r_minMag.c new file mode 100644 index 000000000..650c18fd9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui32_r_minMag.c @@ -0,0 +1,89 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t f128_to_ui32_r_minMag( float128_t a, bool exact ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + int_fast32_t exp; + uint_fast64_t sig64; + int_fast32_t shiftDist; + bool sign; + uint_fast32_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + exp = expF128UI64( uiA64 ); + sig64 = fracF128UI64( uiA64 ) | (uiA0 != 0); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x402F - exp; + if ( 49 <= shiftDist ) { + if ( exact && (exp | sig64) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF128UI64( uiA64 ); + if ( sign || (shiftDist < 17) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && sig64 ? ui32_fromNaN + : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig64 |= UINT64_C( 0x0001000000000000 ); + z = sig64>>shiftDist; + if ( exact && ((uint_fast64_t) z<<shiftDist != sig64) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return z; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui64.c new file mode 100644 index 000000000..757699280 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui64.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t + f128_to_ui64( float128_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t sig64, sig0; + int_fast32_t shiftDist; + struct uint128 sig128; + struct uint64_extra sigExtra; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + sign = signF128UI64( uiA64 ); + exp = expF128UI64( uiA64 ); + sig64 = fracF128UI64( uiA64 ); + sig0 = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x402F - exp; + if ( shiftDist <= 0 ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( shiftDist < -15 ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig64 | sig0) ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sig64 |= UINT64_C( 0x0001000000000000 ); + if ( shiftDist ) { + sig128 = softfloat_shortShiftLeft128( sig64, sig0, -shiftDist ); + sig64 = sig128.v64; + sig0 = sig128.v0; + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 ); + sigExtra = softfloat_shiftRightJam64Extra( sig64, sig0, shiftDist ); + sig64 = sigExtra.v; + sig0 = sigExtra.extra; + } + return softfloat_roundToUI64( sign, sig64, sig0, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui64_r_minMag.c new file mode 100644 index 000000000..3f2fb6bce --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f128_to_ui64_r_minMag.c @@ -0,0 +1,105 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t f128_to_ui64_r_minMag( float128_t a, bool exact ) +{ + union ui128_f128 uA; + uint_fast64_t uiA64, uiA0; + bool sign; + int_fast32_t exp; + uint_fast64_t sig64, sig0; + int_fast32_t shiftDist; + int_fast8_t negShiftDist; + uint_fast64_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA64 = uA.ui.v64; + uiA0 = uA.ui.v0; + sign = signF128UI64( uiA64 ); + exp = expF128UI64( uiA64 ); + sig64 = fracF128UI64( uiA64 ); + sig0 = uiA0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x402F - exp; + if ( shiftDist < 0 ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( sign || (shiftDist < -15) ) goto invalid; + sig64 |= UINT64_C( 0x0001000000000000 ); + negShiftDist = -shiftDist; + z = sig64<<negShiftDist | sig0>>(shiftDist & 63); + if ( exact && (uint64_t) (sig0<<negShiftDist) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( 49 <= shiftDist ) { + if ( exact && (exp | sig64 | sig0) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( sign ) goto invalid; + sig64 |= UINT64_C( 0x0001000000000000 ); + z = sig64>>shiftDist; + if ( exact && (sig0 || (z<<shiftDist != sig64)) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + } + return z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FFF) && (sig64 | sig0) ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_add.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_add.c new file mode 100644 index 000000000..16e80636f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_add.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float16_t f16_add( float16_t a, float16_t b ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + union ui16_f16 uB; + uint_fast16_t uiB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1) + float16_t (*magsFuncPtr)( uint_fast16_t, uint_fast16_t ); +#endif + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; +#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL) + if ( signF16UI( uiA ^ uiB ) ) { + return softfloat_subMagsF16( uiA, uiB ); + } else { + return softfloat_addMagsF16( uiA, uiB ); + } +#else + magsFuncPtr = + signF16UI( uiA ^ uiB ) ? softfloat_subMagsF16 : softfloat_addMagsF16; + return (*magsFuncPtr)( uiA, uiB ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_div.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_div.c new file mode 100644 index 000000000..ad91a9076 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_div.c @@ -0,0 +1,186 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extern const uint16_t softfloat_approxRecip_1k0s[]; +extern const uint16_t softfloat_approxRecip_1k1s[]; + +float16_t f16_div( float16_t a, float16_t b ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool signA; + int_fast8_t expA; + uint_fast16_t sigA; + union ui16_f16 uB; + uint_fast16_t uiB; + bool signB; + int_fast8_t expB; + uint_fast16_t sigB; + bool signZ; + struct exp8_sig16 normExpSig; + int_fast8_t expZ; +#ifdef SOFTFLOAT_FAST_DIV32TO16 + uint_fast32_t sig32A; + uint_fast16_t sigZ; +#else + int index; + uint16_t r0; + uint_fast16_t sigZ, rem; +#endif + uint_fast16_t uiZ; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF16UI( uiA ); + expA = expF16UI( uiA ); + sigA = fracF16UI( uiA ); + uB.f = b; + uiB = uB.ui; + signB = signF16UI( uiB ); + expB = expF16UI( uiB ); + sigB = fracF16UI( uiB ); + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x1F ) { + if ( sigA ) goto propagateNaN; + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN; + goto invalid; + } + goto infinity; + } + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN; + goto zero; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) { + if ( ! sigB ) { + if ( ! (expA | sigA) ) goto invalid; + softfloat_raiseFlags( softfloat_flag_infinite ); + goto infinity; + } + normExpSig = softfloat_normSubnormalF16Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalF16Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA - expB + 0xE; + sigA |= 0x0400; + sigB |= 0x0400; +#ifdef SOFTFLOAT_FAST_DIV32TO16 + if ( sigA < sigB ) { + --expZ; + sig32A = (uint_fast32_t) sigA<<15; + } else { + sig32A = (uint_fast32_t) sigA<<14; + } + sigZ = sig32A / sigB; + if ( ! (sigZ & 7) ) sigZ |= ((uint_fast32_t) sigB * sigZ != sig32A); +#else + if ( sigA < sigB ) { + --expZ; + sigA <<= 5; + } else { + sigA <<= 4; + } + index = sigB>>6 & 0xF; + r0 = softfloat_approxRecip_1k0s[index] + - (((uint_fast32_t) softfloat_approxRecip_1k1s[index] + * (sigB & 0x3F)) + >>10); + sigZ = ((uint_fast32_t) sigA * r0)>>16; + rem = (sigA<<10) - sigZ * sigB; + sigZ += (rem * (uint_fast32_t) r0)>>26; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + ++sigZ; + if ( ! (sigZ & 7) ) { + sigZ &= ~1; + rem = (sigA<<10) - sigZ * sigB; + if ( rem & 0x8000 ) { + sigZ -= 2; + } else { + if ( rem ) sigZ |= 1; + } + } +#endif + return softfloat_roundPackToF16( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF16UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF16UI; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infinity: + uiZ = packToF16UI( signZ, 0x1F, 0 ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ = packToF16UI( signZ, 0, 0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_eq.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_eq.c new file mode 100644 index 000000000..4079f50f7 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_eq.c @@ -0,0 +1,66 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f16_eq( float16_t a, float16_t b ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + union ui16_f16 uB; + uint_fast16_t uiB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) { + if ( + softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + return (uiA == uiB) || ! (uint16_t) ((uiA | uiB)<<1); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_eq_signaling.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_eq_signaling.c new file mode 100644 index 000000000..117d05d6e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_eq_signaling.c @@ -0,0 +1,61 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f16_eq_signaling( float16_t a, float16_t b ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + union ui16_f16 uB; + uint_fast16_t uiB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + return (uiA == uiB) || ! (uint16_t) ((uiA | uiB)<<1); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_isSignalingNaN.c new file mode 100644 index 000000000..c49e0f2e1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_isSignalingNaN.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f16_isSignalingNaN( float16_t a ) +{ + union ui16_f16 uA; + + uA.f = a; + return softfloat_isSigNaNF16UI( uA.ui ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_le.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_le.c new file mode 100644 index 000000000..fa6943225 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_le.c @@ -0,0 +1,66 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f16_le( float16_t a, float16_t b ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + union ui16_f16 uB; + uint_fast16_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF16UI( uiA ); + signB = signF16UI( uiB ); + return + (signA != signB) ? signA || ! (uint16_t) ((uiA | uiB)<<1) + : (uiA == uiB) || (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_le_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_le_quiet.c new file mode 100644 index 000000000..769a1dc9e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_le_quiet.c @@ -0,0 +1,71 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f16_le_quiet( float16_t a, float16_t b ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + union ui16_f16 uB; + uint_fast16_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) { + if ( + softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signF16UI( uiA ); + signB = signF16UI( uiB ); + return + (signA != signB) ? signA || ! (uint16_t) ((uiA | uiB)<<1) + : (uiA == uiB) || (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_lt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_lt.c new file mode 100644 index 000000000..e796016b6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_lt.c @@ -0,0 +1,66 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f16_lt( float16_t a, float16_t b ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + union ui16_f16 uB; + uint_fast16_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF16UI( uiA ); + signB = signF16UI( uiB ); + return + (signA != signB) ? signA && ((uint16_t) ((uiA | uiB)<<1) != 0) + : (uiA != uiB) && (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_lt_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_lt_quiet.c new file mode 100644 index 000000000..c55bade74 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_lt_quiet.c @@ -0,0 +1,71 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f16_lt_quiet( float16_t a, float16_t b ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + union ui16_f16 uB; + uint_fast16_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) { + if ( + softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signF16UI( uiA ); + signB = signF16UI( uiB ); + return + (signA != signB) ? signA && ((uint16_t) ((uiA | uiB)<<1) != 0) + : (uiA != uiB) && (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_mul.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_mul.c new file mode 100644 index 000000000..112111d8d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_mul.c @@ -0,0 +1,140 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t f16_mul( float16_t a, float16_t b ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool signA; + int_fast8_t expA; + uint_fast16_t sigA; + union ui16_f16 uB; + uint_fast16_t uiB; + bool signB; + int_fast8_t expB; + uint_fast16_t sigB; + bool signZ; + uint_fast16_t magBits; + struct exp8_sig16 normExpSig; + int_fast8_t expZ; + uint_fast32_t sig32Z; + uint_fast16_t sigZ, uiZ; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF16UI( uiA ); + expA = expF16UI( uiA ); + sigA = fracF16UI( uiA ); + uB.f = b; + uiB = uB.ui; + signB = signF16UI( uiB ); + expB = expF16UI( uiB ); + sigB = fracF16UI( uiB ); + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x1F ) { + if ( sigA || ((expB == 0x1F) && sigB) ) goto propagateNaN; + magBits = expB | sigB; + goto infArg; + } + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN; + magBits = expA | sigA; + goto infArg; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalF16Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! sigB ) goto zero; + normExpSig = softfloat_normSubnormalF16Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0xF; + sigA = (sigA | 0x0400)<<4; + sigB = (sigB | 0x0400)<<5; + sig32Z = (uint_fast32_t) sigA * sigB; + sigZ = sig32Z>>16; + if ( sig32Z & 0xFFFF ) sigZ |= 1; + if ( sigZ < 0x4000 ) { + --expZ; + sigZ <<= 1; + } + return softfloat_roundPackToF16( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF16UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infArg: + if ( ! magBits ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF16UI; + } else { + uiZ = packToF16UI( signZ, 0x1F, 0 ); + } + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ = packToF16UI( signZ, 0, 0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_mulAdd.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_mulAdd.c new file mode 100644 index 000000000..092937298 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_mulAdd.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float16_t f16_mulAdd( float16_t a, float16_t b, float16_t c ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + union ui16_f16 uB; + uint_fast16_t uiB; + union ui16_f16 uC; + uint_fast16_t uiC; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + uC.f = c; + uiC = uC.ui; + return softfloat_mulAddF16( uiA, uiB, uiC, 0 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_rem.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_rem.c new file mode 100644 index 000000000..76a0de68a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_rem.c @@ -0,0 +1,171 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t f16_rem( float16_t a, float16_t b ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool signA; + int_fast8_t expA; + uint_fast16_t sigA; + union ui16_f16 uB; + uint_fast16_t uiB; + int_fast8_t expB; + uint_fast16_t sigB; + struct exp8_sig16 normExpSig; + uint16_t rem; + int_fast8_t expDiff; + uint_fast16_t q; + uint32_t recip32, q32; + uint16_t altRem, meanRem; + bool signRem; + uint_fast16_t uiZ; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF16UI( uiA ); + expA = expF16UI( uiA ); + sigA = fracF16UI( uiA ); + uB.f = b; + uiB = uB.ui; + expB = expF16UI( uiB ); + sigB = fracF16UI( uiB ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x1F ) { + if ( sigA || ((expB == 0x1F) && sigB) ) goto propagateNaN; + goto invalid; + } + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN; + return a; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) { + if ( ! sigB ) goto invalid; + normExpSig = softfloat_normSubnormalF16Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) { + if ( ! sigA ) return a; + normExpSig = softfloat_normSubnormalF16Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + rem = sigA | 0x0400; + sigB |= 0x0400; + expDiff = expA - expB; + if ( expDiff < 1 ) { + if ( expDiff < -1 ) return a; + sigB <<= 3; + if ( expDiff ) { + rem <<= 2; + q = 0; + } else { + rem <<= 3; + q = (sigB <= rem); + if ( q ) rem -= sigB; + } + } else { + recip32 = softfloat_approxRecip32_1( (uint_fast32_t) sigB<<21 ); + /*-------------------------------------------------------------------- + | Changing the shift of `rem' here requires also changing the initial + | subtraction from `expDiff'. + *--------------------------------------------------------------------*/ + rem <<= 4; + expDiff -= 31; + /*-------------------------------------------------------------------- + | The scale of `sigB' affects how many bits are obtained during each + | cycle of the loop. Currently this is 29 bits per loop iteration, + | which is believed to be the maximum possible. + *--------------------------------------------------------------------*/ + sigB <<= 3; + for (;;) { + q32 = (rem * (uint_fast64_t) recip32)>>16; + if ( expDiff < 0 ) break; + rem = -((uint_fast16_t) q32 * sigB); + expDiff -= 29; + } + /*-------------------------------------------------------------------- + | (`expDiff' cannot be less than -30 here.) + *--------------------------------------------------------------------*/ + q32 >>= ~expDiff & 31; + q = q32; + rem = (rem<<(expDiff + 30)) - q * sigB; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + do { + altRem = rem; + ++q; + rem -= sigB; + } while ( ! (rem & 0x8000) ); + meanRem = rem + altRem; + if ( (meanRem & 0x8000) || (! meanRem && (q & 1)) ) rem = altRem; + signRem = signA; + if ( 0x8000 <= rem ) { + signRem = ! signRem; + rem = -rem; + } + return softfloat_normRoundPackToF16( signRem, expB, rem ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF16UI( uiA, uiB ); + goto uiZ; + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF16UI; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_roundToInt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_roundToInt.c new file mode 100644 index 000000000..d5ed190d5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_roundToInt.c @@ -0,0 +1,120 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t f16_roundToInt( float16_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + int_fast8_t exp; + uint_fast16_t uiZ, lastBitMask, roundBitsMask; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp <= 0xE ) { + if ( !(uint16_t) (uiA<<1) ) return a; + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + uiZ = uiA & packToF16UI( 1, 0, 0 ); + switch ( roundingMode ) { + case softfloat_round_near_even: + if ( !fracF16UI( uiA ) ) break; + case softfloat_round_near_maxMag: + if ( exp == 0xE ) uiZ |= packToF16UI( 0, 0xF, 0 ); + break; + case softfloat_round_min: + if ( uiZ ) uiZ = packToF16UI( 1, 0xF, 0 ); + break; + case softfloat_round_max: + if ( !uiZ ) uiZ = packToF16UI( 0, 0xF, 0 ); + break; +#ifdef SOFTFLOAT_ROUND_ODD + case softfloat_round_odd: + uiZ |= packToF16UI( 0, 0xF, 0 ); + break; +#endif + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x19 <= exp ) { + if ( (exp == 0x1F) && fracF16UI( uiA ) ) { + uiZ = softfloat_propagateNaNF16UI( uiA, 0 ); + goto uiZ; + } + return a; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ = uiA; + lastBitMask = (uint_fast16_t) 1<<(0x19 - exp); + roundBitsMask = lastBitMask - 1; + if ( roundingMode == softfloat_round_near_maxMag ) { + uiZ += lastBitMask>>1; + } else if ( roundingMode == softfloat_round_near_even ) { + uiZ += lastBitMask>>1; + if ( !(uiZ & roundBitsMask) ) uiZ &= ~lastBitMask; + } else if ( + roundingMode + == (signF16UI( uiZ ) ? softfloat_round_min : softfloat_round_max) + ) { + uiZ += roundBitsMask; + } + uiZ &= ~roundBitsMask; + if ( uiZ != uiA ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) uiZ |= lastBitMask; +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_sqrt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_sqrt.c new file mode 100644 index 000000000..40865fccc --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_sqrt.c @@ -0,0 +1,136 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extern const uint16_t softfloat_approxRecipSqrt_1k0s[]; +extern const uint16_t softfloat_approxRecipSqrt_1k1s[]; + +float16_t f16_sqrt( float16_t a ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool signA; + int_fast8_t expA; + uint_fast16_t sigA, uiZ; + struct exp8_sig16 normExpSig; + int_fast8_t expZ; + int index; + uint_fast16_t r0; + uint_fast32_t ESqrR0; + uint16_t sigma0; + uint_fast16_t recipSqrt16, sigZ, shiftedSigZ; + uint16_t negRem; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF16UI( uiA ); + expA = expF16UI( uiA ); + sigA = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x1F ) { + if ( sigA ) { + uiZ = softfloat_propagateNaNF16UI( uiA, 0 ); + goto uiZ; + } + if ( ! signA ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( signA ) { + if ( ! (expA | sigA) ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) return a; + normExpSig = softfloat_normSubnormalF16Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = ((expA - 0xF)>>1) + 0xE; + expA &= 1; + sigA |= 0x0400; + index = (sigA>>6 & 0xE) + expA; + r0 = softfloat_approxRecipSqrt_1k0s[index] + - (((uint_fast32_t) softfloat_approxRecipSqrt_1k1s[index] + * (sigA & 0x7F)) + >>11); + ESqrR0 = ((uint_fast32_t) r0 * r0)>>1; + if ( expA ) ESqrR0 >>= 1; + sigma0 = ~(uint_fast16_t) ((ESqrR0 * sigA)>>16); + recipSqrt16 = r0 + (((uint_fast32_t) r0 * sigma0)>>25); + if ( ! (recipSqrt16 & 0x8000) ) recipSqrt16 = 0x8000; + sigZ = ((uint_fast32_t) (sigA<<5) * recipSqrt16)>>16; + if ( expA ) sigZ >>= 1; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + ++sigZ; + if ( ! (sigZ & 7) ) { + shiftedSigZ = sigZ>>1; + negRem = shiftedSigZ * shiftedSigZ; + sigZ &= ~1; + if ( negRem & 0x8000 ) { + sigZ |= 1; + } else { + if ( negRem ) --sigZ; + } + } + return softfloat_roundPackToF16( 0, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF16UI; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_sub.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_sub.c new file mode 100644 index 000000000..e18f25cf1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_sub.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float16_t f16_sub( float16_t a, float16_t b ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + union ui16_f16 uB; + uint_fast16_t uiB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1) + float16_t (*magsFuncPtr)( uint_fast16_t, uint_fast16_t ); +#endif + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; +#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL) + if ( signF16UI( uiA ^ uiB ) ) { + return softfloat_addMagsF16( uiA, uiB ); + } else { + return softfloat_subMagsF16( uiA, uiB ); + } +#else + magsFuncPtr = + signF16UI( uiA ^ uiB ) ? softfloat_addMagsF16 : softfloat_subMagsF16; + return (*magsFuncPtr)( uiA, uiB ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_extF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_extF80.c new file mode 100644 index 000000000..aaeed4d0a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_extF80.c @@ -0,0 +1,101 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extFloat80_t f16_to_extF80( float16_t a ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast8_t exp; + uint_fast16_t frac; + struct commonNaN commonNaN; + struct uint128 uiZ; + uint_fast16_t uiZ64; + uint_fast64_t uiZ0; + struct exp8_sig16 normExpSig; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF16UI( uiA ); + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + if ( frac ) { + softfloat_f16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToExtF80UI( &commonNaN ); + uiZ64 = uiZ.v64; + uiZ0 = uiZ.v0; + } else { + uiZ64 = packToExtF80UI64( sign, 0x7FFF ); + uiZ0 = UINT64_C( 0x8000000000000000 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ64 = packToExtF80UI64( sign, 0 ); + uiZ0 = 0; + goto uiZ; + } + normExpSig = softfloat_normSubnormalF16Sig( frac ); + exp = normExpSig.exp; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ64 = packToExtF80UI64( sign, exp + 0x3FF0 ); + uiZ0 = (uint_fast64_t) (frac | 0x0400)<<53; + uiZ: + uZ.s.signExp = uiZ64; + uZ.s.signif = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_extF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_extF80M.c new file mode 100644 index 000000000..75c5e6041 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_extF80M.c @@ -0,0 +1,111 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void f16_to_extF80M( float16_t a, extFloat80_t *zPtr ) +{ + + *zPtr = f16_to_extF80( a ); + +} + +#else + +void f16_to_extF80M( float16_t a, extFloat80_t *zPtr ) +{ + struct extFloat80M *zSPtr; + union ui16_f16 uA; + uint16_t uiA; + bool sign; + int_fast8_t exp; + uint16_t frac; + struct commonNaN commonNaN; + uint_fast16_t uiZ64; + uint32_t uiZ32; + struct exp8_sig16 normExpSig; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zSPtr = (struct extFloat80M *) zPtr; + uA.f = a; + uiA = uA.ui; + sign = signF16UI( uiA ); + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + if ( frac ) { + softfloat_f16UIToCommonNaN( uiA, &commonNaN ); + softfloat_commonNaNToExtF80M( &commonNaN, zSPtr ); + return; + } + uiZ64 = packToExtF80UI64( sign, 0x7FFF ); + uiZ32 = 0x80000000; + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ64 = packToExtF80UI64( sign, 0 ); + uiZ32 = 0; + goto uiZ; + } + normExpSig = softfloat_normSubnormalF16Sig( frac ); + exp = normExpSig.exp; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ64 = packToExtF80UI64( sign, exp + 0x3FF0 ); + uiZ32 = 0x80000000 | (uint32_t) frac<<21; + uiZ: + zSPtr->signExp = uiZ64; + zSPtr->signif = (uint64_t) uiZ32<<32; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f128.c new file mode 100644 index 000000000..107479af9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f128.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float128_t f16_to_f128( float16_t a ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast8_t exp; + uint_fast16_t frac; + struct commonNaN commonNaN; + struct uint128 uiZ; + struct exp8_sig16 normExpSig; + union ui128_f128 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF16UI( uiA ); + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + if ( frac ) { + softfloat_f16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF128UI( &commonNaN ); + } else { + uiZ.v64 = packToF128UI64( sign, 0x7FFF, 0 ); + uiZ.v0 = 0; + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ.v64 = packToF128UI64( sign, 0, 0 ); + uiZ.v0 = 0; + goto uiZ; + } + normExpSig = softfloat_normSubnormalF16Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ.v64 = packToF128UI64( sign, exp + 0x3FF0, (uint_fast64_t) frac<<38 ); + uiZ.v0 = 0; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f128M.c new file mode 100644 index 000000000..a31dab6ce --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f128M.c @@ -0,0 +1,111 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void f16_to_f128M( float16_t a, float128_t *zPtr ) +{ + + *zPtr = f16_to_f128( a ); + +} + +#else + +void f16_to_f128M( float16_t a, float128_t *zPtr ) +{ + uint32_t *zWPtr; + union ui16_f16 uA; + uint16_t uiA; + bool sign; + int_fast8_t exp; + uint16_t frac; + struct commonNaN commonNaN; + uint32_t uiZ96; + struct exp8_sig16 normExpSig; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zWPtr = (uint32_t *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF16UI( uiA ); + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + if ( frac ) { + softfloat_f16UIToCommonNaN( uiA, &commonNaN ); + softfloat_commonNaNToF128M( &commonNaN, zWPtr ); + return; + } + uiZ96 = packToF128UI96( sign, 0x7FFF, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ96 = packToF128UI96( sign, 0, 0 ); + goto uiZ; + } + normExpSig = softfloat_normSubnormalF16Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ96 = packToF128UI96( sign, exp + 0x3FF0, (uint32_t) frac<<6 ); + uiZ: + zWPtr[indexWord( 4, 3 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = 0; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f32.c new file mode 100644 index 000000000..c58208a86 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f32.c @@ -0,0 +1,93 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t f16_to_f32( float16_t a ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast8_t exp; + uint_fast16_t frac; + struct commonNaN commonNaN; + uint_fast32_t uiZ; + struct exp8_sig16 normExpSig; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF16UI( uiA ); + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + if ( frac ) { + softfloat_f16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF32UI( &commonNaN ); + } else { + uiZ = packToF32UI( sign, 0xFF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ = packToF32UI( sign, 0, 0 ); + goto uiZ; + } + normExpSig = softfloat_normSubnormalF16Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ = packToF32UI( sign, exp + 0x70, (uint_fast32_t) frac<<13 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f64.c new file mode 100644 index 000000000..dd85d33fc --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_f64.c @@ -0,0 +1,93 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float64_t f16_to_f64( float16_t a ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast8_t exp; + uint_fast16_t frac; + struct commonNaN commonNaN; + uint_fast64_t uiZ; + struct exp8_sig16 normExpSig; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF16UI( uiA ); + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + if ( frac ) { + softfloat_f16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF64UI( &commonNaN ); + } else { + uiZ = packToF64UI( sign, 0x7FF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ = packToF64UI( sign, 0, 0 ); + goto uiZ; + } + normExpSig = softfloat_normSubnormalF16Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ = packToF64UI( sign, exp + 0x3F0, (uint_fast64_t) frac<<42 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i32.c new file mode 100644 index 000000000..aeb2faca4 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i32.c @@ -0,0 +1,87 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t f16_to_i32( float16_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast8_t exp; + uint_fast16_t frac; + int_fast32_t sig32; + int_fast8_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF16UI( uiA ); + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + frac ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig32 = frac; + if ( exp ) { + sig32 |= 0x0400; + shiftDist = exp - 0x19; + if ( 0 <= shiftDist ) { + sig32 <<= shiftDist; + return sign ? -sig32 : sig32; + } + shiftDist = exp - 0x0D; + if ( 0 < shiftDist ) sig32 <<= shiftDist; + } + return + softfloat_roundToI32( + sign, (uint_fast32_t) sig32, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i32_r_minMag.c new file mode 100644 index 000000000..1aa72f569 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i32_r_minMag.c @@ -0,0 +1,88 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t f16_to_i32_r_minMag( float16_t a, bool exact ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + int_fast8_t exp; + uint_fast16_t frac; + int_fast8_t shiftDist; + bool sign; + int_fast32_t alignedSig; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = exp - 0x0F; + if ( shiftDist < 0 ) { + if ( exact && (exp | frac) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF16UI( uiA ); + if ( exp == 0x1F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x1F) && frac ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + alignedSig = (int_fast32_t) (frac | 0x0400)<<shiftDist; + if ( exact && (alignedSig & 0x3FF) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + alignedSig >>= 10; + return sign ? -alignedSig : alignedSig; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i64.c new file mode 100644 index 000000000..c0487cf31 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i64.c @@ -0,0 +1,87 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t f16_to_i64( float16_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast8_t exp; + uint_fast16_t frac; + int_fast32_t sig32; + int_fast8_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF16UI( uiA ); + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + frac ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig32 = frac; + if ( exp ) { + sig32 |= 0x0400; + shiftDist = exp - 0x19; + if ( 0 <= shiftDist ) { + sig32 <<= shiftDist; + return sign ? -sig32 : sig32; + } + shiftDist = exp - 0x0D; + if ( 0 < shiftDist ) sig32 <<= shiftDist; + } + return + softfloat_roundToI32( + sign, (uint_fast32_t) sig32, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i64_r_minMag.c new file mode 100644 index 000000000..25f91e210 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_i64_r_minMag.c @@ -0,0 +1,88 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t f16_to_i64_r_minMag( float16_t a, bool exact ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + int_fast8_t exp; + uint_fast16_t frac; + int_fast8_t shiftDist; + bool sign; + int_fast32_t alignedSig; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = exp - 0x0F; + if ( shiftDist < 0 ) { + if ( exact && (exp | frac) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF16UI( uiA ); + if ( exp == 0x1F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x1F) && frac ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + alignedSig = (int_fast32_t) (frac | 0x0400)<<shiftDist; + if ( exact && (alignedSig & 0x3FF) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + alignedSig >>= 10; + return sign ? -alignedSig : alignedSig; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui32.c new file mode 100644 index 000000000..19ab66e72 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui32.c @@ -0,0 +1,84 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t f16_to_ui32( float16_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast8_t exp; + uint_fast16_t frac; + uint_fast32_t sig32; + int_fast8_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF16UI( uiA ); + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + frac ? ui32_fromNaN + : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig32 = frac; + if ( exp ) { + sig32 |= 0x0400; + shiftDist = exp - 0x19; + if ( (0 <= shiftDist) && ! sign ) { + return sig32<<shiftDist; + } + shiftDist = exp - 0x0D; + if ( 0 < shiftDist ) sig32 <<= shiftDist; + } + return softfloat_roundToUI32( sign, sig32, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui32_r_minMag.c new file mode 100644 index 000000000..a21d41a32 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui32_r_minMag.c @@ -0,0 +1,87 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t f16_to_ui32_r_minMag( float16_t a, bool exact ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + int_fast8_t exp; + uint_fast16_t frac; + int_fast8_t shiftDist; + bool sign; + uint_fast32_t alignedSig; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = exp - 0x0F; + if ( shiftDist < 0 ) { + if ( exact && (exp | frac) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF16UI( uiA ); + if ( sign || (exp == 0x1F) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x1F) && frac ? ui32_fromNaN + : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + alignedSig = (uint_fast32_t) (frac | 0x0400)<<shiftDist; + if ( exact && (alignedSig & 0x3FF) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return alignedSig>>10; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui64.c new file mode 100644 index 000000000..4260b7a05 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui64.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t f16_to_ui64( float16_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast8_t exp; + uint_fast16_t frac; + uint_fast32_t sig32; + int_fast8_t shiftDist; +#ifndef SOFTFLOAT_FAST_INT64 + uint32_t extSig[3]; +#endif + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF16UI( uiA ); + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + frac ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig32 = frac; + if ( exp ) { + sig32 |= 0x0400; + shiftDist = exp - 0x19; + if ( (0 <= shiftDist) && ! sign ) { + return sig32<<shiftDist; + } + shiftDist = exp - 0x0D; + if ( 0 < shiftDist ) sig32 <<= shiftDist; + } +#ifdef SOFTFLOAT_FAST_INT64 + return + softfloat_roundToUI64( + sign, sig32>>12, (uint_fast64_t) sig32<<52, roundingMode, exact ); +#else + extSig[indexWord( 3, 2 )] = 0; + extSig[indexWord( 3, 1 )] = sig32>>12; + extSig[indexWord( 3, 0 )] = sig32<<20; + return softfloat_roundMToUI64( sign, extSig, roundingMode, exact ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui64_r_minMag.c new file mode 100644 index 000000000..098a59763 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f16_to_ui64_r_minMag.c @@ -0,0 +1,87 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t f16_to_ui64_r_minMag( float16_t a, bool exact ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + int_fast8_t exp; + uint_fast16_t frac; + int_fast8_t shiftDist; + bool sign; + uint_fast32_t alignedSig; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = exp - 0x0F; + if ( shiftDist < 0 ) { + if ( exact && (exp | frac) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF16UI( uiA ); + if ( sign || (exp == 0x1F) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x1F) && frac ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + alignedSig = (uint_fast32_t) (frac | 0x0400)<<shiftDist; + if ( exact && (alignedSig & 0x3FF) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return alignedSig>>10; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_add.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_add.c new file mode 100644 index 000000000..f59ac0a8a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_add.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float32_t f32_add( float32_t a, float32_t b ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + union ui32_f32 uB; + uint_fast32_t uiB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1) + float32_t (*magsFuncPtr)( uint_fast32_t, uint_fast32_t ); +#endif + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; +#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL) + if ( signF32UI( uiA ^ uiB ) ) { + return softfloat_subMagsF32( uiA, uiB ); + } else { + return softfloat_addMagsF32( uiA, uiB ); + } +#else + magsFuncPtr = + signF32UI( uiA ^ uiB ) ? softfloat_subMagsF32 : softfloat_addMagsF32; + return (*magsFuncPtr)( uiA, uiB ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_div.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_div.c new file mode 100644 index 000000000..8d4447914 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_div.c @@ -0,0 +1,180 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t f32_div( float32_t a, float32_t b ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool signA; + int_fast16_t expA; + uint_fast32_t sigA; + union ui32_f32 uB; + uint_fast32_t uiB; + bool signB; + int_fast16_t expB; + uint_fast32_t sigB; + bool signZ; + struct exp16_sig32 normExpSig; + int_fast16_t expZ; +#ifdef SOFTFLOAT_FAST_DIV64TO32 + uint_fast64_t sig64A; + uint_fast32_t sigZ; +#else + uint_fast32_t sigZ; + uint_fast64_t rem; +#endif + uint_fast32_t uiZ; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF32UI( uiA ); + expA = expF32UI( uiA ); + sigA = fracF32UI( uiA ); + uB.f = b; + uiB = uB.ui; + signB = signF32UI( uiB ); + expB = expF32UI( uiB ); + sigB = fracF32UI( uiB ); + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0xFF ) { + if ( sigA ) goto propagateNaN; + if ( expB == 0xFF ) { + if ( sigB ) goto propagateNaN; + goto invalid; + } + goto infinity; + } + if ( expB == 0xFF ) { + if ( sigB ) goto propagateNaN; + goto zero; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) { + if ( ! sigB ) { + if ( ! (expA | sigA) ) goto invalid; + softfloat_raiseFlags( softfloat_flag_infinite ); + goto infinity; + } + normExpSig = softfloat_normSubnormalF32Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalF32Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA - expB + 0x7E; + sigA |= 0x00800000; + sigB |= 0x00800000; +#ifdef SOFTFLOAT_FAST_DIV64TO32 + if ( sigA < sigB ) { + --expZ; + sig64A = (uint_fast64_t) sigA<<31; + } else { + sig64A = (uint_fast64_t) sigA<<30; + } + sigZ = sig64A / sigB; + if ( ! (sigZ & 0x3F) ) sigZ |= ((uint_fast64_t) sigB * sigZ != sig64A); +#else + if ( sigA < sigB ) { + --expZ; + sigA <<= 8; + } else { + sigA <<= 7; + } + sigB <<= 8; + sigZ = ((uint_fast64_t) sigA * softfloat_approxRecip32_1( sigB ))>>32; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sigZ += 2; + if ( (sigZ & 0x3F) < 2 ) { + sigZ &= ~3; +#ifdef SOFTFLOAT_FAST_INT64 + rem = ((uint_fast64_t) sigA<<31) - (uint_fast64_t) sigZ * sigB; +#else + rem = ((uint_fast64_t) sigA<<32) - (uint_fast64_t) (sigZ<<1) * sigB; +#endif + if ( rem & UINT64_C( 0x8000000000000000 ) ) { + sigZ -= 4; + } else { + if ( rem ) sigZ |= 1; + } + } +#endif + return softfloat_roundPackToF32( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF32UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF32UI; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infinity: + uiZ = packToF32UI( signZ, 0xFF, 0 ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ = packToF32UI( signZ, 0, 0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_eq.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_eq.c new file mode 100644 index 000000000..316fe6a4d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_eq.c @@ -0,0 +1,66 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f32_eq( float32_t a, float32_t b ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + union ui32_f32 uB; + uint_fast32_t uiB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) { + if ( + softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + return (uiA == uiB) || ! (uint32_t) ((uiA | uiB)<<1); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_eq_signaling.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_eq_signaling.c new file mode 100644 index 000000000..03395f310 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_eq_signaling.c @@ -0,0 +1,61 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f32_eq_signaling( float32_t a, float32_t b ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + union ui32_f32 uB; + uint_fast32_t uiB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + return (uiA == uiB) || ! (uint32_t) ((uiA | uiB)<<1); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_isSignalingNaN.c new file mode 100644 index 000000000..d98cc9b26 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_isSignalingNaN.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f32_isSignalingNaN( float32_t a ) +{ + union ui32_f32 uA; + + uA.f = a; + return softfloat_isSigNaNF32UI( uA.ui ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_le.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_le.c new file mode 100644 index 000000000..83a30079d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_le.c @@ -0,0 +1,66 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f32_le( float32_t a, float32_t b ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + union ui32_f32 uB; + uint_fast32_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF32UI( uiA ); + signB = signF32UI( uiB ); + return + (signA != signB) ? signA || ! (uint32_t) ((uiA | uiB)<<1) + : (uiA == uiB) || (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_le_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_le_quiet.c new file mode 100644 index 000000000..329fe3937 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_le_quiet.c @@ -0,0 +1,71 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f32_le_quiet( float32_t a, float32_t b ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + union ui32_f32 uB; + uint_fast32_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) { + if ( + softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signF32UI( uiA ); + signB = signF32UI( uiB ); + return + (signA != signB) ? signA || ! (uint32_t) ((uiA | uiB)<<1) + : (uiA == uiB) || (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_lt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_lt.c new file mode 100644 index 000000000..ddc180499 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_lt.c @@ -0,0 +1,66 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f32_lt( float32_t a, float32_t b ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + union ui32_f32 uB; + uint_fast32_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF32UI( uiA ); + signB = signF32UI( uiB ); + return + (signA != signB) ? signA && ((uint32_t) ((uiA | uiB)<<1) != 0) + : (uiA != uiB) && (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_lt_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_lt_quiet.c new file mode 100644 index 000000000..59c9cf12c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_lt_quiet.c @@ -0,0 +1,71 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f32_lt_quiet( float32_t a, float32_t b ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + union ui32_f32 uB; + uint_fast32_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) { + if ( + softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signF32UI( uiA ); + signB = signF32UI( uiB ); + return + (signA != signB) ? signA && ((uint32_t) ((uiA | uiB)<<1) != 0) + : (uiA != uiB) && (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_mul.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_mul.c new file mode 100644 index 000000000..b1f8ec002 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_mul.c @@ -0,0 +1,137 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t f32_mul( float32_t a, float32_t b ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool signA; + int_fast16_t expA; + uint_fast32_t sigA; + union ui32_f32 uB; + uint_fast32_t uiB; + bool signB; + int_fast16_t expB; + uint_fast32_t sigB; + bool signZ; + uint_fast32_t magBits; + struct exp16_sig32 normExpSig; + int_fast16_t expZ; + uint_fast32_t sigZ, uiZ; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF32UI( uiA ); + expA = expF32UI( uiA ); + sigA = fracF32UI( uiA ); + uB.f = b; + uiB = uB.ui; + signB = signF32UI( uiB ); + expB = expF32UI( uiB ); + sigB = fracF32UI( uiB ); + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0xFF ) { + if ( sigA || ((expB == 0xFF) && sigB) ) goto propagateNaN; + magBits = expB | sigB; + goto infArg; + } + if ( expB == 0xFF ) { + if ( sigB ) goto propagateNaN; + magBits = expA | sigA; + goto infArg; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalF32Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! sigB ) goto zero; + normExpSig = softfloat_normSubnormalF32Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0x7F; + sigA = (sigA | 0x00800000)<<7; + sigB = (sigB | 0x00800000)<<8; + sigZ = softfloat_shortShiftRightJam64( (uint_fast64_t) sigA * sigB, 32 ); + if ( sigZ < 0x40000000 ) { + --expZ; + sigZ <<= 1; + } + return softfloat_roundPackToF32( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF32UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infArg: + if ( ! magBits ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF32UI; + } else { + uiZ = packToF32UI( signZ, 0xFF, 0 ); + } + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ = packToF32UI( signZ, 0, 0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_mulAdd.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_mulAdd.c new file mode 100644 index 000000000..b77777e4e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_mulAdd.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float32_t f32_mulAdd( float32_t a, float32_t b, float32_t c ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + union ui32_f32 uB; + uint_fast32_t uiB; + union ui32_f32 uC; + uint_fast32_t uiC; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + uC.f = c; + uiC = uC.ui; + return softfloat_mulAddF32( uiA, uiB, uiC, 0 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_rem.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_rem.c new file mode 100644 index 000000000..2d74c8cd9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_rem.c @@ -0,0 +1,168 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t f32_rem( float32_t a, float32_t b ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool signA; + int_fast16_t expA; + uint_fast32_t sigA; + union ui32_f32 uB; + uint_fast32_t uiB; + int_fast16_t expB; + uint_fast32_t sigB; + struct exp16_sig32 normExpSig; + uint32_t rem; + int_fast16_t expDiff; + uint32_t q, recip32, altRem, meanRem; + bool signRem; + uint_fast32_t uiZ; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF32UI( uiA ); + expA = expF32UI( uiA ); + sigA = fracF32UI( uiA ); + uB.f = b; + uiB = uB.ui; + expB = expF32UI( uiB ); + sigB = fracF32UI( uiB ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0xFF ) { + if ( sigA || ((expB == 0xFF) && sigB) ) goto propagateNaN; + goto invalid; + } + if ( expB == 0xFF ) { + if ( sigB ) goto propagateNaN; + return a; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) { + if ( ! sigB ) goto invalid; + normExpSig = softfloat_normSubnormalF32Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) { + if ( ! sigA ) return a; + normExpSig = softfloat_normSubnormalF32Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + rem = sigA | 0x00800000; + sigB |= 0x00800000; + expDiff = expA - expB; + if ( expDiff < 1 ) { + if ( expDiff < -1 ) return a; + sigB <<= 6; + if ( expDiff ) { + rem <<= 5; + q = 0; + } else { + rem <<= 6; + q = (sigB <= rem); + if ( q ) rem -= sigB; + } + } else { + recip32 = softfloat_approxRecip32_1( sigB<<8 ); + /*-------------------------------------------------------------------- + | Changing the shift of `rem' here requires also changing the initial + | subtraction from `expDiff'. + *--------------------------------------------------------------------*/ + rem <<= 7; + expDiff -= 31; + /*-------------------------------------------------------------------- + | The scale of `sigB' affects how many bits are obtained during each + | cycle of the loop. Currently this is 29 bits per loop iteration, + | which is believed to be the maximum possible. + *--------------------------------------------------------------------*/ + sigB <<= 6; + for (;;) { + q = (rem * (uint_fast64_t) recip32)>>32; + if ( expDiff < 0 ) break; + rem = -(q * (uint32_t) sigB); + expDiff -= 29; + } + /*-------------------------------------------------------------------- + | (`expDiff' cannot be less than -30 here.) + *--------------------------------------------------------------------*/ + q >>= ~expDiff & 31; + rem = (rem<<(expDiff + 30)) - q * (uint32_t) sigB; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + do { + altRem = rem; + ++q; + rem -= sigB; + } while ( ! (rem & 0x80000000) ); + meanRem = rem + altRem; + if ( (meanRem & 0x80000000) || (! meanRem && (q & 1)) ) rem = altRem; + signRem = signA; + if ( 0x80000000 <= rem ) { + signRem = ! signRem; + rem = -rem; + } + return softfloat_normRoundPackToF32( signRem, expB, rem ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF32UI( uiA, uiB ); + goto uiZ; + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF32UI; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_roundToInt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_roundToInt.c new file mode 100644 index 000000000..801a76919 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_roundToInt.c @@ -0,0 +1,120 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t f32_roundToInt( float32_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + int_fast16_t exp; + uint_fast32_t uiZ, lastBitMask, roundBitsMask; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp <= 0x7E ) { + if ( !(uint32_t) (uiA<<1) ) return a; + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + uiZ = uiA & packToF32UI( 1, 0, 0 ); + switch ( roundingMode ) { + case softfloat_round_near_even: + if ( !fracF32UI( uiA ) ) break; + case softfloat_round_near_maxMag: + if ( exp == 0x7E ) uiZ |= packToF32UI( 0, 0x7F, 0 ); + break; + case softfloat_round_min: + if ( uiZ ) uiZ = packToF32UI( 1, 0x7F, 0 ); + break; + case softfloat_round_max: + if ( !uiZ ) uiZ = packToF32UI( 0, 0x7F, 0 ); + break; +#ifdef SOFTFLOAT_ROUND_ODD + case softfloat_round_odd: + uiZ |= packToF32UI( 0, 0x7F, 0 ); + break; +#endif + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x96 <= exp ) { + if ( (exp == 0xFF) && fracF32UI( uiA ) ) { + uiZ = softfloat_propagateNaNF32UI( uiA, 0 ); + goto uiZ; + } + return a; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ = uiA; + lastBitMask = (uint_fast32_t) 1<<(0x96 - exp); + roundBitsMask = lastBitMask - 1; + if ( roundingMode == softfloat_round_near_maxMag ) { + uiZ += lastBitMask>>1; + } else if ( roundingMode == softfloat_round_near_even ) { + uiZ += lastBitMask>>1; + if ( !(uiZ & roundBitsMask) ) uiZ &= ~lastBitMask; + } else if ( + roundingMode + == (signF32UI( uiZ ) ? softfloat_round_min : softfloat_round_max) + ) { + uiZ += roundBitsMask; + } + uiZ &= ~roundBitsMask; + if ( uiZ != uiA ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) uiZ |= lastBitMask; +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_sqrt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_sqrt.c new file mode 100644 index 000000000..9c6a99846 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_sqrt.c @@ -0,0 +1,121 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t f32_sqrt( float32_t a ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool signA; + int_fast16_t expA; + uint_fast32_t sigA, uiZ; + struct exp16_sig32 normExpSig; + int_fast16_t expZ; + uint_fast32_t sigZ, shiftedSigZ; + uint32_t negRem; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF32UI( uiA ); + expA = expF32UI( uiA ); + sigA = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0xFF ) { + if ( sigA ) { + uiZ = softfloat_propagateNaNF32UI( uiA, 0 ); + goto uiZ; + } + if ( ! signA ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( signA ) { + if ( ! (expA | sigA) ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) return a; + normExpSig = softfloat_normSubnormalF32Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = ((expA - 0x7F)>>1) + 0x7E; + expA &= 1; + sigA = (sigA | 0x00800000)<<8; + sigZ = + ((uint_fast64_t) sigA * softfloat_approxRecipSqrt32_1( expA, sigA )) + >>32; + if ( expA ) sigZ >>= 1; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sigZ += 2; + if ( (sigZ & 0x3F) < 2 ) { + shiftedSigZ = sigZ>>2; + negRem = shiftedSigZ * shiftedSigZ; + sigZ &= ~3; + if ( negRem & 0x80000000 ) { + sigZ |= 1; + } else { + if ( negRem ) --sigZ; + } + } + return softfloat_roundPackToF32( 0, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF32UI; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_sub.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_sub.c new file mode 100644 index 000000000..edbcd2fb1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_sub.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float32_t f32_sub( float32_t a, float32_t b ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + union ui32_f32 uB; + uint_fast32_t uiB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1) + float32_t (*magsFuncPtr)( uint_fast32_t, uint_fast32_t ); +#endif + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; +#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL) + if ( signF32UI( uiA ^ uiB ) ) { + return softfloat_addMagsF32( uiA, uiB ); + } else { + return softfloat_subMagsF32( uiA, uiB ); + } +#else + magsFuncPtr = + signF32UI( uiA ^ uiB ) ? softfloat_addMagsF32 : softfloat_subMagsF32; + return (*magsFuncPtr)( uiA, uiB ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_extF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_extF80.c new file mode 100644 index 000000000..8d3545701 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_extF80.c @@ -0,0 +1,101 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extFloat80_t f32_to_extF80( float32_t a ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool sign; + int_fast16_t exp; + uint_fast32_t frac; + struct commonNaN commonNaN; + struct uint128 uiZ; + uint_fast16_t uiZ64; + uint_fast64_t uiZ0; + struct exp16_sig32 normExpSig; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF32UI( uiA ); + exp = expF32UI( uiA ); + frac = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0xFF ) { + if ( frac ) { + softfloat_f32UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToExtF80UI( &commonNaN ); + uiZ64 = uiZ.v64; + uiZ0 = uiZ.v0; + } else { + uiZ64 = packToExtF80UI64( sign, 0x7FFF ); + uiZ0 = UINT64_C( 0x8000000000000000 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ64 = packToExtF80UI64( sign, 0 ); + uiZ0 = 0; + goto uiZ; + } + normExpSig = softfloat_normSubnormalF32Sig( frac ); + exp = normExpSig.exp; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ64 = packToExtF80UI64( sign, exp + 0x3F80 ); + uiZ0 = (uint_fast64_t) (frac | 0x00800000)<<40; + uiZ: + uZ.s.signExp = uiZ64; + uZ.s.signif = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_extF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_extF80M.c new file mode 100644 index 000000000..03580fd5f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_extF80M.c @@ -0,0 +1,111 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void f32_to_extF80M( float32_t a, extFloat80_t *zPtr ) +{ + + *zPtr = f32_to_extF80( a ); + +} + +#else + +void f32_to_extF80M( float32_t a, extFloat80_t *zPtr ) +{ + struct extFloat80M *zSPtr; + union ui32_f32 uA; + uint32_t uiA; + bool sign; + int_fast16_t exp; + uint32_t frac; + struct commonNaN commonNaN; + uint_fast16_t uiZ64; + uint32_t uiZ32; + struct exp16_sig32 normExpSig; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zSPtr = (struct extFloat80M *) zPtr; + uA.f = a; + uiA = uA.ui; + sign = signF32UI( uiA ); + exp = expF32UI( uiA ); + frac = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0xFF ) { + if ( frac ) { + softfloat_f32UIToCommonNaN( uiA, &commonNaN ); + softfloat_commonNaNToExtF80M( &commonNaN, zSPtr ); + return; + } + uiZ64 = packToExtF80UI64( sign, 0x7FFF ); + uiZ32 = 0x80000000; + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ64 = packToExtF80UI64( sign, 0 ); + uiZ32 = 0; + goto uiZ; + } + normExpSig = softfloat_normSubnormalF32Sig( frac ); + exp = normExpSig.exp; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ64 = packToExtF80UI64( sign, exp + 0x3F80 ); + uiZ32 = 0x80000000 | (uint32_t) frac<<8; + uiZ: + zSPtr->signExp = uiZ64; + zSPtr->signif = (uint64_t) uiZ32<<32; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f128.c new file mode 100644 index 000000000..ee0b414c1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f128.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float128_t f32_to_f128( float32_t a ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool sign; + int_fast16_t exp; + uint_fast32_t frac; + struct commonNaN commonNaN; + struct uint128 uiZ; + struct exp16_sig32 normExpSig; + union ui128_f128 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF32UI( uiA ); + exp = expF32UI( uiA ); + frac = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0xFF ) { + if ( frac ) { + softfloat_f32UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF128UI( &commonNaN ); + } else { + uiZ.v64 = packToF128UI64( sign, 0x7FFF, 0 ); + uiZ.v0 = 0; + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ.v64 = packToF128UI64( sign, 0, 0 ); + uiZ.v0 = 0; + goto uiZ; + } + normExpSig = softfloat_normSubnormalF32Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ.v64 = packToF128UI64( sign, exp + 0x3F80, (uint_fast64_t) frac<<25 ); + uiZ.v0 = 0; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f128M.c new file mode 100644 index 000000000..cd3ad693f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f128M.c @@ -0,0 +1,115 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void f32_to_f128M( float32_t a, float128_t *zPtr ) +{ + + *zPtr = f32_to_f128( a ); + +} + +#else + +void f32_to_f128M( float32_t a, float128_t *zPtr ) +{ + uint32_t *zWPtr; + union ui32_f32 uA; + uint32_t uiA; + bool sign; + int_fast16_t exp; + uint32_t frac, uiZ64; + struct commonNaN commonNaN; + uint32_t uiZ96; + struct exp16_sig32 normExpSig; + uint64_t frac64; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zWPtr = (uint32_t *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF32UI( uiA ); + exp = expF32UI( uiA ); + frac = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ64 = 0; + if ( exp == 0xFF ) { + if ( frac ) { + softfloat_f32UIToCommonNaN( uiA, &commonNaN ); + softfloat_commonNaNToF128M( &commonNaN, zWPtr ); + return; + } + uiZ96 = packToF128UI96( sign, 0x7FFF, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ96 = packToF128UI96( sign, 0, 0 ); + goto uiZ; + } + normExpSig = softfloat_normSubnormalF32Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac64 = (uint64_t) frac<<25; + uiZ96 = packToF128UI96( sign, exp + 0x3F80, frac64>>32 ); + uiZ64 = frac64; + uiZ: + zWPtr[indexWord( 4, 3 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = uiZ64; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f16.c new file mode 100644 index 000000000..a00b2e8de --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f16.c @@ -0,0 +1,88 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t f32_to_f16( float32_t a ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool sign; + int_fast16_t exp; + uint_fast32_t frac; + struct commonNaN commonNaN; + uint_fast16_t uiZ, frac16; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF32UI( uiA ); + exp = expF32UI( uiA ); + frac = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0xFF ) { + if ( frac ) { + softfloat_f32UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF16UI( &commonNaN ); + } else { + uiZ = packToF16UI( sign, 0x1F, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac16 = frac>>9 | ((frac & 0x1FF) != 0); + if ( ! (exp | frac16) ) { + uiZ = packToF16UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + return softfloat_roundPackToF16( sign, exp - 0x71, frac16 | 0x4000 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f64.c new file mode 100644 index 000000000..6cd08eddb --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_f64.c @@ -0,0 +1,93 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float64_t f32_to_f64( float32_t a ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool sign; + int_fast16_t exp; + uint_fast32_t frac; + struct commonNaN commonNaN; + uint_fast64_t uiZ; + struct exp16_sig32 normExpSig; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF32UI( uiA ); + exp = expF32UI( uiA ); + frac = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0xFF ) { + if ( frac ) { + softfloat_f32UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF64UI( &commonNaN ); + } else { + uiZ = packToF64UI( sign, 0x7FF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ = packToF64UI( sign, 0, 0 ); + goto uiZ; + } + normExpSig = softfloat_normSubnormalF32Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ = packToF64UI( sign, exp + 0x380, (uint_fast64_t) frac<<29 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i32.c new file mode 100644 index 000000000..241ab8e8c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i32.c @@ -0,0 +1,84 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t f32_to_i32( float32_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool sign; + int_fast16_t exp; + uint_fast32_t sig; + uint_fast64_t sig64; + int_fast16_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF32UI( uiA ); + exp = expF32UI( uiA ); + sig = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ +#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow) + if ( (exp == 0xFF) && sig ) { +#if (i32_fromNaN == i32_fromPosOverflow) + sign = 0; +#elif (i32_fromNaN == i32_fromNegOverflow) + sign = 1; +#else + softfloat_raiseFlags( softfloat_flag_invalid ); + return i32_fromNaN; +#endif + } +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig |= 0x00800000; + sig64 = (uint_fast64_t) sig<<32; + shiftDist = 0xAA - exp; + if ( 0 < shiftDist ) sig64 = softfloat_shiftRightJam64( sig64, shiftDist ); + return softfloat_roundToI32( sign, sig64, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i32_r_minMag.c new file mode 100644 index 000000000..f8134f461 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i32_r_minMag.c @@ -0,0 +1,89 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t f32_to_i32_r_minMag( float32_t a, bool exact ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + int_fast16_t exp; + uint_fast32_t sig; + int_fast16_t shiftDist; + bool sign; + int_fast32_t absZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF32UI( uiA ); + sig = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x9E - exp; + if ( 32 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF32UI( uiA ); + if ( shiftDist <= 0 ) { + if ( uiA == packToF32UI( 1, 0x9E, 0 ) ) return -0x7FFFFFFF - 1; + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0xFF) && sig ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig = (sig | 0x00800000)<<8; + absZ = sig>>shiftDist; + if ( exact && ((uint_fast32_t) absZ<<shiftDist != sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return sign ? -absZ : absZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i64.c new file mode 100644 index 000000000..816bc7be4 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i64.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t f32_to_i64( float32_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool sign; + int_fast16_t exp; + uint_fast32_t sig; + int_fast16_t shiftDist; +#ifdef SOFTFLOAT_FAST_INT64 + uint_fast64_t sig64, extra; + struct uint64_extra sig64Extra; +#else + uint32_t extSig[3]; +#endif + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF32UI( uiA ); + exp = expF32UI( uiA ); + sig = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0xBE - exp; + if ( shiftDist < 0 ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0xFF) && sig ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig |= 0x00800000; +#ifdef SOFTFLOAT_FAST_INT64 + sig64 = (uint_fast64_t) sig<<40; + extra = 0; + if ( shiftDist ) { + sig64Extra = softfloat_shiftRightJam64Extra( sig64, 0, shiftDist ); + sig64 = sig64Extra.v; + extra = sig64Extra.extra; + } + return softfloat_roundToI64( sign, sig64, extra, roundingMode, exact ); +#else + extSig[indexWord( 3, 2 )] = sig<<8; + extSig[indexWord( 3, 1 )] = 0; + extSig[indexWord( 3, 0 )] = 0; + if ( shiftDist ) softfloat_shiftRightJam96M( extSig, shiftDist, extSig ); + return softfloat_roundMToI64( sign, extSig, roundingMode, exact ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i64_r_minMag.c new file mode 100644 index 000000000..346f6b83d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_i64_r_minMag.c @@ -0,0 +1,94 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t f32_to_i64_r_minMag( float32_t a, bool exact ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + int_fast16_t exp; + uint_fast32_t sig; + int_fast16_t shiftDist; + bool sign; + uint_fast64_t sig64; + int_fast64_t absZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF32UI( uiA ); + sig = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0xBE - exp; + if ( 64 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF32UI( uiA ); + if ( shiftDist <= 0 ) { + if ( uiA == packToF32UI( 1, 0xBE, 0 ) ) { + return -INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0xFF) && sig ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig |= 0x00800000; + sig64 = (uint_fast64_t) sig<<40; + absZ = sig64>>shiftDist; + shiftDist = 40 - shiftDist; + if ( exact && (shiftDist < 0) && (uint32_t) (sig<<(shiftDist & 31)) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return sign ? -absZ : absZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui32.c new file mode 100644 index 000000000..32d9eaca1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui32.c @@ -0,0 +1,84 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t f32_to_ui32( float32_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool sign; + int_fast16_t exp; + uint_fast32_t sig; + uint_fast64_t sig64; + int_fast16_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF32UI( uiA ); + exp = expF32UI( uiA ); + sig = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ +#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow) + if ( (exp == 0xFF) && sig ) { +#if (ui32_fromNaN == ui32_fromPosOverflow) + sign = 0; +#elif (ui32_fromNaN == ui32_fromNegOverflow) + sign = 1; +#else + softfloat_raiseFlags( softfloat_flag_invalid ); + return ui32_fromNaN; +#endif + } +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig |= 0x00800000; + sig64 = (uint_fast64_t) sig<<32; + shiftDist = 0xAA - exp; + if ( 0 < shiftDist ) sig64 = softfloat_shiftRightJam64( sig64, shiftDist ); + return softfloat_roundToUI32( sign, sig64, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui32_r_minMag.c new file mode 100644 index 000000000..a90ef926e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui32_r_minMag.c @@ -0,0 +1,88 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t f32_to_ui32_r_minMag( float32_t a, bool exact ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + int_fast16_t exp; + uint_fast32_t sig; + int_fast16_t shiftDist; + bool sign; + uint_fast32_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF32UI( uiA ); + sig = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x9E - exp; + if ( 32 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF32UI( uiA ); + if ( sign || (shiftDist < 0) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0xFF) && sig ? ui32_fromNaN + : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig = (sig | 0x00800000)<<8; + z = sig>>shiftDist; + if ( exact && (z<<shiftDist != sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return z; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui64.c new file mode 100644 index 000000000..16e608a0a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui64.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t f32_to_ui64( float32_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + bool sign; + int_fast16_t exp; + uint_fast32_t sig; + int_fast16_t shiftDist; +#ifdef SOFTFLOAT_FAST_INT64 + uint_fast64_t sig64, extra; + struct uint64_extra sig64Extra; +#else + uint32_t extSig[3]; +#endif + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF32UI( uiA ); + exp = expF32UI( uiA ); + sig = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0xBE - exp; + if ( shiftDist < 0 ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0xFF) && sig ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig |= 0x00800000; +#ifdef SOFTFLOAT_FAST_INT64 + sig64 = (uint_fast64_t) sig<<40; + extra = 0; + if ( shiftDist ) { + sig64Extra = softfloat_shiftRightJam64Extra( sig64, 0, shiftDist ); + sig64 = sig64Extra.v; + extra = sig64Extra.extra; + } + return softfloat_roundToUI64( sign, sig64, extra, roundingMode, exact ); +#else + extSig[indexWord( 3, 2 )] = sig<<8; + extSig[indexWord( 3, 1 )] = 0; + extSig[indexWord( 3, 0 )] = 0; + if ( shiftDist ) softfloat_shiftRightJam96M( extSig, shiftDist, extSig ); + return softfloat_roundMToUI64( sign, extSig, roundingMode, exact ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui64_r_minMag.c new file mode 100644 index 000000000..69e00648f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f32_to_ui64_r_minMag.c @@ -0,0 +1,90 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t f32_to_ui64_r_minMag( float32_t a, bool exact ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + int_fast16_t exp; + uint_fast32_t sig; + int_fast16_t shiftDist; + bool sign; + uint_fast64_t sig64, z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF32UI( uiA ); + sig = fracF32UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0xBE - exp; + if ( 64 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF32UI( uiA ); + if ( sign || (shiftDist < 0) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0xFF) && sig ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig |= 0x00800000; + sig64 = (uint_fast64_t) sig<<40; + z = sig64>>shiftDist; + shiftDist = 40 - shiftDist; + if ( exact && (shiftDist < 0) && (uint32_t) (sig<<(shiftDist & 31)) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return z; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_add.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_add.c new file mode 100644 index 000000000..878f6da75 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_add.c @@ -0,0 +1,74 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float64_t f64_add( float64_t a, float64_t b ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool signA; + union ui64_f64 uB; + uint_fast64_t uiB; + bool signB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2) + float64_t (*magsFuncPtr)( uint_fast64_t, uint_fast64_t, bool ); +#endif + + uA.f = a; + uiA = uA.ui; + signA = signF64UI( uiA ); + uB.f = b; + uiB = uB.ui; + signB = signF64UI( uiB ); +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) + if ( signA == signB ) { + return softfloat_addMagsF64( uiA, uiB, signA ); + } else { + return softfloat_subMagsF64( uiA, uiB, signA ); + } +#else + magsFuncPtr = + (signA == signB) ? softfloat_addMagsF64 : softfloat_subMagsF64; + return (*magsFuncPtr)( uiA, uiB, signA ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_div.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_div.c new file mode 100644 index 000000000..7f5eddd4a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_div.c @@ -0,0 +1,172 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float64_t f64_div( float64_t a, float64_t b ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool signA; + int_fast16_t expA; + uint_fast64_t sigA; + union ui64_f64 uB; + uint_fast64_t uiB; + bool signB; + int_fast16_t expB; + uint_fast64_t sigB; + bool signZ; + struct exp16_sig64 normExpSig; + int_fast16_t expZ; + uint32_t recip32, sig32Z, doubleTerm; + uint_fast64_t rem; + uint32_t q; + uint_fast64_t sigZ; + uint_fast64_t uiZ; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF64UI( uiA ); + expA = expF64UI( uiA ); + sigA = fracF64UI( uiA ); + uB.f = b; + uiB = uB.ui; + signB = signF64UI( uiB ); + expB = expF64UI( uiB ); + sigB = fracF64UI( uiB ); + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FF ) { + if ( sigA ) goto propagateNaN; + if ( expB == 0x7FF ) { + if ( sigB ) goto propagateNaN; + goto invalid; + } + goto infinity; + } + if ( expB == 0x7FF ) { + if ( sigB ) goto propagateNaN; + goto zero; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) { + if ( ! sigB ) { + if ( ! (expA | sigA) ) goto invalid; + softfloat_raiseFlags( softfloat_flag_infinite ); + goto infinity; + } + normExpSig = softfloat_normSubnormalF64Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalF64Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA - expB + 0x3FE; + sigA |= UINT64_C( 0x0010000000000000 ); + sigB |= UINT64_C( 0x0010000000000000 ); + if ( sigA < sigB ) { + --expZ; + sigA <<= 11; + } else { + sigA <<= 10; + } + sigB <<= 11; + recip32 = softfloat_approxRecip32_1( sigB>>32 ) - 2; + sig32Z = ((uint32_t) (sigA>>32) * (uint_fast64_t) recip32)>>32; + doubleTerm = sig32Z<<1; + rem = + ((sigA - (uint_fast64_t) doubleTerm * (uint32_t) (sigB>>32))<<28) + - (uint_fast64_t) doubleTerm * ((uint32_t) sigB>>4); + q = (((uint32_t) (rem>>32) * (uint_fast64_t) recip32)>>32) + 4; + sigZ = ((uint_fast64_t) sig32Z<<32) + ((uint_fast64_t) q<<4); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (sigZ & 0x1FF) < 4<<4 ) { + q &= ~7; + sigZ &= ~(uint_fast64_t) 0x7F; + doubleTerm = q<<1; + rem = + ((rem - (uint_fast64_t) doubleTerm * (uint32_t) (sigB>>32))<<28) + - (uint_fast64_t) doubleTerm * ((uint32_t) sigB>>4); + if ( rem & UINT64_C( 0x8000000000000000 ) ) { + sigZ -= 1<<7; + } else { + if ( rem ) sigZ |= 1; + } + } + return softfloat_roundPackToF64( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF64UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF64UI; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infinity: + uiZ = packToF64UI( signZ, 0x7FF, 0 ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ = packToF64UI( signZ, 0, 0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_eq.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_eq.c new file mode 100644 index 000000000..e075c02f8 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_eq.c @@ -0,0 +1,66 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f64_eq( float64_t a, float64_t b ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + union ui64_f64 uB; + uint_fast64_t uiB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) { + if ( + softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + return (uiA == uiB) || ! ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF )); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_eq_signaling.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_eq_signaling.c new file mode 100644 index 000000000..d7e89a2ed --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_eq_signaling.c @@ -0,0 +1,61 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f64_eq_signaling( float64_t a, float64_t b ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + union ui64_f64 uB; + uint_fast64_t uiB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + return (uiA == uiB) || ! ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF )); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_isSignalingNaN.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_isSignalingNaN.c new file mode 100644 index 000000000..5e1411fc1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_isSignalingNaN.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f64_isSignalingNaN( float64_t a ) +{ + union ui64_f64 uA; + + uA.f = a; + return softfloat_isSigNaNF64UI( uA.ui ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_le.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_le.c new file mode 100644 index 000000000..a96808f33 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_le.c @@ -0,0 +1,67 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f64_le( float64_t a, float64_t b ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + union ui64_f64 uB; + uint_fast64_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF64UI( uiA ); + signB = signF64UI( uiB ); + return + (signA != signB) + ? signA || ! ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + : (uiA == uiB) || (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_le_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_le_quiet.c new file mode 100644 index 000000000..942afba75 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_le_quiet.c @@ -0,0 +1,72 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f64_le_quiet( float64_t a, float64_t b ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + union ui64_f64 uB; + uint_fast64_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) { + if ( + softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signF64UI( uiA ); + signB = signF64UI( uiB ); + return + (signA != signB) + ? signA || ! ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + : (uiA == uiB) || (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_lt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_lt.c new file mode 100644 index 000000000..d9cf5aa7e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_lt.c @@ -0,0 +1,67 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f64_lt( float64_t a, float64_t b ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + union ui64_f64 uB; + uint_fast64_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF64UI( uiA ); + signB = signF64UI( uiB ); + return + (signA != signB) + ? signA && ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + : (uiA != uiB) && (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_lt_quiet.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_lt_quiet.c new file mode 100644 index 000000000..89d30bc00 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_lt_quiet.c @@ -0,0 +1,72 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f64_lt_quiet( float64_t a, float64_t b ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + union ui64_f64 uB; + uint_fast64_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) { + if ( + softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signF64UI( uiA ); + signB = signF64UI( uiB ); + return + (signA != signB) + ? signA && ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + : (uiA != uiB) && (signA ^ (uiA < uiB)); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_mul.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_mul.c new file mode 100644 index 000000000..38bdc852a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_mul.c @@ -0,0 +1,150 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float64_t f64_mul( float64_t a, float64_t b ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool signA; + int_fast16_t expA; + uint_fast64_t sigA; + union ui64_f64 uB; + uint_fast64_t uiB; + bool signB; + int_fast16_t expB; + uint_fast64_t sigB; + bool signZ; + uint_fast64_t magBits; + struct exp16_sig64 normExpSig; + int_fast16_t expZ; +#ifdef SOFTFLOAT_FAST_INT64 + struct uint128 sig128Z; +#else + uint32_t sig128Z[4]; +#endif + uint_fast64_t sigZ, uiZ; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF64UI( uiA ); + expA = expF64UI( uiA ); + sigA = fracF64UI( uiA ); + uB.f = b; + uiB = uB.ui; + signB = signF64UI( uiB ); + expB = expF64UI( uiB ); + sigB = fracF64UI( uiB ); + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FF ) { + if ( sigA || ((expB == 0x7FF) && sigB) ) goto propagateNaN; + magBits = expB | sigB; + goto infArg; + } + if ( expB == 0x7FF ) { + if ( sigB ) goto propagateNaN; + magBits = expA | sigA; + goto infArg; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalF64Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! sigB ) goto zero; + normExpSig = softfloat_normSubnormalF64Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0x3FF; + sigA = (sigA | UINT64_C( 0x0010000000000000 ))<<10; + sigB = (sigB | UINT64_C( 0x0010000000000000 ))<<11; +#ifdef SOFTFLOAT_FAST_INT64 + sig128Z = softfloat_mul64To128( sigA, sigB ); + sigZ = sig128Z.v64 | (sig128Z.v0 != 0); +#else + softfloat_mul64To128M( sigA, sigB, sig128Z ); + sigZ = + (uint64_t) sig128Z[indexWord( 4, 3 )]<<32 | sig128Z[indexWord( 4, 2 )]; + if ( sig128Z[indexWord( 4, 1 )] || sig128Z[indexWord( 4, 0 )] ) sigZ |= 1; +#endif + if ( sigZ < UINT64_C( 0x4000000000000000 ) ) { + --expZ; + sigZ <<= 1; + } + return softfloat_roundPackToF64( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF64UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infArg: + if ( ! magBits ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF64UI; + } else { + uiZ = packToF64UI( signZ, 0x7FF, 0 ); + } + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ = packToF64UI( signZ, 0, 0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_mulAdd.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_mulAdd.c new file mode 100644 index 000000000..13fc38287 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_mulAdd.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float64_t f64_mulAdd( float64_t a, float64_t b, float64_t c ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + union ui64_f64 uB; + uint_fast64_t uiB; + union ui64_f64 uC; + uint_fast64_t uiC; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + uC.f = c; + uiC = uC.ui; + return softfloat_mulAddF64( uiA, uiB, uiC, 0 ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_rem.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_rem.c new file mode 100644 index 000000000..ca5350c94 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_rem.c @@ -0,0 +1,189 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float64_t f64_rem( float64_t a, float64_t b ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool signA; + int_fast16_t expA; + uint_fast64_t sigA; + union ui64_f64 uB; + uint_fast64_t uiB; + int_fast16_t expB; + uint_fast64_t sigB; + struct exp16_sig64 normExpSig; + uint64_t rem; + int_fast16_t expDiff; + uint32_t q, recip32; + uint_fast64_t q64; + uint64_t altRem, meanRem; + bool signRem; + uint_fast64_t uiZ; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF64UI( uiA ); + expA = expF64UI( uiA ); + sigA = fracF64UI( uiA ); + uB.f = b; + uiB = uB.ui; + expB = expF64UI( uiB ); + sigB = fracF64UI( uiB ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FF ) { + if ( sigA || ((expB == 0x7FF) && sigB) ) goto propagateNaN; + goto invalid; + } + if ( expB == 0x7FF ) { + if ( sigB ) goto propagateNaN; + return a; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA < expB - 1 ) return a; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) { + if ( ! sigB ) goto invalid; + normExpSig = softfloat_normSubnormalF64Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) { + if ( ! sigA ) return a; + normExpSig = softfloat_normSubnormalF64Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + rem = sigA | UINT64_C( 0x0010000000000000 ); + sigB |= UINT64_C( 0x0010000000000000 ); + expDiff = expA - expB; + if ( expDiff < 1 ) { + if ( expDiff < -1 ) return a; + sigB <<= 9; + if ( expDiff ) { + rem <<= 8; + q = 0; + } else { + rem <<= 9; + q = (sigB <= rem); + if ( q ) rem -= sigB; + } + } else { + recip32 = softfloat_approxRecip32_1( sigB>>21 ); + /*-------------------------------------------------------------------- + | Changing the shift of `rem' here requires also changing the initial + | subtraction from `expDiff'. + *--------------------------------------------------------------------*/ + rem <<= 9; + expDiff -= 30; + /*-------------------------------------------------------------------- + | The scale of `sigB' affects how many bits are obtained during each + | cycle of the loop. Currently this is 29 bits per loop iteration, + | the maximum possible. + *--------------------------------------------------------------------*/ + sigB <<= 9; + for (;;) { + q64 = (uint32_t) (rem>>32) * (uint_fast64_t) recip32; + if ( expDiff < 0 ) break; + q = (q64 + 0x80000000)>>32; +#ifdef SOFTFLOAT_FAST_INT64 + rem <<= 29; +#else + rem = (uint_fast64_t) (uint32_t) (rem>>3)<<32; +#endif + rem -= q * (uint64_t) sigB; + if ( rem & UINT64_C( 0x8000000000000000 ) ) rem += sigB; + expDiff -= 29; + } + /*-------------------------------------------------------------------- + | (`expDiff' cannot be less than -29 here.) + *--------------------------------------------------------------------*/ + q = (uint32_t) (q64>>32)>>(~expDiff & 31); + rem = (rem<<(expDiff + 30)) - q * (uint64_t) sigB; + if ( rem & UINT64_C( 0x8000000000000000 ) ) { + altRem = rem + sigB; + goto selectRem; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + do { + altRem = rem; + ++q; + rem -= sigB; + } while ( ! (rem & UINT64_C( 0x8000000000000000 )) ); + selectRem: + meanRem = rem + altRem; + if ( + (meanRem & UINT64_C( 0x8000000000000000 )) || (! meanRem && (q & 1)) + ) { + rem = altRem; + } + signRem = signA; + if ( rem & UINT64_C( 0x8000000000000000 ) ) { + signRem = ! signRem; + rem = -rem; + } + return softfloat_normRoundPackToF64( signRem, expB, rem ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF64UI( uiA, uiB ); + goto uiZ; + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF64UI; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_roundToInt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_roundToInt.c new file mode 100644 index 000000000..c5f08ae16 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_roundToInt.c @@ -0,0 +1,120 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float64_t f64_roundToInt( float64_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + int_fast16_t exp; + uint_fast64_t uiZ, lastBitMask, roundBitsMask; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp <= 0x3FE ) { + if ( !(uiA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) return a; + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + uiZ = uiA & packToF64UI( 1, 0, 0 ); + switch ( roundingMode ) { + case softfloat_round_near_even: + if ( !fracF64UI( uiA ) ) break; + case softfloat_round_near_maxMag: + if ( exp == 0x3FE ) uiZ |= packToF64UI( 0, 0x3FF, 0 ); + break; + case softfloat_round_min: + if ( uiZ ) uiZ = packToF64UI( 1, 0x3FF, 0 ); + break; + case softfloat_round_max: + if ( !uiZ ) uiZ = packToF64UI( 0, 0x3FF, 0 ); + break; +#ifdef SOFTFLOAT_ROUND_ODD + case softfloat_round_odd: + uiZ |= packToF64UI( 0, 0x3FF, 0 ); + break; +#endif + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x433 <= exp ) { + if ( (exp == 0x7FF) && fracF64UI( uiA ) ) { + uiZ = softfloat_propagateNaNF64UI( uiA, 0 ); + goto uiZ; + } + return a; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ = uiA; + lastBitMask = (uint_fast64_t) 1<<(0x433 - exp); + roundBitsMask = lastBitMask - 1; + if ( roundingMode == softfloat_round_near_maxMag ) { + uiZ += lastBitMask>>1; + } else if ( roundingMode == softfloat_round_near_even ) { + uiZ += lastBitMask>>1; + if ( !(uiZ & roundBitsMask) ) uiZ &= ~lastBitMask; + } else if ( + roundingMode + == (signF64UI( uiZ ) ? softfloat_round_min : softfloat_round_max) + ) { + uiZ += roundBitsMask; + } + uiZ &= ~roundBitsMask; + if ( uiZ != uiA ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) uiZ |= lastBitMask; +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_sqrt.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_sqrt.c new file mode 100644 index 000000000..f12acdb41 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_sqrt.c @@ -0,0 +1,133 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float64_t f64_sqrt( float64_t a ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool signA; + int_fast16_t expA; + uint_fast64_t sigA, uiZ; + struct exp16_sig64 normExpSig; + int_fast16_t expZ; + uint32_t sig32A, recipSqrt32, sig32Z; + uint_fast64_t rem; + uint32_t q; + uint_fast64_t sigZ, shiftedSigZ; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF64UI( uiA ); + expA = expF64UI( uiA ); + sigA = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FF ) { + if ( sigA ) { + uiZ = softfloat_propagateNaNF64UI( uiA, 0 ); + goto uiZ; + } + if ( ! signA ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( signA ) { + if ( ! (expA | sigA) ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) return a; + normExpSig = softfloat_normSubnormalF64Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + | (`sig32Z' is guaranteed to be a lower bound on the square root of + | `sig32A', which makes `sig32Z' also a lower bound on the square root of + | `sigA'.) + *------------------------------------------------------------------------*/ + expZ = ((expA - 0x3FF)>>1) + 0x3FE; + expA &= 1; + sigA |= UINT64_C( 0x0010000000000000 ); + sig32A = sigA>>21; + recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A ); + sig32Z = ((uint_fast64_t) sig32A * recipSqrt32)>>32; + if ( expA ) { + sigA <<= 8; + sig32Z >>= 1; + } else { + sigA <<= 9; + } + rem = sigA - (uint_fast64_t) sig32Z * sig32Z; + q = ((uint32_t) (rem>>2) * (uint_fast64_t) recipSqrt32)>>32; + sigZ = ((uint_fast64_t) sig32Z<<32 | 1<<5) + ((uint_fast64_t) q<<3); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (sigZ & 0x1FF) < 0x22 ) { + sigZ &= ~(uint_fast64_t) 0x3F; + shiftedSigZ = sigZ>>6; + rem = (sigA<<52) - shiftedSigZ * shiftedSigZ; + if ( rem & UINT64_C( 0x8000000000000000 ) ) { + --sigZ; + } else { + if ( rem ) sigZ |= 1; + } + } + return softfloat_roundPackToF64( 0, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF64UI; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_sub.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_sub.c new file mode 100644 index 000000000..74158bec1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_sub.c @@ -0,0 +1,74 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float64_t f64_sub( float64_t a, float64_t b ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool signA; + union ui64_f64 uB; + uint_fast64_t uiB; + bool signB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2) + float64_t (*magsFuncPtr)( uint_fast64_t, uint_fast64_t, bool ); +#endif + + uA.f = a; + uiA = uA.ui; + signA = signF64UI( uiA ); + uB.f = b; + uiB = uB.ui; + signB = signF64UI( uiB ); +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) + if ( signA == signB ) { + return softfloat_subMagsF64( uiA, uiB, signA ); + } else { + return softfloat_addMagsF64( uiA, uiB, signA ); + } +#else + magsFuncPtr = + (signA == signB) ? softfloat_subMagsF64 : softfloat_addMagsF64; + return (*magsFuncPtr)( uiA, uiB, signA ); +#endif + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_extF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_extF80.c new file mode 100644 index 000000000..553ebd0c5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_extF80.c @@ -0,0 +1,101 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extFloat80_t f64_to_extF80( float64_t a ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool sign; + int_fast16_t exp; + uint_fast64_t frac; + struct commonNaN commonNaN; + struct uint128 uiZ; + uint_fast16_t uiZ64; + uint_fast64_t uiZ0; + struct exp16_sig64 normExpSig; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF64UI( uiA ); + exp = expF64UI( uiA ); + frac = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FF ) { + if ( frac ) { + softfloat_f64UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToExtF80UI( &commonNaN ); + uiZ64 = uiZ.v64; + uiZ0 = uiZ.v0; + } else { + uiZ64 = packToExtF80UI64( sign, 0x7FFF ); + uiZ0 = UINT64_C( 0x8000000000000000 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ64 = packToExtF80UI64( sign, 0 ); + uiZ0 = 0; + goto uiZ; + } + normExpSig = softfloat_normSubnormalF64Sig( frac ); + exp = normExpSig.exp; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ64 = packToExtF80UI64( sign, exp + 0x3C00 ); + uiZ0 = (frac | UINT64_C( 0x0010000000000000 ))<<11; + uiZ: + uZ.s.signExp = uiZ64; + uZ.s.signif = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_extF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_extF80M.c new file mode 100644 index 000000000..d258bdc26 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_extF80M.c @@ -0,0 +1,111 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void f64_to_extF80M( float64_t a, extFloat80_t *zPtr ) +{ + + *zPtr = f64_to_extF80( a ); + +} + +#else + +void f64_to_extF80M( float64_t a, extFloat80_t *zPtr ) +{ + struct extFloat80M *zSPtr; + union ui64_f64 uA; + uint64_t uiA; + bool sign; + int_fast16_t exp; + uint64_t frac; + struct commonNaN commonNaN; + uint_fast16_t uiZ64; + uint64_t uiZ0; + struct exp16_sig64 normExpSig; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zSPtr = (struct extFloat80M *) zPtr; + uA.f = a; + uiA = uA.ui; + sign = signF64UI( uiA ); + exp = expF64UI( uiA ); + frac = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FF ) { + if ( frac ) { + softfloat_f64UIToCommonNaN( uiA, &commonNaN ); + softfloat_commonNaNToExtF80M( &commonNaN, zSPtr ); + return; + } + uiZ64 = packToExtF80UI64( sign, 0x7FFF ); + uiZ0 = UINT64_C( 0x8000000000000000 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ64 = packToExtF80UI64( sign, 0 ); + uiZ0 = 0; + goto uiZ; + } + normExpSig = softfloat_normSubnormalF64Sig( frac ); + exp = normExpSig.exp; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ64 = packToExtF80UI64( sign, exp + 0x3C00 ); + uiZ0 = UINT64_C( 0x8000000000000000 ) | frac<<11; + uiZ: + zSPtr->signExp = uiZ64; + zSPtr->signif = uiZ0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f128.c new file mode 100644 index 000000000..8f03f2ff0 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f128.c @@ -0,0 +1,98 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float128_t f64_to_f128( float64_t a ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool sign; + int_fast16_t exp; + uint_fast64_t frac; + struct commonNaN commonNaN; + struct uint128 uiZ; + struct exp16_sig64 normExpSig; + struct uint128 frac128; + union ui128_f128 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF64UI( uiA ); + exp = expF64UI( uiA ); + frac = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FF ) { + if ( frac ) { + softfloat_f64UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF128UI( &commonNaN ); + } else { + uiZ.v64 = packToF128UI64( sign, 0x7FFF, 0 ); + uiZ.v0 = 0; + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ.v64 = packToF128UI64( sign, 0, 0 ); + uiZ.v0 = 0; + goto uiZ; + } + normExpSig = softfloat_normSubnormalF64Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac128 = softfloat_shortShiftLeft128( 0, frac, 60 ); + uiZ.v64 = packToF128UI64( sign, exp + 0x3C00, frac128.v64 ); + uiZ.v0 = frac128.v0; + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f128M.c new file mode 100644 index 000000000..e4a862c7f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f128M.c @@ -0,0 +1,117 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void f64_to_f128M( float64_t a, float128_t *zPtr ) +{ + + *zPtr = f64_to_f128( a ); + +} + +#else + +void f64_to_f128M( float64_t a, float128_t *zPtr ) +{ + uint32_t *zWPtr; + union ui64_f64 uA; + uint64_t uiA; + bool sign; + int_fast16_t exp; + uint64_t frac; + struct commonNaN commonNaN; + uint32_t uiZ96; + struct exp16_sig64 normExpSig; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zWPtr = (uint32_t *) zPtr; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF64UI( uiA ); + exp = expF64UI( uiA ); + frac = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zWPtr[indexWord( 4, 0 )] = 0; + if ( exp == 0x7FF ) { + if ( frac ) { + softfloat_f64UIToCommonNaN( uiA, &commonNaN ); + softfloat_commonNaNToF128M( &commonNaN, zWPtr ); + return; + } + uiZ96 = packToF128UI96( sign, 0x7FFF, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ96 = packToF128UI96( sign, 0, 0 ); + goto uiZ; + } + normExpSig = softfloat_normSubnormalF64Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zWPtr[indexWord( 4, 1 )] = (uint32_t) frac<<28; + frac >>= 4; + zWPtr[indexWordHi( 4 )] = packToF128UI96( sign, exp + 0x3C00, frac>>32 ); + zWPtr[indexWord( 4, 2 )] = frac; + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ: + zWPtr[indexWord( 4, 3 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = 0; + zWPtr[indexWord( 4, 1 )] = 0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f16.c new file mode 100644 index 000000000..0cc6cc534 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f16.c @@ -0,0 +1,88 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t f64_to_f16( float64_t a ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool sign; + int_fast16_t exp; + uint_fast64_t frac; + struct commonNaN commonNaN; + uint_fast16_t uiZ, frac16; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF64UI( uiA ); + exp = expF64UI( uiA ); + frac = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FF ) { + if ( frac ) { + softfloat_f64UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF16UI( &commonNaN ); + } else { + uiZ = packToF16UI( sign, 0x1F, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac16 = softfloat_shortShiftRightJam64( frac, 38 ); + if ( ! (exp | frac16) ) { + uiZ = packToF16UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + return softfloat_roundPackToF16( sign, exp - 0x3F1, frac16 | 0x4000 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f32.c new file mode 100644 index 000000000..6074bb845 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_f32.c @@ -0,0 +1,88 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t f64_to_f32( float64_t a ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool sign; + int_fast16_t exp; + uint_fast64_t frac; + struct commonNaN commonNaN; + uint_fast32_t uiZ, frac32; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF64UI( uiA ); + exp = expF64UI( uiA ); + frac = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x7FF ) { + if ( frac ) { + softfloat_f64UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF32UI( &commonNaN ); + } else { + uiZ = packToF32UI( sign, 0xFF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac32 = softfloat_shortShiftRightJam64( frac, 22 ); + if ( ! (exp | frac32) ) { + uiZ = packToF32UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + return softfloat_roundPackToF32( sign, exp - 0x381, frac32 | 0x40000000 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i32.c new file mode 100644 index 000000000..2cf260304 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i32.c @@ -0,0 +1,82 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t f64_to_i32( float64_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool sign; + int_fast16_t exp; + uint_fast64_t sig; + int_fast16_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF64UI( uiA ); + exp = expF64UI( uiA ); + sig = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ +#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow) + if ( (exp == 0x7FF) && sig ) { +#if (i32_fromNaN == i32_fromPosOverflow) + sign = 0; +#elif (i32_fromNaN == i32_fromNegOverflow) + sign = 1; +#else + softfloat_raiseFlags( softfloat_flag_invalid ); + return i32_fromNaN; +#endif + } +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig |= UINT64_C( 0x0010000000000000 ); + shiftDist = 0x427 - exp; + if ( 0 < shiftDist ) sig = softfloat_shiftRightJam64( sig, shiftDist ); + return softfloat_roundToI32( sign, sig, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i32_r_minMag.c new file mode 100644 index 000000000..8cccb8efd --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i32_r_minMag.c @@ -0,0 +1,96 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t f64_to_i32_r_minMag( float64_t a, bool exact ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + int_fast16_t exp; + uint_fast64_t sig; + int_fast16_t shiftDist; + bool sign; + int_fast32_t absZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF64UI( uiA ); + sig = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x433 - exp; + if ( 53 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF64UI( uiA ); + if ( shiftDist < 22 ) { + if ( + sign && (exp == 0x41E) && (sig < UINT64_C( 0x0000000000200000 )) + ) { + if ( exact && sig ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return -0x7FFFFFFF - 1; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FF) && sig ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig |= UINT64_C( 0x0010000000000000 ); + absZ = sig>>shiftDist; + if ( exact && ((uint_fast64_t) (uint_fast32_t) absZ<<shiftDist != sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return sign ? -absZ : absZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i64.c new file mode 100644 index 000000000..0acf6c2e1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i64.c @@ -0,0 +1,103 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t f64_to_i64( float64_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool sign; + int_fast16_t exp; + uint_fast64_t sig; + int_fast16_t shiftDist; +#ifdef SOFTFLOAT_FAST_INT64 + struct uint64_extra sigExtra; +#else + uint32_t extSig[3]; +#endif + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF64UI( uiA ); + exp = expF64UI( uiA ); + sig = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig |= UINT64_C( 0x0010000000000000 ); + shiftDist = 0x433 - exp; +#ifdef SOFTFLOAT_FAST_INT64 + if ( shiftDist <= 0 ) { + if ( shiftDist < -11 ) goto invalid; + sigExtra.v = sig<<-shiftDist; + sigExtra.extra = 0; + } else { + sigExtra = softfloat_shiftRightJam64Extra( sig, 0, shiftDist ); + } + return + softfloat_roundToI64( + sign, sigExtra.v, sigExtra.extra, roundingMode, exact ); +#else + extSig[indexWord( 3, 0 )] = 0; + if ( shiftDist <= 0 ) { + if ( shiftDist < -11 ) goto invalid; + sig <<= -shiftDist; + extSig[indexWord( 3, 2 )] = sig>>32; + extSig[indexWord( 3, 1 )] = sig; + } else { + extSig[indexWord( 3, 2 )] = sig>>32; + extSig[indexWord( 3, 1 )] = sig; + softfloat_shiftRightJam96M( extSig, shiftDist, extSig ); + } + return softfloat_roundMToI64( sign, extSig, roundingMode, exact ); +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FF) && fracF64UI( uiA ) ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i64_r_minMag.c new file mode 100644 index 000000000..4fcc52c56 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_i64_r_minMag.c @@ -0,0 +1,100 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t f64_to_i64_r_minMag( float64_t a, bool exact ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool sign; + int_fast16_t exp; + uint_fast64_t sig; + int_fast16_t shiftDist; + int_fast64_t absZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF64UI( uiA ); + exp = expF64UI( uiA ); + sig = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x433 - exp; + if ( shiftDist <= 0 ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( shiftDist < -10 ) { + if ( uiA == packToF64UI( 1, 0x43E, 0 ) ) { + return -INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FF) && sig ? i64_fromNaN + : sign ? i64_fromNegOverflow : i64_fromPosOverflow; + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sig |= UINT64_C( 0x0010000000000000 ); + absZ = sig<<-shiftDist; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( 53 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sig |= UINT64_C( 0x0010000000000000 ); + absZ = sig>>shiftDist; + if ( exact && (absZ<<shiftDist != sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + } + return sign ? -absZ : absZ; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui32.c new file mode 100644 index 000000000..4326922f2 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui32.c @@ -0,0 +1,82 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t f64_to_ui32( float64_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool sign; + int_fast16_t exp; + uint_fast64_t sig; + int_fast16_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF64UI( uiA ); + exp = expF64UI( uiA ); + sig = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ +#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow) + if ( (exp == 0x7FF) && sig ) { +#if (ui32_fromNaN == ui32_fromPosOverflow) + sign = 0; +#elif (ui32_fromNaN == ui32_fromNegOverflow) + sign = 1; +#else + softfloat_raiseFlags( softfloat_flag_invalid ); + return ui32_fromNaN; +#endif + } +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig |= UINT64_C( 0x0010000000000000 ); + shiftDist = 0x427 - exp; + if ( 0 < shiftDist ) sig = softfloat_shiftRightJam64( sig, shiftDist ); + return softfloat_roundToUI32( sign, sig, roundingMode, exact ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui32_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui32_r_minMag.c new file mode 100644 index 000000000..01758dc54 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui32_r_minMag.c @@ -0,0 +1,88 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t f64_to_ui32_r_minMag( float64_t a, bool exact ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + int_fast16_t exp; + uint_fast64_t sig; + int_fast16_t shiftDist; + bool sign; + uint_fast32_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF64UI( uiA ); + sig = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x433 - exp; + if ( 53 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF64UI( uiA ); + if ( sign || (shiftDist < 21) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FF) && sig ? ui32_fromNaN + : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig |= UINT64_C( 0x0010000000000000 ); + z = sig>>shiftDist; + if ( exact && ((uint_fast64_t) z<<shiftDist != sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return z; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui64.c new file mode 100644 index 000000000..e7fb8f64d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui64.c @@ -0,0 +1,103 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t f64_to_ui64( float64_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + bool sign; + int_fast16_t exp; + uint_fast64_t sig; + int_fast16_t shiftDist; +#ifdef SOFTFLOAT_FAST_INT64 + struct uint64_extra sigExtra; +#else + uint32_t extSig[3]; +#endif + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF64UI( uiA ); + exp = expF64UI( uiA ); + sig = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp ) sig |= UINT64_C( 0x0010000000000000 ); + shiftDist = 0x433 - exp; +#ifdef SOFTFLOAT_FAST_INT64 + if ( shiftDist <= 0 ) { + if ( shiftDist < -11 ) goto invalid; + sigExtra.v = sig<<-shiftDist; + sigExtra.extra = 0; + } else { + sigExtra = softfloat_shiftRightJam64Extra( sig, 0, shiftDist ); + } + return + softfloat_roundToUI64( + sign, sigExtra.v, sigExtra.extra, roundingMode, exact ); +#else + extSig[indexWord( 3, 0 )] = 0; + if ( shiftDist <= 0 ) { + if ( shiftDist < -11 ) goto invalid; + sig <<= -shiftDist; + extSig[indexWord( 3, 2 )] = sig>>32; + extSig[indexWord( 3, 1 )] = sig; + } else { + extSig[indexWord( 3, 2 )] = sig>>32; + extSig[indexWord( 3, 1 )] = sig; + softfloat_shiftRightJam96M( extSig, shiftDist, extSig ); + } + return softfloat_roundMToUI64( sign, extSig, roundingMode, exact ); +#endif + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FF) && fracF64UI( uiA ) ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui64_r_minMag.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui64_r_minMag.c new file mode 100644 index 000000000..e1d81a018 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/f64_to_ui64_r_minMag.c @@ -0,0 +1,93 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t f64_to_ui64_r_minMag( float64_t a, bool exact ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + int_fast16_t exp; + uint_fast64_t sig; + int_fast16_t shiftDist; + bool sign; + uint_fast64_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + exp = expF64UI( uiA ); + sig = fracF64UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 0x433 - exp; + if ( 53 <= shiftDist ) { + if ( exact && (exp | sig) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sign = signF64UI( uiA ); + if ( sign ) goto invalid; + if ( shiftDist <= 0 ) { + if ( shiftDist < -11 ) goto invalid; + z = (sig | UINT64_C( 0x0010000000000000 ))<<-shiftDist; + } else { + sig |= UINT64_C( 0x0010000000000000 ); + z = sig>>shiftDist; + if ( exact && (uint64_t) (sig<<(-shiftDist & 63)) ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; + } + } + return z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return + (exp == 0x7FF) && sig ? ui64_fromNaN + : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_extF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_extF80.c new file mode 100644 index 000000000..fd91cf059 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_extF80.c @@ -0,0 +1,65 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +extFloat80_t i32_to_extF80( int32_t a ) +{ + uint_fast16_t uiZ64; + uint_fast32_t absA; + bool sign; + int_fast8_t shiftDist; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + uiZ64 = 0; + absA = 0; + if ( a ) { + sign = (a < 0); + absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a; + shiftDist = softfloat_countLeadingZeros32( absA ); + uiZ64 = packToExtF80UI64( sign, 0x401E - shiftDist ); + absA <<= shiftDist; + } + uZ.s.signExp = uiZ64; + uZ.s.signif = (uint_fast64_t) absA<<32; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_extF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_extF80M.c new file mode 100644 index 000000000..d12e3a8ef --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_extF80M.c @@ -0,0 +1,78 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void i32_to_extF80M( int32_t a, extFloat80_t *zPtr ) +{ + + *zPtr = i32_to_extF80( a ); + +} + +#else + +void i32_to_extF80M( int32_t a, extFloat80_t *zPtr ) +{ + struct extFloat80M *zSPtr; + uint_fast16_t uiZ64; + uint64_t sigZ; + bool sign; + uint32_t absA; + int_fast8_t shiftDist; + + zSPtr = (struct extFloat80M *) zPtr; + uiZ64 = 0; + sigZ = 0; + if ( a ) { + sign = (a < 0); + absA = sign ? -(uint32_t) a : (uint32_t) a; + shiftDist = softfloat_countLeadingZeros32( absA ); + uiZ64 = packToExtF80UI64( sign, 0x401E - shiftDist ); + sigZ = (uint64_t) (absA<<shiftDist)<<32; + } + zSPtr->signExp = uiZ64; + zSPtr->signif = sigZ; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f128.c new file mode 100644 index 000000000..75575bddc --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f128.c @@ -0,0 +1,64 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float128_t i32_to_f128( int32_t a ) +{ + uint_fast64_t uiZ64; + bool sign; + uint_fast32_t absA; + int_fast8_t shiftDist; + union ui128_f128 uZ; + + uiZ64 = 0; + if ( a ) { + sign = (a < 0); + absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a; + shiftDist = softfloat_countLeadingZeros32( absA ) + 17; + uiZ64 = + packToF128UI64( + sign, 0x402E - shiftDist, (uint_fast64_t) absA<<shiftDist ); + } + uZ.ui.v64 = uiZ64; + uZ.ui.v0 = 0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f128M.c new file mode 100644 index 000000000..8b3ce4bc2 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f128M.c @@ -0,0 +1,81 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void i32_to_f128M( int32_t a, float128_t *zPtr ) +{ + + *zPtr = i32_to_f128( a ); + +} + +#else + +void i32_to_f128M( int32_t a, float128_t *zPtr ) +{ + uint32_t *zWPtr; + uint32_t uiZ96, uiZ64; + bool sign; + uint32_t absA; + int_fast8_t shiftDist; + uint64_t normAbsA; + + zWPtr = (uint32_t *) zPtr; + uiZ96 = 0; + uiZ64 = 0; + if ( a ) { + sign = (a < 0); + absA = sign ? -(uint32_t) a : (uint32_t) a; + shiftDist = softfloat_countLeadingZeros32( absA ) + 17; + normAbsA = (uint64_t) absA<<shiftDist; + uiZ96 = packToF128UI96( sign, 0x402E - shiftDist, normAbsA>>32 ); + uiZ64 = normAbsA; + } + zWPtr[indexWord( 4, 3 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = uiZ64; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f16.c new file mode 100644 index 000000000..14ac58860 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f16.c @@ -0,0 +1,71 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float16_t i32_to_f16( int32_t a ) +{ + bool sign; + uint_fast32_t absA; + int_fast8_t shiftDist; + union ui16_f16 u; + uint_fast16_t sig; + + sign = (a < 0); + absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a; + shiftDist = softfloat_countLeadingZeros32( absA ) - 21; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF16UI( + sign, 0x18 - shiftDist, (uint_fast16_t) absA<<shiftDist ) + : 0; + return u.f; + } else { + shiftDist += 4; + sig = + (shiftDist < 0) + ? absA>>(-shiftDist) + | ((uint32_t) (absA<<(shiftDist & 31)) != 0) + : (uint_fast16_t) absA<<shiftDist; + return softfloat_roundPackToF16( sign, 0x1C - shiftDist, sig ); + } + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f32.c new file mode 100644 index 000000000..4057655df --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f32.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float32_t i32_to_f32( int32_t a ) +{ + bool sign; + union ui32_f32 uZ; + uint_fast32_t absA; + + sign = (a < 0); + if ( ! (a & 0x7FFFFFFF) ) { + uZ.ui = sign ? packToF32UI( 1, 0x9E, 0 ) : 0; + return uZ.f; + } + absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a; + return softfloat_normRoundPackToF32( sign, 0x9C, absA ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f64.c new file mode 100644 index 000000000..64662bb22 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i32_to_f64.c @@ -0,0 +1,65 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float64_t i32_to_f64( int32_t a ) +{ + uint_fast64_t uiZ; + bool sign; + uint_fast32_t absA; + int_fast8_t shiftDist; + union ui64_f64 uZ; + + if ( ! a ) { + uiZ = 0; + } else { + sign = (a < 0); + absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a; + shiftDist = softfloat_countLeadingZeros32( absA ) + 21; + uiZ = + packToF64UI( + sign, 0x432 - shiftDist, (uint_fast64_t) absA<<shiftDist ); + } + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_extF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_extF80.c new file mode 100644 index 000000000..7253cf78c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_extF80.c @@ -0,0 +1,65 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +extFloat80_t i64_to_extF80( int64_t a ) +{ + uint_fast16_t uiZ64; + uint_fast64_t absA; + bool sign; + int_fast8_t shiftDist; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + uiZ64 = 0; + absA = 0; + if ( a ) { + sign = (a < 0); + absA = sign ? -(uint_fast64_t) a : (uint_fast64_t) a; + shiftDist = softfloat_countLeadingZeros64( absA ); + uiZ64 = packToExtF80UI64( sign, 0x403E - shiftDist ); + absA <<= shiftDist; + } + uZ.s.signExp = uiZ64; + uZ.s.signif = absA; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_extF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_extF80M.c new file mode 100644 index 000000000..0bf67ff46 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_extF80M.c @@ -0,0 +1,78 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void i64_to_extF80M( int64_t a, extFloat80_t *zPtr ) +{ + + *zPtr = i64_to_extF80( a ); + +} + +#else + +void i64_to_extF80M( int64_t a, extFloat80_t *zPtr ) +{ + struct extFloat80M *zSPtr; + uint_fast16_t uiZ64; + uint64_t sigZ; + bool sign; + uint64_t absA; + int_fast8_t shiftDist; + + zSPtr = (struct extFloat80M *) zPtr; + uiZ64 = 0; + sigZ = 0; + if ( a ) { + sign = (a < 0); + absA = sign ? -(uint64_t) a : (uint64_t) a; + shiftDist = softfloat_countLeadingZeros64( absA ); + uiZ64 = packToExtF80UI64( sign, 0x403E - shiftDist ); + sigZ = absA<<shiftDist; + } + zSPtr->signExp = uiZ64; + zSPtr->signif = sigZ; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f128.c new file mode 100644 index 000000000..a2b6dea88 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f128.c @@ -0,0 +1,72 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float128_t i64_to_f128( int64_t a ) +{ + uint_fast64_t uiZ64, uiZ0; + bool sign; + uint_fast64_t absA; + int_fast8_t shiftDist; + struct uint128 zSig; + union ui128_f128 uZ; + + if ( ! a ) { + uiZ64 = 0; + uiZ0 = 0; + } else { + sign = (a < 0); + absA = sign ? -(uint_fast64_t) a : (uint_fast64_t) a; + shiftDist = softfloat_countLeadingZeros64( absA ) + 49; + if ( 64 <= shiftDist ) { + zSig.v64 = absA<<(shiftDist - 64); + zSig.v0 = 0; + } else { + zSig = softfloat_shortShiftLeft128( 0, absA, shiftDist ); + } + uiZ64 = packToF128UI64( sign, 0x406E - shiftDist, zSig.v64 ); + uiZ0 = zSig.v0; + } + uZ.ui.v64 = uiZ64; + uZ.ui.v0 = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f128M.c new file mode 100644 index 000000000..7b44ec7bd --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f128M.c @@ -0,0 +1,92 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void i64_to_f128M( int64_t a, float128_t *zPtr ) +{ + + *zPtr = i64_to_f128( a ); + +} + +#else + +void i64_to_f128M( int64_t a, float128_t *zPtr ) +{ + uint32_t *zWPtr; + uint32_t uiZ96, uiZ64; + bool sign; + uint64_t absA; + uint_fast8_t shiftDist; + uint32_t *ptr; + + zWPtr = (uint32_t *) zPtr; + uiZ96 = 0; + uiZ64 = 0; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + if ( a ) { + sign = (a < 0); + absA = sign ? -(uint64_t) a : (uint64_t) a; + shiftDist = softfloat_countLeadingZeros64( absA ) + 17; + if ( shiftDist < 32 ) { + ptr = zWPtr + indexMultiwordHi( 4, 3 ); + ptr[indexWord( 3, 2 )] = 0; + ptr[indexWord( 3, 1 )] = absA>>32; + ptr[indexWord( 3, 0 )] = absA; + softfloat_shortShiftLeft96M( ptr, shiftDist, ptr ); + ptr[indexWordHi( 3 )] = + packToF128UI96( + sign, 0x404E - shiftDist, ptr[indexWordHi( 3 )] ); + return; + } + absA <<= shiftDist - 32; + uiZ96 = packToF128UI96( sign, 0x404E - shiftDist, absA>>32 ); + uiZ64 = absA; + } + zWPtr[indexWord( 4, 3 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = uiZ64; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f16.c new file mode 100644 index 000000000..f16eccf04 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f16.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float16_t i64_to_f16( int64_t a ) +{ + bool sign; + uint_fast64_t absA; + int_fast8_t shiftDist; + union ui16_f16 u; + uint_fast16_t sig; + + sign = (a < 0); + absA = sign ? -(uint_fast64_t) a : (uint_fast64_t) a; + shiftDist = softfloat_countLeadingZeros64( absA ) - 53; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF16UI( + sign, 0x18 - shiftDist, (uint_fast16_t) absA<<shiftDist ) + : 0; + return u.f; + } else { + shiftDist += 4; + sig = + (shiftDist < 0) + ? softfloat_shortShiftRightJam64( absA, -shiftDist ) + : (uint_fast16_t) absA<<shiftDist; + return softfloat_roundPackToF16( sign, 0x1C - shiftDist, sig ); + } + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f32.c new file mode 100644 index 000000000..391e1ae82 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f32.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float32_t i64_to_f32( int64_t a ) +{ + bool sign; + uint_fast64_t absA; + int_fast8_t shiftDist; + union ui32_f32 u; + uint_fast32_t sig; + + sign = (a < 0); + absA = sign ? -(uint_fast64_t) a : (uint_fast64_t) a; + shiftDist = softfloat_countLeadingZeros64( absA ) - 40; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF32UI( + sign, 0x95 - shiftDist, (uint_fast32_t) absA<<shiftDist ) + : 0; + return u.f; + } else { + shiftDist += 7; + sig = + (shiftDist < 0) + ? softfloat_shortShiftRightJam64( absA, -shiftDist ) + : (uint_fast32_t) absA<<shiftDist; + return softfloat_roundPackToF32( sign, 0x9C - shiftDist, sig ); + } + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f64.c new file mode 100644 index 000000000..6d26ddc05 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/i64_to_f64.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float64_t i64_to_f64( int64_t a ) +{ + bool sign; + union ui64_f64 uZ; + uint_fast64_t absA; + + sign = (a < 0); + if ( ! (a & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) { + uZ.ui = sign ? packToF64UI( 1, 0x43E, 0 ) : 0; + return uZ.f; + } + absA = sign ? -(uint_fast64_t) a : (uint_fast64_t) a; + return softfloat_normRoundPackToF64( sign, 0x43C, absA ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/internals.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/internals.h new file mode 100644 index 000000000..f8eac0530 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/internals.h @@ -0,0 +1,278 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef internals_h +#define internals_h 1 + +#include <stdbool.h> +#include <stdint.h> +#include "primitives.h" +#include "softfloat_types.h" + +union ui16_f16 { uint16_t ui; float16_t f; }; +union ui32_f32 { uint32_t ui; float32_t f; }; +union ui64_f64 { uint64_t ui; float64_t f; }; + +#ifdef SOFTFLOAT_FAST_INT64 +union extF80M_extF80 { struct extFloat80M fM; extFloat80_t f; }; +union ui128_f128 { struct uint128 ui; float128_t f; }; +#endif + +enum { + softfloat_mulAdd_subC = 1, + softfloat_mulAdd_subProd = 2 +}; + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +uint_fast32_t softfloat_roundToUI32( bool, uint_fast64_t, uint_fast8_t, bool ); + +#ifdef SOFTFLOAT_FAST_INT64 +uint_fast64_t + softfloat_roundToUI64( + bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool ); +#else +uint_fast64_t softfloat_roundMToUI64( bool, uint32_t *, uint_fast8_t, bool ); +#endif + +int_fast32_t softfloat_roundToI32( bool, uint_fast64_t, uint_fast8_t, bool ); + +#ifdef SOFTFLOAT_FAST_INT64 +int_fast64_t + softfloat_roundToI64( + bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool ); +#else +int_fast64_t softfloat_roundMToI64( bool, uint32_t *, uint_fast8_t, bool ); +#endif + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define signF16UI( a ) ((bool) ((uint16_t) (a)>>15)) +#define expF16UI( a ) ((int_fast8_t) ((a)>>10) & 0x1F) +#define fracF16UI( a ) ((a) & 0x03FF) +#define packToF16UI( sign, exp, sig ) (((uint16_t) (sign)<<15) + ((uint16_t) (exp)<<10) + (sig)) + +#define isNaNF16UI( a ) (((~(a) & 0x7C00) == 0) && ((a) & 0x03FF)) + +struct exp8_sig16 { int_fast8_t exp; uint_fast16_t sig; }; +struct exp8_sig16 softfloat_normSubnormalF16Sig( uint_fast16_t ); + +float16_t softfloat_roundPackToF16( bool, int_fast16_t, uint_fast16_t ); +float16_t softfloat_normRoundPackToF16( bool, int_fast16_t, uint_fast16_t ); + +float16_t softfloat_addMagsF16( uint_fast16_t, uint_fast16_t ); +float16_t softfloat_subMagsF16( uint_fast16_t, uint_fast16_t ); +float16_t + softfloat_mulAddF16( + uint_fast16_t, uint_fast16_t, uint_fast16_t, uint_fast8_t ); + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define signF32UI( a ) ((bool) ((uint32_t) (a)>>31)) +#define expF32UI( a ) ((int_fast16_t) ((a)>>23) & 0xFF) +#define fracF32UI( a ) ((a) & 0x007FFFFF) +#define packToF32UI( sign, exp, sig ) (((uint32_t) (sign)<<31) + ((uint32_t) (exp)<<23) + (sig)) + +#define isNaNF32UI( a ) (((~(a) & 0x7F800000) == 0) && ((a) & 0x007FFFFF)) + +struct exp16_sig32 { int_fast16_t exp; uint_fast32_t sig; }; +struct exp16_sig32 softfloat_normSubnormalF32Sig( uint_fast32_t ); + +float32_t softfloat_roundPackToF32( bool, int_fast16_t, uint_fast32_t ); +float32_t softfloat_normRoundPackToF32( bool, int_fast16_t, uint_fast32_t ); + +float32_t softfloat_addMagsF32( uint_fast32_t, uint_fast32_t ); +float32_t softfloat_subMagsF32( uint_fast32_t, uint_fast32_t ); +float32_t + softfloat_mulAddF32( + uint_fast32_t, uint_fast32_t, uint_fast32_t, uint_fast8_t ); + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define signF64UI( a ) ((bool) ((uint64_t) (a)>>63)) +#define expF64UI( a ) ((int_fast16_t) ((a)>>52) & 0x7FF) +#define fracF64UI( a ) ((a) & UINT64_C( 0x000FFFFFFFFFFFFF )) +#define packToF64UI( sign, exp, sig ) ((uint64_t) (((uint_fast64_t) (sign)<<63) + ((uint_fast64_t) (exp)<<52) + (sig))) + +#define isNaNF64UI( a ) (((~(a) & UINT64_C( 0x7FF0000000000000 )) == 0) && ((a) & UINT64_C( 0x000FFFFFFFFFFFFF ))) + +struct exp16_sig64 { int_fast16_t exp; uint_fast64_t sig; }; +struct exp16_sig64 softfloat_normSubnormalF64Sig( uint_fast64_t ); + +float64_t softfloat_roundPackToF64( bool, int_fast16_t, uint_fast64_t ); +float64_t softfloat_normRoundPackToF64( bool, int_fast16_t, uint_fast64_t ); + +float64_t softfloat_addMagsF64( uint_fast64_t, uint_fast64_t, bool ); +float64_t softfloat_subMagsF64( uint_fast64_t, uint_fast64_t, bool ); +float64_t + softfloat_mulAddF64( + uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast8_t ); + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define signExtF80UI64( a64 ) ((bool) ((uint16_t) (a64)>>15)) +#define expExtF80UI64( a64 ) ((a64) & 0x7FFF) +#define packToExtF80UI64( sign, exp ) ((uint_fast16_t) (sign)<<15 | (exp)) + +#define isNaNExtF80UI( a64, a0 ) ((((a64) & 0x7FFF) == 0x7FFF) && ((a0) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))) + +#ifdef SOFTFLOAT_FAST_INT64 + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ + +struct exp32_sig64 { int_fast32_t exp; uint64_t sig; }; +struct exp32_sig64 softfloat_normSubnormalExtF80Sig( uint_fast64_t ); + +extFloat80_t + softfloat_roundPackToExtF80( + bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t ); +extFloat80_t + softfloat_normRoundPackToExtF80( + bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t ); + +extFloat80_t + softfloat_addMagsExtF80( + uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool ); +extFloat80_t + softfloat_subMagsExtF80( + uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool ); + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define signF128UI64( a64 ) ((bool) ((uint64_t) (a64)>>63)) +#define expF128UI64( a64 ) ((int_fast32_t) ((a64)>>48) & 0x7FFF) +#define fracF128UI64( a64 ) ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF )) +#define packToF128UI64( sign, exp, sig64 ) (((uint_fast64_t) (sign)<<63) + ((uint_fast64_t) (exp)<<48) + (sig64)) + +#define isNaNF128UI( a64, a0 ) (((~(a64) & UINT64_C( 0x7FFF000000000000 )) == 0) && (a0 || ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF )))) + +struct exp32_sig128 { int_fast32_t exp; struct uint128 sig; }; +struct exp32_sig128 + softfloat_normSubnormalF128Sig( uint_fast64_t, uint_fast64_t ); + +float128_t + softfloat_roundPackToF128( + bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast64_t ); +float128_t + softfloat_normRoundPackToF128( + bool, int_fast32_t, uint_fast64_t, uint_fast64_t ); + +float128_t + softfloat_addMagsF128( + uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool ); +float128_t + softfloat_subMagsF128( + uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool ); +float128_t + softfloat_mulAddF128( + uint_fast64_t, + uint_fast64_t, + uint_fast64_t, + uint_fast64_t, + uint_fast64_t, + uint_fast64_t, + uint_fast8_t + ); + +#else + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ + +bool + softfloat_tryPropagateNaNExtF80M( + const struct extFloat80M *, + const struct extFloat80M *, + struct extFloat80M * + ); +void softfloat_invalidExtF80M( struct extFloat80M * ); + +int softfloat_normExtF80SigM( uint64_t * ); + +void + softfloat_roundPackMToExtF80M( + bool, int32_t, uint32_t *, uint_fast8_t, struct extFloat80M * ); +void + softfloat_normRoundPackMToExtF80M( + bool, int32_t, uint32_t *, uint_fast8_t, struct extFloat80M * ); + +void + softfloat_addExtF80M( + const struct extFloat80M *, + const struct extFloat80M *, + struct extFloat80M *, + bool + ); + +int + softfloat_compareNonnormExtF80M( + const struct extFloat80M *, const struct extFloat80M * ); + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define signF128UI96( a96 ) ((bool) ((uint32_t) (a96)>>31)) +#define expF128UI96( a96 ) ((int32_t) ((a96)>>16) & 0x7FFF) +#define fracF128UI96( a96 ) ((a96) & 0x0000FFFF) +#define packToF128UI96( sign, exp, sig96 ) (((uint32_t) (sign)<<31) + ((uint32_t) (exp)<<16) + (sig96)) + +bool softfloat_isNaNF128M( const uint32_t * ); + +bool + softfloat_tryPropagateNaNF128M( + const uint32_t *, const uint32_t *, uint32_t * ); +void softfloat_invalidF128M( uint32_t * ); + +int softfloat_shiftNormSigF128M( const uint32_t *, uint_fast8_t, uint32_t * ); + +void softfloat_roundPackMToF128M( bool, int32_t, uint32_t *, uint32_t * ); +void softfloat_normRoundPackMToF128M( bool, int32_t, uint32_t *, uint32_t * ); + +void + softfloat_addF128M( const uint32_t *, const uint32_t *, uint32_t *, bool ); +void + softfloat_mulAddF128M( + const uint32_t *, + const uint32_t *, + const uint32_t *, + uint32_t *, + uint_fast8_t + ); + +#endif + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/opts-GCC.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/opts-GCC.h new file mode 100644 index 000000000..192cb58ca --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/opts-GCC.h @@ -0,0 +1,114 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2017 The Regents of the University of California. All rights +reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef opts_GCC_h +#define opts_GCC_h 1 + +#ifdef INLINE + +#include <stdint.h> +#include "primitiveTypes.h" + +#ifdef SOFTFLOAT_BUILTIN_CLZ + +INLINE uint_fast8_t softfloat_countLeadingZeros16( uint16_t a ) + { return a ? __builtin_clz( a ) - 16 : 16; } +#define softfloat_countLeadingZeros16 softfloat_countLeadingZeros16 + +INLINE uint_fast8_t softfloat_countLeadingZeros32( uint32_t a ) + { return a ? __builtin_clz( a ) : 32; } +#define softfloat_countLeadingZeros32 softfloat_countLeadingZeros32 + +INLINE uint_fast8_t softfloat_countLeadingZeros64( uint64_t a ) + { return a ? __builtin_clzll( a ) : 64; } +#define softfloat_countLeadingZeros64 softfloat_countLeadingZeros64 + +#endif + +#ifdef SOFTFLOAT_INTRINSIC_INT128 + +INLINE struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b ) +{ + union { unsigned __int128 ui; struct uint128 s; } uZ; + uZ.ui = (unsigned __int128) a * ((uint_fast64_t) b<<32); + return uZ.s; +} +#define softfloat_mul64ByShifted32To128 softfloat_mul64ByShifted32To128 + +INLINE struct uint128 softfloat_mul64To128( uint64_t a, uint64_t b ) +{ + union { unsigned __int128 ui; struct uint128 s; } uZ; + uZ.ui = (unsigned __int128) a * b; + return uZ.s; +} +#define softfloat_mul64To128 softfloat_mul64To128 + +INLINE +struct uint128 softfloat_mul128By32( uint64_t a64, uint64_t a0, uint32_t b ) +{ + union { unsigned __int128 ui; struct uint128 s; } uZ; + uZ.ui = ((unsigned __int128) a64<<64 | a0) * b; + return uZ.s; +} +#define softfloat_mul128By32 softfloat_mul128By32 + +INLINE +void + softfloat_mul128To256M( + uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0, uint64_t *zPtr ) +{ + unsigned __int128 z0, mid1, mid, z128; + z0 = (unsigned __int128) a0 * b0; + mid1 = (unsigned __int128) a64 * b0; + mid = mid1 + (unsigned __int128) a0 * b64; + z128 = (unsigned __int128) a64 * b64; + z128 += (unsigned __int128) (mid < mid1)<<64 | mid>>64; + mid <<= 64; + z0 += mid; + z128 += (z0 < mid); + zPtr[indexWord( 4, 0 )] = z0; + zPtr[indexWord( 4, 1 )] = z0>>64; + zPtr[indexWord( 4, 2 )] = z128; + zPtr[indexWord( 4, 3 )] = z128>>64; +} +#define softfloat_mul128To256M softfloat_mul128To256M + +#endif + +#endif + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/primitiveTypes.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/primitiveTypes.h new file mode 100644 index 000000000..e30540068 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/primitiveTypes.h @@ -0,0 +1,85 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef primitiveTypes_h +#define primitiveTypes_h 1 + +#include <stdint.h> + +#ifdef SOFTFLOAT_FAST_INT64 + +#ifdef LITTLEENDIAN +struct uint128 { uint64_t v0, v64; }; +struct uint64_extra { uint64_t extra, v; }; +struct uint128_extra { uint64_t extra; struct uint128 v; }; +#else +struct uint128 { uint64_t v64, v0; }; +struct uint64_extra { uint64_t v, extra; }; +struct uint128_extra { struct uint128 v; uint64_t extra; }; +#endif + +#endif + +/*---------------------------------------------------------------------------- +| These macros are used to isolate the differences in word order between big- +| endian and little-endian platforms. +*----------------------------------------------------------------------------*/ +#ifdef LITTLEENDIAN +#define wordIncr 1 +#define indexWord( total, n ) (n) +#define indexWordHi( total ) ((total) - 1) +#define indexWordLo( total ) 0 +#define indexMultiword( total, m, n ) (n) +#define indexMultiwordHi( total, n ) ((total) - (n)) +#define indexMultiwordLo( total, n ) 0 +#define indexMultiwordHiBut( total, n ) (n) +#define indexMultiwordLoBut( total, n ) 0 +#define INIT_UINTM4( v3, v2, v1, v0 ) { v0, v1, v2, v3 } +#else +#define wordIncr -1 +#define indexWord( total, n ) ((total) - 1 - (n)) +#define indexWordHi( total ) 0 +#define indexWordLo( total ) ((total) - 1) +#define indexMultiword( total, m, n ) ((total) - 1 - (m)) +#define indexMultiwordHi( total, n ) 0 +#define indexMultiwordLo( total, n ) ((total) - (n)) +#define indexMultiwordHiBut( total, n ) 0 +#define indexMultiwordLoBut( total, n ) (n) +#define INIT_UINTM4( v3, v2, v1, v0 ) { v3, v2, v1, v0 } +#endif + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/primitives.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/primitives.h new file mode 100644 index 000000000..10847817a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/primitives.h @@ -0,0 +1,1160 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef primitives_h +#define primitives_h 1 + +#include <stdbool.h> +#include <stdint.h> +#include "primitiveTypes.h" + +#ifndef softfloat_shortShiftRightJam64 +/*---------------------------------------------------------------------------- +| Shifts 'a' right by the number of bits given in 'dist', which must be in +| the range 1 to 63. If any nonzero bits are shifted off, they are "jammed" +| into the least-significant bit of the shifted value by setting the least- +| significant bit to 1. This shifted-and-jammed value is returned. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE +uint64_t softfloat_shortShiftRightJam64( uint64_t a, uint_fast8_t dist ) + { return a>>dist | ((a & (((uint_fast64_t) 1<<dist) - 1)) != 0); } +#else +uint64_t softfloat_shortShiftRightJam64( uint64_t a, uint_fast8_t dist ); +#endif +#endif + +#ifndef softfloat_shiftRightJam32 +/*---------------------------------------------------------------------------- +| Shifts 'a' right by the number of bits given in 'dist', which must not +| be zero. If any nonzero bits are shifted off, they are "jammed" into the +| least-significant bit of the shifted value by setting the least-significant +| bit to 1. This shifted-and-jammed value is returned. +| The value of 'dist' can be arbitrarily large. In particular, if 'dist' is +| greater than 32, the result will be either 0 or 1, depending on whether 'a' +| is zero or nonzero. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE uint32_t softfloat_shiftRightJam32( uint32_t a, uint_fast16_t dist ) +{ + return + (dist < 31) ? a>>dist | ((uint32_t) (a<<(-dist & 31)) != 0) : (a != 0); +} +#else +uint32_t softfloat_shiftRightJam32( uint32_t a, uint_fast16_t dist ); +#endif +#endif + +#ifndef softfloat_shiftRightJam64 +/*---------------------------------------------------------------------------- +| Shifts 'a' right by the number of bits given in 'dist', which must not +| be zero. If any nonzero bits are shifted off, they are "jammed" into the +| least-significant bit of the shifted value by setting the least-significant +| bit to 1. This shifted-and-jammed value is returned. +| The value of 'dist' can be arbitrarily large. In particular, if 'dist' is +| greater than 64, the result will be either 0 or 1, depending on whether 'a' +| is zero or nonzero. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL) +INLINE uint64_t softfloat_shiftRightJam64( uint64_t a, uint_fast32_t dist ) +{ + return + (dist < 63) ? a>>dist | ((uint64_t) (a<<(-dist & 63)) != 0) : (a != 0); +} +#else +uint64_t softfloat_shiftRightJam64( uint64_t a, uint_fast32_t dist ); +#endif +#endif + +/*---------------------------------------------------------------------------- +| A constant table that translates an 8-bit unsigned integer (the array index) +| into the number of leading 0 bits before the most-significant 1 of that +| integer. For integer zero (index 0), the corresponding table element is 8. +*----------------------------------------------------------------------------*/ +extern const uint_least8_t softfloat_countLeadingZeros8[256]; + +#ifndef softfloat_countLeadingZeros16 +/*---------------------------------------------------------------------------- +| Returns the number of leading 0 bits before the most-significant 1 bit of +| 'a'. If 'a' is zero, 16 is returned. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE uint_fast8_t softfloat_countLeadingZeros16( uint16_t a ) +{ + uint_fast8_t count = 8; + if ( 0x100 <= a ) { + count = 0; + a >>= 8; + } + count += softfloat_countLeadingZeros8[a]; + return count; +} +#else +uint_fast8_t softfloat_countLeadingZeros16( uint16_t a ); +#endif +#endif + +#ifndef softfloat_countLeadingZeros32 +/*---------------------------------------------------------------------------- +| Returns the number of leading 0 bits before the most-significant 1 bit of +| 'a'. If 'a' is zero, 32 is returned. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL) +INLINE uint_fast8_t softfloat_countLeadingZeros32( uint32_t a ) +{ + uint_fast8_t count = 0; + if ( a < 0x10000 ) { + count = 16; + a <<= 16; + } + if ( a < 0x1000000 ) { + count += 8; + a <<= 8; + } + count += softfloat_countLeadingZeros8[a>>24]; + return count; +} +#else +uint_fast8_t softfloat_countLeadingZeros32( uint32_t a ); +#endif +#endif + +#ifndef softfloat_countLeadingZeros64 +/*---------------------------------------------------------------------------- +| Returns the number of leading 0 bits before the most-significant 1 bit of +| 'a'. If 'a' is zero, 64 is returned. +*----------------------------------------------------------------------------*/ +uint_fast8_t softfloat_countLeadingZeros64( uint64_t a ); +#endif + +extern const uint16_t softfloat_approxRecip_1k0s[16]; +extern const uint16_t softfloat_approxRecip_1k1s[16]; + +#ifndef softfloat_approxRecip32_1 +/*---------------------------------------------------------------------------- +| Returns an approximation to the reciprocal of the number represented by 'a', +| where 'a' is interpreted as an unsigned fixed-point number with one integer +| bit and 31 fraction bits. The 'a' input must be "normalized", meaning that +| its most-significant bit (bit 31) must be 1. Thus, if A is the value of +| the fixed-point interpretation of 'a', then 1 <= A < 2. The returned value +| is interpreted as a pure unsigned fraction, having no integer bits and 32 +| fraction bits. The approximation returned is never greater than the true +| reciprocal 1/A, and it differs from the true reciprocal by at most 2.006 ulp +| (units in the last place). +*----------------------------------------------------------------------------*/ +#ifdef SOFTFLOAT_FAST_DIV64TO32 +#define softfloat_approxRecip32_1( a ) ((uint32_t) (UINT64_C( 0x7FFFFFFFFFFFFFFF ) / (uint32_t) (a))) +#else +uint32_t softfloat_approxRecip32_1( uint32_t a ); +#endif +#endif + +extern const uint16_t softfloat_approxRecipSqrt_1k0s[16]; +extern const uint16_t softfloat_approxRecipSqrt_1k1s[16]; + +#ifndef softfloat_approxRecipSqrt32_1 +/*---------------------------------------------------------------------------- +| Returns an approximation to the reciprocal of the square root of the number +| represented by 'a', where 'a' is interpreted as an unsigned fixed-point +| number either with one integer bit and 31 fraction bits or with two integer +| bits and 30 fraction bits. The format of 'a' is determined by 'oddExpA', +| which must be either 0 or 1. If 'oddExpA' is 1, 'a' is interpreted as +| having one integer bit, and if 'oddExpA' is 0, 'a' is interpreted as having +| two integer bits. The 'a' input must be "normalized", meaning that its +| most-significant bit (bit 31) must be 1. Thus, if A is the value of the +| fixed-point interpretation of 'a', it follows that 1 <= A < 2 when 'oddExpA' +| is 1, and 2 <= A < 4 when 'oddExpA' is 0. +| The returned value is interpreted as a pure unsigned fraction, having +| no integer bits and 32 fraction bits. The approximation returned is never +| greater than the true reciprocal 1/sqrt(A), and it differs from the true +| reciprocal by at most 2.06 ulp (units in the last place). The approximation +| returned is also always within the range 0.5 to 1; thus, the most- +| significant bit of the result is always set. +*----------------------------------------------------------------------------*/ +uint32_t softfloat_approxRecipSqrt32_1( unsigned int oddExpA, uint32_t a ); +#endif + +#ifdef SOFTFLOAT_FAST_INT64 + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is +| defined. +*----------------------------------------------------------------------------*/ + +#ifndef softfloat_eq128 +/*---------------------------------------------------------------------------- +| Returns true if the 128-bit unsigned integer formed by concatenating 'a64' +| and 'a0' is equal to the 128-bit unsigned integer formed by concatenating +| 'b64' and 'b0'. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL) +INLINE +bool softfloat_eq128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) + { return (a64 == b64) && (a0 == b0); } +#else +bool softfloat_eq128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ); +#endif +#endif + +#ifndef softfloat_le128 +/*---------------------------------------------------------------------------- +| Returns true if the 128-bit unsigned integer formed by concatenating 'a64' +| and 'a0' is less than or equal to the 128-bit unsigned integer formed by +| concatenating 'b64' and 'b0'. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE +bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) + { return (a64 < b64) || ((a64 == b64) && (a0 <= b0)); } +#else +bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ); +#endif +#endif + +#ifndef softfloat_lt128 +/*---------------------------------------------------------------------------- +| Returns true if the 128-bit unsigned integer formed by concatenating 'a64' +| and 'a0' is less than the 128-bit unsigned integer formed by concatenating +| 'b64' and 'b0'. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE +bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) + { return (a64 < b64) || ((a64 == b64) && (a0 < b0)); } +#else +bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ); +#endif +#endif + +#ifndef softfloat_shortShiftLeft128 +/*---------------------------------------------------------------------------- +| Shifts the 128 bits formed by concatenating 'a64' and 'a0' left by the +| number of bits given in 'dist', which must be in the range 1 to 63. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE +struct uint128 + softfloat_shortShiftLeft128( uint64_t a64, uint64_t a0, uint_fast8_t dist ) +{ + struct uint128 z; + z.v64 = a64<<dist | a0>>(-dist & 63); + z.v0 = a0<<dist; + return z; +} +#else +struct uint128 + softfloat_shortShiftLeft128( uint64_t a64, uint64_t a0, uint_fast8_t dist ); +#endif +#endif + +#ifndef softfloat_shortShiftRight128 +/*---------------------------------------------------------------------------- +| Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the +| number of bits given in 'dist', which must be in the range 1 to 63. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE +struct uint128 + softfloat_shortShiftRight128( uint64_t a64, uint64_t a0, uint_fast8_t dist ) +{ + struct uint128 z; + z.v64 = a64>>dist; + z.v0 = a64<<(-dist & 63) | a0>>dist; + return z; +} +#else +struct uint128 + softfloat_shortShiftRight128( uint64_t a64, uint64_t a0, uint_fast8_t dist ); +#endif +#endif + +#ifndef softfloat_shortShiftRightJam64Extra +/*---------------------------------------------------------------------------- +| This function is the same as 'softfloat_shiftRightJam64Extra' (below), +| except that 'dist' must be in the range 1 to 63. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE +struct uint64_extra + softfloat_shortShiftRightJam64Extra( + uint64_t a, uint64_t extra, uint_fast8_t dist ) +{ + struct uint64_extra z; + z.v = a>>dist; + z.extra = a<<(-dist & 63) | (extra != 0); + return z; +} +#else +struct uint64_extra + softfloat_shortShiftRightJam64Extra( + uint64_t a, uint64_t extra, uint_fast8_t dist ); +#endif +#endif + +#ifndef softfloat_shortShiftRightJam128 +/*---------------------------------------------------------------------------- +| Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the +| number of bits given in 'dist', which must be in the range 1 to 63. If any +| nonzero bits are shifted off, they are "jammed" into the least-significant +| bit of the shifted value by setting the least-significant bit to 1. This +| shifted-and-jammed value is returned. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL) +INLINE +struct uint128 + softfloat_shortShiftRightJam128( + uint64_t a64, uint64_t a0, uint_fast8_t dist ) +{ + uint_fast8_t negDist = -dist; + struct uint128 z; + z.v64 = a64>>dist; + z.v0 = + a64<<(negDist & 63) | a0>>dist + | ((uint64_t) (a0<<(negDist & 63)) != 0); + return z; +} +#else +struct uint128 + softfloat_shortShiftRightJam128( + uint64_t a64, uint64_t a0, uint_fast8_t dist ); +#endif +#endif + +#ifndef softfloat_shortShiftRightJam128Extra +/*---------------------------------------------------------------------------- +| This function is the same as 'softfloat_shiftRightJam128Extra' (below), +| except that 'dist' must be in the range 1 to 63. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL) +INLINE +struct uint128_extra + softfloat_shortShiftRightJam128Extra( + uint64_t a64, uint64_t a0, uint64_t extra, uint_fast8_t dist ) +{ + uint_fast8_t negDist = -dist; + struct uint128_extra z; + z.v.v64 = a64>>dist; + z.v.v0 = a64<<(negDist & 63) | a0>>dist; + z.extra = a0<<(negDist & 63) | (extra != 0); + return z; +} +#else +struct uint128_extra + softfloat_shortShiftRightJam128Extra( + uint64_t a64, uint64_t a0, uint64_t extra, uint_fast8_t dist ); +#endif +#endif + +#ifndef softfloat_shiftRightJam64Extra +/*---------------------------------------------------------------------------- +| Shifts the 128 bits formed by concatenating 'a' and 'extra' right by 64 +| _plus_ the number of bits given in 'dist', which must not be zero. This +| shifted value is at most 64 nonzero bits and is returned in the 'v' field +| of the 'struct uint64_extra' result. The 64-bit 'extra' field of the result +| contains a value formed as follows from the bits that were shifted off: The +| _last_ bit shifted off is the most-significant bit of the 'extra' field, and +| the other 63 bits of the 'extra' field are all zero if and only if _all_but_ +| _the_last_ bits shifted off were all zero. +| (This function makes more sense if 'a' and 'extra' are considered to form +| an unsigned fixed-point number with binary point between 'a' and 'extra'. +| This fixed-point value is shifted right by the number of bits given in +| 'dist', and the integer part of this shifted value is returned in the 'v' +| field of the result. The fractional part of the shifted value is modified +| as described above and returned in the 'extra' field of the result.) +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (4 <= INLINE_LEVEL) +INLINE +struct uint64_extra + softfloat_shiftRightJam64Extra( + uint64_t a, uint64_t extra, uint_fast32_t dist ) +{ + struct uint64_extra z; + if ( dist < 64 ) { + z.v = a>>dist; + z.extra = a<<(-dist & 63); + } else { + z.v = 0; + z.extra = (dist == 64) ? a : (a != 0); + } + z.extra |= (extra != 0); + return z; +} +#else +struct uint64_extra + softfloat_shiftRightJam64Extra( + uint64_t a, uint64_t extra, uint_fast32_t dist ); +#endif +#endif + +#ifndef softfloat_shiftRightJam128 +/*---------------------------------------------------------------------------- +| Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the +| number of bits given in 'dist', which must not be zero. If any nonzero bits +| are shifted off, they are "jammed" into the least-significant bit of the +| shifted value by setting the least-significant bit to 1. This shifted-and- +| jammed value is returned. +| The value of 'dist' can be arbitrarily large. In particular, if 'dist' is +| greater than 128, the result will be either 0 or 1, depending on whether the +| original 128 bits are all zeros. +*----------------------------------------------------------------------------*/ +struct uint128 + softfloat_shiftRightJam128( uint64_t a64, uint64_t a0, uint_fast32_t dist ); +#endif + +#ifndef softfloat_shiftRightJam128Extra +/*---------------------------------------------------------------------------- +| Shifts the 192 bits formed by concatenating 'a64', 'a0', and 'extra' right +| by 64 _plus_ the number of bits given in 'dist', which must not be zero. +| This shifted value is at most 128 nonzero bits and is returned in the 'v' +| field of the 'struct uint128_extra' result. The 64-bit 'extra' field of the +| result contains a value formed as follows from the bits that were shifted +| off: The _last_ bit shifted off is the most-significant bit of the 'extra' +| field, and the other 63 bits of the 'extra' field are all zero if and only +| if _all_but_the_last_ bits shifted off were all zero. +| (This function makes more sense if 'a64', 'a0', and 'extra' are considered +| to form an unsigned fixed-point number with binary point between 'a0' and +| 'extra'. This fixed-point value is shifted right by the number of bits +| given in 'dist', and the integer part of this shifted value is returned +| in the 'v' field of the result. The fractional part of the shifted value +| is modified as described above and returned in the 'extra' field of the +| result.) +*----------------------------------------------------------------------------*/ +struct uint128_extra + softfloat_shiftRightJam128Extra( + uint64_t a64, uint64_t a0, uint64_t extra, uint_fast32_t dist ); +#endif + +#ifndef softfloat_shiftRightJam256M +/*---------------------------------------------------------------------------- +| Shifts the 256-bit unsigned integer pointed to by 'aPtr' right by the number +| of bits given in 'dist', which must not be zero. If any nonzero bits are +| shifted off, they are "jammed" into the least-significant bit of the shifted +| value by setting the least-significant bit to 1. This shifted-and-jammed +| value is stored at the location pointed to by 'zPtr'. Each of 'aPtr' and +| 'zPtr' points to an array of four 64-bit elements that concatenate in the +| platform's normal endian order to form a 256-bit integer. +| The value of 'dist' can be arbitrarily large. In particular, if 'dist' +| is greater than 256, the stored result will be either 0 or 1, depending on +| whether the original 256 bits are all zeros. +*----------------------------------------------------------------------------*/ +void + softfloat_shiftRightJam256M( + const uint64_t *aPtr, uint_fast32_t dist, uint64_t *zPtr ); +#endif + +#ifndef softfloat_add128 +/*---------------------------------------------------------------------------- +| Returns the sum of the 128-bit integer formed by concatenating 'a64' and +| 'a0' and the 128-bit integer formed by concatenating 'b64' and 'b0'. The +| addition is modulo 2^128, so any carry out is lost. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE +struct uint128 + softfloat_add128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) +{ + struct uint128 z; + z.v0 = a0 + b0; + z.v64 = a64 + b64 + (z.v0 < a0); + return z; +} +#else +struct uint128 + softfloat_add128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ); +#endif +#endif + +#ifndef softfloat_add256M +/*---------------------------------------------------------------------------- +| Adds the two 256-bit integers pointed to by 'aPtr' and 'bPtr'. The addition +| is modulo 2^256, so any carry out is lost. The sum is stored at the +| location pointed to by 'zPtr'. Each of 'aPtr', 'bPtr', and 'zPtr' points to +| an array of four 64-bit elements that concatenate in the platform's normal +| endian order to form a 256-bit integer. +*----------------------------------------------------------------------------*/ +void + softfloat_add256M( + const uint64_t *aPtr, const uint64_t *bPtr, uint64_t *zPtr ); +#endif + +#ifndef softfloat_sub128 +/*---------------------------------------------------------------------------- +| Returns the difference of the 128-bit integer formed by concatenating 'a64' +| and 'a0' and the 128-bit integer formed by concatenating 'b64' and 'b0'. +| The subtraction is modulo 2^128, so any borrow out (carry out) is lost. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE +struct uint128 + softfloat_sub128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) +{ + struct uint128 z; + z.v0 = a0 - b0; + z.v64 = a64 - b64; + z.v64 -= (a0 < b0); + return z; +} +#else +struct uint128 + softfloat_sub128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ); +#endif +#endif + +#ifndef softfloat_sub256M +/*---------------------------------------------------------------------------- +| Subtracts the 256-bit integer pointed to by 'bPtr' from the 256-bit integer +| pointed to by 'aPtr'. The addition is modulo 2^256, so any borrow out +| (carry out) is lost. The difference is stored at the location pointed to +| by 'zPtr'. Each of 'aPtr', 'bPtr', and 'zPtr' points to an array of four +| 64-bit elements that concatenate in the platform's normal endian order to +| form a 256-bit integer. +*----------------------------------------------------------------------------*/ +void + softfloat_sub256M( + const uint64_t *aPtr, const uint64_t *bPtr, uint64_t *zPtr ); +#endif + +#ifndef softfloat_mul64ByShifted32To128 +/*---------------------------------------------------------------------------- +| Returns the 128-bit product of 'a', 'b', and 2^32. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL) +INLINE struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b ) +{ + uint_fast64_t mid; + struct uint128 z; + mid = (uint_fast64_t) (uint32_t) a * b; + z.v0 = mid<<32; + z.v64 = (uint_fast64_t) (uint32_t) (a>>32) * b + (mid>>32); + return z; +} +#else +struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b ); +#endif +#endif + +#ifndef softfloat_mul64To128 +/*---------------------------------------------------------------------------- +| Returns the 128-bit product of 'a' and 'b'. +*----------------------------------------------------------------------------*/ +struct uint128 softfloat_mul64To128( uint64_t a, uint64_t b ); +#endif + +#ifndef softfloat_mul128By32 +/*---------------------------------------------------------------------------- +| Returns the product of the 128-bit integer formed by concatenating 'a64' and +| 'a0', multiplied by 'b'. The multiplication is modulo 2^128; any overflow +| bits are discarded. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (4 <= INLINE_LEVEL) +INLINE +struct uint128 softfloat_mul128By32( uint64_t a64, uint64_t a0, uint32_t b ) +{ + struct uint128 z; + uint_fast64_t mid; + uint_fast32_t carry; + z.v0 = a0 * b; + mid = (uint_fast64_t) (uint32_t) (a0>>32) * b; + carry = (uint32_t) ((uint_fast32_t) (z.v0>>32) - (uint_fast32_t) mid); + z.v64 = a64 * b + (uint_fast32_t) ((mid + carry)>>32); + return z; +} +#else +struct uint128 softfloat_mul128By32( uint64_t a64, uint64_t a0, uint32_t b ); +#endif +#endif + +#ifndef softfloat_mul128To256M +/*---------------------------------------------------------------------------- +| Multiplies the 128-bit unsigned integer formed by concatenating 'a64' and +| 'a0' by the 128-bit unsigned integer formed by concatenating 'b64' and +| 'b0'. The 256-bit product is stored at the location pointed to by 'zPtr'. +| Argument 'zPtr' points to an array of four 64-bit elements that concatenate +| in the platform's normal endian order to form a 256-bit integer. +*----------------------------------------------------------------------------*/ +void + softfloat_mul128To256M( + uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0, uint64_t *zPtr ); +#endif + +#else + +/*---------------------------------------------------------------------------- +| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not +| defined. +*----------------------------------------------------------------------------*/ + +#ifndef softfloat_compare96M +/*---------------------------------------------------------------------------- +| Compares the two 96-bit unsigned integers pointed to by 'aPtr' and 'bPtr'. +| Returns -1 if the first integer (A) is less than the second (B); returns 0 +| if the two integers are equal; and returns +1 if the first integer (A) +| is greater than the second (B). (The result is thus the signum of A - B.) +| Each of 'aPtr' and 'bPtr' points to an array of three 32-bit elements that +| concatenate in the platform's normal endian order to form a 96-bit integer. +*----------------------------------------------------------------------------*/ +int_fast8_t softfloat_compare96M( const uint32_t *aPtr, const uint32_t *bPtr ); +#endif + +#ifndef softfloat_compare128M +/*---------------------------------------------------------------------------- +| Compares the two 128-bit unsigned integers pointed to by 'aPtr' and 'bPtr'. +| Returns -1 if the first integer (A) is less than the second (B); returns 0 +| if the two integers are equal; and returns +1 if the first integer (A) +| is greater than the second (B). (The result is thus the signum of A - B.) +| Each of 'aPtr' and 'bPtr' points to an array of four 32-bit elements that +| concatenate in the platform's normal endian order to form a 128-bit integer. +*----------------------------------------------------------------------------*/ +int_fast8_t + softfloat_compare128M( const uint32_t *aPtr, const uint32_t *bPtr ); +#endif + +#ifndef softfloat_shortShiftLeft64To96M +/*---------------------------------------------------------------------------- +| Extends 'a' to 96 bits and shifts the value left by the number of bits given +| in 'dist', which must be in the range 1 to 31. The result is stored at the +| location pointed to by 'zPtr'. Argument 'zPtr' points to an array of three +| 32-bit elements that concatenate in the platform's normal endian order to +| form a 96-bit integer. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE +void + softfloat_shortShiftLeft64To96M( + uint64_t a, uint_fast8_t dist, uint32_t *zPtr ) +{ + zPtr[indexWord( 3, 0 )] = (uint32_t) a<<dist; + a >>= 32 - dist; + zPtr[indexWord( 3, 2 )] = a>>32; + zPtr[indexWord( 3, 1 )] = a; +} +#else +void + softfloat_shortShiftLeft64To96M( + uint64_t a, uint_fast8_t dist, uint32_t *zPtr ); +#endif +#endif + +#ifndef softfloat_shortShiftLeftM +/*---------------------------------------------------------------------------- +| Shifts the N-bit unsigned integer pointed to by 'aPtr' left by the number +| of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' +| must be in the range 1 to 31. Any nonzero bits shifted off are lost. The +| shifted N-bit result is stored at the location pointed to by 'zPtr'. Each +| of 'aPtr' and 'zPtr' points to a 'size_words'-long array of 32-bit elements +| that concatenate in the platform's normal endian order to form an N-bit +| integer. +*----------------------------------------------------------------------------*/ +void + softfloat_shortShiftLeftM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint_fast8_t dist, + uint32_t *zPtr + ); +#endif + +#ifndef softfloat_shortShiftLeft96M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shortShiftLeftM' with +| 'size_words' = 3 (N = 96). +*----------------------------------------------------------------------------*/ +#define softfloat_shortShiftLeft96M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 3, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shortShiftLeft128M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shortShiftLeftM' with +| 'size_words' = 4 (N = 128). +*----------------------------------------------------------------------------*/ +#define softfloat_shortShiftLeft128M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 4, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shortShiftLeft160M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shortShiftLeftM' with +| 'size_words' = 5 (N = 160). +*----------------------------------------------------------------------------*/ +#define softfloat_shortShiftLeft160M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 5, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shiftLeftM +/*---------------------------------------------------------------------------- +| Shifts the N-bit unsigned integer pointed to by 'aPtr' left by the number +| of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' +| must not be zero. Any nonzero bits shifted off are lost. The shifted +| N-bit result is stored at the location pointed to by 'zPtr'. Each of 'aPtr' +| and 'zPtr' points to a 'size_words'-long array of 32-bit elements that +| concatenate in the platform's normal endian order to form an N-bit integer. +| The value of 'dist' can be arbitrarily large. In particular, if 'dist' is +| greater than N, the stored result will be 0. +*----------------------------------------------------------------------------*/ +void + softfloat_shiftLeftM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint32_t dist, + uint32_t *zPtr + ); +#endif + +#ifndef softfloat_shiftLeft96M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shiftLeftM' with +| 'size_words' = 3 (N = 96). +*----------------------------------------------------------------------------*/ +#define softfloat_shiftLeft96M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 3, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shiftLeft128M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shiftLeftM' with +| 'size_words' = 4 (N = 128). +*----------------------------------------------------------------------------*/ +#define softfloat_shiftLeft128M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 4, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shiftLeft160M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shiftLeftM' with +| 'size_words' = 5 (N = 160). +*----------------------------------------------------------------------------*/ +#define softfloat_shiftLeft160M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 5, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shortShiftRightM +/*---------------------------------------------------------------------------- +| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number +| of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' +| must be in the range 1 to 31. Any nonzero bits shifted off are lost. The +| shifted N-bit result is stored at the location pointed to by 'zPtr'. Each +| of 'aPtr' and 'zPtr' points to a 'size_words'-long array of 32-bit elements +| that concatenate in the platform's normal endian order to form an N-bit +| integer. +*----------------------------------------------------------------------------*/ +void + softfloat_shortShiftRightM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint_fast8_t dist, + uint32_t *zPtr + ); +#endif + +#ifndef softfloat_shortShiftRight128M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shortShiftRightM' with +| 'size_words' = 4 (N = 128). +*----------------------------------------------------------------------------*/ +#define softfloat_shortShiftRight128M( aPtr, dist, zPtr ) softfloat_shortShiftRightM( 4, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shortShiftRight160M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shortShiftRightM' with +| 'size_words' = 5 (N = 160). +*----------------------------------------------------------------------------*/ +#define softfloat_shortShiftRight160M( aPtr, dist, zPtr ) softfloat_shortShiftRightM( 5, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shortShiftRightJamM +/*---------------------------------------------------------------------------- +| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number +| of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' +| must be in the range 1 to 31. If any nonzero bits are shifted off, they are +| "jammed" into the least-significant bit of the shifted value by setting the +| least-significant bit to 1. This shifted-and-jammed N-bit result is stored +| at the location pointed to by 'zPtr'. Each of 'aPtr' and 'zPtr' points +| to a 'size_words'-long array of 32-bit elements that concatenate in the +| platform's normal endian order to form an N-bit integer. +*----------------------------------------------------------------------------*/ +void + softfloat_shortShiftRightJamM( + uint_fast8_t, const uint32_t *, uint_fast8_t, uint32_t * ); +#endif + +#ifndef softfloat_shortShiftRightJam160M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shortShiftRightJamM' with +| 'size_words' = 5 (N = 160). +*----------------------------------------------------------------------------*/ +#define softfloat_shortShiftRightJam160M( aPtr, dist, zPtr ) softfloat_shortShiftRightJamM( 5, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shiftRightM +/*---------------------------------------------------------------------------- +| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number +| of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' +| must not be zero. Any nonzero bits shifted off are lost. The shifted +| N-bit result is stored at the location pointed to by 'zPtr'. Each of 'aPtr' +| and 'zPtr' points to a 'size_words'-long array of 32-bit elements that +| concatenate in the platform's normal endian order to form an N-bit integer. +| The value of 'dist' can be arbitrarily large. In particular, if 'dist' is +| greater than N, the stored result will be 0. +*----------------------------------------------------------------------------*/ +void + softfloat_shiftRightM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint32_t dist, + uint32_t *zPtr + ); +#endif + +#ifndef softfloat_shiftRight96M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shiftRightM' with +| 'size_words' = 3 (N = 96). +*----------------------------------------------------------------------------*/ +#define softfloat_shiftRight96M( aPtr, dist, zPtr ) softfloat_shiftRightM( 3, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shiftRightJamM +/*---------------------------------------------------------------------------- +| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number +| of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' +| must not be zero. If any nonzero bits are shifted off, they are "jammed" +| into the least-significant bit of the shifted value by setting the least- +| significant bit to 1. This shifted-and-jammed N-bit result is stored +| at the location pointed to by 'zPtr'. Each of 'aPtr' and 'zPtr' points +| to a 'size_words'-long array of 32-bit elements that concatenate in the +| platform's normal endian order to form an N-bit integer. +| The value of 'dist' can be arbitrarily large. In particular, if 'dist' +| is greater than N, the stored result will be either 0 or 1, depending on +| whether the original N bits are all zeros. +*----------------------------------------------------------------------------*/ +void + softfloat_shiftRightJamM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint32_t dist, + uint32_t *zPtr + ); +#endif + +#ifndef softfloat_shiftRightJam96M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shiftRightJamM' with +| 'size_words' = 3 (N = 96). +*----------------------------------------------------------------------------*/ +#define softfloat_shiftRightJam96M( aPtr, dist, zPtr ) softfloat_shiftRightJamM( 3, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shiftRightJam128M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shiftRightJamM' with +| 'size_words' = 4 (N = 128). +*----------------------------------------------------------------------------*/ +#define softfloat_shiftRightJam128M( aPtr, dist, zPtr ) softfloat_shiftRightJamM( 4, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_shiftRightJam160M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_shiftRightJamM' with +| 'size_words' = 5 (N = 160). +*----------------------------------------------------------------------------*/ +#define softfloat_shiftRightJam160M( aPtr, dist, zPtr ) softfloat_shiftRightJamM( 5, aPtr, dist, zPtr ) +#endif + +#ifndef softfloat_addM +/*---------------------------------------------------------------------------- +| Adds the two N-bit integers pointed to by 'aPtr' and 'bPtr', where N = +| 'size_words' * 32. The addition is modulo 2^N, so any carry out is lost. +| The N-bit sum is stored at the location pointed to by 'zPtr'. Each of +| 'aPtr', 'bPtr', and 'zPtr' points to a 'size_words'-long array of 32-bit +| elements that concatenate in the platform's normal endian order to form an +| N-bit integer. +*----------------------------------------------------------------------------*/ +void + softfloat_addM( + uint_fast8_t size_words, + const uint32_t *aPtr, + const uint32_t *bPtr, + uint32_t *zPtr + ); +#endif + +#ifndef softfloat_add96M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_addM' with 'size_words' +| = 3 (N = 96). +*----------------------------------------------------------------------------*/ +#define softfloat_add96M( aPtr, bPtr, zPtr ) softfloat_addM( 3, aPtr, bPtr, zPtr ) +#endif + +#ifndef softfloat_add128M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_addM' with 'size_words' +| = 4 (N = 128). +*----------------------------------------------------------------------------*/ +#define softfloat_add128M( aPtr, bPtr, zPtr ) softfloat_addM( 4, aPtr, bPtr, zPtr ) +#endif + +#ifndef softfloat_add160M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_addM' with 'size_words' +| = 5 (N = 160). +*----------------------------------------------------------------------------*/ +#define softfloat_add160M( aPtr, bPtr, zPtr ) softfloat_addM( 5, aPtr, bPtr, zPtr ) +#endif + +#ifndef softfloat_addCarryM +/*---------------------------------------------------------------------------- +| Adds the two N-bit unsigned integers pointed to by 'aPtr' and 'bPtr', where +| N = 'size_words' * 32, plus 'carry', which must be either 0 or 1. The N-bit +| sum (modulo 2^N) is stored at the location pointed to by 'zPtr', and any +| carry out is returned as the result. Each of 'aPtr', 'bPtr', and 'zPtr' +| points to a 'size_words'-long array of 32-bit elements that concatenate in +| the platform's normal endian order to form an N-bit integer. +*----------------------------------------------------------------------------*/ +uint_fast8_t + softfloat_addCarryM( + uint_fast8_t size_words, + const uint32_t *aPtr, + const uint32_t *bPtr, + uint_fast8_t carry, + uint32_t *zPtr + ); +#endif + +#ifndef softfloat_addComplCarryM +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_addCarryM', except that +| the value of the unsigned integer pointed to by 'bPtr' is bit-wise completed +| before the addition. +*----------------------------------------------------------------------------*/ +uint_fast8_t + softfloat_addComplCarryM( + uint_fast8_t size_words, + const uint32_t *aPtr, + const uint32_t *bPtr, + uint_fast8_t carry, + uint32_t *zPtr + ); +#endif + +#ifndef softfloat_addComplCarry96M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_addComplCarryM' with +| 'size_words' = 3 (N = 96). +*----------------------------------------------------------------------------*/ +#define softfloat_addComplCarry96M( aPtr, bPtr, carry, zPtr ) softfloat_addComplCarryM( 3, aPtr, bPtr, carry, zPtr ) +#endif + +#ifndef softfloat_negXM +/*---------------------------------------------------------------------------- +| Replaces the N-bit unsigned integer pointed to by 'zPtr' by the +| 2s-complement of itself, where N = 'size_words' * 32. Argument 'zPtr' +| points to a 'size_words'-long array of 32-bit elements that concatenate in +| the platform's normal endian order to form an N-bit integer. +*----------------------------------------------------------------------------*/ +void softfloat_negXM( uint_fast8_t size_words, uint32_t *zPtr ); +#endif + +#ifndef softfloat_negX96M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_negXM' with 'size_words' +| = 3 (N = 96). +*----------------------------------------------------------------------------*/ +#define softfloat_negX96M( zPtr ) softfloat_negXM( 3, zPtr ) +#endif + +#ifndef softfloat_negX128M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_negXM' with 'size_words' +| = 4 (N = 128). +*----------------------------------------------------------------------------*/ +#define softfloat_negX128M( zPtr ) softfloat_negXM( 4, zPtr ) +#endif + +#ifndef softfloat_negX160M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_negXM' with 'size_words' +| = 5 (N = 160). +*----------------------------------------------------------------------------*/ +#define softfloat_negX160M( zPtr ) softfloat_negXM( 5, zPtr ) +#endif + +#ifndef softfloat_negX256M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_negXM' with 'size_words' +| = 8 (N = 256). +*----------------------------------------------------------------------------*/ +#define softfloat_negX256M( zPtr ) softfloat_negXM( 8, zPtr ) +#endif + +#ifndef softfloat_sub1XM +/*---------------------------------------------------------------------------- +| Subtracts 1 from the N-bit integer pointed to by 'zPtr', where N = +| 'size_words' * 32. The subtraction is modulo 2^N, so any borrow out (carry +| out) is lost. Argument 'zPtr' points to a 'size_words'-long array of 32-bit +| elements that concatenate in the platform's normal endian order to form an +| N-bit integer. +*----------------------------------------------------------------------------*/ +void softfloat_sub1XM( uint_fast8_t size_words, uint32_t *zPtr ); +#endif + +#ifndef softfloat_sub1X96M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_sub1XM' with 'size_words' +| = 3 (N = 96). +*----------------------------------------------------------------------------*/ +#define softfloat_sub1X96M( zPtr ) softfloat_sub1XM( 3, zPtr ) +#endif + +#ifndef softfloat_sub1X160M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_sub1XM' with 'size_words' +| = 5 (N = 160). +*----------------------------------------------------------------------------*/ +#define softfloat_sub1X160M( zPtr ) softfloat_sub1XM( 5, zPtr ) +#endif + +#ifndef softfloat_subM +/*---------------------------------------------------------------------------- +| Subtracts the two N-bit integers pointed to by 'aPtr' and 'bPtr', where N = +| 'size_words' * 32. The subtraction is modulo 2^N, so any borrow out (carry +| out) is lost. The N-bit difference is stored at the location pointed to by +| 'zPtr'. Each of 'aPtr', 'bPtr', and 'zPtr' points to a 'size_words'-long +| array of 32-bit elements that concatenate in the platform's normal endian +| order to form an N-bit integer. +*----------------------------------------------------------------------------*/ +void + softfloat_subM( + uint_fast8_t size_words, + const uint32_t *aPtr, + const uint32_t *bPtr, + uint32_t *zPtr + ); +#endif + +#ifndef softfloat_sub96M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_subM' with 'size_words' +| = 3 (N = 96). +*----------------------------------------------------------------------------*/ +#define softfloat_sub96M( aPtr, bPtr, zPtr ) softfloat_subM( 3, aPtr, bPtr, zPtr ) +#endif + +#ifndef softfloat_sub128M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_subM' with 'size_words' +| = 4 (N = 128). +*----------------------------------------------------------------------------*/ +#define softfloat_sub128M( aPtr, bPtr, zPtr ) softfloat_subM( 4, aPtr, bPtr, zPtr ) +#endif + +#ifndef softfloat_sub160M +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_subM' with 'size_words' +| = 5 (N = 160). +*----------------------------------------------------------------------------*/ +#define softfloat_sub160M( aPtr, bPtr, zPtr ) softfloat_subM( 5, aPtr, bPtr, zPtr ) +#endif + +#ifndef softfloat_mul64To128M +/*---------------------------------------------------------------------------- +| Multiplies 'a' and 'b' and stores the 128-bit product at the location +| pointed to by 'zPtr'. Argument 'zPtr' points to an array of four 32-bit +| elements that concatenate in the platform's normal endian order to form a +| 128-bit integer. +*----------------------------------------------------------------------------*/ +void softfloat_mul64To128M( uint64_t a, uint64_t b, uint32_t *zPtr ); +#endif + +#ifndef softfloat_mul128MTo256M +/*---------------------------------------------------------------------------- +| Multiplies the two 128-bit unsigned integers pointed to by 'aPtr' and +| 'bPtr', and stores the 256-bit product at the location pointed to by 'zPtr'. +| Each of 'aPtr' and 'bPtr' points to an array of four 32-bit elements that +| concatenate in the platform's normal endian order to form a 128-bit integer. +| Argument 'zPtr' points to an array of eight 32-bit elements that concatenate +| to form a 256-bit integer. +*----------------------------------------------------------------------------*/ +void + softfloat_mul128MTo256M( + const uint32_t *aPtr, const uint32_t *bPtr, uint32_t *zPtr ); +#endif + +#ifndef softfloat_remStepMBy32 +/*---------------------------------------------------------------------------- +| Performs a "remainder reduction step" as follows: Arguments 'remPtr' and +| 'bPtr' both point to N-bit unsigned integers, where N = 'size_words' * 32. +| Defining R and B as the values of those integers, the expression (R<<'dist') +| - B * q is computed modulo 2^N, and the N-bit result is stored at the +| location pointed to by 'zPtr'. Each of 'remPtr', 'bPtr', and 'zPtr' points +| to a 'size_words'-long array of 32-bit elements that concatenate in the +| platform's normal endian order to form an N-bit integer. +*----------------------------------------------------------------------------*/ +void + softfloat_remStepMBy32( + uint_fast8_t size_words, + const uint32_t *remPtr, + uint_fast8_t dist, + const uint32_t *bPtr, + uint32_t q, + uint32_t *zPtr + ); +#endif + +#ifndef softfloat_remStep96MBy32 +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_remStepMBy32' with +| 'size_words' = 3 (N = 96). +*----------------------------------------------------------------------------*/ +#define softfloat_remStep96MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 3, remPtr, dist, bPtr, q, zPtr ) +#endif + +#ifndef softfloat_remStep128MBy32 +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_remStepMBy32' with +| 'size_words' = 4 (N = 128). +*----------------------------------------------------------------------------*/ +#define softfloat_remStep128MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 4, remPtr, dist, bPtr, q, zPtr ) +#endif + +#ifndef softfloat_remStep160MBy32 +/*---------------------------------------------------------------------------- +| This function or macro is the same as 'softfloat_remStepMBy32' with +| 'size_words' = 5 (N = 160). +*----------------------------------------------------------------------------*/ +#define softfloat_remStep160MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 5, remPtr, dist, bPtr, q, zPtr ) +#endif + +#endif + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/softfloat.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/softfloat.h new file mode 100644 index 000000000..9ed17c1b9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/softfloat.h @@ -0,0 +1,372 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + + +/*============================================================================ +| Note: If SoftFloat is made available as a general library for programs to +| use, it is strongly recommended that a platform-specific version of this +| header, "softfloat.h", be created that folds in "softfloat_types.h" and that +| eliminates all dependencies on compile-time macros. +*============================================================================*/ + + +#ifndef softfloat_h +#define softfloat_h 1 + +#include <stdbool.h> +#include <stdint.h> +#include "softfloat_types.h" + +#ifndef THREAD_LOCAL +#define THREAD_LOCAL +#endif + +/*---------------------------------------------------------------------------- +| Software floating-point underflow tininess-detection mode. +*----------------------------------------------------------------------------*/ +extern THREAD_LOCAL uint_fast8_t softfloat_detectTininess; +enum { + softfloat_tininess_beforeRounding = 0, + softfloat_tininess_afterRounding = 1 +}; + +/*---------------------------------------------------------------------------- +| Software floating-point rounding mode. (Mode "odd" is supported only if +| SoftFloat is compiled with macro 'SOFTFLOAT_ROUND_ODD' defined.) +*----------------------------------------------------------------------------*/ +extern THREAD_LOCAL uint_fast8_t softfloat_roundingMode; +enum { + softfloat_round_near_even = 0, + softfloat_round_minMag = 1, + softfloat_round_min = 2, + softfloat_round_max = 3, + softfloat_round_near_maxMag = 4, + softfloat_round_odd = 6 +}; + +/*---------------------------------------------------------------------------- +| Software floating-point exception flags. +*----------------------------------------------------------------------------*/ +extern THREAD_LOCAL uint_fast8_t softfloat_exceptionFlags; +enum { + softfloat_flag_inexact = 1, + softfloat_flag_underflow = 2, + softfloat_flag_overflow = 4, + softfloat_flag_infinite = 8, + softfloat_flag_invalid = 16 +}; + +/*---------------------------------------------------------------------------- +| Routine to raise any or all of the software floating-point exception flags. +*----------------------------------------------------------------------------*/ +void softfloat_raiseFlags( uint_fast8_t ); + +/*---------------------------------------------------------------------------- +| Integer-to-floating-point conversion routines. +*----------------------------------------------------------------------------*/ +float16_t ui32_to_f16( uint32_t ); +float32_t ui32_to_f32( uint32_t ); +float64_t ui32_to_f64( uint32_t ); +#ifdef SOFTFLOAT_FAST_INT64 +extFloat80_t ui32_to_extF80( uint32_t ); +float128_t ui32_to_f128( uint32_t ); +#endif +void ui32_to_extF80M( uint32_t, extFloat80_t * ); +void ui32_to_f128M( uint32_t, float128_t * ); +float16_t ui64_to_f16( uint64_t ); +float32_t ui64_to_f32( uint64_t ); +float64_t ui64_to_f64( uint64_t ); +#ifdef SOFTFLOAT_FAST_INT64 +extFloat80_t ui64_to_extF80( uint64_t ); +float128_t ui64_to_f128( uint64_t ); +#endif +void ui64_to_extF80M( uint64_t, extFloat80_t * ); +void ui64_to_f128M( uint64_t, float128_t * ); +float16_t i32_to_f16( int32_t ); +float32_t i32_to_f32( int32_t ); +float64_t i32_to_f64( int32_t ); +#ifdef SOFTFLOAT_FAST_INT64 +extFloat80_t i32_to_extF80( int32_t ); +float128_t i32_to_f128( int32_t ); +#endif +void i32_to_extF80M( int32_t, extFloat80_t * ); +void i32_to_f128M( int32_t, float128_t * ); +float16_t i64_to_f16( int64_t ); +float32_t i64_to_f32( int64_t ); +float64_t i64_to_f64( int64_t ); +#ifdef SOFTFLOAT_FAST_INT64 +extFloat80_t i64_to_extF80( int64_t ); +float128_t i64_to_f128( int64_t ); +#endif +void i64_to_extF80M( int64_t, extFloat80_t * ); +void i64_to_f128M( int64_t, float128_t * ); + +/*---------------------------------------------------------------------------- +| 16-bit (half-precision) floating-point operations. +*----------------------------------------------------------------------------*/ +uint_fast32_t f16_to_ui32( float16_t, uint_fast8_t, bool ); +uint_fast64_t f16_to_ui64( float16_t, uint_fast8_t, bool ); +int_fast32_t f16_to_i32( float16_t, uint_fast8_t, bool ); +int_fast64_t f16_to_i64( float16_t, uint_fast8_t, bool ); +uint_fast32_t f16_to_ui32_r_minMag( float16_t, bool ); +uint_fast64_t f16_to_ui64_r_minMag( float16_t, bool ); +int_fast32_t f16_to_i32_r_minMag( float16_t, bool ); +int_fast64_t f16_to_i64_r_minMag( float16_t, bool ); +float32_t f16_to_f32( float16_t ); +float64_t f16_to_f64( float16_t ); +#ifdef SOFTFLOAT_FAST_INT64 +extFloat80_t f16_to_extF80( float16_t ); +float128_t f16_to_f128( float16_t ); +#endif +void f16_to_extF80M( float16_t, extFloat80_t * ); +void f16_to_f128M( float16_t, float128_t * ); +float16_t f16_roundToInt( float16_t, uint_fast8_t, bool ); +float16_t f16_add( float16_t, float16_t ); +float16_t f16_sub( float16_t, float16_t ); +float16_t f16_mul( float16_t, float16_t ); +float16_t f16_mulAdd( float16_t, float16_t, float16_t ); +float16_t f16_div( float16_t, float16_t ); +float16_t f16_rem( float16_t, float16_t ); +float16_t f16_sqrt( float16_t ); +bool f16_eq( float16_t, float16_t ); +bool f16_le( float16_t, float16_t ); +bool f16_lt( float16_t, float16_t ); +bool f16_eq_signaling( float16_t, float16_t ); +bool f16_le_quiet( float16_t, float16_t ); +bool f16_lt_quiet( float16_t, float16_t ); +bool f16_isSignalingNaN( float16_t ); + +/*---------------------------------------------------------------------------- +| 32-bit (single-precision) floating-point operations. +*----------------------------------------------------------------------------*/ +uint_fast32_t f32_to_ui32( float32_t, uint_fast8_t, bool ); +uint_fast64_t f32_to_ui64( float32_t, uint_fast8_t, bool ); +int_fast32_t f32_to_i32( float32_t, uint_fast8_t, bool ); +int_fast64_t f32_to_i64( float32_t, uint_fast8_t, bool ); +uint_fast32_t f32_to_ui32_r_minMag( float32_t, bool ); +uint_fast64_t f32_to_ui64_r_minMag( float32_t, bool ); +int_fast32_t f32_to_i32_r_minMag( float32_t, bool ); +int_fast64_t f32_to_i64_r_minMag( float32_t, bool ); +float16_t f32_to_f16( float32_t ); +float64_t f32_to_f64( float32_t ); +#ifdef SOFTFLOAT_FAST_INT64 +extFloat80_t f32_to_extF80( float32_t ); +float128_t f32_to_f128( float32_t ); +#endif +void f32_to_extF80M( float32_t, extFloat80_t * ); +void f32_to_f128M( float32_t, float128_t * ); +float32_t f32_roundToInt( float32_t, uint_fast8_t, bool ); +float32_t f32_add( float32_t, float32_t ); +float32_t f32_sub( float32_t, float32_t ); +float32_t f32_mul( float32_t, float32_t ); +float32_t f32_mulAdd( float32_t, float32_t, float32_t ); +float32_t f32_div( float32_t, float32_t ); +float32_t f32_rem( float32_t, float32_t ); +float32_t f32_sqrt( float32_t ); +bool f32_eq( float32_t, float32_t ); +bool f32_le( float32_t, float32_t ); +bool f32_lt( float32_t, float32_t ); +bool f32_eq_signaling( float32_t, float32_t ); +bool f32_le_quiet( float32_t, float32_t ); +bool f32_lt_quiet( float32_t, float32_t ); +bool f32_isSignalingNaN( float32_t ); + +/*---------------------------------------------------------------------------- +| 64-bit (double-precision) floating-point operations. +*----------------------------------------------------------------------------*/ +uint_fast32_t f64_to_ui32( float64_t, uint_fast8_t, bool ); +uint_fast64_t f64_to_ui64( float64_t, uint_fast8_t, bool ); +int_fast32_t f64_to_i32( float64_t, uint_fast8_t, bool ); +int_fast64_t f64_to_i64( float64_t, uint_fast8_t, bool ); +uint_fast32_t f64_to_ui32_r_minMag( float64_t, bool ); +uint_fast64_t f64_to_ui64_r_minMag( float64_t, bool ); +int_fast32_t f64_to_i32_r_minMag( float64_t, bool ); +int_fast64_t f64_to_i64_r_minMag( float64_t, bool ); +float16_t f64_to_f16( float64_t ); +float32_t f64_to_f32( float64_t ); +#ifdef SOFTFLOAT_FAST_INT64 +extFloat80_t f64_to_extF80( float64_t ); +float128_t f64_to_f128( float64_t ); +#endif +void f64_to_extF80M( float64_t, extFloat80_t * ); +void f64_to_f128M( float64_t, float128_t * ); +float64_t f64_roundToInt( float64_t, uint_fast8_t, bool ); +float64_t f64_add( float64_t, float64_t ); +float64_t f64_sub( float64_t, float64_t ); +float64_t f64_mul( float64_t, float64_t ); +float64_t f64_mulAdd( float64_t, float64_t, float64_t ); +float64_t f64_div( float64_t, float64_t ); +float64_t f64_rem( float64_t, float64_t ); +float64_t f64_sqrt( float64_t ); +bool f64_eq( float64_t, float64_t ); +bool f64_le( float64_t, float64_t ); +bool f64_lt( float64_t, float64_t ); +bool f64_eq_signaling( float64_t, float64_t ); +bool f64_le_quiet( float64_t, float64_t ); +bool f64_lt_quiet( float64_t, float64_t ); +bool f64_isSignalingNaN( float64_t ); + +/*---------------------------------------------------------------------------- +| Rounding precision for 80-bit extended double-precision floating-point. +| Valid values are 32, 64, and 80. +*----------------------------------------------------------------------------*/ +extern THREAD_LOCAL uint_fast8_t extF80_roundingPrecision; + +/*---------------------------------------------------------------------------- +| 80-bit extended double-precision floating-point operations. +*----------------------------------------------------------------------------*/ +#ifdef SOFTFLOAT_FAST_INT64 +uint_fast32_t extF80_to_ui32( extFloat80_t, uint_fast8_t, bool ); +uint_fast64_t extF80_to_ui64( extFloat80_t, uint_fast8_t, bool ); +int_fast32_t extF80_to_i32( extFloat80_t, uint_fast8_t, bool ); +int_fast64_t extF80_to_i64( extFloat80_t, uint_fast8_t, bool ); +uint_fast32_t extF80_to_ui32_r_minMag( extFloat80_t, bool ); +uint_fast64_t extF80_to_ui64_r_minMag( extFloat80_t, bool ); +int_fast32_t extF80_to_i32_r_minMag( extFloat80_t, bool ); +int_fast64_t extF80_to_i64_r_minMag( extFloat80_t, bool ); +float16_t extF80_to_f16( extFloat80_t ); +float32_t extF80_to_f32( extFloat80_t ); +float64_t extF80_to_f64( extFloat80_t ); +float128_t extF80_to_f128( extFloat80_t ); +extFloat80_t extF80_roundToInt( extFloat80_t, uint_fast8_t, bool ); +extFloat80_t extF80_add( extFloat80_t, extFloat80_t ); +extFloat80_t extF80_sub( extFloat80_t, extFloat80_t ); +extFloat80_t extF80_mul( extFloat80_t, extFloat80_t ); +extFloat80_t extF80_div( extFloat80_t, extFloat80_t ); +extFloat80_t extF80_rem( extFloat80_t, extFloat80_t ); +extFloat80_t extF80_sqrt( extFloat80_t ); +bool extF80_eq( extFloat80_t, extFloat80_t ); +bool extF80_le( extFloat80_t, extFloat80_t ); +bool extF80_lt( extFloat80_t, extFloat80_t ); +bool extF80_eq_signaling( extFloat80_t, extFloat80_t ); +bool extF80_le_quiet( extFloat80_t, extFloat80_t ); +bool extF80_lt_quiet( extFloat80_t, extFloat80_t ); +bool extF80_isSignalingNaN( extFloat80_t ); +#endif +uint_fast32_t extF80M_to_ui32( const extFloat80_t *, uint_fast8_t, bool ); +uint_fast64_t extF80M_to_ui64( const extFloat80_t *, uint_fast8_t, bool ); +int_fast32_t extF80M_to_i32( const extFloat80_t *, uint_fast8_t, bool ); +int_fast64_t extF80M_to_i64( const extFloat80_t *, uint_fast8_t, bool ); +uint_fast32_t extF80M_to_ui32_r_minMag( const extFloat80_t *, bool ); +uint_fast64_t extF80M_to_ui64_r_minMag( const extFloat80_t *, bool ); +int_fast32_t extF80M_to_i32_r_minMag( const extFloat80_t *, bool ); +int_fast64_t extF80M_to_i64_r_minMag( const extFloat80_t *, bool ); +float16_t extF80M_to_f16( const extFloat80_t * ); +float32_t extF80M_to_f32( const extFloat80_t * ); +float64_t extF80M_to_f64( const extFloat80_t * ); +void extF80M_to_f128M( const extFloat80_t *, float128_t * ); +void + extF80M_roundToInt( + const extFloat80_t *, uint_fast8_t, bool, extFloat80_t * ); +void extF80M_add( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); +void extF80M_sub( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); +void extF80M_mul( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); +void extF80M_div( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); +void extF80M_rem( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); +void extF80M_sqrt( const extFloat80_t *, extFloat80_t * ); +bool extF80M_eq( const extFloat80_t *, const extFloat80_t * ); +bool extF80M_le( const extFloat80_t *, const extFloat80_t * ); +bool extF80M_lt( const extFloat80_t *, const extFloat80_t * ); +bool extF80M_eq_signaling( const extFloat80_t *, const extFloat80_t * ); +bool extF80M_le_quiet( const extFloat80_t *, const extFloat80_t * ); +bool extF80M_lt_quiet( const extFloat80_t *, const extFloat80_t * ); +bool extF80M_isSignalingNaN( const extFloat80_t * ); + +/*---------------------------------------------------------------------------- +| 128-bit (quadruple-precision) floating-point operations. +*----------------------------------------------------------------------------*/ +#ifdef SOFTFLOAT_FAST_INT64 +uint_fast32_t f128_to_ui32( float128_t, uint_fast8_t, bool ); +uint_fast64_t f128_to_ui64( float128_t, uint_fast8_t, bool ); +int_fast32_t f128_to_i32( float128_t, uint_fast8_t, bool ); +int_fast64_t f128_to_i64( float128_t, uint_fast8_t, bool ); +uint_fast32_t f128_to_ui32_r_minMag( float128_t, bool ); +uint_fast64_t f128_to_ui64_r_minMag( float128_t, bool ); +int_fast32_t f128_to_i32_r_minMag( float128_t, bool ); +int_fast64_t f128_to_i64_r_minMag( float128_t, bool ); +float16_t f128_to_f16( float128_t ); +float32_t f128_to_f32( float128_t ); +float64_t f128_to_f64( float128_t ); +extFloat80_t f128_to_extF80( float128_t ); +float128_t f128_roundToInt( float128_t, uint_fast8_t, bool ); +float128_t f128_add( float128_t, float128_t ); +float128_t f128_sub( float128_t, float128_t ); +float128_t f128_mul( float128_t, float128_t ); +float128_t f128_mulAdd( float128_t, float128_t, float128_t ); +float128_t f128_div( float128_t, float128_t ); +float128_t f128_rem( float128_t, float128_t ); +float128_t f128_sqrt( float128_t ); +bool f128_eq( float128_t, float128_t ); +bool f128_le( float128_t, float128_t ); +bool f128_lt( float128_t, float128_t ); +bool f128_eq_signaling( float128_t, float128_t ); +bool f128_le_quiet( float128_t, float128_t ); +bool f128_lt_quiet( float128_t, float128_t ); +bool f128_isSignalingNaN( float128_t ); +#endif +uint_fast32_t f128M_to_ui32( const float128_t *, uint_fast8_t, bool ); +uint_fast64_t f128M_to_ui64( const float128_t *, uint_fast8_t, bool ); +int_fast32_t f128M_to_i32( const float128_t *, uint_fast8_t, bool ); +int_fast64_t f128M_to_i64( const float128_t *, uint_fast8_t, bool ); +uint_fast32_t f128M_to_ui32_r_minMag( const float128_t *, bool ); +uint_fast64_t f128M_to_ui64_r_minMag( const float128_t *, bool ); +int_fast32_t f128M_to_i32_r_minMag( const float128_t *, bool ); +int_fast64_t f128M_to_i64_r_minMag( const float128_t *, bool ); +float16_t f128M_to_f16( const float128_t * ); +float32_t f128M_to_f32( const float128_t * ); +float64_t f128M_to_f64( const float128_t * ); +void f128M_to_extF80M( const float128_t *, extFloat80_t * ); +void f128M_roundToInt( const float128_t *, uint_fast8_t, bool, float128_t * ); +void f128M_add( const float128_t *, const float128_t *, float128_t * ); +void f128M_sub( const float128_t *, const float128_t *, float128_t * ); +void f128M_mul( const float128_t *, const float128_t *, float128_t * ); +void + f128M_mulAdd( + const float128_t *, const float128_t *, const float128_t *, float128_t * + ); +void f128M_div( const float128_t *, const float128_t *, float128_t * ); +void f128M_rem( const float128_t *, const float128_t *, float128_t * ); +void f128M_sqrt( const float128_t *, float128_t * ); +bool f128M_eq( const float128_t *, const float128_t * ); +bool f128M_le( const float128_t *, const float128_t * ); +bool f128M_lt( const float128_t *, const float128_t * ); +bool f128M_eq_signaling( const float128_t *, const float128_t * ); +bool f128M_le_quiet( const float128_t *, const float128_t * ); +bool f128M_lt_quiet( const float128_t *, const float128_t * ); +bool f128M_isSignalingNaN( const float128_t * ); + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/softfloat_types.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/softfloat_types.h new file mode 100644 index 000000000..b92d24625 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/include/softfloat_types.h @@ -0,0 +1,81 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef softfloat_types_h +#define softfloat_types_h 1 + +#include <stdint.h> + +/*---------------------------------------------------------------------------- +| Types used to pass 16-bit, 32-bit, 64-bit, and 128-bit floating-point +| arguments and results to/from functions. These types must be exactly +| 16 bits, 32 bits, 64 bits, and 128 bits in size, respectively. Where a +| platform has "native" support for IEEE-Standard floating-point formats, +| the types below may, if desired, be defined as aliases for the native types +| (typically 'float' and 'double', and possibly 'long double'). +*----------------------------------------------------------------------------*/ +typedef struct { uint16_t v; } float16_t; +typedef struct { uint32_t v; } float32_t; +typedef struct { uint64_t v; } float64_t; +typedef struct { uint64_t v[2]; } float128_t; + +/*---------------------------------------------------------------------------- +| The format of an 80-bit extended floating-point number in memory. This +| structure must contain a 16-bit field named 'signExp' and a 64-bit field +| named 'signif'. +*----------------------------------------------------------------------------*/ +#ifdef LITTLEENDIAN +struct extFloat80M { uint64_t signif; uint16_t signExp; }; +#else +struct extFloat80M { uint16_t signExp; uint64_t signif; }; +#endif + +/*---------------------------------------------------------------------------- +| The type used to pass 80-bit extended floating-point arguments and +| results to/from functions. This type must have size identical to +| 'struct extFloat80M'. Type 'extFloat80_t' can be defined as an alias for +| 'struct extFloat80M'. Alternatively, if a platform has "native" support +| for IEEE-Standard 80-bit extended floating-point, it may be possible, +| if desired, to define 'extFloat80_t' as an alias for the native type +| (presumably either 'long double' or a nonstandard compiler-intrinsic type). +| In that case, the 'signif' and 'signExp' fields of 'struct extFloat80M' +| must align exactly with the locations in memory of the sign, exponent, and +| significand of the native type. +*----------------------------------------------------------------------------*/ +typedef struct extFloat80M extFloat80_t; + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_add128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_add128.c new file mode 100644 index 000000000..984664360 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_add128.c @@ -0,0 +1,55 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_add128 + +struct uint128 + softfloat_add128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) +{ + struct uint128 z; + + z.v0 = a0 + b0; + z.v64 = a64 + b64 + (z.v0 < a0); + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_add256M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_add256M.c new file mode 100644 index 000000000..bfecf7b2e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_add256M.c @@ -0,0 +1,65 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_add256M + +void + softfloat_add256M( + const uint64_t *aPtr, const uint64_t *bPtr, uint64_t *zPtr ) +{ + unsigned int index; + uint_fast8_t carry; + uint64_t wordA, wordZ; + + index = indexWordLo( 4 ); + carry = 0; + for (;;) { + wordA = aPtr[index]; + wordZ = wordA + bPtr[index] + carry; + zPtr[index] = wordZ; + if ( index == indexWordHi( 4 ) ) break; + if ( wordZ != wordA ) carry = (wordZ < wordA); + index += wordIncr; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addCarryM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addCarryM.c new file mode 100644 index 000000000..fb84a383c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addCarryM.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_addCarryM + +uint_fast8_t + softfloat_addCarryM( + uint_fast8_t size_words, + const uint32_t *aPtr, + const uint32_t *bPtr, + uint_fast8_t carry, + uint32_t *zPtr + ) +{ + unsigned int index, lastIndex; + uint32_t wordA, wordZ; + + index = indexWordLo( size_words ); + lastIndex = indexWordHi( size_words ); + for (;;) { + wordA = aPtr[index]; + wordZ = wordA + bPtr[index] + carry; + zPtr[index] = wordZ; + if ( wordZ != wordA ) carry = (wordZ < wordA); + if ( index == lastIndex ) break; + index += wordIncr; + } + return carry; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addComplCarryM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addComplCarryM.c new file mode 100644 index 000000000..1f8d543e2 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addComplCarryM.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_addComplCarryM + +uint_fast8_t + softfloat_addComplCarryM( + uint_fast8_t size_words, + const uint32_t *aPtr, + const uint32_t *bPtr, + uint_fast8_t carry, + uint32_t *zPtr + ) +{ + unsigned int index, lastIndex; + uint32_t wordA, wordZ; + + index = indexWordLo( size_words ); + lastIndex = indexWordHi( size_words ); + for (;;) { + wordA = aPtr[index]; + wordZ = wordA + ~bPtr[index] + carry; + zPtr[index] = wordZ; + if ( wordZ != wordA ) carry = (wordZ < wordA); + if ( index == lastIndex ) break; + index += wordIncr; + } + return carry; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addExtF80M.c new file mode 100644 index 000000000..f0142905f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addExtF80M.c @@ -0,0 +1,186 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +void + softfloat_addExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr, + bool negateB + ) +{ + uint32_t uiA64; + int32_t expA; + uint32_t uiB64; + int32_t expB; + uint32_t uiZ64; + bool signZ, signB; + const struct extFloat80M *tempSPtr; + uint64_t sigZ, sigB; + void + (*roundPackRoutinePtr)( + bool, int32_t, uint32_t *, uint_fast8_t, struct extFloat80M * ); + int32_t expDiff; + uint32_t extSigX[3], sigZExtra; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + expA = expExtF80UI64( uiA64 ); + uiB64 = bSPtr->signExp; + expB = expExtF80UI64( uiB64 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) { + if ( softfloat_tryPropagateNaNExtF80M( aSPtr, bSPtr, zSPtr ) ) return; + uiZ64 = uiA64; + if ( expB == 0x7FFF ) { + uiZ64 = uiB64 ^ packToExtF80UI64( negateB, 0 ); + if ( (expA == 0x7FFF) && (uiZ64 != uiA64) ) { + softfloat_invalidExtF80M( zSPtr ); + return; + } + } + zSPtr->signExp = uiZ64; + zSPtr->signif = UINT64_C( 0x8000000000000000 ); + return; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signZ = signExtF80UI64( uiA64 ); + signB = signExtF80UI64( uiB64 ) ^ negateB; + negateB = (signZ != signB); + if ( expA < expB ) { + signZ = signB; + expA = expB; + expB = expExtF80UI64( uiA64 ); + tempSPtr = aSPtr; + aSPtr = bSPtr; + bSPtr = tempSPtr; + } + if ( ! expB ) { + expB = 1; + if ( ! expA ) expA = 1; + } + sigZ = aSPtr->signif; + sigB = bSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundPackRoutinePtr = softfloat_roundPackMToExtF80M; + expDiff = expA - expB; + if ( expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + extSigX[indexWord( 3, 2 )] = sigB>>32; + extSigX[indexWord( 3, 1 )] = sigB; + extSigX[indexWord( 3, 0 )] = 0; + softfloat_shiftRightJam96M( extSigX, expDiff, extSigX ); + sigB = + (uint64_t) extSigX[indexWord( 3, 2 )]<<32 + | extSigX[indexWord( 3, 1 )]; + if ( negateB ) { + sigZ -= sigB; + sigZExtra = extSigX[indexWordLo( 3 )]; + if ( sigZExtra ) { + --sigZ; + sigZExtra = -sigZExtra; + } + if ( ! (sigZ & UINT64_C( 0x8000000000000000 )) ) { + if ( sigZ & UINT64_C( 0x4000000000000000 ) ) { + --expA; + sigZ = sigZ<<1 | sigZExtra>>31; + sigZExtra <<= 1; + } else { + roundPackRoutinePtr = softfloat_normRoundPackMToExtF80M; + } + } + } else { + sigZ += sigB; + if ( sigZ & UINT64_C( 0x8000000000000000 ) ) goto sigZ; + sigZExtra = (uint32_t) sigZ<<31 | (extSigX[indexWordLo( 3 )] != 0); + goto completeNormAfterAdd; + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sigZExtra = 0; + if ( negateB ) { + if ( sigZ < sigB ) { + signZ = ! signZ; + sigZ = sigB - sigZ; + } else { + sigZ -= sigB; + if ( ! sigZ ) { + signZ = (softfloat_roundingMode == softfloat_round_min); + zSPtr->signExp = packToExtF80UI64( signZ, 0 ); + zSPtr->signif = 0; + return; + } + } + roundPackRoutinePtr = softfloat_normRoundPackMToExtF80M; + } else { + sigZ += sigB; + if ( sigZ < sigB ) { + sigZExtra = (uint32_t) sigZ<<31; + completeNormAfterAdd: + ++expA; + sigZ = UINT64_C( 0x8000000000000000 ) | sigZ>>1; + } else { + if ( ! (sigZ & UINT64_C( 0x8000000000000000 )) ) { + roundPackRoutinePtr = softfloat_normRoundPackMToExtF80M; + } + } + } + } + extSigX[indexWord( 3, 0 )] = sigZExtra; + sigZ: + extSigX[indexWord( 3, 2 )] = sigZ>>32; + extSigX[indexWord( 3, 1 )] = sigZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundPack: + (*roundPackRoutinePtr)( + signZ, expA, extSigX, extF80_roundingPrecision, zSPtr ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addF128M.c new file mode 100644 index 000000000..c5fcf7047 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addF128M.c @@ -0,0 +1,211 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +void + softfloat_addF128M( + const uint32_t *aWPtr, + const uint32_t *bWPtr, + uint32_t *zWPtr, + bool negateB + ) +{ + uint32_t uiA96; + int32_t expA; + uint32_t uiB96; + int32_t expB; + uint32_t uiZ96; + bool signZ, signB; + const uint32_t *tempPtr; + uint32_t sig96A, sig96B; + int32_t expDiff; + uint_fast8_t + (*addCarryMRoutinePtr)( + uint_fast8_t, + const uint32_t *, + const uint32_t *, + uint_fast8_t, + uint32_t * + ); + uint32_t extSigZ[5], wordSigZ; + uint_fast8_t carry; + void (*roundPackRoutinePtr)( bool, int32_t, uint32_t *, uint32_t * ); + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA96 = aWPtr[indexWordHi( 4 )]; + expA = expF128UI96( uiA96 ); + uiB96 = bWPtr[indexWordHi( 4 )]; + expB = expF128UI96( uiB96 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) { + if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) return; + uiZ96 = uiA96; + if ( expB == 0x7FFF ) { + uiZ96 = uiB96 ^ packToF128UI96( negateB, 0, 0 ); + if ( (expA == 0x7FFF) && (uiZ96 != uiA96) ) { + softfloat_invalidF128M( zWPtr ); + return; + } + } + zWPtr[indexWordHi( 4 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = 0; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + return; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signZ = signF128UI96( uiA96 ); + signB = signF128UI96( uiB96 ) ^ negateB; + negateB = (signZ != signB); + if ( (uint32_t) (uiA96<<1) < (uint32_t) (uiB96<<1) ) { + signZ = signB; + expA = expB; + expB = expF128UI96( uiA96 ); + tempPtr = aWPtr; + aWPtr = bWPtr; + bWPtr = tempPtr; + uiA96 = uiB96; + uiB96 = bWPtr[indexWordHi( 4 )]; + } + sig96A = fracF128UI96( uiA96 ); + sig96B = fracF128UI96( uiB96 ); + if ( expA ) { + --expA; + sig96A |= 0x00010000; + if ( expB ) { + --expB; + sig96B |= 0x00010000; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + addCarryMRoutinePtr = + negateB ? softfloat_addComplCarryM : softfloat_addCarryM; + expDiff = expA - expB; + if ( expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + extSigZ[indexWordHi( 5 )] = sig96B; + extSigZ[indexWord( 5, 3 )] = bWPtr[indexWord( 4, 2 )]; + extSigZ[indexWord( 5, 2 )] = bWPtr[indexWord( 4, 1 )]; + extSigZ[indexWord( 5, 1 )] = bWPtr[indexWord( 4, 0 )]; + extSigZ[indexWord( 5, 0 )] = 0; + softfloat_shiftRightJam160M( extSigZ, expDiff, extSigZ ); + sig96B = extSigZ[indexWordHi( 5 )]; + carry = 0; + if ( negateB ) { + sig96B = ~sig96B; + wordSigZ = extSigZ[indexWordLo( 5 )]; + extSigZ[indexWordLo( 5 )] = -wordSigZ; + carry = ! wordSigZ; + } + carry = + (*addCarryMRoutinePtr)( + 3, + &aWPtr[indexMultiwordLo( 4, 3 )], + &extSigZ[indexMultiword( 5, 3, 1 )], + carry, + &extSigZ[indexMultiword( 5, 3, 1 )] + ); + wordSigZ = sig96A + sig96B + carry; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + extSigZ[indexWordLo( 5 )] = 0; + carry = + (*addCarryMRoutinePtr)( + 3, + &aWPtr[indexMultiwordLo( 4, 3 )], + &bWPtr[indexMultiwordLo( 4, 3 )], + negateB, + &extSigZ[indexMultiword( 5, 3, 1 )] + ); + if ( negateB ) { + wordSigZ = sig96A + ~sig96B + carry; + if ( wordSigZ & 0x80000000 ) { + signZ = ! signZ; + carry = + softfloat_addComplCarry96M( + &bWPtr[indexMultiwordLo( 4, 3 )], + &aWPtr[indexMultiwordLo( 4, 3 )], + 1, + &extSigZ[indexMultiword( 5, 3, 1 )] + ); + wordSigZ = sig96B + ~sig96A + carry; + } else { + if ( + ! wordSigZ && ! extSigZ[indexWord( 5, 3 )] + && ! ( extSigZ[indexWord( 5, 2 )] + | extSigZ[indexWord( 5, 1 )] + | extSigZ[indexWord( 5, 0 )] + ) + ) { + signZ = (softfloat_roundingMode == softfloat_round_min); + zWPtr[indexWordHi( 4 )] = packToF128UI96( signZ, 0, 0 ); + zWPtr[indexWord( 4, 2 )] = 0; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + return; + } + } + } else { + wordSigZ = sig96A + sig96B + carry; + } + } + extSigZ[indexWordHi( 5 )] = wordSigZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundPackRoutinePtr = softfloat_normRoundPackMToF128M; + if ( 0x00010000 <= wordSigZ ) { + if ( 0x00020000 <= wordSigZ ) { + ++expA; + softfloat_shortShiftRightJam160M( extSigZ, 1, extSigZ ); + } + roundPackRoutinePtr = softfloat_roundPackMToF128M; + } + (*roundPackRoutinePtr)( signZ, expA, extSigZ, zWPtr ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addM.c new file mode 100644 index 000000000..e1cc66bf0 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addM.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_addM + +void + softfloat_addM( + uint_fast8_t size_words, + const uint32_t *aPtr, + const uint32_t *bPtr, + uint32_t *zPtr + ) +{ + unsigned int index, lastIndex; + uint_fast8_t carry; + uint32_t wordA, wordZ; + + index = indexWordLo( size_words ); + lastIndex = indexWordHi( size_words ); + carry = 0; + for (;;) { + wordA = aPtr[index]; + wordZ = wordA + bPtr[index] + carry; + zPtr[index] = wordZ; + if ( index == lastIndex ) break; + if ( wordZ != wordA ) carry = (wordZ < wordA); + index += wordIncr; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsExtF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsExtF80.c new file mode 100644 index 000000000..6e7d1a6ff --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsExtF80.c @@ -0,0 +1,156 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extFloat80_t + softfloat_addMagsExtF80( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0, + bool signZ + ) +{ + int_fast32_t expA; + uint_fast64_t sigA; + int_fast32_t expB; + uint_fast64_t sigB; + int_fast32_t expDiff; + uint_fast16_t uiZ64; + uint_fast64_t uiZ0, sigZ, sigZExtra; + struct exp32_sig64 normExpSig; + int_fast32_t expZ; + struct uint64_extra sig64Extra; + struct uint128 uiZ; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expExtF80UI64( uiA64 ); + sigA = uiA0; + expB = expExtF80UI64( uiB64 ); + sigB = uiB0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( ! expDiff ) { + if ( expA == 0x7FFF ) { + if ( (sigA | sigB) & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + goto propagateNaN; + } + uiZ64 = uiA64; + uiZ0 = uiA0; + goto uiZ; + } + sigZ = sigA + sigB; + sigZExtra = 0; + if ( ! expA ) { + normExpSig = softfloat_normSubnormalExtF80Sig( sigZ ); + expZ = normExpSig.exp + 1; + sigZ = normExpSig.sig; + goto roundAndPack; + } + expZ = expA; + goto shiftRight1; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expDiff < 0 ) { + if ( expB == 0x7FFF ) { + if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN; + uiZ64 = packToExtF80UI64( signZ, 0x7FFF ); + uiZ0 = uiB0; + goto uiZ; + } + expZ = expB; + if ( ! expA ) { + ++expDiff; + sigZExtra = 0; + if ( ! expDiff ) goto newlyAligned; + } + sig64Extra = softfloat_shiftRightJam64Extra( sigA, 0, -expDiff ); + sigA = sig64Extra.v; + sigZExtra = sig64Extra.extra; + } else { + if ( expA == 0x7FFF ) { + if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN; + uiZ64 = uiA64; + uiZ0 = uiA0; + goto uiZ; + } + expZ = expA; + if ( ! expB ) { + --expDiff; + sigZExtra = 0; + if ( ! expDiff ) goto newlyAligned; + } + sig64Extra = softfloat_shiftRightJam64Extra( sigB, 0, expDiff ); + sigB = sig64Extra.v; + sigZExtra = sig64Extra.extra; + } + newlyAligned: + sigZ = sigA + sigB; + if ( sigZ & UINT64_C( 0x8000000000000000 ) ) goto roundAndPack; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftRight1: + sig64Extra = softfloat_shortShiftRightJam64Extra( sigZ, sigZExtra, 1 ); + sigZ = sig64Extra.v | UINT64_C( 0x8000000000000000 ); + sigZExtra = sig64Extra.extra; + ++expZ; + roundAndPack: + return + softfloat_roundPackToExtF80( + signZ, expZ, sigZ, sigZExtra, extF80_roundingPrecision ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 ); + uiZ64 = uiZ.v64; + uiZ0 = uiZ.v0; + uiZ: + uZ.s.signExp = uiZ64; + uZ.s.signif = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF128.c new file mode 100644 index 000000000..da8e88824 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF128.c @@ -0,0 +1,154 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" + +float128_t + softfloat_addMagsF128( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0, + bool signZ + ) +{ + int_fast32_t expA; + struct uint128 sigA; + int_fast32_t expB; + struct uint128 sigB; + int_fast32_t expDiff; + struct uint128 uiZ, sigZ; + int_fast32_t expZ; + uint_fast64_t sigZExtra; + struct uint128_extra sig128Extra; + union ui128_f128 uZ; + + expA = expF128UI64( uiA64 ); + sigA.v64 = fracF128UI64( uiA64 ); + sigA.v0 = uiA0; + expB = expF128UI64( uiB64 ); + sigB.v64 = fracF128UI64( uiB64 ); + sigB.v0 = uiB0; + expDiff = expA - expB; + if ( ! expDiff ) { + if ( expA == 0x7FFF ) { + if ( sigA.v64 | sigA.v0 | sigB.v64 | sigB.v0 ) goto propagateNaN; + uiZ.v64 = uiA64; + uiZ.v0 = uiA0; + goto uiZ; + } + sigZ = softfloat_add128( sigA.v64, sigA.v0, sigB.v64, sigB.v0 ); + if ( ! expA ) { + uiZ.v64 = packToF128UI64( signZ, 0, sigZ.v64 ); + uiZ.v0 = sigZ.v0; + goto uiZ; + } + expZ = expA; + sigZ.v64 |= UINT64_C( 0x0002000000000000 ); + sigZExtra = 0; + goto shiftRight1; + } + if ( expDiff < 0 ) { + if ( expB == 0x7FFF ) { + if ( sigB.v64 | sigB.v0 ) goto propagateNaN; + uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 ); + uiZ.v0 = 0; + goto uiZ; + } + expZ = expB; + if ( expA ) { + sigA.v64 |= UINT64_C( 0x0001000000000000 ); + } else { + ++expDiff; + sigZExtra = 0; + if ( ! expDiff ) goto newlyAligned; + } + sig128Extra = + softfloat_shiftRightJam128Extra( sigA.v64, sigA.v0, 0, -expDiff ); + sigA = sig128Extra.v; + sigZExtra = sig128Extra.extra; + } else { + if ( expA == 0x7FFF ) { + if ( sigA.v64 | sigA.v0 ) goto propagateNaN; + uiZ.v64 = uiA64; + uiZ.v0 = uiA0; + goto uiZ; + } + expZ = expA; + if ( expB ) { + sigB.v64 |= UINT64_C( 0x0001000000000000 ); + } else { + --expDiff; + sigZExtra = 0; + if ( ! expDiff ) goto newlyAligned; + } + sig128Extra = + softfloat_shiftRightJam128Extra( sigB.v64, sigB.v0, 0, expDiff ); + sigB = sig128Extra.v; + sigZExtra = sig128Extra.extra; + } + newlyAligned: + sigZ = + softfloat_add128( + sigA.v64 | UINT64_C( 0x0001000000000000 ), + sigA.v0, + sigB.v64, + sigB.v0 + ); + --expZ; + if ( sigZ.v64 < UINT64_C( 0x0002000000000000 ) ) goto roundAndPack; + ++expZ; + shiftRight1: + sig128Extra = + softfloat_shortShiftRightJam128Extra( + sigZ.v64, sigZ.v0, sigZExtra, 1 ); + sigZ = sig128Extra.v; + sigZExtra = sig128Extra.extra; + roundAndPack: + return + softfloat_roundPackToF128( signZ, expZ, sigZ.v64, sigZ.v0, sigZExtra ); + propagateNaN: + uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF16.c new file mode 100644 index 000000000..abc42b8ae --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF16.c @@ -0,0 +1,183 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t softfloat_addMagsF16( uint_fast16_t uiA, uint_fast16_t uiB ) +{ + int_fast8_t expA; + uint_fast16_t sigA; + int_fast8_t expB; + uint_fast16_t sigB; + int_fast8_t expDiff; + uint_fast16_t uiZ; + bool signZ; + int_fast8_t expZ; + uint_fast16_t sigZ; + uint_fast16_t sigX, sigY; + int_fast8_t shiftDist; + uint_fast32_t sig32Z; + int_fast8_t roundingMode; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expF16UI( uiA ); + sigA = fracF16UI( uiA ); + expB = expF16UI( uiB ); + sigB = fracF16UI( uiB ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( ! expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( ! expA ) { + uiZ = uiA + sigB; + goto uiZ; + } + if ( expA == 0x1F ) { + if ( sigA | sigB ) goto propagateNaN; + uiZ = uiA; + goto uiZ; + } + signZ = signF16UI( uiA ); + expZ = expA; + sigZ = 0x0800 + sigA + sigB; + if ( ! (sigZ & 1) && (expZ < 0x1E) ) { + sigZ >>= 1; + goto pack; + } + sigZ <<= 3; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + signZ = signF16UI( uiA ); + if ( expDiff < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN; + uiZ = packToF16UI( signZ, 0x1F, 0 ); + goto uiZ; + } + if ( expDiff <= -13 ) { + uiZ = packToF16UI( signZ, expB, sigB ); + if ( expA | sigA ) goto addEpsilon; + goto uiZ; + } + expZ = expB; + sigX = sigB | 0x0400; + sigY = sigA + (expA ? 0x0400 : sigA); + shiftDist = 19 + expDiff; + } else { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + uiZ = uiA; + if ( expA == 0x1F ) { + if ( sigA ) goto propagateNaN; + goto uiZ; + } + if ( 13 <= expDiff ) { + if ( expB | sigB ) goto addEpsilon; + goto uiZ; + } + expZ = expA; + sigX = sigA | 0x0400; + sigY = sigB + (expB ? 0x0400 : sigB); + shiftDist = 19 - expDiff; + } + sig32Z = + ((uint_fast32_t) sigX<<19) + ((uint_fast32_t) sigY<<shiftDist); + if ( sig32Z < 0x40000000 ) { + --expZ; + sig32Z <<= 1; + } + sigZ = sig32Z>>16; + if ( sig32Z & 0xFFFF ) { + sigZ |= 1; + } else { + if ( ! (sigZ & 0xF) && (expZ < 0x1E) ) { + sigZ >>= 4; + goto pack; + } + } + } + return softfloat_roundPackToF16( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF16UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + addEpsilon: + roundingMode = softfloat_roundingMode; + if ( roundingMode != softfloat_round_near_even ) { + if ( + roundingMode + == (signF16UI( uiZ ) ? softfloat_round_min + : softfloat_round_max) + ) { + ++uiZ; + if ( (uint16_t) (uiZ<<1) == 0xF800 ) { + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + } + } +#ifdef SOFTFLOAT_ROUND_ODD + else if ( roundingMode == softfloat_round_odd ) { + uiZ |= 1; + } +#endif + } + softfloat_exceptionFlags |= softfloat_flag_inexact; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + pack: + uiZ = packToF16UI( signZ, expZ, sigZ ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF32.c new file mode 100644 index 000000000..ed85bb00b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF32.c @@ -0,0 +1,126 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" + +float32_t softfloat_addMagsF32( uint_fast32_t uiA, uint_fast32_t uiB ) +{ + int_fast16_t expA; + uint_fast32_t sigA; + int_fast16_t expB; + uint_fast32_t sigB; + int_fast16_t expDiff; + uint_fast32_t uiZ; + bool signZ; + int_fast16_t expZ; + uint_fast32_t sigZ; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expF32UI( uiA ); + sigA = fracF32UI( uiA ); + expB = expF32UI( uiB ); + sigB = fracF32UI( uiB ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( ! expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( ! expA ) { + uiZ = uiA + sigB; + goto uiZ; + } + if ( expA == 0xFF ) { + if ( sigA | sigB ) goto propagateNaN; + uiZ = uiA; + goto uiZ; + } + signZ = signF32UI( uiA ); + expZ = expA; + sigZ = 0x01000000 + sigA + sigB; + if ( ! (sigZ & 1) && (expZ < 0xFE) ) { + uiZ = packToF32UI( signZ, expZ, sigZ>>1 ); + goto uiZ; + } + sigZ <<= 6; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + signZ = signF32UI( uiA ); + sigA <<= 6; + sigB <<= 6; + if ( expDiff < 0 ) { + if ( expB == 0xFF ) { + if ( sigB ) goto propagateNaN; + uiZ = packToF32UI( signZ, 0xFF, 0 ); + goto uiZ; + } + expZ = expB; + sigA += expA ? 0x20000000 : sigA; + sigA = softfloat_shiftRightJam32( sigA, -expDiff ); + } else { + if ( expA == 0xFF ) { + if ( sigA ) goto propagateNaN; + uiZ = uiA; + goto uiZ; + } + expZ = expA; + sigB += expB ? 0x20000000 : sigB; + sigB = softfloat_shiftRightJam32( sigB, expDiff ); + } + sigZ = 0x20000000 + sigA + sigB; + if ( sigZ < 0x40000000 ) { + --expZ; + sigZ <<= 1; + } + } + return softfloat_roundPackToF32( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF32UI( uiA, uiB ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF64.c new file mode 100644 index 000000000..25b8f386e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_addMagsF64.c @@ -0,0 +1,128 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" + +float64_t + softfloat_addMagsF64( uint_fast64_t uiA, uint_fast64_t uiB, bool signZ ) +{ + int_fast16_t expA; + uint_fast64_t sigA; + int_fast16_t expB; + uint_fast64_t sigB; + int_fast16_t expDiff; + uint_fast64_t uiZ; + int_fast16_t expZ; + uint_fast64_t sigZ; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expF64UI( uiA ); + sigA = fracF64UI( uiA ); + expB = expF64UI( uiB ); + sigB = fracF64UI( uiB ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( ! expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( ! expA ) { + uiZ = uiA + sigB; + goto uiZ; + } + if ( expA == 0x7FF ) { + if ( sigA | sigB ) goto propagateNaN; + uiZ = uiA; + goto uiZ; + } + expZ = expA; + sigZ = UINT64_C( 0x0020000000000000 ) + sigA + sigB; + sigZ <<= 9; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sigA <<= 9; + sigB <<= 9; + if ( expDiff < 0 ) { + if ( expB == 0x7FF ) { + if ( sigB ) goto propagateNaN; + uiZ = packToF64UI( signZ, 0x7FF, 0 ); + goto uiZ; + } + expZ = expB; + if ( expA ) { + sigA += UINT64_C( 0x2000000000000000 ); + } else { + sigA <<= 1; + } + sigA = softfloat_shiftRightJam64( sigA, -expDiff ); + } else { + if ( expA == 0x7FF ) { + if ( sigA ) goto propagateNaN; + uiZ = uiA; + goto uiZ; + } + expZ = expA; + if ( expB ) { + sigB += UINT64_C( 0x2000000000000000 ); + } else { + sigB <<= 1; + } + sigB = softfloat_shiftRightJam64( sigB, expDiff ); + } + sigZ = UINT64_C( 0x2000000000000000 ) + sigA + sigB; + if ( sigZ < UINT64_C( 0x4000000000000000 ) ) { + --expZ; + sigZ <<= 1; + } + } + return softfloat_roundPackToF64( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF64UI( uiA, uiB ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecip32_1.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecip32_1.c new file mode 100644 index 000000000..f4fdbfe5b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecip32_1.c @@ -0,0 +1,66 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_approxRecip32_1 + +extern const uint16_t softfloat_approxRecip_1k0s[16]; +extern const uint16_t softfloat_approxRecip_1k1s[16]; + +uint32_t softfloat_approxRecip32_1( uint32_t a ) +{ + int index; + uint16_t eps, r0; + uint32_t sigma0; + uint_fast32_t r; + uint32_t sqrSigma0; + + index = a>>27 & 0xF; + eps = (uint16_t) (a>>11); + r0 = softfloat_approxRecip_1k0s[index] + - ((softfloat_approxRecip_1k1s[index] * (uint_fast32_t) eps)>>20); + sigma0 = ~(uint_fast32_t) ((r0 * (uint_fast64_t) a)>>7); + r = ((uint_fast32_t) r0<<16) + ((r0 * (uint_fast64_t) sigma0)>>24); + sqrSigma0 = ((uint_fast64_t) sigma0 * sigma0)>>32; + r += ((uint32_t) r * (uint_fast64_t) sqrSigma0)>>48; + return r; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecipSqrt32_1.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecipSqrt32_1.c new file mode 100644 index 000000000..28eca6495 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecipSqrt32_1.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_approxRecipSqrt32_1 + +extern const uint16_t softfloat_approxRecipSqrt_1k0s[]; +extern const uint16_t softfloat_approxRecipSqrt_1k1s[]; + +uint32_t softfloat_approxRecipSqrt32_1( unsigned int oddExpA, uint32_t a ) +{ + int index; + uint16_t eps, r0; + uint_fast32_t ESqrR0; + uint32_t sigma0; + uint_fast32_t r; + uint32_t sqrSigma0; + + index = (a>>27 & 0xE) + oddExpA; + eps = (uint16_t) (a>>12); + r0 = softfloat_approxRecipSqrt_1k0s[index] + - ((softfloat_approxRecipSqrt_1k1s[index] * (uint_fast32_t) eps) + >>20); + ESqrR0 = (uint_fast32_t) r0 * r0; + if ( ! oddExpA ) ESqrR0 <<= 1; + sigma0 = ~(uint_fast32_t) (((uint32_t) ESqrR0 * (uint_fast64_t) a)>>23); + r = ((uint_fast32_t) r0<<16) + ((r0 * (uint_fast64_t) sigma0)>>25); + sqrSigma0 = ((uint_fast64_t) sigma0 * sigma0)>>32; + r += ((uint32_t) ((r>>1) + (r>>3) - ((uint_fast32_t) r0<<14)) + * (uint_fast64_t) sqrSigma0) + >>48; + if ( ! (r & 0x80000000) ) r = 0x80000000; + return r; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecipSqrt_1Ks.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecipSqrt_1Ks.c new file mode 100644 index 000000000..7a8663b51 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecipSqrt_1Ks.c @@ -0,0 +1,49 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" + +const uint16_t softfloat_approxRecipSqrt_1k0s[16] = { + 0xB4C9, 0xFFAB, 0xAA7D, 0xF11C, 0xA1C5, 0xE4C7, 0x9A43, 0xDA29, + 0x93B5, 0xD0E5, 0x8DED, 0xC8B7, 0x88C6, 0xC16D, 0x8424, 0xBAE1 +}; +const uint16_t softfloat_approxRecipSqrt_1k1s[16] = { + 0xA5A5, 0xEA42, 0x8C21, 0xC62D, 0x788F, 0xAA7F, 0x6928, 0x94B6, + 0x5CC7, 0x8335, 0x52A6, 0x74E2, 0x4A3E, 0x68FE, 0x432B, 0x5EFD +}; + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecip_1Ks.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecip_1Ks.c new file mode 100644 index 000000000..54b1b0fab --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_approxRecip_1Ks.c @@ -0,0 +1,49 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" + +const uint16_t softfloat_approxRecip_1k0s[16] = { + 0xFFC4, 0xF0BE, 0xE363, 0xD76F, 0xCCAD, 0xC2F0, 0xBA16, 0xB201, + 0xAA97, 0xA3C6, 0x9D7A, 0x97A6, 0x923C, 0x8D32, 0x887E, 0x8417 +}; +const uint16_t softfloat_approxRecip_1k1s[16] = { + 0xF0F1, 0xD62C, 0xBFA1, 0xAC77, 0x9C0A, 0x8DDB, 0x8185, 0x76BA, + 0x6D3B, 0x64D4, 0x5D5C, 0x56B1, 0x50B6, 0x4B55, 0x4679, 0x4211 +}; + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_compare128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_compare128M.c new file mode 100644 index 000000000..8f1218209 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_compare128M.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_compare128M + +int_fast8_t softfloat_compare128M( const uint32_t *aPtr, const uint32_t *bPtr ) +{ + unsigned int index, lastIndex; + uint32_t wordA, wordB; + + index = indexWordHi( 4 ); + lastIndex = indexWordLo( 4 ); + for (;;) { + wordA = aPtr[index]; + wordB = bPtr[index]; + if ( wordA != wordB ) return (wordA < wordB) ? -1 : 1; + if ( index == lastIndex ) break; + index -= wordIncr; + } + return 0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_compare96M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_compare96M.c new file mode 100644 index 000000000..8fdf71861 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_compare96M.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_compare96M + +int_fast8_t softfloat_compare96M( const uint32_t *aPtr, const uint32_t *bPtr ) +{ + unsigned int index, lastIndex; + uint32_t wordA, wordB; + + index = indexWordHi( 3 ); + lastIndex = indexWordLo( 3 ); + for (;;) { + wordA = aPtr[index]; + wordB = bPtr[index]; + if ( wordA != wordB ) return (wordA < wordB) ? -1 : 1; + if ( index == lastIndex ) break; + index -= wordIncr; + } + return 0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_compareNonnormExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_compareNonnormExtF80M.c new file mode 100644 index 000000000..6712e5764 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_compareNonnormExtF80M.c @@ -0,0 +1,111 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat_types.h" + +int + softfloat_compareNonnormExtF80M( + const struct extFloat80M *aSPtr, const struct extFloat80M *bSPtr ) +{ + uint_fast16_t uiA64, uiB64; + uint64_t sigA; + bool signB; + uint64_t sigB; + int32_t expA, expB; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA64 = aSPtr->signExp; + uiB64 = bSPtr->signExp; + sigA = aSPtr->signif; + signB = signExtF80UI64( uiB64 ); + sigB = bSPtr->signif; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( (uiA64 ^ uiB64) & 0x8000 ) { + if ( ! (sigA | sigB) ) return 0; + goto resultFromSignB; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expExtF80UI64( uiA64 ); + expB = expExtF80UI64( uiB64 ); + if ( expA == 0x7FFF ) { + if (expB == 0x7FFF) return 0; + signB = ! signB; + goto resultFromSignB; + } + if ( expB == 0x7FFF ) { + goto resultFromSignB; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) expA = 1; + if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) { + if ( sigA ) { + expA += softfloat_normExtF80SigM( &sigA ); + } else { + expA = -128; + } + } + if ( ! expB ) expB = 1; + if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) { + if ( sigB ) { + expB += softfloat_normExtF80SigM( &sigB ); + } else { + expB = -128; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( signB ) { + if ( expA < expB ) return 1; + if ( (expB < expA) || (sigB < sigA) ) return -1; + } else { + if ( expB < expA ) return 1; + if ( (expA < expB) || (sigA < sigB) ) return -1; + } + return (sigA != sigB); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + resultFromSignB: + return signB ? 1 : -1; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros16.c new file mode 100644 index 000000000..af2831cc9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros16.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_countLeadingZeros16 + +#define softfloat_countLeadingZeros16 softfloat_countLeadingZeros16 +#include "primitives.h" + +uint_fast8_t softfloat_countLeadingZeros16( uint16_t a ) +{ + uint_fast8_t count; + + count = 8; + if ( 0x100 <= a ) { + count = 0; + a >>= 8; + } + count += softfloat_countLeadingZeros8[a]; + return count; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros32.c new file mode 100644 index 000000000..a7c50cd45 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros32.c @@ -0,0 +1,64 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_countLeadingZeros32 + +#define softfloat_countLeadingZeros32 softfloat_countLeadingZeros32 +#include "primitives.h" + +uint_fast8_t softfloat_countLeadingZeros32( uint32_t a ) +{ + uint_fast8_t count; + + count = 0; + if ( a < 0x10000 ) { + count = 16; + a <<= 16; + } + if ( a < 0x1000000 ) { + count += 8; + a <<= 8; + } + count += softfloat_countLeadingZeros8[a>>24]; + return count; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros64.c new file mode 100644 index 000000000..34745b12e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros64.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_countLeadingZeros64 + +#define softfloat_countLeadingZeros64 softfloat_countLeadingZeros64 +#include "primitives.h" + +uint_fast8_t softfloat_countLeadingZeros64( uint64_t a ) +{ + uint_fast8_t count; + uint32_t a32; + + count = 0; + a32 = a>>32; + if ( ! a32 ) { + count = 32; + a32 = a; + } + /*------------------------------------------------------------------------ + | From here, result is current count + count leading zeros of `a32'. + *------------------------------------------------------------------------*/ + if ( a32 < 0x10000 ) { + count += 16; + a32 <<= 16; + } + if ( a32 < 0x1000000 ) { + count += 8; + a32 <<= 8; + } + count += softfloat_countLeadingZeros8[a32>>24]; + return count; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros8.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros8.c new file mode 100644 index 000000000..0cc60a110 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_countLeadingZeros8.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" + +const uint_least8_t softfloat_countLeadingZeros8[256] = { + 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_eq128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_eq128.c new file mode 100644 index 000000000..1ccc24354 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_eq128.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_eq128 + +bool softfloat_eq128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) +{ + + return (a64 == b64) && (a0 == b0); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_invalidExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_invalidExtF80M.c new file mode 100644 index 000000000..d33047867 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_invalidExtF80M.c @@ -0,0 +1,49 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +void softfloat_invalidExtF80M( struct extFloat80M *zSPtr ) +{ + + softfloat_raiseFlags( softfloat_flag_invalid ); + zSPtr->signExp = defaultNaNExtF80UI64; + zSPtr->signif = defaultNaNExtF80UI0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_invalidF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_invalidF128M.c new file mode 100644 index 000000000..ee63cc3b7 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_invalidF128M.c @@ -0,0 +1,53 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitives.h" +#include "specialize.h" +#include "softfloat.h" + +void softfloat_invalidF128M( uint32_t *zWPtr ) +{ + + softfloat_raiseFlags( softfloat_flag_invalid ); + zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96; + zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64; + zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32; + zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_isNaNF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_isNaNF128M.c new file mode 100644 index 000000000..c73e49b44 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_isNaNF128M.c @@ -0,0 +1,57 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "primitives.h" + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +bool softfloat_isNaNF128M( const uint32_t *aWPtr ) +{ + uint32_t uiA96; + + uiA96 = aWPtr[indexWordHi( 4 )]; + if ( (~uiA96 & 0x7FFF0000) != 0 ) return false; + return + ((uiA96 & 0x0000FFFF) != 0) + || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )] + | aWPtr[indexWord( 4, 0 )]) + != 0); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_le128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_le128.c new file mode 100644 index 000000000..da3d62427 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_le128.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_le128 + +bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) +{ + + return (a64 < b64) || ((a64 == b64) && (a0 <= b0)); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_lt128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_lt128.c new file mode 100644 index 000000000..b78199174 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_lt128.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_lt128 + +bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) +{ + + return (a64 < b64) || ((a64 == b64) && (a0 < b0)); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul128By32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul128By32.c new file mode 100644 index 000000000..df32ee730 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul128By32.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_mul128By32 + +struct uint128 softfloat_mul128By32( uint64_t a64, uint64_t a0, uint32_t b ) +{ + struct uint128 z; + uint_fast64_t mid; + uint_fast32_t carry; + + z.v0 = a0 * b; + mid = (uint_fast64_t) (uint32_t) (a0>>32) * b; + carry = (uint32_t) ((uint_fast32_t) (z.v0>>32) - (uint_fast32_t) mid); + z.v64 = a64 * b + (uint_fast32_t) ((mid + carry)>>32); + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul128MTo256M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul128MTo256M.c new file mode 100644 index 000000000..68d272ea1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul128MTo256M.c @@ -0,0 +1,100 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_mul128MTo256M + +void + softfloat_mul128MTo256M( + const uint32_t *aPtr, const uint32_t *bPtr, uint32_t *zPtr ) +{ + uint32_t *lastZPtr, wordB; + uint64_t dwordProd; + uint32_t wordZ; + uint_fast8_t carry; + + bPtr += indexWordLo( 4 ); + lastZPtr = zPtr + indexMultiwordHi( 8, 5 ); + zPtr += indexMultiwordLo( 8, 5 ); + wordB = *bPtr; + dwordProd = (uint64_t) aPtr[indexWord( 4, 0 )] * wordB; + zPtr[indexWord( 5, 0 )] = dwordProd; + dwordProd = (uint64_t) aPtr[indexWord( 4, 1 )] * wordB + (dwordProd>>32); + zPtr[indexWord( 5, 1 )] = dwordProd; + dwordProd = (uint64_t) aPtr[indexWord( 4, 2 )] * wordB + (dwordProd>>32); + zPtr[indexWord( 5, 2 )] = dwordProd; + dwordProd = (uint64_t) aPtr[indexWord( 4, 3 )] * wordB + (dwordProd>>32); + zPtr[indexWord( 5, 3 )] = dwordProd; + zPtr[indexWord( 5, 4 )] = dwordProd>>32; + do { + bPtr += wordIncr; + zPtr += wordIncr; + wordB = *bPtr; + dwordProd = (uint64_t) aPtr[indexWord( 4, 0 )] * wordB; + wordZ = zPtr[indexWord( 5, 0 )] + (uint32_t) dwordProd; + zPtr[indexWord( 5, 0 )] = wordZ; + carry = (wordZ < (uint32_t) dwordProd); + dwordProd = + (uint64_t) aPtr[indexWord( 4, 1 )] * wordB + (dwordProd>>32); + wordZ = zPtr[indexWord( 5, 1 )] + (uint32_t) dwordProd + carry; + zPtr[indexWord( 5, 1 )] = wordZ; + if ( wordZ != (uint32_t) dwordProd ) { + carry = (wordZ < (uint32_t) dwordProd); + } + dwordProd = + (uint64_t) aPtr[indexWord( 4, 2 )] * wordB + (dwordProd>>32); + wordZ = zPtr[indexWord( 5, 2 )] + (uint32_t) dwordProd + carry; + zPtr[indexWord( 5, 2 )] = wordZ; + if ( wordZ != (uint32_t) dwordProd ) { + carry = (wordZ < (uint32_t) dwordProd); + } + dwordProd = + (uint64_t) aPtr[indexWord( 4, 3 )] * wordB + (dwordProd>>32); + wordZ = zPtr[indexWord( 5, 3 )] + (uint32_t) dwordProd + carry; + zPtr[indexWord( 5, 3 )] = wordZ; + if ( wordZ != (uint32_t) dwordProd ) { + carry = (wordZ < (uint32_t) dwordProd); + } + zPtr[indexWord( 5, 4 )] = (dwordProd>>32) + carry; + } while ( zPtr != lastZPtr ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul128To256M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul128To256M.c new file mode 100644 index 000000000..91df8f223 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul128To256M.c @@ -0,0 +1,71 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_mul128To256M + +#define softfloat_mul128To256M softfloat_mul128To256M +#include "primitives.h" + +void + softfloat_mul128To256M( + uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0, uint64_t *zPtr ) +{ + struct uint128 p0, p64, p128; + uint_fast64_t z64, z128, z192; + + p0 = softfloat_mul64To128( a0, b0 ); + zPtr[indexWord( 4, 0 )] = p0.v0; + p64 = softfloat_mul64To128( a64, b0 ); + z64 = p64.v0 + p0.v64; + z128 = p64.v64 + (z64 < p64.v0); + p128 = softfloat_mul64To128( a64, b64 ); + z128 += p128.v0; + z192 = p128.v64 + (z128 < p128.v0); + p64 = softfloat_mul64To128( a0, b64 ); + z64 += p64.v0; + zPtr[indexWord( 4, 1 )] = z64; + p64.v64 += (z64 < p64.v0); + z128 += p64.v64; + zPtr[indexWord( 4, 2 )] = z128; + zPtr[indexWord( 4, 3 )] = z192 + (z128 < p64.v64); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul64ByShifted32To128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul64ByShifted32To128.c new file mode 100644 index 000000000..ea8d486a1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul64ByShifted32To128.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_mul64ByShifted32To128 + +struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b ) +{ + uint_fast64_t mid; + struct uint128 z; + + mid = (uint_fast64_t) (uint32_t) a * b; + z.v0 = mid<<32; + z.v64 = (uint_fast64_t) (uint32_t) (a>>32) * b + (mid>>32); + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul64To128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul64To128.c new file mode 100644 index 000000000..0a3c2b992 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul64To128.c @@ -0,0 +1,66 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_mul64To128 + +struct uint128 softfloat_mul64To128( uint64_t a, uint64_t b ) +{ + uint32_t a32, a0, b32, b0; + struct uint128 z; + uint64_t mid1, mid; + + a32 = a>>32; + a0 = a; + b32 = b>>32; + b0 = b; + z.v0 = (uint_fast64_t) a0 * b0; + mid1 = (uint_fast64_t) a32 * b0; + mid = mid1 + (uint_fast64_t) a0 * b32; + z.v64 = (uint_fast64_t) a32 * b32; + z.v64 += (uint_fast64_t) (mid < mid1)<<32 | mid>>32; + mid <<= 32; + z.v0 += mid; + z.v64 += (z.v0 < mid); + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul64To128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul64To128M.c new file mode 100644 index 000000000..cd1528978 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mul64To128M.c @@ -0,0 +1,68 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_mul64To128M + +void softfloat_mul64To128M( uint64_t a, uint64_t b, uint32_t *zPtr ) +{ + uint32_t a32, a0, b32, b0; + uint64_t z0, mid1, z64, mid; + + a32 = a>>32; + a0 = a; + b32 = b>>32; + b0 = b; + z0 = (uint64_t) a0 * b0; + mid1 = (uint64_t) a32 * b0; + mid = mid1 + (uint64_t) a0 * b32; + z64 = (uint64_t) a32 * b32; + z64 += (uint64_t) (mid < mid1)<<32 | mid>>32; + mid <<= 32; + z0 += mid; + zPtr[indexWord( 4, 1 )] = z0>>32; + zPtr[indexWord( 4, 0 )] = z0; + z64 += (z0 < mid); + zPtr[indexWord( 4, 3 )] = z64>>32; + zPtr[indexWord( 4, 2 )] = z64; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF128.c new file mode 100644 index 000000000..9b98b9f64 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF128.c @@ -0,0 +1,350 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float128_t + softfloat_mulAddF128( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0, + uint_fast64_t uiC64, + uint_fast64_t uiC0, + uint_fast8_t op + ) +{ + bool signA; + int_fast32_t expA; + struct uint128 sigA; + bool signB; + int_fast32_t expB; + struct uint128 sigB; + bool signC; + int_fast32_t expC; + struct uint128 sigC; + bool signZ; + uint_fast64_t magBits; + struct uint128 uiZ; + struct exp32_sig128 normExpSig; + int_fast32_t expZ; + uint64_t sig256Z[4]; + struct uint128 sigZ; + int_fast32_t shiftDist, expDiff; + struct uint128 x128; + uint64_t sig256C[4]; + static uint64_t zero256[4] = INIT_UINTM4( 0, 0, 0, 0 ); + uint_fast64_t sigZExtra, sig256Z0; + union ui128_f128 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signA = signF128UI64( uiA64 ); + expA = expF128UI64( uiA64 ); + sigA.v64 = fracF128UI64( uiA64 ); + sigA.v0 = uiA0; + signB = signF128UI64( uiB64 ); + expB = expF128UI64( uiB64 ); + sigB.v64 = fracF128UI64( uiB64 ); + sigB.v0 = uiB0; + signC = signF128UI64( uiC64 ) ^ (op == softfloat_mulAdd_subC); + expC = expF128UI64( uiC64 ); + sigC.v64 = fracF128UI64( uiC64 ); + sigC.v0 = uiC0; + signZ = signA ^ signB ^ (op == softfloat_mulAdd_subProd); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FFF ) { + if ( + (sigA.v64 | sigA.v0) || ((expB == 0x7FFF) && (sigB.v64 | sigB.v0)) + ) { + goto propagateNaN_ABC; + } + magBits = expB | sigB.v64 | sigB.v0; + goto infProdArg; + } + if ( expB == 0x7FFF ) { + if ( sigB.v64 | sigB.v0 ) goto propagateNaN_ABC; + magBits = expA | sigA.v64 | sigA.v0; + goto infProdArg; + } + if ( expC == 0x7FFF ) { + if ( sigC.v64 | sigC.v0 ) { + uiZ.v64 = 0; + uiZ.v0 = 0; + goto propagateNaN_ZC; + } + uiZ.v64 = uiC64; + uiZ.v0 = uiC0; + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! (sigA.v64 | sigA.v0) ) goto zeroProd; + normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! (sigB.v64 | sigB.v0) ) goto zeroProd; + normExpSig = softfloat_normSubnormalF128Sig( sigB.v64, sigB.v0 ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0x3FFE; + sigA.v64 |= UINT64_C( 0x0001000000000000 ); + sigB.v64 |= UINT64_C( 0x0001000000000000 ); + sigA = softfloat_shortShiftLeft128( sigA.v64, sigA.v0, 8 ); + sigB = softfloat_shortShiftLeft128( sigB.v64, sigB.v0, 15 ); + softfloat_mul128To256M( sigA.v64, sigA.v0, sigB.v64, sigB.v0, sig256Z ); + sigZ.v64 = sig256Z[indexWord( 4, 3 )]; + sigZ.v0 = sig256Z[indexWord( 4, 2 )]; + shiftDist = 0; + if ( ! (sigZ.v64 & UINT64_C( 0x0100000000000000 )) ) { + --expZ; + shiftDist = -1; + } + if ( ! expC ) { + if ( ! (sigC.v64 | sigC.v0) ) { + shiftDist += 8; + goto sigZ; + } + normExpSig = softfloat_normSubnormalF128Sig( sigC.v64, sigC.v0 ); + expC = normExpSig.exp; + sigC = normExpSig.sig; + } + sigC.v64 |= UINT64_C( 0x0001000000000000 ); + sigC = softfloat_shortShiftLeft128( sigC.v64, sigC.v0, 8 ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expZ - expC; + if ( expDiff < 0 ) { + expZ = expC; + if ( (signZ == signC) || (expDiff < -1) ) { + shiftDist -= expDiff; + if ( shiftDist ) { + sigZ = + softfloat_shiftRightJam128( sigZ.v64, sigZ.v0, shiftDist ); + } + } else { + if ( ! shiftDist ) { + x128 = + softfloat_shortShiftRight128( + sig256Z[indexWord( 4, 1 )], sig256Z[indexWord( 4, 0 )], + 1 + ); + sig256Z[indexWord( 4, 1 )] = (sigZ.v0<<63) | x128.v64; + sig256Z[indexWord( 4, 0 )] = x128.v0; + sigZ = softfloat_shortShiftRight128( sigZ.v64, sigZ.v0, 1 ); + sig256Z[indexWord( 4, 3 )] = sigZ.v64; + sig256Z[indexWord( 4, 2 )] = sigZ.v0; + } + } + } else { + if ( shiftDist ) softfloat_add256M( sig256Z, sig256Z, sig256Z ); + if ( ! expDiff ) { + sigZ.v64 = sig256Z[indexWord( 4, 3 )]; + sigZ.v0 = sig256Z[indexWord( 4, 2 )]; + } else { + sig256C[indexWord( 4, 3 )] = sigC.v64; + sig256C[indexWord( 4, 2 )] = sigC.v0; + sig256C[indexWord( 4, 1 )] = 0; + sig256C[indexWord( 4, 0 )] = 0; + softfloat_shiftRightJam256M( sig256C, expDiff, sig256C ); + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + shiftDist = 8; + if ( signZ == signC ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expDiff <= 0 ) { + sigZ = softfloat_add128( sigC.v64, sigC.v0, sigZ.v64, sigZ.v0 ); + } else { + softfloat_add256M( sig256Z, sig256C, sig256Z ); + sigZ.v64 = sig256Z[indexWord( 4, 3 )]; + sigZ.v0 = sig256Z[indexWord( 4, 2 )]; + } + if ( sigZ.v64 & UINT64_C( 0x0200000000000000 ) ) { + ++expZ; + shiftDist = 9; + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expDiff < 0 ) { + signZ = signC; + if ( expDiff < -1 ) { + sigZ = + softfloat_sub128( sigC.v64, sigC.v0, sigZ.v64, sigZ.v0 ); + sigZExtra = + sig256Z[indexWord( 4, 1 )] | sig256Z[indexWord( 4, 0 )]; + if ( sigZExtra ) { + sigZ = softfloat_sub128( sigZ.v64, sigZ.v0, 0, 1 ); + } + if ( ! (sigZ.v64 & UINT64_C( 0x0100000000000000 )) ) { + --expZ; + shiftDist = 7; + } + goto shiftRightRoundPack; + } else { + sig256C[indexWord( 4, 3 )] = sigC.v64; + sig256C[indexWord( 4, 2 )] = sigC.v0; + sig256C[indexWord( 4, 1 )] = 0; + sig256C[indexWord( 4, 0 )] = 0; + softfloat_sub256M( sig256C, sig256Z, sig256Z ); + } + } else if ( ! expDiff ) { + sigZ = softfloat_sub128( sigZ.v64, sigZ.v0, sigC.v64, sigC.v0 ); + if ( + ! (sigZ.v64 | sigZ.v0) && ! sig256Z[indexWord( 4, 1 )] + && ! sig256Z[indexWord( 4, 0 )] + ) { + goto completeCancellation; + } + sig256Z[indexWord( 4, 3 )] = sigZ.v64; + sig256Z[indexWord( 4, 2 )] = sigZ.v0; + if ( sigZ.v64 & UINT64_C( 0x8000000000000000 ) ) { + signZ = ! signZ; + softfloat_sub256M( zero256, sig256Z, sig256Z ); + } + } else { + softfloat_sub256M( sig256Z, sig256C, sig256Z ); + if ( 1 < expDiff ) { + sigZ.v64 = sig256Z[indexWord( 4, 3 )]; + sigZ.v0 = sig256Z[indexWord( 4, 2 )]; + if ( ! (sigZ.v64 & UINT64_C( 0x0100000000000000 )) ) { + --expZ; + shiftDist = 7; + } + goto sigZ; + } + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sigZ.v64 = sig256Z[indexWord( 4, 3 )]; + sigZ.v0 = sig256Z[indexWord( 4, 2 )]; + sigZExtra = sig256Z[indexWord( 4, 1 )]; + sig256Z0 = sig256Z[indexWord( 4, 0 )]; + if ( sigZ.v64 ) { + if ( sig256Z0 ) sigZExtra |= 1; + } else { + expZ -= 64; + sigZ.v64 = sigZ.v0; + sigZ.v0 = sigZExtra; + sigZExtra = sig256Z0; + if ( ! sigZ.v64 ) { + expZ -= 64; + sigZ.v64 = sigZ.v0; + sigZ.v0 = sigZExtra; + sigZExtra = 0; + if ( ! sigZ.v64 ) { + expZ -= 64; + sigZ.v64 = sigZ.v0; + sigZ.v0 = 0; + } + } + } + shiftDist = softfloat_countLeadingZeros64( sigZ.v64 ); + expZ += 7 - shiftDist; + shiftDist = 15 - shiftDist; + if ( 0 < shiftDist ) goto shiftRightRoundPack; + if ( shiftDist ) { + shiftDist = -shiftDist; + sigZ = softfloat_shortShiftLeft128( sigZ.v64, sigZ.v0, shiftDist ); + x128 = softfloat_shortShiftLeft128( 0, sigZExtra, shiftDist ); + sigZ.v0 |= x128.v64; + sigZExtra = x128.v0; + } + goto roundPack; + } + sigZ: + sigZExtra = sig256Z[indexWord( 4, 1 )] | sig256Z[indexWord( 4, 0 )]; + shiftRightRoundPack: + sigZExtra = (uint64_t) (sigZ.v0<<(64 - shiftDist)) | (sigZExtra != 0); + sigZ = softfloat_shortShiftRight128( sigZ.v64, sigZ.v0, shiftDist ); + roundPack: + return + softfloat_roundPackToF128( + signZ, expZ - 1, sigZ.v64, sigZ.v0, sigZExtra ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN_ABC: + uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 ); + goto propagateNaN_ZC; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infProdArg: + if ( magBits ) { + uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 ); + uiZ.v0 = 0; + if ( expC != 0x7FFF ) goto uiZ; + if ( sigC.v64 | sigC.v0 ) goto propagateNaN_ZC; + if ( signZ == signC ) goto uiZ; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + propagateNaN_ZC: + uiZ = softfloat_propagateNaNF128UI( uiZ.v64, uiZ.v0, uiC64, uiC0 ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zeroProd: + uiZ.v64 = uiC64; + uiZ.v0 = uiC0; + if ( ! (expC | sigC.v64 | sigC.v0) && (signZ != signC) ) { + completeCancellation: + uiZ.v64 = + packToF128UI64( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + uiZ.v0 = 0; + } + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF128M.c new file mode 100644 index 000000000..3ed3bae41 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF128M.c @@ -0,0 +1,382 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +void + softfloat_mulAddF128M( + const uint32_t *aWPtr, + const uint32_t *bWPtr, + const uint32_t *cWPtr, + uint32_t *zWPtr, + uint_fast8_t op + ) +{ + uint32_t uiA96; + int32_t expA; + uint32_t uiB96; + int32_t expB; + uint32_t uiC96; + bool signC; + int32_t expC; + bool signProd, prodIsInfinite; + uint32_t *ptr, uiZ96, sigA[4]; + uint_fast8_t shiftDist; + uint32_t sigX[5]; + int32_t expProd; + uint32_t sigProd[8], wordSig; + bool doSub; + uint_fast8_t + (*addCarryMRoutinePtr)( + uint_fast8_t, + const uint32_t *, + const uint32_t *, + uint_fast8_t, + uint32_t * + ); + int32_t expDiff; + bool signZ; + int32_t expZ; + uint32_t *extSigPtr; + uint_fast8_t carry; + void (*roundPackRoutinePtr)( bool, int32_t, uint32_t *, uint32_t * ); + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiA96 = aWPtr[indexWordHi( 4 )]; + expA = expF128UI96( uiA96 ); + uiB96 = bWPtr[indexWordHi( 4 )]; + expB = expF128UI96( uiB96 ); + uiC96 = cWPtr[indexWordHi( 4 )]; + signC = signF128UI96( uiC96 ) ^ (op == softfloat_mulAdd_subC); + expC = expF128UI96( uiC96 ); + signProd = + signF128UI96( uiA96 ) ^ signF128UI96( uiB96 ) + ^ (op == softfloat_mulAdd_subProd); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + prodIsInfinite = false; + if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) { + if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) { + goto propagateNaN_ZC; + } + ptr = (uint32_t *) aWPtr; + if ( ! (uint32_t) (uiA96<<1) ) goto possibleInvalidProd; + if ( ! (uint32_t) (uiB96<<1) ) { + ptr = (uint32_t *) bWPtr; + possibleInvalidProd: + if ( + ! (ptr[indexWord( 4, 2 )] | ptr[indexWord( 4, 1 )] + | ptr[indexWord( 4, 0 )]) + ) { + goto invalid; + } + } + prodIsInfinite = true; + } + if ( expC == 0x7FFF ) { + if ( + fracF128UI96( uiC96 ) + || (cWPtr[indexWord( 4, 2 )] | cWPtr[indexWord( 4, 1 )] + | cWPtr[indexWord( 4, 0 )]) + ) { + zWPtr[indexWordHi( 4 )] = 0; + goto propagateNaN_ZC; + } + if ( prodIsInfinite && (signProd != signC) ) goto invalid; + goto copyC; + } + if ( prodIsInfinite ) { + uiZ96 = packToF128UI96( signProd, 0x7FFF, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA ) { + sigA[indexWordHi( 4 )] = fracF128UI96( uiA96 ) | 0x00010000; + sigA[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )]; + sigA[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )]; + sigA[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )]; + } else { + expA = softfloat_shiftNormSigF128M( aWPtr, 0, sigA ); + if ( expA == -128 ) goto zeroProd; + } + if ( expB ) { + sigX[indexWordHi( 4 )] = fracF128UI96( uiB96 ) | 0x00010000; + sigX[indexWord( 4, 2 )] = bWPtr[indexWord( 4, 2 )]; + sigX[indexWord( 4, 1 )] = bWPtr[indexWord( 4, 1 )]; + sigX[indexWord( 4, 0 )] = bWPtr[indexWord( 4, 0 )]; + } else { + expB = softfloat_shiftNormSigF128M( bWPtr, 0, sigX ); + if ( expB == -128 ) goto zeroProd; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expProd = expA + expB - 0x3FF0; + softfloat_mul128MTo256M( sigA, sigX, sigProd ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + wordSig = fracF128UI96( uiC96 ); + if ( expC ) { + --expC; + wordSig |= 0x00010000; + } + sigX[indexWordHi( 5 )] = wordSig; + sigX[indexWord( 5, 3 )] = cWPtr[indexWord( 4, 2 )]; + sigX[indexWord( 5, 2 )] = cWPtr[indexWord( 4, 1 )]; + sigX[indexWord( 5, 1 )] = cWPtr[indexWord( 4, 0 )]; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + doSub = (signProd != signC); + addCarryMRoutinePtr = + doSub ? softfloat_addComplCarryM : softfloat_addCarryM; + expDiff = expProd - expC; + if ( expDiff <= 0 ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + signZ = signC; + expZ = expC; + if ( + sigProd[indexWord( 8, 2 )] + || (sigProd[indexWord( 8, 1 )] | sigProd[indexWord( 8, 0 )]) + ) { + sigProd[indexWord( 8, 3 )] |= 1; + } + extSigPtr = &sigProd[indexMultiwordHi( 8, 5 )]; + if ( expDiff ) { + softfloat_shiftRightJam160M( extSigPtr, -expDiff, extSigPtr ); + } + carry = 0; + if ( doSub ) { + wordSig = extSigPtr[indexWordLo( 5 )]; + extSigPtr[indexWordLo( 5 )] = -wordSig; + carry = ! wordSig; + } + (*addCarryMRoutinePtr)( + 4, + &sigX[indexMultiwordHi( 5, 4 )], + extSigPtr + indexMultiwordHi( 5, 4 ), + carry, + extSigPtr + indexMultiwordHi( 5, 4 ) + ); + wordSig = extSigPtr[indexWordHi( 5 )]; + if ( ! expZ ) { + if ( wordSig & 0x80000000 ) { + signZ = ! signZ; + softfloat_negX160M( extSigPtr ); + wordSig = extSigPtr[indexWordHi( 5 )]; + } + goto checkCancellation; + } + if ( wordSig < 0x00010000 ) { + --expZ; + softfloat_add160M( extSigPtr, extSigPtr, extSigPtr ); + goto roundPack; + } + goto extSigReady_noCancellation; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + signZ = signProd; + expZ = expProd; + sigX[indexWordLo( 5 )] = 0; + expDiff -= 128; + if ( 0 <= expDiff ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + if ( expDiff ) softfloat_shiftRightJam160M( sigX, expDiff, sigX ); + wordSig = sigX[indexWordLo( 5 )]; + carry = 0; + if ( doSub ) { + carry = ! wordSig; + wordSig = -wordSig; + } + carry = + (*addCarryMRoutinePtr)( + 4, + &sigProd[indexMultiwordLo( 8, 4 )], + &sigX[indexMultiwordHi( 5, 4 )], + carry, + &sigProd[indexMultiwordLo( 8, 4 )] + ); + sigProd[indexWord( 8, 2 )] |= wordSig; + ptr = &sigProd[indexWord( 8, 4 )]; + } else { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + shiftDist = expDiff & 31; + if ( shiftDist ) { + softfloat_shortShiftRight160M( sigX, shiftDist, sigX ); + } + expDiff >>= 5; + extSigPtr = + &sigProd[indexMultiwordLo( 8, 5 )] - wordIncr + + expDiff * -wordIncr; + carry = + (*addCarryMRoutinePtr)( 5, extSigPtr, sigX, doSub, extSigPtr ); + if ( expDiff == -4 ) { + /*------------------------------------------------------------ + *------------------------------------------------------------*/ + wordSig = sigProd[indexWordHi( 8 )]; + if ( wordSig & 0x80000000 ) { + signZ = ! signZ; + softfloat_negX256M( sigProd ); + wordSig = sigProd[indexWordHi( 8 )]; + } + /*------------------------------------------------------------ + *------------------------------------------------------------*/ + if ( wordSig ) goto expProdBigger_noWordShift; + wordSig = sigProd[indexWord( 8, 6 )]; + if ( 0x00040000 <= wordSig ) goto expProdBigger_noWordShift; + expZ -= 32; + extSigPtr = &sigProd[indexMultiwordHi( 8, 5 )] - wordIncr; + for (;;) { + if ( wordSig ) break; + wordSig = extSigPtr[indexWord( 5, 3 )]; + if ( 0x00040000 <= wordSig ) break; + expZ -= 32; + extSigPtr -= wordIncr; + if ( extSigPtr == &sigProd[indexMultiwordLo( 8, 5 )] ) { + goto checkCancellation; + } + } + /*------------------------------------------------------------ + *------------------------------------------------------------*/ + ptr = extSigPtr + indexWordLo( 5 ); + do { + ptr -= wordIncr; + if ( *ptr ) { + extSigPtr[indexWordLo( 5 )] |= 1; + break; + } + } while ( ptr != &sigProd[indexWordLo( 8 )] ); + wordSig = extSigPtr[indexWordHi( 5 )]; + goto extSigReady; + } + ptr = extSigPtr + indexWordHi( 5 ) + wordIncr; + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( carry != doSub ) { + if ( doSub ) { + do { + wordSig = *ptr; + *ptr = wordSig - 1; + ptr += wordIncr; + } while ( ! wordSig ); + } else { + do { + wordSig = *ptr + 1; + *ptr = wordSig; + ptr += wordIncr; + } while ( ! wordSig ); + } + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + expProdBigger_noWordShift: + if ( + sigProd[indexWord( 8, 2 )] + || (sigProd[indexWord( 8, 1 )] | sigProd[indexWord( 8, 0 )]) + ) { + sigProd[indexWord( 8, 3 )] |= 1; + } + extSigPtr = &sigProd[indexMultiwordHi( 8, 5 )]; + wordSig = extSigPtr[indexWordHi( 5 )]; + } + extSigReady: + roundPackRoutinePtr = softfloat_normRoundPackMToF128M; + if ( wordSig < 0x00010000 ) goto doRoundPack; + extSigReady_noCancellation: + if ( 0x00020000 <= wordSig ) { + ++expZ; + softfloat_shortShiftRightJam160M( extSigPtr, 1, extSigPtr ); + } + roundPack: + roundPackRoutinePtr = softfloat_roundPackMToF128M; + doRoundPack: + (*roundPackRoutinePtr)( signZ, expZ, extSigPtr, zWPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_invalidF128M( zWPtr ); + propagateNaN_ZC: + softfloat_propagateNaNF128M( zWPtr, cWPtr, zWPtr ); + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zeroProd: + if ( + ! (uint32_t) (uiC96<<1) && (signProd != signC) + && ! cWPtr[indexWord( 4, 2 )] + && ! (cWPtr[indexWord( 4, 1 )] | cWPtr[indexWord( 4, 0 )]) + ) { + goto completeCancellation; + } + copyC: + zWPtr[indexWordHi( 4 )] = uiC96; + zWPtr[indexWord( 4, 2 )] = cWPtr[indexWord( 4, 2 )]; + zWPtr[indexWord( 4, 1 )] = cWPtr[indexWord( 4, 1 )]; + zWPtr[indexWord( 4, 0 )] = cWPtr[indexWord( 4, 0 )]; + return; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + checkCancellation: + if ( + wordSig + || (extSigPtr[indexWord( 5, 3 )] | extSigPtr[indexWord( 5, 2 )]) + || (extSigPtr[indexWord( 5, 1 )] | extSigPtr[indexWord( 5, 0 )]) + ) { + goto extSigReady; + } + completeCancellation: + uiZ96 = + packToF128UI96( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + uiZ: + zWPtr[indexWordHi( 4 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = 0; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF16.c new file mode 100644 index 000000000..cca4db42b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF16.c @@ -0,0 +1,226 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t + softfloat_mulAddF16( + uint_fast16_t uiA, uint_fast16_t uiB, uint_fast16_t uiC, uint_fast8_t op ) +{ + bool signA; + int_fast8_t expA; + uint_fast16_t sigA; + bool signB; + int_fast8_t expB; + uint_fast16_t sigB; + bool signC; + int_fast8_t expC; + uint_fast16_t sigC; + bool signProd; + uint_fast16_t magBits, uiZ; + struct exp8_sig16 normExpSig; + int_fast8_t expProd; + uint_fast32_t sigProd; + bool signZ; + int_fast8_t expZ; + uint_fast16_t sigZ; + int_fast8_t expDiff; + uint_fast32_t sig32Z, sig32C; + int_fast8_t shiftDist; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signA = signF16UI( uiA ); + expA = expF16UI( uiA ); + sigA = fracF16UI( uiA ); + signB = signF16UI( uiB ); + expB = expF16UI( uiB ); + sigB = fracF16UI( uiB ); + signC = signF16UI( uiC ) ^ (op == softfloat_mulAdd_subC); + expC = expF16UI( uiC ); + sigC = fracF16UI( uiC ); + signProd = signA ^ signB ^ (op == softfloat_mulAdd_subProd); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x1F ) { + if ( sigA || ((expB == 0x1F) && sigB) ) goto propagateNaN_ABC; + magBits = expB | sigB; + goto infProdArg; + } + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN_ABC; + magBits = expA | sigA; + goto infProdArg; + } + if ( expC == 0x1F ) { + if ( sigC ) { + uiZ = 0; + goto propagateNaN_ZC; + } + uiZ = uiC; + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) goto zeroProd; + normExpSig = softfloat_normSubnormalF16Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! sigB ) goto zeroProd; + normExpSig = softfloat_normSubnormalF16Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expProd = expA + expB - 0xE; + sigA = (sigA | 0x0400)<<4; + sigB = (sigB | 0x0400)<<4; + sigProd = (uint_fast32_t) sigA * sigB; + if ( sigProd < 0x20000000 ) { + --expProd; + sigProd <<= 1; + } + signZ = signProd; + if ( ! expC ) { + if ( ! sigC ) { + expZ = expProd - 1; + sigZ = sigProd>>15 | ((sigProd & 0x7FFF) != 0); + goto roundPack; + } + normExpSig = softfloat_normSubnormalF16Sig( sigC ); + expC = normExpSig.exp; + sigC = normExpSig.sig; + } + sigC = (sigC | 0x0400)<<3; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expProd - expC; + if ( signProd == signC ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expDiff <= 0 ) { + expZ = expC; + sigZ = sigC + softfloat_shiftRightJam32( sigProd, 16 - expDiff ); + } else { + expZ = expProd; + sig32Z = + sigProd + + softfloat_shiftRightJam32( + (uint_fast32_t) sigC<<16, expDiff ); + sigZ = sig32Z>>16 | ((sig32Z & 0xFFFF) != 0 ); + } + if ( sigZ < 0x4000 ) { + --expZ; + sigZ <<= 1; + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sig32C = (uint_fast32_t) sigC<<16; + if ( expDiff < 0 ) { + signZ = signC; + expZ = expC; + sig32Z = sig32C - softfloat_shiftRightJam32( sigProd, -expDiff ); + } else if ( ! expDiff ) { + expZ = expProd; + sig32Z = sigProd - sig32C; + if ( ! sig32Z ) goto completeCancellation; + if ( sig32Z & 0x80000000 ) { + signZ = ! signZ; + sig32Z = -sig32Z; + } + } else { + expZ = expProd; + sig32Z = sigProd - softfloat_shiftRightJam32( sig32C, expDiff ); + } + shiftDist = softfloat_countLeadingZeros32( sig32Z ) - 1; + expZ -= shiftDist; + shiftDist -= 16; + if ( shiftDist < 0 ) { + sigZ = + sig32Z>>(-shiftDist) + | ((uint32_t) (sig32Z<<(shiftDist & 31)) != 0); + } else { + sigZ = (uint_fast16_t) sig32Z<<shiftDist; + } + } + roundPack: + return softfloat_roundPackToF16( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN_ABC: + uiZ = softfloat_propagateNaNF16UI( uiA, uiB ); + goto propagateNaN_ZC; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infProdArg: + if ( magBits ) { + uiZ = packToF16UI( signProd, 0x1F, 0 ); + if ( expC != 0x1F ) goto uiZ; + if ( sigC ) goto propagateNaN_ZC; + if ( signProd == signC ) goto uiZ; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF16UI; + propagateNaN_ZC: + uiZ = softfloat_propagateNaNF16UI( uiZ, uiC ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zeroProd: + uiZ = uiC; + if ( ! (expC | sigC) && (signProd != signC) ) { + completeCancellation: + uiZ = + packToF16UI( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + } + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF32.c new file mode 100644 index 000000000..805517c55 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF32.c @@ -0,0 +1,224 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t + softfloat_mulAddF32( + uint_fast32_t uiA, uint_fast32_t uiB, uint_fast32_t uiC, uint_fast8_t op ) +{ + bool signA; + int_fast16_t expA; + uint_fast32_t sigA; + bool signB; + int_fast16_t expB; + uint_fast32_t sigB; + bool signC; + int_fast16_t expC; + uint_fast32_t sigC; + bool signProd; + uint_fast32_t magBits, uiZ; + struct exp16_sig32 normExpSig; + int_fast16_t expProd; + uint_fast64_t sigProd; + bool signZ; + int_fast16_t expZ; + uint_fast32_t sigZ; + int_fast16_t expDiff; + uint_fast64_t sig64Z, sig64C; + int_fast8_t shiftDist; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signA = signF32UI( uiA ); + expA = expF32UI( uiA ); + sigA = fracF32UI( uiA ); + signB = signF32UI( uiB ); + expB = expF32UI( uiB ); + sigB = fracF32UI( uiB ); + signC = signF32UI( uiC ) ^ (op == softfloat_mulAdd_subC); + expC = expF32UI( uiC ); + sigC = fracF32UI( uiC ); + signProd = signA ^ signB ^ (op == softfloat_mulAdd_subProd); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0xFF ) { + if ( sigA || ((expB == 0xFF) && sigB) ) goto propagateNaN_ABC; + magBits = expB | sigB; + goto infProdArg; + } + if ( expB == 0xFF ) { + if ( sigB ) goto propagateNaN_ABC; + magBits = expA | sigA; + goto infProdArg; + } + if ( expC == 0xFF ) { + if ( sigC ) { + uiZ = 0; + goto propagateNaN_ZC; + } + uiZ = uiC; + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) goto zeroProd; + normExpSig = softfloat_normSubnormalF32Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! sigB ) goto zeroProd; + normExpSig = softfloat_normSubnormalF32Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expProd = expA + expB - 0x7E; + sigA = (sigA | 0x00800000)<<7; + sigB = (sigB | 0x00800000)<<7; + sigProd = (uint_fast64_t) sigA * sigB; + if ( sigProd < UINT64_C( 0x2000000000000000 ) ) { + --expProd; + sigProd <<= 1; + } + signZ = signProd; + if ( ! expC ) { + if ( ! sigC ) { + expZ = expProd - 1; + sigZ = softfloat_shortShiftRightJam64( sigProd, 31 ); + goto roundPack; + } + normExpSig = softfloat_normSubnormalF32Sig( sigC ); + expC = normExpSig.exp; + sigC = normExpSig.sig; + } + sigC = (sigC | 0x00800000)<<6; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expProd - expC; + if ( signProd == signC ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expDiff <= 0 ) { + expZ = expC; + sigZ = sigC + softfloat_shiftRightJam64( sigProd, 32 - expDiff ); + } else { + expZ = expProd; + sig64Z = + sigProd + + softfloat_shiftRightJam64( + (uint_fast64_t) sigC<<32, expDiff ); + sigZ = softfloat_shortShiftRightJam64( sig64Z, 32 ); + } + if ( sigZ < 0x40000000 ) { + --expZ; + sigZ <<= 1; + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sig64C = (uint_fast64_t) sigC<<32; + if ( expDiff < 0 ) { + signZ = signC; + expZ = expC; + sig64Z = sig64C - softfloat_shiftRightJam64( sigProd, -expDiff ); + } else if ( ! expDiff ) { + expZ = expProd; + sig64Z = sigProd - sig64C; + if ( ! sig64Z ) goto completeCancellation; + if ( sig64Z & UINT64_C( 0x8000000000000000 ) ) { + signZ = ! signZ; + sig64Z = -sig64Z; + } + } else { + expZ = expProd; + sig64Z = sigProd - softfloat_shiftRightJam64( sig64C, expDiff ); + } + shiftDist = softfloat_countLeadingZeros64( sig64Z ) - 1; + expZ -= shiftDist; + shiftDist -= 32; + if ( shiftDist < 0 ) { + sigZ = softfloat_shortShiftRightJam64( sig64Z, -shiftDist ); + } else { + sigZ = (uint_fast32_t) sig64Z<<shiftDist; + } + } + roundPack: + return softfloat_roundPackToF32( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN_ABC: + uiZ = softfloat_propagateNaNF32UI( uiA, uiB ); + goto propagateNaN_ZC; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infProdArg: + if ( magBits ) { + uiZ = packToF32UI( signProd, 0xFF, 0 ); + if ( expC != 0xFF ) goto uiZ; + if ( sigC ) goto propagateNaN_ZC; + if ( signProd == signC ) goto uiZ; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF32UI; + propagateNaN_ZC: + uiZ = softfloat_propagateNaNF32UI( uiZ, uiC ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zeroProd: + uiZ = uiC; + if ( ! (expC | sigC) && (signProd != signC) ) { + completeCancellation: + uiZ = + packToF32UI( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + } + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF64.c new file mode 100644 index 000000000..cc1df45d6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_mulAddF64.c @@ -0,0 +1,496 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +float64_t + softfloat_mulAddF64( + uint_fast64_t uiA, uint_fast64_t uiB, uint_fast64_t uiC, uint_fast8_t op ) +{ + bool signA; + int_fast16_t expA; + uint_fast64_t sigA; + bool signB; + int_fast16_t expB; + uint_fast64_t sigB; + bool signC; + int_fast16_t expC; + uint_fast64_t sigC; + bool signZ; + uint_fast64_t magBits, uiZ; + struct exp16_sig64 normExpSig; + int_fast16_t expZ; + struct uint128 sig128Z; + uint_fast64_t sigZ; + int_fast16_t expDiff; + struct uint128 sig128C; + int_fast8_t shiftDist; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signA = signF64UI( uiA ); + expA = expF64UI( uiA ); + sigA = fracF64UI( uiA ); + signB = signF64UI( uiB ); + expB = expF64UI( uiB ); + sigB = fracF64UI( uiB ); + signC = signF64UI( uiC ) ^ (op == softfloat_mulAdd_subC); + expC = expF64UI( uiC ); + sigC = fracF64UI( uiC ); + signZ = signA ^ signB ^ (op == softfloat_mulAdd_subProd); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FF ) { + if ( sigA || ((expB == 0x7FF) && sigB) ) goto propagateNaN_ABC; + magBits = expB | sigB; + goto infProdArg; + } + if ( expB == 0x7FF ) { + if ( sigB ) goto propagateNaN_ABC; + magBits = expA | sigA; + goto infProdArg; + } + if ( expC == 0x7FF ) { + if ( sigC ) { + uiZ = 0; + goto propagateNaN_ZC; + } + uiZ = uiC; + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) goto zeroProd; + normExpSig = softfloat_normSubnormalF64Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! sigB ) goto zeroProd; + normExpSig = softfloat_normSubnormalF64Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0x3FE; + sigA = (sigA | UINT64_C( 0x0010000000000000 ))<<10; + sigB = (sigB | UINT64_C( 0x0010000000000000 ))<<10; + sig128Z = softfloat_mul64To128( sigA, sigB ); + if ( sig128Z.v64 < UINT64_C( 0x2000000000000000 ) ) { + --expZ; + sig128Z = + softfloat_add128( + sig128Z.v64, sig128Z.v0, sig128Z.v64, sig128Z.v0 ); + } + if ( ! expC ) { + if ( ! sigC ) { + --expZ; + sigZ = sig128Z.v64<<1 | (sig128Z.v0 != 0); + goto roundPack; + } + normExpSig = softfloat_normSubnormalF64Sig( sigC ); + expC = normExpSig.exp; + sigC = normExpSig.sig; + } + sigC = (sigC | UINT64_C( 0x0010000000000000 ))<<9; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expZ - expC; + if ( expDiff < 0 ) { + expZ = expC; + if ( (signZ == signC) || (expDiff < -1) ) { + sig128Z.v64 = softfloat_shiftRightJam64( sig128Z.v64, -expDiff ); + } else { + sig128Z = + softfloat_shortShiftRightJam128( sig128Z.v64, sig128Z.v0, 1 ); + } + } else if ( expDiff ) { + sig128C = softfloat_shiftRightJam128( sigC, 0, expDiff ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( signZ == signC ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expDiff <= 0 ) { + sigZ = (sigC + sig128Z.v64) | (sig128Z.v0 != 0); + } else { + sig128Z = + softfloat_add128( + sig128Z.v64, sig128Z.v0, sig128C.v64, sig128C.v0 ); + sigZ = sig128Z.v64 | (sig128Z.v0 != 0); + } + if ( sigZ < UINT64_C( 0x4000000000000000 ) ) { + --expZ; + sigZ <<= 1; + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expDiff < 0 ) { + signZ = signC; + sig128Z = softfloat_sub128( sigC, 0, sig128Z.v64, sig128Z.v0 ); + } else if ( ! expDiff ) { + sig128Z.v64 = sig128Z.v64 - sigC; + if ( ! (sig128Z.v64 | sig128Z.v0) ) goto completeCancellation; + if ( sig128Z.v64 & UINT64_C( 0x8000000000000000 ) ) { + signZ = ! signZ; + sig128Z = softfloat_sub128( 0, 0, sig128Z.v64, sig128Z.v0 ); + } + } else { + sig128Z = + softfloat_sub128( + sig128Z.v64, sig128Z.v0, sig128C.v64, sig128C.v0 ); + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( ! sig128Z.v64 ) { + expZ -= 64; + sig128Z.v64 = sig128Z.v0; + sig128Z.v0 = 0; + } + shiftDist = softfloat_countLeadingZeros64( sig128Z.v64 ) - 1; + expZ -= shiftDist; + if ( shiftDist < 0 ) { + sigZ = softfloat_shortShiftRightJam64( sig128Z.v64, -shiftDist ); + } else { + sig128Z = + softfloat_shortShiftLeft128( + sig128Z.v64, sig128Z.v0, shiftDist ); + sigZ = sig128Z.v64; + } + sigZ |= (sig128Z.v0 != 0); + } + roundPack: + return softfloat_roundPackToF64( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN_ABC: + uiZ = softfloat_propagateNaNF64UI( uiA, uiB ); + goto propagateNaN_ZC; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infProdArg: + if ( magBits ) { + uiZ = packToF64UI( signZ, 0x7FF, 0 ); + if ( expC != 0x7FF ) goto uiZ; + if ( sigC ) goto propagateNaN_ZC; + if ( signZ == signC ) goto uiZ; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF64UI; + propagateNaN_ZC: + uiZ = softfloat_propagateNaNF64UI( uiZ, uiC ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zeroProd: + uiZ = uiC; + if ( ! (expC | sigC) && (signZ != signC) ) { + completeCancellation: + uiZ = + packToF64UI( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + } + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + +#else + +float64_t + softfloat_mulAddF64( + uint_fast64_t uiA, uint_fast64_t uiB, uint_fast64_t uiC, uint_fast8_t op ) +{ + bool signA; + int_fast16_t expA; + uint64_t sigA; + bool signB; + int_fast16_t expB; + uint64_t sigB; + bool signC; + int_fast16_t expC; + uint64_t sigC; + bool signZ; + uint64_t magBits, uiZ; + struct exp16_sig64 normExpSig; + int_fast16_t expZ; + uint32_t sig128Z[4]; + uint64_t sigZ; + int_fast16_t shiftDist, expDiff; + uint32_t sig128C[4]; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signA = signF64UI( uiA ); + expA = expF64UI( uiA ); + sigA = fracF64UI( uiA ); + signB = signF64UI( uiB ); + expB = expF64UI( uiB ); + sigB = fracF64UI( uiB ); + signC = signF64UI( uiC ) ^ (op == softfloat_mulAdd_subC); + expC = expF64UI( uiC ); + sigC = fracF64UI( uiC ); + signZ = signA ^ signB ^ (op == softfloat_mulAdd_subProd); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x7FF ) { + if ( sigA || ((expB == 0x7FF) && sigB) ) goto propagateNaN_ABC; + magBits = expB | sigB; + goto infProdArg; + } + if ( expB == 0x7FF ) { + if ( sigB ) goto propagateNaN_ABC; + magBits = expA | sigA; + goto infProdArg; + } + if ( expC == 0x7FF ) { + if ( sigC ) { + uiZ = 0; + goto propagateNaN_ZC; + } + uiZ = uiC; + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) goto zeroProd; + normExpSig = softfloat_normSubnormalF64Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! sigB ) goto zeroProd; + normExpSig = softfloat_normSubnormalF64Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0x3FE; + sigA = (sigA | UINT64_C( 0x0010000000000000 ))<<10; + sigB = (sigB | UINT64_C( 0x0010000000000000 ))<<11; + softfloat_mul64To128M( sigA, sigB, sig128Z ); + sigZ = + (uint64_t) sig128Z[indexWord( 4, 3 )]<<32 | sig128Z[indexWord( 4, 2 )]; + shiftDist = 0; + if ( ! (sigZ & UINT64_C( 0x4000000000000000 )) ) { + --expZ; + shiftDist = -1; + } + if ( ! expC ) { + if ( ! sigC ) { + if ( shiftDist ) sigZ <<= 1; + goto sigZ; + } + normExpSig = softfloat_normSubnormalF64Sig( sigC ); + expC = normExpSig.exp; + sigC = normExpSig.sig; + } + sigC = (sigC | UINT64_C( 0x0010000000000000 ))<<10; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expZ - expC; + if ( expDiff < 0 ) { + expZ = expC; + if ( (signZ == signC) || (expDiff < -1) ) { + shiftDist -= expDiff; + if ( shiftDist) { + sigZ = softfloat_shiftRightJam64( sigZ, shiftDist ); + } + } else { + if ( ! shiftDist ) { + softfloat_shortShiftRight128M( sig128Z, 1, sig128Z ); + } + } + } else { + if ( shiftDist ) softfloat_add128M( sig128Z, sig128Z, sig128Z ); + if ( ! expDiff ) { + sigZ = + (uint64_t) sig128Z[indexWord( 4, 3 )]<<32 + | sig128Z[indexWord( 4, 2 )]; + } else { + sig128C[indexWord( 4, 3 )] = sigC>>32; + sig128C[indexWord( 4, 2 )] = sigC; + sig128C[indexWord( 4, 1 )] = 0; + sig128C[indexWord( 4, 0 )] = 0; + softfloat_shiftRightJam128M( sig128C, expDiff, sig128C ); + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( signZ == signC ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expDiff <= 0 ) { + sigZ += sigC; + } else { + softfloat_add128M( sig128Z, sig128C, sig128Z ); + sigZ = + (uint64_t) sig128Z[indexWord( 4, 3 )]<<32 + | sig128Z[indexWord( 4, 2 )]; + } + if ( sigZ & UINT64_C( 0x8000000000000000 ) ) { + ++expZ; + sigZ = softfloat_shortShiftRightJam64( sigZ, 1 ); + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expDiff < 0 ) { + signZ = signC; + if ( expDiff < -1 ) { + sigZ = sigC - sigZ; + if ( + sig128Z[indexWord( 4, 1 )] || sig128Z[indexWord( 4, 0 )] + ) { + sigZ = (sigZ - 1) | 1; + } + if ( ! (sigZ & UINT64_C( 0x4000000000000000 )) ) { + --expZ; + sigZ <<= 1; + } + goto roundPack; + } else { + sig128C[indexWord( 4, 3 )] = sigC>>32; + sig128C[indexWord( 4, 2 )] = sigC; + sig128C[indexWord( 4, 1 )] = 0; + sig128C[indexWord( 4, 0 )] = 0; + softfloat_sub128M( sig128C, sig128Z, sig128Z ); + } + } else if ( ! expDiff ) { + sigZ -= sigC; + if ( + ! sigZ && ! sig128Z[indexWord( 4, 1 )] + && ! sig128Z[indexWord( 4, 0 )] + ) { + goto completeCancellation; + } + sig128Z[indexWord( 4, 3 )] = sigZ>>32; + sig128Z[indexWord( 4, 2 )] = sigZ; + if ( sigZ & UINT64_C( 0x8000000000000000 ) ) { + signZ = ! signZ; + softfloat_negX128M( sig128Z ); + } + } else { + softfloat_sub128M( sig128Z, sig128C, sig128Z ); + if ( 1 < expDiff ) { + sigZ = + (uint64_t) sig128Z[indexWord( 4, 3 )]<<32 + | sig128Z[indexWord( 4, 2 )]; + if ( ! (sigZ & UINT64_C( 0x4000000000000000 )) ) { + --expZ; + sigZ <<= 1; + } + goto sigZ; + } + } + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + shiftDist = 0; + sigZ = + (uint64_t) sig128Z[indexWord( 4, 3 )]<<32 + | sig128Z[indexWord( 4, 2 )]; + if ( ! sigZ ) { + shiftDist = 64; + sigZ = + (uint64_t) sig128Z[indexWord( 4, 1 )]<<32 + | sig128Z[indexWord( 4, 0 )]; + } + shiftDist += softfloat_countLeadingZeros64( sigZ ) - 1; + if ( shiftDist ) { + expZ -= shiftDist; + softfloat_shiftLeft128M( sig128Z, shiftDist, sig128Z ); + sigZ = + (uint64_t) sig128Z[indexWord( 4, 3 )]<<32 + | sig128Z[indexWord( 4, 2 )]; + } + } + sigZ: + if ( sig128Z[indexWord( 4, 1 )] || sig128Z[indexWord( 4, 0 )] ) sigZ |= 1; + roundPack: + return softfloat_roundPackToF64( signZ, expZ - 1, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN_ABC: + uiZ = softfloat_propagateNaNF64UI( uiA, uiB ); + goto propagateNaN_ZC; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infProdArg: + if ( magBits ) { + uiZ = packToF64UI( signZ, 0x7FF, 0 ); + if ( expC != 0x7FF ) goto uiZ; + if ( sigC ) goto propagateNaN_ZC; + if ( signZ == signC ) goto uiZ; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF64UI; + propagateNaN_ZC: + uiZ = softfloat_propagateNaNF64UI( uiZ, uiC ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zeroProd: + uiZ = uiC; + if ( ! (expC | sigC) && (signZ != signC) ) { + completeCancellation: + uiZ = + packToF64UI( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + } + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_negXM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_negXM.c new file mode 100644 index 000000000..bb1c5a1f4 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_negXM.c @@ -0,0 +1,63 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_negXM + +void softfloat_negXM( uint_fast8_t size_words, uint32_t *zPtr ) +{ + unsigned int index, lastIndex; + uint_fast8_t carry; + uint32_t word; + + index = indexWordLo( size_words ); + lastIndex = indexWordHi( size_words ); + carry = 1; + for (;;) { + word = ~zPtr[index] + carry; + zPtr[index] = word; + if ( index == lastIndex ) break; + index += wordIncr; + if ( word ) carry = 0; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normExtF80SigM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normExtF80SigM.c new file mode 100644 index 000000000..fabe91ca3 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normExtF80SigM.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +int softfloat_normExtF80SigM( uint64_t *sigPtr ) +{ + uint64_t sig; + int_fast8_t shiftDist; + + sig = *sigPtr; + shiftDist = softfloat_countLeadingZeros64( sig ); + *sigPtr = sig<<shiftDist; + return -shiftDist; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackMToExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackMToExtF80M.c new file mode 100644 index 000000000..2a8988f8d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackMToExtF80M.c @@ -0,0 +1,78 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +void + softfloat_normRoundPackMToExtF80M( + bool sign, + int32_t exp, + uint32_t *extSigPtr, + uint_fast8_t roundingPrecision, + struct extFloat80M *zSPtr + ) +{ + int_fast16_t shiftDist; + uint32_t wordSig; + + shiftDist = 0; + wordSig = extSigPtr[indexWord( 3, 2 )]; + if ( ! wordSig ) { + shiftDist = 32; + wordSig = extSigPtr[indexWord( 3, 1 )]; + if ( ! wordSig ) { + shiftDist = 64; + wordSig = extSigPtr[indexWord( 3, 0 )]; + if ( ! wordSig ) { + zSPtr->signExp = packToExtF80UI64( sign, 0 ); + zSPtr->signif = 0; + return; + } + } + } + shiftDist += softfloat_countLeadingZeros32( wordSig ); + if ( shiftDist ) { + exp -= shiftDist; + softfloat_shiftLeft96M( extSigPtr, shiftDist, extSigPtr ); + } + softfloat_roundPackMToExtF80M( + sign, exp, extSigPtr, roundingPrecision, zSPtr ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackMToF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackMToF128M.c new file mode 100644 index 000000000..b15d160e9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackMToF128M.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +void + softfloat_normRoundPackMToF128M( + bool sign, int32_t exp, uint32_t *extSigPtr, uint32_t *zWPtr ) +{ + const uint32_t *ptr; + int_fast16_t shiftDist; + uint32_t wordSig; + + ptr = extSigPtr + indexWordHi( 5 ); + shiftDist = 0; + for (;;) { + wordSig = *ptr; + if ( wordSig ) break; + shiftDist += 32; + if ( 160 <= shiftDist ) { + zWPtr[indexWordHi( 4 )] = packToF128UI96( sign, 0, 0 ); + zWPtr[indexWord( 4, 2 )] = 0; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + return; + } + ptr -= wordIncr; + } + shiftDist += softfloat_countLeadingZeros32( wordSig ) - 15; + if ( shiftDist ) { + exp -= shiftDist; + softfloat_shiftLeft160M( extSigPtr, shiftDist, extSigPtr ); + } + softfloat_roundPackMToF128M( sign, exp, extSigPtr, zWPtr ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToExtF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToExtF80.c new file mode 100644 index 000000000..2518bf44a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToExtF80.c @@ -0,0 +1,71 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +extFloat80_t + softfloat_normRoundPackToExtF80( + bool sign, + int_fast32_t exp, + uint_fast64_t sig, + uint_fast64_t sigExtra, + uint_fast8_t roundingPrecision + ) +{ + int_fast8_t shiftDist; + struct uint128 sig128; + + if ( ! sig ) { + exp -= 64; + sig = sigExtra; + sigExtra = 0; + } + shiftDist = softfloat_countLeadingZeros64( sig ); + exp -= shiftDist; + if ( shiftDist ) { + sig128 = softfloat_shortShiftLeft128( sig, sigExtra, shiftDist ); + sig = sig128.v64; + sigExtra = sig128.v0; + } + return + softfloat_roundPackToExtF80( + sign, exp, sig, sigExtra, roundingPrecision ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF128.c new file mode 100644 index 000000000..14cf28ead --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF128.c @@ -0,0 +1,81 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +float128_t + softfloat_normRoundPackToF128( + bool sign, int_fast32_t exp, uint_fast64_t sig64, uint_fast64_t sig0 ) +{ + int_fast8_t shiftDist; + struct uint128 sig128; + union ui128_f128 uZ; + uint_fast64_t sigExtra; + struct uint128_extra sig128Extra; + + if ( ! sig64 ) { + exp -= 64; + sig64 = sig0; + sig0 = 0; + } + shiftDist = softfloat_countLeadingZeros64( sig64 ) - 15; + exp -= shiftDist; + if ( 0 <= shiftDist ) { + if ( shiftDist ) { + sig128 = softfloat_shortShiftLeft128( sig64, sig0, shiftDist ); + sig64 = sig128.v64; + sig0 = sig128.v0; + } + if ( (uint32_t) exp < 0x7FFD ) { + uZ.ui.v64 = packToF128UI64( sign, sig64 | sig0 ? exp : 0, sig64 ); + uZ.ui.v0 = sig0; + return uZ.f; + } + sigExtra = 0; + } else { + sig128Extra = + softfloat_shortShiftRightJam128Extra( sig64, sig0, 0, -shiftDist ); + sig64 = sig128Extra.v.v64; + sig0 = sig128Extra.v.v0; + sigExtra = sig128Extra.extra; + } + return softfloat_roundPackToF128( sign, exp, sig64, sig0, sigExtra ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF16.c new file mode 100644 index 000000000..008c5f124 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF16.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +float16_t + softfloat_normRoundPackToF16( bool sign, int_fast16_t exp, uint_fast16_t sig ) +{ + int_fast8_t shiftDist; + union ui16_f16 uZ; + + shiftDist = softfloat_countLeadingZeros16( sig ) - 1; + exp -= shiftDist; + if ( (4 <= shiftDist) && ((unsigned int) exp < 0x1D) ) { + uZ.ui = packToF16UI( sign, sig ? exp : 0, sig<<(shiftDist - 4) ); + return uZ.f; + } else { + return softfloat_roundPackToF16( sign, exp, sig<<shiftDist ); + } + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF32.c new file mode 100644 index 000000000..28df7376e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF32.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +float32_t + softfloat_normRoundPackToF32( bool sign, int_fast16_t exp, uint_fast32_t sig ) +{ + int_fast8_t shiftDist; + union ui32_f32 uZ; + + shiftDist = softfloat_countLeadingZeros32( sig ) - 1; + exp -= shiftDist; + if ( (7 <= shiftDist) && ((unsigned int) exp < 0xFD) ) { + uZ.ui = packToF32UI( sign, sig ? exp : 0, sig<<(shiftDist - 7) ); + return uZ.f; + } else { + return softfloat_roundPackToF32( sign, exp, sig<<shiftDist ); + } + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF64.c new file mode 100644 index 000000000..8c19ad852 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normRoundPackToF64.c @@ -0,0 +1,58 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +float64_t + softfloat_normRoundPackToF64( bool sign, int_fast16_t exp, uint_fast64_t sig ) +{ + int_fast8_t shiftDist; + union ui64_f64 uZ; + + shiftDist = softfloat_countLeadingZeros64( sig ) - 1; + exp -= shiftDist; + if ( (10 <= shiftDist) && ((unsigned int) exp < 0x7FD) ) { + uZ.ui = packToF64UI( sign, sig ? exp : 0, sig<<(shiftDist - 10) ); + return uZ.f; + } else { + return softfloat_roundPackToF64( sign, exp, sig<<shiftDist ); + } + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalExtF80Sig.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalExtF80Sig.c new file mode 100644 index 000000000..e6f2e4b62 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalExtF80Sig.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +struct exp32_sig64 softfloat_normSubnormalExtF80Sig( uint_fast64_t sig ) +{ + int_fast8_t shiftDist; + struct exp32_sig64 z; + + shiftDist = softfloat_countLeadingZeros64( sig ); + z.exp = -shiftDist; + z.sig = sig<<shiftDist; + return z; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF128Sig.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF128Sig.c new file mode 100644 index 000000000..a67763f6c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF128Sig.c @@ -0,0 +1,65 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +struct exp32_sig128 + softfloat_normSubnormalF128Sig( uint_fast64_t sig64, uint_fast64_t sig0 ) +{ + int_fast8_t shiftDist; + struct exp32_sig128 z; + + if ( ! sig64 ) { + shiftDist = softfloat_countLeadingZeros64( sig0 ) - 15; + z.exp = -63 - shiftDist; + if ( shiftDist < 0 ) { + z.sig.v64 = sig0>>-shiftDist; + z.sig.v0 = sig0<<(shiftDist & 63); + } else { + z.sig.v64 = sig0<<shiftDist; + z.sig.v0 = 0; + } + } else { + shiftDist = softfloat_countLeadingZeros64( sig64 ) - 15; + z.exp = 1 - shiftDist; + z.sig = softfloat_shortShiftLeft128( sig64, sig0, shiftDist ); + } + return z; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF128SigM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF128SigM.c new file mode 100644 index 000000000..f2745dec5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF128SigM.c @@ -0,0 +1,61 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +int softfloat_normSubnormalF128SigM( uint32_t *sigPtr ) +{ + const uint32_t *ptr; + int_fast16_t shiftDist; + uint32_t wordSig; + + ptr = sigPtr + indexWordHi( 4 ); + shiftDist = 0; + for (;;) { + wordSig = *ptr; + if ( wordSig ) break; + shiftDist += 32; + if ( 128 <= shiftDist ) return 1; + ptr -= wordIncr; + } + shiftDist += softfloat_countLeadingZeros32( wordSig ) - 15; + if ( shiftDist ) softfloat_shiftLeft128M( sigPtr, shiftDist, sigPtr ); + return 1 - shiftDist; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF16Sig.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF16Sig.c new file mode 100644 index 000000000..94541c914 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF16Sig.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +struct exp8_sig16 softfloat_normSubnormalF16Sig( uint_fast16_t sig ) +{ + int_fast8_t shiftDist; + struct exp8_sig16 z; + + shiftDist = softfloat_countLeadingZeros16( sig ) - 5; + z.exp = 1 - shiftDist; + z.sig = sig<<shiftDist; + return z; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF32Sig.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF32Sig.c new file mode 100644 index 000000000..b48e10d78 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF32Sig.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +struct exp16_sig32 softfloat_normSubnormalF32Sig( uint_fast32_t sig ) +{ + int_fast8_t shiftDist; + struct exp16_sig32 z; + + shiftDist = softfloat_countLeadingZeros32( sig ) - 8; + z.exp = 1 - shiftDist; + z.sig = sig<<shiftDist; + return z; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF64Sig.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF64Sig.c new file mode 100644 index 000000000..f78615982 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_normSubnormalF64Sig.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +struct exp16_sig64 softfloat_normSubnormalF64Sig( uint_fast64_t sig ) +{ + int_fast8_t shiftDist; + struct exp16_sig64 z; + + shiftDist = softfloat_countLeadingZeros64( sig ) - 11; + z.exp = 1 - shiftDist; + z.sig = sig<<shiftDist; + return z; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_remStepMBy32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_remStepMBy32.c new file mode 100644 index 000000000..0f249b907 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_remStepMBy32.c @@ -0,0 +1,86 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_remStepMBy32 + +void + softfloat_remStepMBy32( + uint_fast8_t size_words, + const uint32_t *remPtr, + uint_fast8_t dist, + const uint32_t *bPtr, + uint32_t q, + uint32_t *zPtr + ) +{ + unsigned int index, lastIndex; + uint64_t dwordProd; + uint32_t wordRem, wordShiftedRem, wordProd; + uint_fast8_t uNegDist, borrow; + + index = indexWordLo( size_words ); + lastIndex = indexWordHi( size_words ); + dwordProd = (uint64_t) bPtr[index] * q; + wordRem = remPtr[index]; + wordShiftedRem = wordRem<<dist; + wordProd = dwordProd; + zPtr[index] = wordShiftedRem - wordProd; + if ( index != lastIndex ) { + uNegDist = -dist; + borrow = (wordShiftedRem < wordProd); + for (;;) { + wordShiftedRem = wordRem>>(uNegDist & 31); + index += wordIncr; + dwordProd = (uint64_t) bPtr[index] * q + (dwordProd>>32); + wordRem = remPtr[index]; + wordShiftedRem |= wordRem<<dist; + wordProd = dwordProd; + zPtr[index] = wordShiftedRem - wordProd - borrow; + if ( index == lastIndex ) break; + borrow = + borrow ? (wordShiftedRem <= wordProd) + : (wordShiftedRem < wordProd); + } + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundMToI64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundMToI64.c new file mode 100644 index 000000000..557a532d6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundMToI64.c @@ -0,0 +1,102 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t + softfloat_roundMToI64( + bool sign, uint32_t *extSigPtr, uint_fast8_t roundingMode, bool exact ) +{ + uint64_t sig; + uint32_t sigExtra; + union { uint64_t ui; int64_t i; } uZ; + int64_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig = + (uint64_t) extSigPtr[indexWord( 3, 2 )]<<32 + | extSigPtr[indexWord( 3, 1 )]; + sigExtra = extSigPtr[indexWordLo( 3 )]; + if ( + (roundingMode == softfloat_round_near_maxMag) + || (roundingMode == softfloat_round_near_even) + ) { + if ( 0x80000000 <= sigExtra ) goto increment; + } else { + if ( + sigExtra + && (sign + ? (roundingMode == softfloat_round_min) +#ifdef SOFTFLOAT_ROUND_ODD + || (roundingMode == softfloat_round_odd) +#endif + : (roundingMode == softfloat_round_max)) + ) { + increment: + ++sig; + if ( !sig ) goto invalid; + if ( + (sigExtra == 0x80000000) + && (roundingMode == softfloat_round_near_even) + ) { + sig &= ~(uint_fast64_t) 1; + } + } + } + uZ.ui = sign ? -sig : sig; + z = uZ.i; + if ( z && ((z < 0) ^ sign) ) goto invalid; + if ( sigExtra ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) z |= 1; +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return sign ? i64_fromNegOverflow : i64_fromPosOverflow; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundMToUI64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundMToUI64.c new file mode 100644 index 000000000..c91147453 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundMToUI64.c @@ -0,0 +1,98 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t + softfloat_roundMToUI64( + bool sign, uint32_t *extSigPtr, uint_fast8_t roundingMode, bool exact ) +{ + uint64_t sig; + uint32_t sigExtra; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig = + (uint64_t) extSigPtr[indexWord( 3, 2 )]<<32 + | extSigPtr[indexWord( 3, 1 )]; + sigExtra = extSigPtr[indexWordLo( 3 )]; + if ( + (roundingMode == softfloat_round_near_maxMag) + || (roundingMode == softfloat_round_near_even) + ) { + if ( 0x80000000 <= sigExtra ) goto increment; + } else { + if ( sign ) { + if ( !(sig | sigExtra) ) return 0; + if ( roundingMode == softfloat_round_min ) goto invalid; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) goto invalid; +#endif + } else { + if ( (roundingMode == softfloat_round_max) && sigExtra ) { + increment: + ++sig; + if ( !sig ) goto invalid; + if ( + (sigExtra == 0x80000000) + && (roundingMode == softfloat_round_near_even) + ) { + sig &= ~(uint_fast64_t) 1; + } + } + } + } + if ( sign && sig ) goto invalid; + if ( sigExtra ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) sig |= 1; +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return sig; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackMToExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackMToExtF80M.c new file mode 100644 index 000000000..e9d3c3b10 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackMToExtF80M.c @@ -0,0 +1,256 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +void + softfloat_roundPackMToExtF80M( + bool sign, + int32_t exp, + uint32_t *extSigPtr, + uint_fast8_t roundingPrecision, + struct extFloat80M *zSPtr + ) +{ + uint_fast8_t roundingMode; + bool roundNearEven; + uint64_t sig, roundIncrement, roundMask, roundBits; + bool isTiny; + uint32_t sigExtra; + bool doIncrement; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundingMode = softfloat_roundingMode; + roundNearEven = (roundingMode == softfloat_round_near_even); + sig = + (uint64_t) extSigPtr[indexWord( 3, 2 )]<<32 + | extSigPtr[indexWord( 3, 1 )]; + if ( roundingPrecision == 80 ) goto precision80; + if ( roundingPrecision == 64 ) { + roundIncrement = UINT64_C( 0x0000000000000400 ); + roundMask = UINT64_C( 0x00000000000007FF ); + } else if ( roundingPrecision == 32 ) { + roundIncrement = UINT64_C( 0x0000008000000000 ); + roundMask = UINT64_C( 0x000000FFFFFFFFFF ); + } else { + goto precision80; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( extSigPtr[indexWordLo( 3 )] ) sig |= 1; + if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) { + roundIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + ? roundMask + : 0; + } + roundBits = sig & roundMask; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x7FFD <= (uint32_t) (exp - 1) ) { + if ( exp <= 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess + == softfloat_tininess_beforeRounding) + || (exp < 0) + || (sig <= (uint64_t) (sig + roundIncrement)); + sig = softfloat_shiftRightJam64( sig, 1 - exp ); + roundBits = sig & roundMask; + if ( roundBits ) { + if ( isTiny ) softfloat_raiseFlags( softfloat_flag_underflow ); + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig |= roundMask + 1; + } +#endif + } + sig += roundIncrement; + exp = ((sig & UINT64_C( 0x8000000000000000 )) != 0); + roundIncrement = roundMask + 1; + if ( roundNearEven && (roundBits<<1 == roundIncrement) ) { + roundMask |= roundIncrement; + } + sig &= ~roundMask; + goto packReturn; + } + if ( + (0x7FFE < exp) + || ((exp == 0x7FFE) && ((uint64_t) (sig + roundIncrement) < sig)) + ) { + goto overflow; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( roundBits ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig = (sig & ~roundMask) | (roundMask + 1); + goto packReturn; + } +#endif + } + sig += roundIncrement; + if ( sig < roundIncrement ) { + ++exp; + sig = UINT64_C( 0x8000000000000000 ); + } + roundIncrement = roundMask + 1; + if ( roundNearEven && (roundBits<<1 == roundIncrement) ) { + roundMask |= roundIncrement; + } + sig &= ~roundMask; + goto packReturn; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + precision80: + sigExtra = extSigPtr[indexWordLo( 3 )]; + doIncrement = (0x80000000 <= sigExtra); + if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) { + doIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + && sigExtra; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x7FFD <= (uint32_t) (exp - 1) ) { + if ( exp <= 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess + == softfloat_tininess_beforeRounding) + || (exp < 0) + || ! doIncrement + || (sig < UINT64_C( 0xFFFFFFFFFFFFFFFF )); + softfloat_shiftRightJam96M( extSigPtr, 1 - exp, extSigPtr ); + exp = 0; + sig = + (uint64_t) extSigPtr[indexWord( 3, 2 )]<<32 + | extSigPtr[indexWord( 3, 1 )]; + sigExtra = extSigPtr[indexWordLo( 3 )]; + if ( sigExtra ) { + if ( isTiny ) softfloat_raiseFlags( softfloat_flag_underflow ); + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig |= 1; + goto packReturn; + } +#endif + } + doIncrement = (0x80000000 <= sigExtra); + if ( + ! roundNearEven + && (roundingMode != softfloat_round_near_maxMag) + ) { + doIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + && sigExtra; + } + if ( doIncrement ) { + ++sig; + sig &= ~(uint64_t) (! (sigExtra & 0x7FFFFFFF) & roundNearEven); + exp = ((sig & UINT64_C( 0x8000000000000000 )) != 0); + } + goto packReturn; + } + if ( + (0x7FFE < exp) + || ((exp == 0x7FFE) && (sig == UINT64_C( 0xFFFFFFFFFFFFFFFF )) + && doIncrement) + ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + roundMask = 0; + overflow: + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + if ( + roundNearEven + || (roundingMode == softfloat_round_near_maxMag) + || (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + ) { + exp = 0x7FFF; + sig = UINT64_C( 0x8000000000000000 ); + } else { + exp = 0x7FFE; + sig = ~roundMask; + } + goto packReturn; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( sigExtra ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig |= 1; + goto packReturn; + } +#endif + } + if ( doIncrement ) { + ++sig; + if ( ! sig ) { + ++exp; + sig = UINT64_C( 0x8000000000000000 ); + } else { + sig &= ~(uint64_t) (! (sigExtra & 0x7FFFFFFF) & roundNearEven); + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + packReturn: + zSPtr->signExp = packToExtF80UI64( sign, exp ); + zSPtr->signif = sig; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackMToF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackMToF128M.c new file mode 100644 index 000000000..fad5d08df --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackMToF128M.c @@ -0,0 +1,178 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +void + softfloat_roundPackMToF128M( + bool sign, int32_t exp, uint32_t *extSigPtr, uint32_t *zWPtr ) +{ + uint_fast8_t roundingMode; + bool roundNearEven; + uint32_t sigExtra; + bool doIncrement, isTiny; + static const uint32_t maxSig[4] = + INIT_UINTM4( 0x0001FFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF ); + uint32_t ui, uj; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundingMode = softfloat_roundingMode; + roundNearEven = (roundingMode == softfloat_round_near_even); + sigExtra = extSigPtr[indexWordLo( 5 )]; + doIncrement = (0x80000000 <= sigExtra); + if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) { + doIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + && sigExtra; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x7FFD <= (uint32_t) exp ) { + if ( exp < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess + == softfloat_tininess_beforeRounding) + || (exp < -1) + || ! doIncrement + || (softfloat_compare128M( + extSigPtr + indexMultiwordHi( 5, 4 ), maxSig ) + < 0); + softfloat_shiftRightJam160M( extSigPtr, -exp, extSigPtr ); + exp = 0; + sigExtra = extSigPtr[indexWordLo( 5 )]; + if ( isTiny && sigExtra ) { + softfloat_raiseFlags( softfloat_flag_underflow ); + } + doIncrement = (0x80000000 <= sigExtra); + if ( + ! roundNearEven + && (roundingMode != softfloat_round_near_maxMag) + ) { + doIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + && sigExtra; + } + } else if ( + (0x7FFD < exp) + || ((exp == 0x7FFD) && doIncrement + && (softfloat_compare128M( + extSigPtr + indexMultiwordHi( 5, 4 ), maxSig ) + == 0)) + ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + if ( + roundNearEven + || (roundingMode == softfloat_round_near_maxMag) + || (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + ) { + ui = packToF128UI96( sign, 0x7FFF, 0 ); + uj = 0; + } else { + ui = packToF128UI96( sign, 0x7FFE, 0x0000FFFF ); + uj = 0xFFFFFFFF; + } + zWPtr[indexWordHi( 4 )] = ui; + zWPtr[indexWord( 4, 2 )] = uj; + zWPtr[indexWord( 4, 1 )] = uj; + zWPtr[indexWord( 4, 0 )] = uj; + return; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uj = extSigPtr[indexWord( 5, 1 )]; + if ( sigExtra ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + uj |= 1; + goto noIncrementPackReturn; + } +#endif + } + if ( doIncrement ) { + ++uj; + if ( uj ) { + if ( ! (sigExtra & 0x7FFFFFFF) && roundNearEven ) uj &= ~1; + zWPtr[indexWord( 4, 2 )] = extSigPtr[indexWord( 5, 3 )]; + zWPtr[indexWord( 4, 1 )] = extSigPtr[indexWord( 5, 2 )]; + zWPtr[indexWord( 4, 0 )] = uj; + ui = extSigPtr[indexWordHi( 5 )]; + } else { + zWPtr[indexWord( 4, 0 )] = uj; + ui = extSigPtr[indexWord( 5, 2 )] + 1; + zWPtr[indexWord( 4, 1 )] = ui; + uj = extSigPtr[indexWord( 5, 3 )]; + if ( ui ) { + zWPtr[indexWord( 4, 2 )] = uj; + ui = extSigPtr[indexWordHi( 5 )]; + } else { + ++uj; + zWPtr[indexWord( 4, 2 )] = uj; + ui = extSigPtr[indexWordHi( 5 )]; + if ( ! uj ) ++ui; + } + } + } else { + noIncrementPackReturn: + zWPtr[indexWord( 4, 0 )] = uj; + ui = extSigPtr[indexWord( 5, 2 )]; + zWPtr[indexWord( 4, 1 )] = ui; + uj |= ui; + ui = extSigPtr[indexWord( 5, 3 )]; + zWPtr[indexWord( 4, 2 )] = ui; + uj |= ui; + ui = extSigPtr[indexWordHi( 5 )]; + uj |= ui; + if ( ! uj ) exp = 0; + } + zWPtr[indexWordHi( 4 )] = packToF128UI96( sign, exp, ui ); + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToExtF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToExtF80.c new file mode 100644 index 000000000..a5ea38c60 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToExtF80.c @@ -0,0 +1,256 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +extFloat80_t + softfloat_roundPackToExtF80( + bool sign, + int_fast32_t exp, + uint_fast64_t sig, + uint_fast64_t sigExtra, + uint_fast8_t roundingPrecision + ) +{ + uint_fast8_t roundingMode; + bool roundNearEven; + uint_fast64_t roundIncrement, roundMask, roundBits; + bool isTiny, doIncrement; + struct uint64_extra sig64Extra; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundingMode = softfloat_roundingMode; + roundNearEven = (roundingMode == softfloat_round_near_even); + if ( roundingPrecision == 80 ) goto precision80; + if ( roundingPrecision == 64 ) { + roundIncrement = UINT64_C( 0x0000000000000400 ); + roundMask = UINT64_C( 0x00000000000007FF ); + } else if ( roundingPrecision == 32 ) { + roundIncrement = UINT64_C( 0x0000008000000000 ); + roundMask = UINT64_C( 0x000000FFFFFFFFFF ); + } else { + goto precision80; + } + sig |= (sigExtra != 0); + if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) { + roundIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + ? roundMask + : 0; + } + roundBits = sig & roundMask; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x7FFD <= (uint32_t) (exp - 1) ) { + if ( exp <= 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess + == softfloat_tininess_beforeRounding) + || (exp < 0) + || (sig <= (uint64_t) (sig + roundIncrement)); + sig = softfloat_shiftRightJam64( sig, 1 - exp ); + roundBits = sig & roundMask; + if ( roundBits ) { + if ( isTiny ) softfloat_raiseFlags( softfloat_flag_underflow ); + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig |= roundMask + 1; + } +#endif + } + sig += roundIncrement; + exp = ((sig & UINT64_C( 0x8000000000000000 )) != 0); + roundIncrement = roundMask + 1; + if ( roundNearEven && (roundBits<<1 == roundIncrement) ) { + roundMask |= roundIncrement; + } + sig &= ~roundMask; + goto packReturn; + } + if ( + (0x7FFE < exp) + || ((exp == 0x7FFE) && ((uint64_t) (sig + roundIncrement) < sig)) + ) { + goto overflow; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( roundBits ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig = (sig & ~roundMask) | (roundMask + 1); + goto packReturn; + } +#endif + } + sig = (uint64_t) (sig + roundIncrement); + if ( sig < roundIncrement ) { + ++exp; + sig = UINT64_C( 0x8000000000000000 ); + } + roundIncrement = roundMask + 1; + if ( roundNearEven && (roundBits<<1 == roundIncrement) ) { + roundMask |= roundIncrement; + } + sig &= ~roundMask; + goto packReturn; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + precision80: + doIncrement = (UINT64_C( 0x8000000000000000 ) <= sigExtra); + if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) { + doIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + && sigExtra; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x7FFD <= (uint32_t) (exp - 1) ) { + if ( exp <= 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess + == softfloat_tininess_beforeRounding) + || (exp < 0) + || ! doIncrement + || (sig < UINT64_C( 0xFFFFFFFFFFFFFFFF )); + sig64Extra = + softfloat_shiftRightJam64Extra( sig, sigExtra, 1 - exp ); + exp = 0; + sig = sig64Extra.v; + sigExtra = sig64Extra.extra; + if ( sigExtra ) { + if ( isTiny ) softfloat_raiseFlags( softfloat_flag_underflow ); + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig |= 1; + goto packReturn; + } +#endif + } + doIncrement = (UINT64_C( 0x8000000000000000 ) <= sigExtra); + if ( + ! roundNearEven + && (roundingMode != softfloat_round_near_maxMag) + ) { + doIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + && sigExtra; + } + if ( doIncrement ) { + ++sig; + sig &= + ~(uint_fast64_t) + (! (sigExtra & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + & roundNearEven); + exp = ((sig & UINT64_C( 0x8000000000000000 )) != 0); + } + goto packReturn; + } + if ( + (0x7FFE < exp) + || ((exp == 0x7FFE) && (sig == UINT64_C( 0xFFFFFFFFFFFFFFFF )) + && doIncrement) + ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + roundMask = 0; + overflow: + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + if ( + roundNearEven + || (roundingMode == softfloat_round_near_maxMag) + || (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + ) { + exp = 0x7FFF; + sig = UINT64_C( 0x8000000000000000 ); + } else { + exp = 0x7FFE; + sig = ~roundMask; + } + goto packReturn; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( sigExtra ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig |= 1; + goto packReturn; + } +#endif + } + if ( doIncrement ) { + ++sig; + if ( ! sig ) { + ++exp; + sig = UINT64_C( 0x8000000000000000 ); + } else { + sig &= + ~(uint_fast64_t) + (! (sigExtra & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + & roundNearEven); + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + packReturn: + uZ.s.signExp = packToExtF80UI64( sign, exp ); + uZ.s.signif = sig; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF128.c new file mode 100644 index 000000000..6688c524b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF128.c @@ -0,0 +1,171 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float128_t + softfloat_roundPackToF128( + bool sign, + int_fast32_t exp, + uint_fast64_t sig64, + uint_fast64_t sig0, + uint_fast64_t sigExtra + ) +{ + uint_fast8_t roundingMode; + bool roundNearEven, doIncrement, isTiny; + struct uint128_extra sig128Extra; + uint_fast64_t uiZ64, uiZ0; + struct uint128 sig128; + union ui128_f128 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundingMode = softfloat_roundingMode; + roundNearEven = (roundingMode == softfloat_round_near_even); + doIncrement = (UINT64_C( 0x8000000000000000 ) <= sigExtra); + if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) { + doIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + && sigExtra; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x7FFD <= (uint32_t) exp ) { + if ( exp < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess + == softfloat_tininess_beforeRounding) + || (exp < -1) + || ! doIncrement + || softfloat_lt128( + sig64, + sig0, + UINT64_C( 0x0001FFFFFFFFFFFF ), + UINT64_C( 0xFFFFFFFFFFFFFFFF ) + ); + sig128Extra = + softfloat_shiftRightJam128Extra( sig64, sig0, sigExtra, -exp ); + sig64 = sig128Extra.v.v64; + sig0 = sig128Extra.v.v0; + sigExtra = sig128Extra.extra; + exp = 0; + if ( isTiny && sigExtra ) { + softfloat_raiseFlags( softfloat_flag_underflow ); + } + doIncrement = (UINT64_C( 0x8000000000000000 ) <= sigExtra); + if ( + ! roundNearEven + && (roundingMode != softfloat_round_near_maxMag) + ) { + doIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + && sigExtra; + } + } else if ( + (0x7FFD < exp) + || ((exp == 0x7FFD) + && softfloat_eq128( + sig64, + sig0, + UINT64_C( 0x0001FFFFFFFFFFFF ), + UINT64_C( 0xFFFFFFFFFFFFFFFF ) + ) + && doIncrement) + ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + if ( + roundNearEven + || (roundingMode == softfloat_round_near_maxMag) + || (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + ) { + uiZ64 = packToF128UI64( sign, 0x7FFF, 0 ); + uiZ0 = 0; + } else { + uiZ64 = + packToF128UI64( + sign, 0x7FFE, UINT64_C( 0x0000FFFFFFFFFFFF ) ); + uiZ0 = UINT64_C( 0xFFFFFFFFFFFFFFFF ); + } + goto uiZ; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( sigExtra ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig0 |= 1; + goto packReturn; + } +#endif + } + if ( doIncrement ) { + sig128 = softfloat_add128( sig64, sig0, 0, 1 ); + sig64 = sig128.v64; + sig0 = + sig128.v0 + & ~(uint64_t) + (! (sigExtra & UINT64_C( 0x7FFFFFFFFFFFFFFF )) + & roundNearEven); + } else { + if ( ! (sig64 | sig0) ) exp = 0; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + packReturn: + uiZ64 = packToF128UI64( sign, exp, sig64 ); + uiZ0 = sig0; + uiZ: + uZ.ui.v64 = uiZ64; + uZ.ui.v0 = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF16.c new file mode 100644 index 000000000..8d03d3b2c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF16.c @@ -0,0 +1,113 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float16_t + softfloat_roundPackToF16( bool sign, int_fast16_t exp, uint_fast16_t sig ) +{ + uint_fast8_t roundingMode; + bool roundNearEven; + uint_fast8_t roundIncrement, roundBits; + bool isTiny; + uint_fast16_t uiZ; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundingMode = softfloat_roundingMode; + roundNearEven = (roundingMode == softfloat_round_near_even); + roundIncrement = 0x8; + if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) { + roundIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + ? 0xF + : 0; + } + roundBits = sig & 0xF; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x1D <= (unsigned int) exp ) { + if ( exp < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess == softfloat_tininess_beforeRounding) + || (exp < -1) || (sig + roundIncrement < 0x8000); + sig = softfloat_shiftRightJam32( sig, -exp ); + exp = 0; + roundBits = sig & 0xF; + if ( isTiny && roundBits ) { + softfloat_raiseFlags( softfloat_flag_underflow ); + } + } else if ( (0x1D < exp) || (0x8000 <= sig + roundIncrement) ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF16UI( sign, 0x1F, 0 ) - ! roundIncrement; + goto uiZ; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig = (sig + roundIncrement)>>4; + if ( roundBits ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig |= 1; + goto packReturn; + } +#endif + } + sig &= ~(uint_fast16_t) (! (roundBits ^ 8) & roundNearEven); + if ( ! sig ) exp = 0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + packReturn: + uiZ = packToF16UI( sign, exp, sig ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF32.c new file mode 100644 index 000000000..f1eb0c2ab --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF32.c @@ -0,0 +1,113 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float32_t + softfloat_roundPackToF32( bool sign, int_fast16_t exp, uint_fast32_t sig ) +{ + uint_fast8_t roundingMode; + bool roundNearEven; + uint_fast8_t roundIncrement, roundBits; + bool isTiny; + uint_fast32_t uiZ; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundingMode = softfloat_roundingMode; + roundNearEven = (roundingMode == softfloat_round_near_even); + roundIncrement = 0x40; + if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) { + roundIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + ? 0x7F + : 0; + } + roundBits = sig & 0x7F; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0xFD <= (unsigned int) exp ) { + if ( exp < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess == softfloat_tininess_beforeRounding) + || (exp < -1) || (sig + roundIncrement < 0x80000000); + sig = softfloat_shiftRightJam32( sig, -exp ); + exp = 0; + roundBits = sig & 0x7F; + if ( isTiny && roundBits ) { + softfloat_raiseFlags( softfloat_flag_underflow ); + } + } else if ( (0xFD < exp) || (0x80000000 <= sig + roundIncrement) ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF32UI( sign, 0xFF, 0 ) - ! roundIncrement; + goto uiZ; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig = (sig + roundIncrement)>>7; + if ( roundBits ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig |= 1; + goto packReturn; + } +#endif + } + sig &= ~(uint_fast32_t) (! (roundBits ^ 0x40) & roundNearEven); + if ( ! sig ) exp = 0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + packReturn: + uiZ = packToF32UI( sign, exp, sig ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF64.c new file mode 100644 index 000000000..98c1639a4 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundPackToF64.c @@ -0,0 +1,117 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float64_t + softfloat_roundPackToF64( bool sign, int_fast16_t exp, uint_fast64_t sig ) +{ + uint_fast8_t roundingMode; + bool roundNearEven; + uint_fast16_t roundIncrement, roundBits; + bool isTiny; + uint_fast64_t uiZ; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundingMode = softfloat_roundingMode; + roundNearEven = (roundingMode == softfloat_round_near_even); + roundIncrement = 0x200; + if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) { + roundIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + ? 0x3FF + : 0; + } + roundBits = sig & 0x3FF; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x7FD <= (uint16_t) exp ) { + if ( exp < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess == softfloat_tininess_beforeRounding) + || (exp < -1) + || (sig + roundIncrement < UINT64_C( 0x8000000000000000 )); + sig = softfloat_shiftRightJam64( sig, -exp ); + exp = 0; + roundBits = sig & 0x3FF; + if ( isTiny && roundBits ) { + softfloat_raiseFlags( softfloat_flag_underflow ); + } + } else if ( + (0x7FD < exp) + || (UINT64_C( 0x8000000000000000 ) <= sig + roundIncrement) + ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF64UI( sign, 0x7FF, 0 ) - ! roundIncrement; + goto uiZ; + } + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig = (sig + roundIncrement)>>10; + if ( roundBits ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig |= 1; + goto packReturn; + } +#endif + } + sig &= ~(uint_fast64_t) (! (roundBits ^ 0x200) & roundNearEven); + if ( ! sig ) exp = 0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + packReturn: + uiZ = packToF64UI( sign, exp, sig ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToI32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToI32.c new file mode 100644 index 000000000..1999dcf56 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToI32.c @@ -0,0 +1,98 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t + softfloat_roundToI32( + bool sign, uint_fast64_t sig, uint_fast8_t roundingMode, bool exact ) +{ + uint_fast16_t roundIncrement, roundBits; + uint_fast32_t sig32; + union { uint32_t ui; int32_t i; } uZ; + int_fast32_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundIncrement = 0x800; + if ( + (roundingMode != softfloat_round_near_maxMag) + && (roundingMode != softfloat_round_near_even) + ) { + roundIncrement = 0; + if ( + sign + ? (roundingMode == softfloat_round_min) +#ifdef SOFTFLOAT_ROUND_ODD + || (roundingMode == softfloat_round_odd) +#endif + : (roundingMode == softfloat_round_max) + ) { + roundIncrement = 0xFFF; + } + } + roundBits = sig & 0xFFF; + sig += roundIncrement; + if ( sig & UINT64_C( 0xFFFFF00000000000 ) ) goto invalid; + sig32 = sig>>12; + if ( + (roundBits == 0x800) && (roundingMode == softfloat_round_near_even) + ) { + sig32 &= ~(uint_fast32_t) 1; + } + uZ.ui = sign ? -sig32 : sig32; + z = uZ.i; + if ( z && ((z < 0) ^ sign) ) goto invalid; + if ( roundBits ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) z |= 1; +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return sign ? i32_fromNegOverflow : i32_fromPosOverflow; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToI64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToI64.c new file mode 100644 index 000000000..d1e9d2799 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToI64.c @@ -0,0 +1,101 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast64_t + softfloat_roundToI64( + bool sign, + uint_fast64_t sig, + uint_fast64_t sigExtra, + uint_fast8_t roundingMode, + bool exact + ) +{ + union { uint64_t ui; int64_t i; } uZ; + int_fast64_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( + (roundingMode == softfloat_round_near_maxMag) + || (roundingMode == softfloat_round_near_even) + ) { + if ( UINT64_C( 0x8000000000000000 ) <= sigExtra ) goto increment; + } else { + if ( + sigExtra + && (sign + ? (roundingMode == softfloat_round_min) +#ifdef SOFTFLOAT_ROUND_ODD + || (roundingMode == softfloat_round_odd) +#endif + : (roundingMode == softfloat_round_max)) + ) { + increment: + ++sig; + if ( !sig ) goto invalid; + if ( + (sigExtra == UINT64_C( 0x8000000000000000 )) + && (roundingMode == softfloat_round_near_even) + ) { + sig &= ~(uint_fast64_t) 1; + } + } + } + uZ.ui = sign ? -sig : sig; + z = uZ.i; + if ( z && ((z < 0) ^ sign) ) goto invalid; + if ( sigExtra ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) z |= 1; +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return sign ? i64_fromNegOverflow : i64_fromPosOverflow; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToUI32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToUI32.c new file mode 100644 index 000000000..eaad69e70 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToUI32.c @@ -0,0 +1,93 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t + softfloat_roundToUI32( + bool sign, uint_fast64_t sig, uint_fast8_t roundingMode, bool exact ) +{ + uint_fast16_t roundIncrement, roundBits; + uint_fast32_t z; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + roundIncrement = 0x800; + if ( + (roundingMode != softfloat_round_near_maxMag) + && (roundingMode != softfloat_round_near_even) + ) { + roundIncrement = 0; + if ( sign ) { + if ( !sig ) return 0; + if ( roundingMode == softfloat_round_min ) goto invalid; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) goto invalid; +#endif + } else { + if ( roundingMode == softfloat_round_max ) roundIncrement = 0xFFF; + } + } + roundBits = sig & 0xFFF; + sig += roundIncrement; + if ( sig & UINT64_C( 0xFFFFF00000000000 ) ) goto invalid; + z = sig>>12; + if ( + (roundBits == 0x800) && (roundingMode == softfloat_round_near_even) + ) { + z &= ~(uint_fast32_t) 1; + } + if ( sign && z ) goto invalid; + if ( roundBits ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) z |= 1; +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return z; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToUI64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToUI64.c new file mode 100644 index 000000000..0ba78a640 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_roundToUI64.c @@ -0,0 +1,97 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast64_t + softfloat_roundToUI64( + bool sign, + uint_fast64_t sig, + uint_fast64_t sigExtra, + uint_fast8_t roundingMode, + bool exact + ) +{ + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( + (roundingMode == softfloat_round_near_maxMag) + || (roundingMode == softfloat_round_near_even) + ) { + if ( UINT64_C( 0x8000000000000000 ) <= sigExtra ) goto increment; + } else { + if ( sign ) { + if ( !(sig | sigExtra) ) return 0; + if ( roundingMode == softfloat_round_min ) goto invalid; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) goto invalid; +#endif + } else { + if ( (roundingMode == softfloat_round_max) && sigExtra ) { + increment: + ++sig; + if ( !sig ) goto invalid; + if ( + (sigExtra == UINT64_C( 0x8000000000000000 )) + && (roundingMode == softfloat_round_near_even) + ) { + sig &= ~(uint_fast64_t) 1; + } + } + } + } + if ( sign && sig ) goto invalid; + if ( sigExtra ) { +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) sig |= 1; +#endif + if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact; + } + return sig; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + return sign ? ui64_fromNegOverflow : ui64_fromPosOverflow; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftLeftM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftLeftM.c new file mode 100644 index 000000000..feafc67bf --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftLeftM.c @@ -0,0 +1,91 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_shiftLeftM + +#define softfloat_shiftLeftM softfloat_shiftLeftM +#include "primitives.h" + +void + softfloat_shiftLeftM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint32_t dist, + uint32_t *zPtr + ) +{ + uint32_t wordDist; + uint_fast8_t innerDist; + uint32_t *destPtr; + uint_fast8_t i; + + wordDist = dist>>5; + if ( wordDist < size_words ) { + aPtr += indexMultiwordLoBut( size_words, wordDist ); + innerDist = dist & 31; + if ( innerDist ) { + softfloat_shortShiftLeftM( + size_words - wordDist, + aPtr, + innerDist, + zPtr + indexMultiwordHiBut( size_words, wordDist ) + ); + if ( ! wordDist ) return; + } else { + aPtr += indexWordHi( size_words - wordDist ); + destPtr = zPtr + indexWordHi( size_words ); + for ( i = size_words - wordDist; i; --i ) { + *destPtr = *aPtr; + aPtr -= wordIncr; + destPtr -= wordIncr; + } + } + zPtr += indexMultiwordLo( size_words, wordDist ); + } else { + wordDist = size_words; + } + do { + *zPtr++ = 0; + --wordDist; + } while ( wordDist ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftNormSigF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftNormSigF128M.c new file mode 100644 index 000000000..4820f3908 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftNormSigF128M.c @@ -0,0 +1,78 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" + +int + softfloat_shiftNormSigF128M( + const uint32_t *wPtr, uint_fast8_t shiftDist, uint32_t *sigPtr ) +{ + uint32_t wordSig; + int32_t exp; + uint32_t leadingBit; + + wordSig = wPtr[indexWordHi( 4 )]; + exp = expF128UI96( wordSig ); + if ( exp ) { + softfloat_shortShiftLeft128M( wPtr, shiftDist, sigPtr ); + leadingBit = 0x00010000<<shiftDist; + sigPtr[indexWordHi( 4 )] = + (sigPtr[indexWordHi( 4 )] & (leadingBit - 1)) | leadingBit; + } else { + exp = 16; + wordSig &= 0x7FFFFFFF; + if ( ! wordSig ) { + exp = -16; + wordSig = wPtr[indexWord( 4, 2 )]; + if ( ! wordSig ) { + exp = -48; + wordSig = wPtr[indexWord( 4, 1 )]; + if ( ! wordSig ) { + wordSig = wPtr[indexWord( 4, 0 )]; + if ( ! wordSig ) return -128; + exp = -80; + } + } + } + exp -= softfloat_countLeadingZeros32( wordSig ); + softfloat_shiftLeft128M( wPtr, 1 - exp + shiftDist, sigPtr ); + } + return exp; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam128.c new file mode 100644 index 000000000..633e1127c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam128.c @@ -0,0 +1,69 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shiftRightJam128 + +struct uint128 + softfloat_shiftRightJam128( uint64_t a64, uint64_t a0, uint_fast32_t dist ) +{ + uint_fast8_t u8NegDist; + struct uint128 z; + + if ( dist < 64 ) { + u8NegDist = -dist; + z.v64 = a64>>dist; + z.v0 = + a64<<(u8NegDist & 63) | a0>>dist + | ((uint64_t) (a0<<(u8NegDist & 63)) != 0); + } else { + z.v64 = 0; + z.v0 = + (dist < 127) + ? a64>>(dist & 63) + | (((a64 & (((uint_fast64_t) 1<<(dist & 63)) - 1)) | a0) + != 0) + : ((a64 | a0) != 0); + } + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam128Extra.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam128Extra.c new file mode 100644 index 000000000..efdfc5432 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam128Extra.c @@ -0,0 +1,77 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shiftRightJam128Extra + +struct uint128_extra + softfloat_shiftRightJam128Extra( + uint64_t a64, uint64_t a0, uint64_t extra, uint_fast32_t dist ) +{ + uint_fast8_t u8NegDist; + struct uint128_extra z; + + u8NegDist = -dist; + if ( dist < 64 ) { + z.v.v64 = a64>>dist; + z.v.v0 = a64<<(u8NegDist & 63) | a0>>dist; + z.extra = a0<<(u8NegDist & 63); + } else { + z.v.v64 = 0; + if ( dist == 64 ) { + z.v.v0 = a64; + z.extra = a0; + } else { + extra |= a0; + if ( dist < 128 ) { + z.v.v0 = a64>>(dist & 63); + z.extra = a64<<(u8NegDist & 63); + } else { + z.v.v0 = 0; + z.extra = (dist == 128) ? a64 : (a64 != 0); + } + } + } + z.extra |= (extra != 0); + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam256M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam256M.c new file mode 100644 index 000000000..36601f87b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam256M.c @@ -0,0 +1,126 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shiftRightJam256M + +static + void + softfloat_shortShiftRightJamM( + uint_fast8_t size_words, + const uint64_t *aPtr, + uint_fast8_t dist, + uint64_t *zPtr + ) +{ + uint_fast8_t uNegDist; + unsigned int index, lastIndex; + uint64_t partWordZ, wordA; + + uNegDist = -dist; + index = indexWordLo( size_words ); + lastIndex = indexWordHi( size_words ); + wordA = aPtr[index]; + partWordZ = wordA>>dist; + if ( partWordZ<<dist != wordA ) partWordZ |= 1; + while ( index != lastIndex ) { + wordA = aPtr[index + wordIncr]; + zPtr[index] = wordA<<(uNegDist & 63) | partWordZ; + index += wordIncr; + partWordZ = wordA>>dist; + } + zPtr[index] = partWordZ; + +} + +void + softfloat_shiftRightJam256M( + const uint64_t *aPtr, uint_fast32_t dist, uint64_t *zPtr ) +{ + uint64_t wordJam; + uint_fast32_t wordDist; + uint64_t *ptr; + uint_fast8_t i, innerDist; + + wordJam = 0; + wordDist = dist>>6; + if ( wordDist ) { + if ( 4 < wordDist ) wordDist = 4; + ptr = (uint64_t *) (aPtr + indexMultiwordLo( 4, wordDist )); + i = wordDist; + do { + wordJam = *ptr++; + if ( wordJam ) break; + --i; + } while ( i ); + ptr = zPtr; + } + if ( wordDist < 4 ) { + aPtr += indexMultiwordHiBut( 4, wordDist ); + innerDist = dist & 63; + if ( innerDist ) { + softfloat_shortShiftRightJamM( + 4 - wordDist, + aPtr, + innerDist, + zPtr + indexMultiwordLoBut( 4, wordDist ) + ); + if ( ! wordDist ) goto wordJam; + } else { + aPtr += indexWordLo( 4 - wordDist ); + ptr = zPtr + indexWordLo( 4 ); + for ( i = 4 - wordDist; i; --i ) { + *ptr = *aPtr; + aPtr += wordIncr; + ptr += wordIncr; + } + } + ptr = zPtr + indexMultiwordHi( 4, wordDist ); + } + do { + *ptr++ = 0; + --wordDist; + } while ( wordDist ); + wordJam: + if ( wordJam ) zPtr[indexWordLo( 4 )] |= 1; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam32.c new file mode 100644 index 000000000..be4622abe --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam32.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_shiftRightJam32 + +uint32_t softfloat_shiftRightJam32( uint32_t a, uint_fast16_t dist ) +{ + + return + (dist < 31) ? a>>dist | ((uint32_t) (a<<(-dist & 31)) != 0) : (a != 0); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam64.c new file mode 100644 index 000000000..733c1736c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam64.c @@ -0,0 +1,51 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_shiftRightJam64 + +uint64_t softfloat_shiftRightJam64( uint64_t a, uint_fast32_t dist ) +{ + + return + (dist < 63) ? a>>dist | ((uint64_t) (a<<(-dist & 63)) != 0) : (a != 0); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam64Extra.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam64Extra.c new file mode 100644 index 000000000..2c5609b1c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJam64Extra.c @@ -0,0 +1,62 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shiftRightJam64Extra + +struct uint64_extra + softfloat_shiftRightJam64Extra( + uint64_t a, uint64_t extra, uint_fast32_t dist ) +{ + struct uint64_extra z; + + if ( dist < 64 ) { + z.v = a>>dist; + z.extra = a<<(-dist & 63); + } else { + z.v = 0; + z.extra = (dist == 64) ? a : (a != 0); + } + z.extra |= (extra != 0); + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJamM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJamM.c new file mode 100644 index 000000000..0a0dd7d75 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightJamM.c @@ -0,0 +1,101 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_shiftRightJamM + +#define softfloat_shiftRightJamM softfloat_shiftRightJamM +#include "primitives.h" + +void + softfloat_shiftRightJamM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint32_t dist, + uint32_t *zPtr + ) +{ + uint32_t wordJam, wordDist, *ptr; + uint_fast8_t i, innerDist; + + wordJam = 0; + wordDist = dist>>5; + if ( wordDist ) { + if ( size_words < wordDist ) wordDist = size_words; + ptr = (uint32_t *) (aPtr + indexMultiwordLo( size_words, wordDist )); + i = wordDist; + do { + wordJam = *ptr++; + if ( wordJam ) break; + --i; + } while ( i ); + ptr = zPtr; + } + if ( wordDist < size_words ) { + aPtr += indexMultiwordHiBut( size_words, wordDist ); + innerDist = dist & 31; + if ( innerDist ) { + softfloat_shortShiftRightJamM( + size_words - wordDist, + aPtr, + innerDist, + zPtr + indexMultiwordLoBut( size_words, wordDist ) + ); + if ( ! wordDist ) goto wordJam; + } else { + aPtr += indexWordLo( size_words - wordDist ); + ptr = zPtr + indexWordLo( size_words ); + for ( i = size_words - wordDist; i; --i ) { + *ptr = *aPtr; + aPtr += wordIncr; + ptr += wordIncr; + } + } + ptr = zPtr + indexMultiwordHi( size_words, wordDist ); + } + do { + *ptr++ = 0; + --wordDist; + } while ( wordDist ); + wordJam: + if ( wordJam ) zPtr[indexWordLo( size_words )] |= 1; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightM.c new file mode 100644 index 000000000..6ac383f0f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shiftRightM.c @@ -0,0 +1,91 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_shiftRightM + +#define softfloat_shiftRightM softfloat_shiftRightM +#include "primitives.h" + +void + softfloat_shiftRightM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint32_t dist, + uint32_t *zPtr + ) +{ + uint32_t wordDist; + uint_fast8_t innerDist; + uint32_t *destPtr; + uint_fast8_t i; + + wordDist = dist>>5; + if ( wordDist < size_words ) { + aPtr += indexMultiwordHiBut( size_words, wordDist ); + innerDist = dist & 31; + if ( innerDist ) { + softfloat_shortShiftRightM( + size_words - wordDist, + aPtr, + innerDist, + zPtr + indexMultiwordLoBut( size_words, wordDist ) + ); + if ( ! wordDist ) return; + } else { + aPtr += indexWordLo( size_words - wordDist ); + destPtr = zPtr + indexWordLo( size_words ); + for ( i = size_words - wordDist; i; --i ) { + *destPtr = *aPtr; + aPtr += wordIncr; + destPtr += wordIncr; + } + } + zPtr += indexMultiwordHi( size_words, wordDist ); + } else { + wordDist = size_words; + } + do { + *zPtr++ = 0; + --wordDist; + } while ( wordDist ); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftLeft128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftLeft128.c new file mode 100644 index 000000000..9e0b8beee --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftLeft128.c @@ -0,0 +1,55 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shortShiftLeft128 + +struct uint128 + softfloat_shortShiftLeft128( uint64_t a64, uint64_t a0, uint_fast8_t dist ) +{ + struct uint128 z; + + z.v64 = a64<<dist | a0>>(-dist & 63); + z.v0 = a0<<dist; + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftLeft64To96M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftLeft64To96M.c new file mode 100644 index 000000000..2f442eccd --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftLeft64To96M.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shortShiftLeft64To96M + +void + softfloat_shortShiftLeft64To96M( + uint64_t a, uint_fast8_t dist, uint32_t *zPtr ) +{ + + zPtr[indexWord( 3, 0 )] = (uint32_t) a<<dist; + a >>= 32 - dist; + zPtr[indexWord( 3, 2 )] = a>>32; + zPtr[indexWord( 3, 1 )] = a; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftLeftM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftLeftM.c new file mode 100644 index 000000000..b947c63ce --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftLeftM.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shortShiftLeftM + +void + softfloat_shortShiftLeftM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint_fast8_t dist, + uint32_t *zPtr + ) +{ + uint_fast8_t uNegDist; + unsigned int index, lastIndex; + uint32_t partWordZ, wordA; + + uNegDist = -dist; + index = indexWordHi( size_words ); + lastIndex = indexWordLo( size_words ); + partWordZ = aPtr[index]<<dist; + while ( index != lastIndex ) { + wordA = aPtr[index - wordIncr]; + zPtr[index] = partWordZ | wordA>>(uNegDist & 31); + index -= wordIncr; + partWordZ = wordA<<dist; + } + zPtr[index] = partWordZ; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRight128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRight128.c new file mode 100644 index 000000000..16a5cc017 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRight128.c @@ -0,0 +1,55 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shortShiftRight128 + +struct uint128 + softfloat_shortShiftRight128( uint64_t a64, uint64_t a0, uint_fast8_t dist ) +{ + struct uint128 z; + + z.v64 = a64>>dist; + z.v0 = a64<<(-dist & 63) | a0>>dist; + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightExtendM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightExtendM.c new file mode 100644 index 000000000..92c786af8 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightExtendM.c @@ -0,0 +1,73 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shortShiftRightExtendM + +void + softfloat_shortShiftRightExtendM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint_fast8_t dist, + uint32_t *zPtr + ) +{ + uint_fast8_t uNegDist; + unsigned int indexA, lastIndexA; + uint32_t partWordZ, wordA; + + uNegDist = -dist; + indexA = indexWordLo( size_words ); + lastIndexA = indexWordHi( size_words ); + zPtr += indexWordLo( size_words + 1 ); + partWordZ = 0; + for (;;) { + wordA = aPtr[indexA]; + *zPtr = wordA<<(uNegDist & 31) | partWordZ; + zPtr += wordIncr; + partWordZ = wordA>>dist; + if ( indexA == lastIndexA ) break; + indexA += wordIncr; + } + *zPtr = partWordZ; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam128.c new file mode 100644 index 000000000..8a75a71ac --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam128.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shortShiftRightJam128 + +struct uint128 + softfloat_shortShiftRightJam128( + uint64_t a64, uint64_t a0, uint_fast8_t dist ) +{ + uint_fast8_t uNegDist; + struct uint128 z; + + uNegDist = -dist; + z.v64 = a64>>dist; + z.v0 = + a64<<(uNegDist & 63) | a0>>dist + | ((uint64_t) (a0<<(uNegDist & 63)) != 0); + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam128Extra.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam128Extra.c new file mode 100644 index 000000000..b5d4e1c31 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam128Extra.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shortShiftRightJam128Extra + +struct uint128_extra + softfloat_shortShiftRightJam128Extra( + uint64_t a64, uint64_t a0, uint64_t extra, uint_fast8_t dist ) +{ + uint_fast8_t uNegDist; + struct uint128_extra z; + + uNegDist = -dist; + z.v.v64 = a64>>dist; + z.v.v0 = a64<<(uNegDist & 63) | a0>>dist; + z.extra = a0<<(uNegDist & 63) | (extra != 0); + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam64.c new file mode 100644 index 000000000..1a7724f98 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam64.c @@ -0,0 +1,50 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" + +#ifndef softfloat_shortShiftRightJam64 + +uint64_t softfloat_shortShiftRightJam64( uint64_t a, uint_fast8_t dist ) +{ + + return a>>dist | ((a & (((uint_fast64_t) 1<<dist) - 1)) != 0); + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam64Extra.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam64Extra.c new file mode 100644 index 000000000..680369c7a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJam64Extra.c @@ -0,0 +1,56 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shortShiftRightJam64Extra + +struct uint64_extra + softfloat_shortShiftRightJam64Extra( + uint64_t a, uint64_t extra, uint_fast8_t dist ) +{ + struct uint64_extra z; + + z.v = a>>dist; + z.extra = a<<(-dist & 63) | (extra != 0); + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJamM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJamM.c new file mode 100644 index 000000000..60f698b9f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightJamM.c @@ -0,0 +1,72 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shortShiftRightJamM + +void + softfloat_shortShiftRightJamM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint_fast8_t dist, + uint32_t *zPtr + ) +{ + uint_fast8_t uNegDist; + unsigned int index, lastIndex; + uint32_t partWordZ, wordA; + + uNegDist = -dist; + index = indexWordLo( size_words ); + lastIndex = indexWordHi( size_words ); + wordA = aPtr[index]; + partWordZ = wordA>>dist; + if ( partWordZ<<dist != wordA ) partWordZ |= 1; + while ( index != lastIndex ) { + wordA = aPtr[index + wordIncr]; + zPtr[index] = wordA<<(uNegDist & 31) | partWordZ; + index += wordIncr; + partWordZ = wordA>>dist; + } + zPtr[index] = partWordZ; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightM.c new file mode 100644 index 000000000..8a165fe45 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_shortShiftRightM.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_shortShiftRightM + +void + softfloat_shortShiftRightM( + uint_fast8_t size_words, + const uint32_t *aPtr, + uint_fast8_t dist, + uint32_t *zPtr + ) +{ + uint_fast8_t uNegDist; + unsigned int index, lastIndex; + uint32_t partWordZ, wordA; + + uNegDist = -dist; + index = indexWordLo( size_words ); + lastIndex = indexWordHi( size_words ); + partWordZ = aPtr[index]>>dist; + while ( index != lastIndex ) { + wordA = aPtr[index + wordIncr]; + zPtr[index] = wordA<<(uNegDist & 31) | partWordZ; + index += wordIncr; + partWordZ = wordA>>dist; + } + zPtr[index] = partWordZ; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_sub128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_sub128.c new file mode 100644 index 000000000..4691aec19 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_sub128.c @@ -0,0 +1,55 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_sub128 + +struct uint128 + softfloat_sub128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) +{ + struct uint128 z; + + z.v0 = a0 - b0; + z.v64 = a64 - b64 - (a0 < b0); + return z; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_sub1XM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_sub1XM.c new file mode 100644 index 000000000..6c79a8b2e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_sub1XM.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_sub1XM + +void softfloat_sub1XM( uint_fast8_t size_words, uint32_t *zPtr ) +{ + unsigned int index, lastIndex; + uint32_t wordA; + + index = indexWordLo( size_words ); + lastIndex = indexWordHi( size_words ); + for (;;) { + wordA = zPtr[index]; + zPtr[index] = wordA - 1; + if ( wordA || (index == lastIndex) ) break; + index += wordIncr; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_sub256M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_sub256M.c new file mode 100644 index 000000000..a1f9f899c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_sub256M.c @@ -0,0 +1,65 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_sub256M + +void + softfloat_sub256M( + const uint64_t *aPtr, const uint64_t *bPtr, uint64_t *zPtr ) +{ + unsigned int index; + uint_fast8_t borrow; + uint64_t wordA, wordB; + + index = indexWordLo( 4 ); + borrow = 0; + for (;;) { + wordA = aPtr[index]; + wordB = bPtr[index]; + zPtr[index] = wordA - wordB - borrow; + if ( index == indexWordHi( 4 ) ) break; + borrow = borrow ? (wordA <= wordB) : (wordA < wordB); + index += wordIncr; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subM.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subM.c new file mode 100644 index 000000000..213b0bf6d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subM.c @@ -0,0 +1,70 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "primitiveTypes.h" + +#ifndef softfloat_subM + +void + softfloat_subM( + uint_fast8_t size_words, + const uint32_t *aPtr, + const uint32_t *bPtr, + uint32_t *zPtr + ) +{ + unsigned int index, lastIndex; + uint_fast8_t borrow; + uint32_t wordA, wordB; + + index = indexWordLo( size_words ); + lastIndex = indexWordHi( size_words ); + borrow = 0; + for (;;) { + wordA = aPtr[index]; + wordB = bPtr[index]; + zPtr[index] = wordA - wordB - borrow; + if ( index == lastIndex ) break; + borrow = borrow ? (wordA <= wordB) : (wordA < wordB); + index += wordIncr; + } + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsExtF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsExtF80.c new file mode 100644 index 000000000..86ffd9b89 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsExtF80.c @@ -0,0 +1,158 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extFloat80_t + softfloat_subMagsExtF80( + uint_fast16_t uiA64, + uint_fast64_t uiA0, + uint_fast16_t uiB64, + uint_fast64_t uiB0, + bool signZ + ) +{ + int_fast32_t expA; + uint_fast64_t sigA; + int_fast32_t expB; + uint_fast64_t sigB; + int_fast32_t expDiff; + uint_fast16_t uiZ64; + uint_fast64_t uiZ0; + int_fast32_t expZ; + uint_fast64_t sigExtra; + struct uint128 sig128, uiZ; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expExtF80UI64( uiA64 ); + sigA = uiA0; + expB = expExtF80UI64( uiB64 ); + sigB = uiB0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( 0 < expDiff ) goto expABigger; + if ( expDiff < 0 ) goto expBBigger; + if ( expA == 0x7FFF ) { + if ( (sigA | sigB) & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) { + goto propagateNaN; + } + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ64 = defaultNaNExtF80UI64; + uiZ0 = defaultNaNExtF80UI0; + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA; + if ( ! expZ ) expZ = 1; + sigExtra = 0; + if ( sigB < sigA ) goto aBigger; + if ( sigA < sigB ) goto bBigger; + uiZ64 = + packToExtF80UI64( (softfloat_roundingMode == softfloat_round_min), 0 ); + uiZ0 = 0; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expBBigger: + if ( expB == 0x7FFF ) { + if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN; + uiZ64 = packToExtF80UI64( signZ ^ 1, 0x7FFF ); + uiZ0 = UINT64_C( 0x8000000000000000 ); + goto uiZ; + } + if ( ! expA ) { + ++expDiff; + sigExtra = 0; + if ( ! expDiff ) goto newlyAlignedBBigger; + } + sig128 = softfloat_shiftRightJam128( sigA, 0, -expDiff ); + sigA = sig128.v64; + sigExtra = sig128.v0; + newlyAlignedBBigger: + expZ = expB; + bBigger: + signZ = ! signZ; + sig128 = softfloat_sub128( sigB, 0, sigA, sigExtra ); + goto normRoundPack; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expABigger: + if ( expA == 0x7FFF ) { + if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN; + uiZ64 = uiA64; + uiZ0 = uiA0; + goto uiZ; + } + if ( ! expB ) { + --expDiff; + sigExtra = 0; + if ( ! expDiff ) goto newlyAlignedABigger; + } + sig128 = softfloat_shiftRightJam128( sigB, 0, expDiff ); + sigB = sig128.v64; + sigExtra = sig128.v0; + newlyAlignedABigger: + expZ = expA; + aBigger: + sig128 = softfloat_sub128( sigA, 0, sigB, sigExtra ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + normRoundPack: + return + softfloat_normRoundPackToExtF80( + signZ, expZ, sig128.v64, sig128.v0, extF80_roundingPrecision ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 ); + uiZ64 = uiZ.v64; + uiZ0 = uiZ.v0; + uiZ: + uZ.s.signExp = uiZ64; + uZ.s.signif = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF128.c new file mode 100644 index 000000000..595ed7e89 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF128.c @@ -0,0 +1,139 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float128_t + softfloat_subMagsF128( + uint_fast64_t uiA64, + uint_fast64_t uiA0, + uint_fast64_t uiB64, + uint_fast64_t uiB0, + bool signZ + ) +{ + int_fast32_t expA; + struct uint128 sigA; + int_fast32_t expB; + struct uint128 sigB, sigZ; + int_fast32_t expDiff, expZ; + struct uint128 uiZ; + union ui128_f128 uZ; + + expA = expF128UI64( uiA64 ); + sigA.v64 = fracF128UI64( uiA64 ); + sigA.v0 = uiA0; + expB = expF128UI64( uiB64 ); + sigB.v64 = fracF128UI64( uiB64 ); + sigB.v0 = uiB0; + sigA = softfloat_shortShiftLeft128( sigA.v64, sigA.v0, 4 ); + sigB = softfloat_shortShiftLeft128( sigB.v64, sigB.v0, 4 ); + expDiff = expA - expB; + if ( 0 < expDiff ) goto expABigger; + if ( expDiff < 0 ) goto expBBigger; + if ( expA == 0x7FFF ) { + if ( sigA.v64 | sigA.v0 | sigB.v64 | sigB.v0 ) goto propagateNaN; + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ.v64 = defaultNaNF128UI64; + uiZ.v0 = defaultNaNF128UI0; + goto uiZ; + } + expZ = expA; + if ( ! expZ ) expZ = 1; + if ( sigB.v64 < sigA.v64 ) goto aBigger; + if ( sigA.v64 < sigB.v64 ) goto bBigger; + if ( sigB.v0 < sigA.v0 ) goto aBigger; + if ( sigA.v0 < sigB.v0 ) goto bBigger; + uiZ.v64 = + packToF128UI64( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + uiZ.v0 = 0; + goto uiZ; + expBBigger: + if ( expB == 0x7FFF ) { + if ( sigB.v64 | sigB.v0 ) goto propagateNaN; + uiZ.v64 = packToF128UI64( signZ ^ 1, 0x7FFF, 0 ); + uiZ.v0 = 0; + goto uiZ; + } + if ( expA ) { + sigA.v64 |= UINT64_C( 0x0010000000000000 ); + } else { + ++expDiff; + if ( ! expDiff ) goto newlyAlignedBBigger; + } + sigA = softfloat_shiftRightJam128( sigA.v64, sigA.v0, -expDiff ); + newlyAlignedBBigger: + expZ = expB; + sigB.v64 |= UINT64_C( 0x0010000000000000 ); + bBigger: + signZ = ! signZ; + sigZ = softfloat_sub128( sigB.v64, sigB.v0, sigA.v64, sigA.v0 ); + goto normRoundPack; + expABigger: + if ( expA == 0x7FFF ) { + if ( sigA.v64 | sigA.v0 ) goto propagateNaN; + uiZ.v64 = uiA64; + uiZ.v0 = uiA0; + goto uiZ; + } + if ( expB ) { + sigB.v64 |= UINT64_C( 0x0010000000000000 ); + } else { + --expDiff; + if ( ! expDiff ) goto newlyAlignedABigger; + } + sigB = softfloat_shiftRightJam128( sigB.v64, sigB.v0, expDiff ); + newlyAlignedABigger: + expZ = expA; + sigA.v64 |= UINT64_C( 0x0010000000000000 ); + aBigger: + sigZ = softfloat_sub128( sigA.v64, sigA.v0, sigB.v64, sigB.v0 ); + normRoundPack: + return softfloat_normRoundPackToF128( signZ, expZ - 5, sigZ.v64, sigZ.v0 ); + propagateNaN: + uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF16.c new file mode 100644 index 000000000..6bbcb5c88 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF16.c @@ -0,0 +1,187 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t softfloat_subMagsF16( uint_fast16_t uiA, uint_fast16_t uiB ) +{ + int_fast8_t expA; + uint_fast16_t sigA; + int_fast8_t expB; + uint_fast16_t sigB; + int_fast8_t expDiff; + uint_fast16_t uiZ; + int_fast16_t sigDiff; + bool signZ; + int_fast8_t shiftDist, expZ; + uint_fast16_t sigZ, sigX, sigY; + uint_fast32_t sig32Z; + int_fast8_t roundingMode; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expF16UI( uiA ); + sigA = fracF16UI( uiA ); + expB = expF16UI( uiB ); + sigB = fracF16UI( uiB ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( ! expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expA == 0x1F ) { + if ( sigA | sigB ) goto propagateNaN; + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF16UI; + goto uiZ; + } + sigDiff = sigA - sigB; + if ( ! sigDiff ) { + uiZ = + packToF16UI( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + goto uiZ; + } + if ( expA ) --expA; + signZ = signF16UI( uiA ); + if ( sigDiff < 0 ) { + signZ = ! signZ; + sigDiff = -sigDiff; + } + shiftDist = softfloat_countLeadingZeros16( sigDiff ) - 5; + expZ = expA - shiftDist; + if ( expZ < 0 ) { + shiftDist = expA; + expZ = 0; + } + sigZ = sigDiff<<shiftDist; + goto pack; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + signZ = signF16UI( uiA ); + if ( expDiff < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + signZ = ! signZ; + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN; + uiZ = packToF16UI( signZ, 0x1F, 0 ); + goto uiZ; + } + if ( expDiff <= -13 ) { + uiZ = packToF16UI( signZ, expB, sigB ); + if ( expA | sigA ) goto subEpsilon; + goto uiZ; + } + expZ = expA + 19; + sigX = sigB | 0x0400; + sigY = sigA + (expA ? 0x0400 : sigA); + expDiff = -expDiff; + } else { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + uiZ = uiA; + if ( expA == 0x1F ) { + if ( sigA ) goto propagateNaN; + goto uiZ; + } + if ( 13 <= expDiff ) { + if ( expB | sigB ) goto subEpsilon; + goto uiZ; + } + expZ = expB + 19; + sigX = sigA | 0x0400; + sigY = sigB + (expB ? 0x0400 : sigB); + } + sig32Z = ((uint_fast32_t) sigX<<expDiff) - sigY; + shiftDist = softfloat_countLeadingZeros32( sig32Z ) - 1; + sig32Z <<= shiftDist; + expZ -= shiftDist; + sigZ = sig32Z>>16; + if ( sig32Z & 0xFFFF ) { + sigZ |= 1; + } else { + if ( ! (sigZ & 0xF) && ((unsigned int) expZ < 0x1E) ) { + sigZ >>= 4; + goto pack; + } + } + return softfloat_roundPackToF16( signZ, expZ, sigZ ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF16UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + subEpsilon: + roundingMode = softfloat_roundingMode; + if ( roundingMode != softfloat_round_near_even ) { + if ( + (roundingMode == softfloat_round_minMag) + || (roundingMode + == (signF16UI( uiZ ) ? softfloat_round_max + : softfloat_round_min)) + ) { + --uiZ; + } +#ifdef SOFTFLOAT_ROUND_ODD + else if ( roundingMode == softfloat_round_odd ) { + uiZ = (uiZ - 1) | 1; + } +#endif + } + softfloat_exceptionFlags |= softfloat_flag_inexact; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + pack: + uiZ = packToF16UI( signZ, expZ, sigZ ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF32.c new file mode 100644 index 000000000..8b3aee0d6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF32.c @@ -0,0 +1,143 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t softfloat_subMagsF32( uint_fast32_t uiA, uint_fast32_t uiB ) +{ + int_fast16_t expA; + uint_fast32_t sigA; + int_fast16_t expB; + uint_fast32_t sigB; + int_fast16_t expDiff; + uint_fast32_t uiZ; + int_fast32_t sigDiff; + bool signZ; + int_fast8_t shiftDist; + int_fast16_t expZ; + uint_fast32_t sigX, sigY; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expF32UI( uiA ); + sigA = fracF32UI( uiA ); + expB = expF32UI( uiB ); + sigB = fracF32UI( uiB ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( ! expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expA == 0xFF ) { + if ( sigA | sigB ) goto propagateNaN; + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF32UI; + goto uiZ; + } + sigDiff = sigA - sigB; + if ( ! sigDiff ) { + uiZ = + packToF32UI( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + goto uiZ; + } + if ( expA ) --expA; + signZ = signF32UI( uiA ); + if ( sigDiff < 0 ) { + signZ = ! signZ; + sigDiff = -sigDiff; + } + shiftDist = softfloat_countLeadingZeros32( sigDiff ) - 8; + expZ = expA - shiftDist; + if ( expZ < 0 ) { + shiftDist = expA; + expZ = 0; + } + uiZ = packToF32UI( signZ, expZ, sigDiff<<shiftDist ); + goto uiZ; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + signZ = signF32UI( uiA ); + sigA <<= 7; + sigB <<= 7; + if ( expDiff < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + signZ = ! signZ; + if ( expB == 0xFF ) { + if ( sigB ) goto propagateNaN; + uiZ = packToF32UI( signZ, 0xFF, 0 ); + goto uiZ; + } + expZ = expB - 1; + sigX = sigB | 0x40000000; + sigY = sigA + (expA ? 0x40000000 : sigA); + expDiff = -expDiff; + } else { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + if ( expA == 0xFF ) { + if ( sigA ) goto propagateNaN; + uiZ = uiA; + goto uiZ; + } + expZ = expA - 1; + sigX = sigA | 0x40000000; + sigY = sigB + (expB ? 0x40000000 : sigB); + } + return + softfloat_normRoundPackToF32( + signZ, expZ, sigX - softfloat_shiftRightJam32( sigY, expDiff ) + ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF32UI( uiA, uiB ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF64.c new file mode 100644 index 000000000..3a4acb104 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_subMagsF64.c @@ -0,0 +1,141 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float64_t + softfloat_subMagsF64( uint_fast64_t uiA, uint_fast64_t uiB, bool signZ ) +{ + int_fast16_t expA; + uint_fast64_t sigA; + int_fast16_t expB; + uint_fast64_t sigB; + int_fast16_t expDiff; + uint_fast64_t uiZ; + int_fast64_t sigDiff; + int_fast8_t shiftDist; + int_fast16_t expZ; + uint_fast64_t sigZ; + union ui64_f64 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expF64UI( uiA ); + sigA = fracF64UI( uiA ); + expB = expF64UI( uiB ); + sigB = fracF64UI( uiB ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( ! expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expA == 0x7FF ) { + if ( sigA | sigB ) goto propagateNaN; + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF64UI; + goto uiZ; + } + sigDiff = sigA - sigB; + if ( ! sigDiff ) { + uiZ = + packToF64UI( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + goto uiZ; + } + if ( expA ) --expA; + if ( sigDiff < 0 ) { + signZ = ! signZ; + sigDiff = -sigDiff; + } + shiftDist = softfloat_countLeadingZeros64( sigDiff ) - 11; + expZ = expA - shiftDist; + if ( expZ < 0 ) { + shiftDist = expA; + expZ = 0; + } + uiZ = packToF64UI( signZ, expZ, sigDiff<<shiftDist ); + goto uiZ; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sigA <<= 10; + sigB <<= 10; + if ( expDiff < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + signZ = ! signZ; + if ( expB == 0x7FF ) { + if ( sigB ) goto propagateNaN; + uiZ = packToF64UI( signZ, 0x7FF, 0 ); + goto uiZ; + } + sigA += expA ? UINT64_C( 0x4000000000000000 ) : sigA; + sigA = softfloat_shiftRightJam64( sigA, -expDiff ); + sigB |= UINT64_C( 0x4000000000000000 ); + expZ = expB; + sigZ = sigB - sigA; + } else { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + if ( expA == 0x7FF ) { + if ( sigA ) goto propagateNaN; + uiZ = uiA; + goto uiZ; + } + sigB += expB ? UINT64_C( 0x4000000000000000 ) : sigB; + sigB = softfloat_shiftRightJam64( sigB, expDiff ); + sigA |= UINT64_C( 0x4000000000000000 ); + expZ = expA; + sigZ = sigA - sigB; + } + return softfloat_normRoundPackToF64( signZ, expZ - 1, sigZ ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF64UI( uiA, uiB ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_tryPropagateNaNExtF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_tryPropagateNaNExtF80M.c new file mode 100644 index 000000000..de6532ecf --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_tryPropagateNaNExtF80M.c @@ -0,0 +1,64 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" + +bool + softfloat_tryPropagateNaNExtF80M( + const struct extFloat80M *aSPtr, + const struct extFloat80M *bSPtr, + struct extFloat80M *zSPtr + ) +{ + uint_fast16_t ui64; + uint64_t ui0; + + ui64 = aSPtr->signExp; + ui0 = aSPtr->signif; + if ( isNaNExtF80UI( ui64, ui0 ) ) goto propagateNaN; + ui64 = bSPtr->signExp; + ui0 = bSPtr->signif; + if ( isNaNExtF80UI( ui64, ui0 ) ) goto propagateNaN; + return false; + propagateNaN: + softfloat_propagateNaNExtF80M( aSPtr, bSPtr, zSPtr ); + return true; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_tryPropagateNaNF128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_tryPropagateNaNF128M.c new file mode 100644 index 000000000..57199d963 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/s_tryPropagateNaNF128M.c @@ -0,0 +1,55 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" + +bool + softfloat_tryPropagateNaNF128M( + const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr ) +{ + + if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) { + softfloat_propagateNaNF128M( aWPtr, bWPtr, zWPtr ); + return true; + } + return false; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/softfloat_state.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/softfloat_state.c new file mode 100644 index 000000000..277d76f95 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/softfloat_state.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +#ifndef THREAD_LOCAL +#define THREAD_LOCAL +#endif + +THREAD_LOCAL uint_fast8_t softfloat_roundingMode = softfloat_round_near_even; +THREAD_LOCAL uint_fast8_t softfloat_detectTininess = init_detectTininess; +THREAD_LOCAL uint_fast8_t softfloat_exceptionFlags = 0; + +THREAD_LOCAL uint_fast8_t extF80_roundingPrecision = 80; + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_extF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_extF80.c new file mode 100644 index 000000000..dbb35c747 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_extF80.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +extFloat80_t ui32_to_extF80( uint32_t a ) +{ + uint_fast16_t uiZ64; + int_fast8_t shiftDist; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + uiZ64 = 0; + if ( a ) { + shiftDist = softfloat_countLeadingZeros32( a ); + uiZ64 = 0x401E - shiftDist; + a <<= shiftDist; + } + uZ.s.signExp = uiZ64; + uZ.s.signif = (uint_fast64_t) a<<32; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_extF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_extF80M.c new file mode 100644 index 000000000..ec2396e61 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_extF80M.c @@ -0,0 +1,74 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void ui32_to_extF80M( uint32_t a, extFloat80_t *zPtr ) +{ + + *zPtr = ui32_to_extF80( a ); + +} + +#else + +void ui32_to_extF80M( uint32_t a, extFloat80_t *zPtr ) +{ + struct extFloat80M *zSPtr; + uint_fast16_t uiZ64; + uint64_t sigZ; + int_fast8_t shiftDist; + + zSPtr = (struct extFloat80M *) zPtr; + uiZ64 = 0; + sigZ = 0; + if ( a ) { + shiftDist = softfloat_countLeadingZeros32( a ); + uiZ64 = packToExtF80UI64( 0, 0x401E - shiftDist ); + sigZ = (uint64_t) (a<<shiftDist)<<32; + } + zSPtr->signExp = uiZ64; + zSPtr->signif = sigZ; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f128.c new file mode 100644 index 000000000..8dcf2eb4d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f128.c @@ -0,0 +1,60 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float128_t ui32_to_f128( uint32_t a ) +{ + uint_fast64_t uiZ64; + int_fast8_t shiftDist; + union ui128_f128 uZ; + + uiZ64 = 0; + if ( a ) { + shiftDist = softfloat_countLeadingZeros32( a ) + 17; + uiZ64 = + packToF128UI64( + 0, 0x402E - shiftDist, (uint_fast64_t) a<<shiftDist ); + } + uZ.ui.v64 = uiZ64; + uZ.ui.v0 = 0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f128M.c new file mode 100644 index 000000000..8d4ff4372 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f128M.c @@ -0,0 +1,76 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void ui32_to_f128M( uint32_t a, float128_t *zPtr ) +{ + + *zPtr = ui32_to_f128( a ); + +} + +#else + +void ui32_to_f128M( uint32_t a, float128_t *zPtr ) +{ + uint32_t *zWPtr, uiZ96, uiZ64; + int_fast8_t shiftDist; + uint64_t normA; + + zWPtr = (uint32_t *) zPtr; + uiZ96 = 0; + uiZ64 = 0; + if ( a ) { + shiftDist = softfloat_countLeadingZeros32( a ) + 17; + normA = (uint64_t) a<<shiftDist; + uiZ96 = packToF128UI96( 0, 0x402E - shiftDist, normA>>32 ); + uiZ64 = normA; + } + zWPtr[indexWord( 4, 3 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = uiZ64; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f16.c new file mode 100644 index 000000000..a923f2234 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f16.c @@ -0,0 +1,65 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float16_t ui32_to_f16( uint32_t a ) +{ + int_fast8_t shiftDist; + union ui16_f16 u; + uint_fast16_t sig; + + shiftDist = softfloat_countLeadingZeros32( a ) - 21; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF16UI( + 0, 0x18 - shiftDist, (uint_fast16_t) a<<shiftDist ) + : 0; + return u.f; + } else { + shiftDist += 4; + sig = + (shiftDist < 0) + ? a>>(-shiftDist) | ((uint32_t) (a<<(shiftDist & 31)) != 0) + : (uint_fast16_t) a<<shiftDist; + return softfloat_roundPackToF16( 0, 0x1C - shiftDist, sig ); + } + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f32.c new file mode 100644 index 000000000..e74ee7be9 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f32.c @@ -0,0 +1,57 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float32_t ui32_to_f32( uint32_t a ) +{ + union ui32_f32 uZ; + + if ( ! a ) { + uZ.ui = 0; + return uZ.f; + } + if ( a & 0x80000000 ) { + return softfloat_roundPackToF32( 0, 0x9D, a>>1 | (a & 1) ); + } else { + return softfloat_normRoundPackToF32( 0, 0x9C, a ); + } + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f64.c new file mode 100644 index 000000000..11050c100 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui32_to_f64.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float64_t ui32_to_f64( uint32_t a ) +{ + uint_fast64_t uiZ; + int_fast8_t shiftDist; + union ui64_f64 uZ; + + if ( ! a ) { + uiZ = 0; + } else { + shiftDist = softfloat_countLeadingZeros32( a ) + 21; + uiZ = + packToF64UI( 0, 0x432 - shiftDist, (uint_fast64_t) a<<shiftDist ); + } + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_extF80.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_extF80.c new file mode 100644 index 000000000..7fcf1406c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_extF80.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +extFloat80_t ui64_to_extF80( uint64_t a ) +{ + uint_fast16_t uiZ64; + int_fast8_t shiftDist; + union { struct extFloat80M s; extFloat80_t f; } uZ; + + uiZ64 = 0; + if ( a ) { + shiftDist = softfloat_countLeadingZeros64( a ); + uiZ64 = 0x403E - shiftDist; + a <<= shiftDist; + } + uZ.s.signExp = uiZ64; + uZ.s.signif = a; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_extF80M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_extF80M.c new file mode 100644 index 000000000..96628843a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_extF80M.c @@ -0,0 +1,74 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void ui64_to_extF80M( uint64_t a, extFloat80_t *zPtr ) +{ + + *zPtr = ui64_to_extF80( a ); + +} + +#else + +void ui64_to_extF80M( uint64_t a, extFloat80_t *zPtr ) +{ + struct extFloat80M *zSPtr; + uint_fast16_t uiZ64; + uint64_t sigZ; + int_fast8_t shiftDist; + + zSPtr = (struct extFloat80M *) zPtr; + uiZ64 = 0; + sigZ = 0; + if ( a ) { + shiftDist = softfloat_countLeadingZeros64( a ); + uiZ64 = packToExtF80UI64( 0, 0x403E - shiftDist ); + sigZ = a<<shiftDist; + } + zSPtr->signExp = uiZ64; + zSPtr->signif = sigZ; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f128.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f128.c new file mode 100644 index 000000000..c2c1ce3ec --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f128.c @@ -0,0 +1,68 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float128_t ui64_to_f128( uint64_t a ) +{ + uint_fast64_t uiZ64, uiZ0; + int_fast8_t shiftDist; + struct uint128 zSig; + union ui128_f128 uZ; + + if ( ! a ) { + uiZ64 = 0; + uiZ0 = 0; + } else { + shiftDist = softfloat_countLeadingZeros64( a ) + 49; + if ( 64 <= shiftDist ) { + zSig.v64 = a<<(shiftDist - 64); + zSig.v0 = 0; + } else { + zSig = softfloat_shortShiftLeft128( 0, a, shiftDist ); + } + uiZ64 = packToF128UI64( 0, 0x406E - shiftDist, zSig.v64 ); + uiZ0 = zSig.v0; + } + uZ.ui.v64 = uiZ64; + uZ.ui.v0 = uiZ0; + return uZ.f; + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f128M.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f128M.c new file mode 100644 index 000000000..2475304ba --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f128M.c @@ -0,0 +1,86 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +#ifdef SOFTFLOAT_FAST_INT64 + +void ui64_to_f128M( uint64_t a, float128_t *zPtr ) +{ + + *zPtr = ui64_to_f128( a ); + +} + +#else + +void ui64_to_f128M( uint64_t a, float128_t *zPtr ) +{ + uint32_t *zWPtr, uiZ96, uiZ64; + uint_fast8_t shiftDist; + uint32_t *ptr; + + zWPtr = (uint32_t *) zPtr; + uiZ96 = 0; + uiZ64 = 0; + zWPtr[indexWord( 4, 1 )] = 0; + zWPtr[indexWord( 4, 0 )] = 0; + if ( a ) { + shiftDist = softfloat_countLeadingZeros64( a ) + 17; + if ( shiftDist < 32 ) { + ptr = zWPtr + indexMultiwordHi( 4, 3 ); + ptr[indexWord( 3, 2 )] = 0; + ptr[indexWord( 3, 1 )] = a>>32; + ptr[indexWord( 3, 0 )] = a; + softfloat_shortShiftLeft96M( ptr, shiftDist, ptr ); + ptr[indexWordHi( 3 )] = + packToF128UI96( 0, 0x404E - shiftDist, ptr[indexWordHi( 3 )] ); + return; + } + a <<= shiftDist - 32; + uiZ96 = packToF128UI96( 0, 0x404E - shiftDist, a>>32 ); + uiZ64 = a; + } + zWPtr[indexWord( 4, 3 )] = uiZ96; + zWPtr[indexWord( 4, 2 )] = uiZ64; + +} + +#endif + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f16.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f16.c new file mode 100644 index 000000000..9ff6e1739 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f16.c @@ -0,0 +1,64 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float16_t ui64_to_f16( uint64_t a ) +{ + int_fast8_t shiftDist; + union ui16_f16 u; + uint_fast16_t sig; + + shiftDist = softfloat_countLeadingZeros64( a ) - 53; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF16UI( + 0, 0x18 - shiftDist, (uint_fast16_t) a<<shiftDist ) + : 0; + return u.f; + } else { + shiftDist += 4; + sig = + (shiftDist < 0) ? softfloat_shortShiftRightJam64( a, -shiftDist ) + : (uint_fast16_t) a<<shiftDist; + return softfloat_roundPackToF16( 0, 0x1C - shiftDist, sig ); + } + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f32.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f32.c new file mode 100644 index 000000000..9065b92df --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f32.c @@ -0,0 +1,64 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float32_t ui64_to_f32( uint64_t a ) +{ + int_fast8_t shiftDist; + union ui32_f32 u; + uint_fast32_t sig; + + shiftDist = softfloat_countLeadingZeros64( a ) - 40; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF32UI( + 0, 0x95 - shiftDist, (uint_fast32_t) a<<shiftDist ) + : 0; + return u.f; + } else { + shiftDist += 7; + sig = + (shiftDist < 0) ? softfloat_shortShiftRightJam64( a, -shiftDist ) + : (uint_fast32_t) a<<shiftDist; + return softfloat_roundPackToF32( 0, 0x9C - shiftDist, sig ); + } + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f64.c b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f64.c new file mode 100644 index 000000000..4693086f1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3/source/ui64_to_f64.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3e, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014 The Regents of the University of California. +All Rights Reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float64_t ui64_to_f64( uint64_t a ) +{ + union ui64_f64 uZ; + + if ( ! a ) { + uZ.ui = 0; + return uZ.f; + } + if ( a & UINT64_C( 0x8000000000000000 ) ) { + return + softfloat_roundPackToF64( + 0, 0x43D, softfloat_shortShiftRightJam64( a, 1 ) ); + } else { + return softfloat_normRoundPackToF64( 0, 0x43C, a ); + } + +} + diff --git a/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/platform.h b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/platform.h new file mode 100644 index 000000000..07800a9d5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSoftFloatLib/platform.h @@ -0,0 +1,11 @@ +/*
+ * Copyright (c) 2019, Linaro Limited
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ */
+
+#define LITTLEENDIAN 1
+#define INLINE static inline
+#define SOFTFLOAT_BUILTIN_CLZ 1
+#define SOFTFLOAT_FAST_INT64
+#include "opts-GCC.h"
diff --git a/roms/edk2/ArmPkg/Library/ArmSvcLib/AArch64/ArmSvc.S b/roms/edk2/ArmPkg/Library/ArmSvcLib/AArch64/ArmSvc.S new file mode 100644 index 000000000..ee265f94b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSvcLib/AArch64/ArmSvc.S @@ -0,0 +1,43 @@ +//
+// Copyright (c) 2012 - 2020, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+.text
+.align 3
+
+GCC_ASM_EXPORT(ArmCallSvc)
+
+ASM_PFX(ArmCallSvc):
+ // Push frame pointer and return address on the stack
+ stp x29, x30, [sp, #-32]!
+ mov x29, sp
+
+ // Push x0 on the stack - The stack must always be quad-word aligned
+ str x0, [sp, #16]
+
+ // Load the SVC arguments values into the appropriate registers
+ ldp x6, x7, [x0, #48]
+ ldp x4, x5, [x0, #32]
+ ldp x2, x3, [x0, #16]
+ ldp x0, x1, [x0, #0]
+
+ svc #0
+ // Prevent speculative execution beyond svc instruction
+ dsb nsh
+ isb
+
+ // Pop the ARM_SVC_ARGS structure address from the stack into x9
+ ldr x9, [sp, #16]
+
+ // Store the SVC returned values into the ARM_SVC_ARGS structure.
+ // A SVC call can return up to 4 values - we do not need to store back x4-x7.
+ stp x0, x1, [x9, #0]
+ stp x2, x3, [x9, #16]
+
+ mov x0, x9
+
+ ldp x29, x30, [sp], #32
+ ret
diff --git a/roms/edk2/ArmPkg/Library/ArmSvcLib/Arm/ArmSvc.S b/roms/edk2/ArmPkg/Library/ArmSvcLib/Arm/ArmSvc.S new file mode 100644 index 000000000..e81eb88f2 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSvcLib/Arm/ArmSvc.S @@ -0,0 +1,36 @@ +//
+// Copyright (c) 2016 - 2020, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+.text
+.align 3
+
+GCC_ASM_EXPORT(ArmCallSvc)
+
+ASM_PFX(ArmCallSvc):
+ // r0 will be popped just after the SVC call
+ push {r0, r4-r8}
+
+ // Load the SVC arguments values into the appropriate registers
+ ldm r0, {r0-r7}
+
+ svc #0
+ // Prevent speculative execution beyond svc instruction
+ dsb nsh
+ isb
+
+ // Load the ARM_SVC_ARGS structure address from the stack into r8
+ ldr r8, [sp]
+
+ // Load the SVC returned values into the appropriate registers
+ // A SVC call can return up to 4 values - we do not need to store back r4-r7.
+ stm r8, {r0-r3}
+
+ mov r0, r8
+
+ // Restore the registers r4-r8
+ pop {r1, r4-r8}
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/ArmSvcLib/Arm/ArmSvc.asm b/roms/edk2/ArmPkg/Library/ArmSvcLib/Arm/ArmSvc.asm new file mode 100644 index 000000000..d1751488b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSvcLib/Arm/ArmSvc.asm @@ -0,0 +1,36 @@ +//
+// Copyright (c) 2016 - 2020, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+
+ INCLUDE AsmMacroExport.inc
+
+ RVCT_ASM_EXPORT ArmCallSvc
+ // r0 will be popped just after the SVC call
+ push {r0, r4-r8}
+
+ // Load the SVC arguments values into the appropriate registers
+ ldm r0, {r0-r7}
+
+ svc #0
+ // Prevent speculative execution beyond svc instruction
+ dsb nsh
+ isb
+
+ // Load the ARM_SVC_ARGS structure address from the stack into r8
+ ldr r8, [sp]
+
+ // Load the SVC returned values into the appropriate registers
+ // A SVC call can return up to 4 values - we do not need to store back r4-r7.
+ stm r8, {r0-r3}
+
+ mov r0, r8
+
+ // Restore the registers r4-r8
+ pop {r1, r4-r8}
+ bx lr
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf b/roms/edk2/ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf new file mode 100644 index 000000000..744a29fbf --- /dev/null +++ b/roms/edk2/ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf @@ -0,0 +1,25 @@ +#/** @file
+#
+# Copyright (c) 2016 - 2017, ARM Ltd. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = ArmSvcLib
+ FILE_GUID = 8e3618d7-f01d-4d65-b32b-4c70aacc8e49
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmSvcLib
+
+[Sources.ARM]
+ Arm/ArmSvc.asm | RVCT
+ Arm/ArmSvc.S | GCC
+
+[Sources.AARCH64]
+ AArch64/ArmSvc.S
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/Atomics.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/Atomics.S new file mode 100644 index 000000000..3792020ab --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/Atomics.S @@ -0,0 +1,142 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2020, Arm, Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+ /*
+ * Provide the GCC intrinsics that are required when using GCC 9 or
+ * later with the -moutline-atomics options (which became the default
+ * in GCC 10)
+ */
+ .arch armv8-a
+
+ .macro reg_alias, pfx, sz
+ r0_\sz .req \pfx\()0
+ r1_\sz .req \pfx\()1
+ tmp0_\sz .req \pfx\()16
+ tmp1_\sz .req \pfx\()17
+ .endm
+
+ /*
+ * Define register aliases of the right type for each size
+ * (xN for 8 bytes, wN for everything smaller)
+ */
+ reg_alias w, 1
+ reg_alias w, 2
+ reg_alias w, 4
+ reg_alias x, 8
+
+ .macro fn_start, name:req
+ .section .text.\name
+ .globl \name
+ .type \name, %function
+\name\():
+ .endm
+
+ .macro fn_end, name:req
+ .size \name, . - \name
+ .endm
+
+ /*
+ * Emit an atomic helper for \model with operands of size \sz, using
+ * the operation specified by \insn (which is the LSE name), and which
+ * can be implemented using the generic load-locked/store-conditional
+ * (LL/SC) sequence below, using the arithmetic operation given by
+ * \opc.
+ */
+ .macro emit_ld_sz, sz:req, insn:req, opc:req, model:req, s, a, l
+ fn_start __aarch64_\insn\()\sz\()\model
+ mov tmp0_\sz, r0_\sz
+0: ld\a\()xr\s r0_\sz, [x1]
+ .ifnc \insn, swp
+ \opc tmp1_\sz, r0_\sz, tmp0_\sz
+ st\l\()xr\s w15, tmp1_\sz, [x1]
+ .else
+ st\l\()xr\s w15, tmp0_\sz, [x1]
+ .endif
+ cbnz w15, 0b
+ ret
+ fn_end __aarch64_\insn\()\sz\()\model
+ .endm
+
+ /*
+ * Emit atomic helpers for \model for operand sizes in the
+ * set {1, 2, 4, 8}, for the instruction pattern given by
+ * \insn. (This is the LSE name, but this implementation uses
+ * the generic LL/SC sequence using \opc as the arithmetic
+ * operation on the target.)
+ */
+ .macro emit_ld, insn:req, opc:req, model:req, a, l
+ emit_ld_sz 1, \insn, \opc, \model, b, \a, \l
+ emit_ld_sz 2, \insn, \opc, \model, h, \a, \l
+ emit_ld_sz 4, \insn, \opc, \model, , \a, \l
+ emit_ld_sz 8, \insn, \opc, \model, , \a, \l
+ .endm
+
+ /*
+ * Emit the compare and swap helper for \model and size \sz
+ * using LL/SC instructions.
+ */
+ .macro emit_cas_sz, sz:req, model:req, uxt:req, s, a, l
+ fn_start __aarch64_cas\sz\()\model
+ \uxt tmp0_\sz, r0_\sz
+0: ld\a\()xr\s r0_\sz, [x2]
+ cmp r0_\sz, tmp0_\sz
+ bne 1f
+ st\l\()xr\s w15, r1_\sz, [x2]
+ cbnz w15, 0b
+1: ret
+ fn_end __aarch64_cas\sz\()\model
+ .endm
+
+ /*
+ * Emit compare-and-swap helpers for \model for operand sizes in the
+ * set {1, 2, 4, 8, 16}.
+ */
+ .macro emit_cas, model:req, a, l
+ emit_cas_sz 1, \model, uxtb, b, \a, \l
+ emit_cas_sz 2, \model, uxth, h, \a, \l
+ emit_cas_sz 4, \model, mov , , \a, \l
+ emit_cas_sz 8, \model, mov , , \a, \l
+
+ /*
+ * We cannot use the parameterized sequence for 16 byte CAS, so we
+ * need to define it explicitly.
+ */
+ fn_start __aarch64_cas16\model
+ mov x16, x0
+ mov x17, x1
+0: ld\a\()xp x0, x1, [x4]
+ cmp x0, x16
+ ccmp x1, x17, #0, eq
+ bne 1f
+ st\l\()xp w15, x16, x17, [x4]
+ cbnz w15, 0b
+1: ret
+ fn_end __aarch64_cas16\model
+ .endm
+
+ /*
+ * Emit the set of GCC outline atomic helper functions for
+ * the memory ordering model given by \model:
+ * - relax unordered loads and stores
+ * - acq load-acquire, unordered store
+ * - rel unordered load, store-release
+ * - acq_rel load-acquire, store-release
+ */
+ .macro emit_model, model:req, a, l
+ emit_ld ldadd, add, \model, \a, \l
+ emit_ld ldclr, bic, \model, \a, \l
+ emit_ld ldeor, eor, \model, \a, \l
+ emit_ld ldset, orr, \model, \a, \l
+ emit_ld swp, mov, \model, \a, \l
+ emit_cas \model, \a, \l
+ .endm
+
+ emit_model _relax
+ emit_model _acq, a
+ emit_model _rel,, l
+ emit_model _acq_rel, a, l
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S new file mode 100644 index 000000000..dee659b66 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S @@ -0,0 +1,27 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__ashldi3)
+ cmp r2, #31
+ bls L2
+ cmp r2, #63
+ subls r2, r2, #32
+ movls r2, r0, asl r2
+ movhi r2, #0
+ mov r1, r2
+ mov r0, #0
+ bx lr
+L2:
+ cmp r2, #0
+ rsbne r3, r2, #32
+ movne r3, r0, lsr r3
+ movne r0, r0, asl r2
+ orrne r1, r3, r1, asl r2
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S new file mode 100644 index 000000000..d60c1c64f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S @@ -0,0 +1,28 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__ashrdi3)
+ cmp r2, #31
+ bls L2
+ cmp r2, #63
+ subls r2, r2, #32
+ mov ip, r1, asr #31
+ movls r2, r1, asr r2
+ movhi r2, ip
+ mov r0, r2
+ mov r1, ip
+ bx lr
+L2:
+ cmp r2, #0
+ rsbne r3, r2, #32
+ movne r3, r1, asl r3
+ movne r1, r1, asr r2
+ orrne r0, r3, r0, lsr r2
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S new file mode 100644 index 000000000..493392a9f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S @@ -0,0 +1,49 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__clzsi2)
+ @ frame_needed = 1, uses_anonymous_args = 0
+ stmfd sp!, {r7, lr}
+ add r7, sp, #0
+ movs r3, r0, lsr #16
+ movne r3, #16
+ moveq r3, #0
+ movne r9, #0
+ moveq r9, #16
+ mov r3, r0, lsr r3
+ tst r3, #65280
+ movne r0, #8
+ moveq r0, #0
+ movne lr, #0
+ moveq lr, #8
+ mov r3, r3, lsr r0
+ tst r3, #240
+ movne r0, #4
+ moveq r0, #0
+ movne ip, #0
+ moveq ip, #4
+ mov r3, r3, lsr r0
+ tst r3, #12
+ movne r0, #2
+ moveq r0, #0
+ movne r1, #0
+ moveq r1, #2
+ mov r2, r3, lsr r0
+ add r3, lr, r9
+ add r0, r3, ip
+ add r1, r0, r1
+ mov r0, r2, lsr #1
+ eor r0, r0, #1
+ ands r0, r0, #1
+ mvnne r0, #0
+ rsb r3, r2, #2
+ and r0, r0, r3
+ add r0, r1, r0
+ ldmfd sp!, {r7, pc}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S new file mode 100644 index 000000000..5b21ec749 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__ctzsi2)
+ uxth r3, r0
+ cmp r3, #0
+ moveq ip, #16
+ movne ip, #0
+ @ lr needed for prologue
+ mov r0, r0, lsr ip
+ tst r0, #255
+ movne r3, #0
+ moveq r3, #8
+ mov r0, r0, lsr r3
+ tst r0, #15
+ movne r1, #0
+ moveq r1, #4
+ add r3, r3, ip
+ mov r0, r0, lsr r1
+ tst r0, #3
+ movne r2, #0
+ moveq r2, #2
+ add r3, r3, r1
+ mov r0, r0, lsr r2
+ and r0, r0, #3
+ add r2, r3, r2
+ eor r3, r0, #1
+ mov r0, r0, lsr #1
+ ands r3, r3, #1
+ mvnne r3, #0
+ rsb r0, r0, #2
+ and r0, r3, r0
+ add r0, r2, r0
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S new file mode 100644 index 000000000..d6075ab33 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S @@ -0,0 +1,147 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2011, ARM. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+.text
+.align 2
+GCC_ASM_EXPORT(__aeabi_uidiv)
+GCC_ASM_EXPORT(__aeabi_uidivmod)
+GCC_ASM_EXPORT(__aeabi_idiv)
+GCC_ASM_EXPORT(__aeabi_idivmod)
+
+# AREA Math, CODE, READONLY
+
+#
+#UINT32
+#EFIAPI
+#__aeabi_uidivmode (
+# IN UINT32 Dividen
+# IN UINT32 Divisor
+# );
+#
+
+ASM_PFX(__aeabi_uidiv):
+ASM_PFX(__aeabi_uidivmod):
+ rsbs r12, r1, r0, LSR #4
+ mov r2, #0
+ bcc ASM_PFX(__arm_div4)
+ rsbs r12, r1, r0, LSR #8
+ bcc ASM_PFX(__arm_div8)
+ mov r3, #0
+ b ASM_PFX(__arm_div_large)
+
+#
+#INT32
+#EFIAPI
+#__aeabi_idivmode (
+# IN INT32 Dividen
+# IN INT32 Divisor
+# );
+#
+ASM_PFX(__aeabi_idiv):
+ASM_PFX(__aeabi_idivmod):
+ orrs r12, r0, r1
+ bmi ASM_PFX(__arm_div_negative)
+ rsbs r12, r1, r0, LSR #1
+ mov r2, #0
+ bcc ASM_PFX(__arm_div1)
+ rsbs r12, r1, r0, LSR #4
+ bcc ASM_PFX(__arm_div4)
+ rsbs r12, r1, r0, LSR #8
+ bcc ASM_PFX(__arm_div8)
+ mov r3, #0
+ b ASM_PFX(__arm_div_large)
+ASM_PFX(__arm_div8):
+ rsbs r12, r1, r0, LSR #7
+ subcs r0, r0, r1, LSL #7
+ adc r2, r2, r2
+ rsbs r12, r1, r0,LSR #6
+ subcs r0, r0, r1, LSL #6
+ adc r2, r2, r2
+ rsbs r12, r1, r0, LSR #5
+ subcs r0, r0, r1, LSL #5
+ adc r2, r2, r2
+ rsbs r12, r1, r0, LSR #4
+ subcs r0, r0, r1, LSL #4
+ adc r2, r2, r2
+ASM_PFX(__arm_div4):
+ rsbs r12, r1, r0, LSR #3
+ subcs r0, r0, r1, LSL #3
+ adc r2, r2, r2
+ rsbs r12, r1, r0, LSR #2
+ subcs r0, r0, r1, LSL #2
+ adcs r2, r2, r2
+ rsbs r12, r1, r0, LSR #1
+ subcs r0, r0, r1, LSL #1
+ adc r2, r2, r2
+ASM_PFX(__arm_div1):
+ subs r1, r0, r1
+ movcc r1, r0
+ adc r0, r2, r2
+ bx r14
+ASM_PFX(__arm_div_negative):
+ ands r2, r1, #0x80000000
+ rsbmi r1, r1, #0
+ eors r3, r2, r0, ASR #32
+ rsbcs r0, r0, #0
+ rsbs r12, r1, r0, LSR #4
+ bcc label1
+ rsbs r12, r1, r0, LSR #8
+ bcc label2
+ASM_PFX(__arm_div_large):
+ lsl r1, r1, #6
+ rsbs r12, r1, r0, LSR #8
+ orr r2, r2, #0xfc000000
+ bcc label2
+ lsl r1, r1, #6
+ rsbs r12, r1, r0, LSR #8
+ orr r2, r2, #0x3f00000
+ bcc label2
+ lsl r1, r1, #6
+ rsbs r12, r1, r0, LSR #8
+ orr r2, r2, #0xfc000
+ orrcs r2, r2, #0x3f00
+ lslcs r1, r1, #6
+ rsbs r12, r1, #0
+ bcs ASM_PFX(__aeabi_idiv0)
+label3:
+ lsrcs r1, r1, #6
+label2:
+ rsbs r12, r1, r0, LSR #7
+ subcs r0, r0, r1, LSL #7
+ adc r2, r2, r2
+ rsbs r12, r1, r0, LSR #6
+ subcs r0, r0, r1, LSL #6
+ adc r2, r2, r2
+ rsbs r12, r1, r0, LSR #5
+ subcs r0, r0, r1, LSL #5
+ adc r2, r2, r2
+ rsbs r12, r1, r0, LSR #4
+ subcs r0, r0, r1, LSL #4
+ adc r2, r2, r2
+label1:
+ rsbs r12, r1, r0, LSR #3
+ subcs r0, r0, r1, LSL #3
+ adc r2, r2, r2
+ rsbs r12, r1, r0, LSR #2
+ subcs r0, r0, r1, LSL #2
+ adcs r2, r2, r2
+ bcs label3
+ rsbs r12, r1, r0, LSR #1
+ subcs r0, r0, r1, LSL #1
+ adc r2, r2, r2
+ subs r1, r0, r1
+ movcc r1, r0
+ adc r0, r2, r2
+ asrs r3, r3, #31
+ rsbmi r0, r0, #0
+ rsbcs r1, r1, #0
+ bx r14
+
+ @ What to do about division by zero? For now, just return.
+ASM_PFX(__aeabi_idiv0):
+ bx r14
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.asm b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.asm new file mode 100644 index 000000000..3cbeaa4c1 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.asm @@ -0,0 +1,180 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+// Copyright (c) 2018, Pete Batard. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+ EXPORT __aeabi_uidiv
+ EXPORT __aeabi_uidivmod
+ EXPORT __aeabi_idiv
+ EXPORT __aeabi_idivmod
+ EXPORT __rt_udiv
+ EXPORT __rt_sdiv
+
+ AREA Math, CODE, READONLY
+
+;
+;UINT32
+;EFIAPI
+;__aeabi_uidivmod (
+; IN UINT32 Dividend
+; IN UINT32 Divisor
+; );
+;
+__aeabi_uidiv
+__aeabi_uidivmod
+ RSBS r12, r1, r0, LSR #4
+ MOV r2, #0
+ BCC __arm_div4
+ RSBS r12, r1, r0, LSR #8
+ BCC __arm_div8
+ MOV r3, #0
+ B __arm_div_large
+
+;
+;UINT64
+;EFIAPI
+;__rt_udiv (
+; IN UINT32 Divisor,
+; IN UINT32 Dividend
+; );
+;
+__rt_udiv
+ ; Swap R0 and R1
+ MOV r12, r0
+ MOV r0, r1
+ MOV r1, r12
+ B __aeabi_uidivmod
+
+;
+;UINT64
+;EFIAPI
+;__rt_sdiv (
+; IN INT32 Divisor,
+; IN INT32 Dividend
+; );
+;
+__rt_sdiv
+ ; Swap R0 and R1
+ MOV r12, r0
+ MOV r0, r1
+ MOV r1, r12
+ B __aeabi_idivmod
+
+;
+;INT32
+;EFIAPI
+;__aeabi_idivmod (
+; IN INT32 Dividend
+; IN INT32 Divisor
+; );
+;
+__aeabi_idiv
+__aeabi_idivmod
+ ORRS r12, r0, r1
+ BMI __arm_div_negative
+ RSBS r12, r1, r0, LSR #1
+ MOV r2, #0
+ BCC __arm_div1
+ RSBS r12, r1, r0, LSR #4
+ BCC __arm_div4
+ RSBS r12, r1, r0, LSR #8
+ BCC __arm_div8
+ MOV r3, #0
+ B __arm_div_large
+__arm_div8
+ RSBS r12, r1, r0, LSR #7
+ SUBCS r0, r0, r1, LSL #7
+ ADC r2, r2, r2
+ RSBS r12, r1, r0,LSR #6
+ SUBCS r0, r0, r1, LSL #6
+ ADC r2, r2, r2
+ RSBS r12, r1, r0, LSR #5
+ SUBCS r0, r0, r1, LSL #5
+ ADC r2, r2, r2
+ RSBS r12, r1, r0, LSR #4
+ SUBCS r0, r0, r1, LSL #4
+ ADC r2, r2, r2
+__arm_div4
+ RSBS r12, r1, r0, LSR #3
+ SUBCS r0, r0, r1, LSL #3
+ ADC r2, r2, r2
+ RSBS r12, r1, r0, LSR #2
+ SUBCS r0, r0, r1, LSL #2
+ ADCS r2, r2, r2
+ RSBS r12, r1, r0, LSR #1
+ SUBCS r0, r0, r1, LSL #1
+ ADC r2, r2, r2
+__arm_div1
+ SUBS r1, r0, r1
+ MOVCC r1, r0
+ ADC r0, r2, r2
+ BX r14
+__arm_div_negative
+ ANDS r2, r1, #0x80000000
+ RSBMI r1, r1, #0
+ EORS r3, r2, r0, ASR #32
+ RSBCS r0, r0, #0
+ RSBS r12, r1, r0, LSR #4
+ BCC label1
+ RSBS r12, r1, r0, LSR #8
+ BCC label2
+__arm_div_large
+ LSL r1, r1, #6
+ RSBS r12, r1, r0, LSR #8
+ ORR r2, r2, #0xfc000000
+ BCC label2
+ LSL r1, r1, #6
+ RSBS r12, r1, r0, LSR #8
+ ORR r2, r2, #0x3f00000
+ BCC label2
+ LSL r1, r1, #6
+ RSBS r12, r1, r0, LSR #8
+ ORR r2, r2, #0xfc000
+ ORRCS r2, r2, #0x3f00
+ LSLCS r1, r1, #6
+ RSBS r12, r1, #0
+ BCS __aeabi_idiv0
+label3
+ LSRCS r1, r1, #6
+label2
+ RSBS r12, r1, r0, LSR #7
+ SUBCS r0, r0, r1, LSL #7
+ ADC r2, r2, r2
+ RSBS r12, r1, r0, LSR #6
+ SUBCS r0, r0, r1, LSL #6
+ ADC r2, r2, r2
+ RSBS r12, r1, r0, LSR #5
+ SUBCS r0, r0, r1, LSL #5
+ ADC r2, r2, r2
+ RSBS r12, r1, r0, LSR #4
+ SUBCS r0, r0, r1, LSL #4
+ ADC r2, r2, r2
+label1
+ RSBS r12, r1, r0, LSR #3
+ SUBCS r0, r0, r1, LSL #3
+ ADC r2, r2, r2
+ RSBS r12, r1, r0, LSR #2
+ SUBCS r0, r0, r1, LSL #2
+ ADCS r2, r2, r2
+ BCS label3
+ RSBS r12, r1, r0, LSR #1
+ SUBCS r0, r0, r1, LSL #1
+ ADC r2, r2, r2
+ SUBS r1, r0, r1
+ MOVCC r1, r0
+ ADC r0, r2, r2
+ ASRS r3, r3, #31
+ RSBMI r0, r0, #0
+ RSBCS r1, r1, #0
+ BX r14
+
+ ; What to do about division by zero? For now, just return.
+__aeabi_idiv0
+ BX r14
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S new file mode 100644 index 000000000..f809a7dfe --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__divdi3)
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 1, uses_anonymous_args = 0
+ stmfd sp!, {r4, r5, r7, lr}
+ mov r4, r3, asr #31
+ add r7, sp, #8
+ stmfd sp!, {r10, r11}
+ mov r10, r1, asr #31
+ sub sp, sp, #8
+ mov r11, r10
+ mov r5, r4
+ eor r0, r0, r10
+ eor r1, r1, r10
+ eor r2, r2, r4
+ eor r3, r3, r4
+ subs r2, r2, r4
+ sbc r3, r3, r5
+ mov ip, #0
+ subs r0, r0, r10
+ sbc r1, r1, r11
+ str ip, [sp, #0]
+ bl ASM_PFX(__udivmoddi4)
+ eor r2, r10, r4
+ eor r3, r10, r4
+ eor r0, r0, r2
+ eor r1, r1, r3
+ subs r0, r0, r2
+ sbc r1, r1, r3
+ sub sp, r7, #16
+ ldmfd sp!, {r10, r11}
+ ldmfd sp!, {r4, r5, r7, pc}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S new file mode 100644 index 000000000..45c0fcc3f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S @@ -0,0 +1,24 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__divsi3)
+ eor r3, r0, r0, asr #31
+ eor r2, r1, r1, asr #31
+ stmfd sp!, {r4, r5, r7, lr}
+ mov r5, r0, asr #31
+ add r7, sp, #8
+ mov r4, r1, asr #31
+ sub r0, r3, r0, asr #31
+ sub r1, r2, r1, asr #31
+ bl ASM_PFX(__udivsi3)
+ eor r1, r5, r4
+ eor r0, r0, r1
+ rsb r0, r1, r0
+ ldmfd sp!, {r4, r5, r7, pc}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lasr.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lasr.S new file mode 100644 index 000000000..feeea9edd --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lasr.S @@ -0,0 +1,30 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+#
+#UINT64
+#EFIAPI
+#__aeabi_lasr (
+# IN UINT64 Value
+# IN UINT32 Shift
+# );
+#
+ASM_FUNC(__aeabi_lasr)
+ subs r3,r2,#0x20
+ bpl L_Test
+ rsb r3,r2,#0x20
+ lsr r0,r0,r2
+ orr r0,r0,r1,LSL r3
+ asr r1,r1,r2
+ bx lr
+L_Test:
+ asr r0,r1,r3
+ asr r1,r1,#31
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lasr.asm b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lasr.asm new file mode 100644 index 000000000..c388d7e27 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lasr.asm @@ -0,0 +1,34 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+
+ INCLUDE AsmMacroExport.inc
+
+;
+;UINT32
+;EFIAPI
+;__aeabi_lasr (
+; IN UINT32 Dividen
+; IN UINT32 Divisor
+; );
+;
+ RVCT_ASM_EXPORT __aeabi_lasr
+ SUBS r3,r2,#0x20
+ BPL {pc} + 0x18 ; 0x1c
+ RSB r3,r2,#0x20
+ LSR r0,r0,r2
+ ORR r0,r0,r1,LSL r3
+ ASR r1,r1,r2
+ BX lr
+ ASR r0,r1,r3
+ ASR r1,r1,#31
+ BX lr
+
+ END
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S new file mode 100644 index 000000000..9f4dddad7 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S @@ -0,0 +1,50 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+//
+// A pair of (unsigned) long longs is returned in {{r0, r1}, {r2, r3}},
+// the quotient in {r0, r1}, and the remainder in {r2, r3}.
+//
+//__value_in_regs lldiv_t
+//EFIAPI
+//__aeabi_ldivmod (
+// IN UINT64 Dividen
+// IN UINT64 Divisor
+// )//
+//
+
+ASM_FUNC(__aeabi_ldivmod)
+ push {r4,lr}
+ asrs r4,r1,#1
+ eor r4,r4,r3,LSR #1
+ bpl L_Test1
+ rsbs r0,r0,#0
+ rsc r1,r1,#0
+L_Test1:
+ tst r3,r3
+ bpl L_Test2
+ rsbs r2,r2,#0
+ rsc r3,r3,#0
+L_Test2:
+ bl ASM_PFX(__aeabi_uldivmod)
+ tst r4,#0x40000000
+ beq L_Test3
+ rsbs r0,r0,#0
+ rsc r1,r1,#0
+L_Test3:
+ tst r4,#0x80000000
+ beq L_Exit
+ rsbs r2,r2,#0
+ rsc r3,r3,#0
+L_Exit:
+ pop {r4,pc}
+
+
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm new file mode 100644 index 000000000..310b2e70d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm @@ -0,0 +1,71 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+// Copyright (c) 2018, Pete Batard. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+ IMPORT __aeabi_uldivmod
+ EXPORT __aeabi_ldivmod
+ EXPORT __rt_sdiv64
+
+ AREA s___aeabi_ldivmod, CODE, READONLY, ARM
+
+ ARM
+
+;
+;INT64
+;EFIAPI
+;__rt_sdiv64 (
+; IN INT64 Divisor
+; IN INT64 Dividend
+; );
+;
+__rt_sdiv64
+ ; Swap r0-r1 and r2-r3
+ MOV r12, r0
+ MOV r0, r2
+ MOV r2, r12
+ MOV r12, r1
+ MOV r1, r3
+ MOV r3, r12
+ B __aeabi_ldivmod
+
+;
+;INT64
+;EFIAPI
+;__aeabi_ldivmod (
+; IN INT64 Dividend
+; IN INT64 Divisor
+; );
+;
+__aeabi_ldivmod
+ PUSH {r4,lr}
+ ASRS r4,r1,#1
+ EOR r4,r4,r3,LSR #1
+ BPL L_Test1
+ RSBS r0,r0,#0
+ RSC r1,r1,#0
+L_Test1
+ TST r3,r3
+ BPL L_Test2
+ RSBS r2,r2,#0
+ RSC r3,r3,#0
+L_Test2
+ BL __aeabi_uldivmod
+ TST r4,#0x40000000
+ BEQ L_Test3
+ RSBS r0,r0,#0
+ RSC r1,r1,#0
+L_Test3
+ TST r4,#0x80000000
+ BEQ L_Exit
+ RSBS r2,r2,#0
+ RSC r3,r3,#0
+L_Exit
+ POP {r4,pc}
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S new file mode 100644 index 000000000..cc63a15b3 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S @@ -0,0 +1,31 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2013, ARM. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+#
+#VOID
+#EFIAPI
+#__aeabi_llsl (
+# IN VOID *Destination,
+# IN VOID *Source,
+# IN UINT32 Size
+# );
+#
+ASM_FUNC(__aeabi_llsl)
+ subs r3,r2,#0x20
+ bpl 1f
+ rsb r3,r2,#0x20
+ lsl r1,r1,r2
+ orr r1,r1,r0,lsr r3
+ lsl r0,r0,r2
+ bx lr
+1:
+ lsl r1,r0,r3
+ mov r0,#0
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.asm b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.asm new file mode 100644 index 000000000..d8ff6cafd --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.asm @@ -0,0 +1,36 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+
+ INCLUDE AsmMacroExport.inc
+
+;
+;VOID
+;EFIAPI
+;__aeabi_llsl (
+; IN VOID *Destination,
+; IN VOID *Source,
+; IN UINT32 Size
+; );
+;
+
+ RVCT_ASM_EXPORT __aeabi_llsl
+ SUBS r3,r2,#0x20
+ BPL {pc} + 0x18 ; 0x1c
+ RSB r3,r2,#0x20
+ LSL r1,r1,r2
+ ORR r1,r1,r0,LSR r3
+ LSL r0,r0,r2
+ BX lr
+ LSL r1,r0,r3
+ MOV r0,#0
+ BX lr
+
+ END
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S new file mode 100644 index 000000000..246d5651e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S @@ -0,0 +1,30 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2013, ARM. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+#VOID
+#EFIAPI
+#__aeabi_llsr (
+# IN VOID *Destination,
+# IN VOID *Source,
+# IN UINT32 Size
+# );
+#
+ASM_FUNC(__aeabi_llsr)
+ subs r3,r2,#0x20
+ bpl 1f
+ rsb r3,r2,#0x20
+ lsr r0,r0,r2
+ orr r0,r0,r1,lsl r3
+ lsr r1,r1,r2
+ bx lr
+1:
+ lsr r0,r1,r3
+ mov r1,#0
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.asm b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.asm new file mode 100644 index 000000000..fce1df28f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.asm @@ -0,0 +1,39 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+// Copyright (c) 2018, Pete Batard. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+ EXPORT __aeabi_llsr
+ EXPORT __rt_srsh
+
+ AREA s___aeabi_llsr, CODE, READONLY, ARM
+
+ ARM
+
+;
+;VOID
+;EFIAPI
+;__aeabi_llsr (
+; IN UINT64 Value,
+; IN UINT32 Shift
+;)
+;
+__aeabi_llsr
+__rt_srsh
+ SUBS r3,r2,#0x20
+ BPL __aeabi_llsr_label1
+ RSB r3,r2,#0x20
+ LSR r0,r0,r2
+ ORR r0,r0,r1,LSL r3
+ LSR r1,r1,r2
+ BX lr
+__aeabi_llsr_label1
+ LSR r0,r1,r3
+ MOV r1,#0
+ BX lr
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S new file mode 100644 index 000000000..829d8deb0 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S @@ -0,0 +1,27 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__lshrdi3)
+ cmp r2, #31
+ bls L2
+ cmp r2, #63
+ subls r2, r2, #32
+ movls r2, r1, lsr r2
+ movhi r2, #0
+ mov r0, r2
+ mov r1, #0
+ bx lr
+L2:
+ cmp r2, #0
+ rsbne r3, r2, #32
+ movne r3, r1, asl r3
+ movne r1, r1, lsr r2
+ orrne r0, r3, r0, lsr r2
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S new file mode 100644 index 000000000..f9f1932c6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S @@ -0,0 +1,40 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+# VOID
+# EFIAPI
+# memmove (
+# IN VOID *Destination,
+# IN CONST VOID *Source,
+# IN UINT32 Size
+# );
+ASM_FUNC(memmove)
+ CMP r2, #0
+ BXEQ lr
+ CMP r0, r1
+ BXEQ lr
+ BHI memmove_backward
+
+memmove_forward:
+ LDRB r3, [r1], #1
+ STRB r3, [r0], #1
+ SUBS r2, r2, #1
+ BXEQ lr
+ B memmove_forward
+
+memmove_backward:
+ add r0, r2
+ add r1, r2
+memmove_backward_loop:
+ LDRB r3, [r1, #-1]!
+ STRB r3, [r0, #-1]!
+ SUBS r2, r2, #1
+ BXEQ lr
+ B memmove_backward_loop
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.asm b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.asm new file mode 100644 index 000000000..939b46aee --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.asm @@ -0,0 +1,46 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+
+ INCLUDE AsmMacroExport.inc
+
+;
+;VOID
+;EFIAPI
+;__aeabi_memmove (
+; IN VOID *Destination,
+; IN CONST VOID *Source,
+; IN UINT32 Size
+; );
+;
+ RVCT_ASM_EXPORT __aeabi_memmove
+ CMP r2, #0
+ BXEQ lr
+ CMP r0, r1
+ BXEQ lr
+ BHI memmove_backward
+
+memmove_forward
+ LDRB r3, [r1], #1
+ STRB r3, [r0], #1
+ SUBS r2, r2, #1
+ BNE memmove_forward
+ BX lr
+
+memmove_backward
+ add r0, r2
+ add r1, r2
+memmove_backward_loop
+ LDRB r3, [r1, #-1]!
+ STRB r3, [r0, #-1]!
+ SUBS r2, r2, #1
+ BNE memmove_backward_loop
+ BX lr
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S new file mode 100644 index 000000000..faf077dc6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__moddi3)
+ stmfd sp!, {r4, r5, r7, lr}
+ mov r4, r1, asr #31
+ add r7, sp, #8
+ stmfd sp!, {r10, r11}
+ mov r10, r3, asr #31
+ sub sp, sp, #16
+ mov r5, r4
+ mov r11, r10
+ eor r0, r0, r4
+ eor r1, r1, r4
+ eor r2, r2, r10
+ eor r3, r3, r10
+ add ip, sp, #8
+ subs r0, r0, r4
+ sbc r1, r1, r5
+ subs r2, r2, r10
+ sbc r3, r3, r11
+ str ip, [sp, #0]
+ bl ASM_PFX(__udivmoddi4)
+ ldrd r0, [sp, #8]
+ eor r0, r0, r4
+ eor r1, r1, r4
+ subs r0, r0, r4
+ sbc r1, r1, r5
+ sub sp, r7, #16
+ ldmfd sp!, {r10, r11}
+ ldmfd sp!, {r4, r5, r7, pc}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S new file mode 100644 index 000000000..b3299851b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S @@ -0,0 +1,19 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__modsi3)
+ stmfd sp!, {r4, r5, r7, lr}
+ add r7, sp, #8
+ mov r5, r0
+ mov r4, r1
+ bl ASM_PFX(__divsi3)
+ mul r0, r4, r0
+ rsb r0, r0, r5
+ ldmfd sp!, {r4, r5, r7, pc}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S new file mode 100644 index 000000000..adee64782 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S @@ -0,0 +1,50 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__muldi3)
+ stmfd sp!, {r4, r5, r6, r7, lr}
+ add r7, sp, #12
+ stmfd sp!, {r8, r10, r11}
+ ldr r11, L4
+ mov r4, r0, lsr #16
+ and r8, r0, r11
+ and ip, r2, r11
+ mul lr, ip, r8
+ mul ip, r4, ip
+ sub sp, sp, #8
+ add r10, ip, lr, lsr #16
+ and ip, r10, r11
+ and lr, lr, r11
+ mov r6, r2, lsr #16
+ str r4, [sp, #4]
+ add r4, lr, ip, asl #16
+ mul ip, r8, r6
+ mov r5, r10, lsr #16
+ add r10, ip, r4, lsr #16
+ and ip, r10, r11
+ and lr, r4, r11
+ add r4, lr, ip, asl #16
+ mul r0, r3, r0
+ add ip, r5, r10, lsr #16
+ ldr r5, [sp, #4]
+ mla r0, r2, r1, r0
+ mla r5, r6, r5, ip
+ mov r10, r4
+ add r11, r0, r5
+ mov r1, r11
+ mov r0, r4
+ sub sp, r7, #24
+ ldmfd sp!, {r8, r10, r11}
+ ldmfd sp!, {r4, r5, r6, r7, pc}
+ .p2align 2
+L5:
+ .align 2
+L4:
+ .long 65535
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.S new file mode 100644 index 000000000..a878f3aaf --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.S @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+.text
+
+GCC_ASM_EXPORT(__ARM_ll_mullu)
+GCC_ASM_EXPORT(__aeabi_lmul)
+#
+#INT64
+#EFIAPI
+#__aeabi_lmul (
+# IN INT64 Multiplicand
+# IN INT32 Multiplier
+# );
+#
+ASM_PFX(__ARM_ll_mullu):
+ mov r3, #0
+# Make upper part of INT64 Multiplier 0 and use __aeabi_lmul
+
+#
+#INT64
+#EFIAPI
+#__aeabi_lmul (
+# IN INT64 Multiplicand
+# IN INT64 Multiplier
+# );
+#
+ASM_PFX(__aeabi_lmul):
+ stmdb sp!, {lr}
+ mov lr, r0
+ umull r0, ip, r2, lr
+ mla r1, r2, r1, ip
+ mla r1, r3, lr, r1
+ ldmia sp!, {pc}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.asm b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.asm new file mode 100644 index 000000000..8ff0c0669 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.asm @@ -0,0 +1,43 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+ EXPORT __ARM_ll_mullu
+ EXPORT __aeabi_lmul
+
+ AREA Math, CODE, READONLY
+
+;
+;INT64
+;EFIAPI
+;__aeabi_lmul (
+; IN INT64 Multiplicand
+; IN INT32 Multiplier
+; );
+;
+__ARM_ll_mullu
+ mov r3, #0
+// Make upper part of INT64 Multiplier 0 and use __aeabi_lmul
+
+;
+;INT64
+;EFIAPI
+;__aeabi_lmul (
+; IN INT64 Multiplicand
+; IN INT64 Multiplier
+; );
+;
+__aeabi_lmul
+ stmdb sp!, {lr}
+ mov lr, r0
+ umull r0, ip, r2, lr
+ mla r1, r2, r1, ip
+ mla r1, r3, lr, r1
+ ldmia sp!, {pc}
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/sourcery.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/sourcery.S new file mode 100644 index 000000000..81459fcfc --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/sourcery.S @@ -0,0 +1,49 @@ +#------s------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+
+ .text
+ .align 2
+ GCC_ASM_EXPORT(__aeabi_ulcmp)
+
+ASM_PFX(__aeabi_ulcmp):
+ stmfd sp!, {r4, r5, r8}
+ cmp r3, r1
+ mov r8, r0
+ mov r9, r1
+ mov r4, r2
+ mov r5, r3
+ bls L16
+L2:
+ mvn r0, #0
+L1:
+ ldmfd sp!, {r4, r5, r8}
+ bx lr
+L16:
+ beq L17
+L4:
+ cmp r9, r5
+ bhi L7
+ beq L18
+ cmp r8, r4
+L14:
+ cmpeq r9, r5
+ moveq r0, #0
+ beq L1
+ b L1
+L18:
+ cmp r8, r4
+ bls L14
+L7:
+ mov r0, #1
+ b L1
+L17:
+ cmp r2, r0
+ bhi L2
+ b L4
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch.asm b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch.asm new file mode 100644 index 000000000..c8e8afef3 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch.asm @@ -0,0 +1,22 @@ +///------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+
+
+ INCLUDE AsmMacroExport.inc
+
+ RVCT_ASM_EXPORT __ARM_switch8
+ LDRB r12,[lr,#-1]
+ CMP r3,r12
+ LDRBCC r3,[lr,r3]
+ LDRBCS r3,[lr,r12]
+ ADD r12,lr,r3,LSL #1
+ BX r12
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S new file mode 100644 index 000000000..e6d55673c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S @@ -0,0 +1,24 @@ +#/** @file
+# Compiler intrinsic for ARM compiler
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+#
+
+#include <AsmMacroIoLib.h>
+
+.syntax unified
+
+ASM_FUNC(__switch16)
+ ldrh ip, [lr, #-1]
+ cmp r0, ip
+ add r0, lr, r0, lsl #1
+ ldrshcc r0, [r0, #1]
+ add ip, lr, ip, lsl #1
+ ldrshcs r0, [ip, #1]
+ add ip, lr, r0, lsl #1
+ bx ip
+
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S new file mode 100644 index 000000000..fbf72dd5f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S @@ -0,0 +1,23 @@ +#/** @file
+# Compiler intrinsic for ARM compiler
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+#
+
+#include <AsmMacroIoLib.h>
+
+.syntax unified
+
+ASM_FUNC(__switch32)
+ ldr ip, [lr, #-1]
+ cmp r0, ip
+ add r0, lr, r0, lsl #2
+ ldrcc r0, [r0, #3]
+ add ip, lr, ip, lsl #2
+ ldrcs r0, [ip, #3]
+ add ip, lr, r0
+ bx ip
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S new file mode 100644 index 000000000..aea048f4f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S @@ -0,0 +1,21 @@ +#/** @file
+# Compiler intrinsic for ARM compiler
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+#
+
+#include <AsmMacroIoLib.h>
+
+.syntax unified
+
+ASM_FUNC(__switch8)
+ ldrb ip, [lr, #-1]
+ cmp r0, ip
+ ldrsbcc r0, [lr, r0]
+ ldrsbcs r0, [lr, ip]
+ add ip, lr, r0, lsl #1
+ bx ip
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S new file mode 100644 index 000000000..22aeacdec --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S @@ -0,0 +1,21 @@ +#/** @file
+# Compiler intrinsic for ARM compiler
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+#
+
+#include <AsmMacroIoLib.h>
+
+.syntax unified
+
+ASM_FUNC(__switchu8)
+ ldrb ip,[lr,#-1]
+ cmp r0,ip
+ ldrbcc r0,[lr,r0]
+ ldrbcs r0,[lr,ip]
+ add ip,lr,r0,LSL #1
+ bx ip
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S new file mode 100644 index 000000000..681e3cf6e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S @@ -0,0 +1,30 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__ucmpdi2)
+ stmfd sp!, {r4, r5, r8, lr}
+ cmp r1, r3
+ mov r8, r0
+ mov r4, r2
+ mov r5, r3
+ bcc L2
+ bhi L4
+ cmp r0, r2
+ bcc L2
+ movls r0, #1
+ bls L8
+ b L4
+L2:
+ mov r0, #0
+ b L8
+L4:
+ mov r0, #2
+L8:
+ ldmfd sp!, {r4, r5, r8, pc}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S new file mode 100644 index 000000000..505ae545f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S @@ -0,0 +1,19 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__udivdi3)
+ stmfd sp!, {r7, lr}
+ add r7, sp, #0
+ sub sp, sp, #8
+ mov ip, #0
+ str ip, [sp, #0]
+ bl ASM_PFX(__udivmoddi4)
+ sub sp, r7, #0
+ ldmfd sp!, {r7, pc}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S new file mode 100644 index 000000000..a74db6fad --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S @@ -0,0 +1,236 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ .syntax unified
+
+ASM_FUNC(__udivmoddi4)
+ stmfd sp!, {r4, r5, r6, r7, lr}
+ add r7, sp, #12
+ stmfd sp!, {r10, r11}
+ sub sp, sp, #20
+ stmia sp, {r2-r3}
+ ldr r6, [sp, #48]
+ orrs r2, r2, r3
+ mov r10, r0
+ mov r11, r1
+ beq L2
+ subs ip, r1, #0
+ bne L4
+ cmp r3, #0
+ bne L6
+ cmp r6, #0
+ beq L8
+ mov r1, r2
+ bl ASM_PFX(__umodsi3)
+ mov r1, #0
+ stmia r6, {r0-r1}
+L8:
+ ldr r1, [sp, #0]
+ mov r0, r10
+ b L45
+L6:
+ cmp r6, #0
+ movne r1, #0
+ stmiane r6, {r0-r1}
+ b L2
+L4:
+ ldr r1, [sp, #0]
+ cmp r1, #0
+ bne L12
+ ldr r2, [sp, #4]
+ cmp r2, #0
+ bne L14
+ cmp r6, #0
+ beq L16
+ mov r1, r2
+ mov r0, r11
+ bl ASM_PFX(__umodsi3)
+ mov r1, #0
+ stmia r6, {r0-r1}
+L16:
+ ldr r1, [sp, #4]
+ mov r0, r11
+L45:
+ bl ASM_PFX(__udivsi3)
+L46:
+ mov r10, r0
+ mov r11, #0
+ b L10
+L14:
+ subs r1, r0, #0
+ bne L18
+ cmp r6, #0
+ beq L16
+ ldr r1, [sp, #4]
+ mov r0, r11
+ bl ASM_PFX(__umodsi3)
+ mov r4, r10
+ mov r5, r0
+ stmia r6, {r4-r5}
+ b L16
+L18:
+ sub r3, r2, #1
+ tst r2, r3
+ bne L22
+ cmp r6, #0
+ movne r4, r0
+ andne r5, ip, r3
+ stmiane r6, {r4-r5}
+L24:
+ rsb r3, r2, #0
+ and r3, r2, r3
+ clz r3, r3
+ rsb r3, r3, #31
+ mov r0, ip, lsr r3
+ b L46
+L22:
+ clz r2, r2
+ clz r3, ip
+ rsb r3, r3, r2
+ cmp r3, #30
+ bhi L48
+ rsb r2, r3, #31
+ add lr, r3, #1
+ mov r3, r1, asl r2
+ str r3, [sp, #12]
+ mov r3, r1, lsr lr
+ ldr r0, [sp, #0]
+ mov r5, ip, lsr lr
+ orr r4, r3, ip, asl r2
+ str r0, [sp, #8]
+ b L29
+L12:
+ ldr r3, [sp, #4]
+ cmp r3, #0
+ bne L30
+ sub r3, r1, #1
+ tst r1, r3
+ bne L32
+ cmp r6, #0
+ andne r3, r3, r0
+ movne r2, r3
+ movne r3, #0
+ stmiane r6, {r2-r3}
+L34:
+ cmp r1, #1
+ beq L10
+ rsb r3, r1, #0
+ and r3, r1, r3
+ clz r3, r3
+ rsb r0, r3, #31
+ mov r1, ip, lsr r0
+ rsb r3, r0, #32
+ mov r0, r10, lsr r0
+ orr ip, r0, ip, asl r3
+ str r1, [sp, #12]
+ str ip, [sp, #8]
+ ldrd r10, [sp, #8]
+ b L10
+L32:
+ clz r2, r1
+ clz r3, ip
+ rsb r3, r3, r2
+ rsb r4, r3, #31
+ mov r2, r0, asl r4
+ mvn r1, r3
+ and r2, r2, r1, asr #31
+ add lr, r3, #33
+ str r2, [sp, #8]
+ add r2, r3, #1
+ mov r3, r3, asr #31
+ and r0, r3, r0, asl r1
+ mov r3, r10, lsr r2
+ orr r3, r3, ip, asl r4
+ and r3, r3, r1, asr #31
+ orr r0, r0, r3
+ mov r3, ip, lsr lr
+ str r0, [sp, #12]
+ mov r0, r10, lsr lr
+ and r5, r3, r2, asr #31
+ rsb r3, lr, #31
+ mov r3, r3, asr #31
+ orr r0, r0, ip, asl r1
+ and r3, r3, ip, lsr r2
+ and r0, r0, r2, asr #31
+ orr r4, r3, r0
+ b L29
+L30:
+ clz r2, r3
+ clz r3, ip
+ rsb r3, r3, r2
+ cmp r3, #31
+ bls L37
+L48:
+ cmp r6, #0
+ stmiane r6, {r10-r11}
+ b L2
+L37:
+ rsb r1, r3, #31
+ mov r0, r0, asl r1
+ add lr, r3, #1
+ mov r2, #0
+ str r0, [sp, #12]
+ mov r0, r10, lsr lr
+ str r2, [sp, #8]
+ sub r2, r3, #31
+ and r0, r0, r2, asr #31
+ mov r3, ip, lsr lr
+ orr r4, r0, ip, asl r1
+ and r5, r3, r2, asr #31
+L29:
+ mov ip, #0
+ mov r10, ip
+ b L40
+L41:
+ ldr r1, [sp, #12]
+ ldr r2, [sp, #8]
+ mov r3, r4, lsr #31
+ orr r5, r3, r5, asl #1
+ mov r3, r1, lsr #31
+ orr r4, r3, r4, asl #1
+ mov r3, r2, lsr #31
+ orr r0, r3, r1, asl #1
+ orr r1, ip, r2, asl #1
+ ldmia sp, {r2-r3}
+ str r0, [sp, #12]
+ subs r2, r2, r4
+ sbc r3, r3, r5
+ str r1, [sp, #8]
+ subs r0, r2, #1
+ sbc r1, r3, #0
+ mov r2, r1, asr #31
+ ldmia sp, {r0-r1}
+ mov r3, r2
+ and ip, r2, #1
+ and r3, r3, r1
+ and r2, r2, r0
+ subs r4, r4, r2
+ sbc r5, r5, r3
+ add r10, r10, #1
+L40:
+ cmp r10, lr
+ bne L41
+ ldrd r0, [sp, #8]
+ adds r0, r0, r0
+ adc r1, r1, r1
+ cmp r6, #0
+ orr r10, r0, ip
+ mov r11, r1
+ stmiane r6, {r4-r5}
+ b L10
+L2:
+ mov r10, #0
+ mov r11, #0
+L10:
+ mov r0, r10
+ mov r1, r11
+ sub sp, r7, #20
+ ldmfd sp!, {r10, r11}
+ ldmfd sp!, {r4, r5, r6, r7, pc}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S new file mode 100644 index 000000000..e1f7da782 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S @@ -0,0 +1,51 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ .syntax unified
+
+ASM_FUNC(__udivsi3)
+ cmp r1, #0
+ cmpne r0, #0
+ stmfd sp!, {r4, r5, r7, lr}
+ add r7, sp, #8
+ beq L2
+ clz r2, r1
+ clz r3, r0
+ rsb r3, r3, r2
+ cmp r3, #31
+ bhi L2
+ ldmfdeq sp!, {r4, r5, r7, pc}
+ add r5, r3, #1
+ rsb r3, r3, #31
+ mov lr, #0
+ mov r2, r0, asl r3
+ mov ip, r0, lsr r5
+ mov r4, lr
+ b L8
+L9:
+ mov r0, r2, lsr #31
+ orr ip, r0, ip, asl #1
+ orr r2, r3, lr
+ rsb r3, ip, r1
+ sub r3, r3, #1
+ and r0, r1, r3, asr #31
+ mov lr, r3, lsr #31
+ rsb ip, r0, ip
+ add r4, r4, #1
+L8:
+ cmp r4, r5
+ mov r3, r2, asl #1
+ bne L9
+ orr r0, r3, lr
+ ldmfd sp!, {r4, r5, r7, pc}
+L2:
+ mov r0, #0
+ ldmfd sp!, {r4, r5, r7, pc}
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.S new file mode 100644 index 000000000..f61128301 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.S @@ -0,0 +1,261 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+
+ .text
+ .align 2
+ GCC_ASM_EXPORT(__aeabi_uldivmod)
+
+//
+//UINT64
+//EFIAPI
+//__aeabi_uldivmod (
+// IN UINT64 Dividend
+// IN UINT64 Divisor
+// )
+//
+ASM_PFX(__aeabi_uldivmod):
+ stmdb sp!, {r4, r5, r6, lr}
+ mov r4, r1
+ mov r5, r0
+ mov r6, #0 // 0x0
+ orrs ip, r3, r2, lsr #31
+ bne ASM_PFX(__aeabi_uldivmod_label1)
+ tst r2, r2
+ beq ASM_PFX(_ll_div0)
+ movs ip, r2, lsr #15
+ addeq r6, r6, #16 // 0x10
+ mov ip, r2, lsl r6
+ movs lr, ip, lsr #23
+ moveq ip, ip, lsl #8
+ addeq r6, r6, #8 // 0x8
+ movs lr, ip, lsr #27
+ moveq ip, ip, lsl #4
+ addeq r6, r6, #4 // 0x4
+ movs lr, ip, lsr #29
+ moveq ip, ip, lsl #2
+ addeq r6, r6, #2 // 0x2
+ movs lr, ip, lsr #30
+ moveq ip, ip, lsl #1
+ addeq r6, r6, #1 // 0x1
+ b ASM_PFX(_ll_udiv_small)
+ASM_PFX(__aeabi_uldivmod_label1):
+ tst r3, #-2147483648 // 0x80000000
+ bne ASM_PFX(__aeabi_uldivmod_label2)
+ movs ip, r3, lsr #15
+ addeq r6, r6, #16 // 0x10
+ mov ip, r3, lsl r6
+ movs lr, ip, lsr #23
+ moveq ip, ip, lsl #8
+ addeq r6, r6, #8 // 0x8
+ movs lr, ip, lsr #27
+ moveq ip, ip, lsl #4
+ addeq r6, r6, #4 // 0x4
+ movs lr, ip, lsr #29
+ moveq ip, ip, lsl #2
+ addeq r6, r6, #2 // 0x2
+ movs lr, ip, lsr #30
+ addeq r6, r6, #1 // 0x1
+ rsb r3, r6, #32 // 0x20
+ moveq ip, ip, lsl #1
+ orr ip, ip, r2, lsr r3
+ mov lr, r2, lsl r6
+ b ASM_PFX(_ll_udiv_big)
+ASM_PFX(__aeabi_uldivmod_label2):
+ mov ip, r3
+ mov lr, r2
+ b ASM_PFX(_ll_udiv_ginormous)
+
+ASM_PFX(_ll_udiv_small):
+ cmp r4, ip, lsl #1
+ mov r3, #0 // 0x0
+ subcs r4, r4, ip, lsl #1
+ addcs r3, r3, #2 // 0x2
+ cmp r4, ip
+ subcs r4, r4, ip
+ adcs r3, r3, #0 // 0x0
+ add r2, r6, #32 // 0x20
+ cmp r2, #32 // 0x20
+ rsb ip, ip, #0 // 0x0
+ bcc ASM_PFX(_ll_udiv_small_label1)
+ orrs r0, r4, r5, lsr #30
+ moveq r4, r5
+ moveq r5, #0 // 0x0
+ subeq r2, r2, #32 // 0x20
+ASM_PFX(_ll_udiv_small_label1):
+ mov r1, #0 // 0x0
+ cmp r2, #16 // 0x10
+ bcc ASM_PFX(_ll_udiv_small_label2)
+ movs r0, r4, lsr #14
+ moveq r4, r4, lsl #16
+ addeq r1, r1, #16 // 0x10
+ASM_PFX(_ll_udiv_small_label2):
+ sub lr, r2, r1
+ cmp lr, #8 // 0x8
+ bcc ASM_PFX(_ll_udiv_small_label3)
+ movs r0, r4, lsr #22
+ moveq r4, r4, lsl #8
+ addeq r1, r1, #8 // 0x8
+ASM_PFX(_ll_udiv_small_label3):
+ rsb r0, r1, #32 // 0x20
+ sub r2, r2, r1
+ orr r4, r4, r5, lsr r0
+ mov r5, r5, lsl r1
+ cmp r2, #1 // 0x1
+ bcc ASM_PFX(_ll_udiv_small_label5)
+ sub r2, r2, #1 // 0x1
+ and r0, r2, #7 // 0x7
+ eor r0, r0, #7 // 0x7
+ adds r0, r0, r0, lsl #1
+ add pc, pc, r0, lsl #2
+ nop // (mov r0,r0)
+ASM_PFX(_ll_udiv_small_label4):
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ sub r2, r2, #8 // 0x8
+ tst r2, r2
+ rsbcc r4, ip, r4
+ bpl ASM_PFX(_ll_udiv_small_label4)
+ASM_PFX(_ll_udiv_small_label5):
+ mov r2, r4, lsr r6
+ bic r4, r4, r2, lsl r6
+ adcs r0, r5, r5
+ adc r1, r4, r4
+ add r1, r1, r3, lsl r6
+ mov r3, #0 // 0x0
+ ldmia sp!, {r4, r5, r6, pc}
+
+ASM_PFX(_ll_udiv_big):
+ subs r0, r5, lr
+ mov r3, #0 // 0x0
+ sbcs r1, r4, ip
+ movcs r5, r0
+ movcs r4, r1
+ adcs r3, r3, #0 // 0x0
+ subs r0, r5, lr
+ sbcs r1, r4, ip
+ movcs r5, r0
+ movcs r4, r1
+ adcs r3, r3, #0 // 0x0
+ subs r0, r5, lr
+ sbcs r1, r4, ip
+ movcs r5, r0
+ movcs r4, r1
+ adcs r3, r3, #0 // 0x0
+ mov r1, #0 // 0x0
+ rsbs lr, lr, #0 // 0x0
+ rsc ip, ip, #0 // 0x0
+ cmp r6, #16 // 0x10
+ bcc ASM_PFX(_ll_udiv_big_label1)
+ movs r0, r4, lsr #14
+ moveq r4, r4, lsl #16
+ addeq r1, r1, #16 // 0x10
+ASM_PFX(_ll_udiv_big_label1):
+ sub r2, r6, r1
+ cmp r2, #8 // 0x8
+ bcc ASM_PFX(_ll_udiv_big_label2)
+ movs r0, r4, lsr #22
+ moveq r4, r4, lsl #8
+ addeq r1, r1, #8 // 0x8
+ASM_PFX(_ll_udiv_big_label2):
+ rsb r0, r1, #32 // 0x20
+ sub r2, r6, r1
+ orr r4, r4, r5, lsr r0
+ mov r5, r5, lsl r1
+ cmp r2, #1 // 0x1
+ bcc ASM_PFX(_ll_udiv_big_label4)
+ sub r2, r2, #1 // 0x1
+ and r0, r2, #3 // 0x3
+ rsb r0, r0, #3 // 0x3
+ adds r0, r0, r0, lsl #1
+ add pc, pc, r0, lsl #3
+ nop // (mov r0,r0)
+ASM_PFX(_ll_udiv_big_label3):
+ adcs r5, r5, r5
+ adcs r4, r4, r4
+ adcs r0, lr, r5
+ adcs r1, ip, r4
+ movcs r5, r0
+ movcs r4, r1
+ adcs r5, r5, r5
+ adcs r4, r4, r4
+ adcs r0, lr, r5
+ adcs r1, ip, r4
+ movcs r5, r0
+ movcs r4, r1
+ adcs r5, r5, r5
+ adcs r4, r4, r4
+ adcs r0, lr, r5
+ adcs r1, ip, r4
+ movcs r5, r0
+ movcs r4, r1
+ sub r2, r2, #4 // 0x4
+ adcs r5, r5, r5
+ adcs r4, r4, r4
+ adcs r0, lr, r5
+ adcs r1, ip, r4
+ tst r2, r2
+ movcs r5, r0
+ movcs r4, r1
+ bpl ASM_PFX(_ll_udiv_big_label3)
+ASM_PFX(_ll_udiv_big_label4):
+ mov r1, #0 // 0x0
+ mov r2, r5, lsr r6
+ bic r5, r5, r2, lsl r6
+ adcs r0, r5, r5
+ adc r1, r1, #0 // 0x0
+ movs lr, r3, lsl r6
+ mov r3, r4, lsr r6
+ bic r4, r4, r3, lsl r6
+ adc r1, r1, #0 // 0x0
+ adds r0, r0, lr
+ orr r2, r2, r4, ror r6
+ adc r1, r1, #0 // 0x0
+ ldmia sp!, {r4, r5, r6, pc}
+
+ASM_PFX(_ll_udiv_ginormous):
+ subs r2, r5, lr
+ mov r1, #0 // 0x0
+ sbcs r3, r4, ip
+ adc r0, r1, r1
+ movcc r2, r5
+ movcc r3, r4
+ ldmia sp!, {r4, r5, r6, pc}
+
+ASM_PFX(_ll_div0):
+ ldmia sp!, {r4, r5, r6, lr}
+ mov r0, #0 // 0x0
+ mov r1, #0 // 0x0
+ b ASM_PFX(__aeabi_ldiv0)
+
+ASM_PFX(__aeabi_ldiv0):
+ bx r14
+
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.asm b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.asm new file mode 100644 index 000000000..e143052a7 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.asm @@ -0,0 +1,282 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+// Copyright (c) 2018, Pete Batard. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+ EXPORT __aeabi_uldivmod
+ EXPORT __rt_udiv64
+
+ AREA s___aeabi_uldivmod, CODE, READONLY, ARM
+
+ ARM
+
+;
+;UINT64
+;EFIAPI
+;__rt_udiv64 (
+; IN UINT64 Divisor
+; IN UINT64 Dividend
+; )
+;
+__rt_udiv64
+ ; Swap r0-r1 and r2-r3
+ mov r12, r0
+ mov r0, r2
+ mov r2, r12
+ mov r12, r1
+ mov r1, r3
+ mov r3, r12
+ b __aeabi_uldivmod
+
+;
+;UINT64
+;EFIAPI
+;__aeabi_uldivmod (
+; IN UINT64 Dividend
+; IN UINT64 Divisor
+; )
+;
+__aeabi_uldivmod
+ stmdb sp!, {r4, r5, r6, lr}
+ mov r4, r1
+ mov r5, r0
+ mov r6, #0 ; 0x0
+ orrs ip, r3, r2, lsr #31
+ bne __aeabi_uldivmod_label1
+ tst r2, r2
+ beq _ll_div0
+ movs ip, r2, lsr #15
+ addeq r6, r6, #16 ; 0x10
+ mov ip, r2, lsl r6
+ movs lr, ip, lsr #23
+ moveq ip, ip, lsl #8
+ addeq r6, r6, #8 ; 0x8
+ movs lr, ip, lsr #27
+ moveq ip, ip, lsl #4
+ addeq r6, r6, #4 ; 0x4
+ movs lr, ip, lsr #29
+ moveq ip, ip, lsl #2
+ addeq r6, r6, #2 ; 0x2
+ movs lr, ip, lsr #30
+ moveq ip, ip, lsl #1
+ addeq r6, r6, #1 ; 0x1
+ b _ll_udiv_small
+__aeabi_uldivmod_label1
+ tst r3, #-2147483648 ; 0x80000000
+ bne __aeabi_uldivmod_label2
+ movs ip, r3, lsr #15
+ addeq r6, r6, #16 ; 0x10
+ mov ip, r3, lsl r6
+ movs lr, ip, lsr #23
+ moveq ip, ip, lsl #8
+ addeq r6, r6, #8 ; 0x8
+ movs lr, ip, lsr #27
+ moveq ip, ip, lsl #4
+ addeq r6, r6, #4 ; 0x4
+ movs lr, ip, lsr #29
+ moveq ip, ip, lsl #2
+ addeq r6, r6, #2 ; 0x2
+ movs lr, ip, lsr #30
+ addeq r6, r6, #1 ; 0x1
+ rsb r3, r6, #32 ; 0x20
+ moveq ip, ip, lsl #1
+ orr ip, ip, r2, lsr r3
+ mov lr, r2, lsl r6
+ b _ll_udiv_big
+__aeabi_uldivmod_label2
+ mov ip, r3
+ mov lr, r2
+ b _ll_udiv_ginormous
+
+_ll_udiv_small
+ cmp r4, ip, lsl #1
+ mov r3, #0 ; 0x0
+ subcs r4, r4, ip, lsl #1
+ addcs r3, r3, #2 ; 0x2
+ cmp r4, ip
+ subcs r4, r4, ip
+ adcs r3, r3, #0 ; 0x0
+ add r2, r6, #32 ; 0x20
+ cmp r2, #32 ; 0x20
+ rsb ip, ip, #0 ; 0x0
+ bcc _ll_udiv_small_label1
+ orrs r0, r4, r5, lsr #30
+ moveq r4, r5
+ moveq r5, #0 ; 0x0
+ subeq r2, r2, #32 ; 0x20
+_ll_udiv_small_label1
+ mov r1, #0 ; 0x0
+ cmp r2, #16 ; 0x10
+ bcc _ll_udiv_small_label2
+ movs r0, r4, lsr #14
+ moveq r4, r4, lsl #16
+ addeq r1, r1, #16 ; 0x10
+_ll_udiv_small_label2
+ sub lr, r2, r1
+ cmp lr, #8 ; 0x8
+ bcc _ll_udiv_small_label3
+ movs r0, r4, lsr #22
+ moveq r4, r4, lsl #8
+ addeq r1, r1, #8 ; 0x8
+_ll_udiv_small_label3
+ rsb r0, r1, #32 ; 0x20
+ sub r2, r2, r1
+ orr r4, r4, r5, lsr r0
+ mov r5, r5, lsl r1
+ cmp r2, #1 ; 0x1
+ bcc _ll_udiv_small_label5
+ sub r2, r2, #1 ; 0x1
+ and r0, r2, #7 ; 0x7
+ eor r0, r0, #7 ; 0x7
+ adds r0, r0, r0, lsl #1
+ add pc, pc, r0, lsl #2
+ nop ; (mov r0,r0)
+_ll_udiv_small_label4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ rsbcc r4, ip, r4
+ adcs r5, r5, r5
+ adcs r4, ip, r4, lsl #1
+ sub r2, r2, #8 ; 0x8
+ tst r2, r2
+ rsbcc r4, ip, r4
+ bpl _ll_udiv_small_label4
+_ll_udiv_small_label5
+ mov r2, r4, lsr r6
+ bic r4, r4, r2, lsl r6
+ adcs r0, r5, r5
+ adc r1, r4, r4
+ add r1, r1, r3, lsl r6
+ mov r3, #0 ; 0x0
+ ldmia sp!, {r4, r5, r6, pc}
+
+_ll_udiv_big
+ subs r0, r5, lr
+ mov r3, #0 ; 0x0
+ sbcs r1, r4, ip
+ movcs r5, r0
+ movcs r4, r1
+ adcs r3, r3, #0 ; 0x0
+ subs r0, r5, lr
+ sbcs r1, r4, ip
+ movcs r5, r0
+ movcs r4, r1
+ adcs r3, r3, #0 ; 0x0
+ subs r0, r5, lr
+ sbcs r1, r4, ip
+ movcs r5, r0
+ movcs r4, r1
+ adcs r3, r3, #0 ; 0x0
+ mov r1, #0 ; 0x0
+ rsbs lr, lr, #0 ; 0x0
+ rsc ip, ip, #0 ; 0x0
+ cmp r6, #16 ; 0x10
+ bcc _ll_udiv_big_label1
+ movs r0, r4, lsr #14
+ moveq r4, r4, lsl #16
+ addeq r1, r1, #16 ; 0x10
+_ll_udiv_big_label1
+ sub r2, r6, r1
+ cmp r2, #8 ; 0x8
+ bcc _ll_udiv_big_label2
+ movs r0, r4, lsr #22
+ moveq r4, r4, lsl #8
+ addeq r1, r1, #8 ; 0x8
+_ll_udiv_big_label2
+ rsb r0, r1, #32 ; 0x20
+ sub r2, r6, r1
+ orr r4, r4, r5, lsr r0
+ mov r5, r5, lsl r1
+ cmp r2, #1 ; 0x1
+ bcc _ll_udiv_big_label4
+ sub r2, r2, #1 ; 0x1
+ and r0, r2, #3 ; 0x3
+ rsb r0, r0, #3 ; 0x3
+ adds r0, r0, r0, lsl #1
+ add pc, pc, r0, lsl #3
+ nop ; (mov r0,r0)
+_ll_udiv_big_label3
+ adcs r5, r5, r5
+ adcs r4, r4, r4
+ adcs r0, lr, r5
+ adcs r1, ip, r4
+ movcs r5, r0
+ movcs r4, r1
+ adcs r5, r5, r5
+ adcs r4, r4, r4
+ adcs r0, lr, r5
+ adcs r1, ip, r4
+ movcs r5, r0
+ movcs r4, r1
+ adcs r5, r5, r5
+ adcs r4, r4, r4
+ adcs r0, lr, r5
+ adcs r1, ip, r4
+ movcs r5, r0
+ movcs r4, r1
+ sub r2, r2, #4 ; 0x4
+ adcs r5, r5, r5
+ adcs r4, r4, r4
+ adcs r0, lr, r5
+ adcs r1, ip, r4
+ tst r2, r2
+ movcs r5, r0
+ movcs r4, r1
+ bpl _ll_udiv_big_label3
+_ll_udiv_big_label4
+ mov r1, #0 ; 0x0
+ mov r2, r5, lsr r6
+ bic r5, r5, r2, lsl r6
+ adcs r0, r5, r5
+ adc r1, r1, #0 ; 0x0
+ movs lr, r3, lsl r6
+ mov r3, r4, lsr r6
+ bic r4, r4, r3, lsl r6
+ adc r1, r1, #0 ; 0x0
+ adds r0, r0, lr
+ orr r2, r2, r4, ror r6
+ adc r1, r1, #0 ; 0x0
+ ldmia sp!, {r4, r5, r6, pc}
+
+_ll_udiv_ginormous
+ subs r2, r5, lr
+ mov r1, #0 ; 0x0
+ sbcs r3, r4, ip
+ adc r0, r1, r1
+ movcc r2, r5
+ movcc r3, r4
+ ldmia sp!, {r4, r5, r6, pc}
+
+_ll_div0
+ ldmia sp!, {r4, r5, r6, lr}
+ mov r0, #0 ; 0x0
+ mov r1, #0 ; 0x0
+ b __aeabi_ldiv0
+
+__aeabi_ldiv0
+ bx r14
+
+ END
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S new file mode 100644 index 000000000..3f26e2c5c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S @@ -0,0 +1,21 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__umoddi3)
+ stmfd sp!, {r7, lr}
+ add r7, sp, #0
+ sub sp, sp, #16
+ add ip, sp, #8
+ str ip, [sp, #0]
+ bl ASM_PFX(__udivmoddi4)
+ ldrd r0, [sp, #8]
+ sub sp, r7, #0
+ ldmfd sp!, {r7, pc}
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S new file mode 100644 index 000000000..b48b25b7d --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S @@ -0,0 +1,20 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(__umodsi3)
+ stmfd sp!, {r4, r5, r7, lr}
+ add r7, sp, #8
+ mov r5, r0
+ mov r4, r1
+ bl ASM_PFX(__udivsi3)
+ mul r0, r4, r0
+ rsb r0, r0, r5
+ ldmfd sp!, {r4, r5, r7, pc}
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uread.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uread.S new file mode 100644 index 000000000..e8a1dbad8 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uread.S @@ -0,0 +1,54 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+#
+#UINT32
+#EFIAPI
+#__aeabi_uread4 (
+# IN VOID *Pointer
+# );
+#
+ASM_FUNC(__aeabi_uread4)
+ ldrb r1, [r0]
+ ldrb r2, [r0, #1]
+ ldrb r3, [r0, #2]
+ ldrb r0, [r0, #3]
+ orr r1, r1, r2, lsl #8
+ orr r1, r1, r3, lsl #16
+ orr r0, r1, r0, lsl #24
+ bx lr
+
+#
+#UINT64
+#EFIAPI
+#__aeabi_uread8 (
+# IN VOID *Pointer
+# );
+#
+ASM_FUNC(__aeabi_uread8)
+ mov r3, r0
+
+ ldrb r1, [r3]
+ ldrb r2, [r3, #1]
+ orr r1, r1, r2, lsl #8
+ ldrb r2, [r3, #2]
+ orr r1, r1, r2, lsl #16
+ ldrb r0, [r3, #3]
+ orr r0, r1, r0, lsl #24
+
+ ldrb r1, [r3, #4]
+ ldrb r2, [r3, #5]
+ orr r1, r1, r2, lsl #8
+ ldrb r2, [r3, #6]
+ orr r1, r1, r2, lsl #16
+ ldrb r2, [r3, #7]
+ orr r1, r1, r2, lsl #24
+
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uread.asm b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uread.asm new file mode 100644 index 000000000..82aab976a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uread.asm @@ -0,0 +1,58 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+
+
+ INCLUDE AsmMacroExport.inc
+
+;
+;UINT32
+;EFIAPI
+;__aeabi_uread4 (
+; IN VOID *Pointer
+; );
+;
+ RVCT_ASM_EXPORT __aeabi_uread4
+ ldrb r1, [r0]
+ ldrb r2, [r0, #1]
+ ldrb r3, [r0, #2]
+ ldrb r0, [r0, #3]
+ orr r1, r1, r2, lsl #8
+ orr r1, r1, r3, lsl #16
+ orr r0, r1, r0, lsl #24
+ bx lr
+
+;
+;UINT64
+;EFIAPI
+;__aeabi_uread8 (
+; IN VOID *Pointer
+; );
+;
+ RVCT_ASM_EXPORT __aeabi_uread8
+ mov r3, r0
+
+ ldrb r1, [r3]
+ ldrb r2, [r3, #1]
+ orr r1, r1, r2, lsl #8
+ ldrb r2, [r3, #2]
+ orr r1, r1, r2, lsl #16
+ ldrb r0, [r3, #3]
+ orr r0, r1, r0, lsl #24
+
+ ldrb r1, [r3, #4]
+ ldrb r2, [r3, #5]
+ orr r1, r1, r2, lsl #8
+ ldrb r2, [r3, #6]
+ orr r1, r1, r2, lsl #16
+ ldrb r2, [r3, #7]
+ orr r1, r1, r2, lsl #24
+
+ bx lr
+ END
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uwrite.S b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uwrite.S new file mode 100644 index 000000000..9432ac431 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uwrite.S @@ -0,0 +1,53 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+#
+#UINT32
+#EFIAPI
+#__aeabi_uwrite4 (
+# IN UINT32 Data,
+# IN VOID *Pointer
+# );
+#
+ASM_FUNC(__aeabi_uwrite4)
+ mov r2, r0, lsr #8
+ strb r0, [r1]
+ strb r2, [r1, #1]
+ mov r2, r0, lsr #16
+ strb r2, [r1, #2]
+ mov r2, r0, lsr #24
+ strb r2, [r1, #3]
+ bx lr
+
+#
+#UINT64
+#EFIAPI
+#__aeabi_uwrite8 (
+# IN UINT64 Data,
+# IN VOID *Pointer
+# );
+#
+ASM_FUNC(__aeabi_uwrite8)
+ mov r3, r0, lsr #8
+ strb r0, [r2]
+ strb r3, [r2, #1]
+ mov r3, r0, lsr #16
+ strb r3, [r2, #2]
+ mov r3, r0, lsr #24
+ strb r3, [r2, #3]
+
+ mov r3, r1, lsr #8
+ strb r1, [r2, #4]
+ strb r3, [r2, #5]
+ mov r3, r1, lsr #16
+ strb r3, [r2, #6]
+ mov r3, r1, lsr #24
+ strb r3, [r2, #7]
+ bx lr
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uwrite.asm b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uwrite.asm new file mode 100644 index 000000000..d433d9987 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/uwrite.asm @@ -0,0 +1,60 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+
+
+ INCLUDE AsmMacroExport.inc
+
+;
+;UINT32
+;EFIAPI
+;__aeabi_uwrite4 (
+; IN UINT32 Data,
+; IN VOID *Pointer
+; );
+;
+;
+ RVCT_ASM_EXPORT __aeabi_uwrite4
+ mov r2, r0, lsr #8
+ strb r0, [r1]
+ strb r2, [r1, #1]
+ mov r2, r0, lsr #16
+ strb r2, [r1, #2]
+ mov r2, r0, lsr #24
+ strb r2, [r1, #3]
+ bx lr
+
+;
+;UINT64
+;EFIAPI
+;__aeabi_uwrite8 (
+; IN UINT64 Data, //r0-r1
+; IN VOID *Pointer //r2
+; );
+;
+;
+ RVCT_ASM_EXPORT __aeabi_uwrite8
+ mov r3, r0, lsr #8
+ strb r0, [r2]
+ strb r3, [r2, #1]
+ mov r3, r0, lsr #16
+ strb r3, [r2, #2]
+ mov r3, r0, lsr #24
+ strb r3, [r2, #3]
+
+ mov r3, r1, lsr #8
+ strb r1, [r2, #4]
+ strb r3, [r2, #5]
+ mov r3, r1, lsr #16
+ strb r3, [r2, #6]
+ mov r3, r1, lsr #24
+ strb r3, [r2, #7]
+ bx lr
+
+ END
+
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf new file mode 100644 index 000000000..fcf48c678 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf @@ -0,0 +1,91 @@ +#/** @file
+# Base Library implementation.
+#
+# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = CompilerIntrinsicsLib
+ FILE_GUID = 855274FA-3575-4C20-9709-C031DC5589FA
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = CompilerIntrinsicsLib
+
+[Sources]
+ memcpy.c | RVCT
+ memset.c | RVCT
+
+ memcpy.c | GCC
+ memset.c | GCC
+
+ memcpy_ms.c | MSFT
+ memset_ms.c | MSFT
+ memcmp_ms.c | MSFT
+ memmove_ms.c | MSFT
+
+[Sources.ARM]
+ Arm/mullu.asm | RVCT
+ Arm/switch.asm | RVCT
+ Arm/llsr.asm | RVCT
+ Arm/memmove.asm | RVCT
+ Arm/uread.asm | RVCT
+ Arm/uwrite.asm | RVCT
+ Arm/lasr.asm | RVCT
+ Arm/llsl.asm | RVCT
+ Arm/div.asm | RVCT
+ Arm/uldiv.asm | RVCT
+ Arm/ldivmod.asm | RVCT
+
+ Arm/ashrdi3.S | GCC
+ Arm/ashldi3.S | GCC
+ Arm/div.S | GCC
+ Arm/divdi3.S | GCC
+ Arm/divsi3.S | GCC
+ Arm/lshrdi3.S | GCC
+ Arm/memmove.S | GCC
+ Arm/modsi3.S | GCC
+ Arm/moddi3.S | GCC
+ Arm/muldi3.S | GCC
+ Arm/mullu.S | GCC
+ Arm/udivsi3.S | GCC
+ Arm/umodsi3.S | GCC
+ Arm/udivdi3.S | GCC
+ Arm/umoddi3.S | GCC
+ Arm/udivmoddi4.S | GCC
+ Arm/clzsi2.S | GCC
+ Arm/ctzsi2.S | GCC
+ Arm/ucmpdi2.S | GCC
+ Arm/switch8.S | GCC
+ Arm/switchu8.S | GCC
+ Arm/switch16.S | GCC
+ Arm/switch32.S | GCC
+ Arm/sourcery.S | GCC
+ Arm/uldiv.S | GCC
+ Arm/ldivmod.S | GCC
+ Arm/lasr.S | GCC
+ Arm/llsr.S | GCC
+ Arm/llsl.S | GCC
+ Arm/uread.S | GCC
+ Arm/uwrite.S | GCC
+
+ Arm/div.asm | MSFT
+ Arm/uldiv.asm | MSFT
+ Arm/ldivmod.asm | MSFT
+ Arm/llsr.asm | MSFT
+
+[Sources.AARCH64]
+ AArch64/Atomics.S | GCC
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[BuildOptions]
+ MSFT:*_*_*_CC_FLAGS = /GL-
+ MSFT:*_*_ARM_ASM_FLAGS = /oldit
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memcmp_ms.c b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memcmp_ms.c new file mode 100644 index 000000000..551f8e77c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memcmp_ms.c @@ -0,0 +1,31 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2019, Pete Batard. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+#if defined(_M_ARM64)
+typedef unsigned __int64 size_t;
+#else
+typedef unsigned __int32 size_t;
+#endif
+
+int memcmp(void *, void *, size_t);
+#pragma intrinsic(memcmp)
+#pragma function(memcmp)
+int memcmp(const void *s1, const void *s2, size_t n)
+{
+ unsigned char const *t1 = s1;
+ unsigned char const *t2 = s2;
+
+ while (n--) {
+ if (*t1 != *t2)
+ return (int)*t1 - (int)*t2;
+ t1++;
+ t2++;
+ }
+
+ return 0;
+}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c new file mode 100644 index 000000000..6e9c85f4b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c @@ -0,0 +1,37 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+typedef __SIZE_TYPE__ size_t;
+
+static void __memcpy(void *dest, const void *src, size_t n)
+{
+ unsigned char *d = dest;
+ unsigned char const *s = src;
+
+ while (n--)
+ *d++ = *s++;
+}
+
+void *memcpy(void *dest, const void *src, size_t n)
+{
+ __memcpy(dest, src, n);
+ return dest;
+}
+
+#ifdef __arm__
+
+__attribute__((__alias__("__memcpy")))
+void __aeabi_memcpy(void *dest, const void *src, size_t n);
+
+__attribute__((__alias__("__memcpy")))
+void __aeabi_memcpy4(void *dest, const void *src, size_t n);
+
+__attribute__((__alias__("__memcpy")))
+void __aeabi_memcpy8(void *dest, const void *src, size_t n);
+
+#endif
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c new file mode 100644 index 000000000..34feef5a4 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c @@ -0,0 +1,27 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2017, Pete Batard. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+#if defined(_M_ARM64)
+typedef unsigned __int64 size_t;
+#else
+typedef unsigned __int32 size_t;
+#endif
+
+void* memcpy(void *, const void *, size_t);
+#pragma intrinsic(memcpy)
+#pragma function(memcpy)
+void* memcpy(void *dest, const void *src, size_t n)
+{
+ unsigned char *d = dest;
+ unsigned char const *s = src;
+
+ while (n--)
+ *d++ = *s++;
+
+ return dest;
+}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memmove_ms.c b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memmove_ms.c new file mode 100644 index 000000000..5b261ef8b --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memmove_ms.c @@ -0,0 +1,34 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2019, Pete Batard. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+#if defined(_M_ARM64)
+typedef unsigned __int64 size_t;
+#else
+typedef unsigned __int32 size_t;
+#endif
+
+void* memmove(void *, const void *, size_t);
+#pragma intrinsic(memmove)
+#pragma function(memmove)
+void* memmove(void *dest, const void *src, size_t n)
+{
+ unsigned char *d = dest;
+ unsigned char const *s = src;
+
+ if (d < s) {
+ while (n--)
+ *d++ = *s++;
+ } else {
+ d += n;
+ s += n;
+ while (n--)
+ *--d = *--s;
+ }
+
+ return dest;
+}
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memset.c b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memset.c new file mode 100644 index 000000000..24398d591 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memset.c @@ -0,0 +1,55 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+typedef __SIZE_TYPE__ size_t;
+
+static __attribute__((__used__))
+void *__memset(void *s, int c, size_t n)
+{
+ unsigned char *d = s;
+
+ while (n--)
+ *d++ = c;
+
+ return s;
+}
+
+//
+// Other modules (such as CryptoPkg/IntrinsicLib) may provide another
+// implementation of memset(), which may conflict with this one if this
+// object was pulled into the link due to the definitions below. So make
+// our memset() 'weak' to let the other implementation take precedence.
+//
+__attribute__((__weak__, __alias__("__memset")))
+void *memset(void *dest, int c, size_t n);
+
+#ifdef __arm__
+
+void __aeabi_memset(void *dest, size_t n, int c)
+{
+ __memset(dest, c, n);
+}
+
+__attribute__((__alias__("__aeabi_memset")))
+void __aeabi_memset4(void *dest, size_t n, int c);
+
+__attribute__((__alias__("__aeabi_memset")))
+void __aeabi_memset8(void *dest, size_t n, int c);
+
+void __aeabi_memclr(void *dest, size_t n)
+{
+ __memset(dest, 0, n);
+}
+
+__attribute__((__alias__("__aeabi_memclr")))
+void __aeabi_memclr4(void *dest, size_t n);
+
+__attribute__((__alias__("__aeabi_memclr")))
+void __aeabi_memclr8(void *dest, size_t n);
+
+#endif
diff --git a/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c new file mode 100644 index 000000000..4de55d845 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c @@ -0,0 +1,26 @@ +//------------------------------------------------------------------------------
+//
+// Copyright (c) 2017, Pete Batard. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+
+#if defined(_M_ARM64)
+typedef unsigned __int64 size_t;
+#else
+typedef unsigned __int32 size_t;
+#endif
+
+void* memset(void *, int, size_t);
+#pragma intrinsic(memset)
+#pragma function(memset)
+void *memset(void *s, int c, size_t n)
+{
+ unsigned char *d = s;
+
+ while (n--)
+ *d++ = (unsigned char)c;
+
+ return s;
+}
diff --git a/roms/edk2/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c b/roms/edk2/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c new file mode 100644 index 000000000..37cdb861a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c @@ -0,0 +1,338 @@ +/** @file
+* Main file supporting the SEC Phase for Versatile Express
+*
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DebugAgentLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PeCoffExtraActionLib.h>
+#include <Library/PeCoffLib.h>
+
+#include <Pi/PiFirmwareFile.h>
+#include <Pi/PiFirmwareVolume.h>
+
+#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \
+ (ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1))
+
+
+// Vector Table for Sec Phase
+VOID
+DebugAgentVectorTable (
+ VOID
+ );
+
+/**
+ Returns the highest bit set of the State field
+
+ @param ErasePolarity Erase Polarity as defined by EFI_FVB2_ERASE_POLARITY
+ in the Attributes field.
+ @param FfsHeader Pointer to FFS File Header
+
+
+ @retval the highest bit in the State field
+
+**/
+STATIC
+EFI_FFS_FILE_STATE
+GetFileState (
+ IN UINT8 ErasePolarity,
+ IN EFI_FFS_FILE_HEADER *FfsHeader
+ )
+{
+ EFI_FFS_FILE_STATE FileState;
+ EFI_FFS_FILE_STATE HighestBit;
+
+ FileState = FfsHeader->State;
+
+ if (ErasePolarity != 0) {
+ FileState = (EFI_FFS_FILE_STATE)~FileState;
+ }
+
+ HighestBit = 0x80;
+ while (HighestBit != 0 && (HighestBit & FileState) == 0) {
+ HighestBit >>= 1;
+ }
+
+ return HighestBit;
+}
+
+/**
+ Calculates the checksum of the header of a file.
+ The header is a zero byte checksum, so zero means header is good
+
+ @param FfsHeader Pointer to FFS File Header
+
+ @retval Checksum of the header
+
+**/
+STATIC
+UINT8
+CalculateHeaderChecksum (
+ IN EFI_FFS_FILE_HEADER *FileHeader
+ )
+{
+ UINT8 Sum;
+
+ // Calculate the sum of the header
+ Sum = CalculateSum8 ((CONST VOID*)FileHeader,sizeof(EFI_FFS_FILE_HEADER));
+
+ // State field (since this indicates the different state of file).
+ Sum = (UINT8)(Sum - FileHeader->State);
+
+ // Checksum field of the file is not part of the header checksum.
+ Sum = (UINT8)(Sum - FileHeader->IntegrityCheck.Checksum.File);
+
+ return Sum;
+}
+
+EFI_STATUS
+GetFfsFile (
+ IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader,
+ IN EFI_FV_FILETYPE FileType,
+ OUT EFI_FFS_FILE_HEADER **FileHeader
+ )
+{
+ UINT64 FvLength;
+ UINTN FileOffset;
+ EFI_FFS_FILE_HEADER *FfsFileHeader;
+ UINT8 ErasePolarity;
+ UINT8 FileState;
+ UINT32 FileLength;
+ UINT32 FileOccupiedSize;
+
+ ASSERT (FwVolHeader->Signature == EFI_FVH_SIGNATURE);
+
+ FvLength = FwVolHeader->FvLength;
+ FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FwVolHeader + FwVolHeader->HeaderLength);
+ FileOffset = FwVolHeader->HeaderLength;
+
+ if (FwVolHeader->Attributes & EFI_FVB2_ERASE_POLARITY) {
+ ErasePolarity = 1;
+ } else {
+ ErasePolarity = 0;
+ }
+
+ while (FileOffset < (FvLength - sizeof (EFI_FFS_FILE_HEADER))) {
+ // Get FileState which is the highest bit of the State
+ FileState = GetFileState (ErasePolarity, FfsFileHeader);
+
+ switch (FileState) {
+
+ case EFI_FILE_HEADER_INVALID:
+ FileOffset += sizeof(EFI_FFS_FILE_HEADER);
+ FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + sizeof(EFI_FFS_FILE_HEADER));
+ break;
+
+ case EFI_FILE_DATA_VALID:
+ case EFI_FILE_MARKED_FOR_UPDATE:
+ if (CalculateHeaderChecksum (FfsFileHeader) != 0) {
+ ASSERT (FALSE);
+ return EFI_NOT_FOUND;
+ }
+
+ if (FfsFileHeader->Type == FileType) {
+ *FileHeader = FfsFileHeader;
+ return EFI_SUCCESS;
+ }
+
+ FileLength = *(UINT32 *)(FfsFileHeader->Size) & 0x00FFFFFF;
+ FileOccupiedSize = GET_OCCUPIED_SIZE(FileLength, 8);
+
+ FileOffset += FileOccupiedSize;
+ FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + FileOccupiedSize);
+ break;
+
+ case EFI_FILE_DELETED:
+ FileLength = *(UINT32 *)(FfsFileHeader->Size) & 0x00FFFFFF;
+ FileOccupiedSize = GET_OCCUPIED_SIZE(FileLength, 8);
+ FileOffset += FileOccupiedSize;
+ FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + FileOccupiedSize);
+ break;
+
+ default:
+ return EFI_NOT_FOUND;
+ }
+ }
+ return EFI_NOT_FOUND;
+}
+
+EFI_STATUS
+GetImageContext (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
+ )
+{
+ EFI_STATUS Status;
+ UINTN ParsedLength;
+ UINTN SectionSize;
+ UINTN SectionLength;
+ EFI_COMMON_SECTION_HEADER *Section;
+ VOID *EfiImage;
+ UINTN ImageAddress;
+ EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *DebugEntry;
+ VOID *CodeViewEntryPointer;
+
+ Section = (EFI_COMMON_SECTION_HEADER *)(FfsHeader + 1);
+ SectionSize = *(UINT32 *)(FfsHeader->Size) & 0x00FFFFFF;
+ SectionSize -= sizeof (EFI_FFS_FILE_HEADER);
+ ParsedLength = 0;
+ EfiImage = NULL;
+
+ while (ParsedLength < SectionSize) {
+ if ((Section->Type == EFI_SECTION_PE32) || (Section->Type == EFI_SECTION_TE)) {
+ EfiImage = (EFI_IMAGE_OPTIONAL_HEADER_UNION*)(Section + 1);
+ break;
+ }
+
+ //
+ // Size is 24 bits wide so mask upper 8 bits.
+ // SectionLength is adjusted it is 4 byte aligned.
+ // Go to the next section
+ //
+ SectionLength = *(UINT32 *)Section->Size & 0x00FFFFFF;
+ SectionLength = GET_OCCUPIED_SIZE (SectionLength, 4);
+ ASSERT (SectionLength != 0);
+ ParsedLength += SectionLength;
+ Section = (EFI_COMMON_SECTION_HEADER *)((UINT8 *)Section + SectionLength);
+ }
+
+ if (EfiImage == NULL) {
+ return EFI_NOT_FOUND;
+ }
+
+ // Initialize the Image Context
+ ZeroMem (ImageContext, sizeof (PE_COFF_LOADER_IMAGE_CONTEXT));
+ ImageContext->Handle = EfiImage;
+ ImageContext->ImageRead = PeCoffLoaderImageReadFromMemory;
+
+ Status = PeCoffLoaderGetImageInfo (ImageContext);
+ if (!EFI_ERROR(Status) && ((VOID*)(UINTN)ImageContext->DebugDirectoryEntryRva != NULL)) {
+ ImageAddress = ImageContext->ImageAddress;
+ if (ImageContext->IsTeImage) {
+ ImageAddress += sizeof (EFI_TE_IMAGE_HEADER) - ((EFI_TE_IMAGE_HEADER*)EfiImage)->StrippedSize;
+ }
+
+ DebugEntry = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY*)(ImageAddress + ImageContext->DebugDirectoryEntryRva);
+ if (DebugEntry->Type == EFI_IMAGE_DEBUG_TYPE_CODEVIEW) {
+ CodeViewEntryPointer = (VOID *) (ImageAddress + (UINTN) DebugEntry->RVA);
+ switch (* (UINT32 *) CodeViewEntryPointer) {
+ case CODEVIEW_SIGNATURE_NB10:
+ ImageContext->PdbPointer = (CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY);
+ break;
+ case CODEVIEW_SIGNATURE_RSDS:
+ ImageContext->PdbPointer = (CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_RSDS_ENTRY);
+ break;
+ case CODEVIEW_SIGNATURE_MTOC:
+ ImageContext->PdbPointer = (CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_MTOC_ENTRY);
+ break;
+ default:
+ break;
+ }
+ }
+ }
+
+ return Status;
+}
+
+/**
+ Initialize debug agent.
+
+ This function is used to set up debug environment to support source level debugging.
+ If certain Debug Agent Library instance has to save some private data in the stack,
+ this function must work on the mode that doesn't return to the caller, then
+ the caller needs to wrap up all rest of logic after InitializeDebugAgent() into one
+ function and pass it into InitializeDebugAgent(). InitializeDebugAgent() is
+ responsible to invoke the passing-in function at the end of InitializeDebugAgent().
+
+ If the parameter Function is not NULL, Debug Agent Library instance will invoke it by
+ passing in the Context to be its parameter.
+
+ If Function() is NULL, Debug Agent Library instance will return after setup debug
+ environment.
+
+ @param[in] InitFlag Init flag is used to decide the initialize process.
+ @param[in] Context Context needed according to InitFlag; it was optional.
+ @param[in] Function Continue function called by debug agent library; it was
+ optional.
+
+**/
+VOID
+EFIAPI
+InitializeDebugAgent (
+ IN UINT32 InitFlag,
+ IN VOID *Context, OPTIONAL
+ IN DEBUG_AGENT_CONTINUE Function OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ EFI_FFS_FILE_HEADER *FfsHeader;
+ PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;
+
+ // We use InitFlag to know if DebugAgent has been initialized from
+ // Sec (DEBUG_AGENT_INIT_PREMEM_SEC) or PrePi (DEBUG_AGENT_INIT_POSTMEM_SEC)
+ // modules
+ if (InitFlag == DEBUG_AGENT_INIT_PREMEM_SEC) {
+ //
+ // Get the Sec or PrePeiCore module (defined as SEC type module)
+ //
+ Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdSecureFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
+ if (!EFI_ERROR(Status)) {
+ Status = GetImageContext (FfsHeader,&ImageContext);
+ if (!EFI_ERROR(Status)) {
+ PeCoffLoaderRelocateImageExtraAction (&ImageContext);
+ }
+ }
+ } else if (InitFlag == DEBUG_AGENT_INIT_POSTMEM_SEC) {
+ //
+ // Get the PrePi or PrePeiCore module (defined as SEC type module)
+ //
+ Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
+ if (!EFI_ERROR(Status)) {
+ Status = GetImageContext (FfsHeader,&ImageContext);
+ if (!EFI_ERROR(Status)) {
+ PeCoffLoaderRelocateImageExtraAction (&ImageContext);
+ }
+ }
+
+ //
+ // Get the PeiCore module (defined as PEI_CORE type module)
+ //
+ Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);
+ if (!EFI_ERROR(Status)) {
+ Status = GetImageContext (FfsHeader,&ImageContext);
+ if (!EFI_ERROR(Status)) {
+ PeCoffLoaderRelocateImageExtraAction (&ImageContext);
+ }
+ }
+ }
+}
+
+/**
+ Enable/Disable the interrupt of debug timer and return the interrupt state
+ prior to the operation.
+
+ If EnableStatus is TRUE, enable the interrupt of debug timer.
+ If EnableStatus is FALSE, disable the interrupt of debug timer.
+
+ @param[in] EnableStatus Enable/Disable.
+
+ @return FALSE always.
+
+**/
+BOOLEAN
+EFIAPI
+SaveAndSetDebugTimerInterrupt (
+ IN BOOLEAN EnableStatus
+ )
+{
+ return FALSE;
+}
+
diff --git a/roms/edk2/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf b/roms/edk2/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf new file mode 100644 index 000000000..2ceeebbde --- /dev/null +++ b/roms/edk2/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf @@ -0,0 +1,32 @@ +#
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DebugAgentSymbolsBaseLib
+ FILE_GUID = 9055e2e0-9b33-11e0-a7d7-0002a5d5c51b
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = DebugAgentLib
+
+[Sources.common]
+ DebugAgentSymbolsBaseLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ PcdLib
+ PeCoffExtraActionLib
+ PeCoffLib
+
+[Pcd]
+ gArmTokenSpaceGuid.PcdSecureFvBaseAddress
+ gArmTokenSpaceGuid.PcdFvBaseAddress
diff --git a/roms/edk2/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.c b/roms/edk2/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.c new file mode 100644 index 000000000..3f88e8437 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.c @@ -0,0 +1,135 @@ +/**@file
+
+Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+Portions copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+Portions copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiDxe.h>
+#include <Library/PeCoffLib.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PeCoffExtraActionLib.h>
+#include <Library/PrintLib.h>
+
+
+/**
+ If the build is done on cygwin the paths are cygpaths.
+ /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert
+ them to work with RVD commands
+
+ @param Name Path to convert if needed
+
+**/
+CHAR8 *
+DeCygwinPathIfNeeded (
+ IN CHAR8 *Name,
+ IN CHAR8 *Temp,
+ IN UINTN Size
+ )
+{
+ CHAR8 *Ptr;
+ UINTN Index;
+ UINTN Index2;
+
+ Ptr = AsciiStrStr (Name, "/cygdrive/");
+ if (Ptr == NULL) {
+ return Name;
+ }
+
+ for (Index = 9, Index2 = 0; (Index < (Size + 9)) && (Ptr[Index] != '\0'); Index++, Index2++) {
+ Temp[Index2] = Ptr[Index];
+ if (Temp[Index2] == '/') {
+ Temp[Index2] = '\\' ;
+ }
+
+ if (Index2 == 1) {
+ Temp[Index2 - 1] = Ptr[Index];
+ Temp[Index2] = ':';
+ }
+ }
+
+ return Temp;
+}
+
+
+/**
+ Performs additional actions after a PE/COFF image has been loaded and relocated.
+
+ If ImageContext is NULL, then ASSERT().
+
+ @param ImageContext Pointer to the image context structure that describes the
+ PE/COFF image that has already been loaded and relocated.
+
+**/
+VOID
+EFIAPI
+PeCoffLoaderRelocateImageExtraAction (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
+ )
+{
+#if !defined(MDEPKG_NDEBUG)
+ CHAR8 Temp[512];
+#endif
+
+ if (ImageContext->PdbPointer) {
+#ifdef __CC_ARM
+#if (__ARMCC_VERSION < 500000)
+ // Print out the command for the RVD debugger to load symbols for this image
+ DEBUG ((EFI_D_LOAD | EFI_D_INFO, "load /a /ni /np %a &0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
+#else
+ // Print out the command for the DS-5 to load symbols for this image
+ DEBUG ((EFI_D_LOAD | EFI_D_INFO, "add-symbol-file %a 0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
+#endif
+#elif __GNUC__
+ // This may not work correctly if you generate PE/COFF directly as then the Offset would not be required
+ DEBUG ((EFI_D_LOAD | EFI_D_INFO, "add-symbol-file %a 0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
+#else
+ DEBUG ((EFI_D_LOAD | EFI_D_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
+#endif
+ } else {
+ DEBUG ((EFI_D_LOAD | EFI_D_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
+ }
+}
+
+
+
+/**
+ Performs additional actions just before a PE/COFF image is unloaded. Any resources
+ that were allocated by PeCoffLoaderRelocateImageExtraAction() must be freed.
+
+ If ImageContext is NULL, then ASSERT().
+
+ @param ImageContext Pointer to the image context structure that describes the
+ PE/COFF image that is being unloaded.
+
+**/
+VOID
+EFIAPI
+PeCoffLoaderUnloadImageExtraAction (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
+ )
+{
+#if !defined(MDEPKG_NDEBUG)
+ CHAR8 Temp[512];
+#endif
+
+ if (ImageContext->PdbPointer) {
+#ifdef __CC_ARM
+ // Print out the command for the RVD debugger to load symbols for this image
+ DEBUG ((DEBUG_LOAD | DEBUG_INFO, "unload symbols_only %a\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp))));
+#elif __GNUC__
+ // This may not work correctly if you generate PE/COFF directly as then the Offset would not be required
+ DEBUG ((DEBUG_LOAD | DEBUG_INFO, "remove-symbol-file %a 0x%08x\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
+#else
+ DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Unloading %a\n", ImageContext->PdbPointer));
+#endif
+ } else {
+ DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Unloading driver at 0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress));
+ }
+}
diff --git a/roms/edk2/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf b/roms/edk2/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf new file mode 100644 index 000000000..42b283d64 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf @@ -0,0 +1,33 @@ +#/** @file
+# PeCoff extra action library for DXE phase that run Unix emulator.
+#
+# Lib to provide memory journal status code reporting Routines
+# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DebugUnixPeCoffExtraActionLib
+ FILE_GUID = C3E9448E-1726-42fb-9368-41F75B038C0C
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PeCoffExtraActionLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ARM
+#
+
+[Sources.common]
+ DebugPeCoffExtraActionLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ DebugLib
diff --git a/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c b/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c new file mode 100644 index 000000000..ba3c0e0cc --- /dev/null +++ b/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c @@ -0,0 +1,275 @@ +/** @file
+ Default exception handler
+
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+#include <Library/UefiLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PeCoffGetEntryPointLib.h>
+#include <Library/PrintLib.h>
+#include <Library/ArmDisassemblerLib.h>
+#include <Library/SerialPortLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#include <Guid/DebugImageInfoTable.h>
+#include <Protocol/DebugSupport.h>
+#include <Protocol/LoadedImage.h>
+
+STATIC CHAR8 *gExceptionTypeString[] = {
+ "Synchronous",
+ "IRQ",
+ "FIQ",
+ "SError"
+};
+
+STATIC BOOLEAN mRecursiveException;
+
+CHAR8 *
+GetImageName (
+ IN UINTN FaultAddress,
+ OUT UINTN *ImageBase,
+ OUT UINTN *PeCoffSizeOfHeaders
+ );
+
+STATIC
+VOID
+DescribeInstructionOrDataAbort (
+ IN CHAR8 *AbortType,
+ IN UINTN Iss
+ )
+{
+ CHAR8 *AbortCause;
+
+ switch (Iss & 0x3f) {
+ case 0x0: AbortCause = "Address size fault, zeroth level of translation or translation table base register"; break;
+ case 0x1: AbortCause = "Address size fault, first level"; break;
+ case 0x2: AbortCause = "Address size fault, second level"; break;
+ case 0x3: AbortCause = "Address size fault, third level"; break;
+ case 0x4: AbortCause = "Translation fault, zeroth level"; break;
+ case 0x5: AbortCause = "Translation fault, first level"; break;
+ case 0x6: AbortCause = "Translation fault, second level"; break;
+ case 0x7: AbortCause = "Translation fault, third level"; break;
+ case 0x9: AbortCause = "Access flag fault, first level"; break;
+ case 0xa: AbortCause = "Access flag fault, second level"; break;
+ case 0xb: AbortCause = "Access flag fault, third level"; break;
+ case 0xd: AbortCause = "Permission fault, first level"; break;
+ case 0xe: AbortCause = "Permission fault, second level"; break;
+ case 0xf: AbortCause = "Permission fault, third level"; break;
+ case 0x10: AbortCause = "Synchronous external abort"; break;
+ case 0x18: AbortCause = "Synchronous parity error on memory access"; break;
+ case 0x11: AbortCause = "Asynchronous external abort"; break;
+ case 0x19: AbortCause = "Asynchronous parity error on memory access"; break;
+ case 0x14: AbortCause = "Synchronous external abort on translation table walk, zeroth level"; break;
+ case 0x15: AbortCause = "Synchronous external abort on translation table walk, first level"; break;
+ case 0x16: AbortCause = "Synchronous external abort on translation table walk, second level"; break;
+ case 0x17: AbortCause = "Synchronous external abort on translation table walk, third level"; break;
+ case 0x1c: AbortCause = "Synchronous parity error on memory access on translation table walk, zeroth level"; break;
+ case 0x1d: AbortCause = "Synchronous parity error on memory access on translation table walk, first level"; break;
+ case 0x1e: AbortCause = "Synchronous parity error on memory access on translation table walk, second level"; break;
+ case 0x1f: AbortCause = "Synchronous parity error on memory access on translation table walk, third level"; break;
+ case 0x21: AbortCause = "Alignment fault"; break;
+ case 0x22: AbortCause = "Debug event"; break;
+ case 0x30: AbortCause = "TLB conflict abort"; break;
+ case 0x33:
+ case 0x34: AbortCause = "IMPLEMENTATION DEFINED"; break;
+ case 0x35:
+ case 0x36: AbortCause = "Domain fault"; break;
+ default: AbortCause = ""; break;
+ }
+
+ DEBUG ((EFI_D_ERROR, "\n%a: %a\n", AbortType, AbortCause));
+}
+
+STATIC
+VOID
+DescribeExceptionSyndrome (
+ IN UINT32 Esr
+ )
+{
+ CHAR8 *Message;
+ UINTN Ec;
+ UINTN Iss;
+
+ Ec = Esr >> 26;
+ Iss = Esr & 0x00ffffff;
+
+ switch (Ec) {
+ case 0x15: Message = "SVC executed in AArch64"; break;
+ case 0x20:
+ case 0x21: DescribeInstructionOrDataAbort ("Instruction abort", Iss); return;
+ case 0x22: Message = "PC alignment fault"; break;
+ case 0x23: Message = "SP alignment fault"; break;
+ case 0x24:
+ case 0x25: DescribeInstructionOrDataAbort ("Data abort", Iss); return;
+ default: return;
+ }
+
+ DEBUG ((EFI_D_ERROR, "\n %a \n", Message));
+}
+
+#ifndef MDEPKG_NDEBUG
+STATIC
+CONST CHAR8 *
+BaseName (
+ IN CONST CHAR8 *FullName
+ )
+{
+ CONST CHAR8 *Str;
+
+ Str = FullName + AsciiStrLen (FullName);
+
+ while (--Str > FullName) {
+ if (*Str == '/' || *Str == '\\') {
+ return Str + 1;
+ }
+ }
+ return Str;
+}
+#endif
+
+/**
+ This is the default action to take on an unexpected exception
+
+ Since this is exception context don't do anything crazy like try to allocate memory.
+
+ @param ExceptionType Type of the exception
+ @param SystemContext Register state at the time of the Exception
+
+**/
+VOID
+DefaultExceptionHandler (
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN OUT EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ CHAR8 Buffer[100];
+ UINTN CharCount;
+ INT32 Offset;
+
+ if (mRecursiveException) {
+ STATIC CHAR8 CONST Message[] = "\nRecursive exception occurred while dumping the CPU state\n";
+
+ SerialPortWrite ((UINT8 *)Message, sizeof Message - 1);
+ if (gST->ConOut != NULL) {
+ AsciiPrint (Message);
+ }
+ CpuDeadLoop ();
+ }
+ mRecursiveException = TRUE;
+
+ CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n\n%a Exception at 0x%016lx\n", gExceptionTypeString[ExceptionType], SystemContext.SystemContextAArch64->ELR);
+ SerialPortWrite ((UINT8 *) Buffer, CharCount);
+ if (gST->ConOut != NULL) {
+ AsciiPrint (Buffer);
+ }
+
+ DEBUG_CODE_BEGIN ();
+ CHAR8 *Pdb, *PrevPdb;
+ UINTN ImageBase;
+ UINTN PeCoffSizeOfHeader;
+ UINT64 *Fp;
+ UINT64 RootFp[2];
+ UINTN Idx;
+
+ PrevPdb = Pdb = GetImageName (SystemContext.SystemContextAArch64->ELR, &ImageBase, &PeCoffSizeOfHeader);
+ if (Pdb != NULL) {
+ DEBUG ((EFI_D_ERROR, "PC 0x%012lx (0x%012lx+0x%08x) [ 0] %a\n",
+ SystemContext.SystemContextAArch64->ELR, ImageBase,
+ SystemContext.SystemContextAArch64->ELR - ImageBase, BaseName (Pdb)));
+ } else {
+ DEBUG ((EFI_D_ERROR, "PC 0x%012lx\n", SystemContext.SystemContextAArch64->ELR));
+ }
+
+ if ((UINT64 *)SystemContext.SystemContextAArch64->FP != 0) {
+ Idx = 0;
+
+ RootFp[0] = ((UINT64 *)SystemContext.SystemContextAArch64->FP)[0];
+ RootFp[1] = ((UINT64 *)SystemContext.SystemContextAArch64->FP)[1];
+ if (RootFp[1] != SystemContext.SystemContextAArch64->LR) {
+ RootFp[0] = SystemContext.SystemContextAArch64->FP;
+ RootFp[1] = SystemContext.SystemContextAArch64->LR;
+ }
+ for (Fp = RootFp; Fp[0] != 0; Fp = (UINT64 *)Fp[0]) {
+ Pdb = GetImageName (Fp[1], &ImageBase, &PeCoffSizeOfHeader);
+ if (Pdb != NULL) {
+ if (Pdb != PrevPdb) {
+ Idx++;
+ PrevPdb = Pdb;
+ }
+ DEBUG ((EFI_D_ERROR, "PC 0x%012lx (0x%012lx+0x%08x) [% 2d] %a\n",
+ Fp[1], ImageBase, Fp[1] - ImageBase, Idx, BaseName (Pdb)));
+ } else {
+ DEBUG ((EFI_D_ERROR, "PC 0x%012lx\n", Fp[1]));
+ }
+ }
+ PrevPdb = Pdb = GetImageName (SystemContext.SystemContextAArch64->ELR, &ImageBase, &PeCoffSizeOfHeader);
+ if (Pdb != NULL) {
+ DEBUG ((EFI_D_ERROR, "\n[ 0] %a\n", Pdb));
+ }
+
+ Idx = 0;
+ for (Fp = RootFp; Fp[0] != 0; Fp = (UINT64 *)Fp[0]) {
+ Pdb = GetImageName (Fp[1], &ImageBase, &PeCoffSizeOfHeader);
+ if (Pdb != NULL && Pdb != PrevPdb) {
+ DEBUG ((EFI_D_ERROR, "[% 2d] %a\n", ++Idx, Pdb));
+ PrevPdb = Pdb;
+ }
+ }
+ }
+ DEBUG_CODE_END ();
+
+ DEBUG ((EFI_D_ERROR, "\n X0 0x%016lx X1 0x%016lx X2 0x%016lx X3 0x%016lx\n", SystemContext.SystemContextAArch64->X0, SystemContext.SystemContextAArch64->X1, SystemContext.SystemContextAArch64->X2, SystemContext.SystemContextAArch64->X3));
+ DEBUG ((EFI_D_ERROR, " X4 0x%016lx X5 0x%016lx X6 0x%016lx X7 0x%016lx\n", SystemContext.SystemContextAArch64->X4, SystemContext.SystemContextAArch64->X5, SystemContext.SystemContextAArch64->X6, SystemContext.SystemContextAArch64->X7));
+ DEBUG ((EFI_D_ERROR, " X8 0x%016lx X9 0x%016lx X10 0x%016lx X11 0x%016lx\n", SystemContext.SystemContextAArch64->X8, SystemContext.SystemContextAArch64->X9, SystemContext.SystemContextAArch64->X10, SystemContext.SystemContextAArch64->X11));
+ DEBUG ((EFI_D_ERROR, " X12 0x%016lx X13 0x%016lx X14 0x%016lx X15 0x%016lx\n", SystemContext.SystemContextAArch64->X12, SystemContext.SystemContextAArch64->X13, SystemContext.SystemContextAArch64->X14, SystemContext.SystemContextAArch64->X15));
+ DEBUG ((EFI_D_ERROR, " X16 0x%016lx X17 0x%016lx X18 0x%016lx X19 0x%016lx\n", SystemContext.SystemContextAArch64->X16, SystemContext.SystemContextAArch64->X17, SystemContext.SystemContextAArch64->X18, SystemContext.SystemContextAArch64->X19));
+ DEBUG ((EFI_D_ERROR, " X20 0x%016lx X21 0x%016lx X22 0x%016lx X23 0x%016lx\n", SystemContext.SystemContextAArch64->X20, SystemContext.SystemContextAArch64->X21, SystemContext.SystemContextAArch64->X22, SystemContext.SystemContextAArch64->X23));
+ DEBUG ((EFI_D_ERROR, " X24 0x%016lx X25 0x%016lx X26 0x%016lx X27 0x%016lx\n", SystemContext.SystemContextAArch64->X24, SystemContext.SystemContextAArch64->X25, SystemContext.SystemContextAArch64->X26, SystemContext.SystemContextAArch64->X27));
+ DEBUG ((EFI_D_ERROR, " X28 0x%016lx FP 0x%016lx LR 0x%016lx \n", SystemContext.SystemContextAArch64->X28, SystemContext.SystemContextAArch64->FP, SystemContext.SystemContextAArch64->LR));
+
+ /* We save these as 128bit numbers, but have to print them as two 64bit numbers,
+ so swap the 64bit words to correctly represent a 128bit number. */
+ DEBUG ((EFI_D_ERROR, "\n V0 0x%016lx %016lx V1 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V0[1], SystemContext.SystemContextAArch64->V0[0], SystemContext.SystemContextAArch64->V1[1], SystemContext.SystemContextAArch64->V1[0]));
+ DEBUG ((EFI_D_ERROR, " V2 0x%016lx %016lx V3 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V2[1], SystemContext.SystemContextAArch64->V2[0], SystemContext.SystemContextAArch64->V3[1], SystemContext.SystemContextAArch64->V3[0]));
+ DEBUG ((EFI_D_ERROR, " V4 0x%016lx %016lx V5 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V4[1], SystemContext.SystemContextAArch64->V4[0], SystemContext.SystemContextAArch64->V5[1], SystemContext.SystemContextAArch64->V5[0]));
+ DEBUG ((EFI_D_ERROR, " V6 0x%016lx %016lx V7 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V6[1], SystemContext.SystemContextAArch64->V6[0], SystemContext.SystemContextAArch64->V7[1], SystemContext.SystemContextAArch64->V7[0]));
+ DEBUG ((EFI_D_ERROR, " V8 0x%016lx %016lx V9 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V8[1], SystemContext.SystemContextAArch64->V8[0], SystemContext.SystemContextAArch64->V9[1], SystemContext.SystemContextAArch64->V9[0]));
+ DEBUG ((EFI_D_ERROR, " V10 0x%016lx %016lx V11 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V10[1], SystemContext.SystemContextAArch64->V10[0], SystemContext.SystemContextAArch64->V11[1], SystemContext.SystemContextAArch64->V11[0]));
+ DEBUG ((EFI_D_ERROR, " V12 0x%016lx %016lx V13 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V12[1], SystemContext.SystemContextAArch64->V12[0], SystemContext.SystemContextAArch64->V13[1], SystemContext.SystemContextAArch64->V13[0]));
+ DEBUG ((EFI_D_ERROR, " V14 0x%016lx %016lx V15 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V14[1], SystemContext.SystemContextAArch64->V14[0], SystemContext.SystemContextAArch64->V15[1], SystemContext.SystemContextAArch64->V15[0]));
+ DEBUG ((EFI_D_ERROR, " V16 0x%016lx %016lx V17 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V16[1], SystemContext.SystemContextAArch64->V16[0], SystemContext.SystemContextAArch64->V17[1], SystemContext.SystemContextAArch64->V17[0]));
+ DEBUG ((EFI_D_ERROR, " V18 0x%016lx %016lx V19 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V18[1], SystemContext.SystemContextAArch64->V18[0], SystemContext.SystemContextAArch64->V19[1], SystemContext.SystemContextAArch64->V19[0]));
+ DEBUG ((EFI_D_ERROR, " V20 0x%016lx %016lx V21 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V20[1], SystemContext.SystemContextAArch64->V20[0], SystemContext.SystemContextAArch64->V21[1], SystemContext.SystemContextAArch64->V21[0]));
+ DEBUG ((EFI_D_ERROR, " V22 0x%016lx %016lx V23 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V22[1], SystemContext.SystemContextAArch64->V22[0], SystemContext.SystemContextAArch64->V23[1], SystemContext.SystemContextAArch64->V23[0]));
+ DEBUG ((EFI_D_ERROR, " V24 0x%016lx %016lx V25 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V24[1], SystemContext.SystemContextAArch64->V24[0], SystemContext.SystemContextAArch64->V25[1], SystemContext.SystemContextAArch64->V25[0]));
+ DEBUG ((EFI_D_ERROR, " V26 0x%016lx %016lx V27 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V26[1], SystemContext.SystemContextAArch64->V26[0], SystemContext.SystemContextAArch64->V27[1], SystemContext.SystemContextAArch64->V27[0]));
+ DEBUG ((EFI_D_ERROR, " V28 0x%016lx %016lx V29 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V28[1], SystemContext.SystemContextAArch64->V28[0], SystemContext.SystemContextAArch64->V29[1], SystemContext.SystemContextAArch64->V29[0]));
+ DEBUG ((EFI_D_ERROR, " V30 0x%016lx %016lx V31 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V30[1], SystemContext.SystemContextAArch64->V30[0], SystemContext.SystemContextAArch64->V31[1], SystemContext.SystemContextAArch64->V31[0]));
+
+ DEBUG ((EFI_D_ERROR, "\n SP 0x%016lx ELR 0x%016lx SPSR 0x%08lx FPSR 0x%08lx\n ESR 0x%08lx FAR 0x%016lx\n", SystemContext.SystemContextAArch64->SP, SystemContext.SystemContextAArch64->ELR, SystemContext.SystemContextAArch64->SPSR, SystemContext.SystemContextAArch64->FPSR, SystemContext.SystemContextAArch64->ESR, SystemContext.SystemContextAArch64->FAR));
+
+ DEBUG ((EFI_D_ERROR, "\n ESR : EC 0x%02x IL 0x%x ISS 0x%08x\n", (SystemContext.SystemContextAArch64->ESR & 0xFC000000) >> 26, (SystemContext.SystemContextAArch64->ESR >> 25) & 0x1, SystemContext.SystemContextAArch64->ESR & 0x1FFFFFF ));
+
+ DescribeExceptionSyndrome (SystemContext.SystemContextAArch64->ESR);
+
+ DEBUG ((EFI_D_ERROR, "\nStack dump:\n"));
+ for (Offset = -256; Offset < 256; Offset += 32) {
+ DEBUG ((EFI_D_ERROR, "%c %013lx: %016lx %016lx %016lx %016lx\n",
+ Offset == 0 ? '>' : ' ',
+ SystemContext.SystemContextAArch64->SP + Offset,
+ *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset),
+ *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 8),
+ *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 16),
+ *(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 24)));
+ }
+
+ ASSERT (FALSE);
+ CpuDeadLoop ();
+}
diff --git a/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c b/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c new file mode 100644 index 000000000..fa9af8c41 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c @@ -0,0 +1,277 @@ +/** @file
+ Default exception handler
+
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2012, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PeCoffGetEntryPointLib.h>
+#include <Library/PrintLib.h>
+#include <Library/ArmDisassemblerLib.h>
+#include <Library/SerialPortLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+
+#include <Guid/DebugImageInfoTable.h>
+
+#include <Protocol/DebugSupport.h>
+#include <Library/DefaultExceptionHandlerLib.h>
+
+//
+// The number of elements in a CHAR8 array, including the terminating NUL, that
+// is meant to hold the string rendering of the CPSR.
+//
+#define CPSR_STRING_SIZE 32
+
+typedef struct {
+ UINT32 BIT;
+ CHAR8 Char;
+} CPSR_CHAR;
+
+CHAR8 *
+GetImageName (
+ IN UINTN FaultAddress,
+ OUT UINTN *ImageBase,
+ OUT UINTN *PeCoffSizeOfHeaders
+ );
+
+/**
+ Convert the Current Program Status Register (CPSR) to a string. The string is
+ a defacto standard in the ARM world.
+
+ It is possible to add extra bits by adding them to CpsrChar array.
+
+ @param Cpsr ARM CPSR register value
+ @param ReturnStr CPSR_STRING_SIZE byte string that contains string
+ version of CPSR
+
+**/
+VOID
+CpsrString (
+ IN UINT32 Cpsr,
+ OUT CHAR8 *ReturnStr
+ )
+{
+ UINTN Index;
+ CHAR8* Str;
+ CHAR8* ModeStr;
+ CPSR_CHAR CpsrChar[] = {
+ { 31, 'n' },
+ { 30, 'z' },
+ { 29, 'c' },
+ { 28, 'v' },
+
+ { 9, 'e' },
+ { 8, 'a' },
+ { 7, 'i' },
+ { 6, 'f' },
+ { 5, 't' },
+ { 0, '?' }
+ };
+
+ Str = ReturnStr;
+
+ for (Index = 0; CpsrChar[Index].BIT != 0; Index++, Str++) {
+ *Str = CpsrChar[Index].Char;
+ if ((Cpsr & (1 << CpsrChar[Index].BIT)) != 0) {
+ // Concert to upper case if bit is set
+ *Str &= ~0x20;
+ }
+ }
+
+ *Str++ = '_';
+ *Str = '\0';
+
+ switch (Cpsr & 0x1f) {
+ case 0x10:
+ ModeStr = "usr";
+ break;
+ case 0x011:
+ ModeStr = "fiq";
+ break;
+ case 0x12:
+ ModeStr = "irq";
+ break;
+ case 0x13:
+ ModeStr = "svc";
+ break;
+ case 0x16:
+ ModeStr = "mon";
+ break;
+ case 0x17:
+ ModeStr = "abt";
+ break;
+ case 0x1b:
+ ModeStr = "und";
+ break;
+ case 0x1f:
+ ModeStr = "sys";
+ break;
+
+ default:
+ ModeStr = "???";
+ break;
+ }
+
+ //
+ // See the interface contract in the leading comment block.
+ //
+ AsciiStrCatS (Str, CPSR_STRING_SIZE - (Str - ReturnStr), ModeStr);
+}
+
+CHAR8 *
+FaultStatusToString (
+ IN UINT32 Status
+ )
+{
+ CHAR8 *FaultSource;
+
+ switch (Status) {
+ case 0x01: FaultSource = "Alignment fault"; break;
+ case 0x02: FaultSource = "Debug event fault"; break;
+ case 0x03: FaultSource = "Access Flag fault on Section"; break;
+ case 0x04: FaultSource = "Cache maintenance operation fault[2]"; break;
+ case 0x05: FaultSource = "Translation fault on Section"; break;
+ case 0x06: FaultSource = "Access Flag fault on Page"; break;
+ case 0x07: FaultSource = "Translation fault on Page"; break;
+ case 0x08: FaultSource = "Precise External Abort"; break;
+ case 0x09: FaultSource = "Domain fault on Section"; break;
+ case 0x0b: FaultSource = "Domain fault on Page"; break;
+ case 0x0c: FaultSource = "External abort on translation, first level"; break;
+ case 0x0d: FaultSource = "Permission fault on Section"; break;
+ case 0x0e: FaultSource = "External abort on translation, second level"; break;
+ case 0x0f: FaultSource = "Permission fault on Page"; break;
+ case 0x16: FaultSource = "Imprecise External Abort"; break;
+ default: FaultSource = "No function"; break;
+ }
+
+ return FaultSource;
+}
+
+STATIC CHAR8 *gExceptionTypeString[] = {
+ "Reset",
+ "Undefined OpCode",
+ "SVC",
+ "Prefetch Abort",
+ "Data Abort",
+ "Undefined",
+ "IRQ",
+ "FIQ"
+};
+
+/**
+ This is the default action to take on an unexpected exception
+
+ Since this is exception context don't do anything crazy like try to allocate memory.
+
+ @param ExceptionType Type of the exception
+ @param SystemContext Register state at the time of the Exception
+
+
+**/
+VOID
+DefaultExceptionHandler (
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN OUT EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ CHAR8 Buffer[100];
+ UINTN CharCount;
+ UINT32 DfsrStatus;
+ UINT32 IfsrStatus;
+ BOOLEAN DfsrWrite;
+ UINT32 PcAdjust = 0;
+
+ CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n%a Exception PC at 0x%08x CPSR 0x%08x ",
+ gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR);
+ SerialPortWrite ((UINT8 *)Buffer, CharCount);
+ if (gST->ConOut != NULL) {
+ AsciiPrint (Buffer);
+ }
+
+ DEBUG_CODE_BEGIN ();
+ CHAR8 *Pdb;
+ UINT32 ImageBase;
+ UINT32 PeCoffSizeOfHeader;
+ UINT32 Offset;
+ CHAR8 CpsrStr[CPSR_STRING_SIZE]; // char per bit. Lower 5-bits are mode
+ // that is a 3 char string
+ CHAR8 Buffer[80];
+ UINT8 *DisAsm;
+ UINT32 ItBlock;
+
+ CpsrString (SystemContext.SystemContextArm->CPSR, CpsrStr);
+ DEBUG ((EFI_D_ERROR, "%a\n", CpsrStr));
+
+ Pdb = GetImageName (SystemContext.SystemContextArm->PC, &ImageBase, &PeCoffSizeOfHeader);
+ Offset = SystemContext.SystemContextArm->PC - ImageBase;
+ if (Pdb != NULL) {
+ DEBUG ((EFI_D_ERROR, "%a\n", Pdb));
+
+ //
+ // A PE/COFF image loads its headers into memory so the headers are
+ // included in the linked addresses. ELF and Mach-O images do not
+ // include the headers so the first byte of the image is usually
+ // text (code). If you look at link maps from ELF or Mach-O images
+ // you need to subtract out the size of the PE/COFF header to get
+ // get the offset that matches the link map.
+ //
+ DEBUG ((EFI_D_ERROR, "loaded at 0x%08x (PE/COFF offset) 0x%x (ELF or Mach-O offset) 0x%x", ImageBase, Offset, Offset - PeCoffSizeOfHeader));
+
+ // If we come from an image it is safe to show the instruction. We know it should not fault
+ DisAsm = (UINT8 *)(UINTN)SystemContext.SystemContextArm->PC;
+ ItBlock = 0;
+ DisassembleInstruction (&DisAsm, (SystemContext.SystemContextArm->CPSR & BIT5) == BIT5, TRUE, &ItBlock, Buffer, sizeof (Buffer));
+ DEBUG ((EFI_D_ERROR, "\n%a", Buffer));
+
+ switch (ExceptionType) {
+ case EXCEPT_ARM_UNDEFINED_INSTRUCTION:
+ case EXCEPT_ARM_SOFTWARE_INTERRUPT:
+ case EXCEPT_ARM_PREFETCH_ABORT:
+ case EXCEPT_ARM_DATA_ABORT:
+ // advance PC past the faulting instruction
+ PcAdjust = (UINTN)DisAsm - SystemContext.SystemContextArm->PC;
+ break;
+
+ default:
+ break;
+ }
+
+ }
+ DEBUG_CODE_END ();
+ DEBUG ((EFI_D_ERROR, "\n R0 0x%08x R1 0x%08x R2 0x%08x R3 0x%08x\n", SystemContext.SystemContextArm->R0, SystemContext.SystemContextArm->R1, SystemContext.SystemContextArm->R2, SystemContext.SystemContextArm->R3));
+ DEBUG ((EFI_D_ERROR, " R4 0x%08x R5 0x%08x R6 0x%08x R7 0x%08x\n", SystemContext.SystemContextArm->R4, SystemContext.SystemContextArm->R5, SystemContext.SystemContextArm->R6, SystemContext.SystemContextArm->R7));
+ DEBUG ((EFI_D_ERROR, " R8 0x%08x R9 0x%08x R10 0x%08x R11 0x%08x\n", SystemContext.SystemContextArm->R8, SystemContext.SystemContextArm->R9, SystemContext.SystemContextArm->R10, SystemContext.SystemContextArm->R11));
+ DEBUG ((EFI_D_ERROR, " R12 0x%08x SP 0x%08x LR 0x%08x PC 0x%08x\n", SystemContext.SystemContextArm->R12, SystemContext.SystemContextArm->SP, SystemContext.SystemContextArm->LR, SystemContext.SystemContextArm->PC));
+ DEBUG ((EFI_D_ERROR, "DFSR 0x%08x DFAR 0x%08x IFSR 0x%08x IFAR 0x%08x\n", SystemContext.SystemContextArm->DFSR, SystemContext.SystemContextArm->DFAR, SystemContext.SystemContextArm->IFSR, SystemContext.SystemContextArm->IFAR));
+
+ // Bit10 is Status[4] Bit3:0 is Status[3:0]
+ DfsrStatus = (SystemContext.SystemContextArm->DFSR & 0xf) | ((SystemContext.SystemContextArm->DFSR >> 6) & 0x10);
+ DfsrWrite = (SystemContext.SystemContextArm->DFSR & BIT11) != 0;
+ if (DfsrStatus != 0x00) {
+ DEBUG ((EFI_D_ERROR, " %a: %a 0x%08x\n", FaultStatusToString (DfsrStatus), DfsrWrite ? "write to" : "read from", SystemContext.SystemContextArm->DFAR));
+ }
+
+ IfsrStatus = (SystemContext.SystemContextArm->IFSR & 0xf) | ((SystemContext.SystemContextArm->IFSR >> 6) & 0x10);
+ if (IfsrStatus != 0) {
+ DEBUG ((EFI_D_ERROR, " Instruction %a at 0x%08x\n", FaultStatusToString (SystemContext.SystemContextArm->IFSR & 0xf), SystemContext.SystemContextArm->IFAR));
+ }
+
+ DEBUG ((EFI_D_ERROR, "\n"));
+ ASSERT (FALSE);
+
+ CpuDeadLoop (); // may return if executing under a debugger
+
+ // Clear the error registers that we have already displayed incase some one wants to keep going
+ SystemContext.SystemContextArm->DFSR = 0;
+ SystemContext.SystemContextArm->IFSR = 0;
+
+ // If some one is stepping past the exception handler adjust the PC to point to the next instruction
+ SystemContext.SystemContextArm->PC += PcAdjust;
+}
diff --git a/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf b/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf new file mode 100644 index 000000000..c7d31f640 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf @@ -0,0 +1,43 @@ +#/** @file
+#
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DefaultExceptionHandlerLib
+ FILE_GUID = EACDB354-DF1A-4AF9-A171-499737ED818F
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = DefaultExceptionHandlerLib|DXE_CORE DXE_DRIVER
+
+[Sources.common]
+ DefaultExceptionHandlerUefi.c
+
+[Sources.ARM]
+ Arm/DefaultExceptionHandler.c
+
+[Sources.AARCH64]
+ AArch64/DefaultExceptionHandler.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ UefiLib
+ BaseLib
+ PrintLib
+ DebugLib
+ PeCoffGetEntryPointLib
+ ArmDisassemblerLib
+ SerialPortLib
+ UefiBootServicesTableLib
+
+[Guids]
+ gEfiDebugImageInfoTableGuid
diff --git a/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerUefi.c b/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerUefi.c new file mode 100644 index 000000000..e9fea4038 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerUefi.c @@ -0,0 +1,69 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+#include <Library/PeCoffGetEntryPointLib.h>
+#include <Library/UefiLib.h>
+
+#include <Guid/DebugImageInfoTable.h>
+
+/**
+ Use the EFI Debug Image Table to lookup the FaultAddress and find which PE/COFF image
+ it came from. As long as the PE/COFF image contains a debug directory entry a
+ string can be returned. For ELF and Mach-O images the string points to the Mach-O or ELF
+ image. Microsoft tools contain a pointer to the PDB file that contains the debug information.
+
+ @param FaultAddress Address to find PE/COFF image for.
+ @param ImageBase Return load address of found image
+ @param PeCoffSizeOfHeaders Return the size of the PE/COFF header for the image that was found
+
+ @retval NULL FaultAddress not in a loaded PE/COFF image.
+ @retval Path and file name of PE/COFF image.
+
+**/
+CHAR8 *
+GetImageName (
+ IN UINTN FaultAddress,
+ OUT UINTN *ImageBase,
+ OUT UINTN *PeCoffSizeOfHeaders
+ )
+{
+ EFI_STATUS Status;
+ EFI_DEBUG_IMAGE_INFO_TABLE_HEADER *DebugTableHeader;
+ EFI_DEBUG_IMAGE_INFO *DebugTable;
+ UINTN Entry;
+ CHAR8 *Address;
+
+ Status = EfiGetSystemConfigurationTable (&gEfiDebugImageInfoTableGuid, (VOID **)&DebugTableHeader);
+ if (EFI_ERROR (Status)) {
+ return NULL;
+ }
+
+ DebugTable = DebugTableHeader->EfiDebugImageInfoTable;
+ if (DebugTable == NULL) {
+ return NULL;
+ }
+
+ Address = (CHAR8 *)(UINTN)FaultAddress;
+ for (Entry = 0; Entry < DebugTableHeader->TableSize; Entry++, DebugTable++) {
+ if (DebugTable->NormalImage != NULL) {
+ if ((DebugTable->NormalImage->ImageInfoType == EFI_DEBUG_IMAGE_INFO_TYPE_NORMAL) &&
+ (DebugTable->NormalImage->LoadedImageProtocolInstance != NULL)) {
+ if ((Address >= (CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase) &&
+ (Address <= ((CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase + DebugTable->NormalImage->LoadedImageProtocolInstance->ImageSize))) {
+ *ImageBase = (UINTN)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase;
+ *PeCoffSizeOfHeaders = PeCoffGetSizeOfHeaders ((VOID *)(UINTN)*ImageBase);
+ return PeCoffLoaderGetPdbPointer (DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase);
+ }
+ }
+ }
+ }
+
+ return NULL;
+}
+
diff --git a/roms/edk2/ArmPkg/Library/GccLto/liblto-aarch64.a b/roms/edk2/ArmPkg/Library/GccLto/liblto-aarch64.a Binary files differnew file mode 100644 index 000000000..2ab00238f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/GccLto/liblto-aarch64.a diff --git a/roms/edk2/ArmPkg/Library/GccLto/liblto-aarch64.s b/roms/edk2/ArmPkg/Library/GccLto/liblto-aarch64.s new file mode 100644 index 000000000..02a55ef44 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/GccLto/liblto-aarch64.s @@ -0,0 +1,21 @@ +//
+// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+
+//
+// GCC in LTO mode interoperates poorly with non-standard libraries that
+// provide implementations of compiler intrinsics such as memcpy/memset
+// or the stack protector entry points.
+//
+// By referencing these functions from a non-LTO object that can be passed
+// to the linker via the -plugin-opt=-pass-through=-lxxx options, the
+// intrinsics are included in the link in a way that allows them to be
+// pruned again if no other references to them exist.
+//
+
+ .long memcpy - .
+ .long memset - .
+ .long __stack_chk_fail - .
+ .long __stack_chk_guard - .
diff --git a/roms/edk2/ArmPkg/Library/GccLto/liblto-arm.a b/roms/edk2/ArmPkg/Library/GccLto/liblto-arm.a Binary files differnew file mode 100644 index 000000000..d811c0957 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/GccLto/liblto-arm.a diff --git a/roms/edk2/ArmPkg/Library/GccLto/liblto-arm.s b/roms/edk2/ArmPkg/Library/GccLto/liblto-arm.s new file mode 100644 index 000000000..f19fb4555 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/GccLto/liblto-arm.s @@ -0,0 +1,55 @@ +//
+// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+
+//
+// GCC in LTO mode interoperates poorly with non-standard libraries that
+// provide implementations of compiler intrinsics such as memcpy/memset
+// or the stack protector entry points.
+//
+// By referencing these functions from a non-LTO object that can be passed
+// to the linker via the -plugin-opt=-pass-through=-lxxx options, the
+// intrinsics are included in the link in a way that allows them to be
+// pruned again if no other references to them exist.
+//
+
+ .long memcpy - .
+ .long memset - .
+ .long __stack_chk_fail - .
+ .long __stack_chk_guard - .
+ .long __ashrdi3 - .
+ .long __ashldi3 - .
+ .long __aeabi_idiv - .
+ .long __aeabi_idivmod - .
+ .long __aeabi_uidiv - .
+ .long __aeabi_uidivmod - .
+ .long __divdi3 - .
+ .long __divsi3 - .
+ .long __lshrdi3 - .
+ .long __aeabi_memcpy - .
+ .long __aeabi_memset - .
+ .long memmove - .
+ .long __modsi3 - .
+ .long __moddi3 - .
+ .long __muldi3 - .
+ .long __aeabi_lmul - .
+ .long __ARM_ll_mullu - .
+ .long __udivsi3 - .
+ .long __umodsi3 - .
+ .long __udivdi3 - .
+ .long __umoddi3 - .
+ .long __udivmoddi4 - .
+ .long __clzsi2 - .
+ .long __ctzsi2 - .
+ .long __ucmpdi2 - .
+ .long __switch8 - .
+ .long __switchu8 - .
+ .long __switch16 - .
+ .long __switch32 - .
+ .long __aeabi_ulcmp - .
+ .long __aeabi_uldivmod - .
+ .long __aeabi_ldivmod - .
+ .long __aeabi_llsr - .
+ .long __aeabi_llsl - .
diff --git a/roms/edk2/ArmPkg/Library/OpteeLib/Optee.c b/roms/edk2/ArmPkg/Library/OpteeLib/Optee.c new file mode 100644 index 000000000..2562bc093 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/OpteeLib/Optee.c @@ -0,0 +1,452 @@ +/** @file
+ Api's to communicate with OP-TEE OS (Trusted OS based on ARM TrustZone) via
+ secure monitor calls.
+
+ Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/ArmMmuLib.h>
+#include <Library/ArmSmcLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/OpteeLib.h>
+
+#include <IndustryStandard/ArmStdSmc.h>
+#include <OpteeSmc.h>
+#include <Uefi.h>
+
+STATIC OPTEE_SHARED_MEMORY_INFORMATION OpteeSharedMemoryInformation = { 0 };
+
+/**
+ Check for OP-TEE presence.
+**/
+BOOLEAN
+EFIAPI
+IsOpteePresent (
+ VOID
+ )
+{
+ ARM_SMC_ARGS ArmSmcArgs;
+
+ ZeroMem (&ArmSmcArgs, sizeof (ARM_SMC_ARGS));
+ // Send a Trusted OS Calls UID command
+ ArmSmcArgs.Arg0 = ARM_SMC_ID_TOS_UID;
+ ArmCallSmc (&ArmSmcArgs);
+
+ if ((ArmSmcArgs.Arg0 == OPTEE_OS_UID0) &&
+ (ArmSmcArgs.Arg1 == OPTEE_OS_UID1) &&
+ (ArmSmcArgs.Arg2 == OPTEE_OS_UID2) &&
+ (ArmSmcArgs.Arg3 == OPTEE_OS_UID3)) {
+ return TRUE;
+ } else {
+ return FALSE;
+ }
+}
+
+STATIC
+EFI_STATUS
+OpteeSharedMemoryRemap (
+ VOID
+ )
+{
+ ARM_SMC_ARGS ArmSmcArgs;
+ EFI_PHYSICAL_ADDRESS PhysicalAddress;
+ EFI_PHYSICAL_ADDRESS Start;
+ EFI_PHYSICAL_ADDRESS End;
+ EFI_STATUS Status;
+ UINTN Size;
+
+ ZeroMem (&ArmSmcArgs, sizeof (ARM_SMC_ARGS));
+ ArmSmcArgs.Arg0 = OPTEE_SMC_GET_SHARED_MEMORY_CONFIG;
+
+ ArmCallSmc (&ArmSmcArgs);
+ if (ArmSmcArgs.Arg0 != OPTEE_SMC_RETURN_OK) {
+ DEBUG ((DEBUG_WARN, "OP-TEE shared memory not supported\n"));
+ return EFI_UNSUPPORTED;
+ }
+
+ if (ArmSmcArgs.Arg3 != OPTEE_SMC_SHARED_MEMORY_CACHED) {
+ DEBUG ((DEBUG_WARN, "OP-TEE: Only normal cached shared memory supported\n"));
+ return EFI_UNSUPPORTED;
+ }
+
+ Start = (ArmSmcArgs.Arg1 + SIZE_4KB - 1) & ~(SIZE_4KB - 1);
+ End = (ArmSmcArgs.Arg1 + ArmSmcArgs.Arg2) & ~(SIZE_4KB - 1);
+ PhysicalAddress = Start;
+ Size = End - Start;
+
+ if (Size < SIZE_4KB) {
+ DEBUG ((DEBUG_WARN, "OP-TEE shared memory too small\n"));
+ return EFI_BUFFER_TOO_SMALL;
+ }
+
+ Status = ArmSetMemoryAttributes (PhysicalAddress, Size, EFI_MEMORY_WB);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ OpteeSharedMemoryInformation.Base = (UINTN)PhysicalAddress;
+ OpteeSharedMemoryInformation.Size = Size;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+OpteeInit (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+
+ if (!IsOpteePresent ()) {
+ DEBUG ((DEBUG_WARN, "OP-TEE not present\n"));
+ return EFI_UNSUPPORTED;
+ }
+
+ Status = OpteeSharedMemoryRemap ();
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "OP-TEE shared memory remap failed\n"));
+ return Status;
+ }
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+BOOLEAN
+IsOpteeSmcReturnRpc (
+ UINT32 Return
+ )
+{
+ return (Return != OPTEE_SMC_RETURN_UNKNOWN_FUNCTION) &&
+ ((Return & OPTEE_SMC_RETURN_RPC_PREFIX_MASK) ==
+ OPTEE_SMC_RETURN_RPC_PREFIX);
+}
+
+/**
+ Does Standard SMC to OP-TEE in secure world.
+
+ @param[in] PhysicalArg Physical address of message to pass to secure world
+
+ @return 0 on success, secure world return code otherwise
+
+**/
+STATIC
+UINT32
+OpteeCallWithArg (
+ IN UINT64 PhysicalArg
+ )
+{
+ ARM_SMC_ARGS ArmSmcArgs;
+
+ ZeroMem (&ArmSmcArgs, sizeof (ARM_SMC_ARGS));
+ ArmSmcArgs.Arg0 = OPTEE_SMC_CALL_WITH_ARG;
+ ArmSmcArgs.Arg1 = (UINT32)(PhysicalArg >> 32);
+ ArmSmcArgs.Arg2 = (UINT32)PhysicalArg;
+
+ while (TRUE) {
+ ArmCallSmc (&ArmSmcArgs);
+
+ if (IsOpteeSmcReturnRpc (ArmSmcArgs.Arg0)) {
+ switch (ArmSmcArgs.Arg0) {
+ case OPTEE_SMC_RETURN_RPC_FOREIGN_INTERRUPT:
+ //
+ // A foreign interrupt was raised while secure world was
+ // executing, since they are handled in UEFI a dummy RPC is
+ // performed to let UEFI take the interrupt through the normal
+ // vector.
+ //
+ break;
+
+ default:
+ // Do nothing in case RPC is not implemented.
+ break;
+ }
+
+ ArmSmcArgs.Arg0 = OPTEE_SMC_RETURN_FROM_RPC;
+ } else {
+ break;
+ }
+ }
+
+ return ArmSmcArgs.Arg0;
+}
+
+STATIC
+VOID
+EfiGuidToRfc4122Uuid (
+ OUT RFC4122_UUID *Rfc4122Uuid,
+ IN EFI_GUID *Guid
+ )
+{
+ Rfc4122Uuid->Data1 = SwapBytes32 (Guid->Data1);
+ Rfc4122Uuid->Data2 = SwapBytes16 (Guid->Data2);
+ Rfc4122Uuid->Data3 = SwapBytes16 (Guid->Data3);
+ CopyMem (Rfc4122Uuid->Data4, Guid->Data4, sizeof (Rfc4122Uuid->Data4));
+}
+
+EFI_STATUS
+EFIAPI
+OpteeOpenSession (
+ IN OUT OPTEE_OPEN_SESSION_ARG *OpenSessionArg
+ )
+{
+ OPTEE_MESSAGE_ARG *MessageArg;
+
+ MessageArg = NULL;
+
+ if (OpteeSharedMemoryInformation.Base == 0) {
+ DEBUG ((DEBUG_WARN, "OP-TEE not initialized\n"));
+ return EFI_NOT_STARTED;
+ }
+
+ MessageArg = (OPTEE_MESSAGE_ARG *)OpteeSharedMemoryInformation.Base;
+ ZeroMem (MessageArg, sizeof (OPTEE_MESSAGE_ARG));
+
+ MessageArg->Command = OPTEE_MESSAGE_COMMAND_OPEN_SESSION;
+
+ //
+ // Initialize and add the meta parameters needed when opening a
+ // session.
+ //
+ MessageArg->Params[0].Attribute = OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INPUT |
+ OPTEE_MESSAGE_ATTRIBUTE_META;
+ MessageArg->Params[1].Attribute = OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INPUT |
+ OPTEE_MESSAGE_ATTRIBUTE_META;
+ EfiGuidToRfc4122Uuid (
+ (RFC4122_UUID *)&MessageArg->Params[0].Union.Value,
+ &OpenSessionArg->Uuid
+ );
+ ZeroMem (&MessageArg->Params[1].Union.Value, sizeof (EFI_GUID));
+ MessageArg->Params[1].Union.Value.C = OPTEE_LOGIN_PUBLIC;
+
+ MessageArg->NumParams = 2;
+
+ if (OpteeCallWithArg ((UINTN)MessageArg)) {
+ MessageArg->Return = OPTEE_ERROR_COMMUNICATION;
+ MessageArg->ReturnOrigin = OPTEE_ORIGIN_COMMUNICATION;
+ }
+
+ OpenSessionArg->Session = MessageArg->Session;
+ OpenSessionArg->Return = MessageArg->Return;
+ OpenSessionArg->ReturnOrigin = MessageArg->ReturnOrigin;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+OpteeCloseSession (
+ IN UINT32 Session
+ )
+{
+ OPTEE_MESSAGE_ARG *MessageArg;
+
+ MessageArg = NULL;
+
+ if (OpteeSharedMemoryInformation.Base == 0) {
+ DEBUG ((DEBUG_WARN, "OP-TEE not initialized\n"));
+ return EFI_NOT_STARTED;
+ }
+
+ MessageArg = (OPTEE_MESSAGE_ARG *)OpteeSharedMemoryInformation.Base;
+ ZeroMem (MessageArg, sizeof (OPTEE_MESSAGE_ARG));
+
+ MessageArg->Command = OPTEE_MESSAGE_COMMAND_CLOSE_SESSION;
+ MessageArg->Session = Session;
+
+ OpteeCallWithArg ((UINTN)MessageArg);
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+OpteeToMessageParam (
+ OUT OPTEE_MESSAGE_PARAM *MessageParams,
+ IN UINT32 NumParams,
+ IN OPTEE_MESSAGE_PARAM *InParams
+ )
+{
+ UINT32 Idx;
+ UINTN ParamSharedMemoryAddress;
+ UINTN SharedMemorySize;
+ UINTN Size;
+
+ Size = (sizeof (OPTEE_MESSAGE_ARG) + sizeof (UINT64) - 1) &
+ ~(sizeof (UINT64) - 1);
+ ParamSharedMemoryAddress = OpteeSharedMemoryInformation.Base + Size;
+ SharedMemorySize = OpteeSharedMemoryInformation.Size - Size;
+
+ for (Idx = 0; Idx < NumParams; Idx++) {
+ CONST OPTEE_MESSAGE_PARAM *InParam;
+ OPTEE_MESSAGE_PARAM *MessageParam;
+ UINT32 Attribute;
+
+ InParam = InParams + Idx;
+ MessageParam = MessageParams + Idx;
+ Attribute = InParam->Attribute & OPTEE_MESSAGE_ATTRIBUTE_TYPE_MASK;
+
+ switch (Attribute) {
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_NONE:
+ MessageParam->Attribute = OPTEE_MESSAGE_ATTRIBUTE_TYPE_NONE;
+ ZeroMem (&MessageParam->Union, sizeof (MessageParam->Union));
+ break;
+
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INPUT:
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_OUTPUT:
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INOUT:
+ MessageParam->Attribute = Attribute;
+ MessageParam->Union.Value.A = InParam->Union.Value.A;
+ MessageParam->Union.Value.B = InParam->Union.Value.B;
+ MessageParam->Union.Value.C = InParam->Union.Value.C;
+ break;
+
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INPUT:
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_OUTPUT:
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INOUT:
+ MessageParam->Attribute = Attribute;
+
+ if (InParam->Union.Memory.Size > SharedMemorySize) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ CopyMem (
+ (VOID *)ParamSharedMemoryAddress,
+ (VOID *)(UINTN)InParam->Union.Memory.BufferAddress,
+ InParam->Union.Memory.Size
+ );
+ MessageParam->Union.Memory.BufferAddress = (UINT64)ParamSharedMemoryAddress;
+ MessageParam->Union.Memory.Size = InParam->Union.Memory.Size;
+
+ Size = (InParam->Union.Memory.Size + sizeof (UINT64) - 1) &
+ ~(sizeof (UINT64) - 1);
+ ParamSharedMemoryAddress += Size;
+ SharedMemorySize -= Size;
+ break;
+
+ default:
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+OpteeFromMessageParam (
+ OUT OPTEE_MESSAGE_PARAM *OutParams,
+ IN UINT32 NumParams,
+ IN OPTEE_MESSAGE_PARAM *MessageParams
+ )
+{
+ UINT32 Idx;
+
+ for (Idx = 0; Idx < NumParams; Idx++) {
+ OPTEE_MESSAGE_PARAM *OutParam;
+ CONST OPTEE_MESSAGE_PARAM *MessageParam;
+ UINT32 Attribute;
+
+ OutParam = OutParams + Idx;
+ MessageParam = MessageParams + Idx;
+ Attribute = MessageParam->Attribute & OPTEE_MESSAGE_ATTRIBUTE_TYPE_MASK;
+
+ switch (Attribute) {
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_NONE:
+ OutParam->Attribute = OPTEE_MESSAGE_ATTRIBUTE_TYPE_NONE;
+ ZeroMem (&OutParam->Union, sizeof (OutParam->Union));
+ break;
+
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INPUT:
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_OUTPUT:
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INOUT:
+ OutParam->Attribute = Attribute;
+ OutParam->Union.Value.A = MessageParam->Union.Value.A;
+ OutParam->Union.Value.B = MessageParam->Union.Value.B;
+ OutParam->Union.Value.C = MessageParam->Union.Value.C;
+ break;
+
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INPUT:
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_OUTPUT:
+ case OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INOUT:
+ OutParam->Attribute = Attribute;
+
+ if (MessageParam->Union.Memory.Size > OutParam->Union.Memory.Size) {
+ return EFI_BAD_BUFFER_SIZE;
+ }
+
+ CopyMem (
+ (VOID *)(UINTN)OutParam->Union.Memory.BufferAddress,
+ (VOID *)(UINTN)MessageParam->Union.Memory.BufferAddress,
+ MessageParam->Union.Memory.Size
+ );
+ OutParam->Union.Memory.Size = MessageParam->Union.Memory.Size;
+ break;
+
+ default:
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+OpteeInvokeFunction (
+ IN OUT OPTEE_INVOKE_FUNCTION_ARG *InvokeFunctionArg
+ )
+{
+ EFI_STATUS Status;
+ OPTEE_MESSAGE_ARG *MessageArg;
+
+ MessageArg = NULL;
+
+ if (OpteeSharedMemoryInformation.Base == 0) {
+ DEBUG ((DEBUG_WARN, "OP-TEE not initialized\n"));
+ return EFI_NOT_STARTED;
+ }
+
+ MessageArg = (OPTEE_MESSAGE_ARG *)OpteeSharedMemoryInformation.Base;
+ ZeroMem (MessageArg, sizeof (OPTEE_MESSAGE_ARG));
+
+ MessageArg->Command = OPTEE_MESSAGE_COMMAND_INVOKE_FUNCTION;
+ MessageArg->Function = InvokeFunctionArg->Function;
+ MessageArg->Session = InvokeFunctionArg->Session;
+
+ Status = OpteeToMessageParam (
+ MessageArg->Params,
+ OPTEE_MAX_CALL_PARAMS,
+ InvokeFunctionArg->Params
+ );
+ if (Status) {
+ return Status;
+ }
+
+ MessageArg->NumParams = OPTEE_MAX_CALL_PARAMS;
+
+ if (OpteeCallWithArg ((UINTN)MessageArg)) {
+ MessageArg->Return = OPTEE_ERROR_COMMUNICATION;
+ MessageArg->ReturnOrigin = OPTEE_ORIGIN_COMMUNICATION;
+ }
+
+ if (OpteeFromMessageParam (
+ InvokeFunctionArg->Params,
+ OPTEE_MAX_CALL_PARAMS,
+ MessageArg->Params
+ )) {
+ MessageArg->Return = OPTEE_ERROR_COMMUNICATION;
+ MessageArg->ReturnOrigin = OPTEE_ORIGIN_COMMUNICATION;
+ }
+
+ InvokeFunctionArg->Return = MessageArg->Return;
+ InvokeFunctionArg->ReturnOrigin = MessageArg->ReturnOrigin;
+
+ return EFI_SUCCESS;
+}
diff --git a/roms/edk2/ArmPkg/Library/OpteeLib/OpteeLib.inf b/roms/edk2/ArmPkg/Library/OpteeLib/OpteeLib.inf new file mode 100644 index 000000000..40a4d8dd6 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/OpteeLib/OpteeLib.inf @@ -0,0 +1,30 @@ +#/** @file
+# OP-TEE lib using secure monitor calls
+#
+# Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = OpteeLib
+ FILE_GUID = BCD50D08-9568-45B2-84DF-30AE0279AD46
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = OpteeLib
+
+[Sources]
+ Optee.c
+ OpteeSmc.h
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ ArmMmuLib
+ ArmSmcLib
+ BaseLib
diff --git a/roms/edk2/ArmPkg/Library/OpteeLib/OpteeSmc.h b/roms/edk2/ArmPkg/Library/OpteeLib/OpteeSmc.h new file mode 100644 index 000000000..62319d718 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/OpteeLib/OpteeSmc.h @@ -0,0 +1,50 @@ +/** @file
+ OP-TEE SMC header file.
+
+ Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _OPTEE_SMC_H_
+#define _OPTEE_SMC_H_
+
+/* Returned in Arg0 only from Trusted OS functions */
+#define OPTEE_SMC_RETURN_OK 0x0
+
+#define OPTEE_SMC_RETURN_FROM_RPC 0x32000003
+#define OPTEE_SMC_CALL_WITH_ARG 0x32000004
+#define OPTEE_SMC_GET_SHARED_MEMORY_CONFIG 0xb2000007
+
+#define OPTEE_SMC_SHARED_MEMORY_CACHED 1
+
+#define OPTEE_SMC_RETURN_UNKNOWN_FUNCTION 0xffffffff
+#define OPTEE_SMC_RETURN_RPC_PREFIX_MASK 0xffff0000
+#define OPTEE_SMC_RETURN_RPC_PREFIX 0xffff0000
+#define OPTEE_SMC_RETURN_RPC_FOREIGN_INTERRUPT 0xffff0004
+
+#define OPTEE_MESSAGE_COMMAND_OPEN_SESSION 0
+#define OPTEE_MESSAGE_COMMAND_INVOKE_FUNCTION 1
+#define OPTEE_MESSAGE_COMMAND_CLOSE_SESSION 2
+
+#define OPTEE_MESSAGE_ATTRIBUTE_META 0x100
+
+#define OPTEE_LOGIN_PUBLIC 0x0
+
+typedef struct {
+ UINTN Base;
+ UINTN Size;
+} OPTEE_SHARED_MEMORY_INFORMATION;
+
+//
+// UUID struct compliant with RFC4122 (network byte order).
+//
+typedef struct {
+ UINT32 Data1;
+ UINT16 Data2;
+ UINT16 Data3;
+ UINT8 Data4[8];
+} RFC4122_UUID;
+
+#endif
diff --git a/roms/edk2/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c b/roms/edk2/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c new file mode 100644 index 000000000..67cbc46e5 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c @@ -0,0 +1,79 @@ +/** @file
+ PEI Services Table Pointer Library.
+
+ This library is used for PEIM which does executed from flash device directly but
+ executed in memory.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiPei.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
+
+/**
+ Caches a pointer PEI Services Table.
+
+ Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer
+ in a platform specific manner.
+
+ If PeiServicesTablePointer is NULL, then ASSERT().
+
+ @param PeiServicesTablePointer The address of PeiServices pointer.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointer (
+ IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
+ )
+{
+ ArmWriteTpidrurw((UINTN)PeiServicesTablePointer);
+}
+
+/**
+ Retrieves the cached value of the PEI Services Table pointer.
+
+ Returns the cached value of the PEI Services Table pointer in a CPU specific manner
+ as specified in the CPU binding section of the Platform Initialization Pre-EFI
+ Initialization Core Interface Specification.
+
+ If the cached PEI Services Table pointer is NULL, then ASSERT().
+
+ @return The pointer to PeiServices.
+
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointer (
+ VOID
+ )
+{
+ return (CONST EFI_PEI_SERVICES **)ArmReadTpidrurw();
+}
+
+/**
+Perform CPU specific actions required to migrate the PEI Services Table
+pointer from temporary RAM to permanent RAM.
+
+For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
+immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+a dedicated CPU register. This means that there is no memory storage
+associated with storing the PEI Services Table pointer, so no additional
+migration actions are required for Itanium or ARM CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer(
+VOID
+)
+{
+ return;
+}
diff --git a/roms/edk2/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf b/roms/edk2/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf new file mode 100644 index 000000000..6e6de9917 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf @@ -0,0 +1,40 @@ +## @file
+# Instance of PEI Services Table Pointer Library using global variable for the table pointer.
+#
+# PEI Services Table Pointer Library implementation that retrieves a pointer to the
+# PEI Services Table from a global variable. Not available to modules that execute from
+# read-only memory.
+#
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiServicesTablePointerLib
+ FILE_GUID = C3C9C4ED-EB8A-4548-BE1B-ABB0B6F35B1E
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PeiServicesTablePointerLib|PEIM PEI_CORE SEC
+
+#
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)
+#
+
+[Sources]
+ PeiServicesTablePointer.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ ArmLib
+ DebugLib
+
+[Pcd]
+
diff --git a/roms/edk2/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c b/roms/edk2/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c new file mode 100644 index 000000000..9905cad22 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c @@ -0,0 +1,866 @@ +/** @file
+ Implementation for PlatformBootManagerLib library class interfaces.
+
+ Copyright (C) 2015-2016, Red Hat, Inc.
+ Copyright (c) 2014 - 2019, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <IndustryStandard/Pci22.h>
+#include <Library/BootLogoLib.h>
+#include <Library/CapsuleLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/HobLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootManagerLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Protocol/DevicePath.h>
+#include <Protocol/EsrtManagement.h>
+#include <Protocol/GraphicsOutput.h>
+#include <Protocol/LoadedImage.h>
+#include <Protocol/NonDiscoverableDevice.h>
+#include <Protocol/PciIo.h>
+#include <Protocol/PciRootBridgeIo.h>
+#include <Protocol/PlatformBootManager.h>
+#include <Guid/EventGroup.h>
+#include <Guid/NonDiscoverableDevice.h>
+#include <Guid/TtyTerm.h>
+#include <Guid/SerialPortLibVendor.h>
+
+#include "PlatformBm.h"
+
+#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >> 8) }
+
+#pragma pack (1)
+typedef struct {
+ VENDOR_DEVICE_PATH SerialDxe;
+ UART_DEVICE_PATH Uart;
+ VENDOR_DEFINED_DEVICE_PATH TermType;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} PLATFORM_SERIAL_CONSOLE;
+#pragma pack ()
+
+STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
+ //
+ // VENDOR_DEVICE_PATH SerialDxe
+ //
+ {
+ { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) },
+ EDKII_SERIAL_PORT_LIB_VENDOR_GUID
+ },
+
+ //
+ // UART_DEVICE_PATH Uart
+ //
+ {
+ { MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
+ 0, // Reserved
+ FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
+ FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits
+ FixedPcdGet8 (PcdUartDefaultParity), // Parity
+ FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits
+ },
+
+ //
+ // VENDOR_DEFINED_DEVICE_PATH TermType
+ //
+ {
+ {
+ MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
+ DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
+ }
+ //
+ // Guid to be filled in dynamically
+ //
+ },
+
+ //
+ // EFI_DEVICE_PATH_PROTOCOL End
+ //
+ {
+ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+ }
+};
+
+
+#pragma pack (1)
+typedef struct {
+ USB_CLASS_DEVICE_PATH Keyboard;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} PLATFORM_USB_KEYBOARD;
+#pragma pack ()
+
+STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
+ //
+ // USB_CLASS_DEVICE_PATH Keyboard
+ //
+ {
+ {
+ MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
+ DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
+ },
+ 0xFFFF, // VendorId: any
+ 0xFFFF, // ProductId: any
+ 3, // DeviceClass: HID
+ 1, // DeviceSubClass: boot
+ 1 // DeviceProtocol: keyboard
+ },
+
+ //
+ // EFI_DEVICE_PATH_PROTOCOL End
+ //
+ {
+ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+ }
+};
+
+
+/**
+ Check if the handle satisfies a particular condition.
+
+ @param[in] Handle The handle to check.
+ @param[in] ReportText A caller-allocated string passed in for reporting
+ purposes. It must never be NULL.
+
+ @retval TRUE The condition is satisfied.
+ @retval FALSE Otherwise. This includes the case when the condition could not
+ be fully evaluated due to an error.
+**/
+typedef
+BOOLEAN
+(EFIAPI *FILTER_FUNCTION) (
+ IN EFI_HANDLE Handle,
+ IN CONST CHAR16 *ReportText
+ );
+
+
+/**
+ Process a handle.
+
+ @param[in] Handle The handle to process.
+ @param[in] ReportText A caller-allocated string passed in for reporting
+ purposes. It must never be NULL.
+**/
+typedef
+VOID
+(EFIAPI *CALLBACK_FUNCTION) (
+ IN EFI_HANDLE Handle,
+ IN CONST CHAR16 *ReportText
+ );
+
+/**
+ Locate all handles that carry the specified protocol, filter them with a
+ callback function, and pass each handle that passes the filter to another
+ callback.
+
+ @param[in] ProtocolGuid The protocol to look for.
+
+ @param[in] Filter The filter function to pass each handle to. If this
+ parameter is NULL, then all handles are processed.
+
+ @param[in] Process The callback function to pass each handle to that
+ clears the filter.
+**/
+STATIC
+VOID
+FilterAndProcess (
+ IN EFI_GUID *ProtocolGuid,
+ IN FILTER_FUNCTION Filter OPTIONAL,
+ IN CALLBACK_FUNCTION Process
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *Handles;
+ UINTN NoHandles;
+ UINTN Idx;
+
+ Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
+ NULL /* SearchKey */, &NoHandles, &Handles);
+ if (EFI_ERROR (Status)) {
+ //
+ // This is not an error, just an informative condition.
+ //
+ DEBUG ((EFI_D_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
+ Status));
+ return;
+ }
+
+ ASSERT (NoHandles > 0);
+ for (Idx = 0; Idx < NoHandles; ++Idx) {
+ CHAR16 *DevicePathText;
+ STATIC CHAR16 Fallback[] = L"<device path unavailable>";
+
+ //
+ // The ConvertDevicePathToText() function handles NULL input transparently.
+ //
+ DevicePathText = ConvertDevicePathToText (
+ DevicePathFromHandle (Handles[Idx]),
+ FALSE, // DisplayOnly
+ FALSE // AllowShortcuts
+ );
+ if (DevicePathText == NULL) {
+ DevicePathText = Fallback;
+ }
+
+ if (Filter == NULL || Filter (Handles[Idx], DevicePathText)) {
+ Process (Handles[Idx], DevicePathText);
+ }
+
+ if (DevicePathText != Fallback) {
+ FreePool (DevicePathText);
+ }
+ }
+ gBS->FreePool (Handles);
+}
+
+
+/**
+ This FILTER_FUNCTION checks if a handle corresponds to a PCI display device.
+**/
+STATIC
+BOOLEAN
+EFIAPI
+IsPciDisplay (
+ IN EFI_HANDLE Handle,
+ IN CONST CHAR16 *ReportText
+ )
+{
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ PCI_TYPE00 Pci;
+
+ Status = gBS->HandleProtocol (Handle, &gEfiPciIoProtocolGuid,
+ (VOID**)&PciIo);
+ if (EFI_ERROR (Status)) {
+ //
+ // This is not an error worth reporting.
+ //
+ return FALSE;
+ }
+
+ Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */,
+ sizeof Pci / sizeof (UINT32), &Pci);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status));
+ return FALSE;
+ }
+
+ return IS_PCI_DISPLAY (&Pci);
+}
+
+
+/**
+ This FILTER_FUNCTION checks if a handle corresponds to a non-discoverable
+ USB host controller.
+**/
+STATIC
+BOOLEAN
+EFIAPI
+IsUsbHost (
+ IN EFI_HANDLE Handle,
+ IN CONST CHAR16 *ReportText
+ )
+{
+ NON_DISCOVERABLE_DEVICE *Device;
+ EFI_STATUS Status;
+
+ Status = gBS->HandleProtocol (Handle,
+ &gEdkiiNonDiscoverableDeviceProtocolGuid,
+ (VOID **)&Device);
+ if (EFI_ERROR (Status)) {
+ return FALSE;
+ }
+
+ if (CompareGuid (Device->Type, &gEdkiiNonDiscoverableUhciDeviceGuid) ||
+ CompareGuid (Device->Type, &gEdkiiNonDiscoverableEhciDeviceGuid) ||
+ CompareGuid (Device->Type, &gEdkiiNonDiscoverableXhciDeviceGuid)) {
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/**
+ This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking
+ the matching driver to produce all first-level child handles.
+**/
+STATIC
+VOID
+EFIAPI
+Connect (
+ IN EFI_HANDLE Handle,
+ IN CONST CHAR16 *ReportText
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->ConnectController (
+ Handle, // ControllerHandle
+ NULL, // DriverImageHandle
+ NULL, // RemainingDevicePath -- produce all children
+ FALSE // Recursive
+ );
+ DEBUG ((EFI_ERROR (Status) ? EFI_D_ERROR : EFI_D_VERBOSE, "%a: %s: %r\n",
+ __FUNCTION__, ReportText, Status));
+}
+
+
+/**
+ This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the
+ handle, and adds it to ConOut and ErrOut.
+**/
+STATIC
+VOID
+EFIAPI
+AddOutput (
+ IN EFI_HANDLE Handle,
+ IN CONST CHAR16 *ReportText
+ )
+{
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ DevicePath = DevicePathFromHandle (Handle);
+ if (DevicePath == NULL) {
+ DEBUG ((EFI_D_ERROR, "%a: %s: handle %p: device path not found\n",
+ __FUNCTION__, ReportText, Handle));
+ return;
+ }
+
+ Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__,
+ ReportText, Status));
+ return;
+ }
+
+ Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__,
+ ReportText, Status));
+ return;
+ }
+
+ DEBUG ((EFI_D_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__,
+ ReportText));
+}
+
+STATIC
+VOID
+PlatformRegisterFvBootOption (
+ CONST EFI_GUID *FileGuid,
+ CHAR16 *Description,
+ UINT32 Attributes,
+ EFI_INPUT_KEY *Key
+ )
+{
+ EFI_STATUS Status;
+ INTN OptionIndex;
+ EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
+ EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
+ UINTN BootOptionCount;
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ Status = gBS->HandleProtocol (
+ gImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ (VOID **) &LoadedImage
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);
+ DevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle);
+ ASSERT (DevicePath != NULL);
+ DevicePath = AppendDevicePathNode (
+ DevicePath,
+ (EFI_DEVICE_PATH_PROTOCOL *) &FileNode
+ );
+ ASSERT (DevicePath != NULL);
+
+ Status = EfiBootManagerInitializeLoadOption (
+ &NewOption,
+ LoadOptionNumberUnassigned,
+ LoadOptionTypeBoot,
+ Attributes,
+ Description,
+ DevicePath,
+ NULL,
+ 0
+ );
+ ASSERT_EFI_ERROR (Status);
+ FreePool (DevicePath);
+
+ BootOptions = EfiBootManagerGetLoadOptions (
+ &BootOptionCount, LoadOptionTypeBoot
+ );
+
+ OptionIndex = EfiBootManagerFindLoadOption (
+ &NewOption, BootOptions, BootOptionCount
+ );
+
+ if (OptionIndex == -1) {
+ Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN);
+ ASSERT_EFI_ERROR (Status);
+ Status = EfiBootManagerAddKeyOptionVariable (NULL,
+ (UINT16)NewOption.OptionNumber, 0, Key, NULL);
+ ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
+ }
+ EfiBootManagerFreeLoadOption (&NewOption);
+ EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
+}
+
+
+STATIC
+VOID
+GetPlatformOptions (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_BOOT_MANAGER_LOAD_OPTION *CurrentBootOptions;
+ EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
+ EFI_INPUT_KEY *BootKeys;
+ PLATFORM_BOOT_MANAGER_PROTOCOL *PlatformBootManager;
+ UINTN CurrentBootOptionCount;
+ UINTN Index;
+ UINTN BootCount;
+
+ Status = gBS->LocateProtocol (&gPlatformBootManagerProtocolGuid, NULL,
+ (VOID **)&PlatformBootManager);
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+ Status = PlatformBootManager->GetPlatformBootOptionsAndKeys (
+ &BootCount,
+ &BootOptions,
+ &BootKeys
+ );
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+ //
+ // Fetch the existent boot options. If there are none, CurrentBootCount
+ // will be zeroed.
+ //
+ CurrentBootOptions = EfiBootManagerGetLoadOptions (
+ &CurrentBootOptionCount,
+ LoadOptionTypeBoot
+ );
+ //
+ // Process the platform boot options.
+ //
+ for (Index = 0; Index < BootCount; Index++) {
+ INTN Match;
+ UINTN BootOptionNumber;
+
+ //
+ // If there are any preexistent boot options, and the subject platform boot
+ // option is already among them, then don't try to add it. Just get its
+ // assigned boot option number so we can associate a hotkey with it. Note
+ // that EfiBootManagerFindLoadOption() deals fine with (CurrentBootOptions
+ // == NULL) if (CurrentBootCount == 0).
+ //
+ Match = EfiBootManagerFindLoadOption (
+ &BootOptions[Index],
+ CurrentBootOptions,
+ CurrentBootOptionCount
+ );
+ if (Match >= 0) {
+ BootOptionNumber = CurrentBootOptions[Match].OptionNumber;
+ } else {
+ //
+ // Add the platform boot options as a new one, at the end of the boot
+ // order. Note that if the platform provided this boot option with an
+ // unassigned option number, then the below function call will assign a
+ // number.
+ //
+ Status = EfiBootManagerAddLoadOptionVariable (
+ &BootOptions[Index],
+ MAX_UINTN
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: failed to register \"%s\": %r\n",
+ __FUNCTION__, BootOptions[Index].Description, Status));
+ continue;
+ }
+ BootOptionNumber = BootOptions[Index].OptionNumber;
+ }
+
+ //
+ // Register a hotkey with the boot option, if requested.
+ //
+ if (BootKeys[Index].UnicodeChar == L'\0') {
+ continue;
+ }
+
+ Status = EfiBootManagerAddKeyOptionVariable (
+ NULL,
+ BootOptionNumber,
+ 0,
+ &BootKeys[Index],
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: failed to register hotkey for \"%s\": %r\n",
+ __FUNCTION__, BootOptions[Index].Description, Status));
+ }
+ }
+ EfiBootManagerFreeLoadOptions (CurrentBootOptions, CurrentBootOptionCount);
+ EfiBootManagerFreeLoadOptions (BootOptions, BootCount);
+ FreePool (BootKeys);
+}
+
+STATIC
+VOID
+PlatformRegisterOptionsAndKeys (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_INPUT_KEY Enter;
+ EFI_INPUT_KEY F2;
+ EFI_INPUT_KEY Esc;
+ EFI_BOOT_MANAGER_LOAD_OPTION BootOption;
+
+ GetPlatformOptions ();
+
+ //
+ // Register ENTER as CONTINUE key
+ //
+ Enter.ScanCode = SCAN_NULL;
+ Enter.UnicodeChar = CHAR_CARRIAGE_RETURN;
+ Status = EfiBootManagerRegisterContinueKeyOption (0, &Enter, NULL);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Map F2 and ESC to Boot Manager Menu
+ //
+ F2.ScanCode = SCAN_F2;
+ F2.UnicodeChar = CHAR_NULL;
+ Esc.ScanCode = SCAN_ESC;
+ Esc.UnicodeChar = CHAR_NULL;
+ Status = EfiBootManagerGetBootManagerMenu (&BootOption);
+ ASSERT_EFI_ERROR (Status);
+ Status = EfiBootManagerAddKeyOptionVariable (
+ NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL
+ );
+ ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
+ Status = EfiBootManagerAddKeyOptionVariable (
+ NULL, (UINT16) BootOption.OptionNumber, 0, &Esc, NULL
+ );
+ ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
+}
+
+
+//
+// BDS Platform Functions
+//
+/**
+ Do the platform init, can be customized by OEM/IBV
+ Possible things that can be done in PlatformBootManagerBeforeConsole:
+ > Update console variable: 1. include hot-plug devices;
+ > 2. Clear ConIn and add SOL for AMT
+ > Register new Driver#### or Boot####
+ > Register new Key####: e.g.: F12
+ > Signal ReadyToLock event
+ > Authentication action: 1. connect Auth devices;
+ > 2. Identify auto logon user.
+**/
+VOID
+EFIAPI
+PlatformBootManagerBeforeConsole (
+ VOID
+ )
+{
+ //
+ // Signal EndOfDxe PI Event
+ //
+ EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);
+
+ //
+ // Dispatch deferred images after EndOfDxe event.
+ //
+ EfiBootManagerDispatchDeferredImages ();
+
+ //
+ // Locate the PCI root bridges and make the PCI bus driver connect each,
+ // non-recursively. This will produce a number of child handles with PciIo on
+ // them.
+ //
+ FilterAndProcess (&gEfiPciRootBridgeIoProtocolGuid, NULL, Connect);
+
+ //
+ // Find all display class PCI devices (using the handles from the previous
+ // step), and connect them non-recursively. This should produce a number of
+ // child handles with GOPs on them.
+ //
+ FilterAndProcess (&gEfiPciIoProtocolGuid, IsPciDisplay, Connect);
+
+ //
+ // Now add the device path of all handles with GOP on them to ConOut and
+ // ErrOut.
+ //
+ FilterAndProcess (&gEfiGraphicsOutputProtocolGuid, NULL, AddOutput);
+
+ //
+ // The core BDS code connects short-form USB device paths by explicitly
+ // looking for handles with PCI I/O installed, and checking the PCI class
+ // code whether it matches the one for a USB host controller. This means
+ // non-discoverable USB host controllers need to have the non-discoverable
+ // PCI driver attached first.
+ //
+ FilterAndProcess (&gEdkiiNonDiscoverableDeviceProtocolGuid, IsUsbHost, Connect);
+
+ //
+ // Add the hardcoded short-form USB keyboard device path to ConIn.
+ //
+ EfiBootManagerUpdateConsoleVariable (ConIn,
+ (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL);
+
+ //
+ // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
+ //
+ STATIC_ASSERT (FixedPcdGet8 (PcdDefaultTerminalType) == 4,
+ "PcdDefaultTerminalType must be TTYTERM");
+ STATIC_ASSERT (FixedPcdGet8 (PcdUartDefaultParity) != 0,
+ "PcdUartDefaultParity must be set to an actual value, not 'default'");
+ STATIC_ASSERT (FixedPcdGet8 (PcdUartDefaultStopBits) != 0,
+ "PcdUartDefaultStopBits must be set to an actual value, not 'default'");
+
+ CopyGuid (&mSerialConsole.TermType.Guid, &gEfiTtyTermGuid);
+
+ EfiBootManagerUpdateConsoleVariable (ConIn,
+ (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+ EfiBootManagerUpdateConsoleVariable (ConOut,
+ (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+ EfiBootManagerUpdateConsoleVariable (ErrOut,
+ (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+
+ //
+ // Register platform-specific boot options and keyboard shortcuts.
+ //
+ PlatformRegisterOptionsAndKeys ();
+}
+
+STATIC
+VOID
+HandleCapsules (
+ VOID
+ )
+{
+ ESRT_MANAGEMENT_PROTOCOL *EsrtManagement;
+ EFI_PEI_HOB_POINTERS HobPointer;
+ EFI_CAPSULE_HEADER *CapsuleHeader;
+ BOOLEAN NeedReset;
+ EFI_STATUS Status;
+
+ DEBUG ((DEBUG_INFO, "%a: processing capsules ...\n", __FUNCTION__));
+
+ Status = gBS->LocateProtocol (&gEsrtManagementProtocolGuid, NULL,
+ (VOID **)&EsrtManagement);
+ if (!EFI_ERROR (Status)) {
+ EsrtManagement->SyncEsrtFmp ();
+ }
+
+ //
+ // Find all capsule images from hob
+ //
+ HobPointer.Raw = GetHobList ();
+ NeedReset = FALSE;
+ while ((HobPointer.Raw = GetNextHob (EFI_HOB_TYPE_UEFI_CAPSULE,
+ HobPointer.Raw)) != NULL) {
+ CapsuleHeader = (VOID *)(UINTN)HobPointer.Capsule->BaseAddress;
+
+ Status = ProcessCapsuleImage (CapsuleHeader);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: failed to process capsule %p - %r\n",
+ __FUNCTION__, CapsuleHeader, Status));
+ return;
+ }
+
+ NeedReset = TRUE;
+ HobPointer.Raw = GET_NEXT_HOB (HobPointer);
+ }
+
+ if (NeedReset) {
+ DEBUG ((DEBUG_WARN, "%a: capsule update successful, resetting ...\n",
+ __FUNCTION__));
+
+ gRT->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL);
+ CpuDeadLoop();
+ }
+}
+
+
+#define VERSION_STRING_PREFIX L"Tianocore/EDK2 firmware version "
+
+/**
+ Do the platform specific action after the console is ready
+ Possible things that can be done in PlatformBootManagerAfterConsole:
+ > Console post action:
+ > Dynamically switch output mode from 100x31 to 80x25 for certain scenario
+ > Signal console ready platform customized event
+ > Run diagnostics like memory testing
+ > Connect certain devices
+ > Dispatch additional option roms
+ > Special boot: e.g.: USB boot, enter UI
+**/
+VOID
+EFIAPI
+PlatformBootManagerAfterConsole (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;
+ UINTN FirmwareVerLength;
+ UINTN PosX;
+ UINTN PosY;
+ EFI_INPUT_KEY Key;
+
+ FirmwareVerLength = StrLen (PcdGetPtr (PcdFirmwareVersionString));
+
+ //
+ // Show the splash screen.
+ //
+ Status = BootLogoEnableLogo ();
+ if (EFI_ERROR (Status)) {
+ if (FirmwareVerLength > 0) {
+ Print (VERSION_STRING_PREFIX L"%s\n",
+ PcdGetPtr (PcdFirmwareVersionString));
+ }
+ Print (L"Press ESCAPE for boot options ");
+ } else if (FirmwareVerLength > 0) {
+ Status = gBS->HandleProtocol (gST->ConsoleOutHandle,
+ &gEfiGraphicsOutputProtocolGuid, (VOID **)&GraphicsOutput);
+ if (!EFI_ERROR (Status)) {
+ PosX = (GraphicsOutput->Mode->Info->HorizontalResolution -
+ (StrLen (VERSION_STRING_PREFIX) + FirmwareVerLength) *
+ EFI_GLYPH_WIDTH) / 2;
+ PosY = 0;
+
+ PrintXY (PosX, PosY, NULL, NULL, VERSION_STRING_PREFIX L"%s",
+ PcdGetPtr (PcdFirmwareVersionString));
+ }
+ }
+
+ //
+ // On ARM, there is currently no reason to use the phased capsule
+ // update approach where some capsules are dispatched before EndOfDxe
+ // and some are dispatched after. So just handle all capsules here,
+ // when the console is up and we can actually give the user some
+ // feedback about what is going on.
+ //
+ HandleCapsules ();
+
+ //
+ // Register UEFI Shell
+ //
+ Key.ScanCode = SCAN_NULL;
+ Key.UnicodeChar = L's';
+ PlatformRegisterFvBootOption (&gUefiShellFileGuid, L"UEFI Shell", 0, &Key);
+}
+
+/**
+ This function is called each second during the boot manager waits the
+ timeout.
+
+ @param TimeoutRemain The remaining timeout.
+**/
+VOID
+EFIAPI
+PlatformBootManagerWaitCallback (
+ UINT16 TimeoutRemain
+ )
+{
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION Black;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION White;
+ UINT16 Timeout;
+ EFI_STATUS Status;
+
+ Timeout = PcdGet16 (PcdPlatformBootTimeOut);
+
+ Black.Raw = 0x00000000;
+ White.Raw = 0x00FFFFFF;
+
+ Status = BootLogoUpdateProgress (
+ White.Pixel,
+ Black.Pixel,
+ L"Press ESCAPE for boot options",
+ White.Pixel,
+ (Timeout - TimeoutRemain) * 100 / Timeout,
+ 0
+ );
+ if (EFI_ERROR (Status)) {
+ Print (L".");
+ }
+}
+
+/**
+ The function is called when no boot option could be launched,
+ including platform recovery options and options pointing to applications
+ built into firmware volumes.
+
+ If this function returns, BDS attempts to enter an infinite loop.
+**/
+VOID
+EFIAPI
+PlatformBootManagerUnableToBoot (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_BOOT_MANAGER_LOAD_OPTION BootManagerMenu;
+ EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
+ UINTN OldBootOptionCount;
+ UINTN NewBootOptionCount;
+
+ //
+ // Record the total number of boot configured boot options
+ //
+ BootOptions = EfiBootManagerGetLoadOptions (&OldBootOptionCount,
+ LoadOptionTypeBoot);
+ EfiBootManagerFreeLoadOptions (BootOptions, OldBootOptionCount);
+
+ //
+ // Connect all devices, and regenerate all boot options
+ //
+ EfiBootManagerConnectAll ();
+ EfiBootManagerRefreshAllBootOption ();
+
+ //
+ // Record the updated number of boot configured boot options
+ //
+ BootOptions = EfiBootManagerGetLoadOptions (&NewBootOptionCount,
+ LoadOptionTypeBoot);
+ EfiBootManagerFreeLoadOptions (BootOptions, NewBootOptionCount);
+
+ //
+ // If the number of configured boot options has changed, reboot
+ // the system so the new boot options will be taken into account
+ // while executing the ordinary BDS bootflow sequence.
+ //
+ if (NewBootOptionCount != OldBootOptionCount) {
+ DEBUG ((DEBUG_WARN, "%a: rebooting after refreshing all boot options\n",
+ __FUNCTION__));
+ gRT->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL);
+ }
+
+ Status = EfiBootManagerGetBootManagerMenu (&BootManagerMenu);
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ for (;;) {
+ EfiBootManagerBoot (&BootManagerMenu);
+ }
+}
diff --git a/roms/edk2/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h b/roms/edk2/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h new file mode 100644 index 000000000..0bb3645dd --- /dev/null +++ b/roms/edk2/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h @@ -0,0 +1,53 @@ +/** @file
+ Head file for BDS Platform specific code
+
+ Copyright (C) 2015-2016, Red Hat, Inc.
+ Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PLATFORM_BM_H_
+#define _PLATFORM_BM_H_
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+
+/**
+ Use SystemTable Conout to stop video based Simple Text Out consoles from
+ going to the video device. Put up LogoFile on every video device that is a
+ console.
+
+ @param[in] LogoFile File name of logo to display on the center of the
+ screen.
+
+ @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo
+ displayed.
+ @retval EFI_UNSUPPORTED Logo not found
+**/
+EFI_STATUS
+EnableQuietBoot (
+ IN EFI_GUID *LogoFile
+ );
+
+/**
+ Use SystemTable Conout to turn on video based Simple Text Out consoles. The
+ Simple Text Out screens will now be synced up with all non video output
+ devices
+
+ @retval EFI_SUCCESS UGA devices are back in text mode and synced up.
+**/
+EFI_STATUS
+DisableQuietBoot (
+ VOID
+ );
+
+#endif // _PLATFORM_BM_H_
diff --git a/roms/edk2/ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/roms/edk2/ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf new file mode 100644 index 000000000..2f726d117 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf @@ -0,0 +1,87 @@ +## @file
+# Implementation for PlatformBootManagerLib library class interfaces.
+#
+# Copyright (C) 2015-2016, Red Hat, Inc.
+# Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
+# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PlatformBootManagerLib
+ FILE_GUID = 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PlatformBootManagerLib|DXE_DRIVER
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ARM AARCH64
+#
+
+[Sources]
+ PlatformBm.c
+ PlatformBm.h
+
+[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ ShellPkg/ShellPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ BootLogoLib
+ CapsuleLib
+ DebugLib
+ DevicePathLib
+ DxeServicesLib
+ HobLib
+ MemoryAllocationLib
+ PcdLib
+ PrintLib
+ UefiBootManagerLib
+ UefiBootServicesTableLib
+ UefiLib
+ UefiRuntimeServicesTableLib
+
+[FeaturePcd]
+ gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport
+
+[FixedPcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
+ gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType
+
+[Pcd]
+ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
+
+[Guids]
+ gEdkiiNonDiscoverableEhciDeviceGuid
+ gEdkiiNonDiscoverableUhciDeviceGuid
+ gEdkiiNonDiscoverableXhciDeviceGuid
+ gEfiFileInfoGuid
+ gEfiFileSystemInfoGuid
+ gEfiFileSystemVolumeLabelInfoIdGuid
+ gEfiEndOfDxeEventGroupGuid
+ gEfiTtyTermGuid
+ gUefiShellFileGuid
+
+[Protocols]
+ gEdkiiNonDiscoverableDeviceProtocolGuid
+ gEfiDevicePathProtocolGuid
+ gEfiGraphicsOutputProtocolGuid
+ gEfiLoadedImageProtocolGuid
+ gEfiPciRootBridgeIoProtocolGuid
+ gEfiSimpleFileSystemProtocolGuid
+ gEsrtManagementProtocolGuid
+ gPlatformBootManagerProtocolGuid
diff --git a/roms/edk2/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c b/roms/edk2/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c new file mode 100644 index 000000000..80e531921 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c @@ -0,0 +1,150 @@ +/**@file
+
+Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+Portions copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+Portions copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiDxe.h>
+#include <Library/PeCoffLib.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PeCoffExtraActionLib.h>
+#include <Library/SemihostLib.h>
+#include <Library/PrintLib.h>
+
+/**
+ Append string to debugger script file, create file if needed.
+
+ This library can show up in multiple places so we need to append the file every time we write to it.
+ For example Sec can use this to load the DXE core, and the DXE core would use this to load all the
+ other modules. So we have two instances of the library in the system.
+
+ @param Buffer Buffer to write to file.
+ @param Length Length of Buffer in bytes.
+**/
+VOID
+WriteStringToFile (
+ IN VOID *Buffer,
+ IN UINT32 Length
+ )
+{
+ // Working around and issue with the code that is commented out. For now send it to the console.
+ // You can copy the console into a file and source the file as a script and you get symbols.
+ // This gets you all the symbols except for SEC. To get SEC symbols you need to copy the
+ // debug print in the SEC into the debugger manually
+ SemihostWriteString (Buffer);
+/*
+ I'm currently having issues with this code crashing the debugger. Seems like it should work.
+
+ UINT32 SemihostHandle;
+ UINT32 SemihostMode = SEMIHOST_FILE_MODE_WRITE | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE;
+
+ SemihostFileOpen ("c:\rvi_symbols.inc", SemihostMode, &SemihostHandle);
+ SemihostFileWrite (SemihostHandle, &Length, Buffer);
+ SemihostFileClose (SemihostHandle);
+ */
+}
+
+
+/**
+ If the build is done on cygwin the paths are cygpaths.
+ /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert
+ them to work with RVD commands
+
+ @param Name Path to convert if needed
+
+**/
+CHAR8 *
+DeCygwinPathIfNeeded (
+ IN CHAR8 *Name
+ )
+{
+ CHAR8 *Ptr;
+ UINTN Index;
+ UINTN Len;
+
+ Ptr = AsciiStrStr (Name, "/cygdrive/");
+ if (Ptr == NULL) {
+ return Name;
+ }
+
+ Len = AsciiStrLen (Ptr);
+
+ // convert "/cygdrive" to spaces
+ for (Index = 0; Index < 9; Index++) {
+ Ptr[Index] = ' ';
+ }
+
+ // convert /c to c:
+ Ptr[9] = Ptr[10];
+ Ptr[10] = ':';
+
+ // switch path separators
+ for (Index = 11; Index < Len; Index++) {
+ if (Ptr[Index] == '/') {
+ Ptr[Index] = '\\' ;
+ }
+ }
+
+ return Name;
+}
+
+
+/**
+ Performs additional actions after a PE/COFF image has been loaded and relocated.
+
+ If ImageContext is NULL, then ASSERT().
+
+ @param ImageContext Pointer to the image context structure that describes the
+ PE/COFF image that has already been loaded and relocated.
+
+**/
+VOID
+EFIAPI
+PeCoffLoaderRelocateImageExtraAction (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
+ )
+{
+ CHAR8 Buffer[256];
+
+#if (__ARMCC_VERSION < 500000)
+ AsciiSPrint (Buffer, sizeof(Buffer), "load /a /ni /np \"%a\" &0x%08x\n", ImageContext->PdbPointer, (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders));
+#else
+ AsciiSPrint (Buffer, sizeof(Buffer), "add-symbol-file %a 0x%08x\n", ImageContext->PdbPointer, (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders));
+#endif
+ DeCygwinPathIfNeeded (&Buffer[16]);
+
+ WriteStringToFile (Buffer, AsciiStrSize (Buffer));
+}
+
+
+
+/**
+ Performs additional actions just before a PE/COFF image is unloaded. Any resources
+ that were allocated by PeCoffLoaderRelocateImageExtraAction() must be freed.
+
+ If ImageContext is NULL, then ASSERT().
+
+ @param ImageContext Pointer to the image context structure that describes the
+ PE/COFF image that is being unloaded.
+
+**/
+VOID
+EFIAPI
+PeCoffLoaderUnloadImageExtraAction (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
+ )
+{
+ CHAR8 Buffer[256];
+
+ AsciiSPrint (Buffer, sizeof(Buffer), "unload symbols_only \"%a\"\n", ImageContext->PdbPointer);
+ DeCygwinPathIfNeeded (Buffer);
+
+ WriteStringToFile (Buffer, AsciiStrSize (Buffer));
+}
diff --git a/roms/edk2/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf b/roms/edk2/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf new file mode 100644 index 000000000..6b7ac8750 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf @@ -0,0 +1,35 @@ +#/** @file
+# PeCoff extra action library for DXE phase that run Unix emulator.
+#
+# Lib to provide memory journal status code reporting Routines
+# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = RvdUnixPeCoffExtraActionLib
+ FILE_GUID = 5EDEB7E7-EA55-4E92-8216-335AC98A3B11
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PeCoffExtraActionLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ARM
+#
+
+[Sources.common]
+ RvdPeCoffExtraActionLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ SemihostLib
diff --git a/roms/edk2/ArmPkg/Library/SemiHostingDebugLib/DebugLib.c b/roms/edk2/ArmPkg/Library/SemiHostingDebugLib/DebugLib.c new file mode 100644 index 000000000..ae762d8be --- /dev/null +++ b/roms/edk2/ArmPkg/Library/SemiHostingDebugLib/DebugLib.c @@ -0,0 +1,336 @@ +/** @file
+ UEFI Debug Library that uses PrintLib to send messages to STDERR.
+
+ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+ Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#include <Uefi.h>
+#include <Library/DebugLib.h>
+#include <Library/PrintLib.h>
+#include <Library/PcdLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/SemihostLib.h>
+
+//
+// Define the maximum debug and assert message length that this library supports
+//
+#define MAX_DEBUG_MESSAGE_LENGTH 0x100
+
+//
+// VA_LIST can not initialize to NULL for all compiler, so we use this to
+// indicate a null VA_LIST
+//
+VA_LIST mVaListNull;
+
+/**
+
+ Prints a debug message to the debug output device if the specified error level is enabled.
+
+ If any bit in ErrorLevel is also set in PcdDebugPrintErrorLevel, then print
+ the message specified by Format and the associated variable argument list to
+ the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+
+**/
+VOID
+EFIAPI
+DebugPrint (
+ IN UINTN ErrorLevel,
+ IN CONST CHAR8 *Format,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ VA_START (Marker, Format);
+ DebugVPrint (ErrorLevel, Format, Marker);
+ VA_END (Marker);
+}
+
+
+/**
+ Prints a debug message to the debug output device if the specified
+ error level is enabled base on Null-terminated format string and a
+ VA_LIST argument list or a BASE_LIST argument list.
+
+ If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
+ GetDebugPrintErrorLevel (), then print the message specified by Format and
+ the associated variable argument list to the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+ @param VaListMarker VA_LIST marker for the variable argument list.
+ @param BaseListMarker BASE_LIST marker for the variable argument list.
+
+**/
+VOID
+DebugPrintMarker (
+ IN UINTN ErrorLevel,
+ IN CONST CHAR8 *Format,
+ IN VA_LIST VaListMarker,
+ IN BASE_LIST BaseListMarker
+ )
+{
+ CHAR8 AsciiBuffer[MAX_DEBUG_MESSAGE_LENGTH];
+
+ //
+ // If Format is NULL, then ASSERT().
+ //
+ ASSERT (Format != NULL);
+
+ //
+ // Check driver debug mask value and global mask
+ //
+ if ((ErrorLevel & PcdGet32(PcdDebugPrintErrorLevel)) == 0) {
+ return;
+ }
+
+ //
+ // Convert the DEBUG() message to a Unicode String
+ //
+ if (BaseListMarker == NULL) {
+ AsciiVSPrint (AsciiBuffer, sizeof (AsciiBuffer), Format, VaListMarker);
+ } else {
+ AsciiBSPrint (AsciiBuffer, sizeof (AsciiBuffer), Format, BaseListMarker);
+ }
+
+ SemihostWriteString (AsciiBuffer);
+}
+
+
+/**
+ Prints a debug message to the debug output device if the specified
+ error level is enabled.
+
+ If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
+ GetDebugPrintErrorLevel (), then print the message specified by Format and
+ the associated variable argument list to the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+ @param VaListMarker VA_LIST marker for the variable argument list.
+
+**/
+VOID
+EFIAPI
+DebugVPrint (
+ IN UINTN ErrorLevel,
+ IN CONST CHAR8 *Format,
+ IN VA_LIST VaListMarker
+ )
+{
+ DebugPrintMarker (ErrorLevel, Format, VaListMarker, NULL);
+}
+
+
+/**
+ Prints a debug message to the debug output device if the specified
+ error level is enabled.
+ This function use BASE_LIST which would provide a more compatible
+ service than VA_LIST.
+
+ If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
+ GetDebugPrintErrorLevel (), then print the message specified by Format and
+ the associated variable argument list to the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+ @param BaseListMarker BASE_LIST marker for the variable argument list.
+
+**/
+VOID
+EFIAPI
+DebugBPrint (
+ IN UINTN ErrorLevel,
+ IN CONST CHAR8 *Format,
+ IN BASE_LIST BaseListMarker
+ )
+{
+ DebugPrintMarker (ErrorLevel, Format, mVaListNull, BaseListMarker);
+}
+
+
+/**
+
+ Prints an assert message containing a filename, line number, and description.
+ This may be followed by a breakpoint or a dead loop.
+
+ Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
+ to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
+ PcdDebugPropertyMask is set then CpuBreakpoint() is called. Otherwise, if
+ DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugPropertyMask is set then
+ CpuDeadLoop() is called. If neither of these bits are set, then this function
+ returns immediately after the message is printed to the debug output device.
+ DebugAssert() must actively prevent recursion. If DebugAssert() is called while
+ processing another DebugAssert(), then DebugAssert() must return immediately.
+
+ If FileName is NULL, then a <FileName> string of "(NULL) Filename" is printed.
+
+ If Description is NULL, then a <Description> string of "(NULL) Description" is printed.
+
+ @param FileName Pointer to the name of the source file that generated the assert condition.
+ @param LineNumber The line number in the source file that generated the assert condition
+ @param Description Pointer to the description of the assert condition.
+
+**/
+VOID
+EFIAPI
+DebugAssert (
+ IN CONST CHAR8 *FileName,
+ IN UINTN LineNumber,
+ IN CONST CHAR8 *Description
+ )
+{
+ CHAR8 AsciiBuffer[MAX_DEBUG_MESSAGE_LENGTH];
+
+ //
+ // Generate the ASSERT() message in Unicode format
+ //
+ AsciiSPrint (AsciiBuffer, sizeof (AsciiBuffer), "ASSERT %a(%d): %a\n", FileName, LineNumber, Description);
+
+ SemihostWriteString (AsciiBuffer);
+
+ //
+ // Generate a Breakpoint, DeadLoop, or NOP based on PCD settings
+ //
+ if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED) != 0) {
+ CpuBreakpoint ();
+ } else if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED) != 0) {
+ CpuDeadLoop ();
+ }
+}
+
+
+/**
+
+ Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the value specified by
+ PcdDebugClearMemoryValue, and returns Buffer.
+
+ If Buffer is NULL, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill with PcdDebugClearMemoryValue.
+ @param Length Number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+DebugClearMemory (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ //
+ // If Buffer is NULL, then ASSERT().
+ //
+ ASSERT (Buffer != NULL);
+
+ //
+ // SetMem() checks for the ASSERT() condition on Length and returns Buffer
+ //
+ return SetMem (Buffer, Length, PcdGet8(PcdDebugClearMemoryValue));
+}
+
+
+/**
+
+ Returns TRUE if ASSERT() macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
+ PcdDebugPropertyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugPropertyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugPropertyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugAssertEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
+ PcdDebugPropertyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugPropertyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugPropertyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugPrintEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CODE()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdDebugPropertyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugPropertyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugPropertyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugCodeEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of
+ PcdDebugPropertyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugPropertyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugPropertyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugClearMemoryEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0);
+}
diff --git a/roms/edk2/ArmPkg/Library/SemiHostingDebugLib/SemiHostingDebugLib.inf b/roms/edk2/ArmPkg/Library/SemiHostingDebugLib/SemiHostingDebugLib.inf new file mode 100644 index 000000000..71bf20b1c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/SemiHostingDebugLib/SemiHostingDebugLib.inf @@ -0,0 +1,42 @@ +
+#/** @file
+# Debug Library for UEFI drivers
+#
+# Library to abstract Framework extensions that conflict with UEFI 2.0 Specification
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = SemiHostingDebugLib
+ FILE_GUID = 2A8D3FC4-8DB1-4D27-A3F3-780AF03CF848
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = DebugLib|BASE SEC DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER
+
+
+[Sources.common]
+ DebugLib.c
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ BaseLib
+ PcdLib
+ PrintLib
+ SemihostLib
+ DebugLib
+
+[Pcd.common]
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel
+ gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask
+
diff --git a/roms/edk2/ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf b/roms/edk2/ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf new file mode 100644 index 000000000..814dabb9a --- /dev/null +++ b/roms/edk2/ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf @@ -0,0 +1,29 @@ +#/** @file
+# Semihosting serial port lib
+#
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = SemiHostingSerialPortLib
+ FILE_GUID = E9FB2D1E-05D9-421C-8C35-6100BB0093B7
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = SerialPortLib
+
+
+[Sources.common]
+ SerialPortLib.c
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ SemihostLib
diff --git a/roms/edk2/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c b/roms/edk2/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c new file mode 100644 index 000000000..7e5c61fad --- /dev/null +++ b/roms/edk2/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c @@ -0,0 +1,138 @@ +/** @file
+ Serial I/O Port library functions with no library constructor/destructor
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+#include <Library/DebugLib.h>
+#include <Library/SemihostLib.h>
+#include <Library/SerialPortLib.h>
+
+
+/*
+
+ Programmed hardware of Serial port.
+
+ @return Always return EFI_UNSUPPORTED.
+
+**/
+RETURN_STATUS
+EFIAPI
+SerialPortInitialize (
+ VOID
+ )
+{
+ if (SemihostConnectionSupported ()) {
+ return RETURN_SUCCESS;
+ } else {
+ return RETURN_UNSUPPORTED;
+ }
+}
+
+/**
+ Write data to serial device.
+
+ @param Buffer Point of data buffer which need to be writed.
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.
+
+ @retval 0 Write data failed.
+ @retval !0 Actual number of bytes writed to serial device.
+
+**/
+
+#define PRINT_BUFFER_SIZE 512
+#define PRINT_BUFFER_THRESHOLD (PRINT_BUFFER_SIZE - 4)
+
+UINTN
+EFIAPI
+SerialPortWrite (
+ IN UINT8 *Buffer,
+ IN UINTN NumberOfBytes
+)
+{
+ UINT8 PrintBuffer[PRINT_BUFFER_SIZE];
+ UINTN SourceIndex = 0;
+ UINTN DestinationIndex = 0;
+ UINT8 CurrentCharacter;
+
+ while (SourceIndex < NumberOfBytes)
+ {
+ CurrentCharacter = Buffer[SourceIndex++];
+
+ switch (CurrentCharacter)
+ {
+ case '\r':
+ continue;
+
+ case '\n':
+ PrintBuffer[DestinationIndex++] = ' ';
+ // fall through
+
+ default:
+ PrintBuffer[DestinationIndex++] = CurrentCharacter;
+ break;
+ }
+
+ if (DestinationIndex > PRINT_BUFFER_THRESHOLD)
+ {
+ PrintBuffer[DestinationIndex] = '\0';
+ SemihostWriteString ((CHAR8 *) PrintBuffer);
+
+ DestinationIndex = 0;
+ }
+ }
+
+ if (DestinationIndex > 0)
+ {
+ PrintBuffer[DestinationIndex] = '\0';
+ SemihostWriteString ((CHAR8 *) PrintBuffer);
+ }
+
+ return NumberOfBytes;
+}
+
+
+/**
+ Read data from serial device and save the datas in buffer.
+
+ @param Buffer Point of data buffer which need to be writed.
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.
+
+ @retval 0 Read data failed.
+ @retval !0 Actual number of bytes read from serial device.
+
+**/
+UINTN
+EFIAPI
+SerialPortRead (
+ OUT UINT8 *Buffer,
+ IN UINTN NumberOfBytes
+)
+{
+ *Buffer = SemihostReadCharacter ();
+ return 1;
+}
+
+
+
+/**
+ Check to see if any data is available to be read from the debug device.
+
+ @retval TRUE At least one byte of data is available to be read
+ @retval FALSE No data is available to be read
+
+**/
+BOOLEAN
+EFIAPI
+SerialPortPoll (
+ VOID
+ )
+{
+ // Since SemiHosting read character is blocking always say we have a char ready?
+ return SemihostConnectionSupported ();
+}
+
diff --git a/roms/edk2/ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S b/roms/edk2/ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S new file mode 100644 index 000000000..a44307563 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S @@ -0,0 +1,14 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLibV8.h>
+
+ASM_FUNC(GccSemihostCall)
+ hlt #0xf000
+ ret
diff --git a/roms/edk2/ArmPkg/Library/SemihostLib/Arm/GccSemihost.S b/roms/edk2/ArmPkg/Library/SemihostLib/Arm/GccSemihost.S new file mode 100644 index 000000000..d6f81ec2c --- /dev/null +++ b/roms/edk2/ArmPkg/Library/SemihostLib/Arm/GccSemihost.S @@ -0,0 +1,31 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLib.h>
+
+/*
+ Semihosting operation request mechanism
+
+ SVC 0x123456 in ARM state (for all architectures)
+ SVC 0xAB in Thumb state (excluding ARMv7-M)
+ BKPT 0xAB for ARMv7-M (Thumb-2 only)
+
+ R0 - operation type
+ R1 - block containing all other parametes
+
+ lr - must be saved as svc instruction will cause an svc exception and write
+ the svc lr register. That happens to be the one we are using, so we must
+ save it or we will not be able to return.
+ */
+ASM_FUNC(GccSemihostCall)
+ stmfd sp!, {lr}
+ svc #0x123456
+ ldmfd sp!, {lr}
+ bx lr
+
+
diff --git a/roms/edk2/ArmPkg/Library/SemihostLib/SemihostLib.c b/roms/edk2/ArmPkg/Library/SemihostLib/SemihostLib.c new file mode 100644 index 000000000..78b862468 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/SemihostLib/SemihostLib.c @@ -0,0 +1,307 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#include <Base.h>
+
+#include <Library/BaseLib.h>
+#include <Library/SemihostLib.h>
+
+#include "SemihostPrivate.h"
+
+BOOLEAN
+SemihostConnectionSupported (
+ VOID
+ )
+{
+ return SEMIHOST_SUPPORTED;
+}
+
+RETURN_STATUS
+SemihostFileOpen (
+ IN CHAR8 *FileName,
+ IN UINT32 Mode,
+ OUT UINTN *FileHandle
+ )
+{
+ SEMIHOST_FILE_OPEN_BLOCK OpenBlock;
+ INT32 Result;
+
+ if (FileHandle == NULL) {
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ // Remove any leading separator (e.g.: '\'). EFI Shell adds one.
+ if (*FileName == '\\') {
+ FileName++;
+ }
+
+ OpenBlock.FileName = FileName;
+ OpenBlock.Mode = Mode;
+ OpenBlock.NameLength = AsciiStrLen(FileName);
+
+ Result = Semihost_SYS_OPEN(&OpenBlock);
+
+ if (Result == -1) {
+ return RETURN_NOT_FOUND;
+ } else {
+ *FileHandle = Result;
+ return RETURN_SUCCESS;
+ }
+}
+
+RETURN_STATUS
+SemihostFileSeek (
+ IN UINTN FileHandle,
+ IN UINTN Offset
+ )
+{
+ SEMIHOST_FILE_SEEK_BLOCK SeekBlock;
+ INT32 Result;
+
+ SeekBlock.Handle = FileHandle;
+ SeekBlock.Location = Offset;
+
+ Result = Semihost_SYS_SEEK(&SeekBlock);
+
+ // Semihosting does not behave as documented. It returns the offset on
+ // success.
+ if (Result < 0) {
+ return RETURN_ABORTED;
+ } else {
+ return RETURN_SUCCESS;
+ }
+}
+
+RETURN_STATUS
+SemihostFileRead (
+ IN UINTN FileHandle,
+ IN OUT UINTN *Length,
+ OUT VOID *Buffer
+ )
+{
+ SEMIHOST_FILE_READ_WRITE_BLOCK ReadBlock;
+ UINT32 Result;
+
+ if ((Length == NULL) || (Buffer == NULL)) {
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ ReadBlock.Handle = FileHandle;
+ ReadBlock.Buffer = Buffer;
+ ReadBlock.Length = *Length;
+
+ Result = Semihost_SYS_READ(&ReadBlock);
+
+ if ((*Length != 0) && (Result == *Length)) {
+ return RETURN_ABORTED;
+ } else {
+ *Length -= Result;
+ return RETURN_SUCCESS;
+ }
+}
+
+RETURN_STATUS
+SemihostFileWrite (
+ IN UINTN FileHandle,
+ IN OUT UINTN *Length,
+ IN VOID *Buffer
+ )
+{
+ SEMIHOST_FILE_READ_WRITE_BLOCK WriteBlock;
+
+ if ((Length == NULL) || (Buffer == NULL)) {
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ WriteBlock.Handle = FileHandle;
+ WriteBlock.Buffer = Buffer;
+ WriteBlock.Length = *Length;
+
+ *Length = Semihost_SYS_WRITE(&WriteBlock);
+
+ if (*Length != 0)
+ return RETURN_ABORTED;
+ else
+ return RETURN_SUCCESS;
+}
+
+RETURN_STATUS
+SemihostFileClose (
+ IN UINTN FileHandle
+ )
+{
+ INT32 Result = Semihost_SYS_CLOSE(&FileHandle);
+
+ if (Result == -1) {
+ return RETURN_INVALID_PARAMETER;
+ } else {
+ return RETURN_SUCCESS;
+ }
+}
+
+RETURN_STATUS
+SemihostFileLength (
+ IN UINTN FileHandle,
+ OUT UINTN *Length
+ )
+{
+ INT32 Result;
+
+ if (Length == NULL) {
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ Result = Semihost_SYS_FLEN(&FileHandle);
+
+ if (Result == -1) {
+ return RETURN_ABORTED;
+ } else {
+ *Length = Result;
+ return RETURN_SUCCESS;
+ }
+}
+
+/**
+ Get a temporary name for a file from the host running the debug agent.
+
+ @param[out] Buffer Pointer to the buffer where the temporary name has to
+ be stored
+ @param[in] Identifier File name identifier (integer in the range 0 to 255)
+ @param[in] Length Length of the buffer to store the temporary name
+
+ @retval RETURN_SUCCESS Temporary name returned
+ @retval RETURN_INVALID_PARAMETER Invalid buffer address
+ @retval RETURN_ABORTED Temporary name not returned
+
+**/
+RETURN_STATUS
+SemihostFileTmpName(
+ OUT VOID *Buffer,
+ IN UINT8 Identifier,
+ IN UINTN Length
+ )
+{
+ SEMIHOST_FILE_TMPNAME_BLOCK TmpNameBlock;
+ INT32 Result;
+
+ if (Buffer == NULL) {
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ TmpNameBlock.Buffer = Buffer;
+ TmpNameBlock.Identifier = Identifier;
+ TmpNameBlock.Length = Length;
+
+ Result = Semihost_SYS_TMPNAME (&TmpNameBlock);
+
+ if (Result != 0) {
+ return RETURN_ABORTED;
+ } else {
+ return RETURN_SUCCESS;
+ }
+}
+
+RETURN_STATUS
+SemihostFileRemove (
+ IN CHAR8 *FileName
+ )
+{
+ SEMIHOST_FILE_REMOVE_BLOCK RemoveBlock;
+ UINT32 Result;
+
+ // Remove any leading separator (e.g.: '\'). EFI Shell adds one.
+ if (*FileName == '\\') {
+ FileName++;
+ }
+
+ RemoveBlock.FileName = FileName;
+ RemoveBlock.NameLength = AsciiStrLen(FileName);
+
+ Result = Semihost_SYS_REMOVE(&RemoveBlock);
+
+ if (Result == 0) {
+ return RETURN_SUCCESS;
+ } else {
+ return RETURN_ABORTED;
+ }
+}
+
+/**
+ Rename a specified file.
+
+ @param[in] FileName Name of the file to rename.
+ @param[in] NewFileName The new name of the file.
+
+ @retval RETURN_SUCCESS File Renamed
+ @retval RETURN_INVALID_PARAMETER Either the current or the new name is not specified
+ @retval RETURN_ABORTED Rename failed
+
+**/
+RETURN_STATUS
+SemihostFileRename(
+ IN CHAR8 *FileName,
+ IN CHAR8 *NewFileName
+ )
+{
+ SEMIHOST_FILE_RENAME_BLOCK RenameBlock;
+ INT32 Result;
+
+ if ((FileName == NULL) || (NewFileName == NULL)) {
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ RenameBlock.FileName = FileName;
+ RenameBlock.FileNameLength = AsciiStrLen (FileName);
+ RenameBlock.NewFileName = NewFileName;
+ RenameBlock.NewFileNameLength = AsciiStrLen (NewFileName);
+
+ Result = Semihost_SYS_RENAME (&RenameBlock);
+
+ if (Result != 0) {
+ return RETURN_ABORTED;
+ } else {
+ return RETURN_SUCCESS;
+ }
+}
+
+CHAR8
+SemihostReadCharacter (
+ VOID
+ )
+{
+ return Semihost_SYS_READC();
+}
+
+VOID
+SemihostWriteCharacter (
+ IN CHAR8 Character
+ )
+{
+ Semihost_SYS_WRITEC(&Character);
+}
+
+VOID
+SemihostWriteString (
+ IN CHAR8 *String
+ )
+{
+ Semihost_SYS_WRITE0(String);
+}
+
+UINT32
+SemihostSystem (
+ IN CHAR8 *CommandLine
+ )
+{
+ SEMIHOST_SYSTEM_BLOCK SystemBlock;
+
+ SystemBlock.CommandLine = CommandLine;
+ SystemBlock.CommandLength = AsciiStrLen(CommandLine);
+
+ return Semihost_SYS_SYSTEM(&SystemBlock);
+}
diff --git a/roms/edk2/ArmPkg/Library/SemihostLib/SemihostLib.inf b/roms/edk2/ArmPkg/Library/SemihostLib/SemihostLib.inf new file mode 100644 index 000000000..a46618d30 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/SemihostLib/SemihostLib.inf @@ -0,0 +1,41 @@ +#/** @file
+# Semihosting JTAG lib
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = SemihostLib
+ FILE_GUID = C40D08BA-DB7B-4F07-905A-C5FE4B5AF987
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = SemihostLib
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ARM AARCH64
+#
+[Sources.common]
+ SemihostLib.c
+
+[Sources.ARM]
+ Arm/GccSemihost.S | GCC
+
+[Sources.AARCH64]
+ AArch64/GccSemihost.S
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ BaseLib
+
diff --git a/roms/edk2/ArmPkg/Library/SemihostLib/SemihostPrivate.h b/roms/edk2/ArmPkg/Library/SemihostLib/SemihostPrivate.h new file mode 100644 index 000000000..8d1fc6d6e --- /dev/null +++ b/roms/edk2/ArmPkg/Library/SemihostLib/SemihostPrivate.h @@ -0,0 +1,212 @@ +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __SEMIHOST_PRIVATE_H__
+#define __SEMIHOST_PRIVATE_H__
+
+typedef struct {
+ CHAR8 *FileName;
+ UINTN Mode;
+ UINTN NameLength;
+} SEMIHOST_FILE_OPEN_BLOCK;
+
+typedef struct {
+ UINTN Handle;
+ VOID *Buffer;
+ UINTN Length;
+} SEMIHOST_FILE_READ_WRITE_BLOCK;
+
+typedef struct {
+ UINTN Handle;
+ UINTN Location;
+} SEMIHOST_FILE_SEEK_BLOCK;
+
+typedef struct {
+ VOID *Buffer;
+ UINTN Identifier;
+ UINTN Length;
+} SEMIHOST_FILE_TMPNAME_BLOCK;
+
+typedef struct {
+ CHAR8 *FileName;
+ UINTN NameLength;
+} SEMIHOST_FILE_REMOVE_BLOCK;
+
+typedef struct {
+ CHAR8 *FileName;
+ UINTN FileNameLength;
+ CHAR8 *NewFileName;
+ UINTN NewFileNameLength;
+} SEMIHOST_FILE_RENAME_BLOCK;
+
+typedef struct {
+ CHAR8 *CommandLine;
+ UINTN CommandLength;
+} SEMIHOST_SYSTEM_BLOCK;
+
+#if defined(__CC_ARM)
+
+#if defined(__thumb__)
+#define SWI 0xAB
+#else
+#define SWI 0x123456
+#endif
+
+#define SEMIHOST_SUPPORTED TRUE
+
+__swi(SWI)
+INT32
+_Semihost_SYS_OPEN(
+ IN UINTN SWI_0x01,
+ IN SEMIHOST_FILE_OPEN_BLOCK *OpenBlock
+ );
+
+__swi(SWI)
+INT32
+_Semihost_SYS_CLOSE(
+ IN UINTN SWI_0x02,
+ IN UINT32 *Handle
+ );
+
+__swi(SWI)
+VOID
+_Semihost_SYS_WRITEC(
+ IN UINTN SWI_0x03,
+ IN CHAR8 *Character
+ );
+
+__swi(SWI)
+VOID
+_Semihost_SYS_WRITE0(
+ IN UINTN SWI_0x04,
+ IN CHAR8 *String
+ );
+
+__swi(SWI)
+UINT32
+_Semihost_SYS_WRITE(
+ IN UINTN SWI_0x05,
+ IN OUT SEMIHOST_FILE_READ_WRITE_BLOCK *WriteBlock
+ );
+
+__swi(SWI)
+UINT32
+_Semihost_SYS_READ(
+ IN UINTN SWI_0x06,
+ IN OUT SEMIHOST_FILE_READ_WRITE_BLOCK *ReadBlock
+ );
+
+__swi(SWI)
+CHAR8
+_Semihost_SYS_READC(
+ IN UINTN SWI_0x07,
+ IN UINTN Zero
+ );
+
+__swi(SWI)
+INT32
+_Semihost_SYS_SEEK(
+ IN UINTN SWI_0x0A,
+ IN SEMIHOST_FILE_SEEK_BLOCK *SeekBlock
+ );
+
+__swi(SWI)
+INT32
+_Semihost_SYS_FLEN(
+ IN UINTN SWI_0x0C,
+ IN UINT32 *Handle
+ );
+
+__swi(SWI)
+UINT32
+_Semihost_SYS_TMPNAME(
+ IN UINTN SWI_0x0D,
+ IN SEMIHOST_FILE_TMPNAME_BLOCK *TmpNameBlock
+ );
+
+__swi(SWI)
+UINT32
+_Semihost_SYS_REMOVE(
+ IN UINTN SWI_0x0E,
+ IN SEMIHOST_FILE_REMOVE_BLOCK *RemoveBlock
+ );
+
+__swi(SWI)
+UINT32
+_Semihost_SYS_RENAME(
+ IN UINTN SWI_0x0F,
+ IN SEMIHOST_FILE_RENAME_BLOCK *RenameBlock
+ );
+
+__swi(SWI)
+UINT32
+_Semihost_SYS_SYSTEM(
+ IN UINTN SWI_0x12,
+ IN SEMIHOST_SYSTEM_BLOCK *SystemBlock
+ );
+
+#define Semihost_SYS_OPEN(OpenBlock) _Semihost_SYS_OPEN(0x01, OpenBlock)
+#define Semihost_SYS_CLOSE(Handle) _Semihost_SYS_CLOSE(0x02, Handle)
+#define Semihost_SYS_WRITE0(String) _Semihost_SYS_WRITE0(0x04, String)
+#define Semihost_SYS_WRITEC(Character) _Semihost_SYS_WRITEC(0x03, Character)
+#define Semihost_SYS_WRITE(WriteBlock) _Semihost_SYS_WRITE(0x05, WriteBlock)
+#define Semihost_SYS_READ(ReadBlock) _Semihost_SYS_READ(0x06, ReadBlock)
+#define Semihost_SYS_READC() _Semihost_SYS_READC(0x07, 0)
+#define Semihost_SYS_SEEK(SeekBlock) _Semihost_SYS_SEEK(0x0A, SeekBlock)
+#define Semihost_SYS_FLEN(Handle) _Semihost_SYS_FLEN(0x0C, Handle)
+#define Semihost_SYS_TMPNAME(TmpNameBlock) _Semihost_SYS_TMPNAME(0x0D, TmpNameBlock)
+#define Semihost_SYS_REMOVE(RemoveBlock) _Semihost_SYS_REMOVE(0x0E, RemoveBlock)
+#define Semihost_SYS_RENAME(RenameBlock) _Semihost_SYS_RENAME(0x0F, RenameBlock)
+#define Semihost_SYS_SYSTEM(SystemBlock) _Semihost_SYS_SYSTEM(0x12, SystemBlock)
+
+#elif defined(__GNUC__) // __CC_ARM
+
+#define SEMIHOST_SUPPORTED TRUE
+
+UINT32
+GccSemihostCall (
+ IN UINT32 Operation,
+ IN UINTN SystemBlockAddress
+ ); // __attribute__ ((interrupt ("SVC")));
+
+#define Semihost_SYS_OPEN(OpenBlock) GccSemihostCall(0x01, (UINTN)(OpenBlock))
+#define Semihost_SYS_CLOSE(Handle) GccSemihostCall(0x02, (UINTN)(Handle))
+#define Semihost_SYS_WRITE0(String) GccSemihostCall(0x04, (UINTN)(String))
+#define Semihost_SYS_WRITEC(Character) GccSemihostCall(0x03, (UINTN)(Character))
+#define Semihost_SYS_WRITE(WriteBlock) GccSemihostCall(0x05, (UINTN)(WriteBlock))
+#define Semihost_SYS_READ(ReadBlock) GccSemihostCall(0x06, (UINTN)(ReadBlock))
+#define Semihost_SYS_READC() GccSemihostCall(0x07, (UINTN)(0))
+#define Semihost_SYS_SEEK(SeekBlock) GccSemihostCall(0x0A, (UINTN)(SeekBlock))
+#define Semihost_SYS_FLEN(Handle) GccSemihostCall(0x0C, (UINTN)(Handle))
+#define Semihost_SYS_TMPNAME(TmpNameBlock) GccSemihostCall(0x0D, (UINTN)(TmpNameBlock))
+#define Semihost_SYS_REMOVE(RemoveBlock) GccSemihostCall(0x0E, (UINTN)(RemoveBlock))
+#define Semihost_SYS_RENAME(RenameBlock) GccSemihostCall(0x0F, (UINTN)(RenameBlock))
+#define Semihost_SYS_SYSTEM(SystemBlock) GccSemihostCall(0x12, (UINTN)(SystemBlock))
+
+#else // __CC_ARM
+
+#define SEMIHOST_SUPPORTED FALSE
+
+#define Semihost_SYS_OPEN(OpenBlock) (-1)
+#define Semihost_SYS_CLOSE(Handle) (-1)
+#define Semihost_SYS_WRITE0(String)
+#define Semihost_SYS_WRITEC(Character)
+#define Semihost_SYS_WRITE(WriteBlock) (0)
+#define Semihost_SYS_READ(ReadBlock) ((ReadBlock)->Length)
+#define Semihost_SYS_READC() ('x')
+#define Semihost_SYS_SEEK(SeekBlock) (-1)
+#define Semihost_SYS_FLEN(Handle) (-1)
+#define Semihost_SYS_TMPNAME(TmpNameBlock) (-1)
+#define Semihost_SYS_REMOVE(RemoveBlock) (-1)
+#define Semihost_SYS_RENAME(RenameBlock) (-1)
+#define Semihost_SYS_SYSTEM(SystemBlock) (-1)
+
+#endif // __CC_ARM
+
+#endif //__SEMIHOST_PRIVATE_H__
diff --git a/roms/edk2/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c b/roms/edk2/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c new file mode 100644 index 000000000..3806490f7 --- /dev/null +++ b/roms/edk2/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c @@ -0,0 +1,179 @@ +/** @file
+* File managing the MMU for ARMv8 architecture in S-EL0
+*
+* Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+#include <IndustryStandard/ArmMmSvc.h>
+
+#include <Library/ArmLib.h>
+#include <Library/ArmMmuLib.h>
+#include <Library/ArmSvcLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+
+STATIC
+EFI_STATUS
+GetMemoryPermissions (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ OUT UINT32 *MemoryAttributes
+ )
+{
+ ARM_SVC_ARGS GetMemoryPermissionsSvcArgs = {0};
+
+ GetMemoryPermissionsSvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64;
+ GetMemoryPermissionsSvcArgs.Arg1 = BaseAddress;
+ GetMemoryPermissionsSvcArgs.Arg2 = 0;
+ GetMemoryPermissionsSvcArgs.Arg3 = 0;
+
+ ArmCallSvc (&GetMemoryPermissionsSvcArgs);
+ if (GetMemoryPermissionsSvcArgs.Arg0 == ARM_SVC_SPM_RET_INVALID_PARAMS) {
+ *MemoryAttributes = 0;
+ return EFI_INVALID_PARAMETER;
+ }
+
+ *MemoryAttributes = GetMemoryPermissionsSvcArgs.Arg0;
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+RequestMemoryPermissionChange (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINTN Permissions
+ )
+{
+ EFI_STATUS Status;
+ ARM_SVC_ARGS ChangeMemoryPermissionsSvcArgs = {0};
+
+ ChangeMemoryPermissionsSvcArgs.Arg0 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64;
+ ChangeMemoryPermissionsSvcArgs.Arg1 = BaseAddress;
+ ChangeMemoryPermissionsSvcArgs.Arg2 = EFI_SIZE_TO_PAGES(Length);
+ ChangeMemoryPermissionsSvcArgs.Arg3 = Permissions;
+
+ ArmCallSvc (&ChangeMemoryPermissionsSvcArgs);
+
+ Status = ChangeMemoryPermissionsSvcArgs.Arg0;
+
+ switch (Status) {
+ case ARM_SVC_SPM_RET_SUCCESS:
+ Status = EFI_SUCCESS;
+ break;
+
+ case ARM_SVC_SPM_RET_NOT_SUPPORTED:
+ Status = EFI_UNSUPPORTED;
+ break;
+
+ case ARM_SVC_SPM_RET_INVALID_PARAMS:
+ Status = EFI_INVALID_PARAMETER;
+ break;
+
+ case ARM_SVC_SPM_RET_DENIED:
+ Status = EFI_ACCESS_DENIED;
+ break;
+
+ case ARM_SVC_SPM_RET_NO_MEMORY:
+ Status = EFI_BAD_BUFFER_SIZE;
+ break;
+
+ default:
+ Status = EFI_ACCESS_DENIED;
+ ASSERT (0);
+ }
+
+ return Status;
+}
+
+EFI_STATUS
+ArmSetMemoryRegionNoExec (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ EFI_STATUS Status;
+ UINT32 MemoryAttributes;
+ UINT32 CodePermission;
+
+ Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
+ if (Status != EFI_INVALID_PARAMETER) {
+ CodePermission = SET_MEM_ATTR_CODE_PERM_XN << SET_MEM_ATTR_CODE_PERM_SHIFT;
+ return RequestMemoryPermissionChange (
+ BaseAddress,
+ Length,
+ MemoryAttributes | CodePermission
+ );
+ }
+ return EFI_INVALID_PARAMETER;
+}
+
+EFI_STATUS
+ArmClearMemoryRegionNoExec (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ EFI_STATUS Status;
+ UINT32 MemoryAttributes;
+ UINT32 CodePermission;
+
+ Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
+ if (Status != EFI_INVALID_PARAMETER) {
+ CodePermission = SET_MEM_ATTR_CODE_PERM_XN << SET_MEM_ATTR_CODE_PERM_SHIFT;
+ return RequestMemoryPermissionChange (
+ BaseAddress,
+ Length,
+ MemoryAttributes & ~CodePermission
+ );
+ }
+ return EFI_INVALID_PARAMETER;
+}
+
+EFI_STATUS
+ArmSetMemoryRegionReadOnly (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ EFI_STATUS Status;
+ UINT32 MemoryAttributes;
+ UINT32 DataPermission;
+
+ Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
+ if (Status != EFI_INVALID_PARAMETER) {
+ DataPermission = SET_MEM_ATTR_DATA_PERM_RO << SET_MEM_ATTR_DATA_PERM_SHIFT;
+ return RequestMemoryPermissionChange (
+ BaseAddress,
+ Length,
+ MemoryAttributes | DataPermission
+ );
+ }
+ return EFI_INVALID_PARAMETER;
+}
+
+EFI_STATUS
+ArmClearMemoryRegionReadOnly (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ EFI_STATUS Status;
+ UINT32 MemoryAttributes;
+ UINT32 PermissionRequest;
+
+ Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
+ if (Status != EFI_INVALID_PARAMETER) {
+ PermissionRequest = SET_MEM_ATTR_MAKE_PERM_REQUEST (SET_MEM_ATTR_DATA_PERM_RW,
+ MemoryAttributes);
+ return RequestMemoryPermissionChange (
+ BaseAddress,
+ Length,
+ PermissionRequest
+ );
+ }
+ return EFI_INVALID_PARAMETER;
+}
diff --git a/roms/edk2/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf b/roms/edk2/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf new file mode 100644 index 000000000..85973687f --- /dev/null +++ b/roms/edk2/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf @@ -0,0 +1,31 @@ +#/** @file
+#
+# Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = ArmMmuStandaloneMmCoreLib
+ FILE_GUID = da8f0232-fb14-42f0-922c-63104d2c70bd
+ MODULE_TYPE = MM_CORE_STANDALONE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = StandaloneMmMmuLib
+ PI_SPECIFICATION_VERSION = 0x00010032
+
+[Sources.AARCH64]
+ AArch64/ArmMmuStandaloneMmLib.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ ArmLib
+ CacheMaintenanceLib
+ MemoryAllocationLib
+
+
|