Add submodule dependency filesHEAD master

Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
author: Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> 2023-10-10 14:33:42 +0000
committer: Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> 2023-10-10 14:33:42 +0000
commit: af1a266670d040d2f4083ff309d732d648afba2a (patch)
tree: 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/edk2/MdePkg/Library/BaseIoLibIntrinsic
parent: e02cda008591317b1625707ff8e115a4841aa889 (diff)
22 files changed, 6751 insertions, 0 deletions
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S
new file mode 100644
index 000000000..00f1abec1
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S
@@ -0,0 +1,142 @@
+#
+#  Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+.text
+.align 3
+
+GCC_ASM_EXPORT(MmioRead8Internal)
+GCC_ASM_EXPORT(MmioWrite8Internal)
+GCC_ASM_EXPORT(MmioRead16Internal)
+GCC_ASM_EXPORT(MmioWrite16Internal)
+GCC_ASM_EXPORT(MmioRead32Internal)
+GCC_ASM_EXPORT(MmioWrite32Internal)
+GCC_ASM_EXPORT(MmioRead64Internal)
+GCC_ASM_EXPORT(MmioWrite64Internal)
+
+//
+//  Reads an 8-bit MMIO register.
+//
+//  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+//  returned. This function must guarantee that all MMIO read and write
+//  operations are serialized.
+//
+//  @param  Address The MMIO register to read.
+//
+//  @return The value read.
+//
+ASM_PFX(MmioRead8Internal):
+  ldrb    w0, [x0]
+  dmb     ld
+  ret
+
+//
+//  Writes an 8-bit MMIO register.
+//
+//  Writes the 8-bit MMIO register specified by Address with the value specified
+//  by Value and returns Value. This function must guarantee that all MMIO read
+//  and write operations are serialized.
+//
+//  @param  Address The MMIO register to write.
+//  @param  Value   The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite8Internal):
+  dmb     st
+  strb    w1, [x0]
+  ret
+
+//
+//  Reads a 16-bit MMIO register.
+//
+//  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+//  returned. This function must guarantee that all MMIO read and write
+//  operations are serialized.
+//
+//  @param  Address The MMIO register to read.
+//
+//  @return The value read.
+//
+ASM_PFX(MmioRead16Internal):
+  ldrh    w0, [x0]
+  dmb     ld
+  ret
+
+//
+//  Writes a 16-bit MMIO register.
+//
+//  Writes the 16-bit MMIO register specified by Address with the value specified
+//  by Value and returns Value. This function must guarantee that all MMIO read
+//  and write operations are serialized.
+//
+//  @param  Address The MMIO register to write.
+//  @param  Value   The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite16Internal):
+  dmb     st
+  strh    w1, [x0]
+  ret
+
+//
+//  Reads a 32-bit MMIO register.
+//
+//  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+//  returned. This function must guarantee that all MMIO read and write
+//  operations are serialized.
+//
+//  @param  Address The MMIO register to read.
+//
+//  @return The value read.
+//
+ASM_PFX(MmioRead32Internal):
+  ldr     w0, [x0]
+  dmb     ld
+  ret
+
+//
+//  Writes a 32-bit MMIO register.
+//
+//  Writes the 32-bit MMIO register specified by Address with the value specified
+//  by Value and returns Value. This function must guarantee that all MMIO read
+//  and write operations are serialized.
+//
+//  @param  Address The MMIO register to write.
+//  @param  Value   The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite32Internal):
+  dmb     st
+  str     w1, [x0]
+  ret
+
+//
+//  Reads a 64-bit MMIO register.
+//
+//  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+//  returned. This function must guarantee that all MMIO read and write
+//  operations are serialized.
+//
+//  @param  Address The MMIO register to read.
+//
+//  @return The value read.
+//
+ASM_PFX(MmioRead64Internal):
+  ldr     x0, [x0]
+  dmb     ld
+  ret
+
+//
+//  Writes a 64-bit MMIO register.
+//
+//  Writes the 64-bit MMIO register specified by Address with the value specified
+//  by Value and returns Value. This function must guarantee that all MMIO read
+//  and write operations are serialized.
+//
+//  @param  Address The MMIO register to write.
+//  @param  Value   The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite64Internal):
+  dmb     st
+  str     x1, [x0]
+  ret
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.asm b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.asm
new file mode 100644
index 000000000..49a0f422d
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.asm
@@ -0,0 +1,143 @@
+;
+;  Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+;
+;  SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+
+
+AREA IoLibMmio, CODE, READONLY
+
+EXPORT MmioRead8Internal
+EXPORT MmioWrite8Internal
+EXPORT MmioRead16Internal
+EXPORT MmioWrite16Internal
+EXPORT MmioRead32Internal
+EXPORT MmioWrite32Internal
+EXPORT MmioRead64Internal
+EXPORT MmioWrite64Internal
+
+;
+;  Reads an 8-bit MMIO register.
+;
+;  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+;  returned. This function must guarantee that all MMIO read and write
+;  operations are serialized.
+;
+;  @param  Address The MMIO register to read.
+;
+;  @return The value read.
+;
+MmioRead8Internal
+  ldrb    w0, [x0]
+  dmb     ld
+  ret
+
+;
+;  Writes an 8-bit MMIO register.
+;
+;  Writes the 8-bit MMIO register specified by Address with the value specified
+;  by Value and returns Value. This function must guarantee that all MMIO read
+;  and write operations are serialized.
+;
+;  @param  Address The MMIO register to write.
+;  @param  Value   The value to write to the MMIO register.
+;
+MmioWrite8Internal
+  dmb     st
+  strb    w1, [x0]
+  ret
+
+;
+;  Reads a 16-bit MMIO register.
+;
+;  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+;  returned. This function must guarantee that all MMIO read and write
+;  operations are serialized.
+;
+;  @param  Address The MMIO register to read.
+;
+;  @return The value read.
+;
+MmioRead16Internal
+  ldrh    w0, [x0]
+  dmb     ld
+  ret
+
+;
+;  Writes a 16-bit MMIO register.
+;
+;  Writes the 16-bit MMIO register specified by Address with the value specified
+;  by Value and returns Value. This function must guarantee that all MMIO read
+;  and write operations are serialized.
+;
+;  @param  Address The MMIO register to write.
+;  @param  Value   The value to write to the MMIO register.
+;
+MmioWrite16Internal
+  dmb     st
+  strh    w1, [x0]
+  ret
+
+;
+;  Reads a 32-bit MMIO register.
+;
+;  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+;  returned. This function must guarantee that all MMIO read and write
+;  operations are serialized.
+;
+;  @param  Address The MMIO register to read.
+;
+;  @return The value read.
+;
+MmioRead32Internal
+  ldr     w0, [x0]
+  dmb     ld
+  ret
+
+;
+;  Writes a 32-bit MMIO register.
+;
+;  Writes the 32-bit MMIO register specified by Address with the value specified
+;  by Value and returns Value. This function must guarantee that all MMIO read
+;  and write operations are serialized.
+;
+;  @param  Address The MMIO register to write.
+;  @param  Value   The value to write to the MMIO register.
+;
+MmioWrite32Internal
+  dmb     st
+  str     w1, [x0]
+  ret
+
+;
+;  Reads a 64-bit MMIO register.
+;
+;  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+;  returned. This function must guarantee that all MMIO read and write
+;  operations are serialized.
+;
+;  @param  Address The MMIO register to read.
+;
+;  @return The value read.
+;
+MmioRead64Internal
+  ldr    x0, [x0]
+  dmb    ld
+  ret
+
+;
+;  Writes a 64-bit MMIO register.
+;
+;  Writes the 64-bit MMIO register specified by Address with the value specified
+;  by Value and returns Value. This function must guarantee that all MMIO read
+;  and write operations are serialized.
+;
+;  @param  Address The MMIO register to write.
+;  @param  Value   The value to write to the MMIO register.
+;
+MmioWrite64Internal
+  dmb     st
+  str     x1, [x0]
+  ret
+
+  END
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S
new file mode 100644
index 000000000..f82325769
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S
@@ -0,0 +1,141 @@
+#
+#  Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+GCC_ASM_EXPORT(MmioRead8Internal)
+GCC_ASM_EXPORT(MmioWrite8Internal)
+GCC_ASM_EXPORT(MmioRead16Internal)
+GCC_ASM_EXPORT(MmioWrite16Internal)
+GCC_ASM_EXPORT(MmioRead32Internal)
+GCC_ASM_EXPORT(MmioWrite32Internal)
+GCC_ASM_EXPORT(MmioRead64Internal)
+GCC_ASM_EXPORT(MmioWrite64Internal)
+
+//
+//  Reads an 8-bit MMIO register.
+//
+//  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+//  returned. This function must guarantee that all MMIO read and write
+//  operations are serialized.
+//
+//  @param  Address The MMIO register to read.
+//
+//  @return The value read.
+//
+ASM_PFX(MmioRead8Internal):
+  ldrb    r0, [r0]
+  dmb
+  bx      lr
+
+//
+//  Writes an 8-bit MMIO register.
+//
+//  Writes the 8-bit MMIO register specified by Address with the value specified
+//  by Value and returns Value. This function must guarantee that all MMIO read
+//  and write operations are serialized.
+//
+//  @param  Address The MMIO register to write.
+//  @param  Value   The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite8Internal):
+  dmb     st
+  strb    r1, [r0]
+  bx      lr
+
+//
+//  Reads a 16-bit MMIO register.
+//
+//  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+//  returned. This function must guarantee that all MMIO read and write
+//  operations are serialized.
+//
+//  @param  Address The MMIO register to read.
+//
+//  @return The value read.
+//
+ASM_PFX(MmioRead16Internal):
+  ldrh    r0, [r0]
+  dmb
+  bx      lr
+
+//
+//  Writes a 16-bit MMIO register.
+//
+//  Writes the 16-bit MMIO register specified by Address with the value specified
+//  by Value and returns Value. This function must guarantee that all MMIO read
+//  and write operations are serialized.
+//
+//  @param  Address The MMIO register to write.
+//  @param  Value   The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite16Internal):
+  dmb     st
+  strh    r1, [r0]
+  bx      lr
+
+//
+//  Reads a 32-bit MMIO register.
+//
+//  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+//  returned. This function must guarantee that all MMIO read and write
+//  operations are serialized.
+//
+//  @param  Address The MMIO register to read.
+//
+//  @return The value read.
+//
+ASM_PFX(MmioRead32Internal):
+  ldr     r0, [r0]
+  dmb
+  bx      lr
+
+//
+//  Writes a 32-bit MMIO register.
+//
+//  Writes the 32-bit MMIO register specified by Address with the value specified
+//  by Value and returns Value. This function must guarantee that all MMIO read
+//  and write operations are serialized.
+//
+//  @param  Address The MMIO register to write.
+//  @param  Value   The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite32Internal):
+  dmb     st
+  str     r1, [r0]
+  bx      lr
+
+//
+//  Reads a 64-bit MMIO register.
+//
+//  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+//  returned. This function must guarantee that all MMIO read and write
+//  operations are serialized.
+//
+//  @param  Address The MMIO register to read.
+//
+//  @return The value read.
+//
+ASM_PFX(MmioRead64Internal):
+  ldr     r1, [r0, #4]
+  ldr     r0, [r0]
+  dmb
+  bx      lr
+
+//
+//  Writes a 64-bit MMIO register.
+//
+//  Writes the 64-bit MMIO register specified by Address with the value specified
+//  by Value and returns Value. This function must guarantee that all MMIO read
+//  and write operations are serialized.
+//
+//  @param  Address The MMIO register to write.
+//  @param  Value   The value to write to the MMIO register.
+//
+ASM_PFX(MmioWrite64Internal):
+  dmb     st
+  str     r2, [r0]
+  str     r3, [r0, #4]
+  bx      lr
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm
new file mode 100644
index 000000000..5a423df16
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm
@@ -0,0 +1,145 @@
+;
+;  Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
+;
+;  SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+
+
+AREA IoLibMmio, CODE, READONLY
+
+EXPORT MmioRead8Internal
+EXPORT MmioWrite8Internal
+EXPORT MmioRead16Internal
+EXPORT MmioWrite16Internal
+EXPORT MmioRead32Internal
+EXPORT MmioWrite32Internal
+EXPORT MmioRead64Internal
+EXPORT MmioWrite64Internal
+
+;
+;  Reads an 8-bit MMIO register.
+;
+;  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+;  returned. This function must guarantee that all MMIO read and write
+;  operations are serialized.
+;
+;  @param  Address The MMIO register to read.
+;
+;  @return The value read.
+;
+MmioRead8Internal
+  ldrb    r0, [r0]
+  dmb
+  bx      lr
+
+;
+;  Writes an 8-bit MMIO register.
+;
+;  Writes the 8-bit MMIO register specified by Address with the value specified
+;  by Value and returns Value. This function must guarantee that all MMIO read
+;  and write operations are serialized.
+;
+;  @param  Address The MMIO register to write.
+;  @param  Value   The value to write to the MMIO register.
+;
+MmioWrite8Internal
+  dmb     st
+  strb    r1, [r0]
+  bx      lr
+
+;
+;  Reads a 16-bit MMIO register.
+;
+;  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+;  returned. This function must guarantee that all MMIO read and write
+;  operations are serialized.
+;
+;  @param  Address The MMIO register to read.
+;
+;  @return The value read.
+;
+MmioRead16Internal
+  ldrh    r0, [r0]
+  dmb
+  bx      lr
+
+;
+;  Writes a 16-bit MMIO register.
+;
+;  Writes the 16-bit MMIO register specified by Address with the value specified
+;  by Value and returns Value. This function must guarantee that all MMIO read
+;  and write operations are serialized.
+;
+;  @param  Address The MMIO register to write.
+;  @param  Value   The value to write to the MMIO register.
+;
+MmioWrite16Internal
+  dmb     st
+  strh    r1, [r0]
+  bx      lr
+
+;
+;  Reads a 32-bit MMIO register.
+;
+;  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+;  returned. This function must guarantee that all MMIO read and write
+;  operations are serialized.
+;
+;  @param  Address The MMIO register to read.
+;
+;  @return The value read.
+;
+MmioRead32Internal
+  ldr     r0, [r0]
+  dmb
+  bx      lr
+
+;
+;  Writes a 32-bit MMIO register.
+;
+;  Writes the 32-bit MMIO register specified by Address with the value specified
+;  by Value and returns Value. This function must guarantee that all MMIO read
+;  and write operations are serialized.
+;
+;  @param  Address The MMIO register to write.
+;  @param  Value   The value to write to the MMIO register.
+;
+MmioWrite32Internal
+  dmb     st
+  str     r1, [r0]
+  bx      lr
+
+;
+;  Reads a 64-bit MMIO register.
+;
+;  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+;  returned. This function must guarantee that all MMIO read and write
+;  operations are serialized.
+;
+;  @param  Address The MMIO register to read.
+;
+;  @return The value read.
+;
+MmioRead64Internal
+  ldr     r1, [r0, #4]
+  ldr     r0, [r0]
+  dmb
+  bx      lr
+
+;
+;  Writes a 64-bit MMIO register.
+;
+;  Writes the 64-bit MMIO register specified by Address with the value specified
+;  by Value and returns Value. This function must guarantee that all MMIO read
+;  and write operations are serialized.
+;
+;  @param  Address The MMIO register to write.
+;  @param  Value   The value to write to the MMIO register.
+;
+MmioWrite64Internal
+  dmb     st
+  str     r2, [r0]
+  str     r3, [r0, #4]
+  bx      lr
+
+  END
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
new file mode 100644
index 000000000..690b95d44
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
@@ -0,0 +1,69 @@
+## @file
+#  Instance of I/O Library using compiler intrinsics.
+#
+#  I/O Library that uses compiler intrinsics to perform IN and OUT instructions
+#  for IA-32 and x64.  On IPF, I/O port requests are translated into MMIO requests.
+#  MMIO requests are forwarded directly to memory.  For EBC, I/O port requests
+#  ASSERT(). For ARM, AARCH64 and RISCV64, this I/O library only provides non I/O
+#  read and write.
+#
+#  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+#  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+#  Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = BaseIoLibIntrinsic
+  MODULE_UNI_FILE                = BaseIoLibIntrinsic.uni
+  FILE_GUID                      = 926c9cd0-4bb8-479b-9ac4-8a2a23f85307
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = IoLib
+
+
+#
+#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64 RISCV64
+#
+
+[Sources]
+  IoLibMmioBuffer.c
+  BaseIoLibIntrinsicInternal.h
+  IoHighLevel.c
+
+[Sources.IA32]
+  IoLibGcc.c    | GCC
+  IoLibMsc.c    | MSFT
+  IoLib.c
+  Ia32/IoFifo.nasm
+
+[Sources.X64]
+  IoLibGcc.c    | GCC
+  IoLibMsc.c    | MSFT
+  IoLib.c
+  X64/IoFifo.nasm
+
+[Sources.EBC]
+  IoLibEbc.c
+  IoLib.c
+
+[Sources.ARM]
+  IoLibNoIo.c
+
+[Sources.AARCH64]
+  IoLibNoIo.c
+
+[Sources.RISCV64]
+  IoLibNoIo.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  DebugLib
+  BaseLib
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni
new file mode 100644
index 000000000..0f848bc5d
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.uni
@@ -0,0 +1,19 @@
+// /** @file
+// Instance of I/O Library using compiler intrinsics.
+//
+// I/O Library that uses compiler intrinsics to perform IN and OUT instructions
+// for IA-32 and x64.  On IPF, I/O port requests are translated into MMIO requests.
+// MMIO requests are forwarded directly to memory.
+//
+// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT             #language en-US "Instance of I/O Library using compiler intrinsics"
+
+#string STR_MODULE_DESCRIPTION          #language en-US "I/O Library that uses compiler intrinsics to perform IN and OUT instructions for IA-32 and x64.  On IPF, I/O port requests are translated into MMIO requests. MMIO requests are forwarded directly to memory."
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf
new file mode 100644
index 000000000..ad68f841f
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf
@@ -0,0 +1,46 @@
+## @file
+#  Instance of I/O Library using KVM/ARM safe assembler routines
+#
+#  Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+#  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+#  Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001A
+  BASE_NAME                      = BaseIoLibIntrinsicArmVirt
+  MODULE_UNI_FILE                = BaseIoLibIntrinsicArmVirt.uni
+  FILE_GUID                      = 217102b4-b465-4a1d-a2de-93dd385ec480
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = IoLib
+
+#
+#  VALID_ARCHITECTURES           = ARM AARCH64
+#
+
+[Sources]
+  IoLibMmioBuffer.c
+  BaseIoLibIntrinsicInternal.h
+  IoHighLevel.c
+
+[Sources.ARM]
+  IoLibArmVirt.c
+  Arm/ArmVirtMmio.S       | GCC
+  Arm/ArmVirtMmio.asm     | RVCT
+
+[Sources.AARCH64]
+  IoLibArmVirt.c
+  AArch64/ArmVirtMmio.S   | GCC
+  AArch64/ArmVirtMmio.asm | MSFT
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  DebugLib
+  BaseLib
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.uni b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.uni
new file mode 100644
index 000000000..758499c28
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.uni
@@ -0,0 +1,17 @@
+// /** @file
+//   Instance of I/O Library using KVM/ARM safe assembler routines
+//
+//   Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+//   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//   Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+//   Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+//
+//   SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT             #language en-US "Instance of I/O Library using KVM/ARM safe assembler routines"
+
+#string STR_MODULE_DESCRIPTION          #language en-US "I/O Library that uses assembler routines to perform MMIO accesses, to prevent link time code generation under LTO from emitting instructions that KVM on ARM cannot deal with."
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h
new file mode 100644
index 000000000..1aae45fa8
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h
@@ -0,0 +1,21 @@
+/** @file
+  Common header file shared by all source files.
+
+  This file includes package header files, dependent library classes.
+
+  Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef __BASEIOLIB_INTRINSIC_INTERNAL_H_
+#define __BASEIOLIB_INTRINSIC_INTERNAL_H_
+
+
+
+#include <Base.h>
+
+#include <Library/IoLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+
+#endif
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf
new file mode 100644
index 000000000..86a07e60f
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf
@@ -0,0 +1,52 @@
+## @file
+#  Instance of I/O Library using compiler intrinsics.
+#
+#  I/O Library that uses compiler intrinsics to perform IN and OUT instructions
+#  for IA-32 and x64.
+#
+#  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+#  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = BaseIoLibIntrinsicSev
+  MODULE_UNI_FILE                = BaseIoLibIntrinsic.uni
+  FILE_GUID                      = 93742f95-6e71-4581-b600-8e1da443f95a
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = IoLib
+
+
+#
+#  VALID_ARCHITECTURES           = IA32 X64
+#
+
+[Sources]
+  IoLibMmioBuffer.c
+  BaseIoLibIntrinsicInternal.h
+  IoHighLevel.c
+
+[Sources.IA32]
+  IoLibGcc.c    | GCC
+  IoLibMsc.c    | MSFT
+  IoLib.c
+  Ia32/IoFifoSev.nasm
+
+[Sources.X64]
+  IoLibGcc.c    | GCC
+  IoLibMsc.c    | MSFT
+  IoLib.c
+  X64/IoFifoSev.nasm
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  DebugLib
+  BaseLib
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
new file mode 100644
index 000000000..a4ae1a005
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
@@ -0,0 +1,131 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+    SECTION .text
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo8 (
+;    IN  UINTN                 Port,
+;    IN  UINTN                 Size,
+;    OUT VOID                  *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+    push    edi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+rep insb
+    pop     edi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo16 (
+;    IN  UINTN                 Port,
+;    IN  UINTN                 Size,
+;    OUT VOID                  *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+    push    edi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+rep insw
+    pop     edi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo32 (
+;    IN  UINTN                 Port,
+;    IN  UINTN                 Size,
+;    OUT VOID                  *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+    push    edi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+rep insd
+    pop     edi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo8 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+    push    esi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+rep outsb
+    pop     esi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo16 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+    push    esi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+rep outsw
+    pop     esi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo32 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+    push    esi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+rep outsd
+    pop     esi
+    ret
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifoSev.nasm b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifoSev.nasm
new file mode 100644
index 000000000..63a4771d3
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifoSev.nasm
@@ -0,0 +1,293 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+    SECTION .text
+
+;------------------------------------------------------------------------------
+; Check whether we need to unroll the String I/O under SEV guest
+;
+; Return // eax   (1 - unroll, 0 - no unroll)
+;------------------------------------------------------------------------------
+global ASM_PFX(SevNoRepIo)
+ASM_PFX(SevNoRepIo):
+
+  ; CPUID clobbers ebx, ecx and edx
+  push      ebx
+  push      ecx
+  push      edx
+
+  ; Check if we are running under hypervisor
+  ; CPUID(1).ECX Bit 31
+  mov       eax, 1
+  cpuid
+  bt        ecx, 31
+  jnc       @UseRepIo
+
+  ; Check if we have Memory encryption CPUID leaf
+  mov       eax, 0x80000000
+  cpuid
+  cmp       eax, 0x8000001f
+  jl        @UseRepIo
+
+  ; Check for memory encryption feature:
+  ;  CPUID  Fn8000_001F[EAX] - Bit 1
+  ;
+  mov       eax,  0x8000001f
+  cpuid
+  bt        eax, 1
+  jnc       @UseRepIo
+
+  ; Check if memory encryption is enabled
+  ;  MSR_0xC0010131 - Bit 0 (SEV enabled)
+  ;  MSR_0xC0010131 - Bit 1 (SEV-ES enabled)
+  mov       ecx, 0xc0010131
+  rdmsr
+
+  ; Check for (SevEsEnabled == 0 && SevEnabled == 1)
+  and       eax, 3
+  cmp       eax, 1
+  je        @SevNoRepIo_Done
+
+@UseRepIo:
+  xor       eax, eax
+
+@SevNoRepIo_Done:
+  pop       edx
+  pop       ecx
+  pop       ebx
+  ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo8 (
+;    IN  UINTN                 Port,
+;    IN  UINTN                 Size,
+;    OUT VOID                  *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+    push    edi
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoReadFifo8_NoRep
+
+    cld
+    rep     insb
+    jmp     @IoReadFifo8_Done
+
+@IoReadFifo8_NoRep:
+    jecxz   @IoReadFifo8_Done
+
+@IoReadFifo8_Loop:
+    in      al, dx
+    mov     byte [edi], al
+    inc     edi
+    loop    @IoReadFifo8_Loop
+
+@IoReadFifo8_Done:
+    pop     edi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo16 (
+;    IN  UINTN                 Port,
+;    IN  UINTN                 Size,
+;    OUT VOID                  *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+    push    edi
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoReadFifo16_NoRep
+
+    cld
+    rep     insw
+    jmp     @IoReadFifo16_Done
+
+@IoReadFifo16_NoRep:
+    jecxz   @IoReadFifo16_Done
+
+@IoReadFifo16_Loop:
+    in      ax, dx
+    mov     word [edi], ax
+    add     edi, 2
+    loop    @IoReadFifo16_Loop
+
+@IoReadFifo16_Done:
+    pop     edi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo32 (
+;    IN  UINTN                 Port,
+;    IN  UINTN                 Size,
+;    OUT VOID                  *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+    push    edi
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoReadFifo32_NoRep
+
+    cld
+    rep     insd
+    jmp     @IoReadFifo32_Done
+
+@IoReadFifo32_NoRep:
+    jecxz   @IoReadFifo32_Done
+
+@IoReadFifo32_Loop:
+    in      eax, dx
+    mov     dword [edi], eax
+    add     edi, 4
+    loop    @IoReadFifo32_Loop
+
+@IoReadFifo32_Done:
+    pop     edi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo8 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+    push    esi
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoWriteFifo8_NoRep
+
+    cld
+    rep     outsb
+    jmp     @IoWriteFifo8_Done
+
+@IoWriteFifo8_NoRep:
+    jecxz   @IoWriteFifo8_Done
+
+@IoWriteFifo8_Loop:
+    mov     al, byte [esi]
+    out     dx, al
+    inc     esi
+    loop    @IoWriteFifo8_Loop
+
+@IoWriteFifo8_Done:
+    pop     esi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo16 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+    push    esi
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoWriteFifo16_NoRep
+
+    cld
+    rep     outsw
+    jmp     @IoWriteFifo16_Done
+
+@IoWriteFifo16_NoRep:
+    jecxz   @IoWriteFifo16_Done
+
+@IoWriteFifo16_Loop:
+    mov     ax, word [esi]
+    out     dx, ax
+    add     esi, 2
+    loop    @IoWriteFifo16_Loop
+
+@IoWriteFifo16_Done:
+    pop     esi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo32 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+    push    esi
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoWriteFifo32_NoRep
+
+    cld
+    rep     outsd
+    jmp     @IoWriteFifo32_Done
+
+@IoWriteFifo32_NoRep:
+    jecxz   @IoWriteFifo32_Done
+
+@IoWriteFifo32_Loop:
+    mov     eax, dword [esi]
+    out     dx, eax
+    add     esi, 4
+    loop    @IoWriteFifo32_Loop
+
+@IoWriteFifo32_Done:
+    pop     esi
+    ret
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c
new file mode 100644
index 000000000..559f56931
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c
@@ -0,0 +1,2350 @@
+/** @file
+  High-level Io/Mmio functions.
+
+  All assertions for bit field operations are handled bit field functions in the
+  Base Library.
+
+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  The following IoLib instances contain the same copy of this file:
+
+    BaseIoLibIntrinsic
+    DxeIoLibCpuIo
+    PeiIoLibCpuIo
+
+**/
+
+#include "BaseIoLibIntrinsicInternal.h"
+
+/**
+  Reads an 8-bit I/O port, performs a bitwise OR, and writes the
+  result back to the 8-bit I/O port.
+
+  Reads the 8-bit I/O port specified by Port, performs a bitwise OR
+  between the read result and the value specified by OrData, and writes the
+  result to the 8-bit I/O port specified by Port. The value written to the I/O
+  port is returned. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  OrData  The value to OR with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoOr8 (
+  IN      UINTN                     Port,
+  IN      UINT8                     OrData
+  )
+{
+  return IoWrite8 (Port, (UINT8) (IoRead8 (Port) | OrData));
+}
+
+/**
+  Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back
+  to the 8-bit I/O port.
+
+  Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, and writes the result to
+  the 8-bit I/O port specified by Port. The value written to the I/O port is
+  returned. This function must guarantee that all I/O read and write operations
+  are serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  AndData The value to AND with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAnd8 (
+  IN      UINTN                     Port,
+  IN      UINT8                     AndData
+  )
+{
+  return IoWrite8 (Port, (UINT8) (IoRead8 (Port) & AndData));
+}
+
+/**
+  Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+  OR, and writes the result back to the 8-bit I/O port.
+
+  Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, performs a bitwise OR
+  between the result of the AND operation and the value specified by OrData,
+  and writes the result to the 8-bit I/O port specified by Port. The value
+  written to the I/O port is returned. This function must guarantee that all
+  I/O read and write operations are serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  AndData The value to AND with the read value from the I/O port.
+  @param  OrData  The value to OR with the result of the AND operation.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAndThenOr8 (
+  IN      UINTN                     Port,
+  IN      UINT8                     AndData,
+  IN      UINT8                     OrData
+  )
+{
+  return IoWrite8 (Port, (UINT8) ((IoRead8 (Port) & AndData) | OrData));
+}
+
+/**
+  Reads a bit field of an I/O register.
+
+  Reads the bit field in an 8-bit I/O register. The bit field is specified by
+  the StartBit and the EndBit. The value of the bit field is returned.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+  If StartBit is greater than 7, then ASSERT().
+  If EndBit is greater than 7, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+
+  @param  Port      The I/O port to read.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..7.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..7.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldRead8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit
+  )
+{
+  return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);
+}
+
+/**
+  Writes a bit field to an I/O register.
+
+  Writes Value to the bit field of the I/O register. The bit field is specified
+  by the StartBit and the EndBit. All other bits in the destination I/O
+  register are preserved. The value written to the I/O port is returned.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+  If StartBit is greater than 7, then ASSERT().
+  If EndBit is greater than 7, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..7.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..7.
+  @param  Value     The new value of the bit field.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldWrite8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT8                     Value
+  )
+{
+  return IoWrite8 (
+           Port,
+           BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)
+           );
+}
+
+/**
+  Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the
+  result back to the bit field in the 8-bit port.
+
+  Reads the 8-bit I/O port specified by Port, performs a bitwise OR
+  between the read result and the value specified by OrData, and writes the
+  result to the 8-bit I/O port specified by Port. The value written to the I/O
+  port is returned. This function must guarantee that all I/O read and write
+  operations are serialized. Extra bits left in OrData are stripped.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+  If StartBit is greater than 7, then ASSERT().
+  If EndBit is greater than 7, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..7.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..7.
+  @param  OrData    The value to OR with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldOr8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT8                     OrData
+  )
+{
+  return IoWrite8 (
+           Port,
+           BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)
+           );
+}
+
+/**
+  Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the
+  result back to the bit field in the 8-bit port.
+
+  Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, and writes the result to
+  the 8-bit I/O port specified by Port. The value written to the I/O port is
+  returned. This function must guarantee that all I/O read and write operations
+  are serialized. Extra bits left in AndData are stripped.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+  If StartBit is greater than 7, then ASSERT().
+  If EndBit is greater than 7, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..7.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..7.
+  @param  AndData   The value to AND with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAnd8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT8                     AndData
+  )
+{
+  return IoWrite8 (
+           Port,
+           BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)
+           );
+}
+
+/**
+  Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+  bitwise OR, and writes the result back to the bit field in the
+  8-bit port.
+
+  Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed
+  by a bitwise OR between the read result and the value specified by
+  AndData, and writes the result to the 8-bit I/O port specified by Port. The
+  value written to the I/O port is returned. This function must guarantee that
+  all I/O read and write operations are serialized. Extra bits left in both
+  AndData and OrData are stripped.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+  If StartBit is greater than 7, then ASSERT().
+  If EndBit is greater than 7, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..7.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..7.
+  @param  AndData   The value to AND with the read value from the I/O port.
+  @param  OrData    The value to OR with the result of the AND operation.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAndThenOr8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT8                     AndData,
+  IN      UINT8                     OrData
+  )
+{
+  return IoWrite8 (
+           Port,
+           BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)
+           );
+}
+
+/**
+  Reads a 16-bit I/O port, performs a bitwise OR, and writes the
+  result back to the 16-bit I/O port.
+
+  Reads the 16-bit I/O port specified by Port, performs a bitwise OR
+  between the read result and the value specified by OrData, and writes the
+  result to the 16-bit I/O port specified by Port. The value written to the I/O
+  port is returned. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  OrData  The value to OR with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoOr16 (
+  IN      UINTN                     Port,
+  IN      UINT16                    OrData
+  )
+{
+  return IoWrite16 (Port, (UINT16) (IoRead16 (Port) | OrData));
+}
+
+/**
+  Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back
+  to the 16-bit I/O port.
+
+  Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, and writes the result to
+  the 16-bit I/O port specified by Port. The value written to the I/O port is
+  returned. This function must guarantee that all I/O read and write operations
+  are serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  AndData The value to AND with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAnd16 (
+  IN      UINTN                     Port,
+  IN      UINT16                    AndData
+  )
+{
+  return IoWrite16 (Port, (UINT16) (IoRead16 (Port) & AndData));
+}
+
+/**
+  Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+  OR, and writes the result back to the 16-bit I/O port.
+
+  Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, performs a bitwise OR
+  between the result of the AND operation and the value specified by OrData,
+  and writes the result to the 16-bit I/O port specified by Port. The value
+  written to the I/O port is returned. This function must guarantee that all
+  I/O read and write operations are serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  AndData The value to AND with the read value from the I/O port.
+  @param  OrData  The value to OR with the result of the AND operation.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAndThenOr16 (
+  IN      UINTN                     Port,
+  IN      UINT16                    AndData,
+  IN      UINT16                    OrData
+  )
+{
+  return IoWrite16 (Port, (UINT16) ((IoRead16 (Port) & AndData) | OrData));
+}
+
+/**
+  Reads a bit field of an I/O register.
+
+  Reads the bit field in a 16-bit I/O register. The bit field is specified by
+  the StartBit and the EndBit. The value of the bit field is returned.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+  If StartBit is greater than 15, then ASSERT().
+  If EndBit is greater than 15, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+
+  @param  Port      The I/O port to read.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..15.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..15.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldRead16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit
+  )
+{
+  return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);
+}
+
+/**
+  Writes a bit field to an I/O register.
+
+  Writes Value to the bit field of the I/O register. The bit field is specified
+  by the StartBit and the EndBit. All other bits in the destination I/O
+  register are preserved. The value written to the I/O port is returned. Extra
+  bits left in Value are stripped.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+  If StartBit is greater than 15, then ASSERT().
+  If EndBit is greater than 15, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..15.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..15.
+  @param  Value     The new value of the bit field.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldWrite16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT16                    Value
+  )
+{
+  return IoWrite16 (
+           Port,
+           BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)
+           );
+}
+
+/**
+  Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the
+  result back to the bit field in the 16-bit port.
+
+  Reads the 16-bit I/O port specified by Port, performs a bitwise OR
+  between the read result and the value specified by OrData, and writes the
+  result to the 16-bit I/O port specified by Port. The value written to the I/O
+  port is returned. This function must guarantee that all I/O read and write
+  operations are serialized. Extra bits left in OrData are stripped.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+  If StartBit is greater than 15, then ASSERT().
+  If EndBit is greater than 15, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..15.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..15.
+  @param  OrData    The value to OR with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldOr16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT16                    OrData
+  )
+{
+  return IoWrite16 (
+           Port,
+           BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)
+           );
+}
+
+/**
+  Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the
+  result back to the bit field in the 16-bit port.
+
+  Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, and writes the result to
+  the 16-bit I/O port specified by Port. The value written to the I/O port is
+  returned. This function must guarantee that all I/O read and write operations
+  are serialized. Extra bits left in AndData are stripped.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+  If StartBit is greater than 15, then ASSERT().
+  If EndBit is greater than 15, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..15.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..15.
+  @param  AndData   The value to AND with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAnd16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT16                    AndData
+  )
+{
+  return IoWrite16 (
+           Port,
+           BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)
+           );
+}
+
+/**
+  Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+  bitwise OR, and writes the result back to the bit field in the
+  16-bit port.
+
+  Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed
+  by a bitwise OR between the read result and the value specified by
+  AndData, and writes the result to the 16-bit I/O port specified by Port. The
+  value written to the I/O port is returned. This function must guarantee that
+  all I/O read and write operations are serialized. Extra bits left in both
+  AndData and OrData are stripped.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+  If StartBit is greater than 15, then ASSERT().
+  If EndBit is greater than 15, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..15.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..15.
+  @param  AndData   The value to AND with the read value from the I/O port.
+  @param  OrData    The value to OR with the result of the AND operation.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAndThenOr16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT16                    AndData,
+  IN      UINT16                    OrData
+  )
+{
+  return IoWrite16 (
+           Port,
+           BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)
+           );
+}
+
+/**
+  Reads a 32-bit I/O port, performs a bitwise OR, and writes the
+  result back to the 32-bit I/O port.
+
+  Reads the 32-bit I/O port specified by Port, performs a bitwise OR
+  between the read result and the value specified by OrData, and writes the
+  result to the 32-bit I/O port specified by Port. The value written to the I/O
+  port is returned. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  OrData  The value to OR with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoOr32 (
+  IN      UINTN                     Port,
+  IN      UINT32                    OrData
+  )
+{
+  return IoWrite32 (Port, IoRead32 (Port) | OrData);
+}
+
+/**
+  Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back
+  to the 32-bit I/O port.
+
+  Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, and writes the result to
+  the 32-bit I/O port specified by Port. The value written to the I/O port is
+  returned. This function must guarantee that all I/O read and write operations
+  are serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  AndData The value to AND with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAnd32 (
+  IN      UINTN                     Port,
+  IN      UINT32                    AndData
+  )
+{
+  return IoWrite32 (Port, IoRead32 (Port) & AndData);
+}
+
+/**
+  Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+  OR, and writes the result back to the 32-bit I/O port.
+
+  Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, performs a bitwise OR
+  between the result of the AND operation and the value specified by OrData,
+  and writes the result to the 32-bit I/O port specified by Port. The value
+  written to the I/O port is returned. This function must guarantee that all
+  I/O read and write operations are serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  AndData The value to AND with the read value from the I/O port.
+  @param  OrData  The value to OR with the result of the AND operation.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAndThenOr32 (
+  IN      UINTN                     Port,
+  IN      UINT32                    AndData,
+  IN      UINT32                    OrData
+  )
+{
+  return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);
+}
+
+/**
+  Reads a bit field of an I/O register.
+
+  Reads the bit field in a 32-bit I/O register. The bit field is specified by
+  the StartBit and the EndBit. The value of the bit field is returned.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+  If StartBit is greater than 31, then ASSERT().
+  If EndBit is greater than 31, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+
+  @param  Port      The I/O port to read.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..31.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..31.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldRead32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit
+  )
+{
+  return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);
+}
+
+/**
+  Writes a bit field to an I/O register.
+
+  Writes Value to the bit field of the I/O register. The bit field is specified
+  by the StartBit and the EndBit. All other bits in the destination I/O
+  register are preserved. The value written to the I/O port is returned. Extra
+  bits left in Value are stripped.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+  If StartBit is greater than 31, then ASSERT().
+  If EndBit is greater than 31, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..31.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..31.
+  @param  Value     The new value of the bit field.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldWrite32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT32                    Value
+  )
+{
+  return IoWrite32 (
+           Port,
+           BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)
+           );
+}
+
+/**
+  Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the
+  result back to the bit field in the 32-bit port.
+
+  Reads the 32-bit I/O port specified by Port, performs a bitwise OR
+  between the read result and the value specified by OrData, and writes the
+  result to the 32-bit I/O port specified by Port. The value written to the I/O
+  port is returned. This function must guarantee that all I/O read and write
+  operations are serialized. Extra bits left in OrData are stripped.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+  If StartBit is greater than 31, then ASSERT().
+  If EndBit is greater than 31, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..31.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..31.
+  @param  OrData    The value to OR with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldOr32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT32                    OrData
+  )
+{
+  return IoWrite32 (
+           Port,
+           BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)
+           );
+}
+
+/**
+  Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the
+  result back to the bit field in the 32-bit port.
+
+  Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, and writes the result to
+  the 32-bit I/O port specified by Port. The value written to the I/O port is
+  returned. This function must guarantee that all I/O read and write operations
+  are serialized. Extra bits left in AndData are stripped.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+  If StartBit is greater than 31, then ASSERT().
+  If EndBit is greater than 31, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..31.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..31.
+  @param  AndData   The value to AND with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAnd32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT32                    AndData
+  )
+{
+  return IoWrite32 (
+           Port,
+           BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)
+           );
+}
+
+/**
+  Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+  bitwise OR, and writes the result back to the bit field in the
+  32-bit port.
+
+  Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed
+  by a bitwise OR between the read result and the value specified by
+  AndData, and writes the result to the 32-bit I/O port specified by Port. The
+  value written to the I/O port is returned. This function must guarantee that
+  all I/O read and write operations are serialized. Extra bits left in both
+  AndData and OrData are stripped.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+  If StartBit is greater than 31, then ASSERT().
+  If EndBit is greater than 31, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..31.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..31.
+  @param  AndData   The value to AND with the read value from the I/O port.
+  @param  OrData    The value to OR with the result of the AND operation.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAndThenOr32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT32                    AndData,
+  IN      UINT32                    OrData
+  )
+{
+  return IoWrite32 (
+           Port,
+           BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)
+           );
+}
+
+/**
+  Reads a 64-bit I/O port, performs a bitwise OR, and writes the
+  result back to the 64-bit I/O port.
+
+  Reads the 64-bit I/O port specified by Port, performs a bitwise OR
+  between the read result and the value specified by OrData, and writes the
+  result to the 64-bit I/O port specified by Port. The value written to the I/O
+  port is returned. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  OrData  The value to OR with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoOr64 (
+  IN      UINTN                     Port,
+  IN      UINT64                    OrData
+  )
+{
+  return IoWrite64 (Port, IoRead64 (Port) | OrData);
+}
+
+/**
+  Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back
+  to the 64-bit I/O port.
+
+  Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, and writes the result to
+  the 64-bit I/O port specified by Port. The value written to the I/O port is
+  returned. This function must guarantee that all I/O read and write operations
+  are serialized.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  AndData The value to AND with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAnd64 (
+  IN      UINTN                     Port,
+  IN      UINT64                    AndData
+  )
+{
+  return IoWrite64 (Port, IoRead64 (Port) & AndData);
+}
+
+/**
+  Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+  OR, and writes the result back to the 64-bit I/O port.
+
+  Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, performs a bitwise OR
+  between the result of the AND operation and the value specified by OrData,
+  and writes the result to the 64-bit I/O port specified by Port. The value
+  written to the I/O port is returned. This function must guarantee that all
+  I/O read and write operations are serialized.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  AndData The value to AND with the read value from the I/O port.
+  @param  OrData  The value to OR with the result of the AND operation.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAndThenOr64 (
+  IN      UINTN                     Port,
+  IN      UINT64                    AndData,
+  IN      UINT64                    OrData
+  )
+{
+  return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);
+}
+
+/**
+  Reads a bit field of an I/O register.
+
+  Reads the bit field in a 64-bit I/O register. The bit field is specified by
+  the StartBit and the EndBit. The value of the bit field is returned.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+  If StartBit is greater than 63, then ASSERT().
+  If EndBit is greater than 63, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+
+  @param  Port      The I/O port to read.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..63.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..63.
+
+  @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldRead64 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit
+  )
+{
+  return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);
+}
+
+/**
+  Writes a bit field to an I/O register.
+
+  Writes Value to the bit field of the I/O register. The bit field is specified
+  by the StartBit and the EndBit. All other bits in the destination I/O
+  register are preserved. The value written to the I/O port is returned. Extra
+  bits left in Value are stripped.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+  If StartBit is greater than 63, then ASSERT().
+  If EndBit is greater than 63, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..63.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..63.
+  @param  Value     The new value of the bit field.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldWrite64 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT64                    Value
+  )
+{
+  return IoWrite64 (
+           Port,
+           BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)
+           );
+}
+
+/**
+  Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the
+  result back to the bit field in the 64-bit port.
+
+  Reads the 64-bit I/O port specified by Port, performs a bitwise OR
+  between the read result and the value specified by OrData, and writes the
+  result to the 64-bit I/O port specified by Port. The value written to the I/O
+  port is returned. This function must guarantee that all I/O read and write
+  operations are serialized. Extra bits left in OrData are stripped.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+  If StartBit is greater than 63, then ASSERT().
+  If EndBit is greater than 63, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..63.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..63.
+  @param  OrData    The value to OR with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldOr64 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT64                    OrData
+  )
+{
+  return IoWrite64 (
+           Port,
+           BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)
+           );
+}
+
+/**
+  Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the
+  result back to the bit field in the 64-bit port.
+
+  Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+  the read result and the value specified by AndData, and writes the result to
+  the 64-bit I/O port specified by Port. The value written to the I/O port is
+  returned. This function must guarantee that all I/O read and write operations
+  are serialized. Extra bits left in AndData are stripped.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+  If StartBit is greater than 63, then ASSERT().
+  If EndBit is greater than 63, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..63.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..63.
+  @param  AndData   The value to AND with the read value from the I/O port.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAnd64 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT64                    AndData
+  )
+{
+  return IoWrite64 (
+           Port,
+           BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)
+           );
+}
+
+/**
+  Reads a bit field in a 64-bit port, performs a bitwise AND followed by a
+  bitwise OR, and writes the result back to the bit field in the
+  64-bit port.
+
+  Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed
+  by a bitwise OR between the read result and the value specified by
+  AndData, and writes the result to the 64-bit I/O port specified by Port. The
+  value written to the I/O port is returned. This function must guarantee that
+  all I/O read and write operations are serialized. Extra bits left in both
+  AndData and OrData are stripped.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+  If StartBit is greater than 63, then ASSERT().
+  If EndBit is greater than 63, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Port      The I/O port to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..63.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..63.
+  @param  AndData   The value to AND with the read value from the I/O port.
+  @param  OrData    The value to OR with the result of the AND operation.
+
+  @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAndThenOr64 (
+  IN      UINTN                     Port,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT64                    AndData,
+  IN      UINT64                    OrData
+  )
+{
+  return IoWrite64 (
+           Port,
+           BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)
+           );
+}
+
+/**
+  Reads an 8-bit MMIO register, performs a bitwise OR, and writes the
+  result back to the 8-bit MMIO register.
+
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise
+  OR between the read result and the value specified by OrData, and
+  writes the result to the 8-bit MMIO register specified by Address. The value
+  written to the MMIO register is returned. This function must guarantee that
+  all MMIO read and write operations are serialized.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  OrData  The value to OR with the read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioOr8 (
+  IN      UINTN                     Address,
+  IN      UINT8                     OrData
+  )
+{
+  return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) | OrData));
+}
+
+/**
+  Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result
+  back to the 8-bit MMIO register.
+
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, and writes the
+  result to the 8-bit MMIO register specified by Address. The value written to
+  the MMIO register is returned. This function must guarantee that all MMIO
+  read and write operations are serialized.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  AndData The value to AND with the read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAnd8 (
+  IN      UINTN                     Address,
+  IN      UINT8                     AndData
+  )
+{
+  return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) & AndData));
+}
+
+/**
+  Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+  OR, and writes the result back to the 8-bit MMIO register.
+
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, performs a
+  bitwise OR between the result of the AND operation and the value specified by
+  OrData, and writes the result to the 8-bit MMIO register specified by
+  Address. The value written to the MMIO register is returned. This function
+  must guarantee that all MMIO read and write operations are serialized.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+
+
+  @param  Address The MMIO register to write.
+  @param  AndData The value to AND with the read value from the MMIO register.
+  @param  OrData  The value to OR with the result of the AND operation.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAndThenOr8 (
+  IN      UINTN                     Address,
+  IN      UINT8                     AndData,
+  IN      UINT8                     OrData
+  )
+{
+  return MmioWrite8 (Address, (UINT8) ((MmioRead8 (Address) & AndData) | OrData));
+}
+
+/**
+  Reads a bit field of a MMIO register.
+
+  Reads the bit field in an 8-bit MMIO register. The bit field is specified by
+  the StartBit and the EndBit. The value of the bit field is returned.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+  If StartBit is greater than 7, then ASSERT().
+  If EndBit is greater than 7, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+
+  @param  Address   The MMIO register to read.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..7.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..7.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldRead8 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit
+  )
+{
+  return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);
+}
+
+/**
+  Writes a bit field to a MMIO register.
+
+  Writes Value to the bit field of the MMIO register. The bit field is
+  specified by the StartBit and the EndBit. All other bits in the destination
+  MMIO register are preserved. The new value of the 8-bit register is returned.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+  If StartBit is greater than 7, then ASSERT().
+  If EndBit is greater than 7, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..7.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..7.
+  @param  Value     The new value of the bit field.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldWrite8 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT8                     Value
+  )
+{
+  return MmioWrite8 (
+           Address,
+           BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)
+           );
+}
+
+/**
+  Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and
+  writes the result back to the bit field in the 8-bit MMIO register.
+
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise
+  OR between the read result and the value specified by OrData, and
+  writes the result to the 8-bit MMIO register specified by Address. The value
+  written to the MMIO register is returned. This function must guarantee that
+  all MMIO read and write operations are serialized. Extra bits left in OrData
+  are stripped.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+  If StartBit is greater than 7, then ASSERT().
+  If EndBit is greater than 7, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..7.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..7.
+  @param  OrData    The value to OR with read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldOr8 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT8                     OrData
+  )
+{
+  return MmioWrite8 (
+           Address,
+           BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)
+           );
+}
+
+/**
+  Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and
+  writes the result back to the bit field in the 8-bit MMIO register.
+
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, and writes the
+  result to the 8-bit MMIO register specified by Address. The value written to
+  the MMIO register is returned. This function must guarantee that all MMIO
+  read and write operations are serialized. Extra bits left in AndData are
+  stripped.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+  If StartBit is greater than 7, then ASSERT().
+  If EndBit is greater than 7, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..7.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..7.
+  @param  AndData   The value to AND with read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAnd8 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT8                     AndData
+  )
+{
+  return MmioWrite8 (
+           Address,
+           BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)
+           );
+}
+
+/**
+  Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed
+  by a bitwise OR, and writes the result back to the bit field in the
+  8-bit MMIO register.
+
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+  followed by a bitwise OR between the read result and the value
+  specified by AndData, and writes the result to the 8-bit MMIO register
+  specified by Address. The value written to the MMIO register is returned.
+  This function must guarantee that all MMIO read and write operations are
+  serialized. Extra bits left in both AndData and OrData are stripped.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+  If StartBit is greater than 7, then ASSERT().
+  If EndBit is greater than 7, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..7.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..7.
+  @param  AndData   The value to AND with read value from the MMIO register.
+  @param  OrData    The value to OR with the result of the AND operation.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAndThenOr8 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT8                     AndData,
+  IN      UINT8                     OrData
+  )
+{
+  return MmioWrite8 (
+           Address,
+           BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)
+           );
+}
+
+/**
+  Reads a 16-bit MMIO register, performs a bitwise OR, and writes the
+  result back to the 16-bit MMIO register.
+
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise
+  OR between the read result and the value specified by OrData, and
+  writes the result to the 16-bit MMIO register specified by Address. The value
+  written to the MMIO register is returned. This function must guarantee that
+  all MMIO read and write operations are serialized.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  OrData  The value to OR with the read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioOr16 (
+  IN      UINTN                     Address,
+  IN      UINT16                    OrData
+  )
+{
+  return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) | OrData));
+}
+
+/**
+  Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result
+  back to the 16-bit MMIO register.
+
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, and writes the
+  result to the 16-bit MMIO register specified by Address. The value written to
+  the MMIO register is returned. This function must guarantee that all MMIO
+  read and write operations are serialized.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  AndData The value to AND with the read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAnd16 (
+  IN      UINTN                     Address,
+  IN      UINT16                    AndData
+  )
+{
+  return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) & AndData));
+}
+
+/**
+  Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+  OR, and writes the result back to the 16-bit MMIO register.
+
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, performs a
+  bitwise OR between the result of the AND operation and the value specified by
+  OrData, and writes the result to the 16-bit MMIO register specified by
+  Address. The value written to the MMIO register is returned. This function
+  must guarantee that all MMIO read and write operations are serialized.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  AndData The value to AND with the read value from the MMIO register.
+  @param  OrData  The value to OR with the result of the AND operation.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAndThenOr16 (
+  IN      UINTN                     Address,
+  IN      UINT16                    AndData,
+  IN      UINT16                    OrData
+  )
+{
+  return MmioWrite16 (Address, (UINT16) ((MmioRead16 (Address) & AndData) | OrData));
+}
+
+/**
+  Reads a bit field of a MMIO register.
+
+  Reads the bit field in a 16-bit MMIO register. The bit field is specified by
+  the StartBit and the EndBit. The value of the bit field is returned.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 16-bit boundary, then ASSERT().
+  If StartBit is greater than 15, then ASSERT().
+  If EndBit is greater than 15, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+
+  @param  Address   The MMIO register to read.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..15.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..15.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldRead16 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit
+  )
+{
+  return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);
+}
+
+/**
+  Writes a bit field to a MMIO register.
+
+  Writes Value to the bit field of the MMIO register. The bit field is
+  specified by the StartBit and the EndBit. All other bits in the destination
+  MMIO register are preserved. The new value of the 16-bit register is returned.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 16-bit boundary, then ASSERT().
+  If StartBit is greater than 15, then ASSERT().
+  If EndBit is greater than 15, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..15.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..15.
+  @param  Value     The new value of the bit field.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldWrite16 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT16                    Value
+  )
+{
+  return MmioWrite16 (
+           Address,
+           BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)
+           );
+}
+
+/**
+  Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and
+  writes the result back to the bit field in the 16-bit MMIO register.
+
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise
+  OR between the read result and the value specified by OrData, and
+  writes the result to the 16-bit MMIO register specified by Address. The value
+  written to the MMIO register is returned. This function must guarantee that
+  all MMIO read and write operations are serialized. Extra bits left in OrData
+  are stripped.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 16-bit boundary, then ASSERT().
+  If StartBit is greater than 15, then ASSERT().
+  If EndBit is greater than 15, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..15.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..15.
+  @param  OrData    The value to OR with read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldOr16 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT16                    OrData
+  )
+{
+  return MmioWrite16 (
+           Address,
+           BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)
+           );
+}
+
+/**
+  Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and
+  writes the result back to the bit field in the 16-bit MMIO register.
+
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, and writes the
+  result to the 16-bit MMIO register specified by Address. The value written to
+  the MMIO register is returned. This function must guarantee that all MMIO
+  read and write operations are serialized. Extra bits left in AndData are
+  stripped.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 16-bit boundary, then ASSERT().
+  If StartBit is greater than 15, then ASSERT().
+  If EndBit is greater than 15, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..15.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..15.
+  @param  AndData   The value to AND with read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAnd16 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT16                    AndData
+  )
+{
+  return MmioWrite16 (
+           Address,
+           BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)
+           );
+}
+
+/**
+  Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed
+  by a bitwise OR, and writes the result back to the bit field in the
+  16-bit MMIO register.
+
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+  followed by a bitwise OR between the read result and the value
+  specified by AndData, and writes the result to the 16-bit MMIO register
+  specified by Address. The value written to the MMIO register is returned.
+  This function must guarantee that all MMIO read and write operations are
+  serialized. Extra bits left in both AndData and OrData are stripped.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 16-bit boundary, then ASSERT().
+  If StartBit is greater than 15, then ASSERT().
+  If EndBit is greater than 15, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..15.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..15.
+  @param  AndData   The value to AND with read value from the MMIO register.
+  @param  OrData    The value to OR with the result of the AND operation.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAndThenOr16 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT16                    AndData,
+  IN      UINT16                    OrData
+  )
+{
+  return MmioWrite16 (
+           Address,
+           BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)
+           );
+}
+
+/**
+  Reads a 32-bit MMIO register, performs a bitwise OR, and writes the
+  result back to the 32-bit MMIO register.
+
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise
+  OR between the read result and the value specified by OrData, and
+  writes the result to the 32-bit MMIO register specified by Address. The value
+  written to the MMIO register is returned. This function must guarantee that
+  all MMIO read and write operations are serialized.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  OrData  The value to OR with the read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioOr32 (
+  IN      UINTN                     Address,
+  IN      UINT32                    OrData
+  )
+{
+  return MmioWrite32 (Address, MmioRead32 (Address) | OrData);
+}
+
+/**
+  Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result
+  back to the 32-bit MMIO register.
+
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, and writes the
+  result to the 32-bit MMIO register specified by Address. The value written to
+  the MMIO register is returned. This function must guarantee that all MMIO
+  read and write operations are serialized.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  AndData The value to AND with the read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAnd32 (
+  IN      UINTN                     Address,
+  IN      UINT32                    AndData
+  )
+{
+  return MmioWrite32 (Address, MmioRead32 (Address) & AndData);
+}
+
+/**
+  Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+  OR, and writes the result back to the 32-bit MMIO register.
+
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, performs a
+  bitwise OR between the result of the AND operation and the value specified by
+  OrData, and writes the result to the 32-bit MMIO register specified by
+  Address. The value written to the MMIO register is returned. This function
+  must guarantee that all MMIO read and write operations are serialized.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  AndData The value to AND with the read value from the MMIO register.
+  @param  OrData  The value to OR with the result of the AND operation.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAndThenOr32 (
+  IN      UINTN                     Address,
+  IN      UINT32                    AndData,
+  IN      UINT32                    OrData
+  )
+{
+  return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);
+}
+
+/**
+  Reads a bit field of a MMIO register.
+
+  Reads the bit field in a 32-bit MMIO register. The bit field is specified by
+  the StartBit and the EndBit. The value of the bit field is returned.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 32-bit boundary, then ASSERT().
+  If StartBit is greater than 31, then ASSERT().
+  If EndBit is greater than 31, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+
+  @param  Address   The MMIO register to read.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..31.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..31.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldRead32 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit
+  )
+{
+  return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);
+}
+
+/**
+  Writes a bit field to a MMIO register.
+
+  Writes Value to the bit field of the MMIO register. The bit field is
+  specified by the StartBit and the EndBit. All other bits in the destination
+  MMIO register are preserved. The new value of the 32-bit register is returned.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 32-bit boundary, then ASSERT().
+  If StartBit is greater than 31, then ASSERT().
+  If EndBit is greater than 31, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..31.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..31.
+  @param  Value     The new value of the bit field.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldWrite32 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT32                    Value
+  )
+{
+  return MmioWrite32 (
+           Address,
+           BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)
+           );
+}
+
+/**
+  Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and
+  writes the result back to the bit field in the 32-bit MMIO register.
+
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise
+  OR between the read result and the value specified by OrData, and
+  writes the result to the 32-bit MMIO register specified by Address. The value
+  written to the MMIO register is returned. This function must guarantee that
+  all MMIO read and write operations are serialized. Extra bits left in OrData
+  are stripped.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 32-bit boundary, then ASSERT().
+  If StartBit is greater than 31, then ASSERT().
+  If EndBit is greater than 31, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..31.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..31.
+  @param  OrData    The value to OR with read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldOr32 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT32                    OrData
+  )
+{
+  return MmioWrite32 (
+           Address,
+           BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)
+           );
+}
+
+/**
+  Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and
+  writes the result back to the bit field in the 32-bit MMIO register.
+
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, and writes the
+  result to the 32-bit MMIO register specified by Address. The value written to
+  the MMIO register is returned. This function must guarantee that all MMIO
+  read and write operations are serialized. Extra bits left in AndData are
+  stripped.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 32-bit boundary, then ASSERT().
+  If StartBit is greater than 31, then ASSERT().
+  If EndBit is greater than 31, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..31.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..31.
+  @param  AndData   The value to AND with read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAnd32 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT32                    AndData
+  )
+{
+  return MmioWrite32 (
+           Address,
+           BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)
+           );
+}
+
+/**
+  Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed
+  by a bitwise OR, and writes the result back to the bit field in the
+  32-bit MMIO register.
+
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+  followed by a bitwise OR between the read result and the value
+  specified by AndData, and writes the result to the 32-bit MMIO register
+  specified by Address. The value written to the MMIO register is returned.
+  This function must guarantee that all MMIO read and write operations are
+  serialized. Extra bits left in both AndData and OrData are stripped.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 32-bit boundary, then ASSERT().
+  If StartBit is greater than 31, then ASSERT().
+  If EndBit is greater than 31, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..31.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..31.
+  @param  AndData   The value to AND with read value from the MMIO register.
+  @param  OrData    The value to OR with the result of the AND operation.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAndThenOr32 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT32                    AndData,
+  IN      UINT32                    OrData
+  )
+{
+  return MmioWrite32 (
+           Address,
+           BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)
+           );
+}
+
+/**
+  Reads a 64-bit MMIO register, performs a bitwise OR, and writes the
+  result back to the 64-bit MMIO register.
+
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise
+  OR between the read result and the value specified by OrData, and
+  writes the result to the 64-bit MMIO register specified by Address. The value
+  written to the MMIO register is returned. This function must guarantee that
+  all MMIO read and write operations are serialized.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  OrData  The value to OR with the read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioOr64 (
+  IN      UINTN                     Address,
+  IN      UINT64                    OrData
+  )
+{
+  return MmioWrite64 (Address, MmioRead64 (Address) | OrData);
+}
+
+/**
+  Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result
+  back to the 64-bit MMIO register.
+
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, and writes the
+  result to the 64-bit MMIO register specified by Address. The value written to
+  the MMIO register is returned. This function must guarantee that all MMIO
+  read and write operations are serialized.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  AndData The value to AND with the read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAnd64 (
+  IN      UINTN                     Address,
+  IN      UINT64                    AndData
+  )
+{
+  return MmioWrite64 (Address, MmioRead64 (Address) & AndData);
+}
+
+/**
+  Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+  OR, and writes the result back to the 64-bit MMIO register.
+
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, performs a
+  bitwise OR between the result of the AND operation and the value specified by
+  OrData, and writes the result to the 64-bit MMIO register specified by
+  Address. The value written to the MMIO register is returned. This function
+  must guarantee that all MMIO read and write operations are serialized.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  AndData The value to AND with the read value from the MMIO register.
+  @param  OrData  The value to OR with the result of the AND operation.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAndThenOr64 (
+  IN      UINTN                     Address,
+  IN      UINT64                    AndData,
+  IN      UINT64                    OrData
+  )
+{
+  return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);
+}
+
+/**
+  Reads a bit field of a MMIO register.
+
+  Reads the bit field in a 64-bit MMIO register. The bit field is specified by
+  the StartBit and the EndBit. The value of the bit field is returned.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 64-bit boundary, then ASSERT().
+  If StartBit is greater than 63, then ASSERT().
+  If EndBit is greater than 63, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+
+  @param  Address   The MMIO register to read.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..63.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..63.
+
+  @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldRead64 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit
+  )
+{
+  return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);
+}
+
+/**
+  Writes a bit field to a MMIO register.
+
+  Writes Value to the bit field of the MMIO register. The bit field is
+  specified by the StartBit and the EndBit. All other bits in the destination
+  MMIO register are preserved. The new value of the 64-bit register is returned.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 64-bit boundary, then ASSERT().
+  If StartBit is greater than 63, then ASSERT().
+  If EndBit is greater than 63, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..63.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..63.
+  @param  Value     The new value of the bit field.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldWrite64 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT64                    Value
+  )
+{
+  return MmioWrite64 (
+           Address,
+           BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)
+           );
+}
+
+/**
+  Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and
+  writes the result back to the bit field in the 64-bit MMIO register.
+
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise
+  OR between the read result and the value specified by OrData, and
+  writes the result to the 64-bit MMIO register specified by Address. The value
+  written to the MMIO register is returned. This function must guarantee that
+  all MMIO read and write operations are serialized. Extra bits left in OrData
+  are stripped.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 64-bit boundary, then ASSERT().
+  If StartBit is greater than 63, then ASSERT().
+  If EndBit is greater than 63, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..63.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..63.
+  @param  OrData    The value to OR with read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldOr64 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT64                    OrData
+  )
+{
+  return MmioWrite64 (
+           Address,
+           BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)
+           );
+}
+
+/**
+  Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and
+  writes the result back to the bit field in the 64-bit MMIO register.
+
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+  between the read result and the value specified by AndData, and writes the
+  result to the 64-bit MMIO register specified by Address. The value written to
+  the MMIO register is returned. This function must guarantee that all MMIO
+  read and write operations are serialized. Extra bits left in AndData are
+  stripped.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 64-bit boundary, then ASSERT().
+  If StartBit is greater than 63, then ASSERT().
+  If EndBit is greater than 63, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..63.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..63.
+  @param  AndData   The value to AND with read value from the MMIO register.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAnd64 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT64                    AndData
+  )
+{
+  return MmioWrite64 (
+           Address,
+           BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)
+           );
+}
+
+/**
+  Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed
+  by a bitwise OR, and writes the result back to the bit field in the
+  64-bit MMIO register.
+
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+  followed by a bitwise OR between the read result and the value
+  specified by AndData, and writes the result to the 64-bit MMIO register
+  specified by Address. The value written to the MMIO register is returned.
+  This function must guarantee that all MMIO read and write operations are
+  serialized. Extra bits left in both AndData and OrData are stripped.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 64-bit boundary, then ASSERT().
+  If StartBit is greater than 63, then ASSERT().
+  If EndBit is greater than 63, then ASSERT().
+  If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+
+  @param  Address   The MMIO register to write.
+  @param  StartBit  The ordinal of the least significant bit in the bit field.
+                    Range 0..63.
+  @param  EndBit    The ordinal of the most significant bit in the bit field.
+                    Range 0..63.
+  @param  AndData   The value to AND with read value from the MMIO register.
+  @param  OrData    The value to OR with the result of the AND operation.
+
+  @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAndThenOr64 (
+  IN      UINTN                     Address,
+  IN      UINTN                     StartBit,
+  IN      UINTN                     EndBit,
+  IN      UINT64                    AndData,
+  IN      UINT64                    OrData
+  )
+{
+  return MmioWrite64 (
+           Address,
+           BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)
+           );
+}
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c
new file mode 100644
index 000000000..a6bbc9254
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c
@@ -0,0 +1,311 @@
+/** @file
+  Common I/O Library routines.
+
+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "BaseIoLibIntrinsicInternal.h"
+
+/**
+  Reads a 64-bit I/O port.
+
+  Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 64-bit I/O port.
+
+  Writes the 64-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+  IN      UINTN                     Port,
+  IN      UINT64                    Value
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+
+/**
+  Reads an 8-bit MMIO register.
+
+  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+  IN      UINTN                     Address
+  )
+{
+  UINT8                             Value;
+
+  MemoryFence ();
+  Value = *(volatile UINT8*)Address;
+  MemoryFence ();
+
+  return Value;
+}
+
+/**
+  Writes an 8-bit MMIO register.
+
+  Writes the 8-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+  @return Value.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+  IN      UINTN                     Address,
+  IN      UINT8                     Value
+  )
+{
+  MemoryFence ();
+  *(volatile UINT8*)Address = Value;
+  MemoryFence ();
+
+  return Value;
+}
+
+/**
+  Reads a 16-bit MMIO register.
+
+  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+  IN      UINTN                     Address
+  )
+{
+  UINT16                            Value;
+
+  ASSERT ((Address & 1) == 0);
+
+  MemoryFence ();
+  Value = *(volatile UINT16*)Address;
+  MemoryFence ();
+
+  return Value;
+}
+
+/**
+  Writes a 16-bit MMIO register.
+
+  Writes the 16-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+  @return Value.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+  IN      UINTN                     Address,
+  IN      UINT16                    Value
+  )
+{
+  ASSERT ((Address & 1) == 0);
+
+  MemoryFence ();
+  *(volatile UINT16*)Address = Value;
+  MemoryFence ();
+
+  return Value;
+}
+
+/**
+  Reads a 32-bit MMIO register.
+
+  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+  IN      UINTN                     Address
+  )
+{
+  UINT32                            Value;
+
+  ASSERT ((Address & 3) == 0);
+
+  MemoryFence ();
+  Value = *(volatile UINT32*)Address;
+  MemoryFence ();
+
+  return Value;
+}
+
+/**
+  Writes a 32-bit MMIO register.
+
+  Writes the 32-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+  @return Value.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+  IN      UINTN                     Address,
+  IN      UINT32                    Value
+  )
+{
+  ASSERT ((Address & 3) == 0);
+
+  MemoryFence ();
+  *(volatile UINT32*)Address = Value;
+  MemoryFence ();
+
+  return Value;
+}
+
+/**
+  Reads a 64-bit MMIO register.
+
+  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+  IN      UINTN                     Address
+  )
+{
+  UINT64                            Value;
+
+  ASSERT ((Address & 7) == 0);
+
+  MemoryFence ();
+  Value = *(volatile UINT64*)Address;
+  MemoryFence ();
+
+  return Value;
+}
+
+/**
+  Writes a 64-bit MMIO register.
+
+  Writes the 64-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+  If Address is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+  IN      UINTN                     Address,
+  IN      UINT64                    Value
+  )
+{
+  ASSERT ((Address & 7) == 0);
+
+  MemoryFence ();
+  *(volatile UINT64*)Address = Value;
+  MemoryFence ();
+
+  return Value;
+}
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c
new file mode 100644
index 000000000..9715705ee
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c
@@ -0,0 +1,727 @@
+/** @file
+  I/O Library for ARM.
+
+  Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+  Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "BaseIoLibIntrinsicInternal.h"
+
+/**
+  Reads an 8-bit MMIO register.
+
+  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8Internal (
+  IN      UINTN                     Address
+  );
+
+/**
+  Writes an 8-bit MMIO register.
+
+  Writes the 8-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+VOID
+EFIAPI
+MmioWrite8Internal (
+  IN      UINTN                     Address,
+  IN      UINT8                     Value
+  );
+
+/**
+  Reads a 16-bit MMIO register.
+
+  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16Internal (
+  IN      UINTN                     Address
+  );
+
+/**
+  Writes a 16-bit MMIO register.
+
+  Writes the 16-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+VOID
+EFIAPI
+MmioWrite16Internal (
+  IN      UINTN                     Address,
+  IN      UINT16                    Value
+  );
+
+/**
+  Reads a 32-bit MMIO register.
+
+  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32Internal (
+  IN      UINTN                     Address
+  );
+
+/**
+  Writes a 32-bit MMIO register.
+
+  Writes the 32-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+VOID
+EFIAPI
+MmioWrite32Internal (
+  IN      UINTN                     Address,
+  IN      UINT32                    Value
+  );
+
+/**
+  Reads a 64-bit MMIO register.
+
+  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64Internal (
+  IN      UINTN                     Address
+  );
+
+/**
+  Writes a 64-bit MMIO register.
+
+  Writes the 64-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+VOID
+EFIAPI
+MmioWrite64Internal (
+  IN      UINTN                     Address,
+  IN      UINT64                    Value
+  );
+
+/**
+  Reads an 8-bit I/O port.
+
+  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes an 8-bit I/O port.
+
+  Writes the 8-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+  IN      UINTN                     Port,
+  IN      UINT8                     Value
+  )
+{
+  ASSERT (FALSE);
+  return Value;
+}
+
+/**
+  Reads a 16-bit I/O port.
+
+  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 16-bit I/O port.
+
+  Writes the 16-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+  IN      UINTN                     Port,
+  IN      UINT16                    Value
+  )
+{
+  ASSERT (FALSE);
+  return Value;
+}
+
+/**
+  Reads a 32-bit I/O port.
+
+  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 32-bit I/O port.
+
+  Writes the 32-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+  IN      UINTN                     Port,
+  IN      UINT32                    Value
+  )
+{
+  ASSERT (FALSE);
+  return Value;
+}
+
+/**
+  Reads a 64-bit I/O port.
+
+  Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 64-bit I/O port.
+
+  Writes the 64-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+  IN      UINTN                     Port,
+  IN      UINT64                    Value
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Reads an 8-bit I/O port fifo into a block of memory.
+
+  Reads the 8-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into an 8-bit I/O port fifo.
+
+  Writes the 8-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Reads a 16-bit I/O port fifo into a block of memory.
+
+  Reads the 16-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into a 16-bit I/O port fifo.
+
+  Writes the 16-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Reads a 32-bit I/O port fifo into a block of memory.
+
+  Reads the 32-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into a 32-bit I/O port fifo.
+
+  Writes the 32-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Reads an 8-bit MMIO register.
+
+  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+  IN      UINTN                     Address
+  )
+{
+  return MmioRead8Internal (Address);
+}
+
+/**
+  Writes an 8-bit MMIO register.
+
+  Writes the 8-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+  IN      UINTN                     Address,
+  IN      UINT8                     Value
+  )
+{
+  MmioWrite8Internal (Address, Value);
+  return Value;
+}
+
+/**
+  Reads a 16-bit MMIO register.
+
+  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+  IN      UINTN                     Address
+  )
+{
+  ASSERT ((Address & 1) == 0);
+
+  return MmioRead16Internal (Address);
+}
+
+/**
+  Writes a 16-bit MMIO register.
+
+  Writes the 16-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+  IN      UINTN                     Address,
+  IN      UINT16                    Value
+  )
+{
+  ASSERT ((Address & 1) == 0);
+
+  MmioWrite16Internal (Address, Value);
+  return Value;
+}
+
+/**
+  Reads a 32-bit MMIO register.
+
+  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+  IN      UINTN                     Address
+  )
+{
+  ASSERT ((Address & 3) == 0);
+
+  return MmioRead32Internal (Address);
+}
+
+/**
+  Writes a 32-bit MMIO register.
+
+  Writes the 32-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+  IN      UINTN                     Address,
+  IN      UINT32                    Value
+  )
+{
+  ASSERT ((Address & 3) == 0);
+
+  MmioWrite32Internal (Address, Value);
+  return Value;
+}
+
+/**
+  Reads a 64-bit MMIO register.
+
+  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+  IN      UINTN                     Address
+  )
+{
+  ASSERT ((Address & 7) == 0);
+
+  return MmioRead64Internal (Address);
+}
+
+/**
+  Writes a 64-bit MMIO register.
+
+  Writes the 64-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+  IN      UINTN                     Address,
+  IN      UINT64                    Value
+  )
+{
+  ASSERT ((Address & 7) == 0);
+
+  MmioWrite64Internal (Address, Value);
+  return Value;
+}
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
new file mode 100644
index 000000000..98c774fa7
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
@@ -0,0 +1,336 @@
+/** @file
+  I/O Library for EBC.
+
+  EBC does not support port I/O.  All APIs in this file ASSERT().
+
+  Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "BaseIoLibIntrinsicInternal.h"
+
+/**
+  Reads an 8-bit I/O port.
+
+  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes an 8-bit I/O port.
+
+  Writes the 8-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+  IN      UINTN                     Port,
+  IN      UINT8                     Value
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Reads a 16-bit I/O port.
+
+  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 16-bit I/O port.
+
+  Writes the 16-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+  IN      UINTN                     Port,
+  IN      UINT16                    Value
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Reads a 32-bit I/O port.
+
+  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 32-bit I/O port.
+
+  Writes the 32-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+  IN      UINTN                     Port,
+  IN      UINT32                    Value
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Reads an 8-bit I/O port fifo into a block of memory.
+
+  Reads the 8-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into an 8-bit I/O port fifo.
+
+  Writes the 8-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Reads a 16-bit I/O port fifo into a block of memory.
+
+  Reads the 16-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into a 16-bit I/O port fifo.
+
+  Writes the 16-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Reads a 32-bit I/O port fifo into a block of memory.
+
+  Reads the 32-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into a 32-bit I/O port fifo.
+
+  Writes the 32-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
new file mode 100644
index 000000000..b3a1a2025
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
@@ -0,0 +1,184 @@
+/** @file
+  I/O Library. This file has compiler specifics for GCC as there is no
+  ANSI C standard for doing IO.
+
+  GCC - uses EFIAPI assembler. __asm__ calls GAS. __volatile__ makes sure the
+  compiler puts the assembler in this exact location. The complex GNUC
+  operations are not optimzed. It would be possible to also write these
+  with EFIAPI assembler.
+
+  We don't advocate putting compiler specifics in libraries or drivers but there
+  is no other way to make this work.
+
+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#include "BaseIoLibIntrinsicInternal.h"
+
+/**
+  Reads an 8-bit I/O port.
+
+  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+  IN      UINTN                     Port
+  )
+{
+  UINT8   Data;
+
+  __asm__ __volatile__ ("inb %w1,%b0" : "=a" (Data) : "d" ((UINT16)Port));
+  return Data;
+}
+
+/**
+  Writes an 8-bit I/O port.
+
+  Writes the 8-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+  IN      UINTN                     Port,
+  IN      UINT8                     Value
+  )
+{
+  __asm__ __volatile__ ("outb %b0,%w1" : : "a" (Value), "d" ((UINT16)Port));
+  return Value;;
+}
+
+/**
+  Reads a 16-bit I/O port.
+
+  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+  IN      UINTN                     Port
+  )
+{
+  UINT16   Data;
+
+  ASSERT ((Port & 1) == 0);
+  __asm__ __volatile__ ("inw %w1,%w0" : "=a" (Data) : "d" ((UINT16)Port));
+  return Data;
+}
+
+/**
+  Writes a 16-bit I/O port.
+
+  Writes the 16-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+  IN      UINTN                     Port,
+  IN      UINT16                    Value
+  )
+{
+  ASSERT ((Port & 1) == 0);
+  __asm__ __volatile__ ("outw %w0,%w1" : : "a" (Value), "d" ((UINT16)Port));
+  return Value;;
+}
+
+/**
+  Reads a 32-bit I/O port.
+
+  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+  IN      UINTN                     Port
+  )
+{
+  UINT32   Data;
+
+  ASSERT ((Port & 3) == 0);
+  __asm__ __volatile__ ("inl %w1,%0" : "=a" (Data) : "d" ((UINT16)Port));
+  return Data;
+}
+
+/**
+  Writes a 32-bit I/O port.
+
+  Writes the 32-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+  IN      UINTN                     Port,
+  IN      UINT32                    Value
+  )
+{
+  ASSERT ((Port & 3) == 0);
+  __asm__ __volatile__ ("outl %0,%w1" : : "a" (Value), "d" ((UINT16)Port));
+  return Value;
+}
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c
new file mode 100644
index 000000000..6059bab6b
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c
@@ -0,0 +1,405 @@
+/** @file
+  I/O Library MMIO Buffer Functions.
+
+  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "BaseIoLibIntrinsicInternal.h"
+
+/**
+  Copy data from the MMIO region to system memory by using 8-bit access.
+
+  Copy data from the MMIO region specified by starting address StartAddress
+  to system memory specified by Buffer by using 8-bit access. The total
+  number of byte to be copied is specified by Length. Buffer is returned.
+
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+
+  @param  StartAddress    The starting address for the MMIO region to be copied from.
+  @param  Length          The size, in bytes, of Buffer.
+  @param  Buffer          The pointer to a system memory buffer receiving the data read.
+
+  @return Buffer
+
+**/
+UINT8 *
+EFIAPI
+MmioReadBuffer8 (
+  IN  UINTN       StartAddress,
+  IN  UINTN       Length,
+  OUT UINT8       *Buffer
+  )
+{
+  UINT8   *ReturnBuffer;
+
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));
+
+  ReturnBuffer = Buffer;
+
+  while (Length-- != 0) {
+    *(Buffer++) = MmioRead8 (StartAddress++);
+  }
+
+  return ReturnBuffer;
+}
+
+/**
+  Copy data from the MMIO region to system memory by using 16-bit access.
+
+  Copy data from the MMIO region specified by starting address StartAddress
+  to system memory specified by Buffer by using 16-bit access. The total
+  number of byte to be copied is specified by Length. Buffer is returned.
+
+  If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+  If Length is not aligned on a 16-bit boundary, then ASSERT().
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  StartAddress    The starting address for the MMIO region to be copied from.
+  @param  Length          The size, in bytes, of Buffer.
+  @param  Buffer          The pointer to a system memory buffer receiving the data read.
+
+  @return Buffer
+
+**/
+UINT16 *
+EFIAPI
+MmioReadBuffer16 (
+  IN  UINTN       StartAddress,
+  IN  UINTN       Length,
+  OUT UINT16      *Buffer
+  )
+{
+  UINT16    *ReturnBuffer;
+
+  ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
+
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));
+
+  ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);
+  ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
+
+  ReturnBuffer = Buffer;
+
+  while (Length != 0) {
+    *(Buffer++) = MmioRead16 (StartAddress);
+    StartAddress += sizeof (UINT16);
+    Length -= sizeof (UINT16);
+  }
+
+  return ReturnBuffer;
+}
+
+/**
+  Copy data from the MMIO region to system memory by using 32-bit access.
+
+  Copy data from the MMIO region specified by starting address StartAddress
+  to system memory specified by Buffer by using 32-bit access. The total
+  number of byte to be copied is specified by Length. Buffer is returned.
+
+  If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+  If Length is not aligned on a 32-bit boundary, then ASSERT().
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  StartAddress    The starting address for the MMIO region to be copied from.
+  @param  Length          The size, in bytes, of Buffer.
+  @param  Buffer          The pointer to a system memory buffer receiving the data read.
+
+  @return Buffer
+
+**/
+UINT32 *
+EFIAPI
+MmioReadBuffer32 (
+  IN  UINTN       StartAddress,
+  IN  UINTN       Length,
+  OUT UINT32      *Buffer
+  )
+{
+  UINT32    *ReturnBuffer;
+
+  ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
+
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));
+
+  ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);
+  ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
+
+  ReturnBuffer = Buffer;
+
+  while (Length != 0) {
+    *(Buffer++) = MmioRead32 (StartAddress);
+    StartAddress += sizeof (UINT32);
+    Length -= sizeof (UINT32);
+  }
+
+  return ReturnBuffer;
+}
+
+/**
+  Copy data from the MMIO region to system memory by using 64-bit access.
+
+  Copy data from the MMIO region specified by starting address StartAddress
+  to system memory specified by Buffer by using 64-bit access. The total
+  number of byte to be copied is specified by Length. Buffer is returned.
+
+  If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+  If Length is not aligned on a 64-bit boundary, then ASSERT().
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  StartAddress    The starting address for the MMIO region to be copied from.
+  @param  Length          The size, in bytes, of Buffer.
+  @param  Buffer          The pointer to a system memory buffer receiving the data read.
+
+  @return Buffer
+
+**/
+UINT64 *
+EFIAPI
+MmioReadBuffer64 (
+  IN  UINTN       StartAddress,
+  IN  UINTN       Length,
+  OUT UINT64      *Buffer
+  )
+{
+  UINT64    *ReturnBuffer;
+
+  ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
+
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));
+
+  ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);
+  ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
+
+  ReturnBuffer = Buffer;
+
+  while (Length != 0) {
+    *(Buffer++) = MmioRead64 (StartAddress);
+    StartAddress += sizeof (UINT64);
+    Length -= sizeof (UINT64);
+  }
+
+  return ReturnBuffer;
+}
+
+
+/**
+  Copy data from system memory to the MMIO region by using 8-bit access.
+
+  Copy data from system memory specified by Buffer to the MMIO region specified
+  by starting address StartAddress by using 8-bit access. The total number
+  of byte to be copied is specified by Length. Buffer is returned.
+
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+  If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+
+  @param  StartAddress    The starting address for the MMIO region to be copied to.
+  @param  Length          The size, in bytes, of Buffer.
+  @param  Buffer          The pointer to a system memory buffer containing the data to write.
+
+  @return Buffer
+
+**/
+UINT8 *
+EFIAPI
+MmioWriteBuffer8 (
+  IN  UINTN         StartAddress,
+  IN  UINTN         Length,
+  IN  CONST UINT8   *Buffer
+  )
+{
+  VOID* ReturnBuffer;
+
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));
+
+  ReturnBuffer = (UINT8 *) Buffer;
+
+  while (Length-- != 0) {
+     MmioWrite8 (StartAddress++, *(Buffer++));
+  }
+
+  return ReturnBuffer;
+
+}
+
+/**
+  Copy data from system memory to the MMIO region by using 16-bit access.
+
+  Copy data from system memory specified by Buffer to the MMIO region specified
+  by starting address StartAddress by using 16-bit access. The total number
+  of byte to be copied is specified by Length. Buffer is returned.
+
+  If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+  If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+  If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  StartAddress    The starting address for the MMIO region to be copied to.
+  @param  Length          The size, in bytes, of Buffer.
+  @param  Buffer          The pointer to a system memory buffer containing the data to write.
+
+  @return Buffer
+
+**/
+UINT16 *
+EFIAPI
+MmioWriteBuffer16 (
+  IN  UINTN        StartAddress,
+  IN  UINTN        Length,
+  IN  CONST UINT16 *Buffer
+  )
+{
+  UINT16    *ReturnBuffer;
+
+  ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
+
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));
+
+  ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);
+  ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
+
+  ReturnBuffer = (UINT16 *) Buffer;
+
+  while (Length != 0) {
+    MmioWrite16 (StartAddress, *(Buffer++));
+
+    StartAddress += sizeof (UINT16);
+    Length -= sizeof (UINT16);
+  }
+
+  return ReturnBuffer;
+}
+
+
+/**
+  Copy data from system memory to the MMIO region by using 32-bit access.
+
+  Copy data from system memory specified by Buffer to the MMIO region specified
+  by starting address StartAddress by using 32-bit access. The total number
+  of byte to be copied is specified by Length. Buffer is returned.
+
+  If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+  If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+  If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  StartAddress    The starting address for the MMIO region to be copied to.
+  @param  Length          The size, in bytes, of Buffer.
+  @param  Buffer          The pointer to a system memory buffer containing the data to write.
+
+  @return Buffer
+
+**/
+UINT32 *
+EFIAPI
+MmioWriteBuffer32 (
+  IN  UINTN        StartAddress,
+  IN  UINTN        Length,
+  IN  CONST UINT32 *Buffer
+  )
+{
+  UINT32    *ReturnBuffer;
+
+  ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
+
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));
+
+  ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);
+  ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
+
+  ReturnBuffer = (UINT32 *) Buffer;
+
+  while (Length != 0) {
+    MmioWrite32 (StartAddress, *(Buffer++));
+
+    StartAddress += sizeof (UINT32);
+    Length -= sizeof (UINT32);
+  }
+
+  return ReturnBuffer;
+}
+
+/**
+  Copy data from system memory to the MMIO region by using 64-bit access.
+
+  Copy data from system memory specified by Buffer to the MMIO region specified
+  by starting address StartAddress by using 64-bit access. The total number
+  of byte to be copied is specified by Length. Buffer is returned.
+
+  If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+  If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+  If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  StartAddress    The starting address for the MMIO region to be copied to.
+  @param  Length          The size, in bytes, of Buffer.
+  @param  Buffer          The pointer to a system memory buffer containing the data to write.
+
+  @return Buffer
+
+**/
+UINT64 *
+EFIAPI
+MmioWriteBuffer64 (
+  IN  UINTN        StartAddress,
+  IN  UINTN        Length,
+  IN  CONST UINT64 *Buffer
+  )
+{
+  UINT64    *ReturnBuffer;
+
+  ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
+
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));
+
+  ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);
+  ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
+
+  ReturnBuffer = (UINT64 *) Buffer;
+
+  while (Length != 0) {
+    MmioWrite64 (StartAddress, *(Buffer++));
+
+    StartAddress += sizeof (UINT64);
+    Length -= sizeof (UINT64);
+  }
+
+  return ReturnBuffer;
+}
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c
new file mode 100644
index 000000000..769dddfce
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c
@@ -0,0 +1,222 @@
+/** @file
+  I/O Library. This file has compiler specifics for Microsft C as there is no
+  ANSI C standard for doing IO.
+
+  MSC - uses intrinsic functions and the optimize will remove the function call
+  overhead.
+
+  We don't advocate putting compiler specifics in libraries or drivers but there
+  is no other way to make this work.
+
+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+
+#include "BaseIoLibIntrinsicInternal.h"
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.
+//
+
+int            _inp (unsigned short port);
+unsigned short _inpw (unsigned short port);
+unsigned long  _inpd (unsigned short port);
+int            _outp (unsigned short port, int databyte );
+unsigned short _outpw (unsigned short port, unsigned short dataword );
+unsigned long  _outpd (unsigned short port, unsigned long dataword );
+void          _ReadWriteBarrier (void);
+
+#pragma intrinsic(_inp)
+#pragma intrinsic(_inpw)
+#pragma intrinsic(_inpd)
+#pragma intrinsic(_outp)
+#pragma intrinsic(_outpw)
+#pragma intrinsic(_outpd)
+#pragma intrinsic(_ReadWriteBarrier)
+
+//
+// _ReadWriteBarrier() forces memory reads and writes to complete at the point
+// in the call. This is only a hint to the compiler and does emit code.
+// In past versions of the compiler, _ReadWriteBarrier was enforced only
+// locally and did not affect functions up the call tree. In Visual C++
+// 2005, _ReadWriteBarrier is enforced all the way up the call tree.
+//
+
+/**
+  Reads an 8-bit I/O port.
+
+  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+  IN      UINTN                     Port
+  )
+{
+  UINT8                             Value;
+
+  _ReadWriteBarrier ();
+  Value = (UINT8)_inp ((UINT16)Port);
+  _ReadWriteBarrier ();
+  return Value;
+}
+
+/**
+  Writes an 8-bit I/O port.
+
+  Writes the 8-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+  IN      UINTN                     Port,
+  IN      UINT8                     Value
+  )
+{
+  _ReadWriteBarrier ();
+  (UINT8)_outp ((UINT16)Port, Value);
+  _ReadWriteBarrier ();
+  return Value;
+}
+
+/**
+  Reads a 16-bit I/O port.
+
+  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+  IN      UINTN                     Port
+  )
+{
+  UINT16                            Value;
+
+  ASSERT ((Port & 1) == 0);
+  _ReadWriteBarrier ();
+  Value = _inpw ((UINT16)Port);
+  _ReadWriteBarrier ();
+  return Value;
+}
+
+/**
+  Writes a 16-bit I/O port.
+
+  Writes the 16-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 16-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+  IN      UINTN                     Port,
+  IN      UINT16                    Value
+  )
+{
+  ASSERT ((Port & 1) == 0);
+  _ReadWriteBarrier ();
+  _outpw ((UINT16)Port, Value);
+  _ReadWriteBarrier ();
+  return Value;
+}
+
+/**
+  Reads a 32-bit I/O port.
+
+  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+  IN      UINTN                     Port
+  )
+{
+  UINT32                            Value;
+
+  ASSERT ((Port & 3) == 0);
+  _ReadWriteBarrier ();
+  Value = _inpd ((UINT16)Port);
+  _ReadWriteBarrier ();
+  return Value;
+}
+
+/**
+  Writes a 32-bit I/O port.
+
+  Writes the 32-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 32-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+  IN      UINTN                     Port,
+  IN      UINT32                    Value
+  )
+{
+  ASSERT ((Port & 3) == 0);
+  _ReadWriteBarrier ();
+  _outpd ((UINT16)Port, Value);
+  _ReadWriteBarrier ();
+  return Value;
+}
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
new file mode 100644
index 000000000..a107136a7
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
@@ -0,0 +1,595 @@
+/** @file
+  I/O library for non I/O read and write access (memory map I/O read and
+  write only) architecture, such as ARM and RISC-V processor.
+
+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+//
+// Include common header file for this module.
+//
+#include "BaseIoLibIntrinsicInternal.h"
+
+/**
+  Reads an 8-bit I/O port.
+
+  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes an 8-bit I/O port.
+
+  Writes the 8-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+  IN      UINTN                     Port,
+  IN      UINT8                     Value
+  )
+{
+  ASSERT (FALSE);
+  return Value;
+}
+
+/**
+  Reads a 16-bit I/O port.
+
+  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 16-bit I/O port.
+
+  Writes the 16-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+  IN      UINTN                     Port,
+  IN      UINT16                    Value
+  )
+{
+  ASSERT (FALSE);
+  return Value;
+}
+
+/**
+  Reads a 32-bit I/O port.
+
+  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 32-bit I/O port.
+
+  Writes the 32-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+  IN      UINTN                     Port,
+  IN      UINT32                    Value
+  )
+{
+  ASSERT (FALSE);
+  return Value;
+}
+
+/**
+  Reads a 64-bit I/O port.
+
+  Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to read.
+
+  @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+  IN      UINTN                     Port
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Writes a 64-bit I/O port.
+
+  Writes the 64-bit I/O port specified by Port with the value specified by Value
+  and returns Value. This function must guarantee that all I/O read and write
+  operations are serialized.
+
+  If 64-bit I/O port operations are not supported, then ASSERT().
+  If Port is not aligned on a 64-bit boundary, then ASSERT().
+
+  @param  Port  The I/O port to write.
+  @param  Value The value to write to the I/O port.
+
+  @return The value written to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+  IN      UINTN                     Port,
+  IN      UINT64                    Value
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/**
+  Reads an 8-bit I/O port fifo into a block of memory.
+
+  Reads the 8-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into an 8-bit I/O port fifo.
+
+  Writes the 8-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Reads a 16-bit I/O port fifo into a block of memory.
+
+  Reads the 16-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into a 16-bit I/O port fifo.
+
+  Writes the 16-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Reads a 32-bit I/O port fifo into a block of memory.
+
+  Reads the 32-bit I/O fifo port specified by Port.
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Writes a block of memory into a 32-bit I/O port fifo.
+
+  Writes the 32-bit I/O fifo port specified by Port.
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  IN      VOID                      *Buffer
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Reads an 8-bit MMIO register.
+
+  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+  IN      UINTN                     Address
+  )
+{
+  UINT8                             Value;
+
+  Value = *(volatile UINT8*)Address;
+  return Value;
+}
+
+/**
+  Writes an 8-bit MMIO register.
+
+  Writes the 8-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 8-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+  IN      UINTN                     Address,
+  IN      UINT8                     Value
+  )
+{
+  *(volatile UINT8*)Address = Value;
+  return Value;
+}
+
+/**
+  Reads a 16-bit MMIO register.
+
+  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+  IN      UINTN                     Address
+  )
+{
+  UINT16                            Value;
+
+  ASSERT ((Address & 1) == 0);
+  Value = *(volatile UINT16*)Address;
+  return Value;
+}
+
+/**
+  Writes a 16-bit MMIO register.
+
+  Writes the 16-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 16-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+  IN      UINTN                     Address,
+  IN      UINT16                    Value
+  )
+{
+  ASSERT ((Address & 1) == 0);
+  *(volatile UINT16*)Address = Value;
+  return Value;
+}
+
+/**
+  Reads a 32-bit MMIO register.
+
+  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+  IN      UINTN                     Address
+  )
+{
+  UINT32                            Value;
+
+  ASSERT ((Address & 3) == 0);
+  Value = *(volatile UINT32*)Address;
+  return Value;
+}
+
+/**
+  Writes a 32-bit MMIO register.
+
+  Writes the 32-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 32-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+  IN      UINTN                     Address,
+  IN      UINT32                    Value
+  )
+{
+  ASSERT ((Address & 3) == 0);
+  *(volatile UINT32*)Address = Value;
+  return Value;
+}
+
+/**
+  Reads a 64-bit MMIO register.
+
+  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+  returned. This function must guarantee that all MMIO read and write
+  operations are serialized.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to read.
+
+  @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+  IN      UINTN                     Address
+  )
+{
+  UINT64                            Value;
+
+  ASSERT ((Address & 7) == 0);
+  Value = *(volatile UINT64*)Address;
+  return Value;
+}
+
+/**
+  Writes a 64-bit MMIO register.
+
+  Writes the 64-bit MMIO register specified by Address with the value specified
+  by Value and returns Value. This function must guarantee that all MMIO read
+  and write operations are serialized.
+
+  If 64-bit MMIO register operations are not supported, then ASSERT().
+
+  @param  Address The MMIO register to write.
+  @param  Value   The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+  IN      UINTN                     Address,
+  IN      UINT64                    Value
+  )
+{
+  ASSERT ((Address & 7) == 0);
+  *(volatile UINT64*)Address = Value;
+  return Value;
+}
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
new file mode 100644
index 000000000..d459072f6
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
@@ -0,0 +1,120 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+    DEFAULT REL
+    SECTION .text
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo8 (
+;    IN  UINTN                 Port,              // rcx
+;    IN  UINTN                 Size,              // rdx
+;    OUT VOID                  *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+    cld
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+rep insb
+    mov     rdi, r8             ; restore rdi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo16 (
+;    IN  UINTN                 Port,              // rcx
+;    IN  UINTN                 Size,              // rdx
+;    OUT VOID                  *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+    cld
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+rep insw
+    mov     rdi, r8             ; restore rdi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo32 (
+;    IN  UINTN                 Port,              // rcx
+;    IN  UINTN                 Size,              // rdx
+;    OUT VOID                  *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+    cld
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+rep insd
+    mov     rdi, r8             ; restore rdi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo8 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+    cld
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+rep outsb
+    mov     rsi, r8             ; restore rsi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo16 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+    cld
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+rep outsw
+    mov     rsi, r8             ; restore rsi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo32 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+    cld
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+rep outsd
+    mov     rsi, r8             ; restore rsi
+    ret
+
diff --git a/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifoSev.nasm b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifoSev.nasm
new file mode 100644
index 000000000..106f8881c
--- /dev/null
+++ b/roms/edk2/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifoSev.nasm
@@ -0,0 +1,282 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+    DEFAULT REL
+    SECTION .text
+
+;------------------------------------------------------------------------------
+; Check whether we need to unroll the String I/O in SEV guest
+;
+; Return // eax   (1 - unroll, 0 - no unroll)
+;------------------------------------------------------------------------------
+global ASM_PFX(SevNoRepIo)
+ASM_PFX(SevNoRepIo):
+
+  ; CPUID clobbers ebx, ecx and edx
+  push      rbx
+  push      rcx
+  push      rdx
+
+  ; Check if we are runing under hypervisor
+  ; CPUID(1).ECX Bit 31
+  mov       eax, 1
+  cpuid
+  bt        ecx, 31
+  jnc       @UseRepIo
+
+  ; Check if we have Memory encryption CPUID leaf
+  mov       eax, 0x80000000
+  cpuid
+  cmp       eax, 0x8000001f
+  jl        @UseRepIo
+
+  ; Check for memory encryption feature:
+  ;  CPUID  Fn8000_001F[EAX] - Bit 1
+  ;
+  mov       eax,  0x8000001f
+  cpuid
+  bt        eax, 1
+  jnc       @UseRepIo
+
+  ; Check if memory encryption is enabled
+  ;  MSR_0xC0010131 - Bit 0 (SEV enabled)
+  ;  MSR_0xC0010131 - Bit 1 (SEV-ES enabled)
+  mov       ecx, 0xc0010131
+  rdmsr
+
+  ; Check for (SevEsEnabled == 0 && SevEnabled == 1)
+  and       eax, 3
+  cmp       eax, 1
+  je        @SevNoRepIo_Done
+
+@UseRepIo:
+  xor       eax, eax
+
+@SevNoRepIo_Done:
+  pop       rdx
+  pop       rcx
+  pop       rbx
+  ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo8 (
+;    IN  UINTN                 Port,              // rcx
+;    IN  UINTN                 Size,              // rdx
+;    OUT VOID                  *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoReadFifo8_NoRep
+
+    cld
+    rep     insb
+    jmp     @IoReadFifo8_Done
+
+@IoReadFifo8_NoRep:
+    jrcxz   @IoReadFifo8_Done
+
+@IoReadFifo8_Loop:
+    in      al, dx
+    mov     byte [rdi], al
+    inc     rdi
+    loop    @IoReadFifo8_Loop
+
+@IoReadFifo8_Done:
+    mov     rdi, r8             ; restore rdi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo16 (
+;    IN  UINTN                 Port,              // rcx
+;    IN  UINTN                 Size,              // rdx
+;    OUT VOID                  *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoReadFifo16_NoRep
+
+    cld
+    rep     insw
+    jmp     @IoReadFifo16_Done
+
+@IoReadFifo16_NoRep:
+    jrcxz   @IoReadFifo16_Done
+
+@IoReadFifo16_Loop:
+    in      ax, dx
+    mov     word [rdi], ax
+    add     rdi, 2
+    loop    @IoReadFifo16_Loop
+
+@IoReadFifo16_Done:
+    mov     rdi, r8             ; restore rdi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo32 (
+;    IN  UINTN                 Port,              // rcx
+;    IN  UINTN                 Size,              // rdx
+;    OUT VOID                  *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoReadFifo32_NoRep
+
+    cld
+    rep     insd
+    jmp     @IoReadFifo32_Done
+
+@IoReadFifo32_NoRep:
+    jrcxz   @IoReadFifo32_Done
+
+@IoReadFifo32_Loop:
+    in      eax, dx
+    mov     dword [rdi], eax
+    add     rdi, 4
+    loop    @IoReadFifo32_Loop
+
+@IoReadFifo32_Done:
+    mov     rdi, r8             ; restore rdi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo8 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoWriteFifo8_NoRep
+
+    cld
+    rep     outsb
+    jmp     @IoWriteFifo8_Done
+
+@IoWriteFifo8_NoRep:
+    jrcxz   @IoWriteFifo8_Done
+
+@IoWriteFifo8_Loop:
+    mov     al, byte [rsi]
+    out     dx, al
+    inc     rsi
+    loop    @IoWriteFifo8_Loop
+
+@IoWriteFifo8_Done:
+    mov     rsi, r8             ; restore rsi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo16 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoWriteFifo16_NoRep
+
+    cld
+    rep     outsw
+    jmp     @IoWriteFifo16_Done
+
+@IoWriteFifo16_NoRep:
+    jrcxz   @IoWriteFifo16_Done
+
+@IoWriteFifo16_Loop:
+    mov     ax, word [rsi]
+    out     dx, ax
+    add     rsi, 2
+    loop    @IoWriteFifo16_Loop
+
+@IoWriteFifo16_Done:
+    mov     rsi, r8             ; restore rsi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo32 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+
+    ; Check if we need to unroll String I/O
+    call    ASM_PFX(SevNoRepIo)
+    test    eax, eax
+    jnz     @IoWriteFifo32_NoRep
+
+    cld
+    rep     outsd
+    jmp     @IoWriteFifo32_Done
+
+@IoWriteFifo32_NoRep:
+    jrcxz   @IoWriteFifo32_Done
+
+@IoWriteFifo32_Loop:
+    mov     eax, dword [rsi]
+    out     dx, eax
+    add     rsi, 4
+    loop    @IoWriteFifo32_Loop
+
+@IoWriteFifo32_Done:
+    mov     rsi, r8             ; restore rsi
+    ret
+
author	Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com>	2023-10-10 14:33:42 +0000
committer	Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com>	2023-10-10 14:33:42 +0000
commit	af1a266670d040d2f4083ff309d732d648afba2a (patch)
tree	2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/edk2/MdePkg/Library/BaseIoLibIntrinsic
parent	e02cda008591317b1625707ff8e115a4841aa889 (diff)