diff options
| author |   Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
|---|---|---|
| committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
| commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
| tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/edk2/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c | |
| parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) | |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/edk2/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c')
| -rw-r--r-- | roms/edk2/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c | 200 |
1 files changed, 200 insertions, 0 deletions
diff --git a/roms/edk2/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c b/roms/edk2/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c new file mode 100644 index 000000000..be19219c2 --- /dev/null +++ b/roms/edk2/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c @@ -0,0 +1,200 @@ +/** @file
+ GCC inline implementation of BaseSynchronizationLib processor specific functions.
+
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms.
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN volatile UINT32 *Value
+ )
+{
+ UINT32 Result;
+
+ __asm__ __volatile__ (
+ "movl $1, %%eax \n\t"
+ "lock \n\t"
+ "xadd %%eax, %1 \n\t"
+ "inc %%eax \n\t"
+ : "=&a" (Result), // %0
+ "+m" (*Value) // %1
+ : // no inputs that aren't also outputs
+ : "memory",
+ "cc"
+ );
+
+ return Result;
+}
+
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms.
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN volatile UINT32 *Value
+ )
+{
+ UINT32 Result;
+
+ __asm__ __volatile__ (
+ "movl $-1, %%eax \n\t"
+ "lock \n\t"
+ "xadd %%eax, %1 \n\t"
+ "dec %%eax \n\t"
+ : "=&a" (Result), // %0
+ "+m" (*Value) // %1
+ : // no inputs that aren't also outputs
+ : "memory",
+ "cc"
+ );
+
+ return Result;
+}
+
+
+/**
+ Performs an atomic compare exchange operation on a 16-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 16-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+
+ @param Value A pointer to the 16-bit value for the compare exchange
+ operation.
+ @param CompareValue 16-bit value used in compare operation.
+ @param ExchangeValue 16-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT16
+EFIAPI
+InternalSyncCompareExchange16 (
+ IN OUT volatile UINT16 *Value,
+ IN UINT16 CompareValue,
+ IN UINT16 ExchangeValue
+ )
+{
+ __asm__ __volatile__ (
+ "lock \n\t"
+ "cmpxchgw %2, %1 \n\t"
+ : "+a" (CompareValue), // %0
+ "+m" (*Value) // %1
+ : "r" (ExchangeValue) // %2
+ : "memory",
+ "cc"
+ );
+
+ return CompareValue;
+}
+
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN OUT volatile UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ __asm__ __volatile__ (
+ "lock \n\t"
+ "cmpxchgl %2, %1 \n\t"
+ : "+a" (CompareValue), // %0
+ "+m" (*Value) // %1
+ : "r" (ExchangeValue) // %2
+ : "memory",
+ "cc"
+ );
+
+ return CompareValue;
+}
+
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InternalSyncCompareExchange64 (
+ IN OUT volatile UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ __asm__ __volatile__ (
+ "lock \n\t"
+ "cmpxchgq %2, %1 \n\t"
+ : "+a" (CompareValue), // %0
+ "+m" (*Value) // %1
+ : "r" (ExchangeValue) // %2
+ : "memory",
+ "cc"
+ );
+
+ return CompareValue;
+}
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