diff options
author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/edk2/UefiCpuPkg/ResetVector/FixupVtf/Vtf.nasmb | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/edk2/UefiCpuPkg/ResetVector/FixupVtf/Vtf.nasmb')
-rw-r--r-- | roms/edk2/UefiCpuPkg/ResetVector/FixupVtf/Vtf.nasmb | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/roms/edk2/UefiCpuPkg/ResetVector/FixupVtf/Vtf.nasmb b/roms/edk2/UefiCpuPkg/ResetVector/FixupVtf/Vtf.nasmb new file mode 100644 index 000000000..34ae5fb1f --- /dev/null +++ b/roms/edk2/UefiCpuPkg/ResetVector/FixupVtf/Vtf.nasmb @@ -0,0 +1,54 @@ +;------------------------------------------------------------------------------
+; @file
+; First code exectuted by processor after resetting.
+;
+; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;------------------------------------------------------------------------------
+
+BITS 16
+
+ALIGN 16 ; 0xffffffd0
+
+applicationProcessorEntryPoint:
+;
+; Application Processors entry point
+;
+; GenFv generates code aligned on a 4k boundary which will jump to this
+; location. (0xffffffd0) This allows the Local APIC Startup IPI to be
+; used to wake up the application processors.
+;
+ jmp short resetVector
+
+ALIGN 16 ; 0xffffffe0
+
+peiCoreEntryPoint:
+;
+; PEI Core entry point
+;
+; GenFv fills the address of the PEI Core into this location
+;
+ DD 0x12345678
+
+ALIGN 16 ; 0xfffffff0
+
+resetVector:
+;
+; Reset Vector
+;
+; This is where the processor will begin execution
+;
+ nop
+ nop
+ jmp near $
+
+ALIGN 8
+
+ApStartupSegment:
+ DD 0x12345678
+
+BootFvBaseAddress:
+ DD 0x12345678
+
+ALIGN 16 ; 0x100000000
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