diff options
| author |   Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
|---|---|---|
| committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
| commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
| tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/edk2/UefiPayloadPkg/Library/PlatformHookLib | |
| parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) | |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/edk2/UefiPayloadPkg/Library/PlatformHookLib')
| -rw-r--r-- | roms/edk2/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c | 98 | ||||
| -rw-r--r-- | roms/edk2/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf | 39 |
2 files changed, 137 insertions, 0 deletions
diff --git a/roms/edk2/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c b/roms/edk2/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c new file mode 100644 index 000000000..72a17dc8a --- /dev/null +++ b/roms/edk2/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c @@ -0,0 +1,98 @@ +/** @file
+ Platform Hook Library instance for UART device.
+
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h>
+#include <Uefi/UefiBaseType.h>
+#include <Library/PciLib.h>
+#include <Library/PlatformHookLib.h>
+#include <Library/BlParseLib.h>
+#include <Library/PcdLib.h>
+
+typedef struct {
+ UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.
+ UINT16 DeviceId; ///< Device ID to match the PCI device
+ UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz
+ UINT64 Offset; ///< The byte offset into to the BAR
+ UINT8 BarIndex; ///< Which BAR to get the UART base address
+ UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.
+ UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
+ UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
+ UINT8 Reserved[2];
+} PCI_SERIAL_PARAMETER;
+
+/**
+ Performs platform specific initialization required for the CPU to access
+ the hardware associated with a SerialPortLib instance. This function does
+ not initialize the serial port hardware itself. Instead, it initializes
+ hardware devices that are required for the CPU to access the serial port
+ hardware. This function may be called more than once.
+
+ @retval RETURN_SUCCESS The platform specific initialization succeeded.
+ @retval RETURN_DEVICE_ERROR The platform specific initialization could not be completed.
+
+**/
+RETURN_STATUS
+EFIAPI
+PlatformHookSerialPortInitialize (
+ VOID
+ )
+{
+ RETURN_STATUS Status;
+ UINT32 DeviceVendor;
+ PCI_SERIAL_PARAMETER *SerialParam;
+ SERIAL_PORT_INFO SerialPortInfo;
+
+ Status = ParseSerialInfo (&SerialPortInfo);
+ if (RETURN_ERROR (Status)) {
+ return Status;
+ }
+
+ if (SerialPortInfo.Type == PLD_SERIAL_TYPE_MEMORY_MAPPED) {
+ Status = PcdSetBoolS (PcdSerialUseMmio, TRUE);
+ } else { //IO
+ Status = PcdSetBoolS (PcdSerialUseMmio, FALSE);
+ }
+ if (RETURN_ERROR (Status)) {
+ return Status;
+ }
+ Status = PcdSet64S (PcdSerialRegisterBase, SerialPortInfo.BaseAddr);
+ if (RETURN_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = PcdSet32S (PcdSerialRegisterStride, SerialPortInfo.RegWidth);
+ if (RETURN_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = PcdSet32S (PcdSerialBaudRate, SerialPortInfo.Baud);
+ if (RETURN_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = PcdSet64S (PcdUartDefaultBaudRate, SerialPortInfo.Baud);
+ if (RETURN_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = PcdSet32S (PcdSerialClockRate, SerialPortInfo.InputHertz);
+ if (RETURN_ERROR (Status)) {
+ return Status;
+ }
+
+ if (SerialPortInfo.UartPciAddr >= 0x80000000) {
+ DeviceVendor = PciRead32 (SerialPortInfo.UartPciAddr & 0x0ffff000);
+ SerialParam = PcdGetPtr(PcdPciSerialParameters);
+ SerialParam->VendorId = (UINT16)DeviceVendor;
+ SerialParam->DeviceId = DeviceVendor >> 16;
+ SerialParam->ClockRate = SerialPortInfo.InputHertz;
+ SerialParam->RegisterStride = (UINT8)SerialPortInfo.RegWidth;
+ }
+
+ return RETURN_SUCCESS;
+}
diff --git a/roms/edk2/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf b/roms/edk2/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf new file mode 100644 index 000000000..2415d99c6 --- /dev/null +++ b/roms/edk2/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf @@ -0,0 +1,39 @@ +## @file
+# Platform Hook Library instance for UART device.
+#
+# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PlatformHookLib
+ FILE_GUID = 40A2CBC6-CFB8-447b-A90E-198E88FD345E
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PlatformHookLib
+ CONSTRUCTOR = PlatformHookSerialPortInitialize
+
+[Sources]
+ PlatformHookLib.c
+
+[LibraryClasses]
+ BlParseLib
+ PcdLib
+ PciLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ UefiPayloadPkg/UefiPayloadPkg.dec
+
+[Pcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## PRODUCES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## PRODUCES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## PRODUCES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## PRODUCES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## PRODUCES
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate ## PRODUCES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters ## PRODUCES
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