diff options
| author |   Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
|---|---|---|
| committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
| commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
| tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/edk2/UefiPayloadPkg/SecCore/Ia32 | |
| parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) | |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/edk2/UefiPayloadPkg/SecCore/Ia32')
| -rw-r--r-- | roms/edk2/UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm | 78 | ||||
| -rw-r--r-- | roms/edk2/UefiPayloadPkg/SecCore/Ia32/Stack.nasm | 72 |
2 files changed, 150 insertions, 0 deletions
diff --git a/roms/edk2/UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm b/roms/edk2/UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm new file mode 100644 index 000000000..877fc61ef --- /dev/null +++ b/roms/edk2/UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm @@ -0,0 +1,78 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Abstract:
+;
+; Entry point for the coreboot UEFI payload.
+;
+;------------------------------------------------------------------------------
+
+SECTION .text
+
+; C Functions
+extern ASM_PFX(SecStartup)
+
+; Pcds
+extern ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))
+extern ASM_PFX(PcdGet32 (PcdPayloadStackTop))
+
+;
+; SecCore Entry Point
+;
+; Processor is in flat protected mode
+;
+; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)
+; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor
+; @param[in] EBP Pointer to the start of the Boot Firmware Volume
+;
+; @return None This routine does not return
+;
+global ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+ ;
+ ; Disable all the interrupts
+ ;
+ cli
+
+ ;
+ ; Save the Payload HOB base address before switching the stack
+ ;
+ mov eax, [esp + 4]
+
+ ;
+ ; Construct the temporary memory at 0x80000, length 0x10000
+ ;
+ mov esp, DWORD [ASM_PFX(PcdGet32 (PcdPayloadStackTop))]
+
+ ;
+ ; Push the Payload HOB base address onto new stack
+ ;
+ push eax
+
+ ;
+ ; Pass BFV into the PEI Core
+ ;
+ push DWORD [ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))]
+
+ ;
+ ; Pass stack base into the PEI Core
+ ;
+ push BASE_512KB
+
+ ;
+ ; Pass stack size into the PEI Core
+ ;
+ push SIZE_64KB
+
+ ;
+ ; Pass Control into the PEI Core
+ ;
+ call ASM_PFX(SecStartup)
+
+ ;
+ ; Should never return
+ ;
+ jmp $
+
diff --git a/roms/edk2/UefiPayloadPkg/SecCore/Ia32/Stack.nasm b/roms/edk2/UefiPayloadPkg/SecCore/Ia32/Stack.nasm new file mode 100644 index 000000000..55fd2243c --- /dev/null +++ b/roms/edk2/UefiPayloadPkg/SecCore/Ia32/Stack.nasm @@ -0,0 +1,72 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Abstract:
+;
+; Switch the stack from temporary memory to permanent memory.
+;
+;------------------------------------------------------------------------------
+
+SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; SecSwitchStack (
+; UINT32 TemporaryMemoryBase,
+; UINT32 PermenentMemoryBase
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(SecSwitchStack)
+ASM_PFX(SecSwitchStack):
+ ;
+ ; Save three register: eax, ebx, ecx
+ ;
+ push eax
+ push ebx
+ push ecx
+ push edx
+
+ ;
+ ; !!CAUTION!! this function address's is pushed into stack after
+ ; migration of whole temporary memory, so need save it to permanent
+ ; memory at first!
+ ;
+
+ mov ebx, [esp + 20] ; Save the first parameter
+ mov ecx, [esp + 24] ; Save the second parameter
+
+ ;
+ ; Save this function's return address into permanent memory at first.
+ ; Then, Fixup the esp point to permanent memory
+ ;
+ mov eax, esp
+ sub eax, ebx
+ add eax, ecx
+ mov edx, [esp] ; copy pushed register's value to permanent memory
+ mov [eax], edx
+ mov edx, [esp + 4]
+ mov [eax + 4], edx
+ mov edx, [esp + 8]
+ mov [eax + 8], edx
+ mov edx, [esp + 12]
+ mov [eax + 12], edx
+ mov edx, [esp + 16] ; Update return address into permanent memory
+ mov [eax + 16], edx
+ mov esp, eax ; From now, esp is pointed to permanent memory
+
+ ;
+ ; Fixup the ebp point to permanent memory
+ ;
+ mov eax, ebp
+ sub eax, ebx
+ add eax, ecx
+ mov ebp, eax ; From now, ebp is pointed to permanent memory
+
+ pop edx
+ pop ecx
+ pop ebx
+ pop eax
+ ret
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