Add submodule dependency filesHEADmaster

Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec

1 files changed, 217 insertions, 0 deletions

diff --git a/roms/u-boot/arch/arm/dts/cn9132-db.dtsi b/roms/u-boot/arch/arm/dts/cn9132-db.dtsi
new file mode 100644
index 000000000..d51a4d0b3
--- /dev/null
+++ b/roms/u-boot/arch/arm/dts/cn9132-db.dtsi
@@ -0,0 +1,217 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018-2021 Marvell International Ltd.
+ */
+
+#undef CP110_NAME
+#undef CP110_NUM
+#undef CP110_PCIE_MEM_SIZE
+#undef CP110_PCIEx_CPU_MEM_BASE
+#undef CP110_PCIEx_BUS_MEM_BASE
+
+/* CP110-2 Settings */
+#define CP110_NAME			cp2
+#define CP110_NUM			2
+#define CP110_PCIE_MEM_SIZE(iface)	(0xf00000)
+#define CP110_PCIEx_CPU_MEM_BASE(iface)	(0xe5000000 + (iface) *  0x1000000)
+#define CP110_PCIEx_BUS_MEM_BASE(iface)	(CP110_PCIEx_CPU_MEM_BASE(iface))
+
+#include "armada-cp110.dtsi"
+
+/ {
+	model = "Marvell CN9132 development board";
+	compatible = "marvell,cn9132-db";
+
+	aliases {
+		gpio5 = &cp2_gpio0;
+		gpio6 = &cp2_gpio1;
+	};
+
+	cp2 {
+		config-space {
+			sdhci@780000 {
+				vqmmc-supply = <&cp2_reg_sd_vccq>;
+			};
+
+			cp2_reg_usb3_vbus0: cp2_usb3_vbus@0 {
+				compatible = "regulator-fixed";
+				regulator-name = "cp2-xhci0-vbus";
+				regulator-min-microvolt = <5000000>;
+				regulator-max-microvolt = <5000000>;
+				startup-delay-us = <100000>;
+				regulator-force-boot-off;
+				gpio = <&cp2_gpio0 2 GPIO_ACTIVE_HIGH>;
+			};
+
+			cp2_reg_usb3_vbus1: cp2_usb3_vbus@1 {
+				compatible = "regulator-fixed";
+				regulator-name = "cp2-xhci1-vbus";
+				regulator-min-microvolt = <5000000>;
+				regulator-max-microvolt = <5000000>;
+				startup-delay-us = <100000>;
+				regulator-force-boot-off;
+				gpio = <&cp2_gpio0 3 GPIO_ACTIVE_HIGH>;
+			};
+			cp2_reg_sd_vccq: cp2_sd_vccq@0 {
+				compatible = "regulator-gpio";
+				regulator-name = "cp2_sd_vcc";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				/* cp2_mpp49 */
+				gpios = <&cp2_gpio1 17 GPIO_ACTIVE_HIGH>;
+				states = <1800000 0x1
+					  3300000 0x0>;
+			};
+			cp2_reg_usb3_current_lim0: cp2_usb3_current_limiter@0 {
+				compatible = "regulator-fixed";
+				regulator-min-microamp = <900000>;
+				regulator-max-microamp = <900000>;
+				regulator-force-boot-off;
+				gpio = <&cp2_gpio0 0 GPIO_ACTIVE_HIGH>;
+			};
+
+			cp2_reg_usb3_current_lim1: cp2_usb3_current_limiter@1 {
+				compatible = "regulator-fixed";
+				regulator-min-microamp = <900000>;
+				regulator-max-microamp = <900000>;
+				regulator-force-boot-off;
+				gpio = <&cp2_gpio0 1 GPIO_ACTIVE_HIGH>;
+			};
+		};
+	};
+};
+
+&cp2_i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&cp2_i2c0_pins>;
+	status = "okay";
+	clock-frequency = <100000>;
+};
+
+&cp2_pinctl {
+	compatible = "marvell,mvebu-pinctrl",
+		     "marvell,cp115-standalone-pinctrl";
+	bank-name ="cp2-110";
+
+	/* MPP Bus:
+	 *	[0-26]		GPIO
+	 *	[27]		SATA0_PRESENT_ACTIVEn
+	 *	[28]		SATA1_PRESENT_ACTIVEn
+	 *	[29-31, 33]	GPIO (Default)
+	 *	[32,34]		SMI
+	 *	[37-38]		I2C0
+	 *	[39-53]		GPIO
+	 *	[54]		SD_CRD_RSTn (out)
+	 *	[55]		SD_CRD_DT (in)
+	 *	[56-62]		SDIO
+	 */
+		/*   0    1    2    3    4    5    6    7    8    9 */
+	pin-func = < 0x0  0x0  0x0  0x0  0x0  0x0  0x0  0x0  0x0  0x0
+		     0x0  0x0  0x0  0x0  0x0  0x0  0x0  0x0  0x0  0x0
+		     0x0  0x0  0x0  0x0  0x0  0x0  0x0  0x9  0x9  0x0
+		     0x0  0x0  0x8  0x0  0x8  0x0  0x0  0x2  0x2  0x0
+		     0x0  0x0  0x0  0x0  0x0  0x0  0x0  0x0  0x0  0x0
+		     0x0  0x0  0x0  0x0  0xa  0xb  0xe  0xe  0xe  0xe
+		     0xe  0xe  0xe >;
+
+	cp2_i2c0_pins: cp2-i2c-pins-0 {
+		marvell,pins = < 37 38 >;
+		marvell,function = <2>;
+	};
+
+	cp2_sdhci_pins: cp2-sdhi-pins-0 {
+		marvell,pins = < 56 57 58 59 60 61 >;
+		marvell,function = <14>;
+	};
+};
+
+&cp2_usb3_0 {
+	status = "okay";
+	vbus-supply = <&cp2_reg_usb3_vbus0>;
+	current-limiter = <&cp2_reg_usb3_current_lim0>;
+	vbus-disable-delay = <500>;
+};
+
+/* SLM-1521-V2, CON11 */
+&cp2_usb3_1 {
+	status = "okay";
+	vbus-supply = <&cp2_reg_usb3_vbus1>;
+	current-limiter = <&cp2_reg_usb3_current_lim1>;
+	vbus-disable-delay = <500>;
+	status = "okay";
+};
+
+&cp2_utmi0 {
+	status = "okay";
+};
+
+&cp2_utmi1 {
+	status = "okay";
+};
+
+&cp2_comphy {
+	phy0 {
+		phy-type = <COMPHY_TYPE_PEX0>;
+	};
+
+	phy1 {
+		phy-type = <COMPHY_TYPE_PEX0>;
+	};
+
+	phy2 {
+		phy-type = <COMPHY_TYPE_SATA0>;
+	};
+
+	phy3 {
+		phy-type = <COMPHY_TYPE_USB3_HOST1>;
+	};
+
+	phy4 {
+		phy-type = <COMPHY_TYPE_SFI0>;
+		phy-speed = <COMPHY_SPEED_10_3125G>;
+	};
+
+	phy5 {
+		phy-type = <COMPHY_TYPE_PEX2>;
+	};
+};
+
+&cp2_ethernet {
+	status = "okay";
+};
+
+/* SLM-1521-V2, CON9 */
+&cp2_eth0 {
+	status = "okay";
+	phy-mode = "sfi";
+};
+
+/* SLM-1521-V2, CON6 */
+&cp2_pcie0 {
+	/* non-prefetchable memory */
+	ranges =<0x82000000 0 0xe5000000 0 0xe5000000 0 0x1000000>;
+	num-lanes = <2>;
+	status = "okay";
+};
+
+/* SLM-1521-V2, CON8 */
+&cp2_pcie2 {
+	num-lanes = <1>;
+	status = "okay";
+};
+
+&cp2_pinctl {
+};
+
+/* SLM-1521-V2, CON4 */
+&cp2_sata0 {
+	status = "okay";
+};
+
+/* CON 2 on SLM-1683 - microSD */
+&cp2_sdhci0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&cp2_sdhci_pins>;
+	bus-width = <4>;
+	status = "okay";
+};