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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/arm/dts/imx6q-bx50v3-uboot.dtsi | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/arm/dts/imx6q-bx50v3-uboot.dtsi')
-rw-r--r-- | roms/u-boot/arch/arm/dts/imx6q-bx50v3-uboot.dtsi | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/dts/imx6q-bx50v3-uboot.dtsi b/roms/u-boot/arch/arm/dts/imx6q-bx50v3-uboot.dtsi new file mode 100644 index 000000000..b54e8e6ad --- /dev/null +++ b/roms/u-boot/arch/arm/dts/imx6q-bx50v3-uboot.dtsi @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2019 Collabora Ltd + * Copyright 2019 General Electric Company + */ + +/ { + bootcount { + compatible = "u-boot,bootcount-i2c-eeprom"; + i2c-eeprom = <&bootcount>; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog1>; + }; + + panel-lvds0 { + compatible = "simple-panel"; + }; +}; + +&eeprom { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + vpd@0 { + reg = <0 800>; + }; + + bootcount: bootcount { + reg = <1022 2>; + }; + }; +}; + +/* + * This is not done in imx6q-ba16.dtsi, since that file is shared + * with the kernel and the kernel should not reset the PHY, since + * it lacks support for configuring the reserved registeres to + * avoid a board specific voltage peak issue. + */ +&fec { + phy-reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; + phy-reset-duration = <1>; + phy-reset-post-delay = <0>; +}; |