diff options
author | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
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committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/arm/dts/stm32h7-u-boot.dtsi | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/arm/dts/stm32h7-u-boot.dtsi')
-rw-r--r-- | roms/u-boot/arch/arm/dts/stm32h7-u-boot.dtsi | 134 |
1 files changed, 134 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/dts/stm32h7-u-boot.dtsi b/roms/u-boot/arch/arm/dts/stm32h7-u-boot.dtsi new file mode 100644 index 000000000..84dc7656d --- /dev/null +++ b/roms/u-boot/arch/arm/dts/stm32h7-u-boot.dtsi @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <dt-bindings/memory/stm32-sdram.h> + +/{ + clocks { + u-boot,dm-pre-reloc; + }; + + aliases { + gpio0 = &gpioa; + gpio1 = &gpiob; + gpio2 = &gpioc; + gpio3 = &gpiod; + gpio4 = &gpioe; + gpio5 = &gpiof; + gpio6 = &gpiog; + gpio7 = &gpioh; + gpio8 = &gpioi; + gpio9 = &gpioj; + gpio10 = &gpiok; + mmc0 = &sdmmc1; + pinctrl0 = &pinctrl; + }; + + soc { + u-boot,dm-pre-reloc; + pin-controller { + u-boot,dm-pre-reloc; + }; + + fmc: fmc@52004000 { + compatible = "st,stm32h7-fmc"; + reg = <0x52004000 0x1000>; + clocks = <&rcc FMC_CK>; + + pinctrl-0 = <&fmc_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + }; +}; + +&clk_hse { + u-boot,dm-pre-reloc; +}; + +&clk_i2s { + u-boot,dm-pre-reloc; +}; + +&clk_lse { + u-boot,dm-pre-reloc; +}; + + +&fmc { + u-boot,dm-pre-reloc; +}; + +&gpioa { + u-boot,dm-pre-reloc; + compatible = "st,stm32-gpio"; +}; + +&gpiob { + u-boot,dm-pre-reloc; + compatible = "st,stm32-gpio"; +}; + +&gpioc { + u-boot,dm-pre-reloc; + compatible = "st,stm32-gpio"; +}; + +&gpiod { + u-boot,dm-pre-reloc; + compatible = "st,stm32-gpio"; +}; + +&gpioe { + u-boot,dm-pre-reloc; + compatible = "st,stm32-gpio"; +}; + +&gpiof { + u-boot,dm-pre-reloc; + compatible = "st,stm32-gpio"; +}; + +&gpiog { + u-boot,dm-pre-reloc; + compatible = "st,stm32-gpio"; +}; + +&gpioh { + u-boot,dm-pre-reloc; + compatible = "st,stm32-gpio"; +}; + +&gpioi { + u-boot,dm-pre-reloc; + compatible = "st,stm32-gpio"; +}; + +&gpioj { + u-boot,dm-pre-reloc; + compatible = "st,stm32-gpio"; +}; + +&gpiok { + u-boot,dm-pre-reloc; + compatible = "st,stm32-gpio"; +}; + +&pwrcfg { + u-boot,dm-pre-reloc; +}; + +&rcc { + u-boot,dm-pre-reloc; +}; + +&sdmmc1 { + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; +}; + +&timer5 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; |