diff options
author | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
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committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/arm/mach-mediatek/mt7622 | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/arm/mach-mediatek/mt7622')
-rw-r--r-- | roms/u-boot/arch/arm/mach-mediatek/mt7622/Makefile | 3 | ||||
-rw-r--r-- | roms/u-boot/arch/arm/mach-mediatek/mt7622/init.c | 53 |
2 files changed, 56 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/mach-mediatek/mt7622/Makefile b/roms/u-boot/arch/arm/mach-mediatek/mt7622/Makefile new file mode 100644 index 000000000..886ab7e4e --- /dev/null +++ b/roms/u-boot/arch/arm/mach-mediatek/mt7622/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-y += init.o diff --git a/roms/u-boot/arch/arm/mach-mediatek/mt7622/init.c b/roms/u-boot/arch/arm/mach-mediatek/mt7622/init.c new file mode 100644 index 000000000..e501907b5 --- /dev/null +++ b/roms/u-boot/arch/arm/mach-mediatek/mt7622/init.c @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 MediaTek Inc. + * Author: Sam Shih <sam.shih@mediatek.com> + */ + +#include <common.h> +#include <fdtdec.h> +#include <init.h> +#include <asm/armv8/mmu.h> +#include <asm/cache.h> + +int print_cpuinfo(void) +{ + printf("CPU: MediaTek MT7622\n"); + return 0; +} + +int dram_init(void) +{ + int ret; + + ret = fdtdec_setup_memory_banksize(); + if (ret) + return ret; + return fdtdec_setup_mem_size_base(); + +} + +void reset_cpu(void) +{ + psci_system_reset(); +} + +static struct mm_region mt7622_mem_map[] = { + { + /* DDR */ + .virt = 0x40000000UL, + .phys = 0x40000000UL, + .size = 0x40000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE, + }, { + .virt = 0x00000000UL, + .phys = 0x00000000UL, + .size = 0x40000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + 0, + } +}; +struct mm_region *mem_map = mt7622_mem_map; |