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authorAngelos Mouzakitis <a.mouzakitis@virtualopensystems.com>2023-10-10 14:33:42 +0000
committerAngelos Mouzakitis <a.mouzakitis@virtualopensystems.com>2023-10-10 14:33:42 +0000
commitaf1a266670d040d2f4083ff309d732d648afba2a (patch)
tree2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/arm/mach-versatile
parente02cda008591317b1625707ff8e115a4841aa889 (diff)
Add submodule dependency filesHEADmaster
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/arm/mach-versatile')
-rw-r--r--roms/u-boot/arch/arm/mach-versatile/Makefile7
-rw-r--r--roms/u-boot/arch/arm/mach-versatile/reset.S28
-rw-r--r--roms/u-boot/arch/arm/mach-versatile/timer.c63
3 files changed, 98 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/mach-versatile/Makefile b/roms/u-boot/arch/arm/mach-versatile/Makefile
new file mode 100644
index 000000000..858ca9414
--- /dev/null
+++ b/roms/u-boot/arch/arm/mach-versatile/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+
+obj-y = timer.o
+obj-y += reset.o
diff --git a/roms/u-boot/arch/arm/mach-versatile/reset.S b/roms/u-boot/arch/arm/mach-versatile/reset.S
new file mode 100644
index 000000000..c7f1225fb
--- /dev/null
+++ b/roms/u-boot/arch/arm/mach-versatile/reset.S
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * armboot - Startup Code for ARM926EJS CPU-core
+ *
+ * Copyright (c) 2003 Texas Instruments
+ *
+ * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
+ *
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
+ * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
+ * Copyright (c) 2003 Kshitij <kshitij@ti.com>
+ */
+
+ .align 5
+.globl reset_cpu
+reset_cpu:
+ ldr r1, rstctl1 /* get clkm1 reset ctl */
+ mov r3, #0x0
+ strh r3, [r1] /* clear it */
+ mov r3, #0x8
+ strh r3, [r1] /* force dsp+arm reset */
+_loop_forever:
+ b _loop_forever
+
+rstctl1:
+ .word 0xfffece10
diff --git a/roms/u-boot/arch/arm/mach-versatile/timer.c b/roms/u-boot/arch/arm/mach-versatile/timer.c
new file mode 100644
index 000000000..a0babce7b
--- /dev/null
+++ b/roms/u-boot/arch/arm/mach-versatile/timer.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2003
+ * Texas Instruments <www.ti.com>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * (C) Copyright 2002-2004
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * (C) Copyright 2004
+ * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
+ */
+
+#include <common.h>
+
+#define TIMER_ENABLE (1 << 7)
+#define TIMER_MODE_MSK (1 << 6)
+#define TIMER_MODE_FR (0 << 6)
+#define TIMER_MODE_PD (1 << 6)
+
+#define TIMER_INT_EN (1 << 5)
+#define TIMER_PRS_MSK (3 << 2)
+#define TIMER_PRS_8S (1 << 3)
+#define TIMER_SIZE_MSK (1 << 2)
+#define TIMER_ONE_SHT (1 << 0)
+
+int timer_init (void)
+{
+ ulong tmr_ctrl_val;
+
+ /* 1st disable the Timer */
+ tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
+ tmr_ctrl_val &= ~TIMER_ENABLE;
+ *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
+
+ /*
+ * The Timer Control Register has one Undefined/Shouldn't Use Bit
+ * So we should do read/modify/write Operation
+ */
+
+ /*
+ * Timer Mode : Free Running
+ * Interrupt : Disabled
+ * Prescale : 8 Stage, Clk/256
+ * Tmr Siz : 16 Bit Counter
+ * Tmr in Wrapping Mode
+ */
+ tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
+ tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT );
+ tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S);
+
+ *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
+
+ return 0;
+}
+