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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/microblaze/cpu/spl.c | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/microblaze/cpu/spl.c')
-rw-r--r-- | roms/u-boot/arch/microblaze/cpu/spl.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/roms/u-boot/arch/microblaze/cpu/spl.c b/roms/u-boot/arch/microblaze/cpu/spl.c new file mode 100644 index 000000000..86522f844 --- /dev/null +++ b/roms/u-boot/arch/microblaze/cpu/spl.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2013 - 2014 Xilinx, Inc + * + * Michal Simek <michal.simek@xilinx.com> + */ + +#include <common.h> +#include <command.h> +#include <image.h> +#include <log.h> +#include <spl.h> +#include <asm/io.h> +#include <asm/u-boot.h> + +bool boot_linux; + +u32 spl_boot_device(void) +{ + return BOOT_DEVICE_NOR; +} + +/* Board initialization after bss clearance */ +void spl_board_init(void) +{ + /* enable console uart printing */ + preloader_console_init(); +} + +#ifdef CONFIG_SPL_OS_BOOT +void __noreturn jump_to_image_linux(struct spl_image_info *spl_image) +{ + debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg); + typedef void (*image_entry_arg_t)(char *, ulong, ulong) + __attribute__ ((noreturn)); + image_entry_arg_t image_entry = + (image_entry_arg_t)spl_image->entry_point; + + image_entry(NULL, 0, (ulong)spl_image->arg); +} +#endif /* CONFIG_SPL_OS_BOOT */ + +int spl_start_uboot(void) +{ +#ifdef CONFIG_SPL_OS_BOOT + if (boot_linux) + return 0; +#endif + + return 1; +} + +int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + __asm__ __volatile__ ("mts rmsr, r0;" \ + "bra r0"); + + return 0; +} |