diff options
| author |   Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
|---|---|---|
| committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
| commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
| tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/nios2/include/asm/cache.h | |
| parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) | |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/nios2/include/asm/cache.h')
| -rw-r--r-- | roms/u-boot/arch/nios2/include/asm/cache.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/roms/u-boot/arch/nios2/include/asm/cache.h b/roms/u-boot/arch/nios2/include/asm/cache.h new file mode 100644 index 000000000..57848840d --- /dev/null +++ b/roms/u-boot/arch/nios2/include/asm/cache.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2004, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt@psyent.com> + */ + +#ifndef __ASM_NIOS2_CACHE_H_ +#define __ASM_NIOS2_CACHE_H_ + +/* + * Valid L1 data cache line sizes for the NIOS2 architecture are 4, + * 16, and 32 bytes. We default to the largest of these values for + * alignment of DMA buffers. + */ +#define ARCH_DMA_MINALIGN 32 + +#endif /* __ASM_NIOS2_CACHE_H_ */ |