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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/powerpc/cpu/mpc85xx/c29x_serdes.c | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/powerpc/cpu/mpc85xx/c29x_serdes.c')
-rw-r--r-- | roms/u-boot/arch/powerpc/cpu/mpc85xx/c29x_serdes.c | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/roms/u-boot/arch/powerpc/cpu/mpc85xx/c29x_serdes.c b/roms/u-boot/arch/powerpc/cpu/mpc85xx/c29x_serdes.c new file mode 100644 index 000000000..34b58bb7f --- /dev/null +++ b/roms/u-boot/arch/powerpc/cpu/mpc85xx/c29x_serdes.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + */ + +#include <config.h> +#include <common.h> +#include <log.h> +#include <asm/io.h> +#include <asm/immap_85xx.h> +#include <asm/fsl_serdes.h> + +#define SRDS1_MAX_LANES 4 + +static u32 serdes1_prtcl_map; + +struct serdes_config { + u32 protocol; + u8 lanes[SRDS1_MAX_LANES]; +}; + +static const struct serdes_config serdes1_cfg_tbl[] = { + /* SerDes 1 */ + {1, {PCIE1, PCIE1, PCIE1, PCIE1} }, + {2, {PCIE1, PCIE1, PCIE1, PCIE1} }, + {3, {PCIE1, PCIE1, NONE, NONE} }, + {4, {PCIE1, PCIE1, NONE, NONE} }, + {5, {PCIE1, NONE, NONE, NONE} }, + {6, {PCIE1, NONE, NONE, NONE} }, + {} +}; + +int is_serdes_configured(enum srds_prtcl device) +{ + if (!(serdes1_prtcl_map & (1 << NONE))) + fsl_serdes_init(); + + return (1 << device) & serdes1_prtcl_map; +} + +void fsl_serdes_init(void) +{ + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + u32 pordevsr = in_be32(&gur->pordevsr); + u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> + MPC85xx_PORDEVSR_IO_SEL_SHIFT; + const struct serdes_config *ptr; + int lane; + + if (serdes1_prtcl_map & (1 << NONE)) + return; + + debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); + return; + } + + ptr = &serdes1_cfg_tbl[srds_cfg]; + if (!ptr->protocol) + return; + + for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { + enum srds_prtcl lane_prtcl = ptr->lanes[lane]; + serdes1_prtcl_map |= (1 << lane_prtcl); + } + + /* Set the first bit to indicate serdes has been initialized */ + serdes1_prtcl_map |= (1 << NONE); +} |