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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/x86/cpu/x86_64 | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/x86/cpu/x86_64')
-rw-r--r-- | roms/u-boot/arch/x86/cpu/x86_64/Makefile | 6 | ||||
-rw-r--r-- | roms/u-boot/arch/x86/cpu/x86_64/cpu.c | 77 | ||||
-rw-r--r-- | roms/u-boot/arch/x86/cpu/x86_64/interrupts.c | 29 | ||||
-rw-r--r-- | roms/u-boot/arch/x86/cpu/x86_64/setjmp.S | 49 |
4 files changed, 161 insertions, 0 deletions
diff --git a/roms/u-boot/arch/x86/cpu/x86_64/Makefile b/roms/u-boot/arch/x86/cpu/x86_64/Makefile new file mode 100644 index 000000000..400f0ffe3 --- /dev/null +++ b/roms/u-boot/arch/x86/cpu/x86_64/Makefile @@ -0,0 +1,6 @@ +# +# (C) Copyright 2016 Google, Inc +# Written by Simon Glass <sjg@chromium.org> +# + +obj-y += cpu.o interrupts.o setjmp.o diff --git a/roms/u-boot/arch/x86/cpu/x86_64/cpu.c b/roms/u-boot/arch/x86/cpu/x86_64/cpu.c new file mode 100644 index 000000000..90a766c3c --- /dev/null +++ b/roms/u-boot/arch/x86/cpu/x86_64/cpu.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <common.h> +#include <cpu_func.h> +#include <debug_uart.h> +#include <init.h> + +/* + * Global declaration of gd. + * + * As we write to it before relocation we have to make sure it is not put into + * a .bss section which may overlap a .rela section. Initialization forces it + * into a .data section which cannot overlap any .rela section. + */ +struct global_data *global_data_ptr = (struct global_data *)~0; + +void arch_setup_gd(gd_t *new_gd) +{ + global_data_ptr = new_gd; +} + +int cpu_has_64bit(void) +{ + return true; +} + +void enable_caches(void) +{ + /* Not implemented */ +} + +void disable_caches(void) +{ + /* Not implemented */ +} + +int dcache_status(void) +{ + return true; +} + +int x86_mp_init(void) +{ + /* Not implemented */ + return 0; +} + +int misc_init_r(void) +{ + return 0; +} + +#ifndef CONFIG_SYS_COREBOOT +int checkcpu(void) +{ + return 0; +} + +int print_cpuinfo(void) +{ + return 0; +} +#endif + +int x86_cpu_reinit_f(void) +{ + return 0; +} + +int cpu_phys_address_size(void) +{ + return CONFIG_CPU_ADDR_BITS; +} diff --git a/roms/u-boot/arch/x86/cpu/x86_64/interrupts.c b/roms/u-boot/arch/x86/cpu/x86_64/interrupts.c new file mode 100644 index 000000000..634f7660c --- /dev/null +++ b/roms/u-boot/arch/x86/cpu/x86_64/interrupts.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <common.h> +#include <irq_func.h> +#include <asm/processor-flags.h> + +void enable_interrupts(void) +{ + asm("sti\n"); +} + +int disable_interrupts(void) +{ + long flags; + + asm volatile ("pushfq ; popq %0 ; cli\n" : "=g" (flags) : ); + + return flags & X86_EFLAGS_IF; +} + +int interrupt_init(void) +{ + /* Nothing to do - this was already done in SPL */ + return 0; +} diff --git a/roms/u-boot/arch/x86/cpu/x86_64/setjmp.S b/roms/u-boot/arch/x86/cpu/x86_64/setjmp.S new file mode 100644 index 000000000..97b812854 --- /dev/null +++ b/roms/u-boot/arch/x86/cpu/x86_64/setjmp.S @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 Intel Corporation + * + * See arch/x86/include/asm/setjmp.h for jmp_buf format + */ + +#include <linux/linkage.h> + +.text +.align 8 + +ENTRY(setjmp) + + pop %rcx + movq %rcx, (%rdi) /* Return address */ + movq %rsp, 8(%rdi) + movq %rbp, 16(%rdi) + movq %rbx, 24(%rdi) + movq %r12, 32(%rdi) + movq %r13, 40(%rdi) + movq %r14, 48(%rdi) + movq %r15, 56(%rdi) + xorq %rax, %rax /* Direct invocation returns 0 */ + jmpq *%rcx + +ENDPROC(setjmp) + +.align 8 + +ENTRY(longjmp) + + movq (%rdi), %rcx /* Return address */ + movq 8(%rdi), %rsp + movq 16(%rdi), %rbp + movq 24(%rdi), %rbx + movq 32(%rdi), %r12 + movq 40(%rdi), %r13 + movq 48(%rdi), %r14 + movq 56(%rdi), %r15 + + movq %rsi, %rax /* Value to be returned by setjmp() */ + testq %rax, %rax /* cannot be 0 in this case */ + jnz 1f + incq %rax /* Return 1 instead */ +1: + jmpq *%rcx + +ENDPROC(longjmp) |