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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/x86/include/asm/arch-quark/iomap.h | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/x86/include/asm/arch-quark/iomap.h')
-rw-r--r-- | roms/u-boot/arch/x86/include/asm/arch-quark/iomap.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/roms/u-boot/arch/x86/include/asm/arch-quark/iomap.h b/roms/u-boot/arch/x86/include/asm/arch-quark/iomap.h new file mode 100644 index 000000000..e233252dc --- /dev/null +++ b/roms/u-boot/arch/x86/include/asm/arch-quark/iomap.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com> + */ + +#ifndef _QUARK_IOMAP_H_ +#define _QUARK_IOMAP_H_ + +/* Memory Mapped IO bases */ + +/* ESRAM */ +#define ESRAM_BASE_ADDRESS CONFIG_ESRAM_BASE +#define ESRAM_BASE_SIZE ESRAM_SIZE + +/* PCI Configuration Space */ +#define MCFG_BASE_ADDRESS CONFIG_PCIE_ECAM_BASE +#define MCFG_BASE_SIZE 0x10000000 + +/* High Performance Event Timer */ +#define HPET_BASE_ADDRESS 0xfed00000 +#define HPET_BASE_SIZE 0x400 + +/* Root Complex Base Address */ +#define RCBA_BASE_ADDRESS CONFIG_RCBA_BASE +#define RCBA_BASE_SIZE 0x4000 + +/* IO Port bases */ +#define ACPI_PM1_BASE_ADDRESS CONFIG_ACPI_PM1_BASE +#define ACPI_PM1_BASE_SIZE 0x10 + +#define ACPI_PBLK_BASE_ADDRESS CONFIG_ACPI_PBLK_BASE +#define ACPI_PBLK_BASE_SIZE 0x10 + +#define SPI_DMA_BASE_ADDRESS CONFIG_SPI_DMA_BASE +#define SPI_DMA_BASE_SIZE 0x10 + +#define GPIO_BASE_ADDRESS CONFIG_GPIO_BASE +#define GPIO_BASE_SIZE 0x80 + +#define ACPI_GPE0_BASE_ADDRESS CONFIG_ACPI_GPE0_BASE +#define ACPI_GPE0_BASE_SIZE 0x40 + +#define WDT_BASE_ADDRESS CONFIG_WDT_BASE +#define WDT_BASE_SIZE 0x40 + +#endif /* _QUARK_IOMAP_H_ */ |