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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/arch/x86/lib/fsp2/fsp_silicon_init.c | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/arch/x86/lib/fsp2/fsp_silicon_init.c')
-rw-r--r-- | roms/u-boot/arch/x86/lib/fsp2/fsp_silicon_init.c | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/roms/u-boot/arch/x86/lib/fsp2/fsp_silicon_init.c b/roms/u-boot/arch/x86/lib/fsp2/fsp_silicon_init.c new file mode 100644 index 000000000..a96d2b183 --- /dev/null +++ b/roms/u-boot/arch/x86/lib/fsp2/fsp_silicon_init.c @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: Intel +/* + * Copyright (C) 2015-2016 Intel Corp. + * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.) + * + * Mostly taken from coreboot fsp2_0/silicon_init.c + */ + +#define LOG_CATEGORY UCLASS_NORTHBRIDGE + +#include <common.h> +#include <binman.h> +#include <bootstage.h> +#include <dm.h> +#include <log.h> +#include <asm/arch/fsp/fsp_configs.h> +#include <asm/arch/fsp/fsp_s_upd.h> +#include <asm/fsp/fsp_infoheader.h> +#include <asm/fsp2/fsp_internal.h> +#include <asm/global_data.h> + +int fsp_silicon_init(bool s3wake, bool use_spi_flash) +{ + struct fsps_upd upd, *fsp_upd; + fsp_silicon_init_func func; + struct fsp_header *hdr; + struct binman_entry entry; + struct udevice *dev; + ulong rom_offset = 0; + u32 init_addr; + int ret; + + log_debug("Locating FSP\n"); + ret = fsp_locate_fsp(FSP_S, &entry, use_spi_flash, &dev, &hdr, + &rom_offset); + if (ret) + return log_msg_ret("locate FSP", ret); + binman_set_rom_offset(rom_offset); + gd->arch.fsp_s_hdr = hdr; + + /* Copy over the default config */ + fsp_upd = (struct fsps_upd *)(hdr->img_base + hdr->cfg_region_off); + if (fsp_upd->header.signature != FSPS_UPD_SIGNATURE) + return log_msg_ret("Bad UPD signature", -EPERM); + memcpy(&upd, fsp_upd, sizeof(upd)); + + ret = fsps_update_config(dev, rom_offset, &upd); + if (ret) + return log_msg_ret("Could not setup config", ret); + log_debug("Silicon init @ %x...", init_addr); + bootstage_start(BOOTSTAGE_ID_ACCUM_FSP_S, "fsp-s"); + func = (fsp_silicon_init_func)(hdr->img_base + hdr->fsp_silicon_init); + ret = func(&upd); + bootstage_accum(BOOTSTAGE_ID_ACCUM_FSP_S); + if (ret) + return log_msg_ret("Silicon init fail\n", ret); + log_debug("done\n"); + + return 0; +} |