diff options
author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/board/elgin/elgin_rv1108 | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/board/elgin/elgin_rv1108')
-rw-r--r-- | roms/u-boot/board/elgin/elgin_rv1108/Kconfig | 15 | ||||
-rw-r--r-- | roms/u-boot/board/elgin/elgin_rv1108/MAINTAINERS | 6 | ||||
-rw-r--r-- | roms/u-boot/board/elgin/elgin_rv1108/Makefile | 7 | ||||
-rw-r--r-- | roms/u-boot/board/elgin/elgin_rv1108/elgin_rv1108.c | 75 |
4 files changed, 103 insertions, 0 deletions
diff --git a/roms/u-boot/board/elgin/elgin_rv1108/Kconfig b/roms/u-boot/board/elgin/elgin_rv1108/Kconfig new file mode 100644 index 000000000..be9243164 --- /dev/null +++ b/roms/u-boot/board/elgin/elgin_rv1108/Kconfig @@ -0,0 +1,15 @@ +if TARGET_ELGIN_RV1108 + +config SYS_BOARD + default "elgin_rv1108" + +config SYS_VENDOR + default "elgin" + +config SYS_CONFIG_NAME + default "elgin_rv1108" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/roms/u-boot/board/elgin/elgin_rv1108/MAINTAINERS b/roms/u-boot/board/elgin/elgin_rv1108/MAINTAINERS new file mode 100644 index 000000000..774749016 --- /dev/null +++ b/roms/u-boot/board/elgin/elgin_rv1108/MAINTAINERS @@ -0,0 +1,6 @@ +ELGIN-RV1108 +M: Otavio Salvador <otavio@ossystems.com.br> +S: Maintained +F: board/elgin/elgin_rv1108 +F: include/configs/elgin_rv1108.h +F: configs/elgin-rv1108_defconfig diff --git a/roms/u-boot/board/elgin/elgin_rv1108/Makefile b/roms/u-boot/board/elgin/elgin_rv1108/Makefile new file mode 100644 index 000000000..382218006 --- /dev/null +++ b/roms/u-boot/board/elgin/elgin_rv1108/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2016 Rockchip Electronics Co., Ltd +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += elgin_rv1108.o diff --git a/roms/u-boot/board/elgin/elgin_rv1108/elgin_rv1108.c b/roms/u-boot/board/elgin/elgin_rv1108/elgin_rv1108.c new file mode 100644 index 000000000..eb7a322d8 --- /dev/null +++ b/roms/u-boot/board/elgin/elgin_rv1108/elgin_rv1108.c @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C)Copyright 2016 Rockchip Electronics Co., Ltd + * Authors: Andy Yan <andy.yan@rock-chips.com> + */ + +#include <common.h> +#include <init.h> +#include <syscon.h> +#include <asm/global_data.h> +#include <asm/io.h> +#include <asm/arch-rockchip/clock.h> +#include <asm/arch-rockchip/grf_rv1108.h> +#include <asm/arch-rockchip/hardware.h> +#include <asm/gpio.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + struct rv1108_grf *grf; + enum { + GPIO3C3_SHIFT = 6, + GPIO3C3_MASK = 3 << GPIO3C3_SHIFT, + + GPIO3C2_SHIFT = 4, + GPIO3C2_MASK = 3 << GPIO3C2_SHIFT, + + GPIO2D2_SHIFT = 4, + GPIO2D2_MASK = 3 << GPIO2D2_SHIFT, + GPIO2D2_GPIO = 0, + GPIO2D2_UART2_SOUT_M0, + + GPIO2D1_SHIFT = 2, + GPIO2D1_MASK = 3 << GPIO2D1_SHIFT, + GPIO2D1_GPIO = 0, + GPIO2D1_UART2_SIN_M0, + }; + + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + + /* Elgin board use UART2 m0 for debug*/ + rk_clrsetreg(&grf->gpio2d_iomux, + GPIO2D2_MASK | GPIO2D1_MASK, + GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT | + GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT); + rk_clrreg(&grf->gpio3c_iomux, GPIO3C3_MASK | GPIO3C2_MASK); + + return 0; +} + +#define MODEM_ENABLE_GPIO 111 + +int rk_board_late_init(void) +{ + gpio_request(MODEM_ENABLE_GPIO, "modem_enable"); + gpio_direction_output(MODEM_ENABLE_GPIO, 0); + + return 0; +} + +int dram_init(void) +{ + gd->ram_size = 0x8000000; + + return 0; +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = 0x60000000; + gd->bd->bi_dram[0].size = 0x8000000; + + return 0; +} |