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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/board/freescale/ls1012aqds/Kconfig | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/board/freescale/ls1012aqds/Kconfig')
-rw-r--r-- | roms/u-boot/board/freescale/ls1012aqds/Kconfig | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/roms/u-boot/board/freescale/ls1012aqds/Kconfig b/roms/u-boot/board/freescale/ls1012aqds/Kconfig new file mode 100644 index 000000000..59b1a8766 --- /dev/null +++ b/roms/u-boot/board/freescale/ls1012aqds/Kconfig @@ -0,0 +1,83 @@ +if TARGET_LS1012AQDS + +config SYS_BOARD + default "ls1012aqds" + +config SYS_VENDOR + default "freescale" + +config SYS_SOC + default "fsl-layerscape" + +config SYS_CONFIG_NAME + default "ls1012aqds" + +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x40400000 + +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x40680000 + +config SYS_LS_PFE_ESBC_ADDR + hex "PFE Firmware HDR Addr" + default 0x40700000 + +config SYS_LS_PFE_ESBC_LENGTH + hex "length of PFE Firmware HDR" + default 0xc00 +endif + +if FSL_PFE + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select PHYLIB + imply PHY_VITESSE + imply PHY_REALTEK + imply PHY_AQUANTIA + imply PHYLIB_10G + +config PFE_RGMII_RESET_WA + def_bool y + +config SYS_LS_PFE_FW_ADDR + hex "Flash address of PFE firmware" + default 0x40a00000 + +config SYS_LS_PFE_FW_LENGTH + hex "length of PFE firmware" + default 0x300000 + +config DDR_PFE_PHYS_BASEADDR + hex "PFE DDR physical base address" + default 0x03800000 + +config DDR_PFE_BASEADDR + hex "PFE DDR base address" + default 0x83800000 + +config PFE_EMAC1_PHY_ADDR + hex "PFE DDR base address" + default 0x1e + +config PFE_EMAC2_PHY_ADDR + hex "PFE DDR base address" + default 0x1 + +config PFE_SGMII_2500_PHY1_ADDR + hex "PFE DDR base address" + default 0x1 + +config PFE_SGMII_2500_PHY2_ADDR + hex "PFE DDR base address" + default 0x2 + +endif + + +source "board/freescale/common/Kconfig" + +endif |