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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/board/freescale/m54451evb | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/board/freescale/m54451evb')
-rw-r--r-- | roms/u-boot/board/freescale/m54451evb/Kconfig | 15 | ||||
-rw-r--r-- | roms/u-boot/board/freescale/m54451evb/MAINTAINERS | 7 | ||||
-rw-r--r-- | roms/u-boot/board/freescale/m54451evb/Makefile | 7 | ||||
-rw-r--r-- | roms/u-boot/board/freescale/m54451evb/m54451evb.c | 98 | ||||
-rw-r--r-- | roms/u-boot/board/freescale/m54451evb/sbf_dram_init.S | 96 |
5 files changed, 223 insertions, 0 deletions
diff --git a/roms/u-boot/board/freescale/m54451evb/Kconfig b/roms/u-boot/board/freescale/m54451evb/Kconfig new file mode 100644 index 000000000..f460e51c9 --- /dev/null +++ b/roms/u-boot/board/freescale/m54451evb/Kconfig @@ -0,0 +1,15 @@ +if TARGET_M54451EVB + +config SYS_CPU + default "mcf5445x" + +config SYS_BOARD + default "m54451evb" + +config SYS_VENDOR + default "freescale" + +config SYS_CONFIG_NAME + default "M54451EVB" + +endif diff --git a/roms/u-boot/board/freescale/m54451evb/MAINTAINERS b/roms/u-boot/board/freescale/m54451evb/MAINTAINERS new file mode 100644 index 000000000..52a268108 --- /dev/null +++ b/roms/u-boot/board/freescale/m54451evb/MAINTAINERS @@ -0,0 +1,7 @@ +M54451EVB BOARD +#M: - +S: Maintained +F: board/freescale/m54451evb/ +F: include/configs/M54451EVB.h +F: configs/M54451EVB_defconfig +F: configs/M54451EVB_stmicro_defconfig diff --git a/roms/u-boot/board/freescale/m54451evb/Makefile b/roms/u-boot/board/freescale/m54451evb/Makefile new file mode 100644 index 000000000..8c2c6a9eb --- /dev/null +++ b/roms/u-boot/board/freescale/m54451evb/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. + +obj-y = m54451evb.o +extra-y += sbf_dram_init.o diff --git a/roms/u-boot/board/freescale/m54451evb/m54451evb.c b/roms/u-boot/board/freescale/m54451evb/m54451evb.c new file mode 100644 index 000000000..a4ddc6916 --- /dev/null +++ b/roms/u-boot/board/freescale/m54451evb/m54451evb.c @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2000-2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + */ + +#include <common.h> +#include <init.h> +#include <spi.h> +#include <asm/global_data.h> +#include <asm/immap.h> +#include <asm/io.h> +#include <linux/delay.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + /* + * need to to: + * Check serial flash size. if 2mb evb, else 8mb demo + */ + puts("Board: "); + puts("Freescale M54451 EVB\n"); + return 0; +}; + +int dram_init(void) +{ + u32 dramsize; +#ifdef CONFIG_CF_SBF + /* + * Serial Boot: The dram is already initialized in start.S + * only require to return DRAM size + */ + dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; +#else + sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM); + gpio_t *gpio = (gpio_t *)(MMAP_GPIO); + u32 i; + + dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; + + if ((in_be32(&sdram->sdcfg1) == CONFIG_SYS_SDRAM_CFG1) && + (in_be32(&sdram->sdcfg2) == CONFIG_SYS_SDRAM_CFG2)) + return dramsize; + + for (i = 0x13; i < 0x20; i++) { + if (dramsize == (1 << i)) + break; + } + i--; + + out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH); + + out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i); + + out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1); + out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2); + + udelay(200); + + /* Issue PALL */ + out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2); + __asm__("nop"); + + /* Perform two refresh cycles */ + out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4); + __asm__("nop"); + out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4); + __asm__("nop"); + + /* Issue LEMR */ + out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE); + __asm__("nop"); + out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE); + __asm__("nop"); + + out_be32(&sdram->sdcr, + (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000000); + + udelay(100); +#endif + gd->ram_size = dramsize; + + return 0; +}; + +int testdram(void) +{ + /* TODO: XXX XXX XXX */ + printf("DRAM test not implemented!\n"); + + return (0); +} diff --git a/roms/u-boot/board/freescale/m54451evb/sbf_dram_init.S b/roms/u-boot/board/freescale/m54451evb/sbf_dram_init.S new file mode 100644 index 000000000..ee08cd1ec --- /dev/null +++ b/roms/u-boot/board/freescale/m54451evb/sbf_dram_init.S @@ -0,0 +1,96 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Board-specific sbf ddr/sdram init. + * + * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it> + */ + + #include <config.h> + +.global sbf_dram_init +.text + +sbf_dram_init: + /* Dram Initialization a1, a2, and d0 */ + /* mscr sdram */ + move.l #0xFC0A4074, %a1 + move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1) + nop + + /* SDRAM Chip 0 and 1 */ + move.l #0xFC0B8110, %a1 + move.l #0xFC0B8114, %a2 + + /* calculate the size */ + move.l #0x13, %d1 + move.l #(CONFIG_SYS_SDRAM_SIZE), %d2 +#ifdef CONFIG_SYS_SDRAM_BASE1 + lsr.l #1, %d2 +#endif + +dramsz_loop: + lsr.l #1, %d2 + add.l #1, %d1 + cmp.l #1, %d2 + bne dramsz_loop +#ifdef CONFIG_SYS_NAND_BOOT + beq asm_nand_chk_status +#endif + /* SDRAM Chip 0 and 1 */ + move.l #(CONFIG_SYS_SDRAM_BASE), (%a1) + or.l %d1, (%a1) +#ifdef CONFIG_SYS_SDRAM_BASE1 + move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2) + or.l %d1, (%a2) +#endif + nop + + /* dram cfg1 and cfg2 */ + move.l #0xFC0B8008, %a1 + move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1) + nop + move.l #0xFC0B800C, %a2 + move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2) + nop + + move.l #0xFC0B8000, %a1 /* Mode */ + move.l #0xFC0B8004, %a2 /* Ctrl */ + + /* Issue PALL */ + move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2) + nop + + move.l #1000, %d1 + bsr asm_delay + + /* Issue PALL */ + move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2) + nop + + /* Perform two refresh cycles */ + move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0 + nop + move.l %d0, (%a2) + move.l %d0, (%a2) + nop + + /* Issue LEMR */ + move.l #(CONFIG_SYS_SDRAM_MODE), (%a1) + nop + move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1) + + move.l #500, %d1 + bsr asm_delay + + move.l #(CONFIG_SYS_SDRAM_CTRL), %d1 + and.l #0x7FFFFFFF, %d1 + + or.l #0x10000C00, %d1 + + move.l %d1, (%a2) + nop + + move.l #2000, %d1 + bsr asm_delay + + rts |