Add submodule dependency filesHEADmaster

Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec

6 files changed, 436 insertions, 0 deletions

diff --git a/roms/u-boot/board/warp/Kconfig b/roms/u-boot/board/warp/Kconfig
new file mode 100644
index 000000000..dc0263631
--- /dev/null
+++ b/roms/u-boot/board/warp/Kconfig
@@ -0,0 +1,9 @@
+if TARGET_WARP
+
+config SYS_BOARD
+	default "warp"
+
+config SYS_CONFIG_NAME
+	default "warp"
+
+endif
diff --git a/roms/u-boot/board/warp/MAINTAINERS b/roms/u-boot/board/warp/MAINTAINERS
new file mode 100644
index 000000000..ee2114d08
--- /dev/null
+++ b/roms/u-boot/board/warp/MAINTAINERS
@@ -0,0 +1,6 @@
+WaRP BOARD
+M:	Otavio Salvador <otavio@ossystems.com.br>
+S:	Maintained
+F:	board/warp/
+F:	include/configs/warp.h
+F:	configs/warp_defconfig
diff --git a/roms/u-boot/board/warp/Makefile b/roms/u-boot/board/warp/Makefile
new file mode 100644
index 000000000..3a2373d7b
--- /dev/null
+++ b/roms/u-boot/board/warp/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2014 O.S. Systems Software LTDA.
+# Copyright (C) 2014 Kynetics LLC.
+# Copyright (C) 2014 Revolution Robotics, Inc.
+
+obj-y  := warp.o
diff --git a/roms/u-boot/board/warp/README b/roms/u-boot/board/warp/README
new file mode 100644
index 000000000..3cfd22ec7
--- /dev/null
+++ b/roms/u-boot/board/warp/README
@@ -0,0 +1,56 @@
+How to Update U-Boot on Warp board
+----------------------------------
+
+Required software on the host PC:
+
+- imx_usb_loader: https://github.com/boundarydevices/imx_usb_loader
+
+- dfu-util: http://dfu-util.sourceforge.net/releases/
+
+Build U-Boot for Warp:
+
+$ make mrproper
+$ make warp_config
+$ make
+
+This will generate the U-Boot binary called u-boot.imx.
+
+Put warp board in USB download mode
+
+Connect a USB to serial adapter between the host PC and warp
+
+Connect a USB cable between the OTG warp port and the host PC
+
+Open a terminal program such as minicom
+
+Copy u-boot.imx to the imx_usb_loader folder.
+
+Load u-boot.imx via USB:
+
+$ sudo ./imx_usb u-boot.imx
+
+Then U-Boot should start and its messages will appear in the console program.
+
+Use the default environment variables:
+
+=> env default -f -a
+=> saveenv
+
+Run the DFU command:
+=> dfu 0 mmc 0
+
+Transfer u-boot.imx that will be flashed into the eMMC:
+
+$ sudo dfu-util -D u-boot.imx -a boot
+
+Then on the U-Boot prompt the following message should be seen after a
+successful upgrade:
+
+#DOWNLOAD ... OK
+Ctrl+C to exit ...
+
+Remove power from the warp board.
+
+Put warp board into normal boot mode
+
+Power up the board and the new updated U-Boot should boot from eMMC
diff --git a/roms/u-boot/board/warp/imximage.cfg b/roms/u-boot/board/warp/imximage.cfg
new file mode 100644
index 000000000..619f6aa7b
--- /dev/null
+++ b/roms/u-boot/board/warp/imximage.cfg
@@ -0,0 +1,123 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
+ * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+#define __ASSEMBLY__
+#include <config.h>
+
+/* image version */
+
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+
+BOOT_FROM	sd
+
+/*
+ * Secure boot support
+ */
+#ifdef CONFIG__IMX_HAB
+CSF CONFIG_CSF_SIZE
+#endif
+
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type           Address        Value
+ *
+ * where:
+ *	Addr-type register length (1,2 or 4 bytes)
+ *	Address	  absolute address of the register
+ *	value	  value to be stored in the register
+ */
+DATA 4 0x020c4018 0x00260324
+
+DATA 4 0x020c4068 0xffffffff
+DATA 4 0x020c406c 0xffffffff
+DATA 4 0x020c4070 0xffffffff
+DATA 4 0x020c4074 0xffffffff
+DATA 4 0x020c4078 0xffffffff
+DATA 4 0x020c407c 0xffffffff
+DATA 4 0x020c4080 0xffffffff
+
+DATA 4 0x020e0344 0x00003030
+DATA 4 0x020e0348 0x00003030
+DATA 4 0x020e034c 0x00003030
+DATA 4 0x020e0350 0x00003030
+DATA 4 0x020e030c 0x00000030
+DATA 4 0x020e0310 0x00000030
+DATA 4 0x020e0314 0x00000030
+DATA 4 0x020e0318 0x00000030
+DATA 4 0x020e0300 0x00000030
+DATA 4 0x020e031c 0x00000030
+DATA 4 0x020e0338 0x00000028
+DATA 4 0x020e0320 0x00000030
+DATA 4 0x020e032c 0x00000000
+DATA 4 0x020e033c 0x00000008
+DATA 4 0x020e0340 0x00000008
+DATA 4 0x020e05c4 0x00000030
+DATA 4 0x020e05cc 0x00000030
+DATA 4 0x020e05d4 0x00000030
+DATA 4 0x020e05d8 0x00000030
+DATA 4 0x020e05ac 0x00000030
+DATA 4 0x020e05c8 0x00000030
+DATA 4 0x020e05b0 0x00020000
+DATA 4 0x020e05b4 0x00000000
+DATA 4 0x020e05c0 0x00020000
+DATA 4 0x020e05d0 0x00080000
+
+DATA 4 0x021b001c 0x00008000
+DATA 4 0x021b085c 0x1b4700c7
+DATA 4 0x021b0800 0xa1390003
+DATA 4 0x021b0890 0x00400000
+DATA 4 0x021b08b8 0x00000800
+DATA 4 0x021b081c 0x33333333
+DATA 4 0x021b0820 0x33333333
+DATA 4 0x021b0824 0x33333333
+DATA 4 0x021b0828 0x33333333
+DATA 4 0x021b082c 0xf3333333
+DATA 4 0x021b0830 0xf3333333
+DATA 4 0x021b0834 0xf3333333
+DATA 4 0x021b0838 0xf3333333
+DATA 4 0x021b0848 0x4241444a
+DATA 4 0x021b0850 0x3030312b
+DATA 4 0x021b083c 0x20000000
+DATA 4 0x021b0840 0x00000000
+DATA 4 0x021b08c0 0x24911492
+DATA 4 0x021b08b8 0x00000800
+DATA 4 0x021b000c 0x33374133
+DATA 4 0x021b0004 0x00020024
+DATA 4 0x021b0010 0x00100A82
+DATA 4 0x021b0014 0x00000093
+DATA 4 0x021b0018 0x00001688
+DATA 4 0x021b002c 0x0f9f26d2
+DATA 4 0x021b0030 0x009f0e10
+DATA 4 0x021b0038 0x00190778
+DATA 4 0x021b0008 0x00000000
+DATA 4 0x021b0040 0x0000004f
+DATA 4 0x021b0000 0x83110000
+DATA 4 0x021b001c 0x003f8030
+DATA 4 0x021b001c 0xff0a8030
+DATA 4 0x021b001c 0x82018030
+DATA 4 0x021b001c 0x04028030
+DATA 4 0x021b001c 0x02038030
+DATA 4 0x021b001c 0xff0a8038
+DATA 4 0x021b001c 0x82018038
+DATA 4 0x021b001c 0x04028038
+DATA 4 0x021b001c 0x02038038
+DATA 4 0x021b0800 0xa1310003
+DATA 4 0x021b0020 0x00001800
+DATA 4 0x021b0818 0x00000000
+DATA 4 0x021b08b8 0x00000800
+DATA 4 0x021b0004 0x00025564
+DATA 4 0x021b0404 0x00011006
+DATA 4 0x021b001c 0x00000000
diff --git a/roms/u-boot/board/warp/warp.c b/roms/u-boot/board/warp/warp.c
new file mode 100644
index 000000000..c03b64885
--- /dev/null
+++ b/roms/u-boot/board/warp/warp.c
@@ -0,0 +1,236 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2014, 2015 O.S. Systems Software LTDA.
+ * Copyright (C) 2014 Kynetics LLC.
+ * Copyright (C) 2014 Revolution Robotics, Inc.
+ *
+ * Author: Otavio Salvador <otavio@ossystems.com.br>
+ */
+
+#include <init.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx6-pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/global_data.h>
+#include <asm/gpio.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/mxc_i2c.h>
+#include <asm/io.h>
+#include <linux/sizes.h>
+#include <common.h>
+#include <watchdog.h>
+#include <fsl_esdhc_imx.h>
+#include <i2c.h>
+#include <mmc.h>
+#include <usb.h>
+#include <power/pmic.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+	PAD_CTL_SRE_FAST  | PAD_CTL_HYS | \
+	PAD_CTL_LVE)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \
+	PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
+	PAD_CTL_SRE_FAST  | PAD_CTL_HYS | \
+	PAD_CTL_LVE)
+
+#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |		\
+		      PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |	\
+		      PAD_CTL_DSE_40ohm | PAD_CTL_HYS |		\
+		      PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+#define CONFIG_POWER_MAX77696_I2C_ADDR	0x3C
+
+enum {
+	L01_CNFG1 =	0x43,
+	L01_CNFG2,
+	L02_CNFG1,
+	L02_CNFG2,
+	L03_CNFG1,
+	L03_CNFG2,
+	L04_CNFG1,
+	L04_CNFG2,
+	L05_CNFG1,
+	L05_CNFG2,
+	L06_CNFG1,
+	L06_CNFG2,
+	L07_CNFG1,
+	L07_CNFG2,
+	L08_CNFG1,
+	L08_CNFG2,
+	L09_CNFG1,
+	L09_CNFG2,
+	L10_CNFG1,
+	L10_CNFG2,
+	LDO_INT1,
+	LDO_INT2,
+	LDO_INT1M,
+	LDO_INT2M,
+	LDO_CNFG3,
+	SW1_CNTRL,
+	SW2_CNTRL,
+	SW3_CNTRL,
+	SW4_CNTRL,
+	EPDCNFG,
+	EPDINTS,
+	EPDINT,
+	EPDINTM,
+	EPDVCOM,
+	EPDVEE,
+	EPDVNEG,
+	EPDVPOS,
+	EPDVDDH,
+	EPDSEQ,
+	EPDOKINTS,
+	CID =	0x9c,
+	PMIC_NUM_OF_REGS,
+};
+
+int dram_init(void)
+{
+	gd->ram_size = imx_ddr_size();
+
+	return 0;
+}
+
+static void setup_iomux_uart(void)
+{
+	static iomux_v3_cfg_t const uart1_pads[] = {
+		MX6_PAD_UART1_TXD__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
+		MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
+	};
+
+	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
+}
+
+static struct fsl_esdhc_cfg usdhc_cfg[1] = {
+	{USDHC2_BASE_ADDR, 0, 0, 0, 1},
+};
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+	return 1;	/* Assume boot SD always present */
+}
+
+int board_mmc_init(struct bd_info *bis)
+{
+	static iomux_v3_cfg_t const usdhc2_pads[] = {
+		MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_RST__USDHC2_RST | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT4__USDHC2_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT5__USDHC2_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT6__USDHC2_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT7__USDHC2_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	};
+
+	imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
+
+	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+	return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+}
+
+int board_usb_phy_mode(int port)
+{
+	return USB_INIT_DEVICE;
+}
+
+/* I2C1 for PMIC */
+#define I2C_PMIC	0
+#define PC	MUX_PAD_CTRL(I2C_PAD_CTRL)
+struct i2c_pads_info i2c_pad_info1 = {
+	.sda = {
+		.i2c_mode = MX6_PAD_I2C1_SDA__I2C1_SDA | PC,
+		.gpio_mode = MX6_PAD_I2C1_SDA__GPIO_3_13 | PC,
+		.gp = IMX_GPIO_NR(3, 13),
+	},
+	.scl = {
+		.i2c_mode = MX6_PAD_I2C1_SCL__I2C1_SCL | PC,
+		.gpio_mode = MX6_PAD_I2C1_SCL__GPIO_3_12 | PC,
+		.gp = IMX_GPIO_NR(3, 12),
+	},
+};
+
+static int power_max77696_init(unsigned char bus)
+{
+	static const char name[] = "MAX77696";
+	struct pmic *p = pmic_alloc();
+
+	if (!p) {
+		printf("%s: POWER allocation error!\n", __func__);
+		return -ENOMEM;
+	}
+
+	p->name = name;
+	p->interface = PMIC_I2C;
+	p->number_of_regs = PMIC_NUM_OF_REGS;
+	p->hw.i2c.addr = CONFIG_POWER_MAX77696_I2C_ADDR;
+	p->hw.i2c.tx_num = 1;
+	p->bus = bus;
+
+	return 0;
+}
+
+int power_init_board(void)
+{
+	struct pmic *p;
+	int ret;
+	unsigned int reg;
+
+	ret = power_max77696_init(I2C_PMIC);
+	if (ret)
+		return ret;
+
+	p = pmic_get("MAX77696");
+	if (!p)
+		return -EINVAL;
+
+	ret = pmic_reg_read(p, CID, &reg);
+	if (ret)
+		return ret;
+
+	printf("PMIC:  MAX77696 detected, rev=0x%x\n", reg);
+
+	return pmic_probe(p);
+}
+
+int board_early_init_f(void)
+{
+	setup_iomux_uart();
+	return 0;
+}
+
+int board_init(void)
+{
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+#ifdef CONFIG_HW_WATCHDOG
+	hw_watchdog_init();
+#endif
+
+	return 0;
+}
+
+int checkboard(void)
+{
+	puts("Board: WaRP Board\n");
+
+	return 0;
+}