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author | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
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committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig')
-rw-r--r-- | roms/u-boot/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/roms/u-boot/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/roms/u-boot/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig new file mode 100644 index 000000000..e3d9a75dc --- /dev/null +++ b/roms/u-boot/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -0,0 +1,85 @@ +CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y +CONFIG_TARGET_LS1028ARDB=y +CONFIG_TFABOOT=y +CONFIG_SYS_MALLOC_F_LEN=0x6000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff +CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-rdb" +CONFIG_FSPI_AHB_EN_4BYTE=y +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_WDT=y +CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_DM=y +CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0 +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_VITESSE=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_DSA=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_MSCC_FELIX_SWITCH=y +CONFIG_NVME=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_ECAM_GENERIC=y +CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_DM_RTC=y +CONFIG_RTC_PCF2127=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_DSPI=y +CONFIG_NXP_FSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_WDT=y +CONFIG_WDT_SP805=y +CONFIG_RSA=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y |