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author | 2023-10-10 14:33:42 +0000 | |
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committer | 2023-10-10 14:33:42 +0000 | |
commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/doc/device-tree-bindings/sysreset | |
parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/doc/device-tree-bindings/sysreset')
-rw-r--r-- | roms/u-boot/doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/roms/u-boot/doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt b/roms/u-boot/doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt new file mode 100644 index 000000000..02704c648 --- /dev/null +++ b/roms/u-boot/doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt @@ -0,0 +1,29 @@ +Texas Instruments TI SCI System Reset Controller +================================================ + +Some TI SoCs contain a system controller (like the SYSFW, etc...) that is +responsible for controlling the state of the IPs that are present. +Communication between the host processor running an OS and the system +controller happens through a protocol known as TI SCI [1]. + +[1] http://processors.wiki.ti.com/index.php/TISCI + +System Reset Controller Node +============================ +The sysreset controller node represents the reset for the overall SoC +which is managed by the SYSFW. Because this relies on the TI SCI protocol +to communicate with the SYSFW it must be a child of the sysfw node. + +Required Properties: +-------------------- + - compatible: Must be "ti,sci-sysreset" + +Example (AM65x): +---------------- + sysfw: sysfw { + compatible = "ti,am654-system-controller"; + ... + k3_sysreset: sysreset-controller { + compatible = "ti,sci-sysreset"; + }; + }; |