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| author |   Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
|---|---|---|
| committer | Angelos Mouzakitis <a.mouzakitis@virtualopensystems.com> | 2023-10-10 14:33:42 +0000 |
| commit | af1a266670d040d2f4083ff309d732d648afba2a (patch) | |
| tree | 2fc46203448ddcc6f81546d379abfaeb323575e9 /roms/u-boot/doc/device-tree-bindings/video/osd | |
| parent | e02cda008591317b1625707ff8e115a4841aa889 (diff) | |
Change-Id: Iaf8d18082d3991dec7c0ebbea540f092188eb4ec
Diffstat (limited to 'roms/u-boot/doc/device-tree-bindings/video/osd')
| -rw-r--r-- | roms/u-boot/doc/device-tree-bindings/video/osd/gdsys,ihs_video_out.txt | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/roms/u-boot/doc/device-tree-bindings/video/osd/gdsys,ihs_video_out.txt b/roms/u-boot/doc/device-tree-bindings/video/osd/gdsys,ihs_video_out.txt new file mode 100644 index 000000000..d7aacc827 --- /dev/null +++ b/roms/u-boot/doc/device-tree-bindings/video/osd/gdsys,ihs_video_out.txt @@ -0,0 +1,23 @@ +* Guntermann & Drunck Integrated Hardware Systems OSD + +Required properties: +- compatible: "gdsys,ihs_video_out" +- reg: A combination of three register spaces: + - Register base for the video registers + - Register base for the OSD registers + - Address of the OSD video memory +- mode: The initial resolution and frequency: "1024_768_60", "720_400_70", or + "640_480_70" +- clk_gen: phandle to the pixel clock generator +- dp_tx: phandle to the display associated with the OSD + +Example: + +fpga0_video0 { + compatible = "gdsys,ihs_video_out"; + reg = <0x100 0x40 + 0x180 0x20 + 0x1000 0x1000>; + dp_tx = <&fpga0_dp_video0>; + clk_gen = <&fpga0_video0_clkgen>; +}; |